MPAM: 64 bit access hack for TC23 FPGA

 * The 64 bit access from the DSU is reaching the Tower interconnect as a
   1 beat 64 bit request. But when Tower re-directs the request to DSU, it
   is sent as 2 beats 32 bit request, which is not supported by the DSU.
 * This has to be fixed in RTL and it is not trivial.
 * Hence this will not be fixed in TC23 RTL unless it is absolutely
   required.
 * This hack will will do two 32 bit access instead of a 64 bit access.
 * Though this is needed only for TC23 FPGA, having it for other
   versions of TC FPGAs will not cause any harm.
 * Though this hack will not cause any harm for FVP, did not made this
   hack common for FVP as doing a 64 bit access is the proper way of
   accessing a 64 bit register.

Signed-off-by: Davidson K <davidson.kumaresan@arm.com>