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Commit 9dcfe6ea authored by Jagdish Gediya's avatar Jagdish Gediya
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[workaround] perf: arm_cspmu: force 64-bit programmers model



MCN PMU doesn't implement 64-bit programmers’s model extension but
doesn't follow the non-64 bit register layout either.

As per coresight PMU spec version A_b,

1. when 64-bit programmers’ model extension not implemented, PMCR
   offset is 0xE04. (Memory map at Page no. 75 in spec)
2. when 64-bit programmers’ model extension is implemented, all
   registers are 8 bytes wide, and hence PMCR gets pushed to offset
   0xE10 to make a room for size extension to previous registers.
   (Memory map at Page no. 154 in spec)

MCN PMU doesn't implement 64-bit programmers’ model extension but
still have PMCR at offset 0xE10 and not at 0xE04.

Apart from it, MCN PMU also has filter registers 64 bit wide despite
not implementing 64-bit programmer's model.

All these issues can be taken care by forcefully setting
has_64bit_pmext to true in driver.

Signed-off-by: Jagdish Gediya's avatarJagdish Gediya <jagdish.gediya@arm.com>
parent ad262bcc
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