Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Job/burst API can be used instead.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Co-authored-by: Adrian Stanciu <adrian.stanciu@intel.com>
Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>

Algorithms using the counter mode were using the term "CNTR"
in the cipher mode enums. "CTR" is more widely used, so more
enums are added replacing CNTR with CTR, leaving the previous ones
untouched, to avoid API breakages.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Except for IMB_CIPHER_SM4_CNTR cipher mode enum,
which remains as it is, to avoid API breakage on frameworks like DPDK that
are already using this enum (IMB_CIPHER_SM4_CTR is also defined, though).

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

avx2: [aes-gcm] unify temporary SIMD register layout in INITIAL_BLOCKS_PARTIAL() and INITIAL_BLOCKS()

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>

All SIMD moves to and from the stack frame are aligned.

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>

Required as some algorithms do not support all default buffer sizes

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Move aes-gcm context definition to a separate include file.

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

In some cases, it could have included fragment of sensitive data.

This is to further decrease chance of false positive hits.

- remove stack frame clear operation from AES-GCM AVX2 type 2
- add small comment about register usage in AES-GCM AVX512 type 2

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

Signed-off-by: Marcel Cornu <marcel.d.cornu@intel.com>

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>

- Remove AVX architecture type from the library and applications
- Products like Sandy Bridge or Ivy Bridge will use SSE implementations now
- Remove AVX AES-GCM symbols. They were already pointing at SSE implementations.

- AVX type1 switches to use SSE implementation for these algorithms
- memory copy function, used for storing computed tag value, moved from AVX to AVX2
- removed AVX512 and AVX2 variants of AES-CFB-ONE functions