- Jul 04, 2025
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Paul Elliott authored
Rebase MR CY25Q3 1 See merge request !34 No notable differences from the base repository.
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Signed-off-by:Marcel Cornu <marcel.d.cornu@intel.com>
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- re-arranged GHASH key table layout - added label alignment and move 1st data block load to after counter blocks creation - code size reduction - added GHASH last 7 and last 8 functions - initial blocks implemented as a function that works across different key sizes - improvements in GHASH_8_ENCRYPT_8_PARALLEL: - do not explicitly load hash keys into register, use memory operand with pclmulqdq - pipeline loads of data for GHASH, all key loads are aligned - re-worked last encryption round, load, xor and store of plain/cipher text - made use of extra T4:T7 registers to load plain/cipher text
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Signed-off-by:Pablo de Lara <pablo.de.lara.guarch@intel.com>
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- Jun 27, 2025
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Paul Elliott authored
lib: [aarch64] sha security improvement: safe_memcpy and stack cleanup See merge request !33 * add secure zeroing of stack in safe data mode for multi-buffer sha1 * add safe_memcpy for aarch64 platforms.
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Islam Ragimov authored
- replace memcpy() with safe_memcpy() in imb_hmac_ipad_opad() Signed-off-by:Islam Ragimov <islam.ragimov@arm.com>
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Islam Ragimov authored
- issue was found in multi-buffer sha1 impl for aarch64 neon. - issue: Part of plain/ciphertext is presented on the stack. - fix: Addition of clearing sensitive data from the stack. Signed-off-by:
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- Jun 20, 2025
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Paul Elliott authored
lib: [hmac-sha] add (hmac-)sha1 implementation for aarch64 platform See merge request !32
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- Jun 18, 2025
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- add single-buffer SHA1 implementation - add direct API for SHA1 - support direct/job/burst API for HMAC-SHA1 - uncomment corresponding kat/xvalid-app tests Signed-off-by: -
- add 4-buffer SHA1 implementation - support job/burst API for SHA1 - uncomment corresponding kat/xvalid-app tests Signed-off-by: -
- update multi-buffer manager code for aarch64 platforms Signed-off-by:
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- Jun 17, 2025
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Paul Elliott authored
Rebase MR CY25Q1 5 See merge request !31 Notable changes from base repository: * Added arch guards to Intel specific code in imb_hash_burst_get_size implementation in capabilities.c. * Added arch guards to unsupported algorithms in capabilities.c * Added aarch64 specific Make and CMake adjustments to compile capabilities.c * Added arch guards to Intel specific code in imb_get_arch_type_string implementation in capabilities.c
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