This patch adds a function to poll Nor flash memory's status register
bit (WIP bit) to wait for an erase/write operation to complete.
The polling timeout is set to 1 second.

Signed-off-by: sahil <sahil@arm.com>
Change-Id: Ie678b7586671964ae0f8506a0542d73cbddddfe4

Signed-off-by: sahil <sahil@arm.com>
Change-Id: If448ad95b2e72cef31ce1e1e5ab2504d607f0545

Enable persistent storage on QSPI flash device.

Signed-off-by: sahil <sahil@arm.com>
Change-Id: I403113bb885d1d411d433a7f266715d007509a5e

Add NOR flash DXE driver, this brings up NV storage on
QSPI's flash device using FVB protocol.

Signed-off-by: sahil <sahil@arm.com>
Change-Id: Ica383c2be6d1805daa19afd98d28b943816218dd

Add NOR flash library, this library provides APIs for getting the list
of NOR flash devices on the platform.

Signed-off-by: sahil <sahil@arm.com>
Change-Id: I39ad4143b7fad7e33b3b151a019a74f23e0ed441

Enable SCP QSPI flash region access by adding it in the PlatformLibMem

Signed-off-by: sahil <sahil@arm.com>
Change-Id: I3ff832746ca94974ed72309eebe00e0024c47005

Himanshu Sharma authored May 30, 2022 and Sahil committed Feb 15, 2023

In DBG2 table, IRQ ID was set as 0 for the UART. This overwrote the
IPI0 trigger method to "level", which prevented SGI0 to be enabled
again after a CPU offline/online cycle.

This patch fixes the above issue by assigning a reserved IRQ ID
for the Debug UART, other than 0 and also routing it to use IOFPGA
UART1 by unsharing it from currently using serial terminal.

Signed-off-by: Himanshu Sharma <Himanshu.Sharma@arm.com>
Change-Id: Ib35fecc57f1d8c496135c18dbebd0be0a4b76041

RemoteDdrSize calculation wraps around when booting N1Sdp in
multichip mode. Casting it to UINT64 to fix the issue.

Signed-off-by: sahil <sahil@arm.com>
Change-Id: Ic51269a8d67669684a5f056701cfbef6beb23da2

NT_FW_CONFIG DTB contains platform information passed by
Tf-A boot stage.
This information is used for Virtual memory map generation
during PEI phase and passed on to DXE phase as a HOB, where
it is used in ConfigurationManagerDxe.

Signed-off-by: sahil <sahil@arm.com>
Change-Id: I54a86277719607eb00d4a472fae8f13c180eafca

Fix typos discovered by SpellCheck, which were discovered as part of the
initial CI enablement effort.

Cc: Pedro Falcato <pedro.falcato@gmail.com>
Signed-off-by: Marvin Häuser <mhaeuser@posteo.de>
Reviewed-by: Pedro Falcato <pedro.falcato@gmail.com>

Previously, the handling was mixed and/or non-existent regarding non utf-8
dirent names. Clarify it.

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Cc: Marvin Häuser <mhaeuser@posteo.de>
Reviewed-by: Marvin Häuser <mhaeuser@posteo.de>

Several questions have popped up regarding the ext4 directory entry
layout and contents off-list. Attempt to clarify these issues by adding
some explanatory comments.

Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Cc: Marvin Häuser <mhaeuser@posteo.de>
Reviewed-by: Marvin Häuser <mhaeuser@posteo.de>

Fix an out-of-bounds read inside CompareMem() when
checking for "." or ".." by explicitly bounding name_len
to [0, 2] beforehand.

Reported-by: Savva Mitrofanov <savvamtr@gmail.com>
Fixes: 45e37d85 ("Ext4Pkg: Hide "." and ".." entries from Read() callers.")
Cc: Marvin Häuser <mhaeuser@posteo.de>
Signed-off-by: Pedro Falcato <pedro.falcato@gmail.com>
Reviewed-by: Marvin Häuser <mhaeuser@posteo.de>

defines two PCDs, PcdShellFile and PcdShellFileDesc,
which holds the GUID and description of the UEFI shell file to be loaded.

A PCDs based solution gives flexibility to the user to load different
images, by just overriding the DSC file.

The user can load a diagnostic image or test image during
PCDBootToShellOnly or later stages.

Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Abdul Lateef Attar <AbdulLateef.Attar@amd.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

GCC compiler puts the DevicePath PCDs to the read-only
section. During boot if try to process the device path
after PtrGetPtr it throws a page fault exception.

Hence making a local copy using DuplicateDevicePath()
to avoid the page fault exception.

Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>

Signed-off-by: Abdul Lateef Attar <abdattar@amd.com>
Reviewed-by: : Isaac Oram <isaac.w.oram@intel.com>

This contains binary interface changes and requires FSP 4.2.0.2A or later

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Isaac Oram <isaac.w.oram@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

This contains binary interface changes and requires FSP 4.2.0.2A or later

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Isaac Oram <isaac.w.oram@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

Add VGA graphics card support for Loongarch,
VGA graphics cards have GOP to support early
kernel information printing, so we need it.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>

Now that an implementation of the HDMI debug port is available at high
speed, make the timing parameters configurable. As this is
implementation, not board dependent, perhaps these could become
dynamic PCDs.

Arduino sketch available at
https://github.com/benjamindoron/i2c_debug_port

.

Tested on Adafruit ItsyBitsy M4, using 1 MHz clock and 60 us delay.

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Signed-off-by: Benjamin Doron <benjamin.doron00@gmail.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>
Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com>

The ARCHCC and ARCHASM flags are redundant, given that ARMv7-A with
Thumb2 codegen has been the default for a long time, for all supported
toolchains.

So let's drop these definitions: this allows us to retire ARCHCC and
ARCHASM entirely from EDK2.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>

The RVCT toolchain family has been removed from EDK2 so let's get rid of
the remaining references to it. This includes .asm versions of assembler
source files that use a different idiom than GNU as.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>

Set the 0 page property to unreadable, non-writable, non-executable

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>

Optimize the process of converting huge pages
 to page table entries.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>

Modify the null judgment condition of page table entries.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>

Modify the page table entry access priority
 When the Page table properties are set.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>

Support pflash for loongarch.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>

Add pflash driver for loongarch.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>

Add nvme device driver support loongarch qemu virt machine.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>

Add bootmode support in PEI phase.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Bibo Mao <maobibo@loongson.cn>
Cc: Chao Li <lichao@loongson.cn>
Cc: Leif Lindholm <quic_llindhol@quicinc.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Signed-off-by: xianglai li <lixianglai@loongson.cn>
Reviewed-by: Chao Li <lichao@loongson.cn>

Fix some build issues with GCC5 targets
Add a Readme.md for AdvancedFeaturePkg
Add VS2019, CLANGPDB, and GCC5 build targets to Readme.md
for each feature

Cc: Sai Chaganty <rangasai.v.chaganty@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Dandan Bi <dandan.bi@intel.com>
Signed-off-by: Isaac Oram <isaac.w.oram@intel.com>
Reviewed-by: Sai Chaganty <rangasai.v.chaganty@intel.com>

Block length incorrectly calculated off of the block width.
Reverted EFI_ACPI_GPE0_BLK_WIDTH change and added #defines
for X_GPE0 and X_GPE1 contents.

Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Ankit Sinha <ankit.sinha@intel.com>
Cc: Suresh Ponnusamy <sureshkumarp@ami.com>
Signed-off-by: Isaac Oram <isaac.w.oram@intel.com>
Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>

The README link of the EDK2 code repository has been changed.

Signed-off-by: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Reviewed-by: Michael D Kinney <michael.d.kinney@intel.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4242



Define a macro for SmbiosFeaturePkg usage which named
INTEL_FVI_SMBIOS_TYPE and initialized to 0xDD in
IndustryStandard/FirmwareVersionInfo.h

Signed-off-by: Hunter Chang <hunter.chang@intel.com>

Reviewed-by: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Reviewed-by: S, Ashraf Ali <ashraf.ali.s@intel.com>

Add reference of IpmiBaseLib

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

Add functions to get system UUID and LAN
configuration parameter.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

Add functions to get system UUID and LAN
configuration parameter.

Signed-off-by: Abner Chang <abner.chang@amd.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Nickle Wang <nicklew@nvidia.com>
Cc: Igor Kulchytskyy <igork@ami.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

The serial number of Edk2OpensbiPlatformWrapperLib Library
and RiscVSpecialPlatformLib Library in the figure is opposite to
the text description. Fix it and adjust the text order.

Signed-off-by: Dongdong Zhang <zhangdongdong@eswincomputing.com>
Acked-by: Abner Chang <abner.chang@amd.com>
Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>

PCIE Base Address is 64bit PCD and the Mem Limit UINT64.
so typecasting to 32bit is not needed.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4068



Cc: Ray Ni <ray.ni@intel.com>
Cc: Rangasai V Chaganty <rangasai.v.chaganty@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Chasel Chiu <chasel.chiu@intel.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Cc: Isaac Oram <isaac.w.oram@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Eric Dong <eric.dong@intel.com>
Signed-off-by: Ashraf Ali S <ashraf.ali.s@intel.com>
Reviewed-by: Isaac Oram <isaac.w.oram@intel.com>

Include the FdtLib path to fix a build issue coming on Arm/SgiPkg with
PlatformStandaloneMm2.

Fixes the build breakage introduced by 9ad168c9e0:
StandaloneMmPkg: Include libfdt in the StMM

Signed-off-by: Vivek Gautam <vivek.gautam@arm.com>

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4198



After commit 1e1e35bb,
FIT Type 2 ACM entry is not generated as expected with given -I arguments.
FMS/FMS value is overridden by GetAcmFms().

This patch detects whether FMS/FMS Mask is already assigned
with -I argument. If it's not zero, skip invoking GetAcmFms().

Signed-off-by: Dakota Chiang <dakota.chiang@intel.com>
Reviewed-by: Bob Feng <bob.c.feng@intel.com>

Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Jason1 Lin <jason1.lin@intel.com>
Cc: Rahul R Kumar <rahul.r.kumar@intel.com>