SbsaQemu: AcpiDxe: Create PPTT table at runtime

Add support to create Processor Properties Topology Table at
runtime. The cache topology of each CPU is as follows:

                  CPU N
         ------------------------
         |  --------  --------  |
         |  | L1-I |  | L1-D |  |
         |  | 32KB |  | 32KB |  |
         |  --------  --------  |
         |  ------------------  |
         |  |    L2 512KB    |  |
         |  ------------------  |
         ------------------------

Signed-off-by: Tanmay Jagdale <tanmay.jagdale@linaro.org>
Reviewed-by: Leif Lindholm <leif@nuviainc.com>