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Commit 211f6428 authored by Vishnu Banavath's avatar Vishnu Banavath Committed by Tushar Khandelwal
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pl011: set uart clock to 32MHz 

Set UART clock 32MHz to aling with FPGA

Change-Id: I10c394028ecbcda47659dfa2bf602eb4a67f1b5c
parent 1823b407
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