From 584a8c5783bfcfe0c83b5c445f04ceabc7bc8edd Mon Sep 17 00:00:00 2001 From: Ryan Roberts Date: Mon, 10 Jun 2024 14:23:56 +0100 Subject: [PATCH 1/3] docker: Fix libdbus warning when booting fvp Previously, the fvp would display "libdbus-1.so.3: cannot open shared object file: No such file or directory" during boot. This was caused by libdbus being missing. Once added to the container, the fvp started using dbus to setup audio and emitted more warnings due to libpulse being missing, so lets add that too. Signed-off-by: Ryan Roberts --- docker/Dockerfile.fvp | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/docker/Dockerfile.fvp b/docker/Dockerfile.fvp index 9b2026d..d6cc9d2 100644 --- a/docker/Dockerfile.fvp +++ b/docker/Dockerfile.fvp @@ -4,6 +4,11 @@ ARG BASE FROM ${BASE} +# Install packages that the FVP relies upon. +RUN apt-get install --assume-yes --no-install-recommends --option=debug::pkgProblemResolver=yes \ + libdbus-1-3 \ + libpulse0 + # Install FVP_Base_RevC-2xAEMvA. This is parameterized so the caller can easily # update the version and architecture for different builds, or even omit it by # providing the special name "none". -- GitLab From e2a031fed13eed9fc20a611ebc7400e41e6ad27b Mon Sep 17 00:00:00 2001 From: Ryan Roberts Date: Mon, 17 Jun 2024 15:19:27 +0100 Subject: [PATCH 2/3] test: Fix stdout encoding test.py captures stdout/err from the FVP and dumps it to the test's stdout. It was previously encoding as utf-8 at source but in some cases an exception meant that stdout was remaining binary. Let's always capture it in binary then unconditionally encode as utf-8 when we write it to stdout. That way we should sidestep the write() error if an exception had occured. Signed-off-by: Ryan Roberts --- test/test.py | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/test/test.py b/test/test.py index 78051d5..edf93e6 100755 --- a/test/test.py +++ b/test/test.py @@ -183,7 +183,6 @@ def print_results(junit=None): def run(cmd, timeout=None, expect=0, capture=False): print(f'+ {cmd}') ret = subprocess.run(cmd, timeout=timeout, shell=True, - universal_newlines=True, stdout=subprocess.PIPE if capture else None, stderr=subprocess.STDOUT if capture else None) if ret.returncode != expect: @@ -288,7 +287,7 @@ def run_configs(configs, overlay=None, rtvarss=None): for result, stdout in pool.starmap(run_config, params): results.append(result) if stdout: - sys.stdout.write(stdout) + sys.stdout.write(stdout.decode()) def do_main(args): -- GitLab From f2e38fd32fb35f7d38f8308bbd826f33b03b0632 Mon Sep 17 00:00:00 2001 From: Jean-Philippe Brucker Date: Thu, 30 May 2024 13:56:06 +0100 Subject: [PATCH 3/3] config: Fix SMMU registers SMMU_IDR1 is too restrictive to be used by Linux: - StreamID size of 2 bits, means the SMMU can't support 16-bit PCI IDs - Event queue and command queues have a max size of 1 and 9. Linux needs at least 64 entries: [ 1.485702] arm-smmu-v3 2b400000.iommu: command queue size <= 64 entries not supported Do the union of the current features and the default model features. Signed-off-by: Jean-Philippe Brucker Signed-off-by: Ryan Roberts --- config/FVP_Base_RevC-2xAEMvA-base.yaml | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/config/FVP_Base_RevC-2xAEMvA-base.yaml b/config/FVP_Base_RevC-2xAEMvA-base.yaml index 89328eb..86d8cf9 100644 --- a/config/FVP_Base_RevC-2xAEMvA-base.yaml +++ b/config/FVP_Base_RevC-2xAEMvA-base.yaml @@ -58,13 +58,17 @@ run: -C cluster0.gicv4.mask-virtual-interrupt: 1 # If true, virtual interrupts can be masked from being reported to virtual CPU interface by setting ICH_HCR_EL2.DVIM 1. No control otherwise. -C cluster1.gicv4.mask-virtual-interrupt: 1 - # These SMMU registers are configuring the arch model with a personality. Features to implement/expose. - # What is this personality? + # These SMMU registers are configuring the arch model with a personality. Features to implement/expose. The model defaults plus a few useful features. + # SMMUv3.2 -C pci.pci_smmuv3.mmu.SMMU_AIDR: 2 - -C pci.pci_smmuv3.mmu.SMMU_IDR0: 0x0046123B - -C pci.pci_smmuv3.mmu.SMMU_IDR1: 0x00600002 + # Enable ASID16, for sharing process address spaces with devices + -C pci.pci_smmuv3.mmu.SMMU_IDR0: 0x080FF6BF + -C pci.pci_smmuv3.mmu.SMMU_IDR1: 0x0CE73D20 + # Enable FWB, Small TT, Range invalidation, and BBM level 2. -C pci.pci_smmuv3.mmu.SMMU_IDR3: 0x1714 + # Enable 16kB pages, VAX. Bit[3] is res0. -C pci.pci_smmuv3.mmu.SMMU_IDR5: 0xFFFF0475 + # Enable secure side, SEL2, 2-bit SID -C pci.pci_smmuv3.mmu.SMMU_S_IDR1: 0xA0000002 -C pci.pci_smmuv3.mmu.SMMU_S_IDR2: 0 -C pci.pci_smmuv3.mmu.SMMU_S_IDR3: 0 -- GitLab