From 2423ab4a238f591784e7814bec1636d42f63271b Mon Sep 17 00:00:00 2001 From: Manoj Kumar Date: Mon, 30 Jul 2018 17:39:45 +0530 Subject: [PATCH] pik_clock: make divider value check limit as configurable parameter PIK clock divider value limit checking is hardcoded to 16 with 4-bit assumption. However many mobile & infra platforms has 5-bit divider. This patch fixes the issue by adding a configurable module parameter so that the platform's config file can set the divider bitfield size based on platform. Additionally, if platform does not provide module configuration data, then the divider limit is set to a default value of 5-bits. Change-Id: I70103ec84eacc2d26be999ca6524878bff51dd9d Signed-off-by: Manoj Kumar --- module/pik_clock/include/mod_pik_clock.h | 19 +++++++++++++++++++ module/pik_clock/src/mod_pik_clock.c | 11 +++++++++-- 2 files changed, 28 insertions(+), 2 deletions(-) diff --git a/module/pik_clock/include/mod_pik_clock.h b/module/pik_clock/include/mod_pik_clock.h index d03e7b366..16bc0f8cf 100644 --- a/module/pik_clock/include/mod_pik_clock.h +++ b/module/pik_clock/include/mod_pik_clock.h @@ -194,6 +194,25 @@ enum mod_pik_clock_dmcclk_source { MOD_PIK_CLOCK_DMCCLK_SOURCE_DDRPLL = 2, }; +/*! + * \brief Divider bitfield width. + */ +enum mod_pik_clock_divider_bitfield_width { + /*! PIK clock with 4-bit divider. */ + MOD_PIK_CLOCK_DIVIDER_BITFIELD_WIDTH_4BITS = 4, + /*! PIK clock with 5-bit divider. */ + MOD_PIK_CLOCK_DIVIDER_BITFIELD_WIDTH_5BITS = 5, +}; + +/*! + * \brief PIK clock module configuration. + */ +struct mod_pik_clock_module_config { + /*! The maximum divider value. */ + unsigned int divider_max; +}; + + /*! * \brief Rate lookup entry. */ diff --git a/module/pik_clock/src/mod_pik_clock.c b/module/pik_clock/src/mod_pik_clock.c index e6ab8f075..a812d1288 100644 --- a/module/pik_clock/src/mod_pik_clock.c +++ b/module/pik_clock/src/mod_pik_clock.c @@ -107,6 +107,7 @@ struct pik_clock_dev_ctx { struct pik_clock_ctx { struct pik_clock_dev_ctx *dev_ctx_table; unsigned int dev_count; + unsigned int divider_max; }; static struct pik_clock_ctx module_ctx; @@ -152,7 +153,7 @@ static int ssclock_set_div(struct pik_clock_dev_ctx *ctx, uint32_t divider, if (divider == 0) return FWK_E_PARAM; - if (divider > 16) + if (divider > module_ctx.divider_max) return FWK_E_PARAM; if (ctx == NULL) return FWK_E_PARAM; @@ -188,7 +189,7 @@ static int msclock_set_div(struct pik_clock_dev_ctx *ctx, return FWK_E_PARAM; if (divider == 0) return FWK_E_PARAM; - if (divider > 16) + if (divider > module_ctx.divider_max) return FWK_E_PARAM; if (ctx->config->type == MOD_PIK_CLOCK_TYPE_SINGLE_SOURCE) return FWK_E_PARAM; @@ -663,11 +664,17 @@ static const struct mod_css_clock_direct_api api_direct = { static int pik_clock_init(fwk_id_t module_id, unsigned int element_count, const void *data) { + struct mod_pik_clock_module_config *config = + (struct mod_pik_clock_module_config *)data; module_ctx.dev_count = element_count; if (element_count == 0) return FWK_SUCCESS; + module_ctx.divider_max = ((config == NULL) ? + (1 << MOD_PIK_CLOCK_DIVIDER_BITFIELD_WIDTH_5BITS) : + config->divider_max); + module_ctx.dev_ctx_table = fwk_mm_calloc(element_count, sizeof(struct pik_clock_dev_ctx)); if (module_ctx.dev_ctx_table == NULL) -- GitLab