From 7ed45f8c4f50cd8d0d5bceaf8eb96976f69f4bf0 Mon Sep 17 00:00:00 2001 From: Manoj Kumar Date: Thu, 11 Apr 2019 20:39:55 +0530 Subject: [PATCH] n1sdp: fix cluster 1 cpu clock source in css_clock config file Change-Id: Id1e6e069bb4cb253f7f000b80d6045873f4189dc Signed-off-by: Manoj Kumar --- product/n1sdp/scp_ramfw/config_css_clock.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/product/n1sdp/scp_ramfw/config_css_clock.c b/product/n1sdp/scp_ramfw/config_css_clock.c index 6efc4e427..dd7cadb2e 100644 --- a/product/n1sdp/scp_ramfw/config_css_clock.c +++ b/product/n1sdp/scp_ramfw/config_css_clock.c @@ -74,7 +74,7 @@ static const struct mod_css_clock_rate rate_table_cpu_group_1[] = { /* Super Underdrive */ .rate = CSS_CLK_RATE_CPU_GRP1_SUPER_UNDERDRIVE, .pll_rate = CSS_CLK_RATE_CPU_GRP1_SUPER_UNDERDRIVE, - .clock_source = MOD_PIK_CLOCK_CLUSCLK_SOURCE_PLL1, + .clock_source = MOD_PIK_CLOCK_CLUSCLK_SOURCE_PLL0, .clock_div_type = MOD_PIK_CLOCK_MSCLOCK_DIVIDER_DIV_EXT, .clock_div = 1, .clock_mod_numerator = 1, @@ -84,7 +84,7 @@ static const struct mod_css_clock_rate rate_table_cpu_group_1[] = { /* Underdrive */ .rate = CSS_CLK_RATE_CPU_GRP1_UNDERDRIVE, .pll_rate = CSS_CLK_RATE_CPU_GRP1_UNDERDRIVE, - .clock_source = MOD_PIK_CLOCK_CLUSCLK_SOURCE_PLL1, + .clock_source = MOD_PIK_CLOCK_CLUSCLK_SOURCE_PLL0, .clock_div_type = MOD_PIK_CLOCK_MSCLOCK_DIVIDER_DIV_EXT, .clock_div = 1, .clock_mod_numerator = 1, @@ -94,7 +94,7 @@ static const struct mod_css_clock_rate rate_table_cpu_group_1[] = { /* Nominal */ .rate = CSS_CLK_RATE_CPU_GRP1_NOMINAL, .pll_rate = CSS_CLK_RATE_CPU_GRP1_NOMINAL, - .clock_source = MOD_PIK_CLOCK_CLUSCLK_SOURCE_PLL1, + .clock_source = MOD_PIK_CLOCK_CLUSCLK_SOURCE_PLL0, .clock_div_type = MOD_PIK_CLOCK_MSCLOCK_DIVIDER_DIV_EXT, .clock_div = 1, .clock_mod_numerator = 1, @@ -104,7 +104,7 @@ static const struct mod_css_clock_rate rate_table_cpu_group_1[] = { /* Overdrive */ .rate = CSS_CLK_RATE_CPU_GRP1_OVERDRIVE, .pll_rate = CSS_CLK_RATE_CPU_GRP1_OVERDRIVE, - .clock_source = MOD_PIK_CLOCK_CLUSCLK_SOURCE_PLL1, + .clock_source = MOD_PIK_CLOCK_CLUSCLK_SOURCE_PLL0, .clock_div_type = MOD_PIK_CLOCK_MSCLOCK_DIVIDER_DIV_EXT, .clock_div = 1, .clock_mod_numerator = 1, @@ -114,7 +114,7 @@ static const struct mod_css_clock_rate rate_table_cpu_group_1[] = { /* Super Overdrive */ .rate = CSS_CLK_RATE_CPU_GRP1_SUPER_OVERDRIVE, .pll_rate = CSS_CLK_RATE_CPU_GRP1_SUPER_OVERDRIVE, - .clock_source = MOD_PIK_CLOCK_CLUSCLK_SOURCE_PLL1, + .clock_source = MOD_PIK_CLOCK_CLUSCLK_SOURCE_PLL0, .clock_div_type = MOD_PIK_CLOCK_MSCLOCK_DIVIDER_DIV_EXT, .clock_div = 1, .clock_mod_numerator = 1, -- GitLab