From 705ee0e0b9c5a319b01b5f943d56b3a435899bcd Mon Sep 17 00:00:00 2001 From: Jim Quigley Date: Thu, 12 Dec 2019 17:37:47 +0000 Subject: [PATCH] juno: CDCEL clock driver uses incorrect address for I2C transaction The first four bytes of the PLL Config register are not used by Juno, so we always skip them when reading/writing the PLL configuration. The address was not incremented for the write after a read when setting the PLL data in set_rate_from_index() call. Change-Id: I094d3648168a1142cba4ee90e51aa31b3b93de88 Signed-off-by: Jim Quigley --- product/juno/module/juno_cdcel937/src/mod_juno_cdcel937.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/product/juno/module/juno_cdcel937/src/mod_juno_cdcel937.c b/product/juno/module/juno_cdcel937/src/mod_juno_cdcel937.c index 4594234e1..17f5697d8 100644 --- a/product/juno/module/juno_cdcel937/src/mod_juno_cdcel937.c +++ b/product/juno/module/juno_cdcel937/src/mod_juno_cdcel937.c @@ -417,6 +417,9 @@ static int set_rate_write_pll_config(struct juno_cdcel937_dev_ctx *ctx) if (status != FWK_SUCCESS) return FWK_E_PARAM; + /* The first 4 bytes of the PLL config register are not needed */ + base_address += 0x4; + /* Write back the modified structure */ status = write_configuration(ctx, base_address, &pll_config); if ((status != FWK_PENDING) && (status != FWK_SUCCESS)) -- GitLab