From 9e91cdc1cd5f1f89d51eaa7020b3dd9eabe28b6c Mon Sep 17 00:00:00 2001 From: Vijayenthiran Subramaniam Date: Wed, 27 Dec 2023 13:13:57 +0530 Subject: [PATCH] neoverse-rd/rdv3: set L0GPTSZ to 16GB for all AP cores For a RME enabled platform, supported L0GPT sizes are 1GB, 16GB, 64GB and 512GB. For RD-V3, the default L0GPTSZ field is set to 0, which corresponds to each L0 table covering 1GB physical address range. To address a 256TB address space (48bit PPS) and for 4KB page size (PGS), the total size needed for the L0 table entries is 2MiB. CCA security architect recommends keeping the L0 GPTs in the internal SRAM, but the RD-V3 SRAM size is limited to 1MiB. To optimize the number of L0 GPT entries required to address a 48bit PPS, set L0GPTSZ to 4, which corresponds to each L0 GPT entries corresponding to 16GB physical address space. The total of 128 KiB is required to fit all the L0 GPT entries when L0GPTSZ is 4. Setting it in the core manager's PE_STATIC_CONFIG register will reflect in the GPCCR_EL3.L0GPTSZ system register of the AP. Signed-off-by: Vijayenthiran Subramaniam Change-Id: Ibbbf0cd71f6eebfa7ec50df9219d157b3b470fb7 --- .../scp_platform/src/mod_scp_platform.c | 25 ++++++++++++++++++- .../rdv3/scp_ramfw/include/core_manager.h | 7 +++++- 2 files changed, 30 insertions(+), 2 deletions(-) diff --git a/product/neoverse-rd/rdv3/module/scp_platform/src/mod_scp_platform.c b/product/neoverse-rd/rdv3/module/scp_platform/src/mod_scp_platform.c index 42098b40e..aa9e217ba 100644 --- a/product/neoverse-rd/rdv3/module/scp_platform/src/mod_scp_platform.c +++ b/product/neoverse-rd/rdv3/module/scp_platform/src/mod_scp_platform.c @@ -1,6 +1,6 @@ /* * Arm SCP/MCP Software - * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2025, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause * @@ -8,6 +8,9 @@ * SCP platform sub-system initialization support. */ +#include "core_manager.h" +#include "platform_core.h" + #include #include @@ -33,6 +36,23 @@ struct scp_platform_ctx { /* Module context data */ struct scp_platform_ctx scp_platform_ctx; +static void platform_update_gpt_size(void) +{ + unsigned int core_idx; + struct core_manager_reg *coremgr_ptr; + + /* Update L0GPTSZ for all cores */ + for (core_idx = 0; core_idx < platform_get_core_count(); core_idx++) { + coremgr_ptr = SCP_CLUSTER_UTILITY_CORE_MANAGER_PTR(core_idx); + coremgr_ptr->PE_STATIC_CONFIG &= + ~(CORE_MANAGER_PE_STATIC_CONFIG_L0GPTSZ_MASK + << CORE_MANAGER_PE_STATIC_CONFIG_L0GPTSZ_SHIFT); + coremgr_ptr->PE_STATIC_CONFIG |= + (CORE_MANAGER_PE_STATIC_CONFIG_L0GPTSZ_16GB + << CORE_MANAGER_PE_STATIC_CONFIG_L0GPTSZ_SHIFT); + } +} + /* * Framework handlers */ @@ -152,6 +172,9 @@ static int scp_platform_start(fwk_id_t id) return FWK_E_PANIC; } + /* Update L0GPTSZ for all cores */ + platform_update_gpt_size(); + /* Determine the chip information */ status = scp_platform_ctx.system_info_api->get_system_info(&system_info); if (status != FWK_SUCCESS) { diff --git a/product/neoverse-rd/rdv3/scp_ramfw/include/core_manager.h b/product/neoverse-rd/rdv3/scp_ramfw/include/core_manager.h index 1982e890e..b3d7dfc1d 100644 --- a/product/neoverse-rd/rdv3/scp_ramfw/include/core_manager.h +++ b/product/neoverse-rd/rdv3/scp_ramfw/include/core_manager.h @@ -1,6 +1,6 @@ /* * Arm SCP/MCP Software - * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved. + * Copyright (c) 2025, Arm Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause * @@ -73,4 +73,9 @@ struct core_manager_reg { #define SCP_CLUSTER_UTILITY_CORE_MANAGER_PTR(IDX) \ ((struct core_manager_reg *)SCP_CLUSTER_UTILITY_CORE_MANAGER_BASE(IDX)) +/* AP Peripheral PE_STATIC_CONFIG definitions */ +#define CORE_MANAGER_PE_STATIC_CONFIG_L0GPTSZ_MASK (0xF) +#define CORE_MANAGER_PE_STATIC_CONFIG_L0GPTSZ_SHIFT (9) +#define CORE_MANAGER_PE_STATIC_CONFIG_L0GPTSZ_16GB (4) + #endif /* CORE_MANAGER_H */ -- GitLab