From e1fb6b016a242734b4a01cfbdf2d16671b446a7a Mon Sep 17 00:00:00 2001 From: Wei-Chia Su Date: Fri, 9 Aug 2024 17:25:36 +0100 Subject: [PATCH] arch: Enhance compatibility for `arch_nvic_init` In Cortex-M3/M4/M23/M33, a core register block was named the System Control and ID Register, separate from the System Control Block (SCnSCB). In Cortex-M55/M85, the same block was renamed to Implementation Control Registers (ICB), creating a naming discrepancy within the same Cortex v8m family. Therefore, using #ifdef ARMV7M alone is inadequate. To ensure compatibility, the register's definition is utilized over the family. This adjustment should facilitate the build for Cortex-M23 and M33 cores. Signed-off-by: Wei-Chia Su --- arch/arm/arm-m/src/arch_nvic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/arm-m/src/arch_nvic.c b/arch/arm/arm-m/src/arch_nvic.c index 1fa14fff9..5d3402aa4 100644 --- a/arch/arm/arm-m/src/arch_nvic.c +++ b/arch/arm/arm-m/src/arch_nvic.c @@ -275,7 +275,7 @@ int arch_nvic_init(const struct fwk_arch_interrupt_driver **driver) } /* Find the number of interrupt lines implemented in hardware */ -# ifdef ARMV7M +# ifdef SCnSCB ictr_intlinesnum = SCnSCB->ICTR & SCnSCB_ICTR_INTLINESNUM_Msk; # else ictr_intlinesnum = ICB->ICTR & ICB_ICTR_INTLINESNUM_Msk; -- GitLab