Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: I44e7796b32070b71750959d61aab9b7826ee0228

This patch updates the SCP-firmware version to 2.9.0.

Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: If62b4a5a9e0a5a2eab2646b9a62844dc90a77b67

The extension for the source file config_scmi_power_domain is missing.
Cmake throws a `Policy CMP0115` warning when building the firmware for
sgm776.

This patch adds the missing file extension in ramfw/CMakeList.txt.

Change-Id: Ib0c13b289c1f21d486c017714df06b9be7868e34
Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>

When trying to build a platform with support for the CLI debugger,
the cmake build system will spit the following error:

CMake Warning:
  Manually-specified variables were not used by the project:

    SCP_ENABLE_DEBUG_INIT

This is caused by a typo in the variable name:
DSCP_ENABLE_DEBUG_INIT -> DSCP_ENABLE_DEBUGGER_INIT

This commit replaced the variable name used for the debug unit support
with the correct name for the CLI debugger.

Change-Id: Iae97edbebd9990535268b6eec025cf5aaa6f8c35
Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>

SCP_LOG_LEVEL is used to define the minimum logging level for the
firmware. Currently, the framework's CMakeLists sets it to INFO for
Debug and WARN for release builds. It does not honor SCP_LOG_LEVEL
variable defined through compiler definition or through another
CMakeLists file, which locks SCP_LOG_LEVEL either to INFO or WARN. Fix
this by setting the SCP_LOG_LEVEL only if it is not defined already.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I767fd7e126359c38ef8fccd62c571d048c3b3f65

Add support for programming CXL Gateway (CCG) to enable and bring-up the
Coherent Multichip Link (CML). This patch is based on commit cb59c078
("cmn_rhodes: ccix: add initial support for ccix programming") with
necessary updates for CMN-700's CCG block.

Change-Id: I550d5419a620bc093ec91f2e54fb6c170a7d78b1
Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>

This is the max that CMN Booker can support. The corresponding
changes have been made in TC0 and TC1.

Signed-off-by: Usama Arif <usama.arif@arm.com>
Change-Id: Ic8e52fdedbfa301c0b0b3fb1b7900e8caa375c14

Add list of warnings and errors for newly added and updated
components to Cppcheck. These are added because Cppcheck is
not able to process some macros deep enough.
This patch also updates cppcheck parameters for cmake compilation.

Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: Ifaf70d80a377c3c35995794a8388bff07e648e12

Fix Cppcheck warnings and errors for debugger component.

Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: Ic00a212dcf7a5fe70ae2237929b739de99c5d60e

Fix Cppcheck warnings and errors for Clock, DVFS and PPU_V1 modules.

Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: I6fcb788d7fee06e61434f2da87835eb1a5818a56

Fix Cppcheck errors and warnings for cmn modules.

Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: Ib3230f257fd894fc1032ca25359856b326f3cee2

Fix Cppcheck warnings and errors for scmi modules

Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: I8c2484852614a2ffdc40c4e792b2f95073d9a630

Fix Cppcheck errors and warnings for juno platform.

Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: I64825cf4a160a8b8d0614e2caf90483d6a75bc36

Fix Cppcheck errors and warnings for morello platform.

Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: I4aaa7cb4c0da3119089e2f0111e1f4286a1df4ef

Fix Cppcheck errors and warnings for n1sdp platform.

Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: I7019c11dbed5278108cd2b3077da169789042589

Fix Cppcheck errors and warnings for rcar platform.
It solves unused variable assignation and how
resource permision are configured in order to
satisfy cppcheck requirements.

Signed-off-by: Leandro Belli <leandro.belli@arm.com>
Change-Id: I92229e074a2f15bf97bd18675206e18bcb497407

Fix Cppcheck errors and warnings for rdn1e1 platform.

Signed-off-by: Leandro Belli <leandro.belli@arm.com>
Change-Id: I1416c1e3cccdbf1fea85ce7a90c8a00ef6312e4f

Fix Cppcheck errors and warnings for SGI575 platform.

Signed-off-by: Leandro Belli <leandro.belli@arm.com>
Change-Id: Ieee5976e77badf064669250bfce81bb075d83cac

Fix Cppcheck errors and warnings for SGM775 platform.

Signed-off-by: Leandro Belli <leandro.belli@arm.com>
Change-Id: I725865e6cdd7b5f0ad7e48868c9334acb03e85fe

Fix Cppcheck errors and warnings for SGM776 platform.

Signed-off-by: Leandro Belli <leandro.belli@arm.com>
Change-Id: I2961ffdcec95c8734c8110b1281cfdb1844bc9f7

Fix Cppcheck errors and warnings for TC0 platform.

Signed-off-by: Leandro Belli <leandro.belli@arm.com>
Change-Id: I1197822bdc8b5a7c516fa396847505baff883532

Fix Cppcheck errors and warnings for TC1 platform.

Signed-off-by: Leandro Belli <leandro.belli@arm.com>
Change-Id: Idb49b40e235ead5b12855490400174f5a380f7cc

A previous commit (7b01ad84) left behind one replacement from
assert() to fwk_assert().

This commit fixes that.

Change-Id: Id98d2d09bb25d2842beeff69b7938fe259d5938c
Signed-off-by: Nicola Mazzucato <nicola.mazzucato@arm.com>

N1Sdp product specific n1sdp_i2c module is renamed
as cdns_i2c and moved to top level core module folder.
This allows platforms which have the Cadence I2C to make
use of the generic module and reduces code duplication.

References to n1sdp platform code has been removed from
the module.

Signed-off-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Change-Id: Id25b31521e8c89b17b3b6d521dad710590076be4

This change removes unused types
 __FWK_ID_TYPE_SIGNAL and 'struct signal'
which are not needed as it's use was removed in the
below commit(part of light event patchset)

f74c34fc framework, dvfs: Remove signals.

Change-Id: I46b0c90ffc55893df5c2cebf461637ba91a8f3ce
Signed-off-by: Girish Pathak <girish.pathak@arm.com>

This patch adds cmn_skeena module - the CMN interconnect in
Morello - to the core SCP modules group. CMN Skeena is based
on CMN600 but has additional changes to facilitate transportation
of the tag bits, 5x2 CMN mesh size, etc.

The Morello product will now be using this newly added core module
as opposed to having it as a private product-specific module.

Signed-off-by: Anurag Koul <anurag.koul@arm.com>
Co-authored-by: Manoj Kumar <manoj.kumar3@arm.com>
Co-authored-by: Chandni Cherukuri <chandni.cherukuri@arm.com>
Change-Id: Icb5e4cde65a74c407370da7f68dcecf3c1b76a83

A Security issues reporting section is added to the Readme file.
This section consists of point of contact to report the security
issues and a link to the Arm Developer website in case more
information is needed by the viewer.

Signed-off-by: Ahmed Gadallah <ahmed.gadallah@arm.com>
Change-Id: I86afcce34836dffe367486c99e01cc4a94d3b900

rename enum mod_system_info_api_idx to a more module appropriate name
i.e mod_apremap_api_idx

Signed-off-by: Aditya Angadi <aditya.angadi@arm.com>
Change-Id: I031f974900d025211dda39b93936052d880b26e6

Each SCG/HTG covers an address range and this address range can
be made to target a group of HN-Fs. These groups of HN-Fs are typically
bound by an arbitrary rectangle/square in the mesh. To aid automatic
programming of the HN-Fs in SCG/HTG along with the discovery process,
each SCG/HTG takes hnf_pos_start and hnf_pos_end in the config data.
HN-F nodes which are bound by this range will be assigned to the
respective SCG/HTG. This eliminates the process of manually looking at
the mesh and assigning the HN-F node ids to a SCG/HTG. To adapt to this
new change, update rdn2's cmn700 configuration to have one SCG region
which covers the entire mesh.

                                       hnf_pos_end
                                            xx
                                           xx
                                          xx
                   ┌─────────────────────xx
                   │                     │
                   │                     │
                   │                     │
                   │                     │
                   │    nth- SCG/HTG     │
                   │                     │
                   │                     │
                   │                     │
                   │                     │
                  xx─────────────────────┘
                 xx
                xx
               xx
        hnf_pos_start

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I08689dc44b98c0d648e31cb6db3b5c410eb2309d

Extend hierarchical hashing programming to support multiple SCG/HTG
regions.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: If19fd7f64ae0729797799bfce0c94db2ff090379

Currently, CMN-700 module allows programming the number of HN-Fs for
System Cache Group 0 (SCG0). In preparation to enable multiple SCGs,
allow programming of HN-F count for multiple SCG/HTG groups.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I3f25bde2808e4546a334adbcfd9e438c116b6b83

Update get_port_number to account for the number of ports in the cross
point (XP). For the XP with port count as 2, the port number is embedded
at the bit 2, while for the port count 3 and 4, the port number is
embedded in the bit fields 2:1.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I3f0baaf485357c82f5d3d612d16bc29aa41e5275

The get_root_node function helps to get the Root Node base address based
on the position (node id) of the HND node and the mesh size. CMN-700
aliases the root node base at the PERIPHBASE address (base address of
the CMN-700) so any access to the PERIPHBASE address will be aliased to
Root Node base. Hence the calculation implemented with the get_root_node
function is no longer required.

Create a separate function for calculating encoding and masking bits
which were done as part of get_root_node function.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I876d0c7eb1974f109be3345cc95600b66bd499b1

With the recent platform update in RD-N2-Cfg1, non-pcie devices are
connected to IO Virtualization block #1. So expand the ECAM, MMIOL and
MMIOH sizes to use the full range. Correspondingly, update the CMN-700
config data to map only one ECAM, MMIOL and MMIOH region each.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: Iec8493f66fffae30c9f7991b45e171b5b79416a7

NCI GPV region hacked by HNP4 is commented as index 3 instead of 4. Fix
this.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I5ab305e44ad077354723628ac966b8ab316dd83f

Add mapping for non-pcie devices behind IO macro. For RD-N2 (variant 0),
the devices are behind IO Macro 4 and for RD-N2-Cfg1 (variant 1), the
devices are behind IO Macro 1.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I7cb93a74c283f2908e241b6172c6199c84cd35f2

Modify IO_MACRO_ELEMENT_CONFIG macro to accept PCIe Integration Control
register as separate parameter. This avoids forced mapping of ECAM and
MMIOL/H regions to a specific IO Macro.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: I5e44578c6d438f2f636953ec13f70380134187f6

The SCP PIK address space (0x5000.0000 to 0x5FFF.FFFF) should be read
with 32-bit aligned addresses. But, SDS module performs reads at
byte-aligned address. So this helper function is used to first read the
Reset Syndrome value from the RESET_SYNDROME register and update the
reset syndrome value in the shared data storage using SDS write API.

Change-Id: I2b298f11c087d28b274f4003e158025c49ec194e
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>

The SDS module element data had couple of stale entries
(PLATFORM_SDS_CPU_BOOTCTR and PLATFORM_SDS_CPU_FLAGS) which are not used
by subsequent stages of boot and so these entries are removed. The SDS
descriptor ID have also been updated and this aligns with the next
stages of boot. The firmware version entries are split into SCP ROM and
RAM firmware versions.

Change-Id: Iaa74e735a24c7522a5e56ec2d60c4e9bad0650bf
Signed-off-by: Thomas Abraham <thomas.abraham@arm.com>

By default PCIe integration control register allows only secure access
to the ECAM and MMIO regions and non-secure access has to be explicitly
enabled. This patch adds new member (allow_non_secure_access) to the
configuration structure to allow the config data to specify that
ecam and mmio regions are meant for secure access only or not. This
member has to be set to true to allow non-secure access to the ECAM and
MMIO regions. Also update the platform's configuration data to allow
non-secure access.

Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
Change-Id: Iff0afaac938843855bc0cc4f3afa63c5fac73c01