From 0af2c453d3ecd0fb1d1bbc96232ebf0758d14c3c Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Wed, 26 Oct 2022 16:22:12 +0100
Subject: [PATCH 001/332] test[fuzz]: update fuzz arch compare

---
 test/job_api_fuzz_test.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/test/job_api_fuzz_test.c b/test/job_api_fuzz_test.c
index 6ae3283c..31370960 100644
--- a/test/job_api_fuzz_test.c
+++ b/test/job_api_fuzz_test.c
@@ -503,13 +503,13 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
         if (ar == NULL) {
                 init_mb_mgr_auto(p_mgr, &arch);
         } else {
-                if (strcmp(ar, "avx") == 0)
+                if (strcasecmp(ar, "AVX") == 0)
                         init_mb_mgr_avx(p_mgr);
-                else if (strcmp(ar, "avx2") == 0)
+                else if (strcasecmp(ar, "AVX2") == 0)
                         init_mb_mgr_avx2(p_mgr);
-                else if (strcmp(ar, "avx512") == 0)
+                else if (strcasecmp(ar, "AVX512") == 0)
                         init_mb_mgr_avx512(p_mgr);
-                else if (strcmp(ar, "sse") == 0)
+                else if (strcasecmp(ar, "SSE") == 0)
                         init_mb_mgr_sse(p_mgr);
                 else
                         init_mb_mgr_auto(p_mgr, &arch);
-- 
GitLab


From 6c453531ac25129a9ba1983c649f6e26e1f59811 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Tue, 1 Nov 2022 13:21:42 +0000
Subject: [PATCH 002/332] test[fuzz]: fix burst api jobs

---
 test/job_api_fuzz_test.c | 22 ++++++++++------------
 1 file changed, 10 insertions(+), 12 deletions(-)

diff --git a/test/job_api_fuzz_test.c b/test/job_api_fuzz_test.c
index 31370960..4eb88d9c 100644
--- a/test/job_api_fuzz_test.c
+++ b/test/job_api_fuzz_test.c
@@ -35,6 +35,7 @@
 #include <intel-ipsec-mb.h>
 
 #define BUFF_SIZE (32*1024*1024)
+#define MAX_BURST_JOBS 32
 
 int LLVMFuzzerTestOneInput(const uint8_t *, size_t);
 
@@ -478,7 +479,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
         if (dataSize < sizeof(IMB_JOB))
                 return 0;
 
-        if (num_jobs > 32 || num_jobs == 0 || key_len == 0)
+        if (num_jobs > MAX_BURST_JOBS || num_jobs == 0 || key_len == 0)
                 return 0;
 
         if (cipher_dir != NULL) {
@@ -517,7 +518,6 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
 
         IMB_JOB *job = NULL;
         /* create job array */
-        IMB_JOB *jobs[32] = {NULL};
 
         if (api == NULL || (strcmp(api, "SINGLE") == 0)) {
                 single = true;
@@ -560,6 +560,8 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                         job = IMB_SUBMIT_JOB(p_mgr);
                 }
         } else if (burst) {
+                IMB_JOB *jobs[MAX_BURST_JOBS] = {NULL};
+
                 while (IMB_GET_NEXT_BURST(p_mgr, num_jobs, jobs)
                        < (uint32_t)num_jobs)
                         IMB_FLUSH_BURST(p_mgr, num_jobs, jobs);
@@ -597,12 +599,10 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
 
                 IMB_SUBMIT_BURST(p_mgr, num_jobs, jobs);
         } else if (cipher_burst) {
-                while (IMB_GET_NEXT_BURST(p_mgr, num_jobs, jobs)
-                       < (uint32_t)num_jobs)
-                        IMB_FLUSH_BURST(p_mgr, num_jobs, jobs);
+	        IMB_JOB jobs[MAX_BURST_JOBS] = {0};
 
                 for (i = 0; i < num_jobs; i++) {
-                        job = jobs[i];
+                        job = &jobs[i];
                         cipher = cipher_selection();
                         memcpy(job, data, sizeof(*job));
                         /*
@@ -621,15 +621,13 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                         fill_job_data(job, buff);
                 }
 
-                IMB_SUBMIT_CIPHER_BURST(p_mgr, job, num_jobs,
+                IMB_SUBMIT_CIPHER_BURST(p_mgr, jobs, num_jobs,
                                         cipher, dir, key_len);
         } else if (hash_burst) {
-                while (IMB_GET_NEXT_BURST(p_mgr, num_jobs, jobs)
-                       < (uint32_t)num_jobs)
-                        IMB_FLUSH_BURST(p_mgr, num_jobs, jobs);
+	        IMB_JOB jobs[MAX_BURST_JOBS] = {0};
 
                 for (i = 0; i < num_jobs; i++) {
-                        job = jobs[i];
+                        job = &jobs[i];
                         hash = hash_selection();
                         memcpy(job, data, sizeof(*job));
                         /*
@@ -648,7 +646,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                         fill_job_data(job, buff);
                 }
 
-                IMB_SUBMIT_HASH_BURST(p_mgr, jobs[0], num_jobs, hash);
+                IMB_SUBMIT_HASH_BURST(p_mgr, jobs, num_jobs, hash);
         }
 
         free_mb_mgr(p_mgr);
-- 
GitLab


From 44b7660d082694bbbe6d669bc22e71ecf3216004 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 3 Nov 2022 12:26:37 +0000
Subject: [PATCH 003/332] perf: New default SHA size increment values

Unless specified by the user, set sha_size_incr value to:
- 24 for AES-CBC + HMAC variants
- 0 for all other combinations
---
 perf/ipsec_perf.c | 20 +++++++++++++++++++-
 1 file changed, 19 insertions(+), 1 deletion(-)

diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index 847d7a92..02294595 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -27,6 +27,7 @@
   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 **********************************************************************/
 
+#include <stdint.h>
 #include <stdio.h>
 #include <stdlib.h>
 #include <inttypes.h>
@@ -890,7 +891,7 @@ const uint32_t auth_tag_length_bytes[] = {
 uint32_t index_limit;
 uint32_t key_idxs[NUM_OFFSETS];
 uint32_t offsets[NUM_OFFSETS];
-uint32_t sha_size_incr = 24;
+uint32_t sha_size_incr = UINT32_MAX;
 
 enum range {
         RANGE_MIN = 0,
@@ -4092,6 +4093,23 @@ int main(int argc, char *argv[])
                 fprintf(stderr, "TSC scaling to core cycles: %.3f\n",
                         get_tsc_to_core_scale(turbo_enabled));
 
+        /**
+         * if SHA size increment not specified by user, set to default value
+         * - 24 for CBC-HMAC variants, otherwise 0
+         **/
+        if (sha_size_incr == UINT32_MAX) {
+                if ((custom_job_params.cipher_mode == TEST_CBC) &&
+                    ((custom_job_params.hash_alg == TEST_SHA1_HMAC) ||
+                     (custom_job_params.hash_alg == TEST_SHA_224_HMAC) ||
+                     (custom_job_params.hash_alg == TEST_SHA_256_HMAC) ||
+                     (custom_job_params.hash_alg == TEST_SHA_384_HMAC) ||
+                     (custom_job_params.hash_alg == TEST_SHA_512_HMAC) ||
+                     (custom_job_params.hash_alg == TEST_MD5)))
+                        sha_size_incr = 24;
+                else
+                        sha_size_incr = 0;
+        }
+
         fprintf(stderr,
                 "Authentication size = cipher size + %u\n"
                 "Tool version: %s\n"
-- 
GitLab


From 61490ba6f65c7e5efa172c2a41bb62c92102ff55 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Mon, 7 Nov 2022 16:35:55 +0000
Subject: [PATCH 004/332] avx512: [ZUC] Use memmove instead of memcpy

Use memmove instead of memcpy to remove
cppcheck warning on potential overlapping write
(which should not happen).
---
 lib/avx512_t1/zuc_top_avx512.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/avx512_t1/zuc_top_avx512.c b/lib/avx512_t1/zuc_top_avx512.c
index eb0e1f36..da6beaac 100644
--- a/lib/avx512_t1/zuc_top_avx512.c
+++ b/lib/avx512_t1/zuc_top_avx512.c
@@ -606,7 +606,7 @@ void _zuc_eia3_1_buffer_avx512(const void *pKey,
                 asm_Eia3Round64BAVX512(&T, &keyStream[0], pIn8);
                 /* Copy the last keystream generated
                  * to the first 64 bytes */
-                memcpy(&keyStream[0], &keyStream[16], 64);
+                memmove(&keyStream[0], &keyStream[16], 64);
                 pIn8 = &pIn8[ZUC_KEYSTR_LEN];
         }
 
@@ -715,7 +715,7 @@ void _zuc_eia3_16_buffer_avx512(const void * const pKey[NUM_AVX512_BUFS],
                  * to be in contiguous memory
                  */
                 for (j = 0; j < 8; j++)
-                        memcpy(keyStr32 + j*4,
+                        memmove(keyStr32 + j*4,
                                &keyStr[get_start_key_addr(i) + j*16], 16);
 
                 /* If remaining bits are more than 56 bytes, we need to generate
@@ -756,7 +756,7 @@ void _zuc_eia3_16_buffer_avx512(const void * const pKey[NUM_AVX512_BUFS],
                         asm_Eia3Round64BAVX512(&T[i], &keyStr32[0], pIn8[i]);
                         /* Copy the last keystream generated
                          * to the first 64 bytes */
-                        memcpy(keyStr32, &keyStr32[16], 64);
+                        memmove(keyStr32, &keyStr32[16], 64);
                         pIn8[i] = &pIn8[i][ZUC_KEYSTR_LEN];
                 }
 
-- 
GitLab


From ea5e82c7886ebdc6aa76c197731b612875a8d9cc Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Mon, 7 Nov 2022 16:45:03 +0000
Subject: [PATCH 005/332] avx512: [ZUC] removed unused variables

---
 lib/no-aesni/zuc_top_sse_no_aesni.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/lib/no-aesni/zuc_top_sse_no_aesni.c b/lib/no-aesni/zuc_top_sse_no_aesni.c
index 6e102811..d0f646f6 100644
--- a/lib/no-aesni/zuc_top_sse_no_aesni.c
+++ b/lib/no-aesni/zuc_top_sse_no_aesni.c
@@ -853,9 +853,6 @@ zuc_eia3_4_buffer_job_sse_no_aesni(const void * const pKey[NUM_SSE_BUFS],
                 if (job_in_lane[i] == NULL)
                         continue;
 
-                const uint32_t N = lengthInBits[i] + (2 * ZUC_WORD_BITS);
-                uint32_t L = ((N + 31) / ZUC_WORD_BITS) -
-                             numKeyStr*(keyStreamLengthInBits / 32);
                 uint32_t remainBits = lengthInBits[i] -
                                       numKeyStr*keyStreamLengthInBits;
                 uint32_t *keyStr32 = (uint32_t *) keyStr[i];
@@ -887,7 +884,6 @@ zuc_eia3_4_buffer_job_sse_no_aesni(const void * const pKey[NUM_SSE_BUFS],
 
                 while (remainBits >= keyStreamLengthInBits) {
                         remainBits -= keyStreamLengthInBits;
-                        L -= (keyStreamLengthInBits / 32);
 
                         /* Generate the next key stream 8 bytes or 16 bytes */
                         if (!remainBits)
-- 
GitLab


From 829b3fa7675f55b369e16cf9b6abc13db36988e4 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 8 Nov 2022 14:57:02 +0000
Subject: [PATCH 006/332] build: [cppcheck] update for cppcheck target in the
 Makefiles

- lib, perf, test and test/wycheproof Makefiles have a cppcheck target each
- bughunt target added to all Makefiles
---
 .gitignore               |  2 ++
 Makefile                 | 14 +++++++++++---
 lib/Makefile             | 16 ++++++++++++++++
 perf/Makefile            | 17 +++++++++++++++++
 test/Makefile            | 16 ++++++++++++++++
 test/wycheproof/Makefile | 16 ++++++++++++++++
 6 files changed, 78 insertions(+), 3 deletions(-)

diff --git a/.gitignore b/.gitignore
index 24e1c5d1..b6cfdd2a 100644
--- a/.gitignore
+++ b/.gitignore
@@ -19,3 +19,5 @@ TAGS
 acvp_app
 test/wycheproof/wycheproof
 !wycheproof.c
+.cppcheck
+.bughunt
diff --git a/Makefile b/Makefile
index ffd3c6fb..1286c6a4 100644
--- a/Makefile
+++ b/Makefile
@@ -83,7 +83,15 @@ spellcheck:
 	Makefile win_x64.mak ReleaseNotes.txt LICENSE $(CS_EXTRA_OPTS)
 
 # cppcheck analysis check
-CPPCHECK ?= cppcheck
-.PHONY: cppcheck
 cppcheck:
-	$(CPPCHECK) ./ --force --enable=all
+	$(MAKE) -C lib cppcheck
+	$(MAKE) -C test cppcheck
+	$(MAKE) -C test/wycheproof cppcheck
+	$(MAKE) -C perf cppcheck
+
+# cppcheck bughunt analysis check
+bughunt:
+	$(MAKE) -C lib bughunt
+	$(MAKE) -C test bughunt
+	$(MAKE) -C test/wycheproof bughunt
+	$(MAKE) -C perf bughunt
diff --git a/lib/Makefile b/lib/Makefile
index c592114d..55bdbb5f 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -1039,6 +1039,22 @@ SOURCES_STYLE := $(foreach infile,$(SOURCES),$(infile)_style_check)
 .PHONY: style
 style: $(SOURCES_STYLE)
 
+# cppcheck analysis check
+CPPCHECK ?= cppcheck
+CPPCHECK_OPTS ?= -I./include -I./
+CPPCHECK_FLAGS = -j $(shell getconf _NPROCESSORS_ONLN)
+CPPCHECK_FLAGS1 = --cppcheck-build-dir=.cppcheck $(CPPCHECK_FLAGS)
+CPPCHECK_FLAGS2 = --cppcheck-build-dir=.bughunt $(CPPCHECK_FLAGS)
+.PHONY: cppcheck
+cppcheck:
+	mkdir -p .cppcheck
+	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) ./
+
+.PHONY: bughunt
+bughunt:
+	mkdir -p .bughunt
+	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) ./
+
 # if target not clean or rinse then make dependencies
 ifneq ($(MAKECMDGOALS),clean)
 ifneq ($(MAKECMDGOALS),style)
diff --git a/perf/Makefile b/perf/Makefile
index f204e575..30fde162 100644
--- a/perf/Makefile
+++ b/perf/Makefile
@@ -128,3 +128,20 @@ style:
 UNSPECIFIED_INT,ARRAY_SIZE,BLOCK_COMMENT_STYLE,GLOBAL_INITIALISERS,\
 COMPLEX_MACRO,SPACING,STORAGE_CLASS,USE_FUNC,NEW_TYPEDEFS,VOLATILE,\
 CONSTANT_COMPARISON $(SOURCES_STYLE)
+
+# cppcheck analysis check
+CPPCHECK ?= cppcheck
+CPPCHECK_OPTS ?= -I../lib -I./
+CPPCHECK_FLAGS ?= -j $(shell getconf _NPROCESSORS_ONLN)
+CPPCHECK_FLAGS1 ?= --cppcheck-build-dir=.cppcheck $(CPPCHECK_FLAGS)
+CPPCHECK_FLAGS2 ?= --cppcheck-build-dir=.bughunt $(CPPCHECK_FLAGS)
+
+.PHONY: cppcheck
+cppcheck:
+	mkdir -p .cppcheck
+	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) ./
+
+.PHONY: bughunt
+bughunt:
+	mkdir -p .bughunt
+	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) ./
diff --git a/test/Makefile b/test/Makefile
index 72c0dc84..d69b0d91 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -205,6 +205,22 @@ SOURCES_STYLE := $(foreach infile,$(SOURCES_ALL),$(infile)_style_check)
 .PHONY: style
 style: $(SOURCES_STYLE)
 
+# cppcheck analysis check
+CPPCHECK ?= cppcheck
+CPPCHECK_OPTS ?= -I./ -I../lib
+CPPCHECK_FLAGS ?= -j $(shell getconf _NPROCESSORS_ONLN)
+CPPCHECK_FLAGS1 ?= --cppcheck-build-dir=.cppcheck $(CPPCHECK_FLAGS)
+CPPCHECK_FLAGS2 ?= --cppcheck-build-dir=.bughunt $(CPPCHECK_FLAGS)
+.PHONY: cppcheck
+cppcheck:
+	mkdir -p .cppcheck
+	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) ./
+
+.PHONY: bughunt
+bughunt:
+	mkdir -p .bughunt
+	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) ./
+
 # if target not clean or rinse then make dependencies
 ifneq ($(MAKECMDGOALS),clean)
 ifneq ($(MAKECMDGOALS),style)
diff --git a/test/wycheproof/Makefile b/test/wycheproof/Makefile
index faf051df..7e473f1f 100644
--- a/test/wycheproof/Makefile
+++ b/test/wycheproof/Makefile
@@ -119,6 +119,22 @@ SOURCES_STYLE := $(foreach infile,$(SOURCES_ALL),$(infile)_style_check)
 .PHONY: style
 style: $(SOURCES_STYLE)
 
+# cppcheck analysis check
+CPPCHECK ?= cppcheck
+CPPCHECK_OPTS ?= -I./ -I../../lib -I../
+CPPCHECK_FLAGS ?= -j $(shell getconf _NPROCESSORS_ONLN)
+CPPCHECK_FLAGS1 ?= --cppcheck-build-dir=.cppcheck $(CPPCHECK_FLAGS)
+CPPCHECK_FLAGS2 ?= --cppcheck-build-dir=.bughunt $(CPPCHECK_FLAGS)
+.PHONY: cppcheck
+cppcheck:
+	mkdir -p .cppcheck
+	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) ./
+
+.PHONY: bughunt
+bughunt:
+	mkdir -p .bughunt
+	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) ./
+
 # if target not clean or rinse then make dependencies
 ifneq ($(MAKECMDGOALS),clean)
 ifneq ($(MAKECMDGOALS),style)
-- 
GitLab


From 26725ae4e30160b8ff78290915cf9a5c365eb3d9 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 8 Nov 2022 15:01:57 +0000
Subject: [PATCH 007/332] lib: fixes for printf format string issues reported
 by cppcheck

---
 lib/include/kasumi_internal.h | 2 +-
 lib/include/snow3g_common.h   | 4 ++--
 2 files changed, 3 insertions(+), 3 deletions(-)

diff --git a/lib/include/kasumi_internal.h b/lib/include/kasumi_internal.h
index 7e9a0b7f..5a7653ea 100755
--- a/lib/include/kasumi_internal.h
+++ b/lib/include/kasumi_internal.h
@@ -1427,7 +1427,7 @@ kasumi_f8_n_buffer(const kasumi_key_sched_t *pKeySchedule, const uint64_t IV[],
 
         if (bufCount > 16) {
                 pOut[0] = NULL;
-                printf("dataCount too high (%d)\n", bufCount);
+                printf("dataCount too high (%u)\n", (unsigned) bufCount);
                 return;
         }
 
diff --git a/lib/include/snow3g_common.h b/lib/include/snow3g_common.h
index 11a30359..17ba402c 100644
--- a/lib/include/snow3g_common.h
+++ b/lib/include/snow3g_common.h
@@ -3261,7 +3261,7 @@ void SNOW3G_F8_N_BUFFER(const snow3g_key_schedule_t *pCtx,
 
         if (packetCount > NUM_PACKETS_16) {
                 pBufferOut[0] = NULL;
-                printf("packetCount too high (%d)\n", packetCount);
+                printf("packetCount too high (%u)\n", (unsigned) packetCount);
                 return;
         }
 
@@ -3465,7 +3465,7 @@ void SNOW3G_F8_N_BUFFER_MULTIKEY(const snow3g_key_schedule_t * const pCtx[],
 
         if (packetCount > NUM_PACKETS_16) {
                 pBufferOut[0] = NULL;
-                printf("packetCount too high (%d)\n", packetCount);
+                printf("packetCount too high (%u)\n", (unsigned) packetCount);
                 return;
         }
 
-- 
GitLab


From 0e105b76ff11351a63d4cdada5c75bc3ee154d29 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 10 Nov 2022 15:39:42 +0000
Subject: [PATCH 008/332] lib: [kasumi] fix variable scope issues and
 indentation

---
 lib/include/kasumi_internal.h | 130 ++++++++++++++++------------------
 1 file changed, 61 insertions(+), 69 deletions(-)

diff --git a/lib/include/kasumi_internal.h b/lib/include/kasumi_internal.h
index 5a7653ea..26b32ed5 100755
--- a/lib/include/kasumi_internal.h
+++ b/lib/include/kasumi_internal.h
@@ -307,27 +307,26 @@ typedef union SafeBuffer {
  ******************************************************************************/
 static void kasumi_1_block(const uint16_t *context, uint16_t *data)
 {
-    const uint16_t *end = context + KASUMI_KEY_SCHEDULE_SIZE;
-    uint16_t temp_l, temp_h;
-
-    /* 4 iterations odd/even */
-    do {
-        temp_l = data[3];
-        temp_h = data[2];
-        FLp1(context, temp_h, temp_l);
-        FOp1(context, temp_h, temp_l);
-        context += 8;
-        data[1] ^= temp_l;
-        data[0] ^= temp_h;
-
-        temp_h = data[1];
-        temp_l = data[0];
-        FOp1(context, temp_h, temp_l);
-        FLp1(context, temp_h, temp_l);
-        context += 8;
-        data[3] ^= temp_h;
-        data[2] ^= temp_l;
-    } while (context < end);
+        const uint16_t *end = context + KASUMI_KEY_SCHEDULE_SIZE;
+
+        /* 4 iterations odd/even */
+        do {
+                uint16_t temp_l = data[3], temp_h = data[2];
+
+                FLp1(context, temp_h, temp_l);
+                FOp1(context, temp_h, temp_l);
+                context += 8;
+                data[1] ^= temp_l;
+                data[0] ^= temp_h;
+
+                temp_h = data[1];
+                temp_l = data[0];
+                FOp1(context, temp_h, temp_l);
+                FLp1(context, temp_h, temp_l);
+                context += 8;
+                data[3] ^= temp_h;
+                data[2] ^= temp_l;
+        } while (context < end);
 }
 
 /**
@@ -344,38 +343,35 @@ static void kasumi_1_block(const uint16_t *context, uint16_t *data)
 static void
 kasumi_2_blocks(const uint16_t *context, uint16_t *data1, uint16_t *data2)
 {
-    const uint16_t *end = context + KASUMI_KEY_SCHEDULE_SIZE;
-    uint16_t temp1_l, temp1_h;
-    uint16_t temp2_l, temp2_h;
-
-    /* 4 iterations odd/even , with fine grain interleave */
-    do {
-        /* even */
-        temp1_l = data1[3];
-        temp1_h = data1[2];
-        temp2_l = data2[3];
-        temp2_h = data2[2];
-        FLp2(context, temp1_h, temp1_l, temp2_h, temp2_l);
-        FOp2(context, temp1_h, temp1_l, temp2_h, temp2_l);
-        context += 8;
-        data1[1] ^= temp1_l;
-        data1[0] ^= temp1_h;
-        data2[1] ^= temp2_l;
-        data2[0] ^= temp2_h;
-
-        /* odd */
-        temp1_h = data1[1];
-        temp1_l = data1[0];
-        temp2_h = data2[1];
-        temp2_l = data2[0];
-        FOp2(context, temp1_h, temp1_l, temp2_h, temp2_l);
-        FLp2(context, temp1_h, temp1_l, temp2_h, temp2_l);
-        context += 8;
-        data1[3] ^= temp1_h;
-        data1[2] ^= temp1_l;
-        data2[3] ^= temp2_h;
-        data2[2] ^= temp2_l;
-    } while (context < end);
+        const uint16_t *end = context + KASUMI_KEY_SCHEDULE_SIZE;
+
+        /* 4 iterations odd/even , with fine grain interleave */
+        do {
+                /* even */
+                uint16_t temp1_l = data1[3], temp1_h = data1[2];
+                uint16_t temp2_l = data2[3], temp2_h = data2[2];
+
+                FLp2(context, temp1_h, temp1_l, temp2_h, temp2_l);
+                FOp2(context, temp1_h, temp1_l, temp2_h, temp2_l);
+                context += 8;
+                data1[1] ^= temp1_l;
+                data1[0] ^= temp1_h;
+                data2[1] ^= temp2_l;
+                data2[0] ^= temp2_h;
+
+                /* odd */
+                temp1_h = data1[1];
+                temp1_l = data1[0];
+                temp2_h = data2[1];
+                temp2_l = data2[0];
+                FOp2(context, temp1_h, temp1_l, temp2_h, temp2_l);
+                FLp2(context, temp1_h, temp1_l, temp2_h, temp2_l);
+                context += 8;
+                data1[3] ^= temp1_h;
+                data1[2] ^= temp1_l;
+                data2[3] ^= temp2_h;
+                data2[2] ^= temp2_l;
+        } while (context < end);
 }
 
 
@@ -397,18 +393,13 @@ kasumi_3_blocks(const uint16_t *context, uint16_t *data1,
 {
         /* Case when the conmpiler is able to interleave efficiently */
         const uint16_t *end = context + KASUMI_KEY_SCHEDULE_SIZE;
-        uint16_t temp1_l, temp1_h;
-        uint16_t temp2_l, temp2_h;
-        uint16_t temp3_l, temp3_h;
 
         /* 4 iterations odd/even , with fine grain interleave */
         do {
-                temp1_l = data1[3];
-                temp1_h = data1[2];
-                temp2_l = data2[3];
-                temp2_h = data2[2];
-                temp3_l = data3[3];
-                temp3_h = data3[2];
+                uint16_t temp1_l = data1[3], temp1_h = data1[2];
+                uint16_t temp2_l = data2[3], temp2_h = data2[2];
+                uint16_t temp3_l = data3[3], temp3_h = data3[2];
+
                 FLp3(context, temp1_h, temp1_l, temp2_h, temp2_l, temp3_h,
                      temp3_l);
                 FOp3(context, temp1_h, temp1_l, temp2_h, temp2_l, temp3_h,
@@ -454,9 +445,9 @@ kasumi_3_blocks(const uint16_t *context, uint16_t *data1,
 static void
 kasumi_4_blocks(const uint16_t *context, uint16_t **ppData)
 {
-    /* Case when the conmpiler is unable to interleave efficiently */
-    kasumi_2_blocks (context, ppData[0], ppData[1]);
-    kasumi_2_blocks (context, ppData[2], ppData[3]);
+        /* Case when the conmpiler is unable to interleave efficiently */
+        kasumi_2_blocks (context, ppData[0], ppData[1]);
+        kasumi_2_blocks (context, ppData[2], ppData[3]);
 }
 
 /**
@@ -472,8 +463,8 @@ kasumi_4_blocks(const uint16_t *context, uint16_t **ppData)
 static void
 kasumi_8_blocks(const uint16_t *context, uint16_t **ppData)
 {
-    kasumi_4_blocks (context, &ppData[0]);
-    kasumi_4_blocks (context, &ppData[4]);
+        kasumi_4_blocks (context, &ppData[0]);
+        kasumi_4_blocks (context, &ppData[4]);
 }
 
 /******************************************************************************
@@ -1442,7 +1433,7 @@ kasumi_f8_n_buffer(const kasumi_key_sched_t *pKeySchedule, const uint64_t IV[],
         uint32_t blkcnt = 0;
         uint32_t len = 0;
         uint32_t packet_idx, inner_idx, same_size_blocks;
-        int sortNeeded = 0, tempLen = 0;
+        int sortNeeded = 0;
         SafeBuf safeInBuf = {0};
 
         memcpy((void *)dataLen, lengths, dataCount * sizeof(uint32_t));
@@ -1491,7 +1482,8 @@ kasumi_f8_n_buffer(const kasumi_key_sched_t *pKeySchedule, const uint64_t IV[],
                                         srctempbuff = pDataIn[packet_idx];
                                         dsttempbuff = pDataOut[packet_idx];
                                         tempSort = temp[packet_idx];
-                                        tempLen = dataLen[packet_idx];
+
+                                        const int tempLen = dataLen[packet_idx];
 
                                         pDataIn[packet_idx] =
                                             pDataIn[inner_idx];
-- 
GitLab


From 4d3f06818db66dd68e303479cce8bae1986a208a Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 10 Nov 2022 15:41:01 +0000
Subject: [PATCH 009/332] lib: [snow3g] fix variable scope issues

---
 lib/include/snow3g_common.h | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/lib/include/snow3g_common.h b/lib/include/snow3g_common.h
index 17ba402c..59aaabdb 100644
--- a/lib/include/snow3g_common.h
+++ b/lib/include/snow3g_common.h
@@ -3266,7 +3266,7 @@ void SNOW3G_F8_N_BUFFER(const snow3g_key_schedule_t *pCtx,
         }
 
         uint32_t packet_index, inner_index, pktCnt = packetCount;
-        int sortNeeded = 0, tempLen = 0;
+        int sortNeeded = 0;
         uint8_t *srctempbuff;
         uint8_t *dsttempbuff;
         uint8_t *ivtempbuff;
@@ -3316,7 +3316,9 @@ void SNOW3G_F8_N_BUFFER(const snow3g_key_schedule_t *pCtx,
                                         srctempbuff = pSrcBuf[packet_index];
                                         dsttempbuff = pDstBuf[packet_index];
                                         ivtempbuff = pIV[packet_index];
-                                        tempLen = lensBuf[packet_index];
+
+                                        const int tempLen =
+                                                lensBuf[packet_index];
 
                                         pSrcBuf[packet_index] =
                                                 pSrcBuf[inner_index];
@@ -3470,7 +3472,7 @@ void SNOW3G_F8_N_BUFFER_MULTIKEY(const snow3g_key_schedule_t * const pCtx[],
         }
 
         uint32_t packet_index, inner_index, pktCnt = packetCount;
-        int sortNeeded = 0, tempLen = 0;
+        int sortNeeded = 0;
         uint8_t *srctempbuff;
         uint8_t *dsttempbuff;
         uint8_t *ivtempbuff;
@@ -3519,7 +3521,10 @@ void SNOW3G_F8_N_BUFFER_MULTIKEY(const snow3g_key_schedule_t * const pCtx[],
                                         srctempbuff = pSrcBuf[packet_index];
                                         dsttempbuff = pDstBuf[packet_index];
                                         ivtempbuff = pIV[packet_index];
-                                        tempLen = lensBuf[packet_index];
+
+                                        const int tempLen =
+                                                lensBuf[packet_index];
+
                                         tempCtx = pCtxBuf[packet_index];
 
                                         pSrcBuf[packet_index] =
-- 
GitLab


From 7d6dafd40b825a7ede1f25020365e42bc9282938 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 10 Nov 2022 15:43:05 +0000
Subject: [PATCH 010/332] lib: [snow3g] fix variable scope issue and
 restructure the code to avoid store to load

---
 lib/include/snow3g_common.h | 152 ++++++++++++++++++++++++------------
 1 file changed, 101 insertions(+), 51 deletions(-)

diff --git a/lib/include/snow3g_common.h b/lib/include/snow3g_common.h
index 59aaabdb..f50ce1ee 100644
--- a/lib/include/snow3g_common.h
+++ b/lib/include/snow3g_common.h
@@ -2008,66 +2008,116 @@ snow3gStateInitialize_8_multiKey(snow3gKeyState8_t *pCtx,
                                  const snow3g_key_schedule_t * const KeySched[],
                                  const void * const pIV[])
 {
-        DECLARE_ALIGNED(uint32_t k[8], 32);
-        DECLARE_ALIGNED(uint32_t l[8], 32);
-        __m256i *K = (__m256i *)k;
-        __m256i *L = (__m256i *)l;
-
-        int i, j;
-        __m256i mR, mS, mT, mU, T0, T1;
-
-        /* Initialize the LFSR table from constants, Keys, and IV */
-
-        /* Load complete 256b IV into register (SSE2)*/
         static const __m256i swapMask = {
                 0x0405060700010203ULL, 0x0c0d0e0f08090a0bULL,
                 0x0405060700010203ULL, 0x0c0d0e0f08090a0bULL
         };
-        mR = load_2xm128i_into_m256i(pIV[4], pIV[0]);
-        mS = load_2xm128i_into_m256i(pIV[5], pIV[1]);
-        mT = load_2xm128i_into_m256i(pIV[6], pIV[2]);
-        mU = load_2xm128i_into_m256i(pIV[7], pIV[3]);
+        static const __m256i ALLFS = {
+                0xffffffffffffffffULL, 0xffffffffffffffffULL,
+                0xffffffffffffffffULL, 0xffffffffffffffffULL
+        };
+        __m256i ksR, ksS, ksT, ksU;
+        __m256i ivR, ivS, ivT, ivU;
+        __m256i T0, T1;
+        int i;
 
-        /* initialize the array block (SSE4) */
-        for (i = 0; i < 4; i++) {
-                for (j = 0; j < 8; j++) {
-                        k[j] = KeySched[j]->k[i];
-                        l[j] = ~k[j];
-                }
+        /*
+         * Initialize the LFSR table from constants, Keys, and IV
+         * - First initialize LFSR with the key schedules
+         */
 
-                pCtx->LFSR_X[i + 4] = *K;
-                pCtx->LFSR_X[i + 12] = *K;
-                pCtx->LFSR_X[i + 0] = *L;
-                pCtx->LFSR_X[i + 8] = *L;
-        }
+        /* Transform 8 x (4 x 32-bits) into 4 x (8 x 32-bits) */
 
-        /* Update the schedule structure with IVs */
-        /* Store the 4 IVs in LFSR by a column/row matrix swap
-         * after endianness correction */
+        /* Load complete 256b keyschedule into registers */
+        ksR = load_2xm128i_into_m256i(KeySched[4]->k, KeySched[0]->k);
+        ksS = load_2xm128i_into_m256i(KeySched[5]->k, KeySched[1]->k);
+        ksT = load_2xm128i_into_m256i(KeySched[6]->k, KeySched[2]->k);
+        ksU = load_2xm128i_into_m256i(KeySched[7]->k, KeySched[3]->k);
 
-        /* endianness swap */
-        mR = _mm256_shuffle_epi8(mR, swapMask);
-        mS = _mm256_shuffle_epi8(mS, swapMask);
-        mT = _mm256_shuffle_epi8(mT, swapMask);
-        mU = _mm256_shuffle_epi8(mU, swapMask);
+        /*
+         * Ln -> lane index 'n'
+         * Wn -> 32-bit word index 'n'
+         *
+         * ksR = L4W3L4W2L4W1L4W0|L0W3L0W2L0W1L0W0
+         * ksS = L5W3L5W2L5W1L5W0|L1W3L1W2L1W1L1W0
+         * ksT = L6W3L6W2L6W1L6W0|L2W3L2W2L2W1L2W0
+         * ksU = L7W3L7W2L7W1L7W0|L3W3L3W2L3W1L3W0
+         */
 
-        /* row/column dword inversion */
-        T0 = _mm256_unpacklo_epi32(mR, mS);
-        mR = _mm256_unpackhi_epi32(mR, mS);
-        T1 = _mm256_unpacklo_epi32(mT, mU);
-        mT = _mm256_unpackhi_epi32(mT, mU);
+        T0 = _mm256_unpacklo_epi32(ksR, ksS);
+        ksR = _mm256_unpackhi_epi32(ksR, ksS);
+        T1 = _mm256_unpacklo_epi32(ksT, ksU);
+        ksT = _mm256_unpackhi_epi32(ksT, ksU);
 
-        /* row/column qword inversion  */
-        mU = _mm256_unpackhi_epi64(mR, mT);
-        mT = _mm256_unpacklo_epi64(mR, mT);
-        mS = _mm256_unpackhi_epi64(T0, T1);
-        mR = _mm256_unpacklo_epi64(T0, T1);
+        /*
+         * T0  = L5W1L4W1L5W0L4W0|L1W1L0W1L1W0L0W0
+         * ksR = L5W3L4W3L5W2L4W2|L1W3L0W3L1W2L0W2
+         * T1  = L7W1L6W1L7W0L6W0|L3W1L2W1L3W0L2W0
+         * ksT = L7W3L6W3L7W2L6W2|L3W3L2W3L3W2L2W2
+         */
+
+        ksU = _mm256_unpackhi_epi64(ksR, ksT);
+        ksT = _mm256_unpacklo_epi64(ksR, ksT);
+        ksS = _mm256_unpackhi_epi64(T0, T1);
+        ksR = _mm256_unpacklo_epi64(T0, T1);
+
+        /*
+         * ksU = L7W3L6W3L5W3L4W3|L3W3L2W3L1W3L0W3
+         * ksT = L7W2L6W2L5W2L4W2|L3W2L2W2L1W2L0W2
+         * ksS = L7W1L6W1L5W1L4W1|L3W1L2W1L1W1L0W1
+         * ksR = L7W0L6W0L5W0L4W0|L3W0L2W0L1W0L0W0
+         */
+
+        pCtx->LFSR_X[4 + 0] = ksR; /* LFSR[12] set later */
+        pCtx->LFSR_X[4 + 1] = pCtx->LFSR_X[12 + 1] = ksS;
+        pCtx->LFSR_X[4 + 2] = pCtx->LFSR_X[12 + 2] = ksT;
+        pCtx->LFSR_X[4 + 3] = ksU; /* LFSR[15] set later */
+
+        /* keep ksR & ksU and ~ksS & ~ksT for later */
+        ksS = _mm256_xor_si256(ksS, ALLFS);
+        ksT = _mm256_xor_si256(ksT, ALLFS);
+
+        pCtx->LFSR_X[0 + 0] =
+                pCtx->LFSR_X[8 + 0] = _mm256_xor_si256(ksR, ALLFS);
+        pCtx->LFSR_X[0 + 1] = ksS; /* LFSR[9] set later */
+        pCtx->LFSR_X[0 + 2] = ksT; /* LFSR[10] set later */
+        pCtx->LFSR_X[0 + 3] =
+                pCtx->LFSR_X[8 + 3] = _mm256_xor_si256(ksU, ALLFS);
+
+        /*
+         * Update LFSR structure with IVs
+         * - Same transform as above, 8 x (4 x 32-bits) into 4 x (8 x 32-bits)
+         */
+
+        /* Load complete 256b IV into register */
+        ivR = load_2xm128i_into_m256i(pIV[4], pIV[0]);
+        ivS = load_2xm128i_into_m256i(pIV[5], pIV[1]);
+        ivT = load_2xm128i_into_m256i(pIV[6], pIV[2]);
+        ivU = load_2xm128i_into_m256i(pIV[7], pIV[3]);
+
+        /* endianness swap of the double words */
+        ivR = _mm256_shuffle_epi8(ivR, swapMask);
+        ivS = _mm256_shuffle_epi8(ivS, swapMask);
+        ivT = _mm256_shuffle_epi8(ivT, swapMask);
+        ivU = _mm256_shuffle_epi8(ivU, swapMask);
+
+        /* transpose */
+        T0 = _mm256_unpacklo_epi32(ivR, ivS);
+        ivR = _mm256_unpackhi_epi32(ivR, ivS);
+        T1 = _mm256_unpacklo_epi32(ivT, ivU);
+        ivT = _mm256_unpackhi_epi32(ivT, ivU);
+
+        ivU = _mm256_unpackhi_epi64(ivR, ivT);
+        ivT = _mm256_unpacklo_epi64(ivR, ivT);
+        ivS = _mm256_unpackhi_epi64(T0, T1);
+        ivR = _mm256_unpacklo_epi64(T0, T1);
+
+        /* IV ^ LFSR  */
+        pCtx->LFSR_X[15] = _mm256_xor_si256(ksU, ivU); /* ksU ^ ivU */
+        pCtx->LFSR_X[12] = _mm256_xor_si256(ksR, ivT); /* ksR ^ ivT */
+        pCtx->LFSR_X[10] = _mm256_xor_si256(ksT, ivS); /* ~ksT ^ ivS */
+        pCtx->LFSR_X[9] = _mm256_xor_si256(ksS, ivR);  /* ~ksS ^ ivR */
 
-        /*IV ^ LFSR  */
-        pCtx->LFSR_X[15] = _mm256_xor_si256(pCtx->LFSR_X[15], mU);
-        pCtx->LFSR_X[12] = _mm256_xor_si256(pCtx->LFSR_X[12], mT);
-        pCtx->LFSR_X[10] = _mm256_xor_si256(pCtx->LFSR_X[10], mS);
-        pCtx->LFSR_X[9] = _mm256_xor_si256(pCtx->LFSR_X[9], mR);
         pCtx->iLFSR_X = 0;
 
         /* FSM initialization  */
@@ -2077,12 +2127,12 @@ snow3gStateInitialize_8_multiKey(snow3gKeyState8_t *pCtx,
 
         /* Initialisation rounds */
         for (i = 0; i < 32; i++) {
-                mS = ClockFSM_8(pCtx);
+                T0 = ClockFSM_8(pCtx);
                 ClockLFSR_8(pCtx);
 
                 const uint32_t idx = (pCtx->iLFSR_X + 15) & 15;
 
-                pCtx->LFSR_X[idx] = _mm256_xor_si256(pCtx->LFSR_X[idx], mS);
+                pCtx->LFSR_X[idx] = _mm256_xor_si256(pCtx->LFSR_X[idx], T0);
         }
 }
 
-- 
GitLab


From 349e08dd322452c0b0b006c9f487df175954f806 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 10 Nov 2022 16:54:20 +0000
Subject: [PATCH 011/332] lib: [snow3g] fix potential integer overflow issue

---
 lib/x86_64/snow3g_iv.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/lib/x86_64/snow3g_iv.c b/lib/x86_64/snow3g_iv.c
index e2118ab3..0db18bf5 100644
--- a/lib/x86_64/snow3g_iv.c
+++ b/lib/x86_64/snow3g_iv.c
@@ -82,10 +82,12 @@ snow3g_f9_iv_gen(const uint32_t count, const uint32_t fresh,
          * and reversed to generate the IV in Big Endian format
          */
         /* IV[3] = FRESH ^ (DIRECTION[0] << 17) */
-        iv32[3] = bswap4(fresh ^ (dir << 15));
+        const uint32_t dir_b15 = dir ? (1UL << 15) : 0;
+        iv32[3] = bswap4(fresh ^ dir_b15);
 
         /* IV[2] = DIRECTION[0] ^ COUNT[0-31] */
-        iv32[2] = bswap4(count ^ (dir << 31));
+        const uint32_t dir_b31 = dir ? (1UL << 31) : 0;
+        iv32[2] = bswap4(count ^ dir_b31);
 
         /* IV[1] = FRESH */
         iv32[1] = bswap4(fresh);
-- 
GitLab


From 78bbde66792ecf69ac979bf2fc5ac0417fac9790 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 10 Nov 2022 17:17:35 +0000
Subject: [PATCH 012/332] test: address various issues reported by cppcheck

---
 test/api_test.c        | 10 +++++-----
 test/direct_api_test.c |  4 ++--
 test/do_test.h         |  3 ++-
 test/gcm_test.c        | 15 ++++++++-------
 test/kasumi_test.c     |  7 ++++---
 test/snow3g_test.c     | 10 ++++++----
 test/zuc_test.c        | 10 ++++++----
 7 files changed, 33 insertions(+), 26 deletions(-)

diff --git a/test/api_test.c b/test/api_test.c
index 434883bb..ab9d52a9 100644
--- a/test/api_test.c
+++ b/test/api_test.c
@@ -2095,7 +2095,7 @@ test_job_invalid_misc_args(struct IMB_MGR *mb_mgr)
 {
         IMB_HASH_ALG hash;
         IMB_CIPHER_DIRECTION dir;
-        IMB_CIPHER_MODE cipher = IMB_CIPHER_NULL;
+        IMB_CIPHER_MODE cipher;
         IMB_CHAIN_ORDER order;
         struct IMB_JOB template_job;
         struct chacha20_poly1305_context_data chacha_ctx;
@@ -2242,8 +2242,8 @@ submit_reset_check_job(struct IMB_MGR *mb_mgr,
 
         if (next_job->status != IMB_STATUS_COMPLETED) {
                 printf("Returned job's status is not completed\n");
-                printf("cipher = %u\n", cipher);
-                printf("imb errno = %u (%s)\n",
+                printf("cipher = %d\n", cipher);
+                printf("imb errno = %d (%s)\n",
                        mb_mgr->imb_errno,
                        imb_get_strerror(mb_mgr->imb_errno));
                 exit(0);
@@ -2327,7 +2327,7 @@ test_reset_api(struct IMB_MGR *mb_mgr)
         }
 
         /* Test AEAD algorithms */
-        IMB_HASH_ALG aead_hash_algos[] = {
+        const IMB_HASH_ALG aead_hash_algos[] = {
                 IMB_AUTH_AES_GMAC,
                 IMB_AUTH_AES_CCM,
                 IMB_AUTH_CHACHA20_POLY1305,
@@ -2335,7 +2335,7 @@ test_reset_api(struct IMB_MGR *mb_mgr)
                 IMB_AUTH_DOCSIS_CRC32,
                 IMB_AUTH_SNOW_V_AEAD
         };
-        IMB_CIPHER_MODE aead_cipher_algos[] = {
+        const IMB_CIPHER_MODE aead_cipher_algos[] = {
                 IMB_CIPHER_GCM,
                 IMB_CIPHER_CCM,
                 IMB_CIPHER_CHACHA20_POLY1305,
diff --git a/test/direct_api_test.c b/test/direct_api_test.c
index 00f47191..441693a2 100644
--- a/test/direct_api_test.c
+++ b/test/direct_api_test.c
@@ -865,7 +865,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
         }
         printf(".");
 
-        if (IMB_KASUMI_KEY_SCHED_SIZE(mgr) <= 0) {
+        if (IMB_KASUMI_KEY_SCHED_SIZE(mgr) == 0) {
                 printf("%s: IMB_KASUMI_KEY_SCHED_SIZE, invalid "
                        "param test failed!\n", __func__);
                 return 1;
@@ -1047,7 +1047,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
         }
         printf(".");
 
-        if (IMB_SNOW3G_KEY_SCHED_SIZE(mgr) <= 0) {
+        if (IMB_SNOW3G_KEY_SCHED_SIZE(mgr) == 0) {
                 printf("%s: IMB_SNOW3G_KEY_SCHED_SIZE, invalid "
                        "param test failed!\n", __func__);
                 return 1;
diff --git a/test/do_test.h b/test/do_test.h
index f00c0df1..1420ec92 100644
--- a/test/do_test.h
+++ b/test/do_test.h
@@ -161,7 +161,8 @@ known_answer_test(IMB_MGR *mb_mgr)
         job->src = cipherCBC128;
         job->cipher_start_src_offset_in_bytes = 0;
         job->msg_len_to_cipher_in_bytes = NUMBYTES;
-        job->hash_start_src_offset_in_bytes = text - job->src;
+        job->hash_start_src_offset_in_bytes =
+                (uintptr_t) text - (uintptr_t) job->src;
         job->msg_len_to_hash_in_bytes = TEXTSIZE;
         job->u.HMAC._hashed_auth_key_xor_ipad = ipad_hash;
         job->u.HMAC._hashed_auth_key_xor_opad = opad_hash;
diff --git a/test/gcm_test.c b/test/gcm_test.c
index b89c16c6..13052a75 100644
--- a/test/gcm_test.c
+++ b/test/gcm_test.c
@@ -1637,10 +1637,10 @@ aes_gcm_burst(IMB_MGR *mb_mgr,
               const IMB_CIPHER_DIRECTION cipher_dir,
               const struct gcm_key_data *key,
               const uint64_t key_len,
-              uint8_t **out, const uint8_t *in, const uint64_t len,
+              uint8_t ** const out, const uint8_t *in, const uint64_t len,
               const uint8_t *iv, const uint64_t iv_len, const uint8_t *aad,
-              const uint64_t aad_len, uint8_t **auth_tag,
-              const uint64_t auth_tag_len, struct gcm_context_data **ctx,
+              const uint64_t aad_len, uint8_t ** const auth_tag,
+              const uint64_t auth_tag_len, struct gcm_context_data ** const ctx,
               const IMB_CIPHER_MODE cipher_mode, const IMB_SGL_STATE sgl_state,
               const uint32_t num_jobs)
 {
@@ -2556,9 +2556,7 @@ test_gmac_vector(const struct gcm_ctr_vector *vector,
         const uint64_t iv_len = vector->IVlen;
         const uint64_t nb_segs = (vector->Plen / seg_size);
         const uint64_t last_partial_seg = (vector->Plen % seg_size);
-        uint8_t in_seg[MAX_SEG_SIZE];
         const uint8_t *in_ptr = vector->P;
-        uint32_t i;
         uint8_t T_test[16];
         struct test_suite_context *ts = ts128;
 
@@ -2569,10 +2567,13 @@ test_gmac_vector(const struct gcm_ctr_vector *vector,
                 ts = ts256;
 
         memset(&key, 0, sizeof(struct gcm_key_data));
-        if (job_api)
+        if (job_api) {
                 aes_gmac_job(p_gcm_mgr, vector->K, &key, vector->Klen, in_ptr,
                              seg_size, iv, iv_len, T_test, vector->Tlen);
-        else {
+        } else {
+                uint8_t in_seg[MAX_SEG_SIZE];
+                uint32_t i;
+
                 switch (vector->Klen) {
                 case IMB_KEY_128_BYTES:
                         IMB_AES128_GCM_PRE(p_gcm_mgr, vector->K, &key);
diff --git a/test/kasumi_test.c b/test/kasumi_test.c
index bf645e79..39402c1f 100644
--- a/test/kasumi_test.c
+++ b/test/kasumi_test.c
@@ -89,9 +89,10 @@ struct kasumi_test_case kasumi_f9_func_tab[] = {
 
 static int
 submit_kasumi_f8_jobs(struct IMB_MGR *mb_mgr, kasumi_key_sched_t **keys,
-                      uint64_t **ivs, uint8_t **src, uint8_t **dst,
-                      const uint32_t *bitlens, const uint32_t *bit_offsets,
-                      int dir, const unsigned int num_jobs)
+                      uint64_t **ivs, uint8_t ** const src,
+                      uint8_t ** const dst, const uint32_t *bitlens,
+                      const uint32_t *bit_offsets, const int dir,
+                      const unsigned int num_jobs)
 {
         unsigned int i;
         unsigned int jobs_rx = 0;
diff --git a/test/snow3g_test.c b/test/snow3g_test.c
index 1b8b920d..f32f9df7 100644
--- a/test/snow3g_test.c
+++ b/test/snow3g_test.c
@@ -126,7 +126,8 @@ struct {
  * @param ptr [IN] - pointer to beginning of buffer.
  * @param len [IN] - length of buffer.
  ******************************************************************************/
-static inline void snow3g_hexdump(const char *message, uint8_t *ptr, int len)
+static inline
+void snow3g_hexdump(const char *message, const uint8_t *ptr, int len)
 {
         int ctr;
 
@@ -141,9 +142,10 @@ static inline void snow3g_hexdump(const char *message, uint8_t *ptr, int len)
 }
 
 static inline int
-submit_uea2_jobs(struct IMB_MGR *mb_mgr, uint8_t **keys, uint8_t **ivs,
-                 uint8_t **src, uint8_t **dst, const uint32_t *bitlens,
-                 const uint32_t *bit_offsets, int dir,
+submit_uea2_jobs(struct IMB_MGR *mb_mgr, uint8_t ** const keys,
+                 uint8_t ** const ivs, uint8_t ** const src,
+                 uint8_t ** const dst, const uint32_t *bitlens,
+                 const uint32_t *bit_offsets, const int dir,
                  const unsigned int num_jobs)
 {
         IMB_JOB *job;
diff --git a/test/zuc_test.c b/test/zuc_test.c
index 1b150da6..0823a547 100644
--- a/test/zuc_test.c
+++ b/test/zuc_test.c
@@ -350,8 +350,9 @@ exit_zuc_test:
 }
 
 static inline int
-submit_eea3_jobs(struct IMB_MGR *mb_mgr, uint8_t **keys, uint8_t **ivs,
-                 uint8_t **src, uint8_t **dst, const uint32_t *lens,
+submit_eea3_jobs(struct IMB_MGR *mb_mgr, uint8_t ** const keys,
+                 uint8_t ** const ivs, uint8_t ** const src,
+                 uint8_t ** const dst, const uint32_t *lens,
                  int dir, const unsigned int num_jobs,
                  const unsigned int key_len,
                  const unsigned int *iv_lens)
@@ -405,8 +406,9 @@ submit_eea3_jobs(struct IMB_MGR *mb_mgr, uint8_t **keys, uint8_t **ivs,
 }
 
 static inline int
-submit_eia3_jobs(struct IMB_MGR *mb_mgr, uint8_t **keys, uint8_t **iv,
-                 uint8_t **src, uint8_t **tags, const uint32_t *lens,
+submit_eia3_jobs(struct IMB_MGR *mb_mgr, uint8_t ** const keys,
+                 uint8_t ** const iv, uint8_t ** const src,
+                 uint8_t ** const tags, const uint32_t *lens,
                  const unsigned int num_jobs,
                  const unsigned int key_sz,
                  const unsigned int tag_sz,
-- 
GitLab


From fa3a989bf93eea358bde5392d4d834be9080223b Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 11 Nov 2022 12:45:06 +0000
Subject: [PATCH 013/332] perf: fixes for cppcheck reported issues

---
 perf/ipsec_perf.c | 12 ++++++------
 perf/msr.c        |  2 +-
 perf/msr.h        |  2 +-
 3 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index 02294595..22d43f90 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -994,15 +994,14 @@ static void CALLBACK timebox_callback(PVOID lpParam, BOOLEAN TimerFired)
 /* Return rdtsc to core cycle scale factor */
 static double get_tsc_to_core_scale(const int turbo)
 {
-        int i, num_loops = 1;
+        int i;
         /* use enough cycles for accurate measurement */
         const uint64_t expected_cycles = 1000000000;
-        uint64_t tsc_cycles;
+        uint64_t tsc_cycles = 0;
 
         /* if turbo enabled then run longer */
         /* to allow frequency to stabilize */
-        if (turbo)
-                num_loops = 8;
+        const int num_loops = turbo ? 8 : 1;
 
         for (i = 0; i < num_loops; i++)
                 tsc_cycles = measure_tsc(expected_cycles);
@@ -1746,7 +1745,6 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
         uint32_t aux;
         uint8_t gcm_key[32];
         uint8_t next_iv[IMB_AES_BLOCK_SIZE];
-        IMB_JOB jobs[MAX_BURST_SIZE];
         struct gcm_context_data gcm_ctx[MAX_BURST_SIZE];
         struct chacha20_poly1305_context_data cp_ctx[MAX_BURST_SIZE];
         struct IMB_SGL_IOV *sgl[MAX_BURST_SIZE] = {NULL};
@@ -2120,7 +2118,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
 
                         /* set all job params */
                         for (i = 0; i < n; i++) {
-                                IMB_JOB *job = jobs[i];
+                                job = jobs[i];
                                 *job = job_template;
 
                                 if (segment_size != 0)
@@ -2158,6 +2156,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
 
                 /* test cipher-only burst api */
         } else if (test_api == TEST_API_CIPHER_BURST) {
+                IMB_JOB jobs[MAX_BURST_SIZE];
                 IMB_JOB *jt = &job_template;
                 uint32_t num_jobs = num_iter;
                 uint32_t list_idx;
@@ -2222,6 +2221,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
 
                 /* test hash-only burst api */
         } else if (test_api == TEST_API_HASH_BURST) {
+                IMB_JOB jobs[MAX_BURST_SIZE];
                 IMB_JOB *jt = &job_template;
                 uint32_t num_jobs = num_iter;
                 uint32_t list_idx;
diff --git a/perf/msr.c b/perf/msr.c
index be4dfb4f..e546f7db 100644
--- a/perf/msr.c
+++ b/perf/msr.c
@@ -206,7 +206,7 @@ msr_file_open(const unsigned lcore)
 int
 msr_read(const unsigned lcore,
          const uint32_t reg,
-         uint64_t *value)
+         uint64_t * const value)
 {
         int ret = MACHINE_RETVAL_OK;
 #ifdef _WIN32
diff --git a/perf/msr.h b/perf/msr.h
index 6cc7c76f..5757352b 100644
--- a/perf/msr.h
+++ b/perf/msr.h
@@ -90,7 +90,7 @@ int machine_fini(void);
 int
 msr_read(const unsigned lcore,
          const uint32_t reg,
-         uint64_t *value);
+         uint64_t * const value);
 
 /**
  * @brief Executes WRMSR on \a lcore logical core
-- 
GitLab


From 535421fd7cced41823a240dcfaaa915a105a28ab Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 18 Nov 2022 09:54:56 +0000
Subject: [PATCH 014/332] test: [sha256/sha512] remove dead code from default
 switch

---
 test/hmac_sha256_sha512_test.c | 66 +++++++++++++++++++++-------------
 1 file changed, 42 insertions(+), 24 deletions(-)

diff --git a/test/hmac_sha256_sha512_test.c b/test/hmac_sha256_sha512_test.c
index b1d8c0d0..4223b5ae 100644
--- a/test/hmac_sha256_sha512_test.c
+++ b/test/hmac_sha256_sha512_test.c
@@ -841,6 +841,18 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
 		goto end2;
         }
 
+        switch (sha_type) {
+        case 224:
+        case 256:
+        case 384:
+        case 512:
+                break;
+        default:
+                fprintf(stderr, "Wrong SHA type selection 'SHA-%d'!\n",
+                        sha_type);
+                goto end2;
+        }
+
         switch (sha_type) {
         case 224:
                 digest_len = vec->hmac_sha224_len;
@@ -855,13 +867,10 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
                 block_size = IMB_SHA_384_BLOCK_SIZE;
                 break;
         case 512:
+        default:
                 digest_len = vec->hmac_sha512_len;
                 block_size = IMB_SHA_512_BLOCK_SIZE;
                 break;
-        default:
-                fprintf(stderr, "Wrong SHA type selection 'SHA-%d'!\n",
-                        sha_type);
-                goto end2;
         }
 
         memset(padding, -1, sizeof(padding));
@@ -899,13 +908,10 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
                         key_len = IMB_SHA384_DIGEST_SIZE_IN_BYTES;
                         break;
                 case 512:
+                default:
                         IMB_SHA512(mb_mgr, vec->key, vec->key_len, key);
                         key_len = IMB_SHA512_DIGEST_SIZE_IN_BYTES;
                         break;
-                default:
-                        fprintf(stderr, "Wrong SHA type selection 'SHA-%d'!\n",
-                                sha_type);
-                        goto end;
                 }
         }
 
@@ -1064,6 +1070,18 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
 		goto end2;
         }
 
+        switch (sha_type) {
+        case 224:
+        case 256:
+        case 384:
+        case 512:
+                break;
+        default:
+                fprintf(stderr, "Wrong SHA type selection 'SHA-%d'!\n",
+                        sha_type);
+                goto end2;
+        }
+
         switch (sha_type) {
         case 224:
                 digest_len = vec->hmac_sha224_len;
@@ -1078,13 +1096,10 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
                 block_size = IMB_SHA_384_BLOCK_SIZE;
                 break;
         case 512:
+        default:
                 digest_len = vec->hmac_sha512_len;
                 block_size = IMB_SHA_512_BLOCK_SIZE;
                 break;
-        default:
-                fprintf(stderr, "Wrong SHA type selection 'SHA-%d'!\n",
-                        sha_type);
-                goto end2;
         }
 
         memset(padding, -1, sizeof(padding));
@@ -1122,13 +1137,10 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
                         key_len = IMB_SHA384_DIGEST_SIZE_IN_BYTES;
                         break;
                 case 512:
+                default:
                         IMB_SHA512(mb_mgr, vec->key, vec->key_len, key);
                         key_len = IMB_SHA512_DIGEST_SIZE_IN_BYTES;
                         break;
-                default:
-                        fprintf(stderr, "Wrong SHA type selection 'SHA-%d'!\n",
-                                sha_type);
-                        goto end;
                 }
         }
 
@@ -1297,6 +1309,18 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
 		goto end2;
         }
 
+        switch (sha_type) {
+        case 224:
+        case 256:
+        case 384:
+        case 512:
+                break;
+        default:
+                fprintf(stderr, "Wrong SHA type selection 'SHA-%d'!\n",
+                        sha_type);
+                goto end2;
+        }
+
         switch (sha_type) {
         case 224:
                 digest_len = vec->hmac_sha224_len;
@@ -1311,13 +1335,10 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
                 block_size = IMB_SHA_384_BLOCK_SIZE;
                 break;
         case 512:
+        default:
                 digest_len = vec->hmac_sha512_len;
                 block_size = IMB_SHA_512_BLOCK_SIZE;
                 break;
-        default:
-                fprintf(stderr, "Wrong SHA type selection 'SHA-%d'!\n",
-                        sha_type);
-                goto end2;
         }
 
         memset(padding, -1, sizeof(padding));
@@ -1355,13 +1376,10 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
                         key_len = IMB_SHA384_DIGEST_SIZE_IN_BYTES;
                         break;
                 case 512:
+                default:
                         IMB_SHA512(mb_mgr, vec->key, vec->key_len, key);
                         key_len = IMB_SHA512_DIGEST_SIZE_IN_BYTES;
                         break;
-                default:
-                        fprintf(stderr, "Wrong SHA type selection 'SHA-%d'!\n",
-                                sha_type);
-                        goto end;
                 }
         }
 
-- 
GitLab


From 47e8396ee63c2a3afc5d2de9e6efd89b3cf5f9b6 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Mon, 14 Nov 2022 16:24:08 +0000
Subject: [PATCH 015/332] doc: [badges/workflow] remove freebsd badge and
 workflows

---
 .../workflows/freebsd_build_shared_clang.yml  | 27 -------------------
 .../workflows/freebsd_build_shared_gcc.yml    | 27 -------------------
 README.md                                     |  2 --
 3 files changed, 56 deletions(-)
 delete mode 100644 .github/workflows/freebsd_build_shared_clang.yml
 delete mode 100644 .github/workflows/freebsd_build_shared_gcc.yml

diff --git a/.github/workflows/freebsd_build_shared_clang.yml b/.github/workflows/freebsd_build_shared_clang.yml
deleted file mode 100644
index 6104ca5a..00000000
--- a/.github/workflows/freebsd_build_shared_clang.yml
+++ /dev/null
@@ -1,27 +0,0 @@
-name: FreeBSD Build Shared clang
-
-on:
-  push:
-    branches: [ main ]
-  pull_request:
-    branches: [ main ]
-
-jobs:
-  testfreebsd:
-    runs-on: macos-12
-    name: FreeBSD run
-    steps:
-      - name: Checkout
-        uses: actions/checkout@v2
-        with:
-          repository: intel/intel-ipsec-mb
-      - name: Test in FreeBSD
-        id: tests
-        uses: vmactions/freebsd-vm@v0.2.0
-        with:
-          usesh: true
-          mem: 8192
-          prepare: pkg install -y curl nasm llvm gmake
-          run: |
-            freebsd-version
-            gmake CC=clang -j 4
diff --git a/.github/workflows/freebsd_build_shared_gcc.yml b/.github/workflows/freebsd_build_shared_gcc.yml
deleted file mode 100644
index c7824d73..00000000
--- a/.github/workflows/freebsd_build_shared_gcc.yml
+++ /dev/null
@@ -1,27 +0,0 @@
-name: FreeBSD Build Shared gcc
-
-on:
-  push:
-    branches: [ main ]
-  pull_request:
-    branches: [ main ]
-
-jobs:
-  testfreebsd:
-    runs-on: macos-12
-    name: FreeBSD GCC run
-    steps:
-      - name: Checkout
-        uses: actions/checkout@v2
-        with:
-          repository: intel/intel-ipsec-mb
-      - name: Test FreeBSD GCC build
-        id: tests
-        uses: vmactions/freebsd-vm@v0.2.0
-        with:
-          usesh: true
-          mem: 8192
-          prepare: pkg install -y curl nasm gmake gcc
-          run: |
-            freebsd-version
-            gmake CC=gcc -j 4
diff --git a/README.md b/README.md
index 2555d681..fd2f5276 100644
--- a/README.md
+++ b/README.md
@@ -4,8 +4,6 @@
 ![Linux Build Shared clang](https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_clang.yml/badge.svg)
 ![Linux Build Static clang](https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_static_clang.yml/badge.svg)
 ![Linux Build Shared clang AESNI emulation](https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_clang_aesni_emu.yml/badge.svg)
-![FreeBSD Build Shared clang](https://github.com/intel/intel-ipsec-mb/actions/workflows/freebsd_build_shared_clang.yml/badge.svg)
-![FreeBSD Build Shared gcc](https://github.com/intel/intel-ipsec-mb/actions/workflows/freebsd_build_shared_gcc.yml/badge.svg)
 
 # Intel(R) Multi-Buffer Crypto for IPsec Library
 
-- 
GitLab


From 99c678a0da51ff166c0fd6525683266271d37cf5 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Wed, 23 Nov 2022 16:50:51 +0000
Subject: [PATCH 016/332] test [fuzz]: fix fuzzing app additional data

---
 test/job_api_fuzz_test.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/test/job_api_fuzz_test.c b/test/job_api_fuzz_test.c
index 4eb88d9c..8ef4d90e 100644
--- a/test/job_api_fuzz_test.c
+++ b/test/job_api_fuzz_test.c
@@ -619,6 +619,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                                 (uint8_t buff[2*BUFF_SIZE], 64);
 
                         fill_job_data(job, buff);
+			fill_additional_cipher_data(job, buff, buffsize);
                 }
 
                 IMB_SUBMIT_CIPHER_BURST(p_mgr, jobs, num_jobs,
@@ -644,6 +645,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                                 (uint8_t buff[2*BUFF_SIZE], 64);
 
                         fill_job_data(job, buff);
+			fill_additional_hash_data(job, buff, buffsize);
                 }
 
                 IMB_SUBMIT_HASH_BURST(p_mgr, jobs, num_jobs, hash);
-- 
GitLab


From e27100d2790636d63e536fff8c5a1528151b0817 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 15:19:48 +0000
Subject: [PATCH 017/332] lib: Rename gcm_defines file extension

---
 lib/avx2_t1/gcm_avx_gen4.asm                     | 2 +-
 lib/avx512_t1/gcm_avx512.asm                     | 2 +-
 lib/avx512_t2/gcm_vaes_avx512.inc                | 4 ++--
 lib/avx_t1/gcm_avx_gen2.asm                      | 2 +-
 lib/include/{gcm_defines.asm => gcm_defines.inc} | 6 +++---
 lib/sse_t1/gcm_sse.inc                           | 2 +-
 6 files changed, 9 insertions(+), 9 deletions(-)
 rename lib/include/{gcm_defines.asm => gcm_defines.inc} (98%)

diff --git a/lib/avx2_t1/gcm_avx_gen4.asm b/lib/avx2_t1/gcm_avx_gen4.asm
index 189280bd..e0b07aac 100644
--- a/lib/avx2_t1/gcm_avx_gen4.asm
+++ b/lib/avx2_t1/gcm_avx_gen4.asm
@@ -113,7 +113,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.asm"
-%include "include/gcm_defines.asm"
+%include "include/gcm_defines.inc"
 %include "include/gcm_keys_avx2_avx512.asm"
 %include "include/gcm_common.inc"
 %include "include/memcpy.asm"
diff --git a/lib/avx512_t1/gcm_avx512.asm b/lib/avx512_t1/gcm_avx512.asm
index 352a89c5..3784d3ec 100644
--- a/lib/avx512_t1/gcm_avx512.asm
+++ b/lib/avx512_t1/gcm_avx512.asm
@@ -114,7 +114,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.asm"
-%include "include/gcm_defines.asm"
+%include "include/gcm_defines.inc"
 %include "include/gcm_keys_avx2_avx512.asm"
 %include "include/gcm_common.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index e6241b32..dd2ba57f 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -117,7 +117,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.asm"
-%include "include/gcm_defines.asm"
+%include "include/gcm_defines.inc"
 %include "include/gcm_keys_vaes_avx512.asm"
 %include "include/gcm_common.inc"
 %include "include/memcpy.asm"
@@ -168,7 +168,7 @@
 %define STACK_LOCAL_OFFSET      (STACK_XMM_OFFSET + XMM_STORAGE)
 %define STACK_FRAME_SIZE        (STACK_LOCAL_OFFSET + LOCAL_STORAGE)
 
-;; for compatibility with stack argument definitions in gcm_defines.asm
+;; for compatibility with stack argument definitions in gcm_defines.inc
 %define STACK_OFFSET 0
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
diff --git a/lib/avx_t1/gcm_avx_gen2.asm b/lib/avx_t1/gcm_avx_gen2.asm
index db90c7b6..e9e66ac8 100644
--- a/lib/avx_t1/gcm_avx_gen2.asm
+++ b/lib/avx_t1/gcm_avx_gen2.asm
@@ -114,7 +114,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.asm"
-%include "include/gcm_defines.asm"
+%include "include/gcm_defines.inc"
 %include "include/gcm_keys_sse_avx.asm"
 %include "include/gcm_common.inc"
 %include "include/memcpy.asm"
diff --git a/lib/include/gcm_defines.asm b/lib/include/gcm_defines.inc
similarity index 98%
rename from lib/include/gcm_defines.asm
rename to lib/include/gcm_defines.inc
index d1e4bb85..7c6f659a 100644
--- a/lib/include/gcm_defines.asm
+++ b/lib/include/gcm_defines.inc
@@ -25,8 +25,8 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%ifndef GCM_DEFINES_ASM_INCLUDED
-%define GCM_DEFINES_ASM_INCLUDED
+%ifndef GCM_DEFINES_INC_INCLUDED
+%define GCM_DEFINES_INC_INCLUDED
 
 ;
 ; Authors:
@@ -288,4 +288,4 @@ mksection .text
 	%define	VX512STR vmovdqu8
 %endif
 
-%endif ; GCM_DEFINES_ASM_INCLUDED
+%endif ; GCM_DEFINES_INC_INCLUDED
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index 042ef073..9976b9f5 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -117,7 +117,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.asm"
-%include "include/gcm_defines.asm"
+%include "include/gcm_defines.inc"
 %include "include/gcm_keys_sse_avx.asm"
 %include "include/gcm_common.inc"
 %include "include/memcpy.asm"
-- 
GitLab


From e6c3079979daaa1ab52e0642051e54adc074f3c0 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 15:27:06 +0000
Subject: [PATCH 018/332] lib: Rename aes_common file extension

---
 lib/avx2_t2/aes128_ecb_vaes_avx2.asm           | 2 +-
 lib/avx512_t1/chacha20_avx512.asm              | 2 +-
 lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm | 2 +-
 lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc    | 2 +-
 lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm   | 2 +-
 lib/avx512_t2/aes_ecb_vaes_avx512.asm          | 2 +-
 lib/avx512_t2/gcm_vaes_avx512.inc              | 2 +-
 lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm | 2 +-
 lib/avx_t1/aes128_ecb_by8_avx.asm              | 2 +-
 lib/include/{aes_common.asm => aes_common.inc} | 6 +++---
 lib/sse_t3/aes128_ecb_by8_sse.asm              | 2 +-
 11 files changed, 13 insertions(+), 13 deletions(-)
 rename lib/include/{aes_common.asm => aes_common.inc} (99%)

diff --git a/lib/avx2_t2/aes128_ecb_vaes_avx2.asm b/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
index e0c8a9de..7bca58c1 100644
--- a/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
+++ b/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
@@ -44,7 +44,7 @@
 
 %include "include/os.asm"
 %include "include/clear_regs.asm"
-%include "include/aes_common.asm"
+%include "include/aes_common.inc"
 
 %ifdef LINUX
 %define IN      rdi
diff --git a/lib/avx512_t1/chacha20_avx512.asm b/lib/avx512_t1/chacha20_avx512.asm
index 845e531d..2ee4fc23 100644
--- a/lib/avx512_t1/chacha20_avx512.asm
+++ b/lib/avx512_t1/chacha20_avx512.asm
@@ -31,7 +31,7 @@
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
 %include "include/transpose_avx512.asm"
-%include "include/aes_common.asm"
+%include "include/aes_common.inc"
 %include "include/chacha_poly_defines.asm"
 %include "include/cet.inc"
 mksection .rodata
diff --git a/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
index 39ee837b..f6f0bc4f 100644
--- a/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/aes_common.asm"
+%include "include/aes_common.inc"
 %include "include/clear_regs.asm"
 
 %define zIV        zmm0
diff --git a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
index 8e859aaa..06c32dff 100644
--- a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
+++ b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
@@ -35,7 +35,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/imb_job.asm"
 %include "include/memcpy.asm"
-%include "include/aes_common.asm"
+%include "include/aes_common.inc"
 %include "include/const.inc"
 %include "include/clear_regs.asm"
 
diff --git a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
index c03684ae..e160dc58 100644
--- a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/reg_sizes.asm"
 %include "include/os.asm"
 %include "include/clear_regs.asm"
-%include "include/aes_common.asm"
+%include "include/aes_common.inc"
 %include "include/mb_mgr_datastruct.asm"
 
 default rel
diff --git a/lib/avx512_t2/aes_ecb_vaes_avx512.asm b/lib/avx512_t2/aes_ecb_vaes_avx512.asm
index a4287a30..828b1ff7 100644
--- a/lib/avx512_t2/aes_ecb_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_ecb_vaes_avx512.asm
@@ -44,7 +44,7 @@
 
 %include "include/os.asm"
 %include "include/clear_regs.asm"
-%include "include/aes_common.asm"
+%include "include/aes_common.inc"
 
 %define AES_ECB_ENC_128 aes_ecb_enc_128_vaes_avx512
 %define AES_ECB_DEC_128 aes_ecb_dec_128_vaes_avx512
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index dd2ba57f..60f06282 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -121,7 +121,7 @@
 %include "include/gcm_keys_vaes_avx512.asm"
 %include "include/gcm_common.inc"
 %include "include/memcpy.asm"
-%include "include/aes_common.asm"
+%include "include/aes_common.inc"
 %include "include/cet.inc"
 %ifndef GCM128_MODE
 %ifndef GCM192_MODE
diff --git a/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm b/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
index e9e9a3e3..e9d75c32 100644
--- a/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
+++ b/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/cet.inc"
 %include "include/memcpy.asm"
 %include "include/const.inc"
-%include "include/aes_common.asm"
+%include "include/aes_common.inc"
 %define APPEND(a,b) a %+ b
 %define APPEND3(a,b,c) a %+ b %+ c
 
diff --git a/lib/avx_t1/aes128_ecb_by8_avx.asm b/lib/avx_t1/aes128_ecb_by8_avx.asm
index 65cd3972..c248f8db 100644
--- a/lib/avx_t1/aes128_ecb_by8_avx.asm
+++ b/lib/avx_t1/aes128_ecb_by8_avx.asm
@@ -29,7 +29,7 @@
 
 %include "include/os.asm"
 %include "include/clear_regs.asm"
-%include "include/aes_common.asm"
+%include "include/aes_common.inc"
 
 %ifdef LINUX
 %define IN              rdi
diff --git a/lib/include/aes_common.asm b/lib/include/aes_common.inc
similarity index 99%
rename from lib/include/aes_common.asm
rename to lib/include/aes_common.inc
index f0410dea..40f6a593 100644
--- a/lib/include/aes_common.asm
+++ b/lib/include/aes_common.inc
@@ -25,8 +25,8 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%ifndef _AES_COMMON_ASM_
-%define _AES_COMMON_ASM_
+%ifndef _AES_COMMON_INC_
+%define _AES_COMMON_INC_
 
 %include "include/reg_sizes.asm"
 
@@ -1083,7 +1083,7 @@
 
 %endmacro
 
-%endif ;; _AES_COMMON_ASM
+%endif ;; _AES_COMMON_INC_
 
 ;;; ===========================================================================
 ;;; Handles AES decryption rounds for 0 to 8 blocks on SSE
diff --git a/lib/sse_t3/aes128_ecb_by8_sse.asm b/lib/sse_t3/aes128_ecb_by8_sse.asm
index 9c6a5aed..375c5ce6 100644
--- a/lib/sse_t3/aes128_ecb_by8_sse.asm
+++ b/lib/sse_t3/aes128_ecb_by8_sse.asm
@@ -29,7 +29,7 @@
 
 %include "include/os.asm"
 %include "include/clear_regs.asm"
-%include "include/aes_common.asm"
+%include "include/aes_common.inc"
 
 %ifdef LINUX
 %define IN              rdi
-- 
GitLab


From f9428d2e7b252184d01d7fe305f5c46ff0e9ed8e Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 15:39:45 +0000
Subject: [PATCH 019/332] lib: Rename chacha_poly_defines file extension

---
 lib/avx2_t1/chacha20_avx2.asm                               | 2 +-
 lib/avx512_t1/chacha20_avx512.asm                           | 2 +-
 lib/avx_t1/chacha20_avx.asm                                 | 2 +-
 .../{chacha_poly_defines.asm => chacha_poly_defines.inc}    | 6 +++---
 lib/sse_t1/chacha20_sse.asm                                 | 2 +-
 5 files changed, 7 insertions(+), 7 deletions(-)
 rename lib/include/{chacha_poly_defines.asm => chacha_poly_defines.inc} (95%)

diff --git a/lib/avx2_t1/chacha20_avx2.asm b/lib/avx2_t1/chacha20_avx2.asm
index 25e116fd..35fc6ab1 100644
--- a/lib/avx2_t1/chacha20_avx2.asm
+++ b/lib/avx2_t1/chacha20_avx2.asm
@@ -30,7 +30,7 @@
 %include "include/memcpy.asm"
 %include "include/clear_regs.asm"
 %include "include/transpose_avx2.asm"
-%include "include/chacha_poly_defines.asm"
+%include "include/chacha_poly_defines.inc"
 %include "include/cet.inc"
 mksection .rodata
 default rel
diff --git a/lib/avx512_t1/chacha20_avx512.asm b/lib/avx512_t1/chacha20_avx512.asm
index 2ee4fc23..60633e98 100644
--- a/lib/avx512_t1/chacha20_avx512.asm
+++ b/lib/avx512_t1/chacha20_avx512.asm
@@ -32,7 +32,7 @@
 %include "include/reg_sizes.asm"
 %include "include/transpose_avx512.asm"
 %include "include/aes_common.inc"
-%include "include/chacha_poly_defines.asm"
+%include "include/chacha_poly_defines.inc"
 %include "include/cet.inc"
 mksection .rodata
 default rel
diff --git a/lib/avx_t1/chacha20_avx.asm b/lib/avx_t1/chacha20_avx.asm
index ef0bacff..18ac1a00 100644
--- a/lib/avx_t1/chacha20_avx.asm
+++ b/lib/avx_t1/chacha20_avx.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.asm"
 %include "include/memcpy.asm"
 %include "include/clear_regs.asm"
-%include "include/chacha_poly_defines.asm"
+%include "include/chacha_poly_defines.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/include/chacha_poly_defines.asm b/lib/include/chacha_poly_defines.inc
similarity index 95%
rename from lib/include/chacha_poly_defines.asm
rename to lib/include/chacha_poly_defines.inc
index 445c0bac..2623095b 100644
--- a/lib/include/chacha_poly_defines.asm
+++ b/lib/include/chacha_poly_defines.inc
@@ -25,8 +25,8 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%ifndef CHACHA_POLY_DEFINES_ASM_INCLUDED
-%define CHACHA_POLY_DEFINES_ASM_INCLUDED
+%ifndef CHACHA_POLY_DEFINES_INC_INCLUDED
+%define CHACHA_POLY_DEFINES_INC_INCLUDED
 
 ;;define the fields of gcm_context_data struct
 ;; struct chacha20_poly1305_context_data {
@@ -55,4 +55,4 @@
 %define RemainCtBytes   (8*21)
 %define IV              (8*22)
 
-%endif ; CHACHA_POLY_DEFINES_ASM_INCLUDED
+%endif ; CHACHA_POLY_DEFINES_INC_INCLUDED
diff --git a/lib/sse_t1/chacha20_sse.asm b/lib/sse_t1/chacha20_sse.asm
index 253b17dc..f2e0cadd 100644
--- a/lib/sse_t1/chacha20_sse.asm
+++ b/lib/sse_t1/chacha20_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.asm"
 %include "include/memcpy.asm"
 %include "include/clear_regs.asm"
-%include "include/chacha_poly_defines.asm"
+%include "include/chacha_poly_defines.inc"
 
 mksection .rodata
 default rel
-- 
GitLab


From 8489ec8bcad7e1b87110ef957a602c9ebecc0277 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 15:48:34 +0000
Subject: [PATCH 020/332] lib: Rename clear_regs file extension

---
 lib/avx2_t1/chacha20_avx2.asm                               | 2 +-
 lib/avx2_t1/gcm_avx_gen4.asm                                | 2 +-
 lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm                | 2 +-
 lib/avx2_t1/md5_x8x2_avx2.asm                               | 2 +-
 lib/avx2_t1/sha1_x8_avx2.asm                                | 2 +-
 lib/avx2_t1/sha256_oct_avx2.asm                             | 2 +-
 lib/avx2_t1/sha512_x4_avx2.asm                              | 2 +-
 lib/avx2_t2/aes128_ecb_vaes_avx2.asm                        | 2 +-
 lib/avx512_t1/chacha20_avx512.asm                           | 2 +-
 lib/avx512_t1/des_x16_avx512.asm                            | 2 +-
 lib/avx512_t1/gcm_avx512.asm                                | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm             | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm            | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm           | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm          | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm           | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm          | 2 +-
 lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm            | 2 +-
 lib/avx512_t1/poly_avx512.asm                               | 2 +-
 lib/avx512_t1/sha1_x16_avx512.asm                           | 2 +-
 lib/avx512_t1/sha256_x16_avx512.asm                         | 2 +-
 lib/avx512_t1/sha512_x8_avx512.asm                          | 2 +-
 lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm              | 2 +-
 lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm                   | 2 +-
 lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm                  | 2 +-
 lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc                 | 2 +-
 lib/avx512_t2/aes_docsis_dec_avx512.asm                     | 2 +-
 lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/aes_docsis_enc_avx512.asm                     | 2 +-
 lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/aes_ecb_vaes_avx512.asm                       | 2 +-
 lib/avx512_t2/crc16_x25_avx512.asm                          | 2 +-
 lib/avx512_t2/crc32_by16_vclmul_avx512.asm                  | 4 ++--
 lib/avx512_t2/crc32_fp_avx512.asm                           | 2 +-
 lib/avx512_t2/crc32_iuup_avx512.asm                         | 2 +-
 lib/avx512_t2/crc32_lte_avx512.asm                          | 2 +-
 lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm             | 4 ++--
 lib/avx512_t2/crc32_sctp_avx512.asm                         | 2 +-
 lib/avx512_t2/crc32_wimax_avx512.asm                        | 2 +-
 lib/avx512_t2/ethernet_fcs_avx512.asm                       | 2 +-
 lib/avx512_t2/gcm_vaes_avx512.inc                           | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm        | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm       | 2 +-
 .../mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm | 2 +-
 .../mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm         | 2 +-
 .../mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm         | 2 +-
 lib/avx512_t2/poly_fma_avx512.asm                           | 2 +-
 lib/avx512_t2/pon_vaes_avx512.asm                           | 2 +-
 lib/avx_t1/aes128_cbc_dec_by8_avx.asm                       | 2 +-
 lib/avx_t1/aes128_cbc_enc_x8_avx.asm                        | 2 +-
 lib/avx_t1/aes128_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes128_ecb_by8_avx.asm                           | 2 +-
 lib/avx_t1/aes192_cbc_dec_by8_avx.asm                       | 2 +-
 lib/avx_t1/aes192_cbc_enc_x8_avx.asm                        | 2 +-
 lib/avx_t1/aes192_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes256_cbc_dec_by8_avx.asm                       | 2 +-
 lib/avx_t1/aes256_cbc_enc_x8_avx.asm                        | 2 +-
 lib/avx_t1/aes256_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes_cfb_avx.asm                                  | 2 +-
 lib/avx_t1/chacha20_avx.asm                                 | 2 +-
 lib/avx_t1/crc16_x25_avx.asm                                | 2 +-
 lib/avx_t1/crc32_by8_avx.asm                                | 2 +-
 lib/avx_t1/crc32_fp_avx.asm                                 | 2 +-
 lib/avx_t1/crc32_iuup_avx.asm                               | 2 +-
 lib/avx_t1/crc32_lte_avx.asm                                | 2 +-
 lib/avx_t1/crc32_refl_by8_avx.asm                           | 2 +-
 lib/avx_t1/crc32_sctp_avx.asm                               | 2 +-
 lib/avx_t1/crc32_wimax_avx.asm                              | 2 +-
 lib/avx_t1/ethernet_fcs_avx.asm                             | 2 +-
 lib/avx_t1/gcm_avx_gen2.asm                                 | 2 +-
 lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm                  | 2 +-
 lib/avx_t1/md5_x4x2_avx.asm                                 | 2 +-
 lib/avx_t1/pon_by8_avx.asm                                  | 2 +-
 lib/avx_t1/sha1_one_block_avx.asm                           | 2 +-
 lib/avx_t1/sha1_x4_avx.asm                                  | 2 +-
 lib/avx_t1/sha256_mult_avx.asm                              | 2 +-
 lib/avx_t1/sha256_one_block_avx.asm                         | 2 +-
 lib/avx_t1/sha512_one_block_avx.asm                         | 2 +-
 lib/avx_t1/sha512_x2_avx.asm                                | 2 +-
 lib/avx_t1/snow_v_avx.asm                                   | 2 +-
 lib/include/{clear_regs.asm => clear_regs.inc}              | 6 +++---
 lib/sse_t1/aes128_cbc_dec_by4_sse.asm                       | 2 +-
 lib/sse_t1/aes128_cbc_enc_x4_sse.asm                        | 2 +-
 lib/sse_t1/aes128_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes128_ecb_by4_sse.asm                           | 2 +-
 lib/sse_t1/aes192_cbc_dec_by4_sse.asm                       | 2 +-
 lib/sse_t1/aes192_cbc_enc_x4_sse.asm                        | 2 +-
 lib/sse_t1/aes192_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes256_cbc_dec_by4_sse.asm                       | 2 +-
 lib/sse_t1/aes256_cbc_enc_x4_sse.asm                        | 2 +-
 lib/sse_t1/aes256_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes_cfb_sse.asm                                  | 2 +-
 lib/sse_t1/chacha20_sse.asm                                 | 2 +-
 lib/sse_t1/crc16_x25_sse.asm                                | 2 +-
 lib/sse_t1/crc32_by8_sse.asm                                | 2 +-
 lib/sse_t1/crc32_fp_sse.asm                                 | 2 +-
 lib/sse_t1/crc32_iuup_sse.asm                               | 2 +-
 lib/sse_t1/crc32_lte_sse.asm                                | 2 +-
 lib/sse_t1/crc32_refl_by8_sse.asm                           | 2 +-
 lib/sse_t1/crc32_sctp_sse.asm                               | 2 +-
 lib/sse_t1/crc32_wimax_sse.asm                              | 2 +-
 lib/sse_t1/ethernet_fcs_sse.asm                             | 2 +-
 lib/sse_t1/gcm_sse.inc                                      | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm                  | 2 +-
 lib/sse_t1/md5_x4x2_sse.asm                                 | 2 +-
 lib/sse_t1/pon_by8_sse.asm                                  | 2 +-
 lib/sse_t1/sha1_one_block_sse.asm                           | 2 +-
 lib/sse_t1/sha1_x4_sse.asm                                  | 2 +-
 lib/sse_t1/sha256_mult_sse.asm                              | 2 +-
 lib/sse_t1/sha256_one_block_sse.asm                         | 2 +-
 lib/sse_t1/sha512_one_block_sse.asm                         | 2 +-
 lib/sse_t1/sha512_x2_sse.asm                                | 2 +-
 lib/sse_t1/snow3g_uea2_by4_sse.asm                          | 2 +-
 lib/sse_t1/snow_v_sse.asm                                   | 2 +-
 lib/sse_t2/sha1_ni_x1_sse.asm                               | 2 +-
 lib/sse_t2/sha1_ni_x2_sse.asm                               | 2 +-
 lib/sse_t2/sha256_ni_x1_sse.asm                             | 2 +-
 lib/sse_t2/sha256_ni_x2_sse.asm                             | 2 +-
 lib/sse_t3/aes128_cbc_dec_by8_sse.asm                       | 2 +-
 lib/sse_t3/aes128_cbc_enc_x8_sse.asm                        | 2 +-
 lib/sse_t3/aes128_ecb_by8_sse.asm                           | 2 +-
 lib/sse_t3/aes192_cbc_dec_by8_sse.asm                       | 2 +-
 lib/sse_t3/aes192_cbc_enc_x8_sse.asm                        | 2 +-
 lib/sse_t3/aes256_cbc_dec_by8_sse.asm                       | 2 +-
 lib/sse_t3/aes256_cbc_enc_x8_sse.asm                        | 2 +-
 lib/x86_64/aes128_ecbenc_x3.asm                             | 2 +-
 lib/x86_64/aes_cmac_subkey_gen.asm                          | 2 +-
 lib/x86_64/aes_keyexp_128.asm                               | 2 +-
 lib/x86_64/aes_keyexp_192.asm                               | 2 +-
 lib/x86_64/aes_keyexp_256.asm                               | 2 +-
 lib/x86_64/clear_regs_mem_fns.asm                           | 2 +-
 lib/x86_64/poly1305.asm                                     | 2 +-
 135 files changed, 139 insertions(+), 139 deletions(-)
 rename lib/include/{clear_regs.asm => clear_regs.inc} (98%)

diff --git a/lib/avx2_t1/chacha20_avx2.asm b/lib/avx2_t1/chacha20_avx2.asm
index 35fc6ab1..a17a2126 100644
--- a/lib/avx2_t1/chacha20_avx2.asm
+++ b/lib/avx2_t1/chacha20_avx2.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/imb_job.asm"
 %include "include/memcpy.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/transpose_avx2.asm"
 %include "include/chacha_poly_defines.inc"
 %include "include/cet.inc"
diff --git a/lib/avx2_t1/gcm_avx_gen4.asm b/lib/avx2_t1/gcm_avx_gen4.asm
index e0b07aac..bb66be6b 100644
--- a/lib/avx2_t1/gcm_avx_gen4.asm
+++ b/lib/avx2_t1/gcm_avx_gen4.asm
@@ -112,7 +112,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_avx2_avx512.asm"
 %include "include/gcm_common.inc"
diff --git a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
index b7f52fc3..e0fca984 100644
--- a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
@@ -31,7 +31,7 @@
 %include "include/cet.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define SUBMIT_JOB_ZUC128_EEA3 submit_job_zuc_eea3_avx2
 %define FLUSH_JOB_ZUC128_EEA3 flush_job_zuc_eea3_avx2
diff --git a/lib/avx2_t1/md5_x8x2_avx2.asm b/lib/avx2_t1/md5_x8x2_avx2.asm
index 19b90acb..f4740d81 100644
--- a/lib/avx2_t1/md5_x8x2_avx2.asm
+++ b/lib/avx2_t1/md5_x8x2_avx2.asm
@@ -39,7 +39,7 @@
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx2.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/avx2_t1/sha1_x8_avx2.asm b/lib/avx2_t1/sha1_x8_avx2.asm
index 5b0de3e5..739681ae 100644
--- a/lib/avx2_t1/sha1_x8_avx2.asm
+++ b/lib/avx2_t1/sha1_x8_avx2.asm
@@ -39,7 +39,7 @@
 %include "include/dbgprint.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx2.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/avx2_t1/sha256_oct_avx2.asm b/lib/avx2_t1/sha256_oct_avx2.asm
index f56b7256..30a7838a 100644
--- a/lib/avx2_t1/sha256_oct_avx2.asm
+++ b/lib/avx2_t1/sha256_oct_avx2.asm
@@ -44,7 +44,7 @@
 %include "include/dbgprint.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx2.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/avx2_t1/sha512_x4_avx2.asm b/lib/avx2_t1/sha512_x4_avx2.asm
index f3c042e9..20daacd7 100644
--- a/lib/avx2_t1/sha512_x4_avx2.asm
+++ b/lib/avx2_t1/sha512_x4_avx2.asm
@@ -46,7 +46,7 @@
 %include "include/transpose_avx2.asm"
 %include "include/dbgprint.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 mksection .rodata
 default rel
 align 64
diff --git a/lib/avx2_t2/aes128_ecb_vaes_avx2.asm b/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
index 7bca58c1..a091ed4f 100644
--- a/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
+++ b/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
@@ -43,7 +43,7 @@
 ;
 
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/aes_common.inc"
 
 %ifdef LINUX
diff --git a/lib/avx512_t1/chacha20_avx512.asm b/lib/avx512_t1/chacha20_avx512.asm
index 60633e98..be15dd84 100644
--- a/lib/avx512_t1/chacha20_avx512.asm
+++ b/lib/avx512_t1/chacha20_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
 %include "include/transpose_avx512.asm"
diff --git a/lib/avx512_t1/des_x16_avx512.asm b/lib/avx512_t1/des_x16_avx512.asm
index 3dedfa2a..5f431457 100644
--- a/lib/avx512_t1/des_x16_avx512.asm
+++ b/lib/avx512_t1/des_x16_avx512.asm
@@ -52,7 +52,7 @@
 %include "include/constants.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifdef LINUX
 %define arg1	rdi
diff --git a/lib/avx512_t1/gcm_avx512.asm b/lib/avx512_t1/gcm_avx512.asm
index 3784d3ec..ee8e4a57 100644
--- a/lib/avx512_t1/gcm_avx512.asm
+++ b/lib/avx512_t1/gcm_avx512.asm
@@ -113,7 +113,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_avx2_avx512.asm"
 %include "include/gcm_common.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
index 3cc4be23..69b5f5fa 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
@@ -44,7 +44,7 @@
 %include "include/imb_job.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ;; %define DO_DBGPRINT
 %include "include/dbgprint.asm"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
index 947994bb..586f8a9b 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
@@ -46,7 +46,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 ;; %define DO_DBGPRINT
 %include "include/dbgprint.asm"
 
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
index e449e94f..79d9aaea 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
@@ -44,7 +44,7 @@
 %include "include/imb_job.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 ;; %define DO_DBGPRINT
 %include "include/dbgprint.asm"
 
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
index 0660b19d..531f4e38 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
@@ -46,7 +46,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 ;; %define DO_DBGPRINT
 %include "include/dbgprint.asm"
 
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
index 9b825d68..4098762d 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
@@ -36,7 +36,7 @@
 %include "include/imb_job.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 extern sha512_x8_avx512
 
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
index 504815cc..5a3186de 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
@@ -38,7 +38,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %use smartalign
 
diff --git a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
index be795516..83b88ac5 100644
--- a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
@@ -31,7 +31,7 @@
 %include "include/constants.asm"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef SUBMIT_JOB_ZUC128_EEA3
 %define SUBMIT_JOB_ZUC128_EEA3 submit_job_zuc_eea3_no_gfni_avx512
diff --git a/lib/avx512_t1/poly_avx512.asm b/lib/avx512_t1/poly_avx512.asm
index 400dade9..1b57a9be 100644
--- a/lib/avx512_t1/poly_avx512.asm
+++ b/lib/avx512_t1/poly_avx512.asm
@@ -29,7 +29,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/imb_job.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 [bits 64]
 default rel
diff --git a/lib/avx512_t1/sha1_x16_avx512.asm b/lib/avx512_t1/sha1_x16_avx512.asm
index afa52c58..2418052b 100644
--- a/lib/avx512_t1/sha1_x16_avx512.asm
+++ b/lib/avx512_t1/sha1_x16_avx512.asm
@@ -43,7 +43,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx512.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 mksection .rodata
 default rel
 align 64
diff --git a/lib/avx512_t1/sha256_x16_avx512.asm b/lib/avx512_t1/sha256_x16_avx512.asm
index fb060b9d..7b3d1d54 100644
--- a/lib/avx512_t1/sha256_x16_avx512.asm
+++ b/lib/avx512_t1/sha256_x16_avx512.asm
@@ -43,7 +43,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx512.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 ; re-use K256 from sha256_oct_avx2.asm
 extern K256
 
diff --git a/lib/avx512_t1/sha512_x8_avx512.asm b/lib/avx512_t1/sha512_x8_avx512.asm
index 24c03f8a..58c413d6 100644
--- a/lib/avx512_t1/sha512_x8_avx512.asm
+++ b/lib/avx512_t1/sha512_x8_avx512.asm
@@ -44,7 +44,7 @@
 %include "include/dbgprint.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx512.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %define APPEND(a,b) a %+ b
 
 %ifdef LINUX
diff --git a/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
index f6f0bc4f..7527b356 100644
--- a/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/aes_common.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define zIV        zmm0
 %define zBLK_0_3   zmm1
diff --git a/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm b/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
index c916a83d..68afed5d 100644
--- a/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 struc STACK
 _gpr_save:      resq    4
diff --git a/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm b/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
index 83a02d69..30d753ab 100644
--- a/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define GPR_SAVE_AREA   rsp + _gpr_save
 
diff --git a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
index 06c32dff..158ce9bb 100644
--- a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
+++ b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
@@ -37,7 +37,7 @@
 %include "include/memcpy.asm"
 %include "include/aes_common.inc"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/avx512_t2/aes_docsis_dec_avx512.asm b/lib/avx512_t2/aes_docsis_dec_avx512.asm
index f1dab413..ae699dd7 100644
--- a/lib/avx512_t2/aes_docsis_dec_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_avx512.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.asm"
 %include "include/reg_sizes.asm"
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.asm"
 
 ;; In System V AMD64 ABI
diff --git a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
index e160dc58..dcc839e2 100644
--- a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.asm"
 %include "include/reg_sizes.asm"
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/aes_common.inc"
 %include "include/mb_mgr_datastruct.asm"
 
diff --git a/lib/avx512_t2/aes_docsis_enc_avx512.asm b/lib/avx512_t2/aes_docsis_enc_avx512.asm
index 8a6a4e09..b9df1ea1 100644
--- a/lib/avx512_t2/aes_docsis_enc_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_avx512.asm
@@ -35,7 +35,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define APPEND(a,b) a %+ b
 
diff --git a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
index fa7adb88..c9462c17 100644
--- a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
@@ -34,7 +34,7 @@
 %include "include/imb_job.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define APPEND(a,b) a %+ b
 
diff --git a/lib/avx512_t2/aes_ecb_vaes_avx512.asm b/lib/avx512_t2/aes_ecb_vaes_avx512.asm
index 828b1ff7..ccd7eba9 100644
--- a/lib/avx512_t2/aes_ecb_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_ecb_vaes_avx512.asm
@@ -43,7 +43,7 @@
 ;
 
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/aes_common.inc"
 
 %define AES_ECB_ENC_128 aes_ecb_enc_128_vaes_avx512
diff --git a/lib/avx512_t2/crc16_x25_avx512.asm b/lib/avx512_t2/crc16_x25_avx512.asm
index 407665ec..8a93a2f6 100644
--- a/lib/avx512_t2/crc16_x25_avx512.asm
+++ b/lib/avx512_t2/crc16_x25_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/crc32_refl_const.inc"
 %include "include/crc32_refl.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/crc32_by16_vclmul_avx512.asm b/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
index 03e38cc3..3df360f2 100644
--- a/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
+++ b/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
@@ -37,10 +37,10 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/crc32.inc"
 %include "include/cet.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 [bits 64]
 default rel
diff --git a/lib/avx512_t2/crc32_fp_avx512.asm b/lib/avx512_t2/crc32_fp_avx512.asm
index 6e64d904..b0ac5e23 100644
--- a/lib/avx512_t2/crc32_fp_avx512.asm
+++ b/lib/avx512_t2/crc32_fp_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx512_t2/crc32_iuup_avx512.asm b/lib/avx512_t2/crc32_iuup_avx512.asm
index 6531f11e..a735b566 100644
--- a/lib/avx512_t2/crc32_iuup_avx512.asm
+++ b/lib/avx512_t2/crc32_iuup_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx512_t2/crc32_lte_avx512.asm b/lib/avx512_t2/crc32_lte_avx512.asm
index 77a4373e..c50e3a8c 100644
--- a/lib/avx512_t2/crc32_lte_avx512.asm
+++ b/lib/avx512_t2/crc32_lte_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm b/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
index 6b9a735b..c58136a4 100644
--- a/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
+++ b/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
@@ -37,10 +37,10 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/crc32_refl.inc"
 %include "include/cet.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 [bits 64]
 default rel
diff --git a/lib/avx512_t2/crc32_sctp_avx512.asm b/lib/avx512_t2/crc32_sctp_avx512.asm
index 9996000b..1fbc7ff2 100644
--- a/lib/avx512_t2/crc32_sctp_avx512.asm
+++ b/lib/avx512_t2/crc32_sctp_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx512_t2/crc32_wimax_avx512.asm b/lib/avx512_t2/crc32_wimax_avx512.asm
index 13a7288e..af8e169e 100644
--- a/lib/avx512_t2/crc32_wimax_avx512.asm
+++ b/lib/avx512_t2/crc32_wimax_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx512_t2/ethernet_fcs_avx512.asm b/lib/avx512_t2/ethernet_fcs_avx512.asm
index 64d9a4e5..748aa100 100644
--- a/lib/avx512_t2/ethernet_fcs_avx512.asm
+++ b/lib/avx512_t2/ethernet_fcs_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/crc32_refl_const.inc"
 %include "include/crc32_refl.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 60f06282..b0363fbc 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -116,7 +116,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_vaes_avx512.asm"
 %include "include/gcm_common.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
index 90bfd104..a77ed945 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/constants.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_CBC_ENC_X16
 %define AES_CBC_ENC_X16 aes_cbc_enc_128_flush_vaes_avx512
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
index 2acf75f7..b1102ae2 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_CBC_ENC_X16
 %define AES_CBC_ENC_X16 aes_cbc_enc_128_vaes_avx512
diff --git a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
index bc5be452..296f208d 100644
--- a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
@@ -31,7 +31,7 @@
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 %include "include/memcpy.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_CBC_MAC
 %define AES_CBC_MAC aes128_cbc_mac_vaes_avx512
diff --git a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
index 9a1acc8a..2ce795fb 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_CBC_MAC
 %define AES_CBC_MAC aes128_cbc_mac_vaes_avx512
diff --git a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
index ee900051..f343297a 100644
--- a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
@@ -31,7 +31,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_XCBC_X16
 %define AES_XCBC_X16 aes_xcbc_mac_128_vaes_avx512
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
index 380446c5..1dd3c4af 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/transpose_avx512.asm"
 %include "include/imb_job.asm"
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %include "avx512_t2/snow3g_uea2_by16_vaes_avx512.asm"
 
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
index c10985b1..e65f32f4 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
@@ -31,7 +31,7 @@
 %include "include/constants.asm"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "avx512_t2/snow3g_uea2_by16_vaes_avx512.asm"
 
 %ifndef SUBMIT_JOB_SNOW3G_UIA2
diff --git a/lib/avx512_t2/poly_fma_avx512.asm b/lib/avx512_t2/poly_fma_avx512.asm
index 0eec89f3..31b3373d 100644
--- a/lib/avx512_t2/poly_fma_avx512.asm
+++ b/lib/avx512_t2/poly_fma_avx512.asm
@@ -29,7 +29,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/imb_job.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 
 ;; Enforce EVEX encoding for AVX512 capable systems
diff --git a/lib/avx512_t2/pon_vaes_avx512.asm b/lib/avx512_t2/pon_vaes_avx512.asm
index 1f712f15..f51acac5 100644
--- a/lib/avx512_t2/pon_vaes_avx512.asm
+++ b/lib/avx512_t2/pon_vaes_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/imb_job.asm"
 %include "include/os.asm"
 %include "include/memcpy.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 extern aes_cntr_pon_enc_128_vaes_avx512
 extern aes_cntr_pon_dec_128_vaes_avx512
diff --git a/lib/avx_t1/aes128_cbc_dec_by8_avx.asm b/lib/avx_t1/aes128_cbc_dec_by8_avx.asm
index c50d7898..a57b9a72 100644
--- a/lib/avx_t1/aes128_cbc_dec_by8_avx.asm
+++ b/lib/avx_t1/aes128_cbc_dec_by8_avx.asm
@@ -30,7 +30,7 @@
 ;; clobbers xmm0-15
 
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define CONCAT(a,b) a %+ b
 %define VMOVDQ vmovdqu
diff --git a/lib/avx_t1/aes128_cbc_enc_x8_avx.asm b/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
index 3ae67c9b..95a73fe5 100644
--- a/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
@@ -31,7 +31,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define	VMOVDQ vmovdqu ;; assume buffers not aligned
 
diff --git a/lib/avx_t1/aes128_cntr_by8_avx.asm b/lib/avx_t1/aes128_cntr_by8_avx.asm
index a74b8599..ec3ea80a 100644
--- a/lib/avx_t1/aes128_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes128_cntr_by8_avx.asm
@@ -30,7 +30,7 @@
 %include "include/memcpy.asm"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ; routine to do AES128 CNTR enc/decrypt "by8"
 ; XMM registers are clobbered. Saving/restoring must be done at a higher level
diff --git a/lib/avx_t1/aes128_ecb_by8_avx.asm b/lib/avx_t1/aes128_ecb_by8_avx.asm
index c248f8db..bada27ad 100644
--- a/lib/avx_t1/aes128_ecb_by8_avx.asm
+++ b/lib/avx_t1/aes128_ecb_by8_avx.asm
@@ -28,7 +28,7 @@
 ; routine to do AES ECB 128 encrypt/decrypt on 16n bytes doing AES by 8
 
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/aes_common.inc"
 
 %ifdef LINUX
diff --git a/lib/avx_t1/aes192_cbc_dec_by8_avx.asm b/lib/avx_t1/aes192_cbc_dec_by8_avx.asm
index 13f85efb..eae59f32 100644
--- a/lib/avx_t1/aes192_cbc_dec_by8_avx.asm
+++ b/lib/avx_t1/aes192_cbc_dec_by8_avx.asm
@@ -29,7 +29,7 @@
 
 ; XMM registers are clobbered. Saving/restoring must be done at a higher level
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define CONCAT(a,b) a %+ b
 %define VMOVDQ vmovdqu
diff --git a/lib/avx_t1/aes192_cbc_enc_x8_avx.asm b/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
index ac3822d3..7a6acf94 100644
--- a/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
@@ -31,7 +31,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define	VMOVDQ vmovdqu ;; assume buffers not aligned
 
diff --git a/lib/avx_t1/aes192_cntr_by8_avx.asm b/lib/avx_t1/aes192_cntr_by8_avx.asm
index c6e928c0..ba8eee50 100644
--- a/lib/avx_t1/aes192_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes192_cntr_by8_avx.asm
@@ -29,7 +29,7 @@
 %include "include/memcpy.asm"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ; routine to do AES192 CNTR enc/decrypt "by8"
 ; XMM registers are clobbered. Saving/restoring must be done at a higher level
diff --git a/lib/avx_t1/aes256_cbc_dec_by8_avx.asm b/lib/avx_t1/aes256_cbc_dec_by8_avx.asm
index 36aa5438..28d08e10 100644
--- a/lib/avx_t1/aes256_cbc_dec_by8_avx.asm
+++ b/lib/avx_t1/aes256_cbc_dec_by8_avx.asm
@@ -29,7 +29,7 @@
 
 ; XMM registers are clobbered. Saving/restoring must be done at a higher level
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define CONCAT(a,b) a %+ b
 %define VMOVDQ vmovdqu
diff --git a/lib/avx_t1/aes256_cbc_enc_x8_avx.asm b/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
index a4eb28fb..5dbf1d33 100644
--- a/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
@@ -31,7 +31,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define	VMOVDQ vmovdqu ;; assume buffers not aligned
 
diff --git a/lib/avx_t1/aes256_cntr_by8_avx.asm b/lib/avx_t1/aes256_cntr_by8_avx.asm
index 3d5d3b6a..7c532b0d 100644
--- a/lib/avx_t1/aes256_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes256_cntr_by8_avx.asm
@@ -30,7 +30,7 @@
 %include "include/memcpy.asm"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ; routine to do AES256 CNTR enc/decrypt "by8"
 ; XMM registers are clobbered. Saving/restoring must be done at a higher level
diff --git a/lib/avx_t1/aes_cfb_avx.asm b/lib/avx_t1/aes_cfb_avx.asm
index b1c01888..023d0493 100644
--- a/lib/avx_t1/aes_cfb_avx.asm
+++ b/lib/avx_t1/aes_cfb_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/memcpy.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 ;;; Routines to do 128/256 bit CFB AES encrypt/decrypt operations on one block only.
diff --git a/lib/avx_t1/chacha20_avx.asm b/lib/avx_t1/chacha20_avx.asm
index 18ac1a00..42fd9b8f 100644
--- a/lib/avx_t1/chacha20_avx.asm
+++ b/lib/avx_t1/chacha20_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/imb_job.asm"
 %include "include/memcpy.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/chacha_poly_defines.inc"
 
 mksection .rodata
diff --git a/lib/avx_t1/crc16_x25_avx.asm b/lib/avx_t1/crc16_x25_avx.asm
index a2f85b58..f458ecd9 100644
--- a/lib/avx_t1/crc16_x25_avx.asm
+++ b/lib/avx_t1/crc16_x25_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx_t1/crc32_by8_avx.asm b/lib/avx_t1/crc32_by8_avx.asm
index 2403b0fa..e86e4764 100644
--- a/lib/avx_t1/crc32_by8_avx.asm
+++ b/lib/avx_t1/crc32_by8_avx.asm
@@ -39,7 +39,7 @@
 %include "include/memcpy.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 [bits 64]
 default rel
diff --git a/lib/avx_t1/crc32_fp_avx.asm b/lib/avx_t1/crc32_fp_avx.asm
index a1fe8de0..833d27cc 100644
--- a/lib/avx_t1/crc32_fp_avx.asm
+++ b/lib/avx_t1/crc32_fp_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx_t1/crc32_iuup_avx.asm b/lib/avx_t1/crc32_iuup_avx.asm
index 8c283bb1..b1934bf7 100644
--- a/lib/avx_t1/crc32_iuup_avx.asm
+++ b/lib/avx_t1/crc32_iuup_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx_t1/crc32_lte_avx.asm b/lib/avx_t1/crc32_lte_avx.asm
index e363bb81..cabb7731 100644
--- a/lib/avx_t1/crc32_lte_avx.asm
+++ b/lib/avx_t1/crc32_lte_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx_t1/crc32_refl_by8_avx.asm b/lib/avx_t1/crc32_refl_by8_avx.asm
index bbbd4a0a..5857de55 100644
--- a/lib/avx_t1/crc32_refl_by8_avx.asm
+++ b/lib/avx_t1/crc32_refl_by8_avx.asm
@@ -39,7 +39,7 @@
 %include "include/memcpy.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 [bits 64]
 default rel
diff --git a/lib/avx_t1/crc32_sctp_avx.asm b/lib/avx_t1/crc32_sctp_avx.asm
index d1a25c61..1cadb8b3 100644
--- a/lib/avx_t1/crc32_sctp_avx.asm
+++ b/lib/avx_t1/crc32_sctp_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx_t1/crc32_wimax_avx.asm b/lib/avx_t1/crc32_wimax_avx.asm
index e8e96329..eb77d872 100644
--- a/lib/avx_t1/crc32_wimax_avx.asm
+++ b/lib/avx_t1/crc32_wimax_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx_t1/ethernet_fcs_avx.asm b/lib/avx_t1/ethernet_fcs_avx.asm
index 2e7c8e5f..bd3bb30b 100644
--- a/lib/avx_t1/ethernet_fcs_avx.asm
+++ b/lib/avx_t1/ethernet_fcs_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx_t1/gcm_avx_gen2.asm b/lib/avx_t1/gcm_avx_gen2.asm
index e9e66ac8..80de7147 100644
--- a/lib/avx_t1/gcm_avx_gen2.asm
+++ b/lib/avx_t1/gcm_avx_gen2.asm
@@ -113,7 +113,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_sse_avx.asm"
 %include "include/gcm_common.inc"
diff --git a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
index 92fb7208..b0a36672 100644
--- a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
@@ -31,7 +31,7 @@
 %include "include/cet.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define SUBMIT_JOB_ZUC128_EEA3 submit_job_zuc_eea3_avx
 %define FLUSH_JOB_ZUC128_EEA3 flush_job_zuc_eea3_avx
diff --git a/lib/avx_t1/md5_x4x2_avx.asm b/lib/avx_t1/md5_x4x2_avx.asm
index 32528d18..59f77e0f 100644
--- a/lib/avx_t1/md5_x4x2_avx.asm
+++ b/lib/avx_t1/md5_x4x2_avx.asm
@@ -38,7 +38,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 extern MD5_TABLE
 
diff --git a/lib/avx_t1/pon_by8_avx.asm b/lib/avx_t1/pon_by8_avx.asm
index 74f2f27d..bffd18e6 100644
--- a/lib/avx_t1/pon_by8_avx.asm
+++ b/lib/avx_t1/pon_by8_avx.asm
@@ -30,7 +30,7 @@
 %include "include/imb_job.asm"
 %include "include/os.asm"
 %include "include/memcpy.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/avx_t1/sha1_one_block_avx.asm b/lib/avx_t1/sha1_one_block_avx.asm
index af6b5565..7695dcb4 100644
--- a/lib/avx_t1/sha1_one_block_avx.asm
+++ b/lib/avx_t1/sha1_one_block_avx.asm
@@ -28,7 +28,7 @@
 ; SHA1 code, hybrid, rolled, interleaved
 ; Uses AVX instructions
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/avx_t1/sha1_x4_avx.asm b/lib/avx_t1/sha1_x4_avx.asm
index b67ef360..6a80fcbe 100644
--- a/lib/avx_t1/sha1_x4_avx.asm
+++ b/lib/avx_t1/sha1_x4_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/avx_t1/sha256_mult_avx.asm b/lib/avx_t1/sha256_mult_avx.asm
index 598d4cda..c8af8323 100644
--- a/lib/avx_t1/sha256_mult_avx.asm
+++ b/lib/avx_t1/sha256_mult_avx.asm
@@ -40,7 +40,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 extern K256_4
 
diff --git a/lib/avx_t1/sha256_one_block_avx.asm b/lib/avx_t1/sha256_one_block_avx.asm
index c50cd0a4..25b4ef87 100644
--- a/lib/avx_t1/sha256_one_block_avx.asm
+++ b/lib/avx_t1/sha256_one_block_avx.asm
@@ -28,7 +28,7 @@
 ; This code schedules 1 blocks at a time, with 4 lanes per block
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/avx_t1/sha512_one_block_avx.asm b/lib/avx_t1/sha512_one_block_avx.asm
index 36681a62..1971e659 100644
--- a/lib/avx_t1/sha512_one_block_avx.asm
+++ b/lib/avx_t1/sha512_one_block_avx.asm
@@ -28,7 +28,7 @@
 ; This code schedules 1 blocks at a time, with 4 lanes per block
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define	VMOVDQ vmovdqu ;; assume buffers not aligned
 
diff --git a/lib/avx_t1/sha512_x2_avx.asm b/lib/avx_t1/sha512_x2_avx.asm
index 865008db..ca82f7b8 100644
--- a/lib/avx_t1/sha512_x2_avx.asm
+++ b/lib/avx_t1/sha512_x2_avx.asm
@@ -41,7 +41,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 extern K512_2
 
 mksection .rodata
diff --git a/lib/avx_t1/snow_v_avx.asm b/lib/avx_t1/snow_v_avx.asm
index 2d06cb7f..c2065e34 100644
--- a/lib/avx_t1/snow_v_avx.asm
+++ b/lib/avx_t1/snow_v_avx.asm
@@ -34,7 +34,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/imb_job.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 
 %ifndef SNOW_V
diff --git a/lib/include/clear_regs.asm b/lib/include/clear_regs.inc
similarity index 98%
rename from lib/include/clear_regs.asm
rename to lib/include/clear_regs.inc
index 3df53f47..0fc8bde2 100644
--- a/lib/include/clear_regs.asm
+++ b/lib/include/clear_regs.inc
@@ -25,8 +25,8 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%ifndef _CLEAR_REGS_ASM_
-%define _CLEAR_REGS_ASM_
+%ifndef _CLEAR_REGS_INC_
+%define _CLEAR_REGS_INC_
 
 %include "include/os.asm"
 
@@ -222,4 +222,4 @@
         vzeroupper
 %endmacro
 
-%endif ;; _CLEAR_REGS_ASM
+%endif ;; _CLEAR_REGS_INC_
diff --git a/lib/sse_t1/aes128_cbc_dec_by4_sse.asm b/lib/sse_t1/aes128_cbc_dec_by4_sse.asm
index 276127df..8d1deaaa 100644
--- a/lib/sse_t1/aes128_cbc_dec_by4_sse.asm
+++ b/lib/sse_t1/aes128_cbc_dec_by4_sse.asm
@@ -42,7 +42,7 @@
 ; arg 5: LEN:  length in bytes (multiple of 16)
 ;
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_128
 %define AES_CBC_DEC_128 aes_cbc_dec_128_sse
diff --git a/lib/sse_t1/aes128_cbc_enc_x4_sse.asm b/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
index a2713c2c..72635f11 100644
--- a/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
@@ -31,7 +31,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define	MOVDQ movdqu ;; assume buffers not aligned
 %macro pxor2 2
diff --git a/lib/sse_t1/aes128_cntr_by8_sse.asm b/lib/sse_t1/aes128_cntr_by8_sse.asm
index 7005d563..8a512c87 100644
--- a/lib/sse_t1/aes128_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes128_cntr_by8_sse.asm
@@ -30,7 +30,7 @@
 %include "include/memcpy.asm"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ; routine to do AES128 CNTR enc/decrypt "by8"
 ; XMM registers are clobbered. Saving/restoring must be done at a higher level
diff --git a/lib/sse_t1/aes128_ecb_by4_sse.asm b/lib/sse_t1/aes128_ecb_by4_sse.asm
index f1fafa27..c42b6c09 100644
--- a/lib/sse_t1/aes128_ecb_by4_sse.asm
+++ b/lib/sse_t1/aes128_ecb_by4_sse.asm
@@ -43,7 +43,7 @@
 ;
 
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_ECB_ENC_256
 %ifndef AES_ECB_ENC_192
diff --git a/lib/sse_t1/aes192_cbc_dec_by4_sse.asm b/lib/sse_t1/aes192_cbc_dec_by4_sse.asm
index 9e7385f6..2849bca6 100644
--- a/lib/sse_t1/aes192_cbc_dec_by4_sse.asm
+++ b/lib/sse_t1/aes192_cbc_dec_by4_sse.asm
@@ -42,7 +42,7 @@
 ; arg 5: LEN:  length in bytes (multiple of 16)
 ;
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_192
 %define AES_CBC_DEC_192 aes_cbc_dec_192_sse
diff --git a/lib/sse_t1/aes192_cbc_enc_x4_sse.asm b/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
index 9ed053e0..ad7bdc95 100644
--- a/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
@@ -31,7 +31,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define	MOVDQ movdqu ;; assume buffers not aligned
 %macro pxor2 2
diff --git a/lib/sse_t1/aes192_cntr_by8_sse.asm b/lib/sse_t1/aes192_cntr_by8_sse.asm
index d0a861dd..d1161c1b 100644
--- a/lib/sse_t1/aes192_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes192_cntr_by8_sse.asm
@@ -29,7 +29,7 @@
 %include "include/memcpy.asm"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ; routine to do AES192 CNTR enc/decrypt "by8"
 ; XMM registers are clobbered. Saving/restoring must be done at a higher level
diff --git a/lib/sse_t1/aes256_cbc_dec_by4_sse.asm b/lib/sse_t1/aes256_cbc_dec_by4_sse.asm
index e8bb6975..2fa763aa 100644
--- a/lib/sse_t1/aes256_cbc_dec_by4_sse.asm
+++ b/lib/sse_t1/aes256_cbc_dec_by4_sse.asm
@@ -43,7 +43,7 @@
 ;
 
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_256
 %define AES_CBC_DEC_256 aes_cbc_dec_256_sse
diff --git a/lib/sse_t1/aes256_cbc_enc_x4_sse.asm b/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
index 66f64efe..837e0148 100644
--- a/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
@@ -31,7 +31,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define	MOVDQ movdqu ;; assume buffers not aligned
 %macro pxor2 2
diff --git a/lib/sse_t1/aes256_cntr_by8_sse.asm b/lib/sse_t1/aes256_cntr_by8_sse.asm
index c9ca9877..3a2d6205 100644
--- a/lib/sse_t1/aes256_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes256_cntr_by8_sse.asm
@@ -30,7 +30,7 @@
 %include "include/memcpy.asm"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ; routine to do AES256 CNTR enc/decrypt "by8"
 ; XMM registers are clobbered. Saving/restoring must be done at a higher level
diff --git a/lib/sse_t1/aes_cfb_sse.asm b/lib/sse_t1/aes_cfb_sse.asm
index 765ef542..586d4d3c 100644
--- a/lib/sse_t1/aes_cfb_sse.asm
+++ b/lib/sse_t1/aes_cfb_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/memcpy.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 ;;; Routines to do 128/256 bit CFB AES encrypt/decrypt operations on one block only.
diff --git a/lib/sse_t1/chacha20_sse.asm b/lib/sse_t1/chacha20_sse.asm
index f2e0cadd..01981dee 100644
--- a/lib/sse_t1/chacha20_sse.asm
+++ b/lib/sse_t1/chacha20_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/imb_job.asm"
 %include "include/memcpy.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/chacha_poly_defines.inc"
 
 mksection .rodata
diff --git a/lib/sse_t1/crc16_x25_sse.asm b/lib/sse_t1/crc16_x25_sse.asm
index 29c56b46..41fd5111 100644
--- a/lib/sse_t1/crc16_x25_sse.asm
+++ b/lib/sse_t1/crc16_x25_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/sse_t1/crc32_by8_sse.asm b/lib/sse_t1/crc32_by8_sse.asm
index 3c4dc401..09a8e4ef 100644
--- a/lib/sse_t1/crc32_by8_sse.asm
+++ b/lib/sse_t1/crc32_by8_sse.asm
@@ -39,7 +39,7 @@
 %include "include/memcpy.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef CRC32_FN
 %define CRC32_FN crc32_by8_sse
diff --git a/lib/sse_t1/crc32_fp_sse.asm b/lib/sse_t1/crc32_fp_sse.asm
index fc10c5be..2ea6732d 100644
--- a/lib/sse_t1/crc32_fp_sse.asm
+++ b/lib/sse_t1/crc32_fp_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/sse_t1/crc32_iuup_sse.asm b/lib/sse_t1/crc32_iuup_sse.asm
index 2ef9bf65..bc9f3c98 100644
--- a/lib/sse_t1/crc32_iuup_sse.asm
+++ b/lib/sse_t1/crc32_iuup_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/sse_t1/crc32_lte_sse.asm b/lib/sse_t1/crc32_lte_sse.asm
index 64d7ae7e..f0b76376 100644
--- a/lib/sse_t1/crc32_lte_sse.asm
+++ b/lib/sse_t1/crc32_lte_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/sse_t1/crc32_refl_by8_sse.asm b/lib/sse_t1/crc32_refl_by8_sse.asm
index b5ab5860..37c39509 100644
--- a/lib/sse_t1/crc32_refl_by8_sse.asm
+++ b/lib/sse_t1/crc32_refl_by8_sse.asm
@@ -39,7 +39,7 @@
 %include "include/memcpy.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef CRC32_REFL_FN
 %define CRC32_REFL_FN crc32_refl_by8_sse
diff --git a/lib/sse_t1/crc32_sctp_sse.asm b/lib/sse_t1/crc32_sctp_sse.asm
index 3d17ac6a..07c56003 100644
--- a/lib/sse_t1/crc32_sctp_sse.asm
+++ b/lib/sse_t1/crc32_sctp_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/sse_t1/crc32_wimax_sse.asm b/lib/sse_t1/crc32_wimax_sse.asm
index e89b0d06..276e58bb 100644
--- a/lib/sse_t1/crc32_wimax_sse.asm
+++ b/lib/sse_t1/crc32_wimax_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/sse_t1/ethernet_fcs_sse.asm b/lib/sse_t1/ethernet_fcs_sse.asm
index 74c10ecf..084ba06e 100644
--- a/lib/sse_t1/ethernet_fcs_sse.asm
+++ b/lib/sse_t1/ethernet_fcs_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl_const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index 9976b9f5..1aef9741 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -116,7 +116,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_sse_avx.asm"
 %include "include/gcm_common.inc"
diff --git a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
index 4490a748..0259fdba 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "sse_t1/snow3g_uea2_by4_sse.asm"
 
 %define SUBMIT_JOB_SNOW3G_UIA2 submit_job_snow3g_uia2_sse
diff --git a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
index efc6f9a7..5d17d5e0 100644
--- a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef SUBMIT_JOB_ZUC128_EEA3
 %define SUBMIT_JOB_ZUC128_EEA3 submit_job_zuc_eea3_no_gfni_sse
diff --git a/lib/sse_t1/md5_x4x2_sse.asm b/lib/sse_t1/md5_x4x2_sse.asm
index b0d568d6..4c8c300d 100644
--- a/lib/sse_t1/md5_x4x2_sse.asm
+++ b/lib/sse_t1/md5_x4x2_sse.asm
@@ -38,7 +38,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata align=64
 default rel
diff --git a/lib/sse_t1/pon_by8_sse.asm b/lib/sse_t1/pon_by8_sse.asm
index f0a4f0b5..01ad6385 100644
--- a/lib/sse_t1/pon_by8_sse.asm
+++ b/lib/sse_t1/pon_by8_sse.asm
@@ -28,7 +28,7 @@
 %include "include/imb_job.asm"
 %include "include/os.asm"
 %include "include/memcpy.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 
diff --git a/lib/sse_t1/sha1_one_block_sse.asm b/lib/sse_t1/sha1_one_block_sse.asm
index 48564a67..995b1ee3 100644
--- a/lib/sse_t1/sha1_one_block_sse.asm
+++ b/lib/sse_t1/sha1_one_block_sse.asm
@@ -28,7 +28,7 @@
 ; SHA1 code, hybrid, rolled, interleaved
 ; Uses SSE instructions
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/sse_t1/sha1_x4_sse.asm b/lib/sse_t1/sha1_x4_sse.asm
index 7994bc1b..5cfe6e0c 100644
--- a/lib/sse_t1/sha1_x4_sse.asm
+++ b/lib/sse_t1/sha1_x4_sse.asm
@@ -30,7 +30,7 @@
 ;%define DO_DBGPRINT
 %include "include/dbgprint.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/sse_t1/sha256_mult_sse.asm b/lib/sse_t1/sha256_mult_sse.asm
index e77fcd27..628bd0f6 100644
--- a/lib/sse_t1/sha256_mult_sse.asm
+++ b/lib/sse_t1/sha256_mult_sse.asm
@@ -40,7 +40,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ;%define DO_DBGPRINT
 %include "include/dbgprint.asm"
diff --git a/lib/sse_t1/sha256_one_block_sse.asm b/lib/sse_t1/sha256_one_block_sse.asm
index 74872e41..1db0163a 100644
--- a/lib/sse_t1/sha256_one_block_sse.asm
+++ b/lib/sse_t1/sha256_one_block_sse.asm
@@ -28,7 +28,7 @@
 ; This code schedules 1 blocks at a time, with 4 lanes per block
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/sse_t1/sha512_one_block_sse.asm b/lib/sse_t1/sha512_one_block_sse.asm
index bc5a26fb..207ce2aa 100644
--- a/lib/sse_t1/sha512_one_block_sse.asm
+++ b/lib/sse_t1/sha512_one_block_sse.asm
@@ -28,7 +28,7 @@
 ; This code schedules 1 blocks at a time, with 4 lanes per block
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %define	MOVDQ movdqu ;; assume buffers not aligned
 
diff --git a/lib/sse_t1/sha512_x2_sse.asm b/lib/sse_t1/sha512_x2_sse.asm
index 999b75a3..bcc618f0 100644
--- a/lib/sse_t1/sha512_x2_sse.asm
+++ b/lib/sse_t1/sha512_x2_sse.asm
@@ -41,7 +41,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ;%define DO_DBGPRINT
 %include "include/dbgprint.asm"
diff --git a/lib/sse_t1/snow3g_uea2_by4_sse.asm b/lib/sse_t1/snow3g_uea2_by4_sse.asm
index 5b3a3561..e49b0d2c 100644
--- a/lib/sse_t1/snow3g_uea2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uea2_by4_sse.asm
@@ -29,7 +29,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/imb_job.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/memcpy.asm"
 %include "include/transpose_sse.asm"
diff --git a/lib/sse_t1/snow_v_sse.asm b/lib/sse_t1/snow_v_sse.asm
index c330c8bb..11b5aa3e 100644
--- a/lib/sse_t1/snow_v_sse.asm
+++ b/lib/sse_t1/snow_v_sse.asm
@@ -34,7 +34,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/imb_job.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 
 %ifndef SNOW_V
diff --git a/lib/sse_t2/sha1_ni_x1_sse.asm b/lib/sse_t2/sha1_ni_x1_sse.asm
index 8022746b..6430f3ee 100644
--- a/lib/sse_t2/sha1_ni_x1_sse.asm
+++ b/lib/sse_t2/sha1_ni_x1_sse.asm
@@ -41,7 +41,7 @@
 %include "include/os.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.asm"
 
 %ifdef LINUX
diff --git a/lib/sse_t2/sha1_ni_x2_sse.asm b/lib/sse_t2/sha1_ni_x2_sse.asm
index 27a61bbc..66b72ef1 100644
--- a/lib/sse_t2/sha1_ni_x2_sse.asm
+++ b/lib/sse_t2/sha1_ni_x2_sse.asm
@@ -41,7 +41,7 @@
 %include "include/os.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.asm"
 
 %ifdef LINUX
diff --git a/lib/sse_t2/sha256_ni_x1_sse.asm b/lib/sse_t2/sha256_ni_x1_sse.asm
index b6a02647..1c802310 100644
--- a/lib/sse_t2/sha256_ni_x1_sse.asm
+++ b/lib/sse_t2/sha256_ni_x1_sse.asm
@@ -41,7 +41,7 @@
 %include "include/os.asm"
 %include "include/cet.inc"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ; resdq = res0 => 16 bytes
 struc frame
diff --git a/lib/sse_t2/sha256_ni_x2_sse.asm b/lib/sse_t2/sha256_ni_x2_sse.asm
index c9aafac1..3dd61af0 100644
--- a/lib/sse_t2/sha256_ni_x2_sse.asm
+++ b/lib/sse_t2/sha256_ni_x2_sse.asm
@@ -42,7 +42,7 @@
 ;%define DO_DBGPRINT
 %include "include/dbgprint.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 ; resdq = res0 => 16 bytes
 struc frame
diff --git a/lib/sse_t3/aes128_cbc_dec_by8_sse.asm b/lib/sse_t3/aes128_cbc_dec_by8_sse.asm
index 862edf5a..a97fe8dd 100644
--- a/lib/sse_t3/aes128_cbc_dec_by8_sse.asm
+++ b/lib/sse_t3/aes128_cbc_dec_by8_sse.asm
@@ -42,7 +42,7 @@
 ; arg 5: LEN:  length in bytes (multiple of 16)
 ;
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_128
 %define AES_CBC_DEC_128 aes_cbc_dec_128_by8_sse
diff --git a/lib/sse_t3/aes128_cbc_enc_x8_sse.asm b/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
index 2888cf23..16deaaf8 100644
--- a/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
@@ -31,7 +31,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %macro PXOR2 2
 	movdqu	XTMP, %2
diff --git a/lib/sse_t3/aes128_ecb_by8_sse.asm b/lib/sse_t3/aes128_ecb_by8_sse.asm
index 375c5ce6..af9ce99b 100644
--- a/lib/sse_t3/aes128_ecb_by8_sse.asm
+++ b/lib/sse_t3/aes128_ecb_by8_sse.asm
@@ -28,7 +28,7 @@
 ; routine to do AES ECB 128 encrypt/decrypt on 16n bytes doing AES by 8
 
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/aes_common.inc"
 
 %ifdef LINUX
diff --git a/lib/sse_t3/aes192_cbc_dec_by8_sse.asm b/lib/sse_t3/aes192_cbc_dec_by8_sse.asm
index c04f546b..23add2d4 100644
--- a/lib/sse_t3/aes192_cbc_dec_by8_sse.asm
+++ b/lib/sse_t3/aes192_cbc_dec_by8_sse.asm
@@ -42,7 +42,7 @@
 ; arg 5: LEN:  length in bytes (multiple of 16)
 ;
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_192
 %define AES_CBC_DEC_192 aes_cbc_dec_192_by8_sse
diff --git a/lib/sse_t3/aes192_cbc_enc_x8_sse.asm b/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
index 68bd9b7a..3f9367fb 100644
--- a/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
@@ -31,7 +31,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %macro PXOR2 2
 	movdqu	XTMP, %2
diff --git a/lib/sse_t3/aes256_cbc_dec_by8_sse.asm b/lib/sse_t3/aes256_cbc_dec_by8_sse.asm
index bc0fb718..f433e4ec 100644
--- a/lib/sse_t3/aes256_cbc_dec_by8_sse.asm
+++ b/lib/sse_t3/aes256_cbc_dec_by8_sse.asm
@@ -43,7 +43,7 @@
 ;
 
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_256
 %define AES_CBC_DEC_256 aes_cbc_dec_256_by8_sse
diff --git a/lib/sse_t3/aes256_cbc_enc_x8_sse.asm b/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
index 851a4a75..7a4d4b54 100644
--- a/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
@@ -31,7 +31,7 @@
 
 %include "include/os.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %macro PXOR2 2
 	movdqu	XTMP, %2
diff --git a/lib/x86_64/aes128_ecbenc_x3.asm b/lib/x86_64/aes128_ecbenc_x3.asm
index 01fbfa98..333fcf5a 100644
--- a/lib/x86_64/aes128_ecbenc_x3.asm
+++ b/lib/x86_64/aes128_ecbenc_x3.asm
@@ -35,7 +35,7 @@
 %include "include/os.asm"
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 %ifdef LINUX
 %define IN	rdi	; arg 1
diff --git a/lib/x86_64/aes_cmac_subkey_gen.asm b/lib/x86_64/aes_cmac_subkey_gen.asm
index 8324f992..26f9a7b5 100644
--- a/lib/x86_64/aes_cmac_subkey_gen.asm
+++ b/lib/x86_64/aes_cmac_subkey_gen.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 ;;; Routines to generate subkeys for AES-CMAC.
diff --git a/lib/x86_64/aes_keyexp_128.asm b/lib/x86_64/aes_keyexp_128.asm
index a6b93306..d0289391 100644
--- a/lib/x86_64/aes_keyexp_128.asm
+++ b/lib/x86_64/aes_keyexp_128.asm
@@ -29,7 +29,7 @@
 %include "include/os.asm"
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 %macro key_expansion_128_sse 0
diff --git a/lib/x86_64/aes_keyexp_192.asm b/lib/x86_64/aes_keyexp_192.asm
index 0d68943f..dc364c77 100644
--- a/lib/x86_64/aes_keyexp_192.asm
+++ b/lib/x86_64/aes_keyexp_192.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 %ifdef LINUX
diff --git a/lib/x86_64/aes_keyexp_256.asm b/lib/x86_64/aes_keyexp_256.asm
index c4b58c86..57d72638 100644
--- a/lib/x86_64/aes_keyexp_256.asm
+++ b/lib/x86_64/aes_keyexp_256.asm
@@ -29,7 +29,7 @@
 %include "include/os.asm"
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 ; Uses the f() function of the aeskeygenassist result
diff --git a/lib/x86_64/clear_regs_mem_fns.asm b/lib/x86_64/clear_regs_mem_fns.asm
index a58c07bf..8adab5e8 100644
--- a/lib/x86_64/clear_regs_mem_fns.asm
+++ b/lib/x86_64/clear_regs_mem_fns.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 %include "include/cet.inc"
 mksection .text
 ;
diff --git a/lib/x86_64/poly1305.asm b/lib/x86_64/poly1305.asm
index 46051ee3..142d1d7b 100644
--- a/lib/x86_64/poly1305.asm
+++ b/lib/x86_64/poly1305.asm
@@ -37,7 +37,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/imb_job.asm"
-%include "include/clear_regs.asm"
+%include "include/clear_regs.inc"
 
 [bits 64]
 default rel
-- 
GitLab


From 2bda5bed8d4a4c96ad68f4112e8f3e32bfa94c03 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 15:56:32 +0000
Subject: [PATCH 021/332] lib: Rename constant_lookup file extension

---
 lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm           | 2 +-
 lib/include/{constant_lookup.asm => constant_lookup.inc} | 5 +++++
 lib/x86_64/constant_lookup_fns.asm                       | 2 +-
 3 files changed, 7 insertions(+), 2 deletions(-)
 rename lib/include/{constant_lookup.asm => constant_lookup.inc} (99%)

diff --git a/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm b/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
index d295d9ab..4faf6cd4 100644
--- a/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
@@ -27,7 +27,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx512.asm"
 %include "include/imb_job.asm"
-%include "include/constant_lookup.asm"
+%include "include/constant_lookup.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/include/constant_lookup.asm b/lib/include/constant_lookup.inc
similarity index 99%
rename from lib/include/constant_lookup.asm
rename to lib/include/constant_lookup.inc
index a0ce4ff6..46d41833 100644
--- a/lib/include/constant_lookup.asm
+++ b/lib/include/constant_lookup.inc
@@ -25,6 +25,9 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
+%ifndef _CONSTANT_LOOKUP_INC_
+%define _CONSTANT_LOOKUP_INC_
+
 extern idx_rows_avx512
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -175,3 +178,5 @@ extern idx_rows_avx512
                                             %%MAP_TAB_0, %%MAP_TAB_1, \
                                             %%MAP_TAB_2, %%MAP_TAB_3, %%KR1
 %endmacro
+
+%endif ;; _CONSTANT_LOOKUP_INC_
diff --git a/lib/x86_64/constant_lookup_fns.asm b/lib/x86_64/constant_lookup_fns.asm
index 2e40f1bb..1532d6e6 100644
--- a/lib/x86_64/constant_lookup_fns.asm
+++ b/lib/x86_64/constant_lookup_fns.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/constant_lookup.asm"
+%include "include/constant_lookup.inc"
 
 mksection .rodata
 default rel
-- 
GitLab


From d7cab9155cb369533239d0d842a4cc137944f738 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:02:43 +0000
Subject: [PATCH 022/332] lib: Rename constants file extension

---
 lib/avx512_t1/des_x16_avx512.asm                              | 2 +-
 lib/avx512_t1/mb_mgr_des_avx512.asm                           | 2 +-
 lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm              | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm          | 2 +-
 lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm | 2 +-
 lib/include/{constants.asm => constants.inc}                  | 0
 lib/include/mb_mgr_datastruct.asm                             | 2 +-
 7 files changed, 6 insertions(+), 6 deletions(-)
 rename lib/include/{constants.asm => constants.inc} (100%)

diff --git a/lib/avx512_t1/des_x16_avx512.asm b/lib/avx512_t1/des_x16_avx512.asm
index 5f431457..5f7caa5c 100644
--- a/lib/avx512_t1/des_x16_avx512.asm
+++ b/lib/avx512_t1/des_x16_avx512.asm
@@ -49,7 +49,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/constants.asm"
+%include "include/constants.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t1/mb_mgr_des_avx512.asm b/lib/avx512_t1/mb_mgr_des_avx512.asm
index 9a36428f..b850b9f3 100644
--- a/lib/avx512_t1/mb_mgr_des_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_des_avx512.asm
@@ -45,7 +45,7 @@
 %include "include/reg_sizes.asm"
 %include "include/imb_job.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/constants.asm"
+%include "include/constants.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
index 83b88ac5..45b707aa 100644
--- a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/imb_job.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/constants.asm"
+%include "include/constants.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
index a77ed945..34035a9e 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/imb_job.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/constants.asm"
+%include "include/constants.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
index e65f32f4..c19e6515 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/imb_job.asm"
 %include "include/mb_mgr_datastruct.asm"
-%include "include/constants.asm"
+%include "include/constants.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/include/constants.asm b/lib/include/constants.inc
similarity index 100%
rename from lib/include/constants.asm
rename to lib/include/constants.inc
diff --git a/lib/include/mb_mgr_datastruct.asm b/lib/include/mb_mgr_datastruct.asm
index 16282046..d0ca500c 100644
--- a/lib/include/mb_mgr_datastruct.asm
+++ b/lib/include/mb_mgr_datastruct.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/datastruct.asm"
-%include "include/constants.asm"
+%include "include/constants.inc"
 
 %ifndef MB_MGR_DATASTRUCT_ASM_INCLUDED
 %define MB_MGR_DATASTRUCT_ASM_INCLUDED
-- 
GitLab


From 21fa2627c2b9d740bd3aaaf9cf015f63d9df8cce Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:08:24 +0000
Subject: [PATCH 023/332] lib: Rename datastruct file extension

---
 .../mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm         | 2 +-
 lib/include/{datastruct.asm => datastruct.inc}              | 6 +++---
 lib/include/imb_job.asm                                     | 2 +-
 lib/include/mb_mgr_datastruct.asm                           | 2 +-
 4 files changed, 6 insertions(+), 6 deletions(-)
 rename lib/include/{datastruct.asm => datastruct.inc} (98%)

diff --git a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
index 1dd3c4af..73d36388 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/mb_mgr_datastruct.asm"
-%include "include/datastruct.asm"
+%include "include/datastruct.inc"
 %include "include/transpose_avx512.asm"
 %include "include/imb_job.asm"
 %include "include/os.asm"
diff --git a/lib/include/datastruct.asm b/lib/include/datastruct.inc
similarity index 98%
rename from lib/include/datastruct.asm
rename to lib/include/datastruct.inc
index 43a49d22..b0af5f99 100644
--- a/lib/include/datastruct.asm
+++ b/lib/include/datastruct.inc
@@ -92,8 +92,8 @@
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%ifndef _DATASTRUCT_ASM_
-%define _DATASTRUCT_ASM_
+%ifndef _DATASTRUCT_INC_
+%define _DATASTRUCT_INC_
 
 ;; START_FIELDS
 %macro START_FIELDS 0
@@ -229,4 +229,4 @@ RES_int %1, 64*(%2), %3
 RES_int	%1, _UNION_SIZE, _UNION_ALIGN
 %endm
 
-%endif ; end ifdef _DATASTRUCT_ASM_
+%endif ; end ifdef _DATASTRUCT_INC_
diff --git a/lib/include/imb_job.asm b/lib/include/imb_job.asm
index 13be1902..4631bbb4 100644
--- a/lib/include/imb_job.asm
+++ b/lib/include/imb_job.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/datastruct.asm"
+%include "include/datastruct.inc"
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;;; Define constants
diff --git a/lib/include/mb_mgr_datastruct.asm b/lib/include/mb_mgr_datastruct.asm
index d0ca500c..6990a503 100644
--- a/lib/include/mb_mgr_datastruct.asm
+++ b/lib/include/mb_mgr_datastruct.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/datastruct.asm"
+%include "include/datastruct.inc"
 %include "include/constants.inc"
 
 %ifndef MB_MGR_DATASTRUCT_ASM_INCLUDED
-- 
GitLab


From 3f785e5317370dcc4f8d98553d235aa109c3aa34 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:13:08 +0000
Subject: [PATCH 024/332] lib: Rename dbgprint file extension

---
 lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm            | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm           | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm           | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm          | 2 +-
 lib/avx2_t1/sha1_x8_avx2.asm                          | 2 +-
 lib/avx2_t1/sha256_oct_avx2.asm                       | 2 +-
 lib/avx2_t1/sha512_x4_avx2.asm                        | 3 +--
 lib/avx512_t1/des_x16_avx512.asm                      | 2 +-
 lib/avx512_t1/mb_mgr_des_avx512.asm                   | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm       | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm      | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm     | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm    | 2 +-
 lib/avx512_t1/sha1_x16_avx512.asm                     | 2 +-
 lib/avx512_t1/sha256_x16_avx512.asm                   | 2 +-
 lib/avx512_t1/sha512_x8_avx512.asm                    | 2 +-
 lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm | 2 +-
 lib/include/{dbgprint.asm => dbgprint.inc}            | 6 +++---
 lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm             | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm            | 2 +-
 lib/sse_t1/sha1_x4_sse.asm                            | 2 +-
 lib/sse_t1/sha256_mult_sse.asm                        | 2 +-
 lib/sse_t1/sha512_x2_sse.asm                          | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm          | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm         | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm        | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm       | 2 +-
 lib/sse_t2/sha1_ni_x1_sse.asm                         | 2 +-
 lib/sse_t2/sha1_ni_x2_sse.asm                         | 2 +-
 lib/sse_t2/sha256_ni_x2_sse.asm                       | 2 +-
 31 files changed, 33 insertions(+), 34 deletions(-)
 rename lib/include/{dbgprint.asm => dbgprint.inc} (99%)

diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
index 9583367c..5428428b 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 extern md5_x8x2_avx2
 
 mksection .rodata
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
index 9ddc9305..e9d7c57b 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
@@ -32,7 +32,7 @@
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 extern md5_x8x2_avx2
 
 %if 1
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
index 1dda74d9..6eda9546 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/reg_sizes.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 extern sha1_x8_avx2
 
 mksection .rodata
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
index d7dbea73..93153b28 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
@@ -31,7 +31,7 @@
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/const.inc"
 extern sha1_x8_avx2
 
diff --git a/lib/avx2_t1/sha1_x8_avx2.asm b/lib/avx2_t1/sha1_x8_avx2.asm
index 739681ae..11370a9c 100644
--- a/lib/avx2_t1/sha1_x8_avx2.asm
+++ b/lib/avx2_t1/sha1_x8_avx2.asm
@@ -36,7 +36,7 @@
 
 %include "include/os.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx2.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx2_t1/sha256_oct_avx2.asm b/lib/avx2_t1/sha256_oct_avx2.asm
index 30a7838a..261e7528 100644
--- a/lib/avx2_t1/sha256_oct_avx2.asm
+++ b/lib/avx2_t1/sha256_oct_avx2.asm
@@ -41,7 +41,7 @@
 
 %include "include/os.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx2.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx2_t1/sha512_x4_avx2.asm b/lib/avx2_t1/sha512_x4_avx2.asm
index 20daacd7..9b4c0695 100644
--- a/lib/avx2_t1/sha512_x4_avx2.asm
+++ b/lib/avx2_t1/sha512_x4_avx2.asm
@@ -42,9 +42,8 @@
 
 %include "include/os.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/transpose_avx2.asm"
-%include "include/dbgprint.asm"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/clear_regs.inc"
 mksection .rodata
diff --git a/lib/avx512_t1/des_x16_avx512.asm b/lib/avx512_t1/des_x16_avx512.asm
index 5f7caa5c..4fe234f9 100644
--- a/lib/avx512_t1/des_x16_avx512.asm
+++ b/lib/avx512_t1/des_x16_avx512.asm
@@ -51,7 +51,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/constants.inc"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/clear_regs.inc"
 
 %ifdef LINUX
diff --git a/lib/avx512_t1/mb_mgr_des_avx512.asm b/lib/avx512_t1/mb_mgr_des_avx512.asm
index b850b9f3..f6ef7303 100644
--- a/lib/avx512_t1/mb_mgr_des_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_des_avx512.asm
@@ -47,7 +47,7 @@
 %include "include/mb_mgr_datastruct.asm"
 %include "include/constants.inc"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/const.inc"
 
 extern docsis_des_x16_enc_avx512
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
index 69b5f5fa..8c56bc4a 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
@@ -47,7 +47,7 @@
 %include "include/clear_regs.inc"
 
 ;; %define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 extern sha1_x16_avx512
 
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
index 586f8a9b..3e628e5f 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
@@ -48,7 +48,7 @@
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 ;; %define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 %use smartalign
 
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
index 79d9aaea..ffdc1d75 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
@@ -46,7 +46,7 @@
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 ;; %define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 extern sha256_x16_avx512
 
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
index 531f4e38..4d975e57 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
@@ -48,7 +48,7 @@
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 ;; %define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 %use smartalign
 
diff --git a/lib/avx512_t1/sha1_x16_avx512.asm b/lib/avx512_t1/sha1_x16_avx512.asm
index 2418052b..3834a550 100644
--- a/lib/avx512_t1/sha1_x16_avx512.asm
+++ b/lib/avx512_t1/sha1_x16_avx512.asm
@@ -39,7 +39,7 @@
 
 %include "include/os.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx512.asm"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/sha256_x16_avx512.asm b/lib/avx512_t1/sha256_x16_avx512.asm
index 7b3d1d54..6b59aada 100644
--- a/lib/avx512_t1/sha256_x16_avx512.asm
+++ b/lib/avx512_t1/sha256_x16_avx512.asm
@@ -39,7 +39,7 @@
 
 %include "include/os.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx512.asm"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/sha512_x8_avx512.asm b/lib/avx512_t1/sha512_x8_avx512.asm
index 58c413d6..0834c582 100644
--- a/lib/avx512_t1/sha512_x8_avx512.asm
+++ b/lib/avx512_t1/sha512_x8_avx512.asm
@@ -41,7 +41,7 @@
 
 %include "include/os.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/transpose_avx512.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
index f3a8bdb4..38c585eb 100644
--- a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
@@ -32,7 +32,7 @@
 %include "include/memcpy.asm"
 %include "include/const.inc"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 %ifndef AES_CBC_MAC
 %define AES_CBC_MAC aes128_cbc_mac_x8
diff --git a/lib/include/dbgprint.asm b/lib/include/dbgprint.inc
similarity index 99%
rename from lib/include/dbgprint.asm
rename to lib/include/dbgprint.inc
index 30fe3dc2..ec6944fb 100644
--- a/lib/include/dbgprint.asm
+++ b/lib/include/dbgprint.inc
@@ -72,8 +72,8 @@
 ; Printing the debug data also resets the write pointer to the beginning,
 ; effectively "deleting" the previous messages.
 ;
-%ifndef DBGPRINT_ASM_INCLUDED
-%define DBGPRINT_ASM_INCLUDED
+%ifndef DBGPRINT_INC_INCLUDED
+%define DBGPRINT_INC_INCLUDED
 
 ;%define DO_DBGPRINT
 %ifdef DO_DBGPRINT
@@ -408,4 +408,4 @@ mksection .text
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %endif ; ifdef 0 ; OLD
 
-%endif ; DBGPRINT_ASM_INCLUDED
+%endif ; DBGPRINT_INC_INCLUDED
diff --git a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
index be832f5b..3407e2c1 100644
--- a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
@@ -33,7 +33,7 @@
 %include "include/memcpy.asm"
 %include "include/const.inc"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 %ifndef NUM_LANES
 %define NUM_LANES 4
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
index 6d578935..418bdf52 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
@@ -31,7 +31,7 @@
 %include "include/reg_sizes.asm"
 
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 extern sha1_mult_sse
 
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
index b8a487be..ce1eabba 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
@@ -33,7 +33,7 @@
 %include "include/const.inc"
 
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 extern sha1_mult_sse
 
diff --git a/lib/sse_t1/sha1_x4_sse.asm b/lib/sse_t1/sha1_x4_sse.asm
index 5cfe6e0c..1550e363 100644
--- a/lib/sse_t1/sha1_x4_sse.asm
+++ b/lib/sse_t1/sha1_x4_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t1/sha256_mult_sse.asm b/lib/sse_t1/sha256_mult_sse.asm
index 628bd0f6..e06aa242 100644
--- a/lib/sse_t1/sha256_mult_sse.asm
+++ b/lib/sse_t1/sha256_mult_sse.asm
@@ -43,7 +43,7 @@
 %include "include/clear_regs.inc"
 
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/sse_t1/sha512_x2_sse.asm b/lib/sse_t1/sha512_x2_sse.asm
index bcc618f0..5ebf3f50 100644
--- a/lib/sse_t1/sha512_x2_sse.asm
+++ b/lib/sse_t1/sha512_x2_sse.asm
@@ -44,7 +44,7 @@
 %include "include/clear_regs.inc"
 
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
index d4a2db0d..2b48775e 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
@@ -48,7 +48,7 @@
 %include "include/reg_sizes.asm"
 
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 extern sha1_ni_x1
 
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
index 893f209e..1773d2e2 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
@@ -49,7 +49,7 @@
 %include "include/memcpy.asm"
 
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 extern sha1_ni
 
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
index 07b284b8..0c726d69 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
@@ -39,7 +39,7 @@
 %include "include/reg_sizes.asm"
 
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 extern sha256_ni_x1
 
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
index 1f48c568..b3a7e047 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
@@ -40,7 +40,7 @@
 %include "include/memcpy.asm"
 
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 
 extern sha256_ni
 
diff --git a/lib/sse_t2/sha1_ni_x1_sse.asm b/lib/sse_t2/sha1_ni_x1_sse.asm
index 6430f3ee..2241f38b 100644
--- a/lib/sse_t2/sha1_ni_x1_sse.asm
+++ b/lib/sse_t2/sha1_ni_x1_sse.asm
@@ -40,7 +40,7 @@
 
 %include "include/os.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.asm"
 
diff --git a/lib/sse_t2/sha1_ni_x2_sse.asm b/lib/sse_t2/sha1_ni_x2_sse.asm
index 66b72ef1..82831e14 100644
--- a/lib/sse_t2/sha1_ni_x2_sse.asm
+++ b/lib/sse_t2/sha1_ni_x2_sse.asm
@@ -40,7 +40,7 @@
 
 %include "include/os.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.asm"
 
diff --git a/lib/sse_t2/sha256_ni_x2_sse.asm b/lib/sse_t2/sha256_ni_x2_sse.asm
index 3dd61af0..8c29aee2 100644
--- a/lib/sse_t2/sha256_ni_x2_sse.asm
+++ b/lib/sse_t2/sha256_ni_x2_sse.asm
@@ -40,7 +40,7 @@
 
 %include "include/os.asm"
 ;%define DO_DBGPRINT
-%include "include/dbgprint.asm"
+%include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.asm"
 %include "include/clear_regs.inc"
 
-- 
GitLab


From f74e025e3420f78de96dfb7ce4941dffa7ba64f5 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:15:47 +0000
Subject: [PATCH 025/332] lib: Rename gcm_keys_avx2_avx512 file extension

---
 lib/avx2_t1/gcm_avx_gen4.asm                                    | 2 +-
 lib/avx512_t1/gcm_avx512.asm                                    | 2 +-
 .../{gcm_keys_avx2_avx512.asm => gcm_keys_avx2_avx512.inc}      | 0
 3 files changed, 2 insertions(+), 2 deletions(-)
 rename lib/include/{gcm_keys_avx2_avx512.asm => gcm_keys_avx2_avx512.inc} (100%)

diff --git a/lib/avx2_t1/gcm_avx_gen4.asm b/lib/avx2_t1/gcm_avx_gen4.asm
index bb66be6b..d645a3bd 100644
--- a/lib/avx2_t1/gcm_avx_gen4.asm
+++ b/lib/avx2_t1/gcm_avx_gen4.asm
@@ -114,7 +114,7 @@
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
-%include "include/gcm_keys_avx2_avx512.asm"
+%include "include/gcm_keys_avx2_avx512.inc"
 %include "include/gcm_common.inc"
 %include "include/memcpy.asm"
 %include "include/cet.inc"
diff --git a/lib/avx512_t1/gcm_avx512.asm b/lib/avx512_t1/gcm_avx512.asm
index ee8e4a57..bebe298d 100644
--- a/lib/avx512_t1/gcm_avx512.asm
+++ b/lib/avx512_t1/gcm_avx512.asm
@@ -115,7 +115,7 @@
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
-%include "include/gcm_keys_avx2_avx512.asm"
+%include "include/gcm_keys_avx2_avx512.inc"
 %include "include/gcm_common.inc"
 %include "include/cet.inc"
 %include "include/mb_mgr_datastruct.asm"
diff --git a/lib/include/gcm_keys_avx2_avx512.asm b/lib/include/gcm_keys_avx2_avx512.inc
similarity index 100%
rename from lib/include/gcm_keys_avx2_avx512.asm
rename to lib/include/gcm_keys_avx2_avx512.inc
-- 
GitLab


From 70a99f3f86e96497a9aeafcaea13cd866f5aaf95 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:21:05 +0000
Subject: [PATCH 026/332] lib: Rename gcm_keys_vaes_avx512 file extension

---
 lib/avx512_t2/gcm_vaes_avx512.inc                               | 2 +-
 .../{gcm_keys_vaes_avx512.asm => gcm_keys_vaes_avx512.inc}      | 0
 2 files changed, 1 insertion(+), 1 deletion(-)
 rename lib/include/{gcm_keys_vaes_avx512.asm => gcm_keys_vaes_avx512.inc} (100%)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index b0363fbc..b3347786 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -118,7 +118,7 @@
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
-%include "include/gcm_keys_vaes_avx512.asm"
+%include "include/gcm_keys_vaes_avx512.inc"
 %include "include/gcm_common.inc"
 %include "include/memcpy.asm"
 %include "include/aes_common.inc"
diff --git a/lib/include/gcm_keys_vaes_avx512.asm b/lib/include/gcm_keys_vaes_avx512.inc
similarity index 100%
rename from lib/include/gcm_keys_vaes_avx512.asm
rename to lib/include/gcm_keys_vaes_avx512.inc
-- 
GitLab


From 1aef873252fff8394d15679ecfc888c0fd086eed Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:27:40 +0000
Subject: [PATCH 027/332] lib: Rename gcm_keys_sse_avx file extension

---
 lib/avx_t1/gcm_avx_gen2.asm                                | 2 +-
 lib/include/{gcm_keys_sse_avx.asm => gcm_keys_sse_avx.inc} | 0
 lib/sse_t1/gcm_sse.inc                                     | 2 +-
 3 files changed, 2 insertions(+), 2 deletions(-)
 rename lib/include/{gcm_keys_sse_avx.asm => gcm_keys_sse_avx.inc} (100%)

diff --git a/lib/avx_t1/gcm_avx_gen2.asm b/lib/avx_t1/gcm_avx_gen2.asm
index 80de7147..df91729d 100644
--- a/lib/avx_t1/gcm_avx_gen2.asm
+++ b/lib/avx_t1/gcm_avx_gen2.asm
@@ -115,7 +115,7 @@
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
-%include "include/gcm_keys_sse_avx.asm"
+%include "include/gcm_keys_sse_avx.inc"
 %include "include/gcm_common.inc"
 %include "include/memcpy.asm"
 %include "include/cet.inc"
diff --git a/lib/include/gcm_keys_sse_avx.asm b/lib/include/gcm_keys_sse_avx.inc
similarity index 100%
rename from lib/include/gcm_keys_sse_avx.asm
rename to lib/include/gcm_keys_sse_avx.inc
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index 1aef9741..f6e055b7 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -118,7 +118,7 @@
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
-%include "include/gcm_keys_sse_avx.asm"
+%include "include/gcm_keys_sse_avx.inc"
 %include "include/gcm_common.inc"
 %include "include/memcpy.asm"
 %include "include/cet.inc"
-- 
GitLab


From 89e291b0d9f786e199853fcd6321e5fcdc891a96 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:32:15 +0000
Subject: [PATCH 028/332] lib: Rename mb_mgr_datastruct file extension

---
 lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm                  | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm                 | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm                 | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm                | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm               | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm              | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm               | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm              | 2 +-
 lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm                | 2 +-
 lib/avx2_t1/md5_x8x2_avx2.asm                               | 2 +-
 lib/avx2_t1/sha1_x8_avx2.asm                                | 2 +-
 lib/avx2_t1/sha256_oct_avx2.asm                             | 2 +-
 lib/avx2_t1/sha512_x4_avx2.asm                              | 2 +-
 lib/avx2_t1/zuc_x8_avx2.asm                                 | 2 +-
 lib/avx512_t1/des_x16_avx512.asm                            | 2 +-
 lib/avx512_t1/gcm_avx512.asm                                | 2 +-
 lib/avx512_t1/mb_mgr_des_avx512.asm                         | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm             | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm            | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm           | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm          | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm           | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm          | 2 +-
 lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm            | 2 +-
 lib/avx512_t1/sha1_x16_avx512.asm                           | 2 +-
 lib/avx512_t1/sha256_x16_avx512.asm                         | 2 +-
 lib/avx512_t1/sha512_x8_avx512.asm                          | 2 +-
 lib/avx512_t1/zuc_x16_avx512.asm                            | 2 +-
 lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm                   | 2 +-
 lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm                  | 2 +-
 lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc                 | 2 +-
 lib/avx512_t2/aes_docsis_dec_avx512.asm                     | 2 +-
 lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/aes_docsis_enc_avx512.asm                     | 2 +-
 lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm        | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm       | 2 +-
 .../mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm | 2 +-
 .../mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm         | 2 +-
 .../mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm         | 2 +-
 lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm              | 2 +-
 lib/avx_t1/aes128_cbc_enc_x8_avx.asm                        | 2 +-
 lib/avx_t1/aes192_cbc_enc_x8_avx.asm                        | 2 +-
 lib/avx_t1/aes256_cbc_enc_x8_avx.asm                        | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm              | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm             | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm             | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm            | 2 +-
 lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm   | 2 +-
 lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm       | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm              | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm             | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm                    | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm                   | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm                   | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm                  | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm                | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm                | 2 +-
 lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm                  | 2 +-
 lib/avx_t1/md5_x4x2_avx.asm                                 | 2 +-
 lib/avx_t1/sha1_x4_avx.asm                                  | 2 +-
 lib/avx_t1/sha256_mult_avx.asm                              | 2 +-
 lib/avx_t1/sha512_x2_avx.asm                                | 2 +-
 lib/avx_t1/zuc_x4_avx.asm                                   | 2 +-
 .../{mb_mgr_datastruct.asm => mb_mgr_datastruct.inc}        | 6 +++---
 lib/sse_t1/aes128_cbc_enc_x4_sse.asm                        | 2 +-
 lib/sse_t1/aes192_cbc_enc_x4_sse.asm                        | 2 +-
 lib/sse_t1/aes256_cbc_enc_x4_sse.asm                        | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm          | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm             | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm            | 2 +-
 lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm   | 2 +-
 lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm              | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm             | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm                    | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm                   | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm                   | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm                  | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm                | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm                | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm                  | 2 +-
 lib/sse_t1/md5_x4x2_sse.asm                                 | 2 +-
 lib/sse_t1/sha1_x4_sse.asm                                  | 2 +-
 lib/sse_t1/sha256_mult_sse.asm                              | 2 +-
 lib/sse_t1/sha512_x2_sse.asm                                | 2 +-
 lib/sse_t1/snow3g_uea2_by4_sse.asm                          | 2 +-
 lib/sse_t1/zuc_x4_sse.asm                                   | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm                | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm               | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm              | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm             | 2 +-
 lib/sse_t2/sha1_ni_x1_sse.asm                               | 2 +-
 lib/sse_t2/sha1_ni_x2_sse.asm                               | 2 +-
 lib/sse_t2/sha256_ni_x1_sse.asm                             | 2 +-
 lib/sse_t2/sha256_ni_x2_sse.asm                             | 2 +-
 lib/sse_t3/aes128_cbc_enc_x8_sse.asm                        | 2 +-
 lib/sse_t3/aes192_cbc_enc_x8_sse.asm                        | 2 +-
 lib/sse_t3/aes256_cbc_enc_x8_sse.asm                        | 2 +-
 108 files changed, 110 insertions(+), 110 deletions(-)
 rename lib/include/{mb_mgr_datastruct.asm => mb_mgr_datastruct.inc} (99%)

diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
index 5428428b..179ab193 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
index e9d7c57b..785ced50 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.asm"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
index 6eda9546..546d5f29 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
index 93153b28..d05a3fbe 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 ;%define DO_DBGPRINT
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
index 7b6d3746..1a023948 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 extern sha256_oct_avx2
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
index 30575b35..40b43f69 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
index 1c13d9dc..0e4369a8 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 extern sha512_x4_avx2
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
index 7b87b763..b5156103 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
index e0fca984..05291398 100644
--- a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx2_t1/md5_x8x2_avx2.asm b/lib/avx2_t1/md5_x8x2_avx2.asm
index f4740d81..81e2114b 100644
--- a/lib/avx2_t1/md5_x8x2_avx2.asm
+++ b/lib/avx2_t1/md5_x8x2_avx2.asm
@@ -37,7 +37,7 @@
 ;; clobbers ymm0-15
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx2.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx2_t1/sha1_x8_avx2.asm b/lib/avx2_t1/sha1_x8_avx2.asm
index 11370a9c..06667fca 100644
--- a/lib/avx2_t1/sha1_x8_avx2.asm
+++ b/lib/avx2_t1/sha1_x8_avx2.asm
@@ -37,7 +37,7 @@
 %include "include/os.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx2.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx2_t1/sha256_oct_avx2.asm b/lib/avx2_t1/sha256_oct_avx2.asm
index 261e7528..5bd90a73 100644
--- a/lib/avx2_t1/sha256_oct_avx2.asm
+++ b/lib/avx2_t1/sha256_oct_avx2.asm
@@ -42,7 +42,7 @@
 %include "include/os.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx2.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx2_t1/sha512_x4_avx2.asm b/lib/avx2_t1/sha512_x4_avx2.asm
index 9b4c0695..e0f31552 100644
--- a/lib/avx2_t1/sha512_x4_avx2.asm
+++ b/lib/avx2_t1/sha512_x4_avx2.asm
@@ -44,7 +44,7 @@
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/transpose_avx2.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 mksection .rodata
 default rel
diff --git a/lib/avx2_t1/zuc_x8_avx2.asm b/lib/avx2_t1/zuc_x8_avx2.asm
index 20877dd0..d3c6334c 100644
--- a/lib/avx2_t1/zuc_x8_avx2.asm
+++ b/lib/avx2_t1/zuc_x8_avx2.asm
@@ -30,7 +30,7 @@
 %include "include/zuc_sbox.inc"
 %include "include/transpose_avx2.asm"
 %include "include/memcpy.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
 
 %ifdef LINUX
diff --git a/lib/avx512_t1/des_x16_avx512.asm b/lib/avx512_t1/des_x16_avx512.asm
index 4fe234f9..5c4f0056 100644
--- a/lib/avx512_t1/des_x16_avx512.asm
+++ b/lib/avx512_t1/des_x16_avx512.asm
@@ -48,7 +48,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/avx512_t1/gcm_avx512.asm b/lib/avx512_t1/gcm_avx512.asm
index bebe298d..95eeca66 100644
--- a/lib/avx512_t1/gcm_avx512.asm
+++ b/lib/avx512_t1/gcm_avx512.asm
@@ -118,7 +118,7 @@
 %include "include/gcm_keys_avx2_avx512.inc"
 %include "include/gcm_common.inc"
 %include "include/cet.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/imb_job.asm"
 %include "include/memcpy.asm"
 %include "include/error.inc"
diff --git a/lib/avx512_t1/mb_mgr_des_avx512.asm b/lib/avx512_t1/mb_mgr_des_avx512.asm
index f6ef7303..edafc598 100644
--- a/lib/avx512_t1/mb_mgr_des_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_des_avx512.asm
@@ -44,7 +44,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
index 8c56bc4a..560578e3 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
@@ -42,7 +42,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
index 3e628e5f..6e3a5a59 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
@@ -42,7 +42,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
index ffdc1d75..4dc47ac4 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
@@ -42,7 +42,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 ;; %define DO_DBGPRINT
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
index 4d975e57..bf300ad8 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
@@ -42,7 +42,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
index 4098762d..ac12b0a6 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
@@ -34,7 +34,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
index 5a3186de..83e2e8cf 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
@@ -34,7 +34,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
index 45b707aa..58a4b264 100644
--- a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t1/sha1_x16_avx512.asm b/lib/avx512_t1/sha1_x16_avx512.asm
index 3834a550..00aa68bf 100644
--- a/lib/avx512_t1/sha1_x16_avx512.asm
+++ b/lib/avx512_t1/sha1_x16_avx512.asm
@@ -40,7 +40,7 @@
 %include "include/os.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx512.asm"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t1/sha256_x16_avx512.asm b/lib/avx512_t1/sha256_x16_avx512.asm
index 6b59aada..aec5da73 100644
--- a/lib/avx512_t1/sha256_x16_avx512.asm
+++ b/lib/avx512_t1/sha256_x16_avx512.asm
@@ -40,7 +40,7 @@
 %include "include/os.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx512.asm"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t1/sha512_x8_avx512.asm b/lib/avx512_t1/sha512_x8_avx512.asm
index 0834c582..50b6b2e5 100644
--- a/lib/avx512_t1/sha512_x8_avx512.asm
+++ b/lib/avx512_t1/sha512_x8_avx512.asm
@@ -42,7 +42,7 @@
 %include "include/os.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx512.asm"
 %include "include/clear_regs.inc"
 %define APPEND(a,b) a %+ b
diff --git a/lib/avx512_t1/zuc_x16_avx512.asm b/lib/avx512_t1/zuc_x16_avx512.asm
index 0b1a26d9..4b89fdc4 100644
--- a/lib/avx512_t1/zuc_x16_avx512.asm
+++ b/lib/avx512_t1/zuc_x16_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/zuc_sbox.inc"
 %include "include/transpose_avx512.asm"
 %include "include/const.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
 %define APPEND(a,b) a %+ b
 %define APPEND3(a,b,c) a %+ b %+ c
diff --git a/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm b/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
index 68afed5d..e52bf064 100644
--- a/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
@@ -28,7 +28,7 @@
 ;;; routines to do 128/192/256 bit CBC AES encrypt
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm b/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
index 30d753ab..8d9bd685 100644
--- a/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
@@ -28,7 +28,7 @@
 ;;; routines to do 128 bit AES in CBCS mode encryption
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
index 158ce9bb..142049b5 100644
--- a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
+++ b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
@@ -32,7 +32,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/imb_job.asm"
 %include "include/memcpy.asm"
 %include "include/aes_common.inc"
diff --git a/lib/avx512_t2/aes_docsis_dec_avx512.asm b/lib/avx512_t2/aes_docsis_dec_avx512.asm
index ae699dd7..f8fbb2d9 100644
--- a/lib/avx512_t2/aes_docsis_dec_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/reg_sizes.asm"
 %include "include/os.asm"
 %include "include/clear_regs.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 
 ;; In System V AMD64 ABI
 ;;	callee saves: RBX, RBP, R12-R15
diff --git a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
index dcc839e2..d3c0fd2a 100644
--- a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
@@ -31,7 +31,7 @@
 %include "include/os.asm"
 %include "include/clear_regs.inc"
 %include "include/aes_common.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 
 default rel
 
diff --git a/lib/avx512_t2/aes_docsis_enc_avx512.asm b/lib/avx512_t2/aes_docsis_enc_avx512.asm
index b9df1ea1..af19642f 100644
--- a/lib/avx512_t2/aes_docsis_enc_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_avx512.asm
@@ -32,7 +32,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
index c9462c17..0eff8729 100644
--- a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
@@ -32,7 +32,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
index 34035a9e..70f0ff36 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
index b1102ae2..98e0701d 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
index 296f208d..28b68742 100644
--- a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 %include "include/memcpy.asm"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
index 2ce795fb..64158591 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
index f343297a..bda2e076 100644
--- a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
index 73d36388..f4305123 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/datastruct.inc"
 %include "include/transpose_avx512.asm"
 %include "include/imb_job.asm"
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
index c19e6515..7dc3bad1 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm b/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
index 4faf6cd4..424fdd3f 100644
--- a/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
@@ -24,7 +24,7 @@
 ;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx512.asm"
 %include "include/imb_job.asm"
 %include "include/constant_lookup.inc"
diff --git a/lib/avx_t1/aes128_cbc_enc_x8_avx.asm b/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
index 95a73fe5..aaa57dfb 100644
--- a/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
@@ -30,7 +30,7 @@
 ;; clobbers all registers except for ARG1 and rbp
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 %define	VMOVDQ vmovdqu ;; assume buffers not aligned
diff --git a/lib/avx_t1/aes192_cbc_enc_x8_avx.asm b/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
index 7a6acf94..b14eb13e 100644
--- a/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
@@ -30,7 +30,7 @@
 ;; clobbers all registers except for ARG1 and rbp
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 %define	VMOVDQ vmovdqu ;; assume buffers not aligned
diff --git a/lib/avx_t1/aes256_cbc_enc_x8_avx.asm b/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
index 5dbf1d33..52186e60 100644
--- a/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
@@ -30,7 +30,7 @@
 ;; clobbers all registers except for ARG1 and rbp
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 %define	VMOVDQ vmovdqu ;; assume buffers not aligned
diff --git a/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
index c0a68a4f..ca2aa2aa 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 %ifndef AES_CBC_ENC_X8
diff --git a/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
index e44dadeb..63e5e30b 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 
diff --git a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
index 85148570..021a6090 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 %define NUM_LANES 8
diff --git a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
index a18c5dd3..a2513f55 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 
diff --git a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
index fc82044e..53fe73ab 100644
--- a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 %include "include/memcpy.asm"
diff --git a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
index 38c585eb..177c443b 100644
--- a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
index 57f10267..1e64cc83 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 %ifndef AES_XCBC_X8
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
index 525d4d24..e8a86314 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 %include "include/memcpy.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
index f8ab51e4..0bae3377 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 extern md5_x4x2_avx
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
index e74f729b..87a83df5 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.asm"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
index 01611f54..a2a0ec57 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 extern sha1_mult_avx
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
index 160e3373..56cbddf7 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
index 7ce1825f..81923965 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 extern sha_256_mult_avx
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
index 09894723..5085535a 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
index e7958a81..310bbc20 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 extern sha512_x2_avx
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
index bd2d76d0..9b40c5eb 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
index b0a36672..5be5a4ed 100644
--- a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx_t1/md5_x4x2_avx.asm b/lib/avx_t1/md5_x4x2_avx.asm
index 59f77e0f..77c772b8 100644
--- a/lib/avx_t1/md5_x4x2_avx.asm
+++ b/lib/avx_t1/md5_x4x2_avx.asm
@@ -37,7 +37,7 @@
 ;; clobbers xmm0-15
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 extern MD5_TABLE
diff --git a/lib/avx_t1/sha1_x4_avx.asm b/lib/avx_t1/sha1_x4_avx.asm
index 6a80fcbe..b9c44431 100644
--- a/lib/avx_t1/sha1_x4_avx.asm
+++ b/lib/avx_t1/sha1_x4_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 mksection .rodata
diff --git a/lib/avx_t1/sha256_mult_avx.asm b/lib/avx_t1/sha256_mult_avx.asm
index c8af8323..4776ac72 100644
--- a/lib/avx_t1/sha256_mult_avx.asm
+++ b/lib/avx_t1/sha256_mult_avx.asm
@@ -39,7 +39,7 @@
 ;; clobbers xmm0-15
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 extern K256_4
diff --git a/lib/avx_t1/sha512_x2_avx.asm b/lib/avx_t1/sha512_x2_avx.asm
index ca82f7b8..533b6668 100644
--- a/lib/avx_t1/sha512_x2_avx.asm
+++ b/lib/avx_t1/sha512_x2_avx.asm
@@ -40,7 +40,7 @@
 ;; clobbers xmm0-15
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 extern K512_2
 
diff --git a/lib/avx_t1/zuc_x4_avx.asm b/lib/avx_t1/zuc_x4_avx.asm
index 574e54ea..9524fa60 100644
--- a/lib/avx_t1/zuc_x4_avx.asm
+++ b/lib/avx_t1/zuc_x4_avx.asm
@@ -29,7 +29,7 @@
 %include "include/reg_sizes.asm"
 %include "include/zuc_sbox.inc"
 %include "include/memcpy.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
 %include "include/const.inc"
 
diff --git a/lib/include/mb_mgr_datastruct.asm b/lib/include/mb_mgr_datastruct.inc
similarity index 99%
rename from lib/include/mb_mgr_datastruct.asm
rename to lib/include/mb_mgr_datastruct.inc
index 6990a503..ec7a2c6f 100644
--- a/lib/include/mb_mgr_datastruct.asm
+++ b/lib/include/mb_mgr_datastruct.inc
@@ -28,8 +28,8 @@
 %include "include/datastruct.inc"
 %include "include/constants.inc"
 
-%ifndef MB_MGR_DATASTRUCT_ASM_INCLUDED
-%define MB_MGR_DATASTRUCT_ASM_INCLUDED
+%ifndef MB_MGR_DATASTRUCT_INC_INCLUDED
+%define MB_MGR_DATASTRUCT_INC_INCLUDED
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;;; Define constants
@@ -493,4 +493,4 @@ _snow3g_args_FSM_3   equ _snow3g_args + __snow3g_arg_FSM_3
 _snow3g_args_LD_ST_MASK       equ _snow3g_args + __snow3g_arg_LD_ST_MASK
 _snow3g_args_byte_length      equ _snow3g_args + __snow3g_arg_byte_length
 
-%endif ;; MB_MGR_DATASTRUCT_ASM_INCLUDED
+%endif ;; MB_MGR_DATASTRUCT_INC_INCLUDED
diff --git a/lib/sse_t1/aes128_cbc_enc_x4_sse.asm b/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
index 72635f11..45b85737 100644
--- a/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
@@ -30,7 +30,7 @@
 ;;; Updates In and Out pointers at end
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 %define	MOVDQ movdqu ;; assume buffers not aligned
diff --git a/lib/sse_t1/aes192_cbc_enc_x4_sse.asm b/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
index ad7bdc95..15c7deb9 100644
--- a/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
@@ -30,7 +30,7 @@
 ;;; Updates In and Out pointers at end
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 %define	MOVDQ movdqu ;; assume buffers not aligned
diff --git a/lib/sse_t1/aes256_cbc_enc_x4_sse.asm b/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
index 837e0148..45514395 100644
--- a/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
@@ -30,7 +30,7 @@
 ;;; Updates In and Out pointers at end
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 %define	MOVDQ movdqu ;; assume buffers not aligned
diff --git a/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
index 35362ca7..8102d1e1 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 
 %include "include/reg_sizes.asm"
 
diff --git a/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
index 0c67da09..956e0be1 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
index 54ec68b4..98f81976 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 %define NUM_LANES 4
diff --git a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
index 396fb202..45e1343c 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 
diff --git a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
index 7e12dedd..77325f5a 100644
--- a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 %include "include/memcpy.asm"
diff --git a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
index 3407e2c1..56f8e428 100644
--- a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
index 8d765e99..fc78cc89 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 %ifndef AES_XCBC_X4
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
index 73afe3e5..f90dec33 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/const.inc"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %ifndef AES_XCBC_X4
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
index 5a95d448..bd7632df 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 extern md5_x4x2_sse
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
index 0729251f..cb27367a 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.asm"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
index 418bdf52..7ddfbb8d 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 ;%define DO_DBGPRINT
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
index ce1eabba..7c8b608d 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
index 63d94c15..b217b81b 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 extern sha_256_mult_sse
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
index 7a8e6aa4..b3eed6d6 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
index 0b6d1be0..7587658f 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 extern sha512_x2_sse
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
index 78a6778b..6f77c983 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 %include "include/const.inc"
diff --git a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
index d06c403f..3cd7db42 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "sse_t1/snow3g_uea2_by4_sse.asm"
 
diff --git a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
index 0259fdba..3933d239 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "sse_t1/snow3g_uea2_by4_sse.asm"
diff --git a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
index 5d17d5e0..14b0411f 100644
--- a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/md5_x4x2_sse.asm b/lib/sse_t1/md5_x4x2_sse.asm
index 4c8c300d..7748f53d 100644
--- a/lib/sse_t1/md5_x4x2_sse.asm
+++ b/lib/sse_t1/md5_x4x2_sse.asm
@@ -37,7 +37,7 @@
 ;; clobbers xmm0-15
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 mksection .rodata align=64
diff --git a/lib/sse_t1/sha1_x4_sse.asm b/lib/sse_t1/sha1_x4_sse.asm
index 1550e363..9c873244 100644
--- a/lib/sse_t1/sha1_x4_sse.asm
+++ b/lib/sse_t1/sha1_x4_sse.asm
@@ -29,7 +29,7 @@
 
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 mksection .rodata
diff --git a/lib/sse_t1/sha256_mult_sse.asm b/lib/sse_t1/sha256_mult_sse.asm
index e06aa242..f45adfd3 100644
--- a/lib/sse_t1/sha256_mult_sse.asm
+++ b/lib/sse_t1/sha256_mult_sse.asm
@@ -39,7 +39,7 @@
 ;; clobbers xmm0-15
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 ;%define DO_DBGPRINT
diff --git a/lib/sse_t1/sha512_x2_sse.asm b/lib/sse_t1/sha512_x2_sse.asm
index 5ebf3f50..8cadb13c 100644
--- a/lib/sse_t1/sha512_x2_sse.asm
+++ b/lib/sse_t1/sha512_x2_sse.asm
@@ -40,7 +40,7 @@
 ;; clobbers xmm0-15
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 ;%define DO_DBGPRINT
diff --git a/lib/sse_t1/snow3g_uea2_by4_sse.asm b/lib/sse_t1/snow3g_uea2_by4_sse.asm
index e49b0d2c..c0e354bf 100644
--- a/lib/sse_t1/snow3g_uea2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uea2_by4_sse.asm
@@ -30,7 +30,7 @@
 %include "include/memcpy.asm"
 %include "include/imb_job.asm"
 %include "include/clear_regs.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.asm"
 %include "include/transpose_sse.asm"
 
diff --git a/lib/sse_t1/zuc_x4_sse.asm b/lib/sse_t1/zuc_x4_sse.asm
index c1410580..f79118dd 100644
--- a/lib/sse_t1/zuc_x4_sse.asm
+++ b/lib/sse_t1/zuc_x4_sse.asm
@@ -29,7 +29,7 @@
 %include "include/reg_sizes.asm"
 %include "include/zuc_sbox.inc"
 %include "include/memcpy.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/const.inc"
 
 %ifndef ZUC_CIPHER_4
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
index 2b48775e..037cd6d1 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
@@ -44,7 +44,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 ;%define DO_DBGPRINT
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
index 1773d2e2..5891ab1f 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
@@ -44,7 +44,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
index 0c726d69..ea5ceae3 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
@@ -35,7 +35,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
 ;%define DO_DBGPRINT
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
index b3a7e047..8e841bbd 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
@@ -35,7 +35,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
 
diff --git a/lib/sse_t2/sha1_ni_x1_sse.asm b/lib/sse_t2/sha1_ni_x1_sse.asm
index 2241f38b..141b3668 100644
--- a/lib/sse_t2/sha1_ni_x1_sse.asm
+++ b/lib/sse_t2/sha1_ni_x1_sse.asm
@@ -42,7 +42,7 @@
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/clear_regs.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 
 %ifdef LINUX
 %define arg1	rdi
diff --git a/lib/sse_t2/sha1_ni_x2_sse.asm b/lib/sse_t2/sha1_ni_x2_sse.asm
index 82831e14..ef613a6d 100644
--- a/lib/sse_t2/sha1_ni_x2_sse.asm
+++ b/lib/sse_t2/sha1_ni_x2_sse.asm
@@ -42,7 +42,7 @@
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/clear_regs.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 
 %ifdef LINUX
 %define arg1	rdi
diff --git a/lib/sse_t2/sha256_ni_x1_sse.asm b/lib/sse_t2/sha256_ni_x1_sse.asm
index 1c802310..77380ebb 100644
--- a/lib/sse_t2/sha256_ni_x1_sse.asm
+++ b/lib/sse_t2/sha256_ni_x1_sse.asm
@@ -40,7 +40,7 @@
 
 %include "include/os.asm"
 %include "include/cet.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 ; resdq = res0 => 16 bytes
diff --git a/lib/sse_t2/sha256_ni_x2_sse.asm b/lib/sse_t2/sha256_ni_x2_sse.asm
index 8c29aee2..13361ebd 100644
--- a/lib/sse_t2/sha256_ni_x2_sse.asm
+++ b/lib/sse_t2/sha256_ni_x2_sse.asm
@@ -41,7 +41,7 @@
 %include "include/os.asm"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 ; resdq = res0 => 16 bytes
diff --git a/lib/sse_t3/aes128_cbc_enc_x8_sse.asm b/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
index 16deaaf8..fc7b3641 100644
--- a/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
@@ -30,7 +30,7 @@
 ;;; Updates In and Out pointers at end
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 %macro PXOR2 2
diff --git a/lib/sse_t3/aes192_cbc_enc_x8_sse.asm b/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
index 3f9367fb..86afe4b1 100644
--- a/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
@@ -30,7 +30,7 @@
 ;; clobbers all registers except for ARG1 and rbp
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 %macro PXOR2 2
diff --git a/lib/sse_t3/aes256_cbc_enc_x8_sse.asm b/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
index 7a4d4b54..6cb2cef9 100644
--- a/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
@@ -30,7 +30,7 @@
 ;; clobbers all registers except for ARG1 and rbp
 
 %include "include/os.asm"
-%include "include/mb_mgr_datastruct.asm"
+%include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
 %macro PXOR2 2
-- 
GitLab


From 350310c1d2f747145c75f3bd88d5befa16781521 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:36:44 +0000
Subject: [PATCH 029/332] lib: Rename imb_job file extension

---
 lib/avx2_t1/chacha20_avx2.asm                                   | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm                      | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm                     | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm                     | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm                    | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm                   | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm                  | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm                   | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm                  | 2 +-
 lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm                    | 2 +-
 lib/avx512_t1/chacha20_avx512.asm                               | 2 +-
 lib/avx512_t1/gcm_avx512.asm                                    | 2 +-
 lib/avx512_t1/mb_mgr_des_avx512.asm                             | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm                 | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm                | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm               | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm              | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm               | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm              | 2 +-
 lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm                | 2 +-
 lib/avx512_t1/poly_avx512.asm                                   | 2 +-
 lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc                     | 2 +-
 lib/avx512_t2/aes_docsis_dec_avx512.asm                         | 2 +-
 lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm                    | 2 +-
 lib/avx512_t2/aes_docsis_enc_avx512.asm                         | 2 +-
 lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm                    | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm            | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm           | 2 +-
 .../mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm         | 2 +-
 .../mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm         | 2 +-
 lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm   | 2 +-
 lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm   | 2 +-
 lib/avx512_t2/poly_fma_avx512.asm                               | 2 +-
 lib/avx512_t2/pon_vaes_avx512.asm                               | 2 +-
 lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm                  | 2 +-
 lib/avx_t1/aes128_cntr_by8_avx.asm                              | 2 +-
 lib/avx_t1/aes256_cntr_by8_avx.asm                              | 2 +-
 lib/avx_t1/chacha20_avx.asm                                     | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm                  | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm                | 2 +-
 lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm       | 2 +-
 lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm           | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm                  | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm                        | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm                       | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm                       | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm                      | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm                     | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm                    | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm                     | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm                    | 2 +-
 lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm                      | 2 +-
 lib/avx_t1/pon_by8_avx.asm                                      | 2 +-
 lib/avx_t1/snow_v_avx.asm                                       | 2 +-
 lib/include/{imb_job.asm => imb_job.inc}                        | 0
 lib/sse_t1/aes128_cntr_by8_sse.asm                              | 2 +-
 lib/sse_t1/aes256_cntr_by8_sse.asm                              | 2 +-
 lib/sse_t1/chacha20_sse.asm                                     | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm               | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm              | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm                | 2 +-
 lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm                  | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm                        | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm                       | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm                       | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm                      | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm                     | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm                    | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm                     | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm                    | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm                      | 2 +-
 lib/sse_t1/pon_by8_sse.asm                                      | 2 +-
 lib/sse_t1/snow3g_uea2_by4_sse.asm                              | 2 +-
 lib/sse_t1/snow_v_sse.asm                                       | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm                    | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm                   | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm                  | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm                 | 2 +-
 lib/x86_64/poly1305.asm                                         | 2 +-
 89 files changed, 88 insertions(+), 88 deletions(-)
 rename lib/include/{imb_job.asm => imb_job.inc} (100%)

diff --git a/lib/avx2_t1/chacha20_avx2.asm b/lib/avx2_t1/chacha20_avx2.asm
index a17a2126..b28fd71d 100644
--- a/lib/avx2_t1/chacha20_avx2.asm
+++ b/lib/avx2_t1/chacha20_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/memcpy.asm"
 %include "include/clear_regs.inc"
 %include "include/transpose_avx2.asm"
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
index 179ab193..4ac07d5f 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 ;%define DO_DBGPRINT
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
index 785ced50..2aab0e22 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.asm"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
index 546d5f29..b55fc571 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 ;%define DO_DBGPRINT
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
index d05a3fbe..74b293b5 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
index 1a023948..e53e3259 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
index 40b43f69..a2fc88bf 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
index 0e4369a8..f46824e7 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
index b5156103..e7e3f812 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
index 05291398..db79954d 100644
--- a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/chacha20_avx512.asm b/lib/avx512_t1/chacha20_avx512.asm
index be15dd84..47278636 100644
--- a/lib/avx512_t1/chacha20_avx512.asm
+++ b/lib/avx512_t1/chacha20_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/gcm_avx512.asm b/lib/avx512_t1/gcm_avx512.asm
index 95eeca66..be5ffda5 100644
--- a/lib/avx512_t1/gcm_avx512.asm
+++ b/lib/avx512_t1/gcm_avx512.asm
@@ -119,7 +119,7 @@
 %include "include/gcm_common.inc"
 %include "include/cet.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/memcpy.asm"
 %include "include/error.inc"
 
diff --git a/lib/avx512_t1/mb_mgr_des_avx512.asm b/lib/avx512_t1/mb_mgr_des_avx512.asm
index edafc598..e5618c69 100644
--- a/lib/avx512_t1/mb_mgr_des_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_des_avx512.asm
@@ -43,7 +43,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
 ;%define DO_DBGPRINT
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
index 560578e3..402b21cb 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
@@ -41,7 +41,7 @@
 ;; Clobbers ZMM0-31
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
index 6e3a5a59..8a0c7764 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
@@ -41,7 +41,7 @@
 ;; Clobbers ZMM0-31
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
index 4dc47ac4..2ba22793 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
@@ -41,7 +41,7 @@
 ;; Clobbers ZMM0-31
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
index bf300ad8..59b0cb95 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
@@ -41,7 +41,7 @@
 ;; Clobbers ZMM0-31
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
index ac12b0a6..5e58d2a0 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
@@ -33,7 +33,7 @@
 ;; Clobbers ZMM0-31
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
index 83e2e8cf..938339a2 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
@@ -33,7 +33,7 @@
 ;; Clobbers ZMM0-31
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
index 58a4b264..b48044ee 100644
--- a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/poly_avx512.asm b/lib/avx512_t1/poly_avx512.asm
index 1b57a9be..73ac5f19 100644
--- a/lib/avx512_t1/poly_avx512.asm
+++ b/lib/avx512_t1/poly_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 
 [bits 64]
diff --git a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
index 142049b5..a371f776 100644
--- a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
+++ b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
@@ -33,7 +33,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/memcpy.asm"
 %include "include/aes_common.inc"
 %include "include/const.inc"
diff --git a/lib/avx512_t2/aes_docsis_dec_avx512.asm b/lib/avx512_t2/aes_docsis_dec_avx512.asm
index f8fbb2d9..15db9603 100644
--- a/lib/avx512_t2/aes_docsis_dec_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 %use smartalign
 
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/reg_sizes.asm"
 %include "include/os.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
index d3c0fd2a..b755342d 100644
--- a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 %use smartalign
 
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/reg_sizes.asm"
 %include "include/os.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/aes_docsis_enc_avx512.asm b/lib/avx512_t2/aes_docsis_enc_avx512.asm
index af19642f..08786604 100644
--- a/lib/avx512_t2/aes_docsis_enc_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_avx512.asm
@@ -31,7 +31,7 @@
 %use smartalign
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
index 0eff8729..c4785dc1 100644
--- a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
@@ -31,7 +31,7 @@
 %use smartalign
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
index 70f0ff36..58b9a66b 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
index 98e0701d..07ba1fcf 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
index 28b68742..9415f896 100644
--- a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
index 64158591..a79a4d33 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
index bda2e076..296a8639 100644
--- a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
index f4305123..e66760a5 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/mb_mgr_datastruct.inc"
 %include "include/datastruct.inc"
 %include "include/transpose_avx512.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/os.asm"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
index 7dc3bad1..101c0dd6 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t2/poly_fma_avx512.asm b/lib/avx512_t2/poly_fma_avx512.asm
index 31b3373d..8f70d7d9 100644
--- a/lib/avx512_t2/poly_fma_avx512.asm
+++ b/lib/avx512_t2/poly_fma_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
 
diff --git a/lib/avx512_t2/pon_vaes_avx512.asm b/lib/avx512_t2/pon_vaes_avx512.asm
index f51acac5..c13b6033 100644
--- a/lib/avx512_t2/pon_vaes_avx512.asm
+++ b/lib/avx512_t2/pon_vaes_avx512.asm
@@ -27,7 +27,7 @@
 
 %use smartalign
 
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/os.asm"
 %include "include/memcpy.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm b/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
index 424fdd3f..c4948183 100644
--- a/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 %include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx512.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/constant_lookup.inc"
 
 mksection .rodata
diff --git a/lib/avx_t1/aes128_cntr_by8_avx.asm b/lib/avx_t1/aes128_cntr_by8_avx.asm
index ec3ea80a..de89215e 100644
--- a/lib/avx_t1/aes128_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes128_cntr_by8_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/memcpy.asm"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/aes256_cntr_by8_avx.asm b/lib/avx_t1/aes256_cntr_by8_avx.asm
index 7c532b0d..652c2931 100644
--- a/lib/avx_t1/aes256_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes256_cntr_by8_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/memcpy.asm"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/chacha20_avx.asm b/lib/avx_t1/chacha20_avx.asm
index 42fd9b8f..7f37870b 100644
--- a/lib/avx_t1/chacha20_avx.asm
+++ b/lib/avx_t1/chacha20_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/memcpy.asm"
 %include "include/clear_regs.inc"
 %include "include/chacha_poly_defines.inc"
diff --git a/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
index ca2aa2aa..1e8fd40f 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
index 63e5e30b..c86f1efc 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
index 021a6090..45e388b1 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
index a2513f55..300d1de9 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
index 53fe73ab..01b820a6 100644
--- a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
index 177c443b..80b2422c 100644
--- a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
index 1e64cc83..218288c7 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
index e8a86314..7b3cd45d 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
index 0bae3377..76f3283d 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
index 87a83df5..2902392d 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.asm"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
index a2a0ec57..b2ac1929 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
index 56cbddf7..8da8938f 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
index 81923965..675117b4 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
index 5085535a..93b1f529 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
index 310bbc20..8b0188e8 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
index 9b40c5eb..6d914f95 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
index 5be5a4ed..bec2809a 100644
--- a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/pon_by8_avx.asm b/lib/avx_t1/pon_by8_avx.asm
index bffd18e6..c79f7408 100644
--- a/lib/avx_t1/pon_by8_avx.asm
+++ b/lib/avx_t1/pon_by8_avx.asm
@@ -27,7 +27,7 @@
 
 %use smartalign
 
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/os.asm"
 %include "include/memcpy.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/snow_v_avx.asm b/lib/avx_t1/snow_v_avx.asm
index c2065e34..bb24a427 100644
--- a/lib/avx_t1/snow_v_avx.asm
+++ b/lib/avx_t1/snow_v_avx.asm
@@ -33,7 +33,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
 
diff --git a/lib/include/imb_job.asm b/lib/include/imb_job.inc
similarity index 100%
rename from lib/include/imb_job.asm
rename to lib/include/imb_job.inc
diff --git a/lib/sse_t1/aes128_cntr_by8_sse.asm b/lib/sse_t1/aes128_cntr_by8_sse.asm
index 8a512c87..fdf69438 100644
--- a/lib/sse_t1/aes128_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes128_cntr_by8_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/memcpy.asm"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/aes256_cntr_by8_sse.asm b/lib/sse_t1/aes256_cntr_by8_sse.asm
index 3a2d6205..f19d7a90 100644
--- a/lib/sse_t1/aes256_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes256_cntr_by8_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/memcpy.asm"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/chacha20_sse.asm b/lib/sse_t1/chacha20_sse.asm
index 01981dee..5d89a0bc 100644
--- a/lib/sse_t1/chacha20_sse.asm
+++ b/lib/sse_t1/chacha20_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/memcpy.asm"
 %include "include/clear_regs.inc"
 %include "include/chacha_poly_defines.inc"
diff --git a/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
index 8102d1e1..4794691b 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
index 956e0be1..bab1145e 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
index 98f81976..5439ab08 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
index 45e1343c..b889666b 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
index 77325f5a..d0b67931 100644
--- a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
index 56f8e428..af253812 100644
--- a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
index fc78cc89..672a2562 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
index f90dec33..47664756 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/const.inc"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
index bd7632df..c462fa89 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
index cb27367a..c6d78033 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.asm"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
index 7ddfbb8d..a66a16e9 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
index 7c8b608d..b00d97d5 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
index b217b81b..f3a8128a 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
index b3eed6d6..1a8703b6 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
index 7587658f..341b0d0a 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
index 6f77c983..a0b09f01 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
index 3cd7db42..dbff75c1 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "sse_t1/snow3g_uea2_by4_sse.asm"
diff --git a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
index 3933d239..ac0703e8 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
index 14b0411f..7f721457 100644
--- a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
diff --git a/lib/sse_t1/pon_by8_sse.asm b/lib/sse_t1/pon_by8_sse.asm
index 01ad6385..c92b2586 100644
--- a/lib/sse_t1/pon_by8_sse.asm
+++ b/lib/sse_t1/pon_by8_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/os.asm"
 %include "include/memcpy.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/snow3g_uea2_by4_sse.asm b/lib/sse_t1/snow3g_uea2_by4_sse.asm
index c0e354bf..846593ef 100644
--- a/lib/sse_t1/snow3g_uea2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uea2_by4_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.asm"
diff --git a/lib/sse_t1/snow_v_sse.asm b/lib/sse_t1/snow_v_sse.asm
index 11b5aa3e..5cf6104e 100644
--- a/lib/sse_t1/snow_v_sse.asm
+++ b/lib/sse_t1/snow_v_sse.asm
@@ -33,7 +33,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
 
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
index 037cd6d1..a817fe1c 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
@@ -43,7 +43,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
index 5891ab1f..f14ac546 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
@@ -43,7 +43,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
index ea5ceae3..2b48e21d 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
@@ -34,7 +34,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
index 8e841bbd..2f08ce07 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
@@ -34,7 +34,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
diff --git a/lib/x86_64/poly1305.asm b/lib/x86_64/poly1305.asm
index 142d1d7b..77c0b491 100644
--- a/lib/x86_64/poly1305.asm
+++ b/lib/x86_64/poly1305.asm
@@ -36,7 +36,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.asm"
-%include "include/imb_job.asm"
+%include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 
 [bits 64]
-- 
GitLab


From 9ce6d4d914862b5c663de9d7e62e022f68b06feb Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:40:38 +0000
Subject: [PATCH 030/332] lib: Rename memcpy file extension

---
 lib/avx2_t1/chacha20_avx2.asm                               | 2 +-
 lib/avx2_t1/gcm_avx_gen4.asm                                | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm                 | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm                | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm              | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm              | 2 +-
 lib/avx2_t1/zuc_x8_avx2.asm                                 | 2 +-
 lib/avx512_t1/gcm_avx512.asm                                | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm            | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm          | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm          | 2 +-
 lib/avx512_t1/poly_avx512.asm                               | 2 +-
 lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc                 | 2 +-
 lib/avx512_t2/gcm_vaes_avx512.inc                           | 2 +-
 .../mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm | 2 +-
 .../mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm     | 2 +-
 lib/avx512_t2/poly_fma_avx512.asm                           | 2 +-
 lib/avx512_t2/pon_vaes_avx512.asm                           | 2 +-
 lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm              | 2 +-
 lib/avx_t1/aes128_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes192_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes256_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes_cfb_avx.asm                                  | 2 +-
 lib/avx_t1/chacha20_avx.asm                                 | 2 +-
 lib/avx_t1/crc32_by8_avx.asm                                | 2 +-
 lib/avx_t1/crc32_refl_by8_avx.asm                           | 2 +-
 lib/avx_t1/gcm_avx_gen2.asm                                 | 2 +-
 lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm   | 2 +-
 lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm       | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm             | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm                   | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm                  | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm                | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm                | 2 +-
 lib/avx_t1/memcpy_avx.asm                                   | 2 +-
 lib/avx_t1/pon_by8_avx.asm                                  | 2 +-
 lib/avx_t1/snow3g_uia2_by4_avx.asm                          | 2 +-
 lib/avx_t1/snow_v_avx.asm                                   | 2 +-
 lib/avx_t1/zuc_x4_avx.asm                                   | 2 +-
 lib/include/{memcpy.asm => memcpy.inc}                      | 6 +++---
 lib/sse_t1/aes128_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes192_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes256_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes_cfb_sse.asm                                  | 2 +-
 lib/sse_t1/chacha20_sse.asm                                 | 2 +-
 lib/sse_t1/crc32_by8_sse.asm                                | 2 +-
 lib/sse_t1/crc32_refl_by8_sse.asm                           | 2 +-
 lib/sse_t1/gcm_sse.inc                                      | 2 +-
 lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm   | 2 +-
 lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm             | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm                   | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm                  | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm                | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm                | 2 +-
 lib/sse_t1/memcpy_sse.asm                                   | 2 +-
 lib/sse_t1/pon_by8_sse.asm                                  | 2 +-
 lib/sse_t1/snow3g_uea2_by4_sse.asm                          | 4 ++--
 lib/sse_t1/snow3g_uia2_by4_sse.asm                          | 2 +-
 lib/sse_t1/snow_v_sse.asm                                   | 2 +-
 lib/sse_t1/zuc_x4_sse.asm                                   | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm               | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm             | 2 +-
 lib/x86_64/poly1305.asm                                     | 2 +-
 64 files changed, 67 insertions(+), 67 deletions(-)
 rename lib/include/{memcpy.asm => memcpy.inc} (99%)

diff --git a/lib/avx2_t1/chacha20_avx2.asm b/lib/avx2_t1/chacha20_avx2.asm
index b28fd71d..f59693fa 100644
--- a/lib/avx2_t1/chacha20_avx2.asm
+++ b/lib/avx2_t1/chacha20_avx2.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/transpose_avx2.asm"
 %include "include/chacha_poly_defines.inc"
diff --git a/lib/avx2_t1/gcm_avx_gen4.asm b/lib/avx2_t1/gcm_avx_gen4.asm
index d645a3bd..691e9bb3 100644
--- a/lib/avx2_t1/gcm_avx_gen4.asm
+++ b/lib/avx2_t1/gcm_avx_gen4.asm
@@ -116,7 +116,7 @@
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_avx2_avx512.inc"
 %include "include/gcm_common.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 %ifndef GCM128_MODE
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
index 2aab0e22..21cd7639 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 ;%define DO_DBGPRINT
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
index 74b293b5..f9daef08 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/const.inc"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
index a2fc88bf..6ec6a58f 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 
 extern sha256_oct_avx2
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
index e7e3f812..fa8d8e54 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 extern sha512_x4_avx2
 
diff --git a/lib/avx2_t1/zuc_x8_avx2.asm b/lib/avx2_t1/zuc_x8_avx2.asm
index d3c6334c..c5e4f1e4 100644
--- a/lib/avx2_t1/zuc_x8_avx2.asm
+++ b/lib/avx2_t1/zuc_x8_avx2.asm
@@ -29,7 +29,7 @@
 %include "include/reg_sizes.asm"
 %include "include/zuc_sbox.inc"
 %include "include/transpose_avx2.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
 
diff --git a/lib/avx512_t1/gcm_avx512.asm b/lib/avx512_t1/gcm_avx512.asm
index be5ffda5..78c73e5d 100644
--- a/lib/avx512_t1/gcm_avx512.asm
+++ b/lib/avx512_t1/gcm_avx512.asm
@@ -120,7 +120,7 @@
 %include "include/cet.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/imb_job.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/error.inc"
 
 %ifndef GCM128_MODE
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
index 8a0c7764..1054993f 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
@@ -44,7 +44,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 ;; %define DO_DBGPRINT
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
index 59b0cb95..e6495752 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
@@ -44,7 +44,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 ;; %define DO_DBGPRINT
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
index 938339a2..e5eac0e7 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
@@ -36,7 +36,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t1/poly_avx512.asm b/lib/avx512_t1/poly_avx512.asm
index 73ac5f19..472ea3e4 100644
--- a/lib/avx512_t1/poly_avx512.asm
+++ b/lib/avx512_t1/poly_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
index a371f776..0bb1668a 100644
--- a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
+++ b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
@@ -34,7 +34,7 @@
 %include "include/reg_sizes.asm"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/imb_job.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/aes_common.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index b3347786..ee38075b 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -120,7 +120,7 @@
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_vaes_avx512.inc"
 %include "include/gcm_common.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/aes_common.inc"
 %include "include/cet.inc"
 %ifndef GCM128_MODE
diff --git a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
index 9415f896..f6a87149 100644
--- a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 
 %ifndef AES_CBC_MAC
diff --git a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
index 296a8639..cf0d0ba5 100644
--- a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/poly_fma_avx512.asm b/lib/avx512_t2/poly_fma_avx512.asm
index 8f70d7d9..bc52c078 100644
--- a/lib/avx512_t2/poly_fma_avx512.asm
+++ b/lib/avx512_t2/poly_fma_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/pon_vaes_avx512.asm b/lib/avx512_t2/pon_vaes_avx512.asm
index c13b6033..f77b4921 100644
--- a/lib/avx512_t2/pon_vaes_avx512.asm
+++ b/lib/avx512_t2/pon_vaes_avx512.asm
@@ -29,7 +29,7 @@
 
 %include "include/imb_job.inc"
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 
 extern aes_cntr_pon_enc_128_vaes_avx512
diff --git a/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm b/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
index e9d75c32..13f57c89 100644
--- a/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
+++ b/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/cet.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/aes_common.inc"
 %define APPEND(a,b) a %+ b
diff --git a/lib/avx_t1/aes128_cntr_by8_avx.asm b/lib/avx_t1/aes128_cntr_by8_avx.asm
index de89215e..b72d06be 100644
--- a/lib/avx_t1/aes128_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes128_cntr_by8_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/aes192_cntr_by8_avx.asm b/lib/avx_t1/aes192_cntr_by8_avx.asm
index ba8eee50..bc6f3f4f 100644
--- a/lib/avx_t1/aes192_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes192_cntr_by8_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/aes256_cntr_by8_avx.asm b/lib/avx_t1/aes256_cntr_by8_avx.asm
index 652c2931..29273419 100644
--- a/lib/avx_t1/aes256_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes256_cntr_by8_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/aes_cfb_avx.asm b/lib/avx_t1/aes_cfb_avx.asm
index 023d0493..530e4d3a 100644
--- a/lib/avx_t1/aes_cfb_avx.asm
+++ b/lib/avx_t1/aes_cfb_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
diff --git a/lib/avx_t1/chacha20_avx.asm b/lib/avx_t1/chacha20_avx.asm
index 7f37870b..cc84b20a 100644
--- a/lib/avx_t1/chacha20_avx.asm
+++ b/lib/avx_t1/chacha20_avx.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/chacha_poly_defines.inc"
 
diff --git a/lib/avx_t1/crc32_by8_avx.asm b/lib/avx_t1/crc32_by8_avx.asm
index e86e4764..575a32c2 100644
--- a/lib/avx_t1/crc32_by8_avx.asm
+++ b/lib/avx_t1/crc32_by8_avx.asm
@@ -36,7 +36,7 @@
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/crc32_refl_by8_avx.asm b/lib/avx_t1/crc32_refl_by8_avx.asm
index 5857de55..83e86b73 100644
--- a/lib/avx_t1/crc32_refl_by8_avx.asm
+++ b/lib/avx_t1/crc32_refl_by8_avx.asm
@@ -36,7 +36,7 @@
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/gcm_avx_gen2.asm b/lib/avx_t1/gcm_avx_gen2.asm
index df91729d..23cdadda 100644
--- a/lib/avx_t1/gcm_avx_gen2.asm
+++ b/lib/avx_t1/gcm_avx_gen2.asm
@@ -117,7 +117,7 @@
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_sse_avx.inc"
 %include "include/gcm_common.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 %ifndef GCM128_MODE
diff --git a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
index 01b820a6..ee2a4d7e 100644
--- a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 
 %ifndef AES_CBC_MAC
 
diff --git a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
index 80b2422c..2c1b1b0e 100644
--- a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
index 7b3cd45d..f20cac84 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 
 %ifndef AES_XCBC_X8
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
index 2902392d..1d6a7aab 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
index 8da8938f..ee4486ee 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 
 extern sha1_mult_avx
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
index 93b1f529..6f2fd23e 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 
 extern sha_256_mult_avx
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
index 6d914f95..76a27ebf 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 
 extern sha512_x2_avx
diff --git a/lib/avx_t1/memcpy_avx.asm b/lib/avx_t1/memcpy_avx.asm
index a92bbb91..d53f6909 100644
--- a/lib/avx_t1/memcpy_avx.asm
+++ b/lib/avx_t1/memcpy_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 
 %ifdef LINUX
 %define arg1    rdi
diff --git a/lib/avx_t1/pon_by8_avx.asm b/lib/avx_t1/pon_by8_avx.asm
index c79f7408..18f02772 100644
--- a/lib/avx_t1/pon_by8_avx.asm
+++ b/lib/avx_t1/pon_by8_avx.asm
@@ -29,7 +29,7 @@
 
 %include "include/imb_job.inc"
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
diff --git a/lib/avx_t1/snow3g_uia2_by4_avx.asm b/lib/avx_t1/snow3g_uia2_by4_avx.asm
index b8b56337..75083139 100644
--- a/lib/avx_t1/snow3g_uia2_by4_avx.asm
+++ b/lib/avx_t1/snow3g_uia2_by4_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/cet.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %define APPEND(a,b) a %+ b
 %define APPEND3(a,b,c) a %+ b %+ c
diff --git a/lib/avx_t1/snow_v_avx.asm b/lib/avx_t1/snow_v_avx.asm
index bb24a427..77945368 100644
--- a/lib/avx_t1/snow_v_avx.asm
+++ b/lib/avx_t1/snow_v_avx.asm
@@ -32,7 +32,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/zuc_x4_avx.asm b/lib/avx_t1/zuc_x4_avx.asm
index 9524fa60..1c3caec9 100644
--- a/lib/avx_t1/zuc_x4_avx.asm
+++ b/lib/avx_t1/zuc_x4_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/zuc_sbox.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
 %include "include/const.inc"
diff --git a/lib/include/memcpy.asm b/lib/include/memcpy.inc
similarity index 99%
rename from lib/include/memcpy.asm
rename to lib/include/memcpy.inc
index ad85b206..1d964415 100644
--- a/lib/include/memcpy.asm
+++ b/lib/include/memcpy.inc
@@ -25,8 +25,8 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%ifndef __MEMCPY_ASM__
-%define __MEMCPY_ASM__
+%ifndef __MEMCPY_INC__
+%define __MEMCPY_INC__
 
 %include "include/reg_sizes.asm"
 
@@ -766,4 +766,4 @@
 %%end:
 %endm
 
-%endif ; ifndef __MEMCPY_ASM__
+%endif ; ifndef __MEMCPY_INC__
diff --git a/lib/sse_t1/aes128_cntr_by8_sse.asm b/lib/sse_t1/aes128_cntr_by8_sse.asm
index fdf69438..40359b96 100644
--- a/lib/sse_t1/aes128_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes128_cntr_by8_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/aes192_cntr_by8_sse.asm b/lib/sse_t1/aes192_cntr_by8_sse.asm
index d1161c1b..fb87d99c 100644
--- a/lib/sse_t1/aes192_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes192_cntr_by8_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/aes256_cntr_by8_sse.asm b/lib/sse_t1/aes256_cntr_by8_sse.asm
index f19d7a90..f6cb9a27 100644
--- a/lib/sse_t1/aes256_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes256_cntr_by8_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/aes_cfb_sse.asm b/lib/sse_t1/aes_cfb_sse.asm
index 586d4d3c..3acd621e 100644
--- a/lib/sse_t1/aes_cfb_sse.asm
+++ b/lib/sse_t1/aes_cfb_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
diff --git a/lib/sse_t1/chacha20_sse.asm b/lib/sse_t1/chacha20_sse.asm
index 5d89a0bc..68c84a75 100644
--- a/lib/sse_t1/chacha20_sse.asm
+++ b/lib/sse_t1/chacha20_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/os.asm"
 %include "include/imb_job.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/chacha_poly_defines.inc"
 
diff --git a/lib/sse_t1/crc32_by8_sse.asm b/lib/sse_t1/crc32_by8_sse.asm
index 09a8e4ef..54d97b38 100644
--- a/lib/sse_t1/crc32_by8_sse.asm
+++ b/lib/sse_t1/crc32_by8_sse.asm
@@ -36,7 +36,7 @@
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/crc32_refl_by8_sse.asm b/lib/sse_t1/crc32_refl_by8_sse.asm
index 37c39509..222fa16c 100644
--- a/lib/sse_t1/crc32_refl_by8_sse.asm
+++ b/lib/sse_t1/crc32_refl_by8_sse.asm
@@ -36,7 +36,7 @@
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index f6e055b7..d9e5d666 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -120,7 +120,7 @@
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_sse_avx.inc"
 %include "include/gcm_common.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
 %ifndef GCM128_MODE
diff --git a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
index d0b67931..13daba9f 100644
--- a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 
 %ifndef NUM_LANES
 %define NUM_LANES 4
diff --git a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
index af253812..d715bb97 100644
--- a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.inc"
 
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
index 47664756..4d3c4de0 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
@@ -30,7 +30,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %ifndef AES_XCBC_X4
 %define AES_XCBC_X4 aes_xcbc_mac_128_x4
 %define SUBMIT_JOB_AES_XCBC submit_job_aes_xcbc_sse
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
index c6d78033..60bcc2b0 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/const.inc"
 
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
index b00d97d5..139afef2 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 
 ;%define DO_DBGPRINT
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
index 1a8703b6..a49d9bc0 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 
 extern sha_256_mult_sse
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
index a0b09f01..d9378172 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 
 extern sha512_x2_sse
diff --git a/lib/sse_t1/memcpy_sse.asm b/lib/sse_t1/memcpy_sse.asm
index b2433175..6cc0bc3b 100644
--- a/lib/sse_t1/memcpy_sse.asm
+++ b/lib/sse_t1/memcpy_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 
 %ifdef LINUX
 %define arg1    rdi
diff --git a/lib/sse_t1/pon_by8_sse.asm b/lib/sse_t1/pon_by8_sse.asm
index c92b2586..7681cd5b 100644
--- a/lib/sse_t1/pon_by8_sse.asm
+++ b/lib/sse_t1/pon_by8_sse.asm
@@ -27,7 +27,7 @@
 
 %include "include/imb_job.inc"
 %include "include/os.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
diff --git a/lib/sse_t1/snow3g_uea2_by4_sse.asm b/lib/sse_t1/snow3g_uea2_by4_sse.asm
index 846593ef..2fd8ada1 100644
--- a/lib/sse_t1/snow3g_uea2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uea2_by4_sse.asm
@@ -27,11 +27,11 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/transpose_sse.asm"
 
 extern snow3g_table_A_mul
diff --git a/lib/sse_t1/snow3g_uia2_by4_sse.asm b/lib/sse_t1/snow3g_uia2_by4_sse.asm
index 2e0be570..f41f0124 100644
--- a/lib/sse_t1/snow3g_uia2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uia2_by4_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/cet.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/const.inc"
 %define APPEND(a,b) a %+ b
 %define APPEND3(a,b,c) a %+ b %+ c
diff --git a/lib/sse_t1/snow_v_sse.asm b/lib/sse_t1/snow_v_sse.asm
index 5cf6104e..61ad5bbb 100644
--- a/lib/sse_t1/snow_v_sse.asm
+++ b/lib/sse_t1/snow_v_sse.asm
@@ -32,7 +32,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/sse_t1/zuc_x4_sse.asm b/lib/sse_t1/zuc_x4_sse.asm
index f79118dd..a138d749 100644
--- a/lib/sse_t1/zuc_x4_sse.asm
+++ b/lib/sse_t1/zuc_x4_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
 %include "include/zuc_sbox.inc"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/const.inc"
 
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
index f14ac546..5dcaeccb 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
@@ -46,7 +46,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
index 2f08ce07..260cdae8 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
@@ -37,7 +37,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/x86_64/poly1305.asm b/lib/x86_64/poly1305.asm
index 77c0b491..19137806 100644
--- a/lib/x86_64/poly1305.asm
+++ b/lib/x86_64/poly1305.asm
@@ -35,7 +35,7 @@
 
 %include "include/os.asm"
 %include "include/reg_sizes.asm"
-%include "include/memcpy.asm"
+%include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 
-- 
GitLab


From b9d46931b4abbb97ef38338413c1c297ffbe62ea Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:44:34 +0000
Subject: [PATCH 031/332] lib: Rename os file extension

---
 lib/avx2_t1/chacha20_avx2.asm                               | 2 +-
 lib/avx2_t1/gcm_avx_gen4.asm                                | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm                  | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm                 | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm                 | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm                | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm               | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm              | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm               | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm              | 2 +-
 lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm                | 2 +-
 lib/avx2_t1/md5_x8x2_avx2.asm                               | 2 +-
 lib/avx2_t1/sha1_x8_avx2.asm                                | 2 +-
 lib/avx2_t1/sha256_oct_avx2.asm                             | 2 +-
 lib/avx2_t1/sha512_x4_avx2.asm                              | 2 +-
 lib/avx2_t1/zuc_x8_avx2.asm                                 | 2 +-
 lib/avx2_t2/aes128_ecb_vaes_avx2.asm                        | 2 +-
 lib/avx2_t2/aes192_ecb_vaes_avx2.asm                        | 2 +-
 lib/avx2_t2/aes256_ecb_vaes_avx2.asm                        | 2 +-
 lib/avx512_t1/chacha20_avx512.asm                           | 2 +-
 lib/avx512_t1/des_x16_avx512.asm                            | 2 +-
 lib/avx512_t1/gcm_avx512.asm                                | 2 +-
 lib/avx512_t1/mb_mgr_des_avx512.asm                         | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm             | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm            | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm           | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm          | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm           | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm          | 2 +-
 lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm            | 2 +-
 lib/avx512_t1/poly_avx512.asm                               | 2 +-
 lib/avx512_t1/sha1_x16_avx512.asm                           | 2 +-
 lib/avx512_t1/sha256_x16_avx512.asm                         | 2 +-
 lib/avx512_t1/sha512_x8_avx512.asm                          | 2 +-
 lib/avx512_t1/zuc_x16_avx512.asm                            | 2 +-
 lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm              | 2 +-
 lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm                   | 2 +-
 lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm                  | 2 +-
 lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc                 | 2 +-
 lib/avx512_t2/aes_docsis_dec_avx512.asm                     | 2 +-
 lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/aes_docsis_enc_avx512.asm                     | 2 +-
 lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/aes_ecb_vaes_avx512.asm                       | 2 +-
 lib/avx512_t2/crc16_x25_avx512.asm                          | 2 +-
 lib/avx512_t2/crc32_by16_vclmul_avx512.asm                  | 2 +-
 lib/avx512_t2/crc32_fp_avx512.asm                           | 2 +-
 lib/avx512_t2/crc32_iuup_avx512.asm                         | 2 +-
 lib/avx512_t2/crc32_lte_avx512.asm                          | 2 +-
 lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm             | 2 +-
 lib/avx512_t2/crc32_sctp_avx512.asm                         | 2 +-
 lib/avx512_t2/crc32_wimax_avx512.asm                        | 2 +-
 lib/avx512_t2/ethernet_fcs_avx512.asm                       | 2 +-
 lib/avx512_t2/gcm_api_vaes_avx512.inc                       | 2 +-
 lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc                   | 2 +-
 lib/avx512_t2/gcm_vaes_avx512.inc                           | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm        | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm       | 2 +-
 .../mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm | 2 +-
 .../mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm         | 2 +-
 .../mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm         | 2 +-
 lib/avx512_t2/poly_fma_avx512.asm                           | 2 +-
 lib/avx512_t2/pon_vaes_avx512.asm                           | 2 +-
 lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm              | 2 +-
 lib/avx_t1/aes128_cbc_dec_by8_avx.asm                       | 2 +-
 lib/avx_t1/aes128_cbc_enc_x8_avx.asm                        | 2 +-
 lib/avx_t1/aes128_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes128_ecb_by8_avx.asm                           | 2 +-
 lib/avx_t1/aes192_cbc_dec_by8_avx.asm                       | 2 +-
 lib/avx_t1/aes192_cbc_enc_x8_avx.asm                        | 2 +-
 lib/avx_t1/aes192_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes192_ecb_by8_avx.asm                           | 2 +-
 lib/avx_t1/aes256_cbc_dec_by8_avx.asm                       | 2 +-
 lib/avx_t1/aes256_cbc_enc_x8_avx.asm                        | 2 +-
 lib/avx_t1/aes256_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes256_ecb_by8_avx.asm                           | 2 +-
 lib/avx_t1/aes_cfb_avx.asm                                  | 2 +-
 lib/avx_t1/chacha20_avx.asm                                 | 2 +-
 lib/avx_t1/crc16_x25_avx.asm                                | 2 +-
 lib/avx_t1/crc32_by8_avx.asm                                | 2 +-
 lib/avx_t1/crc32_fp_avx.asm                                 | 2 +-
 lib/avx_t1/crc32_iuup_avx.asm                               | 2 +-
 lib/avx_t1/crc32_lte_avx.asm                                | 2 +-
 lib/avx_t1/crc32_refl_by8_avx.asm                           | 2 +-
 lib/avx_t1/crc32_sctp_avx.asm                               | 2 +-
 lib/avx_t1/crc32_wimax_avx.asm                              | 2 +-
 lib/avx_t1/ethernet_fcs_avx.asm                             | 2 +-
 lib/avx_t1/gcm_avx_gen2.asm                                 | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm              | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm             | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm             | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm            | 2 +-
 lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm   | 2 +-
 lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm       | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm              | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm             | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm                    | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm                   | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm                   | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm                  | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm                | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm                | 2 +-
 lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm                  | 2 +-
 lib/avx_t1/md5_x4x2_avx.asm                                 | 2 +-
 lib/avx_t1/memcpy_avx.asm                                   | 2 +-
 lib/avx_t1/pon_by8_avx.asm                                  | 2 +-
 lib/avx_t1/sha1_one_block_avx.asm                           | 2 +-
 lib/avx_t1/sha1_x4_avx.asm                                  | 2 +-
 lib/avx_t1/sha256_mult_avx.asm                              | 2 +-
 lib/avx_t1/sha256_one_block_avx.asm                         | 2 +-
 lib/avx_t1/sha512_one_block_avx.asm                         | 2 +-
 lib/avx_t1/sha512_x2_avx.asm                                | 2 +-
 lib/avx_t1/snow3g_uia2_by4_avx.asm                          | 2 +-
 lib/avx_t1/snow_v_avx.asm                                   | 2 +-
 lib/avx_t1/zuc_x4_avx.asm                                   | 2 +-
 lib/include/clear_regs.inc                                  | 2 +-
 lib/include/{os.asm => os.inc}                              | 6 +++---
 lib/include/transpose_avx512.asm                            | 2 +-
 lib/include/zuc_sbox.inc                                    | 2 +-
 lib/sse_t1/aes128_cbc_dec_by4_sse.asm                       | 2 +-
 lib/sse_t1/aes128_cbc_enc_x4_sse.asm                        | 2 +-
 lib/sse_t1/aes128_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes128_ecb_by4_sse.asm                           | 2 +-
 lib/sse_t1/aes192_cbc_dec_by4_sse.asm                       | 2 +-
 lib/sse_t1/aes192_cbc_enc_x4_sse.asm                        | 2 +-
 lib/sse_t1/aes192_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes256_cbc_dec_by4_sse.asm                       | 2 +-
 lib/sse_t1/aes256_cbc_enc_x4_sse.asm                        | 2 +-
 lib/sse_t1/aes256_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes_cfb_sse.asm                                  | 2 +-
 lib/sse_t1/chacha20_sse.asm                                 | 2 +-
 lib/sse_t1/crc16_x25_sse.asm                                | 2 +-
 lib/sse_t1/crc32_by8_sse.asm                                | 2 +-
 lib/sse_t1/crc32_fp_sse.asm                                 | 2 +-
 lib/sse_t1/crc32_iuup_sse.asm                               | 2 +-
 lib/sse_t1/crc32_lte_sse.asm                                | 2 +-
 lib/sse_t1/crc32_refl_by8_sse.asm                           | 2 +-
 lib/sse_t1/crc32_sctp_sse.asm                               | 2 +-
 lib/sse_t1/crc32_wimax_sse.asm                              | 2 +-
 lib/sse_t1/ethernet_fcs_sse.asm                             | 2 +-
 lib/sse_t1/gcm_sse.inc                                      | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm          | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm             | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm            | 2 +-
 lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm   | 2 +-
 lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm              | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm             | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm                    | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm                   | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm                   | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm                  | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm                | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm                | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm                  | 2 +-
 lib/sse_t1/md5_x4x2_sse.asm                                 | 2 +-
 lib/sse_t1/memcpy_sse.asm                                   | 2 +-
 lib/sse_t1/pon_by8_sse.asm                                  | 2 +-
 lib/sse_t1/sha1_one_block_sse.asm                           | 2 +-
 lib/sse_t1/sha1_x4_sse.asm                                  | 2 +-
 lib/sse_t1/sha256_mult_sse.asm                              | 2 +-
 lib/sse_t1/sha256_one_block_sse.asm                         | 2 +-
 lib/sse_t1/sha512_one_block_sse.asm                         | 2 +-
 lib/sse_t1/sha512_x2_sse.asm                                | 2 +-
 lib/sse_t1/snow3g_uea2_by4_sse.asm                          | 2 +-
 lib/sse_t1/snow3g_uia2_by4_sse.asm                          | 2 +-
 lib/sse_t1/snow_v_sse.asm                                   | 2 +-
 lib/sse_t1/zuc_x4_sse.asm                                   | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm                | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm               | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm              | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm             | 2 +-
 lib/sse_t2/sha1_ni_x1_sse.asm                               | 2 +-
 lib/sse_t2/sha1_ni_x2_sse.asm                               | 2 +-
 lib/sse_t2/sha256_ni_x1_sse.asm                             | 2 +-
 lib/sse_t2/sha256_ni_x2_sse.asm                             | 2 +-
 lib/sse_t3/aes128_cbc_dec_by8_sse.asm                       | 2 +-
 lib/sse_t3/aes128_cbc_enc_x8_sse.asm                        | 2 +-
 lib/sse_t3/aes128_ecb_by8_sse.asm                           | 2 +-
 lib/sse_t3/aes192_cbc_dec_by8_sse.asm                       | 2 +-
 lib/sse_t3/aes192_cbc_enc_x8_sse.asm                        | 2 +-
 lib/sse_t3/aes192_ecb_by8_sse.asm                           | 2 +-
 lib/sse_t3/aes256_cbc_dec_by8_sse.asm                       | 2 +-
 lib/sse_t3/aes256_cbc_enc_x8_sse.asm                        | 2 +-
 lib/sse_t3/aes256_ecb_by8_sse.asm                           | 2 +-
 lib/x86_64/aes128_ecbenc_x3.asm                             | 2 +-
 lib/x86_64/aes_cmac_subkey_gen.asm                          | 2 +-
 lib/x86_64/aes_keyexp_128.asm                               | 2 +-
 lib/x86_64/aes_keyexp_192.asm                               | 2 +-
 lib/x86_64/aes_keyexp_256.asm                               | 2 +-
 lib/x86_64/clear_regs_mem_fns.asm                           | 2 +-
 lib/x86_64/const.asm                                        | 2 +-
 lib/x86_64/constant_lookup_fns.asm                          | 2 +-
 lib/x86_64/crc32_const.asm                                  | 2 +-
 lib/x86_64/crc32_refl_const.asm                             | 2 +-
 lib/x86_64/poly1305.asm                                     | 2 +-
 lib/x86_64/save_xmms.asm                                    | 2 +-
 lib/x86_64/wireless_common.asm                              | 2 +-
 lib/x86_64/zuc_common.asm                                   | 2 +-
 208 files changed, 210 insertions(+), 210 deletions(-)
 rename lib/include/{os.asm => os.inc} (97%)

diff --git a/lib/avx2_t1/chacha20_avx2.asm b/lib/avx2_t1/chacha20_avx2.asm
index f59693fa..c6b9bbf0 100644
--- a/lib/avx2_t1/chacha20_avx2.asm
+++ b/lib/avx2_t1/chacha20_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx2_t1/gcm_avx_gen4.asm b/lib/avx2_t1/gcm_avx_gen4.asm
index 691e9bb3..679c2412 100644
--- a/lib/avx2_t1/gcm_avx_gen4.asm
+++ b/lib/avx2_t1/gcm_avx_gen4.asm
@@ -110,7 +110,7 @@
 ; throughout the code, one tab and two tab indentations are used. one tab is for GHASH part, two tabs is for AES part.
 ;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
index 4ac07d5f..22cefc84 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
index 21cd7639..fd7cc8e2 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.inc"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
index b55fc571..0e780c06 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
index f9daef08..ac7d09ed 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
index e53e3259..6ae39694 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
index 6ec6a58f..b68e4580 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
index f46824e7..a14f27ad 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
index fa8d8e54..9e975e40 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
index db79954d..1a957949 100644
--- a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
diff --git a/lib/avx2_t1/md5_x8x2_avx2.asm b/lib/avx2_t1/md5_x8x2_avx2.asm
index 81e2114b..c1fce8a5 100644
--- a/lib/avx2_t1/md5_x8x2_avx2.asm
+++ b/lib/avx2_t1/md5_x8x2_avx2.asm
@@ -36,7 +36,7 @@
 ;;
 ;; clobbers ymm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx2.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx2_t1/sha1_x8_avx2.asm b/lib/avx2_t1/sha1_x8_avx2.asm
index 06667fca..8635de93 100644
--- a/lib/avx2_t1/sha1_x8_avx2.asm
+++ b/lib/avx2_t1/sha1_x8_avx2.asm
@@ -34,7 +34,7 @@
 ;;
 ;; clobbers ymm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/avx2_t1/sha256_oct_avx2.asm b/lib/avx2_t1/sha256_oct_avx2.asm
index 5bd90a73..a8cf4964 100644
--- a/lib/avx2_t1/sha256_oct_avx2.asm
+++ b/lib/avx2_t1/sha256_oct_avx2.asm
@@ -39,7 +39,7 @@
 ;;
 ;; clobbers ymm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/avx2_t1/sha512_x4_avx2.asm b/lib/avx2_t1/sha512_x4_avx2.asm
index e0f31552..6e63a950 100644
--- a/lib/avx2_t1/sha512_x4_avx2.asm
+++ b/lib/avx2_t1/sha512_x4_avx2.asm
@@ -40,7 +40,7 @@
 ;;
 ;; clobbers ymm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/transpose_avx2.asm"
diff --git a/lib/avx2_t1/zuc_x8_avx2.asm b/lib/avx2_t1/zuc_x8_avx2.asm
index c5e4f1e4..bd229194 100644
--- a/lib/avx2_t1/zuc_x8_avx2.asm
+++ b/lib/avx2_t1/zuc_x8_avx2.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/zuc_sbox.inc"
 %include "include/transpose_avx2.asm"
diff --git a/lib/avx2_t2/aes128_ecb_vaes_avx2.asm b/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
index a091ed4f..ea56a27a 100644
--- a/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
+++ b/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
@@ -42,7 +42,7 @@
 ; arg 4: LEN:  length in bytes (multiple of 16)
 ;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/aes_common.inc"
 
diff --git a/lib/avx2_t2/aes192_ecb_vaes_avx2.asm b/lib/avx2_t2/aes192_ecb_vaes_avx2.asm
index d400c3b3..03508ade 100644
--- a/lib/avx2_t2/aes192_ecb_vaes_avx2.asm
+++ b/lib/avx2_t2/aes192_ecb_vaes_avx2.asm
@@ -29,5 +29,5 @@
 
 %define AES_ECB_NROUNDS 12
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "avx2_t2/aes128_ecb_vaes_avx2.asm"
diff --git a/lib/avx2_t2/aes256_ecb_vaes_avx2.asm b/lib/avx2_t2/aes256_ecb_vaes_avx2.asm
index 8c8a7308..b1abb269 100644
--- a/lib/avx2_t2/aes256_ecb_vaes_avx2.asm
+++ b/lib/avx2_t2/aes256_ecb_vaes_avx2.asm
@@ -29,5 +29,5 @@
 
 %define AES_ECB_NROUNDS 14
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "avx2_t2/aes128_ecb_vaes_avx2.asm"
diff --git a/lib/avx512_t1/chacha20_avx512.asm b/lib/avx512_t1/chacha20_avx512.asm
index 47278636..11f2db53 100644
--- a/lib/avx512_t1/chacha20_avx512.asm
+++ b/lib/avx512_t1/chacha20_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/const.inc"
diff --git a/lib/avx512_t1/des_x16_avx512.asm b/lib/avx512_t1/des_x16_avx512.asm
index 5c4f0056..acf8ae09 100644
--- a/lib/avx512_t1/des_x16_avx512.asm
+++ b/lib/avx512_t1/des_x16_avx512.asm
@@ -46,7 +46,7 @@
 ;;			-----------------------------------------------------------
 ;; Clobbers ZMM0-31 and K1 to K7
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
diff --git a/lib/avx512_t1/gcm_avx512.asm b/lib/avx512_t1/gcm_avx512.asm
index 78c73e5d..b2b66e4f 100644
--- a/lib/avx512_t1/gcm_avx512.asm
+++ b/lib/avx512_t1/gcm_avx512.asm
@@ -111,7 +111,7 @@
 ; throughout the code, one tab and two tab indentations are used. one tab is for GHASH part, two tabs is for AES part.
 ;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
diff --git a/lib/avx512_t1/mb_mgr_des_avx512.asm b/lib/avx512_t1/mb_mgr_des_avx512.asm
index e5618c69..26ec0caf 100644
--- a/lib/avx512_t1/mb_mgr_des_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_des_avx512.asm
@@ -41,7 +41,7 @@
 ;;			-----------------------------------------------------------
 ;; Clobbers ZMM0-31, K1-7 (K1-2 and K4-6 here but DES underneath clobbers K1-7).
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
index 402b21cb..87b9e934 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
@@ -40,7 +40,7 @@
 ;;			-----------------------------------------------------------
 ;; Clobbers ZMM0-31
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
index 1054993f..4b4d0a3a 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
@@ -40,7 +40,7 @@
 ;;			-----------------------------------------------------------
 ;; Clobbers ZMM0-31
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
index 2ba22793..d5529f49 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
@@ -40,7 +40,7 @@
 ;;			-----------------------------------------------------------
 ;; Clobbers ZMM0-31
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
index e6495752..8ded7b8b 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
@@ -40,7 +40,7 @@
 ;;			-----------------------------------------------------------
 ;; Clobbers ZMM0-31
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
index 5e58d2a0..13ce9107 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
@@ -32,7 +32,7 @@
 ;;
 ;; Clobbers ZMM0-31
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
index e5eac0e7..4bae5151 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
@@ -32,7 +32,7 @@
 ;;
 ;; Clobbers ZMM0-31
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
index b48044ee..350346e7 100644
--- a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
diff --git a/lib/avx512_t1/poly_avx512.asm b/lib/avx512_t1/poly_avx512.asm
index 472ea3e4..b52cecbc 100644
--- a/lib/avx512_t1/poly_avx512.asm
+++ b/lib/avx512_t1/poly_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
diff --git a/lib/avx512_t1/sha1_x16_avx512.asm b/lib/avx512_t1/sha1_x16_avx512.asm
index 00aa68bf..b9ef66b2 100644
--- a/lib/avx512_t1/sha1_x16_avx512.asm
+++ b/lib/avx512_t1/sha1_x16_avx512.asm
@@ -37,7 +37,7 @@
 ;;			-----------------------------------------------------------
 ;; Clobbers ZMM0-31
 
-%include "include/os.asm"
+%include "include/os.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/avx512_t1/sha256_x16_avx512.asm b/lib/avx512_t1/sha256_x16_avx512.asm
index aec5da73..c2d0e43f 100644
--- a/lib/avx512_t1/sha256_x16_avx512.asm
+++ b/lib/avx512_t1/sha256_x16_avx512.asm
@@ -37,7 +37,7 @@
 ;;			-----------------------------------------------------------
 ;; Clobbers ZMM0-31
 
-%include "include/os.asm"
+%include "include/os.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/avx512_t1/sha512_x8_avx512.asm b/lib/avx512_t1/sha512_x8_avx512.asm
index 50b6b2e5..5233e6b1 100644
--- a/lib/avx512_t1/sha512_x8_avx512.asm
+++ b/lib/avx512_t1/sha512_x8_avx512.asm
@@ -39,7 +39,7 @@
 
 ;; code to compute quad SHA512 using AVX512
 
-%include "include/os.asm"
+%include "include/os.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/avx512_t1/zuc_x16_avx512.asm b/lib/avx512_t1/zuc_x16_avx512.asm
index 4b89fdc4..674c75c1 100644
--- a/lib/avx512_t1/zuc_x16_avx512.asm
+++ b/lib/avx512_t1/zuc_x16_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/zuc_sbox.inc"
 %include "include/transpose_avx512.asm"
diff --git a/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
index 7527b356..8ca96fc1 100644
--- a/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/aes_common.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm b/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
index e52bf064..ddc28cf8 100644
--- a/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
@@ -27,7 +27,7 @@
 
 ;;; routines to do 128/192/256 bit CBC AES encrypt
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm b/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
index 8d9bd685..b4c15ea1 100644
--- a/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
@@ -27,7 +27,7 @@
 
 ;;; routines to do 128 bit AES in CBCS mode encryption
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
index 0bb1668a..50cd3b4a 100644
--- a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
+++ b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
@@ -30,7 +30,7 @@
 %ifndef AES_CNTR_VAES_AVX512_INC
 %define AES_CNTR_VAES_AVX512_INC
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/imb_job.inc"
diff --git a/lib/avx512_t2/aes_docsis_dec_avx512.asm b/lib/avx512_t2/aes_docsis_dec_avx512.asm
index 15db9603..ee34a969 100644
--- a/lib/avx512_t2/aes_docsis_dec_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_avx512.asm
@@ -28,7 +28,7 @@
 
 %include "include/imb_job.inc"
 %include "include/reg_sizes.asm"
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.inc"
 
diff --git a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
index b755342d..b8ef9c29 100644
--- a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
@@ -28,7 +28,7 @@
 
 %include "include/imb_job.inc"
 %include "include/reg_sizes.asm"
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/aes_common.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/avx512_t2/aes_docsis_enc_avx512.asm b/lib/avx512_t2/aes_docsis_enc_avx512.asm
index 08786604..833df0d0 100644
--- a/lib/avx512_t2/aes_docsis_enc_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_avx512.asm
@@ -30,7 +30,7 @@
 
 %use smartalign
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
index c4785dc1..368e3eb6 100644
--- a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
@@ -30,7 +30,7 @@
 
 %use smartalign
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t2/aes_ecb_vaes_avx512.asm b/lib/avx512_t2/aes_ecb_vaes_avx512.asm
index ccd7eba9..7e0e669e 100644
--- a/lib/avx512_t2/aes_ecb_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_ecb_vaes_avx512.asm
@@ -42,7 +42,7 @@
 ; arg 4: LEN:  length in bytes (multiple of 16)
 ;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/aes_common.inc"
 
diff --git a/lib/avx512_t2/crc16_x25_avx512.asm b/lib/avx512_t2/crc16_x25_avx512.asm
index 8a93a2f6..dbfc75a8 100644
--- a/lib/avx512_t2/crc16_x25_avx512.asm
+++ b/lib/avx512_t2/crc16_x25_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/crc32_refl_const.inc"
diff --git a/lib/avx512_t2/crc32_by16_vclmul_avx512.asm b/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
index 3df360f2..ceef6d57 100644
--- a/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
+++ b/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
@@ -35,7 +35,7 @@
 ;;     "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction"
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/crc32.inc"
diff --git a/lib/avx512_t2/crc32_fp_avx512.asm b/lib/avx512_t2/crc32_fp_avx512.asm
index b0ac5e23..18f3b7f7 100644
--- a/lib/avx512_t2/crc32_fp_avx512.asm
+++ b/lib/avx512_t2/crc32_fp_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/crc32_iuup_avx512.asm b/lib/avx512_t2/crc32_iuup_avx512.asm
index a735b566..5f3f6c95 100644
--- a/lib/avx512_t2/crc32_iuup_avx512.asm
+++ b/lib/avx512_t2/crc32_iuup_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/crc32_lte_avx512.asm b/lib/avx512_t2/crc32_lte_avx512.asm
index c50e3a8c..6093fae6 100644
--- a/lib/avx512_t2/crc32_lte_avx512.asm
+++ b/lib/avx512_t2/crc32_lte_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm b/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
index c58136a4..a9bb401e 100644
--- a/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
+++ b/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
@@ -35,7 +35,7 @@
 ;;     "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction"
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/crc32_refl.inc"
diff --git a/lib/avx512_t2/crc32_sctp_avx512.asm b/lib/avx512_t2/crc32_sctp_avx512.asm
index 1fbc7ff2..7816b57d 100644
--- a/lib/avx512_t2/crc32_sctp_avx512.asm
+++ b/lib/avx512_t2/crc32_sctp_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/crc32_wimax_avx512.asm b/lib/avx512_t2/crc32_wimax_avx512.asm
index af8e169e..432142c0 100644
--- a/lib/avx512_t2/crc32_wimax_avx512.asm
+++ b/lib/avx512_t2/crc32_wimax_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/ethernet_fcs_avx512.asm b/lib/avx512_t2/ethernet_fcs_avx512.asm
index 748aa100..4b616345 100644
--- a/lib/avx512_t2/ethernet_fcs_avx512.asm
+++ b/lib/avx512_t2/ethernet_fcs_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/crc32_refl_const.inc"
diff --git a/lib/avx512_t2/gcm_api_vaes_avx512.inc b/lib/avx512_t2/gcm_api_vaes_avx512.inc
index 1b76667d..db26dbcf 100644
--- a/lib/avx512_t2/gcm_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_api_vaes_avx512.inc
@@ -29,7 +29,7 @@
 
 %include "avx512_t2/gcm_vaes_avx512.inc"
 %include "include/error.inc"
-%include "include/os.asm"
+%include "include/os.inc"
 
 %ifndef GCM_API_VAES_AVX512_INC
 %define GCM_API_VAES_AVX512_INC
diff --git a/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc b/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
index 1ecc7ba1..ab19ebfc 100644
--- a/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
@@ -29,7 +29,7 @@
 
 %include "avx512_t2/gcm_vaes_avx512.inc"
 %include "include/error.inc"
-%include "include/os.asm"
+%include "include/os.inc"
 
 %ifndef GCM_SGL_API_VAES_AVX512_INC
 %define GCM_SGL_API_VAES_AVX512_INC
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index ee38075b..09585423 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -114,7 +114,7 @@
 %ifndef GCM_VAES_AVX512_INC
 %define GCM_VAES_AVX512_INC
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
index 58b9a66b..21a5d940 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
index 07ba1fcf..4b78ff88 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
index f6a87149..5044961e 100644
--- a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
index a79a4d33..83addbcb 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
index cf0d0ba5..c0d707f8 100644
--- a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
index e66760a5..db3bc698 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
@@ -29,7 +29,7 @@
 %include "include/datastruct.inc"
 %include "include/transpose_avx512.asm"
 %include "include/imb_job.inc"
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %include "avx512_t2/snow3g_uea2_by16_vaes_avx512.asm"
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
index 101c0dd6..91d389ae 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
diff --git a/lib/avx512_t2/poly_fma_avx512.asm b/lib/avx512_t2/poly_fma_avx512.asm
index bc52c078..7626377a 100644
--- a/lib/avx512_t2/poly_fma_avx512.asm
+++ b/lib/avx512_t2/poly_fma_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
diff --git a/lib/avx512_t2/pon_vaes_avx512.asm b/lib/avx512_t2/pon_vaes_avx512.asm
index f77b4921..d07b7800 100644
--- a/lib/avx512_t2/pon_vaes_avx512.asm
+++ b/lib/avx512_t2/pon_vaes_avx512.asm
@@ -28,7 +28,7 @@
 %use smartalign
 
 %include "include/imb_job.inc"
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm b/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
index 13f57c89..ee3932e0 100644
--- a/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
+++ b/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/cet.inc"
 %include "include/memcpy.inc"
diff --git a/lib/avx_t1/aes128_cbc_dec_by8_avx.asm b/lib/avx_t1/aes128_cbc_dec_by8_avx.asm
index a57b9a72..02de3d35 100644
--- a/lib/avx_t1/aes128_cbc_dec_by8_avx.asm
+++ b/lib/avx_t1/aes128_cbc_dec_by8_avx.asm
@@ -29,7 +29,7 @@
 
 ;; clobbers xmm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %define CONCAT(a,b) a %+ b
diff --git a/lib/avx_t1/aes128_cbc_enc_x8_avx.asm b/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
index aaa57dfb..9478c88a 100644
--- a/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
@@ -29,7 +29,7 @@
 
 ;; clobbers all registers except for ARG1 and rbp
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx_t1/aes128_cntr_by8_avx.asm b/lib/avx_t1/aes128_cntr_by8_avx.asm
index b72d06be..aeb0fc2f 100644
--- a/lib/avx_t1/aes128_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes128_cntr_by8_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
diff --git a/lib/avx_t1/aes128_ecb_by8_avx.asm b/lib/avx_t1/aes128_ecb_by8_avx.asm
index bada27ad..63f72241 100644
--- a/lib/avx_t1/aes128_ecb_by8_avx.asm
+++ b/lib/avx_t1/aes128_ecb_by8_avx.asm
@@ -27,7 +27,7 @@
 
 ; routine to do AES ECB 128 encrypt/decrypt on 16n bytes doing AES by 8
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/aes_common.inc"
 
diff --git a/lib/avx_t1/aes192_cbc_dec_by8_avx.asm b/lib/avx_t1/aes192_cbc_dec_by8_avx.asm
index eae59f32..26809efb 100644
--- a/lib/avx_t1/aes192_cbc_dec_by8_avx.asm
+++ b/lib/avx_t1/aes192_cbc_dec_by8_avx.asm
@@ -28,7 +28,7 @@
 ; routine to do AES192 CBC decrypt "by8"
 
 ; XMM registers are clobbered. Saving/restoring must be done at a higher level
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %define CONCAT(a,b) a %+ b
diff --git a/lib/avx_t1/aes192_cbc_enc_x8_avx.asm b/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
index b14eb13e..ab3def7d 100644
--- a/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
@@ -29,7 +29,7 @@
 
 ;; clobbers all registers except for ARG1 and rbp
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx_t1/aes192_cntr_by8_avx.asm b/lib/avx_t1/aes192_cntr_by8_avx.asm
index bc6f3f4f..9ec66f88 100644
--- a/lib/avx_t1/aes192_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes192_cntr_by8_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/aes192_ecb_by8_avx.asm b/lib/avx_t1/aes192_ecb_by8_avx.asm
index b7402bad..8163795a 100644
--- a/lib/avx_t1/aes192_ecb_by8_avx.asm
+++ b/lib/avx_t1/aes192_ecb_by8_avx.asm
@@ -29,5 +29,5 @@
 
 %define AES_ECB_NROUNDS 12
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "avx_t1/aes128_ecb_by8_avx.asm"
diff --git a/lib/avx_t1/aes256_cbc_dec_by8_avx.asm b/lib/avx_t1/aes256_cbc_dec_by8_avx.asm
index 28d08e10..5f911b58 100644
--- a/lib/avx_t1/aes256_cbc_dec_by8_avx.asm
+++ b/lib/avx_t1/aes256_cbc_dec_by8_avx.asm
@@ -28,7 +28,7 @@
 ; routine to do AES256 CBC decrypt "by8"
 
 ; XMM registers are clobbered. Saving/restoring must be done at a higher level
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %define CONCAT(a,b) a %+ b
diff --git a/lib/avx_t1/aes256_cbc_enc_x8_avx.asm b/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
index 52186e60..b527babb 100644
--- a/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
@@ -29,7 +29,7 @@
 
 ;; clobbers all registers except for ARG1 and rbp
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx_t1/aes256_cntr_by8_avx.asm b/lib/avx_t1/aes256_cntr_by8_avx.asm
index 29273419..2cf0c934 100644
--- a/lib/avx_t1/aes256_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes256_cntr_by8_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
diff --git a/lib/avx_t1/aes256_ecb_by8_avx.asm b/lib/avx_t1/aes256_ecb_by8_avx.asm
index 514ffa89..f15c5a33 100644
--- a/lib/avx_t1/aes256_ecb_by8_avx.asm
+++ b/lib/avx_t1/aes256_ecb_by8_avx.asm
@@ -29,5 +29,5 @@
 
 %define AES_ECB_NROUNDS 14
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "avx_t1/aes128_ecb_by8_avx.asm"
diff --git a/lib/avx_t1/aes_cfb_avx.asm b/lib/avx_t1/aes_cfb_avx.asm
index 530e4d3a..cbab23d3 100644
--- a/lib/avx_t1/aes_cfb_avx.asm
+++ b/lib/avx_t1/aes_cfb_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/chacha20_avx.asm b/lib/avx_t1/chacha20_avx.asm
index cc84b20a..328a9676 100644
--- a/lib/avx_t1/chacha20_avx.asm
+++ b/lib/avx_t1/chacha20_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/crc16_x25_avx.asm b/lib/avx_t1/crc16_x25_avx.asm
index f458ecd9..e62e9715 100644
--- a/lib/avx_t1/crc16_x25_avx.asm
+++ b/lib/avx_t1/crc16_x25_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/crc32_by8_avx.asm b/lib/avx_t1/crc32_by8_avx.asm
index 575a32c2..d04f6ca2 100644
--- a/lib/avx_t1/crc32_by8_avx.asm
+++ b/lib/avx_t1/crc32_by8_avx.asm
@@ -35,7 +35,7 @@
 ;;     "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction"
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32.inc"
diff --git a/lib/avx_t1/crc32_fp_avx.asm b/lib/avx_t1/crc32_fp_avx.asm
index 833d27cc..dde0a377 100644
--- a/lib/avx_t1/crc32_fp_avx.asm
+++ b/lib/avx_t1/crc32_fp_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/crc32_iuup_avx.asm b/lib/avx_t1/crc32_iuup_avx.asm
index b1934bf7..649f581b 100644
--- a/lib/avx_t1/crc32_iuup_avx.asm
+++ b/lib/avx_t1/crc32_iuup_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/crc32_lte_avx.asm b/lib/avx_t1/crc32_lte_avx.asm
index cabb7731..bbed30f5 100644
--- a/lib/avx_t1/crc32_lte_avx.asm
+++ b/lib/avx_t1/crc32_lte_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/crc32_refl_by8_avx.asm b/lib/avx_t1/crc32_refl_by8_avx.asm
index 83e86b73..e9d71ad4 100644
--- a/lib/avx_t1/crc32_refl_by8_avx.asm
+++ b/lib/avx_t1/crc32_refl_by8_avx.asm
@@ -35,7 +35,7 @@
 ;;     "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction"
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl.inc"
diff --git a/lib/avx_t1/crc32_sctp_avx.asm b/lib/avx_t1/crc32_sctp_avx.asm
index 1cadb8b3..3dc26b0d 100644
--- a/lib/avx_t1/crc32_sctp_avx.asm
+++ b/lib/avx_t1/crc32_sctp_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/crc32_wimax_avx.asm b/lib/avx_t1/crc32_wimax_avx.asm
index eb77d872..70c25086 100644
--- a/lib/avx_t1/crc32_wimax_avx.asm
+++ b/lib/avx_t1/crc32_wimax_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/ethernet_fcs_avx.asm b/lib/avx_t1/ethernet_fcs_avx.asm
index bd3bb30b..c1381a34 100644
--- a/lib/avx_t1/ethernet_fcs_avx.asm
+++ b/lib/avx_t1/ethernet_fcs_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/gcm_avx_gen2.asm b/lib/avx_t1/gcm_avx_gen2.asm
index 23cdadda..f3e3ad1a 100644
--- a/lib/avx_t1/gcm_avx_gen2.asm
+++ b/lib/avx_t1/gcm_avx_gen2.asm
@@ -111,7 +111,7 @@
 ; throughout the code, one tab and two tab indentations are used. one tab is for GHASH part, two tabs is for AES part.
 ;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
diff --git a/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
index 1e8fd40f..07c9564d 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
index c86f1efc..68bf438f 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
index 45e388b1..dcbe6b5f 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
index 300d1de9..263ea319 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
index ee2a4d7e..361e028e 100644
--- a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
index 2c1b1b0e..ec917b32 100644
--- a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
index 218288c7..7a634007 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
index f20cac84..5db6933a 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
index 76f3283d..8fc2bdef 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
index 1d6a7aab..7b738fb6 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.inc"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
index b2ac1929..f2f23e43 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
index ee4486ee..d674fc34 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
index 675117b4..e295f060 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
index 6f2fd23e..55a74cde 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
index 8b0188e8..2fb0de31 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
index 76a27ebf..ed98e22e 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
index bec2809a..3b7e7d04 100644
--- a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/md5_x4x2_avx.asm b/lib/avx_t1/md5_x4x2_avx.asm
index 77c772b8..668951f3 100644
--- a/lib/avx_t1/md5_x4x2_avx.asm
+++ b/lib/avx_t1/md5_x4x2_avx.asm
@@ -36,7 +36,7 @@
 ;;
 ;; clobbers xmm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx_t1/memcpy_avx.asm b/lib/avx_t1/memcpy_avx.asm
index d53f6909..9cd396cf 100644
--- a/lib/avx_t1/memcpy_avx.asm
+++ b/lib/avx_t1/memcpy_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 
 %ifdef LINUX
diff --git a/lib/avx_t1/pon_by8_avx.asm b/lib/avx_t1/pon_by8_avx.asm
index 18f02772..e82314de 100644
--- a/lib/avx_t1/pon_by8_avx.asm
+++ b/lib/avx_t1/pon_by8_avx.asm
@@ -28,7 +28,7 @@
 %use smartalign
 
 %include "include/imb_job.inc"
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/sha1_one_block_avx.asm b/lib/avx_t1/sha1_one_block_avx.asm
index 7695dcb4..93a6434d 100644
--- a/lib/avx_t1/sha1_one_block_avx.asm
+++ b/lib/avx_t1/sha1_one_block_avx.asm
@@ -27,7 +27,7 @@
 
 ; SHA1 code, hybrid, rolled, interleaved
 ; Uses AVX instructions
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 mksection .rodata
diff --git a/lib/avx_t1/sha1_x4_avx.asm b/lib/avx_t1/sha1_x4_avx.asm
index b9c44431..8f00db4c 100644
--- a/lib/avx_t1/sha1_x4_avx.asm
+++ b/lib/avx_t1/sha1_x4_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx_t1/sha256_mult_avx.asm b/lib/avx_t1/sha256_mult_avx.asm
index 4776ac72..e438739f 100644
--- a/lib/avx_t1/sha256_mult_avx.asm
+++ b/lib/avx_t1/sha256_mult_avx.asm
@@ -38,7 +38,7 @@
 ;;
 ;; clobbers xmm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx_t1/sha256_one_block_avx.asm b/lib/avx_t1/sha256_one_block_avx.asm
index 25b4ef87..8286c202 100644
--- a/lib/avx_t1/sha256_one_block_avx.asm
+++ b/lib/avx_t1/sha256_one_block_avx.asm
@@ -27,7 +27,7 @@
 
 ; This code schedules 1 blocks at a time, with 4 lanes per block
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 mksection .rodata
diff --git a/lib/avx_t1/sha512_one_block_avx.asm b/lib/avx_t1/sha512_one_block_avx.asm
index 1971e659..1ea90def 100644
--- a/lib/avx_t1/sha512_one_block_avx.asm
+++ b/lib/avx_t1/sha512_one_block_avx.asm
@@ -27,7 +27,7 @@
 
 ; This code schedules 1 blocks at a time, with 4 lanes per block
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %define	VMOVDQ vmovdqu ;; assume buffers not aligned
diff --git a/lib/avx_t1/sha512_x2_avx.asm b/lib/avx_t1/sha512_x2_avx.asm
index 533b6668..07156d14 100644
--- a/lib/avx_t1/sha512_x2_avx.asm
+++ b/lib/avx_t1/sha512_x2_avx.asm
@@ -39,7 +39,7 @@
 ;;
 ;; clobbers xmm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 extern K512_2
diff --git a/lib/avx_t1/snow3g_uia2_by4_avx.asm b/lib/avx_t1/snow3g_uia2_by4_avx.asm
index 75083139..9fb22142 100644
--- a/lib/avx_t1/snow3g_uia2_by4_avx.asm
+++ b/lib/avx_t1/snow3g_uia2_by4_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/cet.inc"
 %include "include/memcpy.inc"
diff --git a/lib/avx_t1/snow_v_avx.asm b/lib/avx_t1/snow_v_avx.asm
index 77945368..a2dade04 100644
--- a/lib/avx_t1/snow_v_avx.asm
+++ b/lib/avx_t1/snow_v_avx.asm
@@ -30,7 +30,7 @@
 ;; abstract : 'A new SNOW stream cipher called SNOW-V'
 ;; https://eprint.iacr.org/2018/1143.pdf
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
diff --git a/lib/avx_t1/zuc_x4_avx.asm b/lib/avx_t1/zuc_x4_avx.asm
index 1c3caec9..d020b792 100644
--- a/lib/avx_t1/zuc_x4_avx.asm
+++ b/lib/avx_t1/zuc_x4_avx.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/zuc_sbox.inc"
 %include "include/memcpy.inc"
diff --git a/lib/include/clear_regs.inc b/lib/include/clear_regs.inc
index 0fc8bde2..2dc8dcaa 100644
--- a/lib/include/clear_regs.inc
+++ b/lib/include/clear_regs.inc
@@ -28,7 +28,7 @@
 %ifndef _CLEAR_REGS_INC_
 %define _CLEAR_REGS_INC_
 
-%include "include/os.asm"
+%include "include/os.inc"
 
 ;
 ; This macro clears any GP registers passed
diff --git a/lib/include/os.asm b/lib/include/os.inc
similarity index 97%
rename from lib/include/os.asm
rename to lib/include/os.inc
index 90d1c5ab..f1ead7ff 100644
--- a/lib/include/os.asm
+++ b/lib/include/os.inc
@@ -24,8 +24,8 @@
 ;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
-%ifndef OS_ASM_FILE
-%define OS_ASM_FILE
+%ifndef OS_INC_FILE
+%define OS_INC_FILE
 
 %ifndef WIN_ABI
 %ifidn __OUTPUT_FORMAT__, win64
@@ -114,4 +114,4 @@
 %endif ; LINUX
 %endmacro
 
-%endif                          ; OS_ASM_FILE
+%endif                          ; OS_INC_FILE
diff --git a/lib/include/transpose_avx512.asm b/lib/include/transpose_avx512.asm
index 56c08d67..c3a49ba8 100644
--- a/lib/include/transpose_avx512.asm
+++ b/lib/include/transpose_avx512.asm
@@ -28,7 +28,7 @@
 %ifndef _TRANSPOSE_AVX512_ASM_
 %define _TRANSPOSE_AVX512_ASM_
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 
 mksection .rodata
diff --git a/lib/include/zuc_sbox.inc b/lib/include/zuc_sbox.inc
index 036b7b5d..6a06349d 100644
--- a/lib/include/zuc_sbox.inc
+++ b/lib/include/zuc_sbox.inc
@@ -30,7 +30,7 @@
 
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
-%include "include/os.asm"
+%include "include/os.inc"
 
 mksection .rodata
 
diff --git a/lib/sse_t1/aes128_cbc_dec_by4_sse.asm b/lib/sse_t1/aes128_cbc_dec_by4_sse.asm
index 8d1deaaa..9fdb6115 100644
--- a/lib/sse_t1/aes128_cbc_dec_by4_sse.asm
+++ b/lib/sse_t1/aes128_cbc_dec_by4_sse.asm
@@ -41,7 +41,7 @@
 ; arg 4: OUT:  pointer to output (plain text)
 ; arg 5: LEN:  length in bytes (multiple of 16)
 ;
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_128
diff --git a/lib/sse_t1/aes128_cbc_enc_x4_sse.asm b/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
index 45b85737..18a1628a 100644
--- a/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
@@ -29,7 +29,7 @@
 ;;; processes 4 buffers at a time, single data structure as input
 ;;; Updates In and Out pointers at end
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t1/aes128_cntr_by8_sse.asm b/lib/sse_t1/aes128_cntr_by8_sse.asm
index 40359b96..a8131e82 100644
--- a/lib/sse_t1/aes128_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes128_cntr_by8_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
diff --git a/lib/sse_t1/aes128_ecb_by4_sse.asm b/lib/sse_t1/aes128_ecb_by4_sse.asm
index c42b6c09..72c84159 100644
--- a/lib/sse_t1/aes128_ecb_by4_sse.asm
+++ b/lib/sse_t1/aes128_ecb_by4_sse.asm
@@ -42,7 +42,7 @@
 ; arg 4: LEN:  length in bytes (multiple of 16)
 ;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %ifndef AES_ECB_ENC_256
diff --git a/lib/sse_t1/aes192_cbc_dec_by4_sse.asm b/lib/sse_t1/aes192_cbc_dec_by4_sse.asm
index 2849bca6..9470cbfc 100644
--- a/lib/sse_t1/aes192_cbc_dec_by4_sse.asm
+++ b/lib/sse_t1/aes192_cbc_dec_by4_sse.asm
@@ -41,7 +41,7 @@
 ; arg 4: OUT:  pointer to output (plain text)
 ; arg 5: LEN:  length in bytes (multiple of 16)
 ;
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_192
diff --git a/lib/sse_t1/aes192_cbc_enc_x4_sse.asm b/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
index 15c7deb9..f82a6c0e 100644
--- a/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
@@ -29,7 +29,7 @@
 ;;; process 4 buffers at a time, single data structure as input
 ;;; Updates In and Out pointers at end
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t1/aes192_cntr_by8_sse.asm b/lib/sse_t1/aes192_cntr_by8_sse.asm
index fb87d99c..656b13f0 100644
--- a/lib/sse_t1/aes192_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes192_cntr_by8_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/aes256_cbc_dec_by4_sse.asm b/lib/sse_t1/aes256_cbc_dec_by4_sse.asm
index 2fa763aa..72225799 100644
--- a/lib/sse_t1/aes256_cbc_dec_by4_sse.asm
+++ b/lib/sse_t1/aes256_cbc_dec_by4_sse.asm
@@ -42,7 +42,7 @@
 ; arg 5: sp:  length in bytes (multiple of 16)
 ;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_256
diff --git a/lib/sse_t1/aes256_cbc_enc_x4_sse.asm b/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
index 45514395..abcd8f36 100644
--- a/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
@@ -29,7 +29,7 @@
 ;;; process 4 buffers at a time, single data structure as input
 ;;; Updates In and Out pointers at end
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t1/aes256_cntr_by8_sse.asm b/lib/sse_t1/aes256_cntr_by8_sse.asm
index f6cb9a27..ef183d29 100644
--- a/lib/sse_t1/aes256_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes256_cntr_by8_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
diff --git a/lib/sse_t1/aes_cfb_sse.asm b/lib/sse_t1/aes_cfb_sse.asm
index 3acd621e..bafa891d 100644
--- a/lib/sse_t1/aes_cfb_sse.asm
+++ b/lib/sse_t1/aes_cfb_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/sse_t1/chacha20_sse.asm b/lib/sse_t1/chacha20_sse.asm
index 68c84a75..9c9eb7fe 100644
--- a/lib/sse_t1/chacha20_sse.asm
+++ b/lib/sse_t1/chacha20_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/crc16_x25_sse.asm b/lib/sse_t1/crc16_x25_sse.asm
index 41fd5111..180701f7 100644
--- a/lib/sse_t1/crc16_x25_sse.asm
+++ b/lib/sse_t1/crc16_x25_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/crc32_by8_sse.asm b/lib/sse_t1/crc32_by8_sse.asm
index 54d97b38..2a5ee065 100644
--- a/lib/sse_t1/crc32_by8_sse.asm
+++ b/lib/sse_t1/crc32_by8_sse.asm
@@ -35,7 +35,7 @@
 ;;     "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction"
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32.inc"
diff --git a/lib/sse_t1/crc32_fp_sse.asm b/lib/sse_t1/crc32_fp_sse.asm
index 2ea6732d..ae874652 100644
--- a/lib/sse_t1/crc32_fp_sse.asm
+++ b/lib/sse_t1/crc32_fp_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/crc32_iuup_sse.asm b/lib/sse_t1/crc32_iuup_sse.asm
index bc9f3c98..db14128b 100644
--- a/lib/sse_t1/crc32_iuup_sse.asm
+++ b/lib/sse_t1/crc32_iuup_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/crc32_lte_sse.asm b/lib/sse_t1/crc32_lte_sse.asm
index f0b76376..affcec87 100644
--- a/lib/sse_t1/crc32_lte_sse.asm
+++ b/lib/sse_t1/crc32_lte_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/crc32_refl_by8_sse.asm b/lib/sse_t1/crc32_refl_by8_sse.asm
index 222fa16c..c195c363 100644
--- a/lib/sse_t1/crc32_refl_by8_sse.asm
+++ b/lib/sse_t1/crc32_refl_by8_sse.asm
@@ -35,7 +35,7 @@
 ;;     "Fast CRC Computation for Generic Polynomials Using PCLMULQDQ Instruction"
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl.inc"
diff --git a/lib/sse_t1/crc32_sctp_sse.asm b/lib/sse_t1/crc32_sctp_sse.asm
index 07c56003..0d2ef037 100644
--- a/lib/sse_t1/crc32_sctp_sse.asm
+++ b/lib/sse_t1/crc32_sctp_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/crc32_wimax_sse.asm b/lib/sse_t1/crc32_wimax_sse.asm
index 276e58bb..323ee6f1 100644
--- a/lib/sse_t1/crc32_wimax_sse.asm
+++ b/lib/sse_t1/crc32_wimax_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/ethernet_fcs_sse.asm b/lib/sse_t1/ethernet_fcs_sse.asm
index 084ba06e..d908cf51 100644
--- a/lib/sse_t1/ethernet_fcs_sse.asm
+++ b/lib/sse_t1/ethernet_fcs_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/crc32_refl_const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index d9e5d666..096f1df7 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -114,7 +114,7 @@
 %ifndef GCM_SSE_INC
 %define GCM_SSE_INC
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
diff --git a/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
index 4794691b..8f048705 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 
diff --git a/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
index bab1145e..a182c64a 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 
diff --git a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
index 5439ab08..5beee06b 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
index b889666b..681eb76f 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
index 13daba9f..935d6077 100644
--- a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
index d715bb97..58ec40a1 100644
--- a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
index 672a2562..43e55556 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
index 4d3c4de0..d07cec4d 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/const.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
index c462fa89..e49c79d9 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
index 60bcc2b0..26335fb2 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.inc"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
index a66a16e9..8bad8371 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
index 139afef2..f129038e 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
index f3a8128a..d337e007 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
index a49d9bc0..ad0cbf3b 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
index 341b0d0a..351031bf 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
index d9378172..d1309698 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
index dbff75c1..6a1e6459 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
index ac0703e8..62dceedc 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
index 7f721457..c3967d1c 100644
--- a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t1/md5_x4x2_sse.asm b/lib/sse_t1/md5_x4x2_sse.asm
index 7748f53d..a9f4874f 100644
--- a/lib/sse_t1/md5_x4x2_sse.asm
+++ b/lib/sse_t1/md5_x4x2_sse.asm
@@ -36,7 +36,7 @@
 ;;
 ;; clobbers xmm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t1/memcpy_sse.asm b/lib/sse_t1/memcpy_sse.asm
index 6cc0bc3b..5f369650 100644
--- a/lib/sse_t1/memcpy_sse.asm
+++ b/lib/sse_t1/memcpy_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 
 %ifdef LINUX
diff --git a/lib/sse_t1/pon_by8_sse.asm b/lib/sse_t1/pon_by8_sse.asm
index 7681cd5b..8e7ccb39 100644
--- a/lib/sse_t1/pon_by8_sse.asm
+++ b/lib/sse_t1/pon_by8_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/imb_job.inc"
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/sse_t1/sha1_one_block_sse.asm b/lib/sse_t1/sha1_one_block_sse.asm
index 995b1ee3..06a8c10f 100644
--- a/lib/sse_t1/sha1_one_block_sse.asm
+++ b/lib/sse_t1/sha1_one_block_sse.asm
@@ -27,7 +27,7 @@
 
 ; SHA1 code, hybrid, rolled, interleaved
 ; Uses SSE instructions
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 mksection .rodata
diff --git a/lib/sse_t1/sha1_x4_sse.asm b/lib/sse_t1/sha1_x4_sse.asm
index 9c873244..21f86d6e 100644
--- a/lib/sse_t1/sha1_x4_sse.asm
+++ b/lib/sse_t1/sha1_x4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/sse_t1/sha256_mult_sse.asm b/lib/sse_t1/sha256_mult_sse.asm
index f45adfd3..447115fd 100644
--- a/lib/sse_t1/sha256_mult_sse.asm
+++ b/lib/sse_t1/sha256_mult_sse.asm
@@ -38,7 +38,7 @@
 ;;
 ;; clobbers xmm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t1/sha256_one_block_sse.asm b/lib/sse_t1/sha256_one_block_sse.asm
index 1db0163a..cd4a62c7 100644
--- a/lib/sse_t1/sha256_one_block_sse.asm
+++ b/lib/sse_t1/sha256_one_block_sse.asm
@@ -27,7 +27,7 @@
 
 ; This code schedules 1 blocks at a time, with 4 lanes per block
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 mksection .rodata
diff --git a/lib/sse_t1/sha512_one_block_sse.asm b/lib/sse_t1/sha512_one_block_sse.asm
index 207ce2aa..83b7183e 100644
--- a/lib/sse_t1/sha512_one_block_sse.asm
+++ b/lib/sse_t1/sha512_one_block_sse.asm
@@ -27,7 +27,7 @@
 
 ; This code schedules 1 blocks at a time, with 4 lanes per block
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %define	MOVDQ movdqu ;; assume buffers not aligned
diff --git a/lib/sse_t1/sha512_x2_sse.asm b/lib/sse_t1/sha512_x2_sse.asm
index 8cadb13c..49fb5db7 100644
--- a/lib/sse_t1/sha512_x2_sse.asm
+++ b/lib/sse_t1/sha512_x2_sse.asm
@@ -39,7 +39,7 @@
 ;;
 ;; clobbers xmm0-15
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t1/snow3g_uea2_by4_sse.asm b/lib/sse_t1/snow3g_uea2_by4_sse.asm
index 2fd8ada1..21da889f 100644
--- a/lib/sse_t1/snow3g_uea2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uea2_by4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
diff --git a/lib/sse_t1/snow3g_uia2_by4_sse.asm b/lib/sse_t1/snow3g_uia2_by4_sse.asm
index f41f0124..ea38794c 100644
--- a/lib/sse_t1/snow3g_uia2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uia2_by4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/cet.inc"
 %include "include/memcpy.inc"
diff --git a/lib/sse_t1/snow_v_sse.asm b/lib/sse_t1/snow_v_sse.asm
index 61ad5bbb..14956f84 100644
--- a/lib/sse_t1/snow_v_sse.asm
+++ b/lib/sse_t1/snow_v_sse.asm
@@ -30,7 +30,7 @@
 ;; abstract : 'A new SNOW stream cipher called SNOW-V'
 ;; https://eprint.iacr.org/2018/1143.pdf
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
diff --git a/lib/sse_t1/zuc_x4_sse.asm b/lib/sse_t1/zuc_x4_sse.asm
index a138d749..cacde7d9 100644
--- a/lib/sse_t1/zuc_x4_sse.asm
+++ b/lib/sse_t1/zuc_x4_sse.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/zuc_sbox.inc"
 %include "include/memcpy.inc"
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
index a817fe1c..c300e34e 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
@@ -42,7 +42,7 @@
 ;; Linux/Windows clobbers: xmm0 - xmm15
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
index 5dcaeccb..c0060c5e 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
@@ -42,7 +42,7 @@
 ;; Linux/Windows clobbers: xmm0 - xmm15
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
index 2b48e21d..91001237 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
@@ -33,7 +33,7 @@
 ;; Linux/Windows clobbers: xmm0 - xmm15
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
index 260cdae8..fdb81bcf 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
@@ -33,7 +33,7 @@
 ;; Linux/Windows clobbers: xmm0 - xmm15
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.asm"
diff --git a/lib/sse_t2/sha1_ni_x1_sse.asm b/lib/sse_t2/sha1_ni_x1_sse.asm
index 141b3668..1a2fde4b 100644
--- a/lib/sse_t2/sha1_ni_x1_sse.asm
+++ b/lib/sse_t2/sha1_ni_x1_sse.asm
@@ -38,7 +38,7 @@
 ;;
 ;; Linux/Windows clobbers: xmm0 - xmm15
 
-%include "include/os.asm"
+%include "include/os.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t2/sha1_ni_x2_sse.asm b/lib/sse_t2/sha1_ni_x2_sse.asm
index ef613a6d..a95129cb 100644
--- a/lib/sse_t2/sha1_ni_x2_sse.asm
+++ b/lib/sse_t2/sha1_ni_x2_sse.asm
@@ -38,7 +38,7 @@
 ;;
 ;; Linux/Windows clobbers: xmm0 - xmm15
 
-%include "include/os.asm"
+%include "include/os.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t2/sha256_ni_x1_sse.asm b/lib/sse_t2/sha256_ni_x1_sse.asm
index 77380ebb..bec568bd 100644
--- a/lib/sse_t2/sha256_ni_x1_sse.asm
+++ b/lib/sse_t2/sha256_ni_x1_sse.asm
@@ -38,7 +38,7 @@
 ;;
 ;; Linux/Windows clobbers: xmm0 - xmm15
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/cet.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t2/sha256_ni_x2_sse.asm b/lib/sse_t2/sha256_ni_x2_sse.asm
index 13361ebd..94a1aa5d 100644
--- a/lib/sse_t2/sha256_ni_x2_sse.asm
+++ b/lib/sse_t2/sha256_ni_x2_sse.asm
@@ -38,7 +38,7 @@
 ;;
 ;; Linux/Windows clobbers: xmm0 - xmm15
 
-%include "include/os.asm"
+%include "include/os.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/sse_t3/aes128_cbc_dec_by8_sse.asm b/lib/sse_t3/aes128_cbc_dec_by8_sse.asm
index a97fe8dd..e2654891 100644
--- a/lib/sse_t3/aes128_cbc_dec_by8_sse.asm
+++ b/lib/sse_t3/aes128_cbc_dec_by8_sse.asm
@@ -41,7 +41,7 @@
 ; arg 4: OUT:  pointer to output (plain text)
 ; arg 5: LEN:  length in bytes (multiple of 16)
 ;
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_128
diff --git a/lib/sse_t3/aes128_cbc_enc_x8_sse.asm b/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
index fc7b3641..645020f8 100644
--- a/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
@@ -29,7 +29,7 @@
 ;;; processes 8 buffers at a time, single data structure as input
 ;;; Updates In and Out pointers at end
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t3/aes128_ecb_by8_sse.asm b/lib/sse_t3/aes128_ecb_by8_sse.asm
index af9ce99b..46fa220c 100644
--- a/lib/sse_t3/aes128_ecb_by8_sse.asm
+++ b/lib/sse_t3/aes128_ecb_by8_sse.asm
@@ -27,7 +27,7 @@
 
 ; routine to do AES ECB 128 encrypt/decrypt on 16n bytes doing AES by 8
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/aes_common.inc"
 
diff --git a/lib/sse_t3/aes192_cbc_dec_by8_sse.asm b/lib/sse_t3/aes192_cbc_dec_by8_sse.asm
index 23add2d4..08eb25c9 100644
--- a/lib/sse_t3/aes192_cbc_dec_by8_sse.asm
+++ b/lib/sse_t3/aes192_cbc_dec_by8_sse.asm
@@ -41,7 +41,7 @@
 ; arg 4: OUT:  pointer to output (plain text)
 ; arg 5: LEN:  length in bytes (multiple of 16)
 ;
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_192
diff --git a/lib/sse_t3/aes192_cbc_enc_x8_sse.asm b/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
index 86afe4b1..00f9327e 100644
--- a/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
@@ -29,7 +29,7 @@
 
 ;; clobbers all registers except for ARG1 and rbp
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t3/aes192_ecb_by8_sse.asm b/lib/sse_t3/aes192_ecb_by8_sse.asm
index 8bc905b4..81817f8e 100644
--- a/lib/sse_t3/aes192_ecb_by8_sse.asm
+++ b/lib/sse_t3/aes192_ecb_by8_sse.asm
@@ -29,5 +29,5 @@
 
 %define AES_ECB_NROUNDS 12
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "sse_t3/aes128_ecb_by8_sse.asm"
diff --git a/lib/sse_t3/aes256_cbc_dec_by8_sse.asm b/lib/sse_t3/aes256_cbc_dec_by8_sse.asm
index f433e4ec..b6106a7e 100644
--- a/lib/sse_t3/aes256_cbc_dec_by8_sse.asm
+++ b/lib/sse_t3/aes256_cbc_dec_by8_sse.asm
@@ -42,7 +42,7 @@
 ; arg 5: sp:  length in bytes (multiple of 16)
 ;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 
 %ifndef AES_CBC_DEC_256
diff --git a/lib/sse_t3/aes256_cbc_enc_x8_sse.asm b/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
index 6cb2cef9..38fc2831 100644
--- a/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
@@ -29,7 +29,7 @@
 
 ;; clobbers all registers except for ARG1 and rbp
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t3/aes256_ecb_by8_sse.asm b/lib/sse_t3/aes256_ecb_by8_sse.asm
index d40d245d..7cfda3d7 100644
--- a/lib/sse_t3/aes256_ecb_by8_sse.asm
+++ b/lib/sse_t3/aes256_ecb_by8_sse.asm
@@ -29,5 +29,5 @@
 
 %define AES_ECB_NROUNDS 14
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "sse_t3/aes128_ecb_by8_sse.asm"
diff --git a/lib/x86_64/aes128_ecbenc_x3.asm b/lib/x86_64/aes128_ecbenc_x3.asm
index 333fcf5a..876ecac4 100644
--- a/lib/x86_64/aes128_ecbenc_x3.asm
+++ b/lib/x86_64/aes128_ecbenc_x3.asm
@@ -32,7 +32,7 @@
 ;void
 ; aes128_ecbenc_x3_avx(void *in, void *keys, void *out1, void *out2, void *out3);
 
-%include "include/os.asm"
+%include "include/os.inc"
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/x86_64/aes_cmac_subkey_gen.asm b/lib/x86_64/aes_cmac_subkey_gen.asm
index 26f9a7b5..c1f27196 100644
--- a/lib/x86_64/aes_cmac_subkey_gen.asm
+++ b/lib/x86_64/aes_cmac_subkey_gen.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/x86_64/aes_keyexp_128.asm b/lib/x86_64/aes_keyexp_128.asm
index d0289391..a0e74dd4 100644
--- a/lib/x86_64/aes_keyexp_128.asm
+++ b/lib/x86_64/aes_keyexp_128.asm
@@ -26,7 +26,7 @@
 ;;
 
 ; Routine to do AES key expansion
-%include "include/os.asm"
+%include "include/os.inc"
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/x86_64/aes_keyexp_192.asm b/lib/x86_64/aes_keyexp_192.asm
index dc364c77..aaada6fe 100644
--- a/lib/x86_64/aes_keyexp_192.asm
+++ b/lib/x86_64/aes_keyexp_192.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/x86_64/aes_keyexp_256.asm b/lib/x86_64/aes_keyexp_256.asm
index 57d72638..518f7492 100644
--- a/lib/x86_64/aes_keyexp_256.asm
+++ b/lib/x86_64/aes_keyexp_256.asm
@@ -26,7 +26,7 @@
 ;;
 
 ; Routine to do AES key expansion
-%include "include/os.asm"
+%include "include/os.inc"
 %define NO_AESNI_RENAME
 %include "include/aesni_emu.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/x86_64/clear_regs_mem_fns.asm b/lib/x86_64/clear_regs_mem_fns.asm
index 8adab5e8..83eb4b0b 100644
--- a/lib/x86_64/clear_regs_mem_fns.asm
+++ b/lib/x86_64/clear_regs_mem_fns.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
 mksection .text
diff --git a/lib/x86_64/const.asm b/lib/x86_64/const.asm
index 42c3ffba..e7f2d715 100644
--- a/lib/x86_64/const.asm
+++ b/lib/x86_64/const.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/x86_64/constant_lookup_fns.asm b/lib/x86_64/constant_lookup_fns.asm
index 1532d6e6..689822dd 100644
--- a/lib/x86_64/constant_lookup_fns.asm
+++ b/lib/x86_64/constant_lookup_fns.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/constant_lookup.inc"
 
diff --git a/lib/x86_64/crc32_const.asm b/lib/x86_64/crc32_const.asm
index f94619d7..c8be50c8 100644
--- a/lib/x86_64/crc32_const.asm
+++ b/lib/x86_64/crc32_const.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 
 [bits 64]
 default rel
diff --git a/lib/x86_64/crc32_refl_const.asm b/lib/x86_64/crc32_refl_const.asm
index 2b99a026..fa99d18f 100644
--- a/lib/x86_64/crc32_refl_const.asm
+++ b/lib/x86_64/crc32_refl_const.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 
 [bits 64]
 default rel
diff --git a/lib/x86_64/poly1305.asm b/lib/x86_64/poly1305.asm
index 19137806..739fd6b5 100644
--- a/lib/x86_64/poly1305.asm
+++ b/lib/x86_64/poly1305.asm
@@ -33,7 +33,7 @@
 ;; "The design of Poly1305"
 ;;     http://loup-vaillant.fr/tutorials/poly1305-design
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
diff --git a/lib/x86_64/save_xmms.asm b/lib/x86_64/save_xmms.asm
index b6a79903..1c7b0951 100644
--- a/lib/x86_64/save_xmms.asm
+++ b/lib/x86_64/save_xmms.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 
 %ifdef LINUX
 %define ARG1	rdi
diff --git a/lib/x86_64/wireless_common.asm b/lib/x86_64/wireless_common.asm
index b55a9fe3..c646e3a2 100644
--- a/lib/x86_64/wireless_common.asm
+++ b/lib/x86_64/wireless_common.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/x86_64/zuc_common.asm b/lib/x86_64/zuc_common.asm
index 19961b36..cd48eb97 100644
--- a/lib/x86_64/zuc_common.asm
+++ b/lib/x86_64/zuc_common.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%include "include/os.asm"
+%include "include/os.inc"
 %include "include/reg_sizes.asm"
 %include "include/zuc_sbox.inc"
 
-- 
GitLab


From 67863fb4368ff9797e23bfedd7c6af783a5edaf0 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:48:43 +0000
Subject: [PATCH 032/332] lib: Rename reg_sizes file extension

---
 lib/avx2_t1/gcm_avx_gen4.asm                                | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm                  | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm                 | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm                 | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm                | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm               | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm              | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm               | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm              | 2 +-
 lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm                | 2 +-
 lib/avx2_t1/zuc_x8_avx2.asm                                 | 2 +-
 lib/avx512_t1/chacha20_avx512.asm                           | 2 +-
 lib/avx512_t1/des_x16_avx512.asm                            | 2 +-
 lib/avx512_t1/gcm_avx512.asm                                | 2 +-
 lib/avx512_t1/mb_mgr_des_avx512.asm                         | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm             | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm            | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm           | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm          | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm           | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm          | 2 +-
 lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm            | 2 +-
 lib/avx512_t1/poly_avx512.asm                               | 2 +-
 lib/avx512_t1/sha1_x16_avx512.asm                           | 2 +-
 lib/avx512_t1/sha256_x16_avx512.asm                         | 2 +-
 lib/avx512_t1/zuc_x16_avx512.asm                            | 2 +-
 lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm              | 2 +-
 lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm                   | 2 +-
 lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm                  | 2 +-
 lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc                 | 2 +-
 lib/avx512_t2/aes_docsis_dec_avx512.asm                     | 2 +-
 lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/aes_docsis_enc_avx512.asm                     | 2 +-
 lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/crc16_x25_avx512.asm                          | 2 +-
 lib/avx512_t2/crc32_by16_vclmul_avx512.asm                  | 2 +-
 lib/avx512_t2/crc32_fp_avx512.asm                           | 2 +-
 lib/avx512_t2/crc32_iuup_avx512.asm                         | 2 +-
 lib/avx512_t2/crc32_lte_avx512.asm                          | 2 +-
 lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm             | 2 +-
 lib/avx512_t2/crc32_sctp_avx512.asm                         | 2 +-
 lib/avx512_t2/crc32_wimax_avx512.asm                        | 2 +-
 lib/avx512_t2/ethernet_fcs_avx512.asm                       | 2 +-
 lib/avx512_t2/gcm_vaes_avx512.inc                           | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm        | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm       | 2 +-
 .../mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm | 2 +-
 .../mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm         | 2 +-
 lib/avx512_t2/poly_fma_avx512.asm                           | 2 +-
 lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm              | 2 +-
 lib/avx_t1/aes128_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes192_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes256_cntr_by8_avx.asm                          | 2 +-
 lib/avx_t1/crc16_x25_avx.asm                                | 2 +-
 lib/avx_t1/crc32_by8_avx.asm                                | 2 +-
 lib/avx_t1/crc32_fp_avx.asm                                 | 2 +-
 lib/avx_t1/crc32_iuup_avx.asm                               | 2 +-
 lib/avx_t1/crc32_lte_avx.asm                                | 2 +-
 lib/avx_t1/crc32_refl_by8_avx.asm                           | 2 +-
 lib/avx_t1/crc32_sctp_avx.asm                               | 2 +-
 lib/avx_t1/crc32_wimax_avx.asm                              | 2 +-
 lib/avx_t1/ethernet_fcs_avx.asm                             | 2 +-
 lib/avx_t1/gcm_avx_gen2.asm                                 | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm              | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm             | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm             | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm            | 2 +-
 lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm   | 2 +-
 lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm       | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm              | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm             | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm                    | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm                   | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm                   | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm                  | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm                | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm                | 2 +-
 lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm                  | 2 +-
 lib/avx_t1/snow3g_uia2_by4_avx.asm                          | 2 +-
 lib/avx_t1/snow_v_avx.asm                                   | 2 +-
 lib/avx_t1/zuc_x4_avx.asm                                   | 2 +-
 lib/include/aes_common.inc                                  | 2 +-
 lib/include/aesni_emu.inc                                   | 2 +-
 lib/include/error.inc                                       | 2 +-
 lib/include/gcm_common.inc                                  | 2 +-
 lib/include/memcpy.inc                                      | 2 +-
 lib/include/{reg_sizes.asm => reg_sizes.inc}                | 6 +++---
 lib/include/transpose_avx2.asm                              | 2 +-
 lib/include/transpose_avx512.asm                            | 2 +-
 lib/sse_t1/aes128_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes192_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes256_cntr_by8_sse.asm                          | 2 +-
 lib/sse_t1/crc16_x25_sse.asm                                | 2 +-
 lib/sse_t1/crc32_by8_sse.asm                                | 2 +-
 lib/sse_t1/crc32_fp_sse.asm                                 | 2 +-
 lib/sse_t1/crc32_iuup_sse.asm                               | 2 +-
 lib/sse_t1/crc32_lte_sse.asm                                | 2 +-
 lib/sse_t1/crc32_refl_by8_sse.asm                           | 2 +-
 lib/sse_t1/crc32_sctp_sse.asm                               | 2 +-
 lib/sse_t1/crc32_wimax_sse.asm                              | 2 +-
 lib/sse_t1/ethernet_fcs_sse.asm                             | 2 +-
 lib/sse_t1/gcm_sse.inc                                      | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm          | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm             | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm            | 2 +-
 lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm   | 2 +-
 lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm              | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm             | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm                    | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm                   | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm                   | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm                  | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm                | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm                | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm                  | 2 +-
 lib/sse_t1/snow3g_uea2_by4_sse.asm                          | 2 +-
 lib/sse_t1/snow3g_uia2_by4_sse.asm                          | 2 +-
 lib/sse_t1/snow_v_sse.asm                                   | 2 +-
 lib/sse_t1/zuc_x4_sse.asm                                   | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm                | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm               | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm              | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm             | 2 +-
 lib/x86_64/constant_lookup_fns.asm                          | 2 +-
 lib/x86_64/poly1305.asm                                     | 2 +-
 lib/x86_64/zuc_common.asm                                   | 2 +-
 136 files changed, 138 insertions(+), 138 deletions(-)
 rename lib/include/{reg_sizes.asm => reg_sizes.inc} (98%)

diff --git a/lib/avx2_t1/gcm_avx_gen4.asm b/lib/avx2_t1/gcm_avx_gen4.asm
index 679c2412..ac5830fd 100644
--- a/lib/avx2_t1/gcm_avx_gen4.asm
+++ b/lib/avx2_t1/gcm_avx_gen4.asm
@@ -111,7 +111,7 @@
 ;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_avx2_avx512.inc"
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
index 22cefc84..14952529 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 extern md5_x8x2_avx2
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
index fd7cc8e2..8bb7857e 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
index 0e780c06..413fa085 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 extern sha1_x8_avx2
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
index ac7d09ed..d9d2065c 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
index 6ae39694..b9f02aa7 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 extern sha256_oct_avx2
 
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
index b68e4580..a3ec0942 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
index a14f27ad..cb75aafd 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 extern sha512_x4_avx2
 
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
index 9e975e40..b9972c57 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 extern sha512_x4_avx2
diff --git a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
index 1a957949..cab945aa 100644
--- a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx2_t1/zuc_x8_avx2.asm b/lib/avx2_t1/zuc_x8_avx2.asm
index bd229194..c78299b8 100644
--- a/lib/avx2_t1/zuc_x8_avx2.asm
+++ b/lib/avx2_t1/zuc_x8_avx2.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/zuc_sbox.inc"
 %include "include/transpose_avx2.asm"
 %include "include/memcpy.inc"
diff --git a/lib/avx512_t1/chacha20_avx512.asm b/lib/avx512_t1/chacha20_avx512.asm
index 11f2db53..23a9f3bc 100644
--- a/lib/avx512_t1/chacha20_avx512.asm
+++ b/lib/avx512_t1/chacha20_avx512.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
 %include "include/const.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/transpose_avx512.asm"
 %include "include/aes_common.inc"
 %include "include/chacha_poly_defines.inc"
diff --git a/lib/avx512_t1/des_x16_avx512.asm b/lib/avx512_t1/des_x16_avx512.asm
index acf8ae09..9ed36475 100644
--- a/lib/avx512_t1/des_x16_avx512.asm
+++ b/lib/avx512_t1/des_x16_avx512.asm
@@ -47,7 +47,7 @@
 ;; Clobbers ZMM0-31 and K1 to K7
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
 ;%define DO_DBGPRINT
diff --git a/lib/avx512_t1/gcm_avx512.asm b/lib/avx512_t1/gcm_avx512.asm
index b2b66e4f..8aff0c98 100644
--- a/lib/avx512_t1/gcm_avx512.asm
+++ b/lib/avx512_t1/gcm_avx512.asm
@@ -112,7 +112,7 @@
 ;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_avx2_avx512.inc"
diff --git a/lib/avx512_t1/mb_mgr_des_avx512.asm b/lib/avx512_t1/mb_mgr_des_avx512.asm
index 26ec0caf..05fe58ee 100644
--- a/lib/avx512_t1/mb_mgr_des_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_des_avx512.asm
@@ -42,7 +42,7 @@
 ;; Clobbers ZMM0-31, K1-7 (K1-2 and K4-6 here but DES underneath clobbers K1-7).
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
index 87b9e934..26d30096 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
@@ -43,7 +43,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 ;; %define DO_DBGPRINT
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
index 4b4d0a3a..9d2cf755 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
@@ -43,7 +43,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
index d5529f49..567d4181 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
@@ -43,7 +43,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 ;; %define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
index 8ded7b8b..fc606edd 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
@@ -43,7 +43,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
index 13ce9107..08c3652c 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
@@ -35,7 +35,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 extern sha512_x8_avx512
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
index 4bae5151..c4039a4c 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
@@ -35,7 +35,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
index 350346e7..38ddb485 100644
--- a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t1/poly_avx512.asm b/lib/avx512_t1/poly_avx512.asm
index b52cecbc..edda1fd1 100644
--- a/lib/avx512_t1/poly_avx512.asm
+++ b/lib/avx512_t1/poly_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t1/sha1_x16_avx512.asm b/lib/avx512_t1/sha1_x16_avx512.asm
index b9ef66b2..3103a150 100644
--- a/lib/avx512_t1/sha1_x16_avx512.asm
+++ b/lib/avx512_t1/sha1_x16_avx512.asm
@@ -42,7 +42,7 @@
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx512.asm"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 mksection .rodata
 default rel
diff --git a/lib/avx512_t1/sha256_x16_avx512.asm b/lib/avx512_t1/sha256_x16_avx512.asm
index c2d0e43f..4d5d9124 100644
--- a/lib/avx512_t1/sha256_x16_avx512.asm
+++ b/lib/avx512_t1/sha256_x16_avx512.asm
@@ -42,7 +42,7 @@
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/transpose_avx512.asm"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 ; re-use K256 from sha256_oct_avx2.asm
 extern K256
diff --git a/lib/avx512_t1/zuc_x16_avx512.asm b/lib/avx512_t1/zuc_x16_avx512.asm
index 674c75c1..94a8c302 100644
--- a/lib/avx512_t1/zuc_x16_avx512.asm
+++ b/lib/avx512_t1/zuc_x16_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/zuc_sbox.inc"
 %include "include/transpose_avx512.asm"
 %include "include/const.inc"
diff --git a/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
index 8ca96fc1..1c856c39 100644
--- a/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/aes_common.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm b/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
index ddc28cf8..735689a4 100644
--- a/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
@@ -29,7 +29,7 @@
 
 %include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 struc STACK
diff --git a/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm b/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
index b4c15ea1..5464c8f8 100644
--- a/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
@@ -29,7 +29,7 @@
 
 %include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 %define GPR_SAVE_AREA   rsp + _gpr_save
diff --git a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
index 50cd3b4a..389ea65a 100644
--- a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
+++ b/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
@@ -31,7 +31,7 @@
 %define AES_CNTR_VAES_AVX512_INC
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
diff --git a/lib/avx512_t2/aes_docsis_dec_avx512.asm b/lib/avx512_t2/aes_docsis_dec_avx512.asm
index ee34a969..2e939468 100644
--- a/lib/avx512_t2/aes_docsis_dec_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_avx512.asm
@@ -27,7 +27,7 @@
 %use smartalign
 
 %include "include/imb_job.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
index b8ef9c29..37dd892d 100644
--- a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
@@ -27,7 +27,7 @@
 %use smartalign
 
 %include "include/imb_job.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/aes_common.inc"
diff --git a/lib/avx512_t2/aes_docsis_enc_avx512.asm b/lib/avx512_t2/aes_docsis_enc_avx512.asm
index 833df0d0..ad21314c 100644
--- a/lib/avx512_t2/aes_docsis_enc_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_avx512.asm
@@ -33,7 +33,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
index 368e3eb6..00a881a8 100644
--- a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
@@ -33,7 +33,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 %define APPEND(a,b) a %+ b
diff --git a/lib/avx512_t2/crc16_x25_avx512.asm b/lib/avx512_t2/crc16_x25_avx512.asm
index dbfc75a8..8540ba43 100644
--- a/lib/avx512_t2/crc16_x25_avx512.asm
+++ b/lib/avx512_t2/crc16_x25_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 %include "include/crc32_refl_const.inc"
 %include "include/crc32_refl.inc"
diff --git a/lib/avx512_t2/crc32_by16_vclmul_avx512.asm b/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
index ceef6d57..2e90ca78 100644
--- a/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
+++ b/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
@@ -36,7 +36,7 @@
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 %include "include/crc32.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/crc32_fp_avx512.asm b/lib/avx512_t2/crc32_fp_avx512.asm
index 18f3b7f7..b8f30aaf 100644
--- a/lib/avx512_t2/crc32_fp_avx512.asm
+++ b/lib/avx512_t2/crc32_fp_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/crc32_iuup_avx512.asm b/lib/avx512_t2/crc32_iuup_avx512.asm
index 5f3f6c95..e36c1de2 100644
--- a/lib/avx512_t2/crc32_iuup_avx512.asm
+++ b/lib/avx512_t2/crc32_iuup_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/crc32_lte_avx512.asm b/lib/avx512_t2/crc32_lte_avx512.asm
index 6093fae6..518f6658 100644
--- a/lib/avx512_t2/crc32_lte_avx512.asm
+++ b/lib/avx512_t2/crc32_lte_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm b/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
index a9bb401e..ce238185 100644
--- a/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
+++ b/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
@@ -36,7 +36,7 @@
 ;;     URL: http://download.intel.com/design/intarch/papers/323102.pdf
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 %include "include/crc32_refl.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/crc32_sctp_avx512.asm b/lib/avx512_t2/crc32_sctp_avx512.asm
index 7816b57d..d8a15e41 100644
--- a/lib/avx512_t2/crc32_sctp_avx512.asm
+++ b/lib/avx512_t2/crc32_sctp_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/crc32_wimax_avx512.asm b/lib/avx512_t2/crc32_wimax_avx512.asm
index 432142c0..4c6bd00f 100644
--- a/lib/avx512_t2/crc32_wimax_avx512.asm
+++ b/lib/avx512_t2/crc32_wimax_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/ethernet_fcs_avx512.asm b/lib/avx512_t2/ethernet_fcs_avx512.asm
index 4b616345..8b22f73e 100644
--- a/lib/avx512_t2/ethernet_fcs_avx512.asm
+++ b/lib/avx512_t2/ethernet_fcs_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 %include "include/crc32_refl_const.inc"
 %include "include/crc32_refl.inc"
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 09585423..d11bc14c 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -115,7 +115,7 @@
 %define GCM_VAES_AVX512_INC
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_vaes_avx512.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
index 21a5d940..f1c2e44a 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 %ifndef AES_CBC_ENC_X16
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
index 4b78ff88..05e05838 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
index 5044961e..a888e498 100644
--- a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/memcpy.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
index 83addbcb..ce8434d7 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
index c0d707f8..2b2bdd9b 100644
--- a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
index 91d389ae..f2ba1553 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/constants.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 %include "avx512_t2/snow3g_uea2_by16_vaes_avx512.asm"
diff --git a/lib/avx512_t2/poly_fma_avx512.asm b/lib/avx512_t2/poly_fma_avx512.asm
index 7626377a..db7b46eb 100644
--- a/lib/avx512_t2/poly_fma_avx512.asm
+++ b/lib/avx512_t2/poly_fma_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm b/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
index ee3932e0..f88ca3d0 100644
--- a/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
+++ b/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/cet.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
diff --git a/lib/avx_t1/aes128_cntr_by8_avx.asm b/lib/avx_t1/aes128_cntr_by8_avx.asm
index aeb0fc2f..66e56183 100644
--- a/lib/avx_t1/aes128_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes128_cntr_by8_avx.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 ; routine to do AES128 CNTR enc/decrypt "by8"
diff --git a/lib/avx_t1/aes192_cntr_by8_avx.asm b/lib/avx_t1/aes192_cntr_by8_avx.asm
index 9ec66f88..cb7594ed 100644
--- a/lib/avx_t1/aes192_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes192_cntr_by8_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 ; routine to do AES192 CNTR enc/decrypt "by8"
diff --git a/lib/avx_t1/aes256_cntr_by8_avx.asm b/lib/avx_t1/aes256_cntr_by8_avx.asm
index 2cf0c934..fc272e59 100644
--- a/lib/avx_t1/aes256_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes256_cntr_by8_avx.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 ; routine to do AES256 CNTR enc/decrypt "by8"
diff --git a/lib/avx_t1/crc16_x25_avx.asm b/lib/avx_t1/crc16_x25_avx.asm
index e62e9715..ce8a1149 100644
--- a/lib/avx_t1/crc16_x25_avx.asm
+++ b/lib/avx_t1/crc16_x25_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_refl_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/crc32_by8_avx.asm b/lib/avx_t1/crc32_by8_avx.asm
index d04f6ca2..f25a6ba0 100644
--- a/lib/avx_t1/crc32_by8_avx.asm
+++ b/lib/avx_t1/crc32_by8_avx.asm
@@ -37,7 +37,7 @@
 
 %include "include/os.inc"
 %include "include/memcpy.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx_t1/crc32_fp_avx.asm b/lib/avx_t1/crc32_fp_avx.asm
index dde0a377..2cf1c5e3 100644
--- a/lib/avx_t1/crc32_fp_avx.asm
+++ b/lib/avx_t1/crc32_fp_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/crc32_iuup_avx.asm b/lib/avx_t1/crc32_iuup_avx.asm
index 649f581b..ebc5e5f0 100644
--- a/lib/avx_t1/crc32_iuup_avx.asm
+++ b/lib/avx_t1/crc32_iuup_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/crc32_lte_avx.asm b/lib/avx_t1/crc32_lte_avx.asm
index bbed30f5..a8fb8b93 100644
--- a/lib/avx_t1/crc32_lte_avx.asm
+++ b/lib/avx_t1/crc32_lte_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/crc32_refl_by8_avx.asm b/lib/avx_t1/crc32_refl_by8_avx.asm
index e9d71ad4..8f801ffc 100644
--- a/lib/avx_t1/crc32_refl_by8_avx.asm
+++ b/lib/avx_t1/crc32_refl_by8_avx.asm
@@ -37,7 +37,7 @@
 
 %include "include/os.inc"
 %include "include/memcpy.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_refl.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx_t1/crc32_sctp_avx.asm b/lib/avx_t1/crc32_sctp_avx.asm
index 3dc26b0d..4d4c9e5b 100644
--- a/lib/avx_t1/crc32_sctp_avx.asm
+++ b/lib/avx_t1/crc32_sctp_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/crc32_wimax_avx.asm b/lib/avx_t1/crc32_wimax_avx.asm
index 70c25086..06f53cb7 100644
--- a/lib/avx_t1/crc32_wimax_avx.asm
+++ b/lib/avx_t1/crc32_wimax_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/ethernet_fcs_avx.asm b/lib/avx_t1/ethernet_fcs_avx.asm
index c1381a34..296ee2a0 100644
--- a/lib/avx_t1/ethernet_fcs_avx.asm
+++ b/lib/avx_t1/ethernet_fcs_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_refl_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/avx_t1/gcm_avx_gen2.asm b/lib/avx_t1/gcm_avx_gen2.asm
index f3e3ad1a..4a7c2838 100644
--- a/lib/avx_t1/gcm_avx_gen2.asm
+++ b/lib/avx_t1/gcm_avx_gen2.asm
@@ -112,7 +112,7 @@
 ;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_sse_avx.inc"
diff --git a/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
index 07c9564d..f4d4398b 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 %ifndef AES_CBC_ENC_X8
 %define AES_CBC_ENC_X8 aes_cbc_enc_128_x8
diff --git a/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
index 68bf438f..4bac990d 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 
 %ifndef AES_CBC_ENC_X8
diff --git a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
index dcbe6b5f..822717c7 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 %define NUM_LANES 8
 
diff --git a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
index 263ea319..72b8dd5c 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 
 %define NUM_LANES 8
diff --git a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
index 361e028e..40108a72 100644
--- a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/memcpy.inc"
 
diff --git a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
index ec917b32..2886a428 100644
--- a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 ;%define DO_DBGPRINT
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
index 7a634007..5a2a1817 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 %ifndef AES_XCBC_X8
 %define AES_XCBC_X8 aes_xcbc_mac_128_x8
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
index 5db6933a..c7e0b4d2 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 %include "include/memcpy.inc"
 %include "include/const.inc"
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
index 8fc2bdef..cc0f0077 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 extern md5_x4x2_avx
 
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
index 7b738fb6..7489cd32 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 
 extern md5_x4x2_avx
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
index f2f23e43..2dc52567 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 extern sha1_mult_avx
 
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
index d674fc34..f4e35822 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
index e295f060..6f64bc50 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 extern sha_256_mult_avx
 
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
index 55a74cde..0d4c6e95 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
index 2fb0de31..6fcfe7ee 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 extern sha512_x2_avx
 
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
index ed98e22e..75d57149 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 
diff --git a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
index 3b7e7d04..b3a670fd 100644
--- a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx_t1/snow3g_uia2_by4_avx.asm b/lib/avx_t1/snow3g_uia2_by4_avx.asm
index 9fb22142..7dea2639 100644
--- a/lib/avx_t1/snow3g_uia2_by4_avx.asm
+++ b/lib/avx_t1/snow3g_uia2_by4_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/cet.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
diff --git a/lib/avx_t1/snow_v_avx.asm b/lib/avx_t1/snow_v_avx.asm
index a2dade04..0fc556a3 100644
--- a/lib/avx_t1/snow_v_avx.asm
+++ b/lib/avx_t1/snow_v_avx.asm
@@ -31,7 +31,7 @@
 ;; https://eprint.iacr.org/2018/1143.pdf
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx_t1/zuc_x4_avx.asm b/lib/avx_t1/zuc_x4_avx.asm
index d020b792..2b44e3bd 100644
--- a/lib/avx_t1/zuc_x4_avx.asm
+++ b/lib/avx_t1/zuc_x4_avx.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/zuc_sbox.inc"
 %include "include/memcpy.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/include/aes_common.inc b/lib/include/aes_common.inc
index 40f6a593..96575aaf 100644
--- a/lib/include/aes_common.inc
+++ b/lib/include/aes_common.inc
@@ -28,7 +28,7 @@
 %ifndef _AES_COMMON_INC_
 %define _AES_COMMON_INC_
 
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 ;; =============================================================================
 ;; Generic macro to produce code that executes %%OPCODE instruction
diff --git a/lib/include/aesni_emu.inc b/lib/include/aesni_emu.inc
index ceee77ba..6134352e 100644
--- a/lib/include/aesni_emu.inc
+++ b/lib/include/aesni_emu.inc
@@ -29,7 +29,7 @@
 %ifndef _AESNI_EMU_INC_
 %define _AESNI_EMU_INC_
 
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;; Utility macros and defines to assist AESNI translation macros
diff --git a/lib/include/error.inc b/lib/include/error.inc
index 54df265f..7d0f1630 100644
--- a/lib/include/error.inc
+++ b/lib/include/error.inc
@@ -28,7 +28,7 @@
 %ifndef ERROR_ASM_INCLUDED
 %define ERROR_ASM_INCLUDED
 
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 extern imb_errno
 extern imb_errno_types
diff --git a/lib/include/gcm_common.inc b/lib/include/gcm_common.inc
index 94d39783..e2738f8b 100644
--- a/lib/include/gcm_common.inc
+++ b/lib/include/gcm_common.inc
@@ -28,7 +28,7 @@
 %ifndef _GCM_COMMON_INC_
 %define _GCM_COMMON_INC_
 
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 ;; ***
 ;; *** SSE and AVX
diff --git a/lib/include/memcpy.inc b/lib/include/memcpy.inc
index 1d964415..b86d67e8 100644
--- a/lib/include/memcpy.inc
+++ b/lib/include/memcpy.inc
@@ -28,7 +28,7 @@
 %ifndef __MEMCPY_INC__
 %define __MEMCPY_INC__
 
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 ; This section defines a series of macros to copy small to medium amounts
 ; of data from memory to memory, where the size is variable but limited.
diff --git a/lib/include/reg_sizes.asm b/lib/include/reg_sizes.inc
similarity index 98%
rename from lib/include/reg_sizes.asm
rename to lib/include/reg_sizes.inc
index c2845e90..92bbe0ea 100644
--- a/lib/include/reg_sizes.asm
+++ b/lib/include/reg_sizes.inc
@@ -27,8 +27,8 @@
 
 ; define d and w variants for registers
 
-%ifndef _REG_SIZES_ASM_
-%define _REG_SIZES_ASM_
+%ifndef _REG_SIZES_INC_
+%define _REG_SIZES_INC_
 
 %define	raxd	eax
 %define raxw	ax
@@ -297,4 +297,4 @@
 %define YWORD(reg) reg %+ y
 %define ZWORD(reg) reg %+ z
 
-%endif ;; _REG_SIZES_ASM_
+%endif ;; _REG_SIZES_INC_
diff --git a/lib/include/transpose_avx2.asm b/lib/include/transpose_avx2.asm
index 56e18a78..28a76828 100644
--- a/lib/include/transpose_avx2.asm
+++ b/lib/include/transpose_avx2.asm
@@ -28,7 +28,7 @@
 %ifndef _TRANSPOSE_AVX2_ASM_
 %define _TRANSPOSE_AVX2_ASM_
 
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 ; LOAD ALL 8 LANES FOR 8x8 32-BIT TRANSPOSE
 ;
diff --git a/lib/include/transpose_avx512.asm b/lib/include/transpose_avx512.asm
index c3a49ba8..9b1254f5 100644
--- a/lib/include/transpose_avx512.asm
+++ b/lib/include/transpose_avx512.asm
@@ -29,7 +29,7 @@
 %define _TRANSPOSE_AVX512_ASM_
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 mksection .rodata
 default rel
diff --git a/lib/sse_t1/aes128_cntr_by8_sse.asm b/lib/sse_t1/aes128_cntr_by8_sse.asm
index a8131e82..8d709273 100644
--- a/lib/sse_t1/aes128_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes128_cntr_by8_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 ; routine to do AES128 CNTR enc/decrypt "by8"
diff --git a/lib/sse_t1/aes192_cntr_by8_sse.asm b/lib/sse_t1/aes192_cntr_by8_sse.asm
index 656b13f0..dda4c4e4 100644
--- a/lib/sse_t1/aes192_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes192_cntr_by8_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 ; routine to do AES192 CNTR enc/decrypt "by8"
diff --git a/lib/sse_t1/aes256_cntr_by8_sse.asm b/lib/sse_t1/aes256_cntr_by8_sse.asm
index ef183d29..ca98c2b9 100644
--- a/lib/sse_t1/aes256_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes256_cntr_by8_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 
 ; routine to do AES256 CNTR enc/decrypt "by8"
diff --git a/lib/sse_t1/crc16_x25_sse.asm b/lib/sse_t1/crc16_x25_sse.asm
index 180701f7..47154ea7 100644
--- a/lib/sse_t1/crc16_x25_sse.asm
+++ b/lib/sse_t1/crc16_x25_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_refl_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/sse_t1/crc32_by8_sse.asm b/lib/sse_t1/crc32_by8_sse.asm
index 2a5ee065..61422bc1 100644
--- a/lib/sse_t1/crc32_by8_sse.asm
+++ b/lib/sse_t1/crc32_by8_sse.asm
@@ -37,7 +37,7 @@
 
 %include "include/os.inc"
 %include "include/memcpy.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t1/crc32_fp_sse.asm b/lib/sse_t1/crc32_fp_sse.asm
index ae874652..0cc943ed 100644
--- a/lib/sse_t1/crc32_fp_sse.asm
+++ b/lib/sse_t1/crc32_fp_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/sse_t1/crc32_iuup_sse.asm b/lib/sse_t1/crc32_iuup_sse.asm
index db14128b..7de78090 100644
--- a/lib/sse_t1/crc32_iuup_sse.asm
+++ b/lib/sse_t1/crc32_iuup_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/sse_t1/crc32_lte_sse.asm b/lib/sse_t1/crc32_lte_sse.asm
index affcec87..956db449 100644
--- a/lib/sse_t1/crc32_lte_sse.asm
+++ b/lib/sse_t1/crc32_lte_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/sse_t1/crc32_refl_by8_sse.asm b/lib/sse_t1/crc32_refl_by8_sse.asm
index c195c363..990c1592 100644
--- a/lib/sse_t1/crc32_refl_by8_sse.asm
+++ b/lib/sse_t1/crc32_refl_by8_sse.asm
@@ -37,7 +37,7 @@
 
 %include "include/os.inc"
 %include "include/memcpy.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_refl.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t1/crc32_sctp_sse.asm b/lib/sse_t1/crc32_sctp_sse.asm
index 0d2ef037..563ef70e 100644
--- a/lib/sse_t1/crc32_sctp_sse.asm
+++ b/lib/sse_t1/crc32_sctp_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/sse_t1/crc32_wimax_sse.asm b/lib/sse_t1/crc32_wimax_sse.asm
index 323ee6f1..aba2b859 100644
--- a/lib/sse_t1/crc32_wimax_sse.asm
+++ b/lib/sse_t1/crc32_wimax_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/sse_t1/ethernet_fcs_sse.asm b/lib/sse_t1/ethernet_fcs_sse.asm
index d908cf51..2b9180bd 100644
--- a/lib/sse_t1/ethernet_fcs_sse.asm
+++ b/lib/sse_t1/ethernet_fcs_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/crc32_refl_const.inc"
 %include "include/clear_regs.inc"
 %include "include/cet.inc"
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index 096f1df7..6d3ec092 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -115,7 +115,7 @@
 %define GCM_SSE_INC
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 %include "include/gcm_defines.inc"
 %include "include/gcm_keys_sse_avx.inc"
diff --git a/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
index 8f048705..ede1b167 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 %ifndef NUM_LANES
 %define NUM_LANES 4
diff --git a/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
index a182c64a..c50cfb14 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %ifndef NUM_LANES
 %define NUM_LANES 4
diff --git a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
index 5beee06b..72efaa1a 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 %define NUM_LANES 4
 
diff --git a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
index 681eb76f..d79258cc 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 
 %define NUM_LANES 4
diff --git a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
index 935d6077..19566a55 100644
--- a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/memcpy.inc"
 
diff --git a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
index 58ec40a1..8ecef621 100644
--- a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 ;%define DO_DBGPRINT
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
index 43e55556..3aeaa372 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 %ifndef AES_XCBC_X4
 %define AES_XCBC_X4 aes_xcbc_mac_128_x4
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
index d07cec4d..8a52366e 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
@@ -29,7 +29,7 @@
 %include "include/const.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %ifndef AES_XCBC_X4
 %define AES_XCBC_X4 aes_xcbc_mac_128_x4
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
index e49c79d9..e604b422 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 extern md5_x4x2_sse
 
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
index 26335fb2..31c7c8fd 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 
 extern md5_x4x2_sse
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
index 8bad8371..23a567e1 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
index f129038e..c30edc3d 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
index d337e007..f4851754 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 extern sha_256_mult_sse
 
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
index ad0cbf3b..2ed3158d 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
index 351031bf..b8dd8ad1 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 extern sha512_x2_sse
 
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
index d1309698..0c254ccd 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
 
diff --git a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
index 6a1e6459..ec1e30a7 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "sse_t1/snow3g_uea2_by4_sse.asm"
 
 %define SUBMIT_JOB_SNOW3G_UEA2 submit_job_snow3g_uea2_sse
diff --git a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
index 62dceedc..6e1c8ea3 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 %include "sse_t1/snow3g_uea2_by4_sse.asm"
 
diff --git a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
index c3967d1c..5ebb544f 100644
--- a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/sse_t1/snow3g_uea2_by4_sse.asm b/lib/sse_t1/snow3g_uea2_by4_sse.asm
index 21da889f..e610bc50 100644
--- a/lib/sse_t1/snow3g_uea2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uea2_by4_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/snow3g_uia2_by4_sse.asm b/lib/sse_t1/snow3g_uia2_by4_sse.asm
index ea38794c..635c1e94 100644
--- a/lib/sse_t1/snow3g_uia2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uia2_by4_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/cet.inc"
 %include "include/memcpy.inc"
 %include "include/const.inc"
diff --git a/lib/sse_t1/snow_v_sse.asm b/lib/sse_t1/snow_v_sse.asm
index 14956f84..15b7073b 100644
--- a/lib/sse_t1/snow_v_sse.asm
+++ b/lib/sse_t1/snow_v_sse.asm
@@ -31,7 +31,7 @@
 ;; https://eprint.iacr.org/2018/1143.pdf
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/sse_t1/zuc_x4_sse.asm b/lib/sse_t1/zuc_x4_sse.asm
index cacde7d9..c689b547 100644
--- a/lib/sse_t1/zuc_x4_sse.asm
+++ b/lib/sse_t1/zuc_x4_sse.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/zuc_sbox.inc"
 %include "include/memcpy.inc"
 %include "include/mb_mgr_datastruct.inc"
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
index c300e34e..ede04f69 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
@@ -45,7 +45,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
index c0060c5e..ca29b09d 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
@@ -45,7 +45,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 
 ;%define DO_DBGPRINT
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
index 91001237..80bb02f3 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
@@ -36,7 +36,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
index fdb81bcf..55d2e651 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
@@ -36,7 +36,7 @@
 %include "include/os.inc"
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 
 ;%define DO_DBGPRINT
diff --git a/lib/x86_64/constant_lookup_fns.asm b/lib/x86_64/constant_lookup_fns.asm
index 689822dd..48eba196 100644
--- a/lib/x86_64/constant_lookup_fns.asm
+++ b/lib/x86_64/constant_lookup_fns.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/constant_lookup.inc"
 
 mksection .rodata
diff --git a/lib/x86_64/poly1305.asm b/lib/x86_64/poly1305.asm
index 739fd6b5..9ad6a2ad 100644
--- a/lib/x86_64/poly1305.asm
+++ b/lib/x86_64/poly1305.asm
@@ -34,7 +34,7 @@
 ;;     http://loup-vaillant.fr/tutorials/poly1305-design
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/memcpy.inc"
 %include "include/imb_job.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/x86_64/zuc_common.asm b/lib/x86_64/zuc_common.asm
index cd48eb97..75b4bca2 100644
--- a/lib/x86_64/zuc_common.asm
+++ b/lib/x86_64/zuc_common.asm
@@ -26,7 +26,7 @@
 ;;
 
 %include "include/os.inc"
-%include "include/reg_sizes.asm"
+%include "include/reg_sizes.inc"
 %include "include/zuc_sbox.inc"
 
 mksection .rodata
-- 
GitLab


From 9efe718cc936ffc198ab6b5077d68b78674ceb2c Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:51:41 +0000
Subject: [PATCH 033/332] lib: Rename transpose_avx2 file extension

---
 lib/avx2_t1/chacha20_avx2.asm                          | 2 +-
 lib/avx2_t1/md5_x8x2_avx2.asm                          | 2 +-
 lib/avx2_t1/sha1_x8_avx2.asm                           | 2 +-
 lib/avx2_t1/sha256_oct_avx2.asm                        | 2 +-
 lib/avx2_t1/sha512_x4_avx2.asm                         | 2 +-
 lib/avx2_t1/zuc_x8_avx2.asm                            | 2 +-
 lib/include/{transpose_avx2.asm => transpose_avx2.inc} | 6 +++---
 7 files changed, 9 insertions(+), 9 deletions(-)
 rename lib/include/{transpose_avx2.asm => transpose_avx2.inc} (99%)

diff --git a/lib/avx2_t1/chacha20_avx2.asm b/lib/avx2_t1/chacha20_avx2.asm
index c6b9bbf0..acc6b3d4 100644
--- a/lib/avx2_t1/chacha20_avx2.asm
+++ b/lib/avx2_t1/chacha20_avx2.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/clear_regs.inc"
-%include "include/transpose_avx2.asm"
+%include "include/transpose_avx2.inc"
 %include "include/chacha_poly_defines.inc"
 %include "include/cet.inc"
 mksection .rodata
diff --git a/lib/avx2_t1/md5_x8x2_avx2.asm b/lib/avx2_t1/md5_x8x2_avx2.asm
index c1fce8a5..436334d4 100644
--- a/lib/avx2_t1/md5_x8x2_avx2.asm
+++ b/lib/avx2_t1/md5_x8x2_avx2.asm
@@ -38,7 +38,7 @@
 
 %include "include/os.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/transpose_avx2.asm"
+%include "include/transpose_avx2.inc"
 %include "include/clear_regs.inc"
 
 mksection .rodata
diff --git a/lib/avx2_t1/sha1_x8_avx2.asm b/lib/avx2_t1/sha1_x8_avx2.asm
index 8635de93..cc0e0109 100644
--- a/lib/avx2_t1/sha1_x8_avx2.asm
+++ b/lib/avx2_t1/sha1_x8_avx2.asm
@@ -38,7 +38,7 @@
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/transpose_avx2.asm"
+%include "include/transpose_avx2.inc"
 %include "include/clear_regs.inc"
 
 mksection .rodata
diff --git a/lib/avx2_t1/sha256_oct_avx2.asm b/lib/avx2_t1/sha256_oct_avx2.asm
index a8cf4964..c00d0b33 100644
--- a/lib/avx2_t1/sha256_oct_avx2.asm
+++ b/lib/avx2_t1/sha256_oct_avx2.asm
@@ -43,7 +43,7 @@
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/transpose_avx2.asm"
+%include "include/transpose_avx2.inc"
 %include "include/clear_regs.inc"
 
 mksection .rodata
diff --git a/lib/avx2_t1/sha512_x4_avx2.asm b/lib/avx2_t1/sha512_x4_avx2.asm
index 6e63a950..b3729920 100644
--- a/lib/avx2_t1/sha512_x4_avx2.asm
+++ b/lib/avx2_t1/sha512_x4_avx2.asm
@@ -43,7 +43,7 @@
 %include "include/os.inc"
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
-%include "include/transpose_avx2.asm"
+%include "include/transpose_avx2.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/clear_regs.inc"
 mksection .rodata
diff --git a/lib/avx2_t1/zuc_x8_avx2.asm b/lib/avx2_t1/zuc_x8_avx2.asm
index c78299b8..b96206c1 100644
--- a/lib/avx2_t1/zuc_x8_avx2.asm
+++ b/lib/avx2_t1/zuc_x8_avx2.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/reg_sizes.inc"
 %include "include/zuc_sbox.inc"
-%include "include/transpose_avx2.asm"
+%include "include/transpose_avx2.inc"
 %include "include/memcpy.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
diff --git a/lib/include/transpose_avx2.asm b/lib/include/transpose_avx2.inc
similarity index 99%
rename from lib/include/transpose_avx2.asm
rename to lib/include/transpose_avx2.inc
index 28a76828..faf121ca 100644
--- a/lib/include/transpose_avx2.asm
+++ b/lib/include/transpose_avx2.inc
@@ -25,8 +25,8 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%ifndef _TRANSPOSE_AVX2_ASM_
-%define _TRANSPOSE_AVX2_ASM_
+%ifndef _TRANSPOSE_AVX2_INC_
+%define _TRANSPOSE_AVX2_INC_
 
 %include "include/reg_sizes.inc"
 
@@ -257,4 +257,4 @@
 	vshufps	%%r3, %%r2, %%r3, 0xEE	; r3 = {d3 c3 b3 a3}
 %endmacro
 
-%endif ;; _TRANSPOSE_AVX2_ASM_
+%endif ;; _TRANSPOSE_AVX2_INC_
-- 
GitLab


From f4c4a29b0c5a4a4e23b0aeea27b81dab0d8673b5 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:54:47 +0000
Subject: [PATCH 034/332] lib: Rename transpose_avx512 file extension

---
 lib/avx512_t1/chacha20_avx512.asm                           | 2 +-
 lib/avx512_t1/sha1_x16_avx512.asm                           | 2 +-
 lib/avx512_t1/sha256_x16_avx512.asm                         | 2 +-
 lib/avx512_t1/sha512_x8_avx512.asm                          | 2 +-
 lib/avx512_t1/zuc_x16_avx512.asm                            | 2 +-
 .../mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm         | 2 +-
 lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm              | 2 +-
 lib/include/{transpose_avx512.asm => transpose_avx512.inc}  | 6 +++---
 8 files changed, 10 insertions(+), 10 deletions(-)
 rename lib/include/{transpose_avx512.asm => transpose_avx512.inc} (99%)

diff --git a/lib/avx512_t1/chacha20_avx512.asm b/lib/avx512_t1/chacha20_avx512.asm
index 23a9f3bc..2eecb809 100644
--- a/lib/avx512_t1/chacha20_avx512.asm
+++ b/lib/avx512_t1/chacha20_avx512.asm
@@ -30,7 +30,7 @@
 %include "include/clear_regs.inc"
 %include "include/const.inc"
 %include "include/reg_sizes.inc"
-%include "include/transpose_avx512.asm"
+%include "include/transpose_avx512.inc"
 %include "include/aes_common.inc"
 %include "include/chacha_poly_defines.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t1/sha1_x16_avx512.asm b/lib/avx512_t1/sha1_x16_avx512.asm
index 3103a150..0c47597c 100644
--- a/lib/avx512_t1/sha1_x16_avx512.asm
+++ b/lib/avx512_t1/sha1_x16_avx512.asm
@@ -41,7 +41,7 @@
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/transpose_avx512.asm"
+%include "include/transpose_avx512.inc"
 %include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 mksection .rodata
diff --git a/lib/avx512_t1/sha256_x16_avx512.asm b/lib/avx512_t1/sha256_x16_avx512.asm
index 4d5d9124..ecee8ce5 100644
--- a/lib/avx512_t1/sha256_x16_avx512.asm
+++ b/lib/avx512_t1/sha256_x16_avx512.asm
@@ -41,7 +41,7 @@
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/transpose_avx512.asm"
+%include "include/transpose_avx512.inc"
 %include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
 ; re-use K256 from sha256_oct_avx2.asm
diff --git a/lib/avx512_t1/sha512_x8_avx512.asm b/lib/avx512_t1/sha512_x8_avx512.asm
index 5233e6b1..a4fefb50 100644
--- a/lib/avx512_t1/sha512_x8_avx512.asm
+++ b/lib/avx512_t1/sha512_x8_avx512.asm
@@ -43,7 +43,7 @@
 ;%define DO_DBGPRINT
 %include "include/dbgprint.inc"
 %include "include/mb_mgr_datastruct.inc"
-%include "include/transpose_avx512.asm"
+%include "include/transpose_avx512.inc"
 %include "include/clear_regs.inc"
 %define APPEND(a,b) a %+ b
 
diff --git a/lib/avx512_t1/zuc_x16_avx512.asm b/lib/avx512_t1/zuc_x16_avx512.asm
index 94a8c302..ef711ef0 100644
--- a/lib/avx512_t1/zuc_x16_avx512.asm
+++ b/lib/avx512_t1/zuc_x16_avx512.asm
@@ -28,7 +28,7 @@
 %include "include/os.inc"
 %include "include/reg_sizes.inc"
 %include "include/zuc_sbox.inc"
-%include "include/transpose_avx512.asm"
+%include "include/transpose_avx512.inc"
 %include "include/const.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
index db3bc698..b34b2d83 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
@@ -27,7 +27,7 @@
 
 %include "include/mb_mgr_datastruct.inc"
 %include "include/datastruct.inc"
-%include "include/transpose_avx512.asm"
+%include "include/transpose_avx512.inc"
 %include "include/imb_job.inc"
 %include "include/os.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm b/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
index c4948183..303e83b5 100644
--- a/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
@@ -25,7 +25,7 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 %include "include/mb_mgr_datastruct.inc"
-%include "include/transpose_avx512.asm"
+%include "include/transpose_avx512.inc"
 %include "include/imb_job.inc"
 %include "include/constant_lookup.inc"
 
diff --git a/lib/include/transpose_avx512.asm b/lib/include/transpose_avx512.inc
similarity index 99%
rename from lib/include/transpose_avx512.asm
rename to lib/include/transpose_avx512.inc
index 9b1254f5..6ece8fc4 100644
--- a/lib/include/transpose_avx512.asm
+++ b/lib/include/transpose_avx512.inc
@@ -25,8 +25,8 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%ifndef _TRANSPOSE_AVX512_ASM_
-%define _TRANSPOSE_AVX512_ASM_
+%ifndef _TRANSPOSE_AVX512_INC_
+%define _TRANSPOSE_AVX512_INC_
 
 %include "include/os.inc"
 %include "include/reg_sizes.inc"
@@ -732,4 +732,4 @@ PSHUFFLE_TRANSPOSE_MASK2: 	dq 0x0000000000000002
         vshufi64x2      %%r1, %%t0, %%t1, 0x44 ; 1 5 9  13
         vshufi64x2      %%r3, %%t0, %%t1, 0xee ; 3 7 11 15
 %endmacro
-%endif ;; _TRANSPOSE_AVX512_ASM_
+%endif ;; _TRANSPOSE_AVX512_INC_
-- 
GitLab


From 649fdf62ef84eb5b9c66fd23656f4ff63249405d Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 23 Nov 2022 16:56:31 +0000
Subject: [PATCH 035/332] lib: Rename transpose_sse file extension

---
 lib/include/{transpose_sse.asm => transpose_sse.inc} | 6 +++---
 lib/sse_t1/snow3g_uea2_by4_sse.asm                   | 2 +-
 2 files changed, 4 insertions(+), 4 deletions(-)
 rename lib/include/{transpose_sse.asm => transpose_sse.inc} (96%)

diff --git a/lib/include/transpose_sse.asm b/lib/include/transpose_sse.inc
similarity index 96%
rename from lib/include/transpose_sse.asm
rename to lib/include/transpose_sse.inc
index 74797788..6ada0dc3 100644
--- a/lib/include/transpose_sse.asm
+++ b/lib/include/transpose_sse.inc
@@ -25,8 +25,8 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-%ifndef _TRANSPOSE_SSE_ASM_
-%define _TRANSPOSE_SSE_ASM_
+%ifndef _TRANSPOSE_SSE_INC_
+%define _TRANSPOSE_SSE_INC_
 
 ;; transpose r0, r1, r2, r3, t0, t1
 ;; "transpose" data in {r0..r3} using temps {t0..t3}
@@ -67,4 +67,4 @@
         shufps  %%t0, %%t1, 0x88        ; t0 = {d0 c0 b0 a0}
 %endmacro
 
-%endif ;; _TRANSPOSE_SSE_ASM_
\ No newline at end of file
+%endif ;; _TRANSPOSE_SSE_INC_
diff --git a/lib/sse_t1/snow3g_uea2_by4_sse.asm b/lib/sse_t1/snow3g_uea2_by4_sse.asm
index e610bc50..840dbe49 100644
--- a/lib/sse_t1/snow3g_uea2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uea2_by4_sse.asm
@@ -32,7 +32,7 @@
 %include "include/clear_regs.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/memcpy.inc"
-%include "include/transpose_sse.asm"
+%include "include/transpose_sse.inc"
 
 extern snow3g_table_A_mul
 extern snow3g_table_A_div
-- 
GitLab


From b87d233622b7e35467086d0b9b0d37c317c0b6ff Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 24 Nov 2022 17:06:01 +0000
Subject: [PATCH 036/332] lib: Move GCM template modules to include dir

---
 lib/avx2_t1/aes128_gcm_by8_avx2.asm                        | 2 +-
 lib/avx2_t1/aes192_gcm_by8_avx2.asm                        | 2 +-
 lib/avx2_t1/aes256_gcm_by8_avx2.asm                        | 2 +-
 lib/avx512_t1/aes128_gcm_by8_avx512.asm                    | 2 +-
 lib/avx512_t1/aes192_gcm_by8_avx512.asm                    | 2 +-
 lib/avx512_t1/aes256_gcm_by8_avx512.asm                    | 2 +-
 lib/avx512_t2/gcm_vaes_avx512.inc                          | 2 +-
 lib/avx_t1/aes128_gcm_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes192_gcm_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes256_gcm_by8_avx.asm                          | 2 +-
 lib/{avx512_t1/gcm_avx512.asm => include/gcm_avx512.inc}   | 2 +-
 lib/{avx_t1/gcm_avx_gen2.asm => include/gcm_avx_gen2.inc}  | 2 +-
 lib/{avx2_t1/gcm_avx_gen4.asm => include/gcm_avx_gen4.inc} | 2 +-
 13 files changed, 13 insertions(+), 13 deletions(-)
 rename lib/{avx512_t1/gcm_avx512.asm => include/gcm_avx512.inc} (99%)
 rename lib/{avx_t1/gcm_avx_gen2.asm => include/gcm_avx_gen2.inc} (99%)
 rename lib/{avx2_t1/gcm_avx_gen4.asm => include/gcm_avx_gen4.inc} (99%)

diff --git a/lib/avx2_t1/aes128_gcm_by8_avx2.asm b/lib/avx2_t1/aes128_gcm_by8_avx2.asm
index 78945318..853ec920 100644
--- a/lib/avx2_t1/aes128_gcm_by8_avx2.asm
+++ b/lib/avx2_t1/aes128_gcm_by8_avx2.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM128_MODE 1
-%include "avx2_t1/gcm_avx_gen4.asm"
+%include "include/gcm_avx_gen4.inc"
diff --git a/lib/avx2_t1/aes192_gcm_by8_avx2.asm b/lib/avx2_t1/aes192_gcm_by8_avx2.asm
index 6f3255a3..b3b792d3 100644
--- a/lib/avx2_t1/aes192_gcm_by8_avx2.asm
+++ b/lib/avx2_t1/aes192_gcm_by8_avx2.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM192_MODE 1
-%include "avx2_t1/gcm_avx_gen4.asm"
+%include "include/gcm_avx_gen4.inc"
diff --git a/lib/avx2_t1/aes256_gcm_by8_avx2.asm b/lib/avx2_t1/aes256_gcm_by8_avx2.asm
index 4e3bf23e..d07966e1 100644
--- a/lib/avx2_t1/aes256_gcm_by8_avx2.asm
+++ b/lib/avx2_t1/aes256_gcm_by8_avx2.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM256_MODE 1
-%include "avx2_t1/gcm_avx_gen4.asm"
+%include "include/gcm_avx_gen4.inc"
diff --git a/lib/avx512_t1/aes128_gcm_by8_avx512.asm b/lib/avx512_t1/aes128_gcm_by8_avx512.asm
index 4415ca93..fa38757b 100644
--- a/lib/avx512_t1/aes128_gcm_by8_avx512.asm
+++ b/lib/avx512_t1/aes128_gcm_by8_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM128_MODE 1
-%include "avx512_t1/gcm_avx512.asm"
+%include "include/gcm_avx512.inc"
diff --git a/lib/avx512_t1/aes192_gcm_by8_avx512.asm b/lib/avx512_t1/aes192_gcm_by8_avx512.asm
index 96ae8046..3aa46b5f 100644
--- a/lib/avx512_t1/aes192_gcm_by8_avx512.asm
+++ b/lib/avx512_t1/aes192_gcm_by8_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM192_MODE 1
-%include "avx512_t1/gcm_avx512.asm"
+%include "include/gcm_avx512.inc"
diff --git a/lib/avx512_t1/aes256_gcm_by8_avx512.asm b/lib/avx512_t1/aes256_gcm_by8_avx512.asm
index 5083081a..10bdaf2c 100644
--- a/lib/avx512_t1/aes256_gcm_by8_avx512.asm
+++ b/lib/avx512_t1/aes256_gcm_by8_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM256_MODE 1
-%include "avx512_t1/gcm_avx512.asm"
+%include "include/gcm_avx512.inc"
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index d11bc14c..f8b6a6af 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -126,7 +126,7 @@
 %ifndef GCM128_MODE
 %ifndef GCM192_MODE
 %ifndef GCM256_MODE
-%error "No GCM mode selected for gcm_avx512.asm!"
+%error "No GCM mode selected for gcm_avx512.inc!"
 %endif
 %endif
 %endif
diff --git a/lib/avx_t1/aes128_gcm_by8_avx.asm b/lib/avx_t1/aes128_gcm_by8_avx.asm
index dba11298..e0c28049 100644
--- a/lib/avx_t1/aes128_gcm_by8_avx.asm
+++ b/lib/avx_t1/aes128_gcm_by8_avx.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM128_MODE 1
-%include "avx_t1/gcm_avx_gen2.asm"
+%include "include/gcm_avx_gen2.inc"
diff --git a/lib/avx_t1/aes192_gcm_by8_avx.asm b/lib/avx_t1/aes192_gcm_by8_avx.asm
index e072d850..4270ccbb 100644
--- a/lib/avx_t1/aes192_gcm_by8_avx.asm
+++ b/lib/avx_t1/aes192_gcm_by8_avx.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM192_MODE 1
-%include "avx_t1/gcm_avx_gen2.asm"
+%include "include/gcm_avx_gen2.inc"
diff --git a/lib/avx_t1/aes256_gcm_by8_avx.asm b/lib/avx_t1/aes256_gcm_by8_avx.asm
index 9d5146e9..5d837f1a 100644
--- a/lib/avx_t1/aes256_gcm_by8_avx.asm
+++ b/lib/avx_t1/aes256_gcm_by8_avx.asm
@@ -27,4 +27,4 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %define GCM256_MODE 1
-%include "avx_t1/gcm_avx_gen2.asm"
+%include "include/gcm_avx_gen2.inc"
diff --git a/lib/avx512_t1/gcm_avx512.asm b/lib/include/gcm_avx512.inc
similarity index 99%
rename from lib/avx512_t1/gcm_avx512.asm
rename to lib/include/gcm_avx512.inc
index 8aff0c98..823ebe19 100644
--- a/lib/avx512_t1/gcm_avx512.asm
+++ b/lib/include/gcm_avx512.inc
@@ -126,7 +126,7 @@
 %ifndef GCM128_MODE
 %ifndef GCM192_MODE
 %ifndef GCM256_MODE
-%error "No GCM mode selected for gcm_avx512.asm!"
+%error "No GCM mode selected for gcm_avx512.inc!"
 %endif
 %endif
 %endif
diff --git a/lib/avx_t1/gcm_avx_gen2.asm b/lib/include/gcm_avx_gen2.inc
similarity index 99%
rename from lib/avx_t1/gcm_avx_gen2.asm
rename to lib/include/gcm_avx_gen2.inc
index 4a7c2838..76c09c2b 100644
--- a/lib/avx_t1/gcm_avx_gen2.asm
+++ b/lib/include/gcm_avx_gen2.inc
@@ -123,7 +123,7 @@
 %ifndef GCM128_MODE
 %ifndef GCM192_MODE
 %ifndef GCM256_MODE
-%error "No GCM mode selected for gcm_avx_gen2.asm!"
+%error "No GCM mode selected for gcm_avx_gen2.inc!"
 %endif
 %endif
 %endif
diff --git a/lib/avx2_t1/gcm_avx_gen4.asm b/lib/include/gcm_avx_gen4.inc
similarity index 99%
rename from lib/avx2_t1/gcm_avx_gen4.asm
rename to lib/include/gcm_avx_gen4.inc
index ac5830fd..fd0ce417 100644
--- a/lib/avx2_t1/gcm_avx_gen4.asm
+++ b/lib/include/gcm_avx_gen4.inc
@@ -122,7 +122,7 @@
 %ifndef GCM128_MODE
 %ifndef GCM192_MODE
 %ifndef GCM256_MODE
-%error "No GCM mode selected for gcm_avx_gen4.asm!"
+%error "No GCM mode selected for gcm_avx_gen4.inc!"
 %endif
 %endif
 %endif
-- 
GitLab


From bd65edbe1ace62819e8866d89526515308aff00a Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Thu, 24 Nov 2022 13:29:39 +0000
Subject: [PATCH 037/332] add freebsd github actions

---
 .../workflows/freebsd_build_shared_clang.yml  | 27 +++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 .github/workflows/freebsd_build_shared_clang.yml

diff --git a/.github/workflows/freebsd_build_shared_clang.yml b/.github/workflows/freebsd_build_shared_clang.yml
new file mode 100644
index 00000000..4f1bda49
--- /dev/null
+++ b/.github/workflows/freebsd_build_shared_clang.yml
@@ -0,0 +1,27 @@
+name: FreeBSD Build Shared clang
+
+on:
+  push:
+    branches: [ main ]
+  pull_request:
+    branches: [ main ]
+
+jobs:
+  testfreebsd:
+    runs-on: macos-12
+    name: FreeBSD run
+    steps:
+      - name: Checkout
+        uses: actions/checkout@v2
+        with:
+          submoules: recursive
+      - name: Test in FreeBSD
+        id: tests
+        uses: vmactions/freebsd-vm@v0
+        with:
+          usesh: true
+          mem: 8192
+          prepare: pkg install -y curl nasm llvm gmake
+          run: |
+            freebsd-version
+            gmake CC=clang -j 4
\ No newline at end of file
-- 
GitLab


From 5857a7f94bd13092d7482b6f60193aa4daa9a649 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Fri, 25 Nov 2022 16:35:05 +0000
Subject: [PATCH 038/332] CI [actions]: add freebsd to github actions

---
 .../workflows/freebsd_build_shared_clang.yml  |  4 +--
 .../workflows/freebsd_build_shared_gcc.yml    | 27 +++++++++++++++++++
 2 files changed, 29 insertions(+), 2 deletions(-)
 create mode 100644 .github/workflows/freebsd_build_shared_gcc.yml

diff --git a/.github/workflows/freebsd_build_shared_clang.yml b/.github/workflows/freebsd_build_shared_clang.yml
index 4f1bda49..7168a054 100644
--- a/.github/workflows/freebsd_build_shared_clang.yml
+++ b/.github/workflows/freebsd_build_shared_clang.yml
@@ -12,9 +12,9 @@ jobs:
     name: FreeBSD run
     steps:
       - name: Checkout
-        uses: actions/checkout@v2
+        uses: actions/checkout@v3
         with:
-          submoules: recursive
+          submodules: recursive
       - name: Test in FreeBSD
         id: tests
         uses: vmactions/freebsd-vm@v0
diff --git a/.github/workflows/freebsd_build_shared_gcc.yml b/.github/workflows/freebsd_build_shared_gcc.yml
new file mode 100644
index 00000000..c21bab48
--- /dev/null
+++ b/.github/workflows/freebsd_build_shared_gcc.yml
@@ -0,0 +1,27 @@
+name: FreeBSD Build Shared gcc
+
+on:
+  push:
+    branches: [ main ]
+  pull_request:
+    branches: [ main ]
+
+jobs:
+  testfreebsd:
+    runs-on: macos-12
+    name: FreeBSD GCC run
+    steps:
+      - name: Checkout
+        uses: actions/checkout@v3
+        with:
+          submodules: recursive
+      - name: Test FreeBSD
+        id: tests
+        uses: vmactions/freebsd-vm@v0
+        with:
+          usesh: true
+          mem: 8192
+          prepare: pkg install -y curl nasm llvm gmake
+          run: |
+            freebsd-version
+            gmake CC=gcc -j 4
\ No newline at end of file
-- 
GitLab


From e840a3c788ed9b08df70db64fde3ec253e7f43e7 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Fri, 25 Nov 2022 16:35:46 +0000
Subject: [PATCH 039/332] doc [README]: update badges to include freebsd

---
 README.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/README.md b/README.md
index fd2f5276..2555d681 100644
--- a/README.md
+++ b/README.md
@@ -4,6 +4,8 @@
 ![Linux Build Shared clang](https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_clang.yml/badge.svg)
 ![Linux Build Static clang](https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_static_clang.yml/badge.svg)
 ![Linux Build Shared clang AESNI emulation](https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_clang_aesni_emu.yml/badge.svg)
+![FreeBSD Build Shared clang](https://github.com/intel/intel-ipsec-mb/actions/workflows/freebsd_build_shared_clang.yml/badge.svg)
+![FreeBSD Build Shared gcc](https://github.com/intel/intel-ipsec-mb/actions/workflows/freebsd_build_shared_gcc.yml/badge.svg)
 
 # Intel(R) Multi-Buffer Crypto for IPsec Library
 
-- 
GitLab


From e3b7e6cd6104e0cd321eb17791e55cb5553a4da9 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Mon, 28 Nov 2022 11:25:54 +0000
Subject: [PATCH 040/332] CI [actions]: install gcc in freebsd workflow

---
 .github/workflows/freebsd_build_shared_gcc.yml | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/.github/workflows/freebsd_build_shared_gcc.yml b/.github/workflows/freebsd_build_shared_gcc.yml
index c21bab48..696189ad 100644
--- a/.github/workflows/freebsd_build_shared_gcc.yml
+++ b/.github/workflows/freebsd_build_shared_gcc.yml
@@ -21,7 +21,7 @@ jobs:
         with:
           usesh: true
           mem: 8192
-          prepare: pkg install -y curl nasm llvm gmake
+          prepare: pkg install -y curl nasm gmake gcc
           run: |
             freebsd-version
             gmake CC=gcc -j 4
\ No newline at end of file
-- 
GitLab


From a178011fb5f69fddf4a82a33df35fb6746dbe83d Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Thu, 8 Dec 2022 14:29:49 +0000
Subject: [PATCH 041/332] lib: ignore 'use of volatile' in checkpatch

---
 lib/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/Makefile b/lib/Makefile
index 55bdbb5f..bd4498f7 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -1018,7 +1018,7 @@ CHECKPATCH ?= checkpatch.pl
 #
 # NOTE: these flags cannot be broken into multiple lines due to
 #       spaces injected by make
-CHECKPATCH_FLAGS = --no-tree --no-signoff --emacs --no-color --ignore CODE_INDENT,INITIALISED_STATIC,LEADING_SPACE,SPLIT_STRING,UNSPECIFIED_INT,ARRAY_SIZE,BLOCK_COMMENT_STYLE,GLOBAL_INITIALISERS,NEW_TYPEDEFS,AVOID_EXTERNS,COMPLEX_MACRO,PREFER_ALIGNED,USE_FUNC,CONSTANT_COMPARISON,SPACING,GCC_BINARY_CONSTANT
+CHECKPATCH_FLAGS = --no-tree --no-signoff --emacs --no-color --ignore CODE_INDENT,INITIALISED_STATIC,LEADING_SPACE,SPLIT_STRING,UNSPECIFIED_INT,ARRAY_SIZE,BLOCK_COMMENT_STYLE,GLOBAL_INITIALISERS,NEW_TYPEDEFS,AVOID_EXTERNS,COMPLEX_MACRO,PREFER_ALIGNED,USE_FUNC,CONSTANT_COMPARISON,SPACING,GCC_BINARY_CONSTANT,VOLATILE
 
 %.c_style_check : %.c
 	$(CHECKPATCH) $(CHECKPATCH_FLAGS) -f $<
-- 
GitLab


From fe86952050f11f4cef91409ff1927492cd7ed111 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 6 Dec 2022 10:59:35 +0000
Subject: [PATCH 042/332] lib: only set global errno if needs to be changed

In order to limit stores, the global status error
will only be rewritten if it needs to be changed.

Fixes #112.

Reported-by: Koji Ikeura <ikeura@fnsc.co.jp>
---
 lib/include/error.h | 10 +++++++---
 lib/x86_64/error.c  |  2 +-
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/lib/include/error.h b/lib/include/error.h
index 73d44f51..778df4b1 100644
--- a/lib/include/error.h
+++ b/lib/include/error.h
@@ -32,7 +32,7 @@
  * declare global variable to store
  * process wide error status
  */
-extern int imb_errno;
+extern volatile int imb_errno;
 
 /**
  * @brief API to set error status
@@ -47,8 +47,12 @@ void imb_set_errno(IMB_MGR *mb_mgr, const int errnum)
         if (mb_mgr != NULL)
                 mb_mgr->imb_errno = errnum;
 
-        /* set global error status */
-        imb_errno = errnum;
+        /*
+         * set global error status
+         * (only if different, to limit unneeded stores)
+         */
+        if (imb_errno != errnum)
+                imb_errno = errnum;
 }
 
 #endif /* ERROR_H */
diff --git a/lib/x86_64/error.c b/lib/x86_64/error.c
index 19189093..24dcded3 100644
--- a/lib/x86_64/error.c
+++ b/lib/x86_64/error.c
@@ -39,7 +39,7 @@
 #pragma warning(disable : 4996)
 #endif
 
-IMB_DLL_LOCAL int imb_errno;
+IMB_DLL_LOCAL volatile int imb_errno;
 IMB_DLL_LOCAL const int imb_errno_types[] = {
         IMB_ERR_NULL_MBMGR,
         IMB_ERR_JOB_NULL_SRC,
-- 
GitLab


From 9f5adaebcc3d6deac1ad0ddd10309c74318d7c40 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Fri, 9 Dec 2022 09:48:22 +0000
Subject: [PATCH 043/332] lib: only reset global errno if needed (for direct
 API)

---
 lib/include/error.inc | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/include/error.inc b/lib/include/error.inc
index 7d0f1630..fb29b4ca 100644
--- a/lib/include/error.inc
+++ b/lib/include/error.inc
@@ -103,7 +103,10 @@ SET_ERRNO_TYPES \
 ;; Reset global imb_errno to 0
 %macro IMB_ERR_CHECK_RESET 0
 
+        cmp     dword [rel imb_errno], 0
+        jz      %%do_not_reset
         mov     dword [rel imb_errno], 0
+%%do_not_reset:
 %endmacro
 
 ;; Set GP reg and global imb_errno to 0
-- 
GitLab


From bd1fd1f1ac9dad0416d5d7753a99afeace97a627 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Wed, 7 Dec 2022 15:29:12 +0000
Subject: [PATCH 044/332] test: [fuzz] direct api gcm fuzz test

---
 test/Makefile               |  16 +++-
 test/direct_api_fuzz_test.c | 151 ++++++++++++++++++++++++++++++++++++
 2 files changed, 165 insertions(+), 2 deletions(-)
 create mode 100644 test/direct_api_fuzz_test.c

diff --git a/test/Makefile b/test/Makefile
index d69b0d91..ec3dc955 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -28,6 +28,7 @@
 TEST_APP := ipsec_MB_testapp
 XVALID_APP := ipsec_xvalid_test
 FUZZ_APP := job_api_fuzz_test
+DIRECT_FUZZ_APP := direct_api_fuzz_test
 ACVP_APP := acvp_app
 INSTPATH ?= /usr/include/intel-ipsec-mb.h
 LIB_DIR ?= ../lib
@@ -132,6 +133,7 @@ XVALID_OBJECTS := $(XVALID_SOURCES:%.c=%.o) $(XVALID_ASM:%.asm=%.o)
 
 # fuzz modules
 FUZZ_SOURCES := job_api_fuzz_test.c
+DIRECT_FUZZ_SOURCES := direct_api_fuzz_test.c
 
 # acvp_app modules
 ACVP_SOURCES := acvp_app_main.c utils.c
@@ -152,7 +154,7 @@ ifeq ($(CC_HAS_CET),1)
 endif
 
 # targets come here
-all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP)
+all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
 
 $(TEST_APP): $(OBJECTS)
 	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
@@ -178,10 +180,20 @@ else
 	@echo "Fuzzing not supported on MinGW build. $(FUZZ_APP) is not built"
 endif
 
+$(DIRECT_FUZZ_APP): $(DIRECT_FUZZ_SOURCES)
+ifeq ($(MINGW),0)
+ifneq (, $(shell which clang))
+	clang $(FUZZ_CFLAGS) $(DIRECT_FUZZ_SOURCES) $(LDLIBS) -o $@
+else
+	@echo "Clang is not installed. $(DIRECT_FUZZ_APP) is not built"
+endif
+else
+	@echo "Fuzzing not supported on MinGW build. $(DIRECT_FUZZ_APP) is not built"
+endif
 
 .PHONY: clean
 clean:
-	-rm -f $(OBJECTS) $(TEST_APP) $(DEP_FILES) $(XVALID_OBJECTS) $(XVALID_APP) $(ASM_OBJECTS) $(FUZZ_APP) $(ACVP_APP)
+	-rm -f $(OBJECTS) $(TEST_APP) $(DEP_FILES) $(XVALID_OBJECTS) $(XVALID_APP) $(ASM_OBJECTS) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
 
 # style check section
 CHECKPATCH?=checkpatch.pl
diff --git a/test/direct_api_fuzz_test.c b/test/direct_api_fuzz_test.c
new file mode 100644
index 00000000..01083990
--- /dev/null
+++ b/test/direct_api_fuzz_test.c
@@ -0,0 +1,151 @@
+/**********************************************************************
+  Copyright(c) 2022, Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>
+#include <stdlib.h>
+#include <time.h>
+#include <stdbool.h>
+#include <intel-ipsec-mb.h>
+
+int LLVMFuzzerTestOneInput(const uint8_t *, size_t);
+
+int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
+{
+        IMB_MGR *p_mgr = NULL;
+        IMB_ARCH arch;
+        const char *ar = getenv("ARCH");
+	uint8_t *buff;
+
+	/* Setting minimum datasize to always fill GCM data structure  */
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+	    (dataSize < sizeof(struct gcm_context_data)))
+                return 0;
+
+	buff = malloc(dataSize);
+	memcpy(buff, data, dataSize);
+
+	const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+	struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+	uint8_t *out = buff;
+	const uint8_t *in = buff;
+	uint64_t len = dataSize;
+	const uint8_t *iv = buff;
+	const uint8_t *aad = buff;
+	uint64_t aad_len = (uint64_t) *buff;
+	uint8_t *auth_tag = buff;
+        uint64_t auth_tag_len = (uint64_t) *buff;
+
+	/* allocate multi-buffer manager */
+        p_mgr = alloc_mb_mgr(0);
+        if (p_mgr == NULL) {
+                printf("Error allocating MB_MGR structure!\n");
+                return EXIT_FAILURE;
+        }
+
+	if (ar == NULL) {
+                init_mb_mgr_auto(p_mgr, &arch);
+        } else {
+                if (strcasecmp(ar, "AVX") == 0)
+                        init_mb_mgr_avx(p_mgr);
+                else if (strcasecmp(ar, "AVX2") == 0)
+                        init_mb_mgr_avx2(p_mgr);
+                else if (strcasecmp(ar, "AVX512") == 0)
+                        init_mb_mgr_avx512(p_mgr);
+                else if (strcasecmp(ar, "SSE") == 0)
+                        init_mb_mgr_sse(p_mgr);
+                else
+                        init_mb_mgr_auto(p_mgr, &arch);
+        }
+
+        /* 128 key size */
+        IMB_AES128_GCM_ENC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, auth_tag_len);
+        IMB_AES128_GCM_DEC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, auth_tag_len);
+
+        IMB_AES128_GCM_INIT(p_mgr, key, ctx,
+                            iv, aad, aad_len);
+        IMB_AES128_GCM_ENC_UPDATE(p_mgr, key, ctx, out,
+                                  in, len);
+        IMB_AES128_GCM_ENC_FINALIZE(p_mgr, key, ctx,
+                                    auth_tag, auth_tag_len);
+
+        IMB_AES128_GCM_INIT(p_mgr, key, ctx,
+                            iv, aad, aad_len);
+        IMB_AES128_GCM_DEC_UPDATE(p_mgr, key, ctx, out,
+                                  in, len);
+        IMB_AES128_GCM_DEC_FINALIZE(p_mgr, key, ctx,
+                                    auth_tag, auth_tag_len);
+
+        /* 192 key size */
+        IMB_AES192_GCM_ENC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, auth_tag_len);
+        IMB_AES192_GCM_DEC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, auth_tag_len);
+
+        IMB_AES192_GCM_INIT(p_mgr, key, ctx,
+                            iv, aad, aad_len);
+        IMB_AES192_GCM_ENC_UPDATE(p_mgr, key, ctx, out,
+                                  in, len);
+        IMB_AES192_GCM_ENC_FINALIZE(p_mgr, key, ctx,
+                                    auth_tag, auth_tag_len);
+
+        IMB_AES192_GCM_INIT(p_mgr, key, ctx,
+                            iv, aad, aad_len);
+        IMB_AES192_GCM_DEC_UPDATE(p_mgr, key, ctx, out,
+                                  in, len);
+        IMB_AES192_GCM_DEC_FINALIZE(p_mgr, key, ctx,
+                                    auth_tag, auth_tag_len);
+
+        /* 256 key size */
+        IMB_AES256_GCM_ENC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, auth_tag_len);
+        IMB_AES256_GCM_DEC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, auth_tag_len);
+
+        IMB_AES256_GCM_INIT(p_mgr, key, ctx,
+                            iv, aad, aad_len);
+        IMB_AES256_GCM_ENC_UPDATE(p_mgr, key, ctx, out,
+                                  in, len);
+        IMB_AES256_GCM_ENC_FINALIZE(p_mgr, key, ctx,
+                                    auth_tag, auth_tag_len);
+
+        IMB_AES256_GCM_INIT(p_mgr, key, ctx,
+                            iv, aad, aad_len);
+        IMB_AES256_GCM_DEC_UPDATE(p_mgr, key, ctx, out,
+                                  in, len);
+        IMB_AES256_GCM_DEC_FINALIZE(p_mgr, key, ctx,
+                                    auth_tag, auth_tag_len);
+
+	free_mb_mgr(p_mgr);
+	free(buff);
+        return 0;
+}
-- 
GitLab


From b01b8d67194ecf2bcc22732ecd0369db8cb043e0 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Wed, 14 Dec 2022 11:31:18 +0000
Subject: [PATCH 045/332] rpm: added patch to fix performance scaling issue

---
 ...-Fix-for-perf-scaling-on-release-1.3.patch | 70 +++++++++++++++++++
 1 file changed, 70 insertions(+)
 create mode 100644 rpm/patches/0001-Fix-for-perf-scaling-on-release-1.3.patch

diff --git a/rpm/patches/0001-Fix-for-perf-scaling-on-release-1.3.patch b/rpm/patches/0001-Fix-for-perf-scaling-on-release-1.3.patch
new file mode 100644
index 00000000..6566c364
--- /dev/null
+++ b/rpm/patches/0001-Fix-for-perf-scaling-on-release-1.3.patch
@@ -0,0 +1,70 @@
+From 6b941770f0114d42e87875562d5174bc70c5ac65 Mon Sep 17 00:00:00 2001
+From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
+Date: Tue, 6 Dec 2022 10:59:35 +0000
+Subject: [PATCH] Fix for perf scaling on release 1.3
+
+---
+ lib/include/error.h   | 10 +++++++---
+ lib/include/error.inc |  3 +++
+ lib/x86_64/error.c    |  2 +-
+ 3 files changed, 11 insertions(+), 4 deletions(-)
+
+diff --git a/lib/include/error.h b/lib/include/error.h
+index 73d44f51..778df4b1 100644
+--- a/lib/include/error.h
++++ b/lib/include/error.h
+@@ -32,7 +32,7 @@
+  * declare global variable to store
+  * process wide error status
+  */
+-extern int imb_errno;
++extern volatile int imb_errno;
+ 
+ /**
+  * @brief API to set error status
+@@ -47,8 +47,12 @@ void imb_set_errno(IMB_MGR *mb_mgr, const int errnum)
+         if (mb_mgr != NULL)
+                 mb_mgr->imb_errno = errnum;
+ 
+-        /* set global error status */
+-        imb_errno = errnum;
++        /*
++         * set global error status
++         * (only if different, to limit unneeded stores)
++         */
++        if (imb_errno != errnum)
++                imb_errno = errnum;
+ }
+ 
+ #endif /* ERROR_H */
+diff --git a/lib/include/error.inc b/lib/include/error.inc
+index 54df265f..5ea53a59 100644
+--- a/lib/include/error.inc
++++ b/lib/include/error.inc
+@@ -103,7 +103,10 @@ SET_ERRNO_TYPES \
+ ;; Reset global imb_errno to 0
+ %macro IMB_ERR_CHECK_RESET 0
+ 
++        cmp     dword [rel imb_errno], 0
++        jz      %%do_not_reset
+         mov     dword [rel imb_errno], 0
++%%do_not_reset:
+ %endmacro
+ 
+ ;; Set GP reg and global imb_errno to 0
+diff --git a/lib/x86_64/error.c b/lib/x86_64/error.c
+index 19189093..24dcded3 100644
+--- a/lib/x86_64/error.c
++++ b/lib/x86_64/error.c
+@@ -39,7 +39,7 @@
+ #pragma warning(disable : 4996)
+ #endif
+ 
+-IMB_DLL_LOCAL int imb_errno;
++IMB_DLL_LOCAL volatile int imb_errno;
+ IMB_DLL_LOCAL const int imb_errno_types[] = {
+         IMB_ERR_NULL_MBMGR,
+         IMB_ERR_JOB_NULL_SRC,
+-- 
+2.34.1
+
-- 
GitLab


From a61a2aa920c2bcad98adef5a43bd86a453350aa3 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 13 Dec 2022 23:40:57 +0000
Subject: [PATCH 046/332] lib: Experimental Linux CMake support

Add initial support to build the library using CMake on Linux.
Only the default build supported currently.
---
 CMakeLists.txt     |  16 ++++
 lib/CMakeLists.txt | 194 +++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 210 insertions(+)
 create mode 100644 CMakeLists.txt
 create mode 100644 lib/CMakeLists.txt

diff --git a/CMakeLists.txt b/CMakeLists.txt
new file mode 100644
index 00000000..7727b56b
--- /dev/null
+++ b/CMakeLists.txt
@@ -0,0 +1,16 @@
+cmake_minimum_required(VERSION 3.16)
+project(intel-ipsec-mb VERSION 1.3.0 DESCRIPTION "Intel(R) IPSec Multi-Buffer library")
+
+# Check compiler version
+if(("${CMAKE_C_COMPILER_ID}" STREQUAL "GNU") AND
+    (CMAKE_C_COMPILER_VERSION VERSION_LESS 5.0))
+    message(FATAL_ERROR "GNU C Compiler version must be 5.0 or higher")
+endif()
+
+if("${CMAKE_BUILD_TYPE}" STREQUAL "")
+  message(STATUS "CMAKE_BUILD_TYPE not set, defaulting to Release")
+  set(CMAKE_BUILD_TYPE "Release")
+endif()
+
+add_subdirectory(lib)
+
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
new file mode 100644
index 00000000..5d2fe914
--- /dev/null
+++ b/lib/CMakeLists.txt
@@ -0,0 +1,194 @@
+# ##############################################################################
+# Build IPSec_MB library
+# ##############################################################################
+
+cmake_minimum_required(VERSION 3.16)
+project(intel-ipsec-mb)
+
+# set default options
+option(AESNI_EMU "AESNI emulation support" OFF)
+option(SAFE_PARAM "Parameter checking" ON)
+option(SAFE_DATA "Clear sensitive data from registers and memory" ON)
+option(SAFE_LOOKUP "Secure table lookups" ON)
+option(SAFE_OPTIONS "Library security features" ON)
+option(NO_COMPAT_IMB_API_053 "Disable compatibility with v0.53" ON)
+option(BUILD_SHARED_LIBS "Build shared library" ON)
+set(EXTRA_CFLAGS "" CACHE STRING "Extra compiler flags")
+
+# disable all SAFE options when SAFE_OPTIONS false
+if(NOT SAFE_OPTIONS)
+  message(STATUS "SAFE_OPTIONS disabled")
+  set(SAFE_PARAM OFF)
+  set(SAFE_DATA OFF)
+  set(SAFE_LOOKUP OFF)
+endif()
+
+message(STATUS "AESNI emulation support... ${AESNI_EMU}")
+message(STATUS "SAFE_OPTIONS...            ${SAFE_OPTIONS}")
+message(STATUS "SAFE_PARAM...              ${SAFE_PARAM}")
+message(STATUS "SAFE_DATA...               ${SAFE_DATA}")
+message(STATUS "SAFE_LOOKUP...             ${SAFE_LOOKUP}")
+message(STATUS "BUILD_SHARED_LIBS...       ${BUILD_SHARED_LIBS}")
+message(STATUS "EXTRA_CFLAGS...            ${EXTRA_CFLAGS}")
+message(STATUS "NO_COMPAT_IMB_API_053...   ${NO_COMPAT_IMB_API_053}")
+
+# set directories
+set(DIR_CURRENT ${CMAKE_CURRENT_SOURCE_DIR}/)
+set(DIR_INCLUDE ${CMAKE_CURRENT_SOURCE_DIR}/include)
+set(DIR_AVX_T1 ${CMAKE_CURRENT_SOURCE_DIR}/avx_t1)
+set(DIR_AVX_T2 ${CMAKE_CURRENT_SOURCE_DIR}/avx_t2)
+set(DIR_AVX2_T1 ${CMAKE_CURRENT_SOURCE_DIR}/avx2_t1)
+set(DIR_AVX2_T2 ${CMAKE_CURRENT_SOURCE_DIR}/avx2_t2)
+set(DIR_AVX512_T1 ${CMAKE_CURRENT_SOURCE_DIR}/avx512_t1)
+set(DIR_AVX512_T2 ${CMAKE_CURRENT_SOURCE_DIR}/avx512_t2)
+set(DIR_SSE_T1 ${CMAKE_CURRENT_SOURCE_DIR}/sse_t1)
+set(DIR_SSE_T2 ${CMAKE_CURRENT_SOURCE_DIR}/sse_t2)
+set(DIR_SSE_T3 ${CMAKE_CURRENT_SOURCE_DIR}/sse_t3)
+set(DIR_X86_64 ${CMAKE_CURRENT_SOURCE_DIR}/x86_64)
+set(DIR_NO_AESNI ${CMAKE_CURRENT_SOURCE_DIR}/no-aesni)
+
+# list all source directories
+set(DIR_SOURCES
+  ${DIR_AVX_T1}
+  ${DIR_AVX_T2}
+  ${DIR_AVX2_T1}
+  ${DIR_AVX2_T2}
+  ${DIR_AVX512_T1}
+  ${DIR_AVX512_T2}
+  ${DIR_SSE_T1}
+  ${DIR_SSE_T2}
+  ${DIR_SSE_T3}
+  ${DIR_X86_64}
+)
+if(AESNI_EMU)
+  list(APPEND DIR_SOURCES ${DIR_NO_AESNI})
+endif()
+
+# set compiler definitions
+set(LIB_DEFINES -DLINUX)
+if(SAFE_DATA)
+  list(APPEND LIB_DEFINES -DSAFE_DATA)
+endif()
+if(SAFE_PARAM)
+  list(APPEND LIB_DEFINES -DSAFE_PARAM)
+endif()
+if(SAFE_LOOKUP)
+  list(APPEND LIB_DEFINES -DSAFE_LOOKUP)
+endif()
+if(NO_COMPAT_IMB_API_053)
+  list(APPEND LIB_DEFINES -DNO_COMPAT_IMB_API_053)
+endif()
+
+# set up NASM compilation
+enable_language(ASM_NASM)
+if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
+  message(FATAL_ERROR "Can't find assembler")
+endif()
+set(CAN_USE_ASSEMBLER 1)
+
+# generate list of assembly source files
+foreach(DIR ${DIR_SOURCES})
+  file(GLOB_RECURSE TMP "${DIR}/*.asm")
+  list(APPEND SRC_FILES_ASM ${TMP})
+endforeach()
+
+# set NASM flags
+set(CMAKE_ASM_NASM_FLAGS "-Werror -felf64 -Xgnu -gdwarf -I${DIR_INCLUDE}")
+
+# generate list of C source files
+file(GLOB SRC_FILES_AVX_T1 "${DIR_AVX_T1}/*.c")
+file(GLOB SRC_FILES_AVX_T2 "${DIR_AVX_T2}/*.c")
+file(GLOB SRC_FILES_AVX2_T1 "${DIR_AVX2_T1}/*.c")
+file(GLOB SRC_FILES_AVX2_T2 "${DIR_AVX2_T2}/*.c")
+file(GLOB SRC_FILES_AVX512_T1 "${DIR_AVX512_T1}/*.c")
+file(GLOB SRC_FILES_AVX512_T2 "${DIR_AVX512_T2}/*.c")
+file(GLOB SRC_FILES_SSE_T1 "${DIR_SSE_T1}/*.c")
+file(GLOB SRC_FILES_SSE_T2 "${DIR_SSE_T2}/*.c")
+file(GLOB SRC_FILES_SSE_T3 "${DIR_SSE_T3}/*.c")
+file(GLOB SRC_FILES_X86_64 "${DIR_X86_64}/*.c")
+file(GLOB SRC_FILES_NO_AESNI "${DIR_NO_AESNI}/*.c")
+
+# set compiler flags
+set_source_files_properties(
+  ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
+  PPROPERTIES COMPILE_FLAGS
+  "-march=sandybridge -maes -mpclmul")
+set_source_files_properties(
+  ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
+  PPROPERTIES COMPILE_FLAGS
+  "-march=haswell -maes -mpclmul")
+set_source_files_properties(
+  ${SRC_FILES_AVX512_T1} ${SRC_FILES_AVX512_T2}
+  PPROPERTIES COMPILE_FLAGS 
+  "-march=broadwell -maes -mpclmul")
+set_source_files_properties(
+  ${SRC_FILES_SSE_T1} ${SRC_FILES_SSE_T2} ${SRC_FILES_SSE_T3} 
+  PROPERTIES COMPILE_FLAGS
+  "-march=nehalem -maes -mpclmul")
+set_source_files_properties(
+  ${SRC_FILES_X86_64}
+  PROPERTIES COMPILE_FLAGS 
+  "-msse4.2")
+if(AESNI_EMU)
+  set_source_files_properties(
+    ${SRC_FILES_NO_AESNI}
+    PROPERTIES COMPILE_FLAGS
+    "-march=nehalem -mno-pclmul")
+  list(APPEND SOURCES ${SRC_FILES_NO_AESNI})
+endif()
+
+set(CFLAGS "
+  -fPIC
+  -W
+  -Wall
+  -Wextra
+  -Wmissing-declarations
+  -Wpointer-arith
+  -Wcast-qual
+  -Wundef
+  -Wwrite-strings
+  -Wformat
+  -Wformat-security
+  -Wunreachable-code
+  -Wmissing-noreturn
+  -Wsign-compare
+  -Wno-endif-labels
+  -Wstrict-prototypes
+  -Wmissing-prototypes
+  -Wold-style-definition
+  -fno-delete-null-pointer-checks
+  -fwrapv"
+  )
+# -fno-strict-overflow is not supported by clang
+if(CMAKE_COMPILER_IS_GNUCC)
+  list(APPEND CFLAGS "-fno-strict-overflow")
+endif()
+if(${CMAKE_BUILD_TYPE} STREQUAL "Debug")
+  list(APPEND CFLAGS "-g -DDEBUG")
+  list(APPEND CFLAGS "-O0")
+else()
+  list(APPEND CFLAGS "-O2 -fstack-protector -d_fortify_source=2")
+endif()
+list(APPEND CFLAGS ${EXTRA_CFLAGS})
+
+set(SRC_FILES_C
+  ${SRC_FILES_AVX_T1}
+  ${SRC_FILES_AVX_T2}
+  ${SRC_FILES_AVX2_T1}
+  ${SRC_FILES_AVX2_T2}
+  ${SRC_FILES_AVX512_T1}
+  ${SRC_FILES_AVX512_T2}
+  ${SRC_FILES_SSE_T1}
+  ${SRC_FILES_SSE_T2}
+  ${SRC_FILES_SSE_T3}
+  ${SRC_FILES_X86_64}
+)
+if(AESNI_EMU)
+  list(APPEND SRC_FILES_C ${SRC_FILES_NO_AESNI})
+endif()
+
+# add the library
+add_library(IPSec_MB ${SRC_FILES_ASM} ${SRC_FILES_C})
+target_include_directories(IPSec_MB PRIVATE ${DIR_CURRENT} ${DIR_INCLUDE} ${DIR_NO_AESNI})
+target_compile_definitions(IPSec_MB PRIVATE ${LIB_DEFINES})
+
-- 
GitLab


From e51771ca38ace65630c4c12de2053a7c6d5b1fc1 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 13 Dec 2022 23:44:35 +0000
Subject: [PATCH 047/332] test: Experimental Linux CMake support

Add initial support to build test and xvalid apps using CMake on Linux
---
 CMakeLists.txt      |   2 +-
 test/CMakeLists.txt | 106 ++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 107 insertions(+), 1 deletion(-)
 create mode 100644 test/CMakeLists.txt

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 7727b56b..d7a3c186 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -13,4 +13,4 @@ if("${CMAKE_BUILD_TYPE}" STREQUAL "")
 endif()
 
 add_subdirectory(lib)
-
+add_subdirectory(test)
diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
new file mode 100644
index 00000000..44e6659b
--- /dev/null
+++ b/test/CMakeLists.txt
@@ -0,0 +1,106 @@
+cmake_minimum_required(VERSION 3.16)
+project(intel-ipsec-mb)
+
+# #################
+# Test Applications
+# #################
+
+set(TEST_APP ipsec_MB_testapp)
+set(XVALID_APP ipsec_xvalid_test)
+set(IPSEC_MB_LIB IPSec_MB)
+set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../lib)
+
+# set up NASM compilation
+enable_language(ASM_NASM)
+if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
+  message(FATAL_ERROR "Can't find assembler")
+endif()
+set(CAN_USE_ASSEMBLER TRUE)
+set(CMAKE_ASM_NASM_FLAGS "-felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
+
+# set ipsec_MB_test source files
+set(TEST_APP_SRC_FILES
+  ${CMAKE_CURRENT_SOURCE_DIR}/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/gcm_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/ctr_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/customop_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/des_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/ccm_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/cmac_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/utils.c
+	${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha1_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha256_sha512_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/hmac_md5_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/aes_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/sha_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/chained_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/api_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/pon_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/ecb_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/zuc_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/kasumi_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/snow3g_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/direct_api_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/clear_mem_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/hec_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/xcbc_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/aes_cbcs_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/crc_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/chacha_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/poly1305_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/chacha20_poly1305_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/null_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/snow_v_test.c
+	${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
+)
+
+# set ipsec_xvalid_test source files
+set(XVALID_APP_SRC_FILES
+  ${CMAKE_CURRENT_SOURCE_DIR}/ipsec_xvalid.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/utils.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/misc.asm
+)
+
+# set flags for different OS's
+set(CFLAGS "
+  -MMD
+  -W
+  -Wall
+  -Wextra 
+  -Wmissing-declarations
+  -Wpointer-arith
+  -Wcast-qual -Wundef
+  -Wwrite-strings
+  -Wformat -Wformat-security
+  -Wunreachable-code
+  -Wmissing-noreturn
+  -Wsign-compare
+  -Wno-endif-labels
+  -Wstrict-prototypes
+  -Wmissing-prototypes
+  -Wold-style-definition
+  -fno-delete-null-pointer-checks
+  -fwrapv"
+)
+
+# -fno-strict-overflow is not supported by clang
+if(CMAKE_COMPILER_IS_GNUCC)
+  list(APPEND CFLAGS "-fno-strict-overflow")
+endif()
+
+set(APP_DEFINES 
+  -DLINUX
+  -D_GNU_SOURCE
+  -DNO_COMPAT_IMB_API_053
+)
+
+add_executable(${XVALID_APP} ${XVALID_APP_SRC_FILES})
+target_link_libraries(${XVALID_APP} PRIVATE ${IPSEC_MB_LIB})
+target_compile_definitions(${XVALID_APP} PRIVATE ${APP_DEFINES})
+target_include_directories(${XVALID_APP} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR})
+
+add_executable(${TEST_APP} ${TEST_APP_SRC_FILES})
+target_link_libraries(${TEST_APP} PRIVATE ${IPSEC_MB_LIB})
+target_compile_definitions(${TEST_APP} PRIVATE ${APP_DEFINES})
+target_include_directories(${TEST_APP} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR})
+
-- 
GitLab


From 8264d528ab1066848bc3bece491b798c14633cb2 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 14 Dec 2022 10:23:10 +0000
Subject: [PATCH 048/332] Add license text to CMakeLists.txt files

---
 CMakeLists.txt      | 25 +++++++++++++++++++++++++
 lib/CMakeLists.txt  | 25 +++++++++++++++++++++++++
 test/CMakeLists.txt | 25 +++++++++++++++++++++++++
 3 files changed, 75 insertions(+)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index d7a3c186..6230467c 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -1,3 +1,28 @@
+# Copyright (c) 2022, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
 cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb VERSION 1.3.0 DESCRIPTION "Intel(R) IPSec Multi-Buffer library")
 
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index 5d2fe914..63f2fac5 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -1,3 +1,28 @@
+# Copyright (c) 2022, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
 # ##############################################################################
 # Build IPSec_MB library
 # ##############################################################################
diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index 44e6659b..e0ce650f 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -1,3 +1,28 @@
+# Copyright (c) 2022, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
 cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb)
 
-- 
GitLab


From f17fcb962d9d21423b4fd4110e17f9134ce41ee2 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Wed, 14 Dec 2022 17:14:06 +0000
Subject: [PATCH 049/332] test: [fuzz] parse direct api command line

---
 test/direct_api_fuzz_test.c | 239 ++++++++++++++++++++++++++----------
 1 file changed, 176 insertions(+), 63 deletions(-)

diff --git a/test/direct_api_fuzz_test.c b/test/direct_api_fuzz_test.c
index 01083990..1bd350b9 100644
--- a/test/direct_api_fuzz_test.c
+++ b/test/direct_api_fuzz_test.c
@@ -36,6 +36,59 @@
 #include <intel-ipsec-mb.h>
 
 int LLVMFuzzerTestOneInput(const uint8_t *, size_t);
+int LLVMFuzzerInitialize(int *, char ***);
+
+int algo;
+int keysize;
+int dir;
+int api;
+
+static void parse_matched(int argc, char **argv)
+{
+        int i;
+
+        for (i = 0; i < argc; i++) {
+                if (strcmp(argv[i], "GCM") == 0) {
+                        i++;
+                        algo = 1;
+                        if (strcmp(argv[i], "128") == 0)
+                                keysize = 1;
+                        else if (strcmp(argv[i], "192") == 0)
+                                keysize = 2;
+                        else if (strcmp(argv[i], "256") == 0)
+                                keysize = 3;
+                } else if (strcmp(argv[i], "SGL") == 0)
+                        api = 1;
+                else if (strcmp(argv[i], "ENCRYPT") == 0)
+                        dir = 1;
+                else if (strcmp(argv[i], "DECRYPT") == 0)
+                        dir = 2;
+        }
+}
+
+int LLVMFuzzerInitialize(int *argc, char ***argv)
+{
+        int i;
+
+        for (i = 0; i < *argc; i++) {
+                 /*
+                  * Check if the current argument matches the
+                  *  argument we are looking for.
+                 */
+                if (strcmp((*argv)[i], "custom") == 0) {
+                        parse_matched(*argc - (i + 1), &((*argv)[i + 1]));
+                        /*
+                         * Remove the matching argument and all arguments
+                         * after it from the command line.
+                         */
+                        *argc = i;
+
+                        break;
+                }
+        }
+
+        return 0;
+}
 
 int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
 {
@@ -43,7 +96,6 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
         IMB_ARCH arch;
         const char *ar = getenv("ARCH");
 	uint8_t *buff;
-
 	/* Setting minimum datasize to always fill GCM data structure  */
         if ((dataSize < sizeof(struct gcm_key_data)) ||
 	    (dataSize < sizeof(struct gcm_context_data)))
@@ -61,7 +113,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
 	const uint8_t *aad = buff;
 	uint64_t aad_len = (uint64_t) *buff;
 	uint8_t *auth_tag = buff;
-        uint64_t auth_tag_len = (uint64_t) *buff;
+        uint64_t tag_len = (uint64_t) *buff;
 
 	/* allocate multi-buffer manager */
         p_mgr = alloc_mb_mgr(0);
@@ -85,67 +137,128 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                         init_mb_mgr_auto(p_mgr, &arch);
         }
 
-        /* 128 key size */
-        IMB_AES128_GCM_ENC(p_mgr, key, ctx, out, in, len, iv, aad,
-                           aad_len, auth_tag, auth_tag_len);
-        IMB_AES128_GCM_DEC(p_mgr, key, ctx, out, in, len, iv, aad,
-                           aad_len, auth_tag, auth_tag_len);
-
-        IMB_AES128_GCM_INIT(p_mgr, key, ctx,
-                            iv, aad, aad_len);
-        IMB_AES128_GCM_ENC_UPDATE(p_mgr, key, ctx, out,
-                                  in, len);
-        IMB_AES128_GCM_ENC_FINALIZE(p_mgr, key, ctx,
-                                    auth_tag, auth_tag_len);
-
-        IMB_AES128_GCM_INIT(p_mgr, key, ctx,
-                            iv, aad, aad_len);
-        IMB_AES128_GCM_DEC_UPDATE(p_mgr, key, ctx, out,
-                                  in, len);
-        IMB_AES128_GCM_DEC_FINALIZE(p_mgr, key, ctx,
-                                    auth_tag, auth_tag_len);
-
-        /* 192 key size */
-        IMB_AES192_GCM_ENC(p_mgr, key, ctx, out, in, len, iv, aad,
-                           aad_len, auth_tag, auth_tag_len);
-        IMB_AES192_GCM_DEC(p_mgr, key, ctx, out, in, len, iv, aad,
-                           aad_len, auth_tag, auth_tag_len);
-
-        IMB_AES192_GCM_INIT(p_mgr, key, ctx,
-                            iv, aad, aad_len);
-        IMB_AES192_GCM_ENC_UPDATE(p_mgr, key, ctx, out,
-                                  in, len);
-        IMB_AES192_GCM_ENC_FINALIZE(p_mgr, key, ctx,
-                                    auth_tag, auth_tag_len);
-
-        IMB_AES192_GCM_INIT(p_mgr, key, ctx,
-                            iv, aad, aad_len);
-        IMB_AES192_GCM_DEC_UPDATE(p_mgr, key, ctx, out,
-                                  in, len);
-        IMB_AES192_GCM_DEC_FINALIZE(p_mgr, key, ctx,
-                                    auth_tag, auth_tag_len);
-
-        /* 256 key size */
-        IMB_AES256_GCM_ENC(p_mgr, key, ctx, out, in, len, iv, aad,
-                           aad_len, auth_tag, auth_tag_len);
-        IMB_AES256_GCM_DEC(p_mgr, key, ctx, out, in, len, iv, aad,
-                           aad_len, auth_tag, auth_tag_len);
-
-        IMB_AES256_GCM_INIT(p_mgr, key, ctx,
-                            iv, aad, aad_len);
-        IMB_AES256_GCM_ENC_UPDATE(p_mgr, key, ctx, out,
-                                  in, len);
-        IMB_AES256_GCM_ENC_FINALIZE(p_mgr, key, ctx,
-                                    auth_tag, auth_tag_len);
-
-        IMB_AES256_GCM_INIT(p_mgr, key, ctx,
-                            iv, aad, aad_len);
-        IMB_AES256_GCM_DEC_UPDATE(p_mgr, key, ctx, out,
-                                  in, len);
-        IMB_AES256_GCM_DEC_FINALIZE(p_mgr, key, ctx,
-                                    auth_tag, auth_tag_len);
-
-	free_mb_mgr(p_mgr);
+        if (algo == 1) {
+                if (keysize == 1) {
+                        /* 128 key size */
+                        if (dir == 1) {
+                                if (api == 1) {
+                                        IMB_AES128_GCM_ENC(p_mgr, key,
+                                                           ctx, out, in, len,
+                                                           iv, aad, aad_len,
+                                                           auth_tag,
+                                                           tag_len);
+                                } else {
+                                        IMB_AES128_GCM_INIT(p_mgr, key, ctx,
+                                                            iv, aad, aad_len);
+                                        IMB_AES128_GCM_ENC_UPDATE(p_mgr, key,
+                                                                  ctx, out,
+                                                                  in, len);
+                                        IMB_AES128_GCM_ENC_FINALIZE(p_mgr, key,
+                                                                    ctx,
+                                                                    auth_tag,
+                                                                    tag_len);
+                                }
+                        } else if (dir == 2) {
+                                if (api == 1) {
+                                        IMB_AES128_GCM_DEC(p_mgr, key,
+                                                           ctx, out, in, len,
+                                                           iv, aad, aad_len,
+                                                           auth_tag,
+                                                           tag_len);
+                                } else {
+                                        IMB_AES128_GCM_INIT(p_mgr, key, ctx,
+                                                            iv, aad, aad_len);
+                                        IMB_AES128_GCM_DEC_UPDATE(p_mgr, key,
+                                                                  ctx, out,
+                                                                  in, len);
+                                        IMB_AES128_GCM_DEC_FINALIZE(p_mgr, key,
+                                                                    ctx,
+                                                                    auth_tag,
+                                                                    tag_len);
+                                }
+                        }
+                } else if (keysize == 2) {
+                        /* 192 key size */
+                        if (dir == 1) {
+                                if (api == 1) {
+                                        IMB_AES192_GCM_ENC(p_mgr, key,
+                                                           ctx, out, in, len,
+                                                           iv, aad, aad_len,
+                                                           auth_tag,
+                                                           tag_len);
+                                } else {
+                                        IMB_AES192_GCM_INIT(p_mgr, key, ctx,
+                                                            iv, aad, aad_len);
+                                        IMB_AES192_GCM_ENC_UPDATE(p_mgr, key,
+                                                                  ctx, out,
+                                                                  in, len);
+                                        IMB_AES192_GCM_ENC_FINALIZE(p_mgr, key,
+                                                                    ctx,
+                                                                    auth_tag,
+                                                                    tag_len);
+                                }
+                        } else if (dir == 2) {
+                                if (api == 1) {
+                                        IMB_AES192_GCM_DEC(p_mgr, key,
+                                                           ctx, out, in, len,
+                                                           iv, aad, aad_len,
+                                                           auth_tag,
+                                                           tag_len);
+                                } else {
+                                        IMB_AES192_GCM_INIT(p_mgr, key, ctx,
+                                                            iv, aad, aad_len);
+                                        IMB_AES192_GCM_DEC_UPDATE(p_mgr, key,
+                                                                  ctx, out,
+                                                                  in, len);
+                                        IMB_AES192_GCM_DEC_FINALIZE(p_mgr, key,
+                                                                    ctx,
+                                                                    auth_tag,
+                                                                    tag_len);
+                                }
+                        }
+                } else if (keysize == 3) {
+                        /* 256 key size */
+                        if (dir == 1) {
+                                if (api == 1) {
+                                        IMB_AES256_GCM_ENC(p_mgr, key,
+                                                           ctx, out, in, len,
+                                                           iv, aad, aad_len,
+                                                           auth_tag,
+                                                           tag_len);
+                                } else {
+                                        IMB_AES256_GCM_INIT(p_mgr, key, ctx,
+                                                            iv, aad, aad_len);
+                                        IMB_AES256_GCM_ENC_UPDATE(p_mgr, key,
+                                                                  ctx, out,
+                                                                  in, len);
+                                        IMB_AES256_GCM_ENC_FINALIZE(p_mgr, key,
+                                                                    ctx,
+                                                                    auth_tag,
+                                                                    tag_len);
+                                }
+                        } else if (dir == 2) {
+                                if (api == 1) {
+                                        IMB_AES256_GCM_DEC(p_mgr, key,
+                                                           ctx, out, in, len,
+                                                           iv, aad, aad_len,
+                                                           auth_tag,
+                                                           tag_len);
+                                } else {
+                                        IMB_AES256_GCM_INIT(p_mgr, key, ctx,
+                                                            iv, aad, aad_len);
+                                        IMB_AES256_GCM_DEC_UPDATE(p_mgr, key,
+                                                                  ctx, out,
+                                                                  in, len);
+                                        IMB_AES256_GCM_DEC_FINALIZE(p_mgr, key,
+                                                                    ctx,
+                                                                    auth_tag,
+                                                                    tag_len);
+                                }
+                        }
+                }
+        }
+
+        free_mb_mgr(p_mgr);
 	free(buff);
         return 0;
 }
-- 
GitLab


From 3654ccf8e03eb57e09da9533d9391773e5a04568 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 13 Dec 2022 14:42:53 +0000
Subject: [PATCH 050/332] avx2: [ZUC] use GFNI when supported

---
 lib/Makefile                                  |   2 +
 lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm  |  27 +--
 lib/avx2_t1/zuc_top_avx2.c                    | 157 +++++++++++++++---
 lib/avx2_t1/zuc_x8_avx2.asm                   |  43 +++--
 lib/avx2_t2/mb_mgr_avx2_t2.c                  |  16 +-
 .../mb_mgr_zuc_submit_flush_gfni_avx2.asm     |  40 +++++
 lib/avx2_t2/zuc_x8_gfni_avx2.asm              |  37 +++++
 lib/include/arch_avx2_type2.h                 |  20 +++
 lib/include/zuc_internal.h                    |  37 +++++
 lib/include/zuc_sbox.inc                      |  18 +-
 lib/win_x64.mak                               |   2 +
 11 files changed, 334 insertions(+), 65 deletions(-)
 create mode 100644 lib/avx2_t2/mb_mgr_zuc_submit_flush_gfni_avx2.asm
 create mode 100644 lib/avx2_t2/zuc_x8_gfni_avx2.asm

diff --git a/lib/Makefile b/lib/Makefile
index bd4498f7..08fada7b 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -567,6 +567,7 @@ asm_avx2_lib_objs := \
 	sha256_oct_avx2.o \
 	sha512_x4_avx2.o \
 	zuc_x8_avx2.o \
+	zuc_x8_gfni_avx2.o \
 	aes128_ecb_vaes_avx2.o \
 	aes192_ecb_vaes_avx2.o \
 	aes256_ecb_vaes_avx2.o \
@@ -583,6 +584,7 @@ asm_avx2_lib_objs := \
 	mb_mgr_hmac_sha512_flush_avx2.o \
 	mb_mgr_hmac_sha512_submit_avx2.o \
 	mb_mgr_zuc_submit_flush_avx2.o \
+	mb_mgr_zuc_submit_flush_gfni_avx2.o \
 	chacha20_avx2.o
 
 #
diff --git a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
index cab945aa..785622f7 100644
--- a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
@@ -33,6 +33,7 @@
 %include "include/const.inc"
 %include "include/clear_regs.inc"
 
+%ifndef SUBMIT_JOB_ZUC128_EEA3
 %define SUBMIT_JOB_ZUC128_EEA3 submit_job_zuc_eea3_avx2
 %define FLUSH_JOB_ZUC128_EEA3 flush_job_zuc_eea3_avx2
 %define SUBMIT_JOB_ZUC256_EEA3 submit_job_zuc256_eea3_avx2
@@ -43,6 +44,10 @@
 %define FLUSH_JOB_ZUC256_EIA3 flush_job_zuc256_eia3_avx2
 %define ZUC128_INIT_8        asm_ZucInitialization_8_avx2
 %define ZUC256_INIT_8        asm_Zuc256Initialization_8_avx2
+%define ZUC_EIA3_8_BUFFER    zuc_eia3_8_buffer_job_avx2
+%define ZUC256_EIA3_8_BUFFER zuc256_eia3_8_buffer_job_avx2
+%define ZUC_CIPHER_8      asm_ZucCipher_8_avx2
+%endif
 
 mksection .rodata
 default rel
@@ -80,11 +85,11 @@ dd      0xFFFFFFFF, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF
 dd      0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
 dd      0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF
 
-extern zuc_eia3_8_buffer_job_avx2
-extern zuc256_eia3_8_buffer_job_avx2
-extern asm_ZucInitialization_8_avx2
-extern asm_Zuc256Initialization_8_avx2
-extern asm_ZucCipher_8_avx2
+extern ZUC128_INIT_8
+extern ZUC256_INIT_8
+extern ZUC_CIPHER_8
+extern ZUC_EIA3_8_BUFFER
+extern ZUC256_EIA3_8_BUFFER
 
 %ifdef LINUX
 %define arg1    rdi
@@ -382,7 +387,7 @@ mksection .text
         lea     arg4, [r12 + _zuc_lens]
         mov     arg5, min_len
 
-        call    asm_ZucCipher_8_avx2
+        call    ZUC_CIPHER_8
 
         RESTORE_STACK_SPACE 5
 
@@ -651,7 +656,7 @@ APPEND3(%%skip_eea3_copy_,I,J):
         lea     arg4, [r12 + _zuc_lens]
         mov     arg5, min_len
 
-        call    asm_ZucCipher_8_avx2
+        call    ZUC_CIPHER_8
 
         RESTORE_STACK_SPACE 5
 
@@ -878,9 +883,9 @@ FLUSH_JOB_ZUC256_EEA3:
 %endif
 
 %if %%KEY_SIZE == 128
-        call    zuc_eia3_8_buffer_job_avx2
+        call    ZUC_EIA3_8_BUFFER
 %else
-        call    zuc256_eia3_8_buffer_job_avx2
+        call    ZUC256_EIA3_8_BUFFER
 %endif
 
 %if %%KEY_SIZE == 128
@@ -1046,9 +1051,9 @@ APPEND(%%skip_eia3_,I):
 %endif
 
 %if %%KEY_SIZE == 128
-        call    zuc_eia3_8_buffer_job_avx2
+        call    ZUC_EIA3_8_BUFFER
 %else
-        call    zuc256_eia3_8_buffer_job_avx2
+        call    ZUC256_EIA3_8_BUFFER
 %endif
 
 %if %%KEY_SIZE == 128
diff --git a/lib/avx2_t1/zuc_top_avx2.c b/lib/avx2_t1/zuc_top_avx2.c
index ff66f494..d3f77ec9 100644
--- a/lib/avx2_t1/zuc_top_avx2.c
+++ b/lib/avx2_t1/zuc_top_avx2.c
@@ -50,6 +50,47 @@
 
 #define NUM_AVX2_BUFS 8
 
+static inline void
+init_8(ZucKey8_t *keys, const uint8_t *ivs, ZucState8_t *state,
+       const uint64_t key_sz, const uint64_t tag_sz,
+       void *T, const unsigned use_gfni)
+{
+        if (key_sz == 128) {
+                if (use_gfni)
+                        asm_ZucInitialization_8_gfni_avx2(keys, ivs, state);
+                else
+                        asm_ZucInitialization_8_avx2(keys, ivs, state);
+        } else {
+                if (use_gfni)
+                        asm_Zuc256Initialization_8_gfni_avx2(keys, ivs,
+                                                            state, T, tag_sz);
+                else
+                        asm_Zuc256Initialization_8_avx2(keys, ivs, state, T,
+                                                       tag_sz);
+        }
+}
+
+static inline void
+keygen_8(ZucState8_t *state, uint32_t **pKeyStrArr,
+         const uint64_t numKeyStrBytes, const unsigned use_gfni)
+{
+        if (use_gfni) {
+                if (numKeyStrBytes == 4)
+                        asm_ZucGenKeystream4B_8_gfni_avx2(state, pKeyStrArr);
+                else if (numKeyStrBytes == 8)
+                        asm_ZucGenKeystream8B_8_gfni_avx2(state, pKeyStrArr);
+                else /* 16 */
+                        asm_ZucGenKeystream16B_8_gfni_avx2(state, pKeyStrArr);
+        } else {
+                if (numKeyStrBytes == 4)
+                        asm_ZucGenKeystream4B_8_avx2(state, pKeyStrArr);
+                else if (numKeyStrBytes == 8)
+                        asm_ZucGenKeystream8B_8_avx2(state, pKeyStrArr);
+                else /* 16 */
+                        asm_ZucGenKeystream16B_8_avx2(state, pKeyStrArr);
+        }
+}
+
 static inline uint16_t
 find_min_length16(const uint16_t length[NUM_AVX2_BUFS],
                   unsigned int *allCommonBits)
@@ -713,12 +754,14 @@ void zuc_eia3_1_buffer_avx2(const void *pKey,
 #endif
 }
 
-void zuc_eia3_8_buffer_job_avx2(const void * const pKey[NUM_AVX2_BUFS],
-                                const uint8_t *ivs,
-                                const void * const pBufferIn[NUM_AVX2_BUFS],
-                                uint32_t *pMacI[NUM_AVX2_BUFS],
-                                const uint16_t lengthInBits[NUM_AVX2_BUFS],
-                                const void * const job_in_lane[NUM_AVX2_BUFS])
+static inline
+void _zuc_eia3_8_buffer_job(const void * const pKey[NUM_AVX2_BUFS],
+                            const uint8_t *ivs,
+                            const void * const pBufferIn[NUM_AVX2_BUFS],
+                            uint32_t *pMacI[NUM_AVX2_BUFS],
+                            const uint16_t lengthInBits[NUM_AVX2_BUFS],
+                            const void * const job_in_lane[NUM_AVX2_BUFS],
+                            const unsigned use_gfni)
 {
         unsigned int i = 0;
         DECLARE_ALIGNED(ZucState8_t state, 64);
@@ -742,10 +785,16 @@ void zuc_eia3_8_buffer_job_avx2(const void * const pKey[NUM_AVX2_BUFS],
                 keys.pKeys[i] = pKey[i];
         }
 
-        asm_ZucInitialization_8_avx2(&keys, ivs, &state);
+        init_8(&keys, ivs, &state, 128, 0, NULL, use_gfni);
 
         /* Generate 32 bytes at a time */
-        asm_ZucGenKeystream32B_8_avx2(&state, (uint32_t **)pKeyStrArr);
+        if (use_gfni) {
+                /* Generate 32 bytes at a time */
+                asm_ZucGenKeystream32B_8_gfni_avx2(&state, pKeyStrArr);
+        } else {
+                /* Generate 32 bytes at a time */
+                asm_ZucGenKeystream32B_8_avx2(&state, pKeyStrArr);
+        }
 
         /* Point at the next 32 bytes of the key */
         for (i = 0; i < NUM_AVX2_BUFS; i++)
@@ -755,12 +804,21 @@ void zuc_eia3_8_buffer_job_avx2(const void * const pKey[NUM_AVX2_BUFS],
                 remainCommonBits -= keyStreamLengthInBits;
                 numKeyStr++;
                 /* Generate the next key stream 8 bytes or 32 bytes */
-                if (!remainCommonBits && allCommonBits)
-                        asm_ZucGenKeystream8B_8_avx2(&state,
-                                                     (uint32_t **)pKeyStrArr);
-                else
-                        asm_ZucGenKeystream32B_8_avx2(&state,
-                                                      (uint32_t **)pKeyStrArr);
+                if (use_gfni) {
+                        if (!remainCommonBits && allCommonBits)
+                                asm_ZucGenKeystream8B_8_gfni_avx2(&state,
+                                                                 pKeyStrArr);
+                        else
+                                asm_ZucGenKeystream32B_8_gfni_avx2(&state,
+                                                                  pKeyStrArr);
+                } else {
+                        if (!remainCommonBits && allCommonBits)
+                                asm_ZucGenKeystream8B_8_avx2(&state,
+                                                            pKeyStrArr);
+                        else
+                                asm_ZucGenKeystream32B_8_avx2(&state,
+                                                             pKeyStrArr);
+                }
                 for (i = 0; i < NUM_AVX2_BUFS; i++) {
                         if (job_in_lane[i] == NULL)
                                 continue;
@@ -843,13 +901,37 @@ void zuc_eia3_8_buffer_job_avx2(const void * const pKey[NUM_AVX2_BUFS],
 #endif
 }
 
-void zuc256_eia3_8_buffer_job_avx2(const void * const pKey[NUM_AVX2_BUFS],
+void zuc_eia3_8_buffer_job_avx2(const void * const pKey[NUM_AVX2_BUFS],
+                                  const uint8_t *pIv,
+                                  const void * const pBufferIn[NUM_AVX2_BUFS],
+                                  uint32_t *pMacI[NUM_AVX2_BUFS],
+                                  const uint16_t lengthInBits[NUM_AVX2_BUFS],
+                                  const void * const job_in_lane[NUM_AVX2_BUFS])
+{
+        _zuc_eia3_8_buffer_job(pKey, pIv, pBufferIn, pMacI, lengthInBits,
+                               job_in_lane, 0);
+}
+
+void zuc_eia3_8_buffer_job_gfni_avx2(const void * const pKey[NUM_AVX2_BUFS],
+                                  const uint8_t *pIv,
+                                  const void * const pBufferIn[NUM_AVX2_BUFS],
+                                  uint32_t *pMacI[NUM_AVX2_BUFS],
+                                  const uint16_t lengthInBits[NUM_AVX2_BUFS],
+                                  const void * const job_in_lane[NUM_AVX2_BUFS])
+{
+        _zuc_eia3_8_buffer_job(pKey, pIv, pBufferIn, pMacI, lengthInBits,
+                               job_in_lane, 1);
+}
+
+static inline
+void _zuc256_eia3_8_buffer_job(const void * const pKey[NUM_AVX2_BUFS],
                                 const uint8_t *ivs,
                                 const void * const pBufferIn[NUM_AVX2_BUFS],
                                 void *pMacI[NUM_AVX2_BUFS],
                                 const uint16_t lengthInBits[NUM_AVX2_BUFS],
                                 const void * const job_in_lane[NUM_AVX2_BUFS],
-                                const uint64_t tag_size)
+                                const uint64_t tag_size,
+                                const unsigned use_gfni)
 {
         unsigned int i = 0;
         DECLARE_ALIGNED(ZucState8_t state, 64);
@@ -873,10 +955,15 @@ void zuc256_eia3_8_buffer_job_avx2(const void * const pKey[NUM_AVX2_BUFS],
                 keys.pKeys[i] = pKey[i];
         }
 
-        asm_Zuc256Initialization_8_avx2(&keys, ivs, &state, T, tag_size);
+        init_8(&keys, ivs, &state, 256, tag_size, T, use_gfni);
 
         /* Generate 32 bytes at a time */
-        asm_ZucGenKeystream32B_8_avx2(&state, (uint32_t **)pKeyStrArr);
+        if (use_gfni)
+                /* Generate 32 bytes at a time */
+                asm_ZucGenKeystream32B_8_gfni_avx2(&state, pKeyStrArr);
+        else
+                /* Generate 32 bytes at a time */
+                asm_ZucGenKeystream32B_8_avx2(&state, pKeyStrArr);
 
         /* Point at the next 32 bytes of the key */
         for (i = 0; i < NUM_AVX2_BUFS; i++)
@@ -887,15 +974,7 @@ void zuc256_eia3_8_buffer_job_avx2(const void * const pKey[NUM_AVX2_BUFS],
                 numKeyStr++;
                 /* Generate the next key stream 4/8/16 bytes or 32 bytes */
                 if (!remainCommonBits && allCommonBits) {
-                        if (tag_size == 4)
-                                asm_ZucGenKeystream4B_8_avx2(&state,
-                                                             pKeyStrArr);
-                        else if (tag_size == 8)
-                                asm_ZucGenKeystream8B_8_avx2(&state,
-                                                             pKeyStrArr);
-                        else
-                                asm_ZucGenKeystream16B_8_avx2(&state,
-                                                              pKeyStrArr);
+                        keygen_8(&state, pKeyStrArr, tag_size, use_gfni);
                 } else
                         asm_ZucGenKeystream32B_8_avx2(&state,
                                                       (uint32_t **)pKeyStrArr);
@@ -991,6 +1070,30 @@ void zuc256_eia3_8_buffer_job_avx2(const void * const pKey[NUM_AVX2_BUFS],
 #endif
 }
 
+void zuc256_eia3_8_buffer_job_avx2(const void * const pKey[NUM_AVX2_BUFS],
+                                  const uint8_t *pIv,
+                                  const void * const pBufferIn[NUM_AVX2_BUFS],
+                                  void *pMacI[NUM_AVX2_BUFS],
+                                  const uint16_t lengthInBits[NUM_AVX2_BUFS],
+                                  const void * const job_in_lane[NUM_AVX2_BUFS],
+                                  const uint64_t tag_size)
+{
+        _zuc256_eia3_8_buffer_job(pKey, pIv, pBufferIn, pMacI, lengthInBits,
+                                  job_in_lane, tag_size, 0);
+}
+
+void zuc256_eia3_8_buffer_job_gfni_avx2(const void * const pKey[NUM_AVX2_BUFS],
+                                  const uint8_t *pIv,
+                                  const void * const pBufferIn[NUM_AVX2_BUFS],
+                                  void *pMacI[NUM_AVX2_BUFS],
+                                  const uint16_t lengthInBits[NUM_AVX2_BUFS],
+                                  const void * const job_in_lane[NUM_AVX2_BUFS],
+                                  const uint64_t tag_size)
+{
+        _zuc256_eia3_8_buffer_job(pKey, pIv, pBufferIn, pMacI, lengthInBits,
+                               job_in_lane, tag_size, 1);
+}
+
 void zuc_eia3_n_buffer_avx2(const void * const pKey[],
                             const void * const pIv[],
                             const void * const pBufferIn[],
diff --git a/lib/avx2_t1/zuc_x8_avx2.asm b/lib/avx2_t1/zuc_x8_avx2.asm
index b96206c1..d3262e39 100644
--- a/lib/avx2_t1/zuc_x8_avx2.asm
+++ b/lib/avx2_t1/zuc_x8_avx2.asm
@@ -33,6 +33,17 @@
 %include "include/mb_mgr_datastruct.inc"
 %include "include/cet.inc"
 
+%ifndef ZUC_CIPHER_8
+%define ZUC_CIPHER_8 asm_ZucCipher_8_avx2
+%define ZUC128_INIT_8 asm_ZucInitialization_8_avx2
+%define ZUC256_INIT_8 asm_Zuc256Initialization_8_avx2
+%define ZUC_KEYGEN32B_8 asm_ZucGenKeystream32B_8_avx2
+%define ZUC_KEYGEN16B_8 asm_ZucGenKeystream16B_8_avx2
+%define ZUC_KEYGEN8B_8 asm_ZucGenKeystream8B_8_avx2
+%define ZUC_KEYGEN4B_8 asm_ZucGenKeystream4B_8_avx2
+%define USE_GFNI 0
+%endif
+
 %ifdef LINUX
 %define arg1    rdi
 %define arg2    rsi
@@ -437,8 +448,8 @@ align 64
         vshufpd %%YTMP4, %%YTMP2, %%YTMP1, 0xFF ; All S1 input values
 
         ; Compute S0 and S1 values
-        S0_comput_AVX2 %%YTMP3, %%YTMP1, %%YTMP2
-        S1_comput_AVX2 %%YTMP4, %%YTMP1, %%YTMP2, %%YTMP5
+        S0_comput_AVX2 %%YTMP3, %%YTMP1, %%YTMP2, USE_GFNI
+        S1_comput_AVX2 %%YTMP4, %%YTMP1, %%YTMP2, %%YTMP5, USE_GFNI
 
         ; Need to shuffle back %%YTMP1 & %%YTMP2 before storing output
         ; (revert what was done before S0 and S1 computations)
@@ -978,15 +989,15 @@ align 64
         FUNC_RESTORE
 %endmacro
 
-MKGLOBAL(asm_ZucInitialization_8_avx2,function,internal)
-asm_ZucInitialization_8_avx2:
+MKGLOBAL(ZUC128_INIT_8,function,internal)
+ZUC128_INIT_8:
         endbranch64
         ZUC_INIT_8 128, 0
 
         ret
 
-MKGLOBAL(asm_Zuc256Initialization_8_avx2,function,internal)
-asm_Zuc256Initialization_8_avx2:
+MKGLOBAL(ZUC256_INIT_8,function,internal)
+ZUC256_INIT_8:
 %define tags   arg4
 %define tag_sz arg5
 
@@ -1142,8 +1153,8 @@ init_for_cipher:
 ;;  RDI    - pSta
 ;;  RSI    - pKeyStr
 ;;
-MKGLOBAL(asm_ZucGenKeystream32B_8_avx2,function,internal)
-asm_ZucGenKeystream32B_8_avx2:
+MKGLOBAL(ZUC_KEYGEN32B_8,function,internal)
+ZUC_KEYGEN32B_8:
         endbranch64
         KEYGEN_8_AVX2 8
         vzeroupper
@@ -1160,8 +1171,8 @@ asm_ZucGenKeystream32B_8_avx2:
 ;;  RDI    - pSta
 ;;  RSI    - pKeyStr
 ;;
-MKGLOBAL(asm_ZucGenKeystream16B_8_avx2,function,internal)
-asm_ZucGenKeystream16B_8_avx2:
+MKGLOBAL(ZUC_KEYGEN16B_8,function,internal)
+ZUC_KEYGEN16B_8:
         endbranch64
         KEYGEN_8_AVX2 4
         vzeroupper
@@ -1178,8 +1189,8 @@ asm_ZucGenKeystream16B_8_avx2:
 ;;  RDI    - pSta
 ;;  RSI    - pKeyStr
 ;;
-MKGLOBAL(asm_ZucGenKeystream8B_8_avx2,function,internal)
-asm_ZucGenKeystream8B_8_avx2:
+MKGLOBAL(ZUC_KEYGEN8B_8,function,internal)
+ZUC_KEYGEN8B_8:
         endbranch64
         KEYGEN_8_AVX2 2
         vzeroupper
@@ -1196,8 +1207,8 @@ asm_ZucGenKeystream8B_8_avx2:
 ;;  RDI    - pSta
 ;;  RSI    - pKeyStr
 ;;
-MKGLOBAL(asm_ZucGenKeystream4B_8_avx2,function,internal)
-asm_ZucGenKeystream4B_8_avx2:
+MKGLOBAL(ZUC_KEYGEN4B_8,function,internal)
+ZUC_KEYGEN4B_8:
         endbranch64
         KEYGEN_8_AVX2 1
         vzeroupper
@@ -1404,8 +1415,8 @@ asm_ZucGenKeystream4B_8_avx2:
 ;;  RCX - lengths
 ;;  R8  - min_length
 ;;
-MKGLOBAL(asm_ZucCipher_8_avx2,function,internal)
-asm_ZucCipher_8_avx2:
+MKGLOBAL(ZUC_CIPHER_8,function,internal)
+ZUC_CIPHER_8:
 %define pState  arg1
 %define pIn     arg2
 %define pOut    arg3
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index 23bea9ab..5c7854b2 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -205,14 +205,14 @@
 #define POLY1305_MAC                     poly1305_mac_scalar
 
 /* ZUC EEA3 & EIA3 */
-#define SUBMIT_JOB_ZUC_EEA3   submit_job_zuc_eea3_avx2
-#define FLUSH_JOB_ZUC_EEA3    flush_job_zuc_eea3_avx2
-#define SUBMIT_JOB_ZUC_EIA3   submit_job_zuc_eia3_avx2
-#define FLUSH_JOB_ZUC_EIA3    flush_job_zuc_eia3_avx2
-#define SUBMIT_JOB_ZUC256_EEA3   submit_job_zuc256_eea3_avx2
-#define FLUSH_JOB_ZUC256_EEA3    flush_job_zuc256_eea3_avx2
-#define SUBMIT_JOB_ZUC256_EIA3   submit_job_zuc256_eia3_avx2
-#define FLUSH_JOB_ZUC256_EIA3    flush_job_zuc256_eia3_avx2
+#define SUBMIT_JOB_ZUC_EEA3   submit_job_zuc_eea3_gfni_avx2
+#define FLUSH_JOB_ZUC_EEA3    flush_job_zuc_eea3_gfni_avx2
+#define SUBMIT_JOB_ZUC_EIA3   submit_job_zuc_eia3_gfni_avx2
+#define FLUSH_JOB_ZUC_EIA3    flush_job_zuc_eia3_gfni_avx2
+#define SUBMIT_JOB_ZUC256_EEA3   submit_job_zuc256_eea3_gfni_avx2
+#define FLUSH_JOB_ZUC256_EEA3    flush_job_zuc256_eea3_gfni_avx2
+#define SUBMIT_JOB_ZUC256_EIA3   submit_job_zuc256_eia3_gfni_avx2
+#define FLUSH_JOB_ZUC256_EIA3    flush_job_zuc256_eia3_gfni_avx2
 
 /* SNOW-V */
 #define SUBMIT_JOB_SNOW_V      snow_v_avx
diff --git a/lib/avx2_t2/mb_mgr_zuc_submit_flush_gfni_avx2.asm b/lib/avx2_t2/mb_mgr_zuc_submit_flush_gfni_avx2.asm
new file mode 100644
index 00000000..62d1c100
--- /dev/null
+++ b/lib/avx2_t2/mb_mgr_zuc_submit_flush_gfni_avx2.asm
@@ -0,0 +1,40 @@
+;;
+;; Copyright (c) 2022, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+%define SUBMIT_JOB_ZUC128_EEA3 submit_job_zuc_eea3_gfni_avx2
+%define FLUSH_JOB_ZUC128_EEA3 flush_job_zuc_eea3_gfni_avx2
+%define SUBMIT_JOB_ZUC256_EEA3 submit_job_zuc256_eea3_gfni_avx2
+%define FLUSH_JOB_ZUC256_EEA3 flush_job_zuc256_eea3_gfni_avx2
+%define SUBMIT_JOB_ZUC128_EIA3 submit_job_zuc_eia3_gfni_avx2
+%define FLUSH_JOB_ZUC128_EIA3 flush_job_zuc_eia3_gfni_avx2
+%define SUBMIT_JOB_ZUC256_EIA3 submit_job_zuc256_eia3_gfni_avx2
+%define FLUSH_JOB_ZUC256_EIA3 flush_job_zuc256_eia3_gfni_avx2
+%define ZUC128_INIT_8        asm_ZucInitialization_8_gfni_avx2
+%define ZUC256_INIT_8        asm_Zuc256Initialization_8_gfni_avx2
+%define ZUC_EIA3_8_BUFFER    zuc_eia3_8_buffer_job_gfni_avx2
+%define ZUC256_EIA3_8_BUFFER zuc256_eia3_8_buffer_job_gfni_avx2
+%define ZUC_CIPHER_8      asm_ZucCipher_8_gfni_avx2
+%include "avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm"
diff --git a/lib/avx2_t2/zuc_x8_gfni_avx2.asm b/lib/avx2_t2/zuc_x8_gfni_avx2.asm
new file mode 100644
index 00000000..4753b6e8
--- /dev/null
+++ b/lib/avx2_t2/zuc_x8_gfni_avx2.asm
@@ -0,0 +1,37 @@
+;;
+;; Copyright (c) 2022, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+
+%define USE_GFNI 1
+%define ZUC_CIPHER_8 asm_ZucCipher_8_gfni_avx2
+%define ZUC128_INIT_8 asm_ZucInitialization_8_gfni_avx2
+%define ZUC256_INIT_8 asm_Zuc256Initialization_8_gfni_avx2
+%define ZUC_KEYGEN32B_8 asm_ZucGenKeystream32B_8_gfni_avx2
+%define ZUC_KEYGEN16B_8 asm_ZucGenKeystream16B_8_gfni_avx2
+%define ZUC_KEYGEN8B_8 asm_ZucGenKeystream8B_8_gfni_avx2
+%define ZUC_KEYGEN4B_8 asm_ZucGenKeystream4B_8_gfni_avx2
+%include "avx2_t1/zuc_x8_avx2.asm"
+
diff --git a/lib/include/arch_avx2_type2.h b/lib/include/arch_avx2_type2.h
index 7cd8faa1..4d9d6842 100644
--- a/lib/include/arch_avx2_type2.h
+++ b/lib/include/arch_avx2_type2.h
@@ -48,4 +48,24 @@ void aes_ecb_dec_192_vaes_avx2(const void *in, const void *keys,
 void aes_ecb_dec_128_vaes_avx2(const void *in, const void *keys,
                                void *out, uint64_t len_bytes);
 
+/* moved from MB MGR */
+IMB_JOB *submit_job_zuc_eea3_gfni_avx2(MB_MGR_ZUC_OOO *state,
+                                  IMB_JOB *job);
+IMB_JOB *flush_job_zuc_eea3_gfni_avx2(MB_MGR_ZUC_OOO *state);
+
+IMB_JOB *flush_job_zuc256_eea3_gfni_avx2(MB_MGR_ZUC_OOO *state);
+
+IMB_JOB *submit_job_zuc256_eea3_gfni_avx2(MB_MGR_ZUC_OOO *state,
+                                     IMB_JOB *job);
+
+IMB_JOB *submit_job_zuc_eia3_gfni_avx2(MB_MGR_ZUC_OOO *state,
+                                  IMB_JOB *job);
+IMB_JOB *flush_job_zuc_eia3_gfni_avx2(MB_MGR_ZUC_OOO *state);
+
+IMB_JOB *submit_job_zuc256_eia3_gfni_avx2(MB_MGR_ZUC_OOO *state,
+                                     IMB_JOB *job,
+                                     const uint64_t tag_sz);
+IMB_JOB *flush_job_zuc256_eia3_gfni_avx2(MB_MGR_ZUC_OOO *state,
+                                    const uint64_t tag_sz);
+
 #endif /* IMB_ASM_AVX2_T2_H */
diff --git a/lib/include/zuc_internal.h b/lib/include/zuc_internal.h
index dee5bd2e..69080215 100755
--- a/lib/include/zuc_internal.h
+++ b/lib/include/zuc_internal.h
@@ -342,6 +342,9 @@ IMB_DLL_LOCAL void asm_Zuc256Initialization_4_avx(ZucKey4_t *pKeys,
 IMB_DLL_LOCAL void asm_ZucInitialization_8_avx2(ZucKey8_t *pKeys,
                                                 const uint8_t *ivs,
                                                 ZucState8_t *pState);
+IMB_DLL_LOCAL void asm_ZucInitialization_8_gfni_avx2(ZucKey8_t *pKeys,
+                                                const uint8_t *ivs,
+                                                ZucState8_t *pState);
 
 /**
  ******************************************************************************
@@ -377,6 +380,11 @@ IMB_DLL_LOCAL void asm_Zuc256Initialization_8_avx2(ZucKey8_t *pKeys,
                                                    ZucState8_t *pState,
                                                    void *tags,
                                                    const uint64_t tag_sz);
+IMB_DLL_LOCAL void asm_Zuc256Initialization_8_gfni_avx2(ZucKey8_t *pKeys,
+                                                   const uint8_t *ivs,
+                                                   ZucState8_t *pState,
+                                                   void *tags,
+                                                   const uint64_t tag_sz);
 
 /**
  ******************************************************************************
@@ -633,6 +641,8 @@ IMB_DLL_LOCAL void asm_ZucGenKeystream16B_4_avx(ZucState4_t *pState,
  *****************************************************************************/
 IMB_DLL_LOCAL void asm_ZucGenKeystream32B_8_avx2(ZucState8_t *pState,
                                                  uint32_t *pKeyStr[8]);
+IMB_DLL_LOCAL void asm_ZucGenKeystream32B_8_gfni_avx2(ZucState8_t *pState,
+                                                 uint32_t *pKeyStr[8]);
 
 /**
  ******************************************************************************
@@ -863,6 +873,8 @@ IMB_DLL_LOCAL void asm_ZucGenKeystream4B_4_avx(ZucState4_t *pState,
  *****************************************************************************/
 IMB_DLL_LOCAL void asm_ZucGenKeystream16B_8_avx2(ZucState8_t *pState,
                                                 uint32_t *pKeyStr[8]);
+IMB_DLL_LOCAL void asm_ZucGenKeystream16B_8_gfni_avx2(ZucState8_t *pState,
+                                                uint32_t *pKeyStr[8]);
 
 /**
  ******************************************************************************
@@ -886,6 +898,8 @@ IMB_DLL_LOCAL void asm_ZucGenKeystream16B_8_avx2(ZucState8_t *pState,
  *****************************************************************************/
 IMB_DLL_LOCAL void asm_ZucGenKeystream8B_8_avx2(ZucState8_t *pState,
                                                 uint32_t *pKeyStr[8]);
+IMB_DLL_LOCAL void asm_ZucGenKeystream8B_8_gfni_avx2(ZucState8_t *pState,
+                                                uint32_t *pKeyStr[8]);
 
 /**
  ******************************************************************************
@@ -909,6 +923,8 @@ IMB_DLL_LOCAL void asm_ZucGenKeystream8B_8_avx2(ZucState8_t *pState,
  *****************************************************************************/
 IMB_DLL_LOCAL void asm_ZucGenKeystream4B_8_avx2(ZucState8_t *pState,
                                                 uint32_t *pKeyStr[8]);
+IMB_DLL_LOCAL void asm_ZucGenKeystream4B_8_gfni_avx2(ZucState8_t *pState,
+                                                uint32_t *pKeyStr[8]);
 
 /**
  ******************************************************************************
@@ -1179,6 +1195,11 @@ IMB_DLL_LOCAL void asm_ZucCipher_8_avx2(ZucState8_t *pState,
                                         uint64_t *pOut[8],
                                         const uint16_t lengths[8],
                                         const uint64_t minLength);
+IMB_DLL_LOCAL void asm_ZucCipher_8_gfni_avx2(ZucState8_t *pState,
+                                             const uint64_t *pIn[8],
+                                             uint64_t *pOut[8],
+                                             const uint16_t lengths[8],
+                                             const uint64_t minLength);
 
 /**
  ******************************************************************************
@@ -1484,6 +1505,14 @@ void zuc_eia3_8_buffer_job_avx2(const void * const pKey[8],
                                 const uint16_t lengthInBits[8],
                                 const void * const job_in_lane[8]);
 
+IMB_DLL_LOCAL
+void zuc_eia3_8_buffer_job_gfni_avx2(const void * const pKey[8],
+                                const uint8_t *ivs,
+                                const void * const pBufferIn[8],
+                                uint32_t *pMacI[8],
+                                const uint16_t lengthInBits[8],
+                                const void * const job_in_lane[8]);
+
 IMB_DLL_LOCAL
 void zuc256_eia3_8_buffer_job_avx2(const void * const pKey[8],
                                    const uint8_t *ivs,
@@ -1493,6 +1522,14 @@ void zuc256_eia3_8_buffer_job_avx2(const void * const pKey[8],
                                    const void * const job_in_lane[8],
                                    const uint64_t tag_size);
 
+IMB_DLL_LOCAL
+void zuc256_eia3_8_buffer_job_gfni_avx2(const void * const pKey[8],
+                                   const uint8_t *ivs,
+                                   const void * const pBufferIn[8],
+                                   void *pMacI[8],
+                                   const uint16_t lengthInBits[8],
+                                   const void * const job_in_lane[8],
+                                   const uint64_t tag_size);
 /* the s-boxes */
 extern const uint8_t S0[256];
 extern const uint8_t S1[256];
diff --git a/lib/include/zuc_sbox.inc b/lib/include/zuc_sbox.inc
index 6a06349d..26c2131d 100644
--- a/lib/include/zuc_sbox.inc
+++ b/lib/include/zuc_sbox.inc
@@ -273,10 +273,11 @@ Rotl5_matrix:
 ;
 ; Compute 32 S0 box values from 32 bytes, stored in YMM register
 ;
-%macro S0_comput_AVX2 3
+%macro S0_comput_AVX2 4
 %define %%IN_OUT        %1 ; [in/out] YMM reg with input values which will contain the output values
 %define %%YTMP1         %2 ; [clobbered] Temporary YMM register
 %define %%YTMP2         %3 ; [clobbered] Temporary YMM register
+%define %%USE_GFNI      %4 ; [in] If 1, GFNI can be used
 
         vpand    %%YTMP1, %%IN_OUT, [rel High_nibble_mask]
         vpsrlq   %%YTMP1, 4                 ; x1
@@ -299,7 +300,11 @@ Rotl5_matrix:
         vpsllq   %%IN_OUT, 4
         vpor     %%IN_OUT, %%YTMP1 ; t = (s << 4) | r
 
+%if (%%USE_GFNI == 1)
+        vgf2p8affineqb  %%IN_OUT, %%IN_OUT, [rel Rotl5_matrix], 0x00
+%else
         Rotl_5_AVX2   %%IN_OUT, %%YTMP1
+%endif
 %endmacro
 
 ;
@@ -520,12 +525,19 @@ Rotl5_matrix:
 ;
 ; Compute 32 S1 box values from 32 bytes, stored in YMM register
 ;
-%macro S1_comput_AVX2 4
+%macro S1_comput_AVX2 5
 %define %%YIN_OUT       %1 ; [in/out] YMM reg with input values which will contain the output values
 %define %%YTMP1         %2 ; [clobbered] Temporary YMM register
 %define %%YTMP2         %3 ; [clobbered] Temporary YMM register
 %define %%YTMP3         %4 ; [clobbered] Temporary YMM register
+%define %%USE_GFNI      %5 ; [in] If 1, GFNI can be used
 
+%if (%%USE_GFNI == 1)
+        vgf2p8affineqb  %%YIN_OUT, %%YIN_OUT, [rel Aes_to_Zuc], 0x00
+        vpshufb         %%YIN_OUT, [rel Shuf_mask]
+        vaesenclast     %%YIN_OUT, %%YIN_OUT, [rel Cancel_aes]
+        vgf2p8affineqb  %%YIN_OUT, %%YIN_OUT, [rel CombMatrix], 0x55
+%else ; USE_GFNI == 0
         vmovdqa         %%YTMP1, [rel Aes_to_Zuc_mul_low_nibble]
         vmovdqa         %%YTMP2, [rel Aes_to_Zuc_mul_high_nibble]
         MUL_PSHUFB_AVX2 %%YIN_OUT, %%YTMP1, %%YTMP2, %%YTMP3
@@ -540,7 +552,7 @@ Rotl5_matrix:
         vmovdqa         %%YIN_OUT, [rel Comb_matrix_mul_high_nibble]
         MUL_PSHUFB_AVX2 %%YTMP2, %%YTMP1, %%YIN_OUT, %%YTMP3
         vpxor           %%YIN_OUT, [rel Const_comb_matrix]
-
+%endif
 %endmacro
 
 ;
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index b33f5b12..a4e97567 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -255,6 +255,7 @@ lib_objs1 = \
 	$(OBJ_DIR)\zuc_x4_gfni_sse.obj \
 	$(OBJ_DIR)\zuc_x4_avx.obj \
 	$(OBJ_DIR)\zuc_x8_avx2.obj \
+	$(OBJ_DIR)\zuc_x8_gfni_avx2.obj \
 	$(OBJ_DIR)\zuc_x16_avx512.obj \
 	$(OBJ_DIR)\zuc_x16_vaes_avx512.obj \
 	$(OBJ_DIR)\zuc_iv.obj \
@@ -444,6 +445,7 @@ lib_objs2 = \
 	$(OBJ_DIR)\mb_mgr_zuc_submit_flush_gfni_sse.obj \
 	$(OBJ_DIR)\mb_mgr_zuc_submit_flush_avx.obj \
 	$(OBJ_DIR)\mb_mgr_zuc_submit_flush_avx2.obj \
+	$(OBJ_DIR)\mb_mgr_zuc_submit_flush_gfni_avx2.obj \
 	$(OBJ_DIR)\mb_mgr_zuc_submit_flush_avx512.obj \
 	$(OBJ_DIR)\mb_mgr_zuc_submit_flush_gfni_avx512.obj \
 	$(OBJ_DIR)\mb_mgr_avx.obj \
-- 
GitLab


From d25eec11baaf6754af18884723cef02801d1ed96 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Tue, 20 Dec 2022 15:02:04 +0000
Subject: [PATCH 051/332] test: [fuzz] direct api fix reported by coverity

---
 test/direct_api_fuzz_test.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/test/direct_api_fuzz_test.c b/test/direct_api_fuzz_test.c
index 1bd350b9..7747612b 100644
--- a/test/direct_api_fuzz_test.c
+++ b/test/direct_api_fuzz_test.c
@@ -102,8 +102,11 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                 return 0;
 
 	buff = malloc(dataSize);
+        if (buff == NULL)
+                return EXIT_FAILURE;
 	memcpy(buff, data, dataSize);
 
+
 	const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
 	struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
 	uint8_t *out = buff;
@@ -119,6 +122,7 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
         p_mgr = alloc_mb_mgr(0);
         if (p_mgr == NULL) {
                 printf("Error allocating MB_MGR structure!\n");
+                free(buff);
                 return EXIT_FAILURE;
         }
 
-- 
GitLab


From ef7ed91edc6769475babcebdedd29d18daded142 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Wed, 11 Jan 2023 14:00:32 +0000
Subject: [PATCH 052/332] lib: add AVX-IFMA CPU flag detection

---
 README.md                |  5 +++--
 ReleaseNotes.txt         |  6 ++++++
 lib/intel-ipsec-mb.h     |  1 +
 lib/x86_64/cpu_feature.c | 11 +++++++++++
 test/main.c              |  1 +
 5 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/README.md b/README.md
index 2555d681..37940bbd 100644
--- a/README.md
+++ b/README.md
@@ -152,8 +152,8 @@ Table 2. List of supported integrity algorithms and their implementations.
 | SNOW3G-UIA2(8)    | N      | Y by4  | Y by4  | N      | Y by32 | Y by32 |
 | DOCSIS-CRC32(4)   | N      | Y      | Y      | N      | Y      | Y      |
 | HEC               | N      | Y      | Y      | N      | N      | N      |
-| POLY1305          | Y      | N      | N      | N      | Y      | Y      |
-| POLY1305 AEAD     | Y      | N      | N      | N      | Y      | Y      |
+| POLY1305          | Y      | N      | N      | Y(9)   | Y      | Y      |
+| POLY1305 AEAD     | Y      | N      | N      | Y(9)   | Y      | Y      |
 | SNOW-V AEAD       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |
 | GHASH             | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |
 | CRC(6)            | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |
@@ -177,6 +177,7 @@ Notes:
  - CRC6: IUUP header  
 (7) - used only with PON-AES128-CTR cipher  
 (8) - x4/x16 for init keystream generation, then by4/by32  
+(9) - Only if AVX-IFMA instructions are supported
 
 Legend:  
 ` byY`- single buffer Y blocks at a time  
diff --git a/ReleaseNotes.txt b/ReleaseNotes.txt
index 379e710c..65b555ce 100644
--- a/ReleaseNotes.txt
+++ b/ReleaseNotes.txt
@@ -1,6 +1,12 @@
 ========================================================================
 Release Notes for Intel(R) Multi-Buffer Crypto for IPsec Library
 
+Unreleased
+==========
+
+Library
+- POLY1305 AVX2 with AVX-IFMA instructions added.
+
 v1.3 September 2022
 ========================================================================
 
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index ac8a58eb..55e5f3c1 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -1033,6 +1033,7 @@ typedef uint32_t (*crc32_fn_t)(const void *, const uint64_t);
 #define IMB_FEATURE_AESNI_EMU  (1ULL << 19)
 #define IMB_FEATURE_SELF_TEST  (1ULL << 20)     /* self-test feature present */
 #define IMB_FEATURE_SELF_TEST_PASS (1ULL << 21) /* self-test passed */
+#define IMB_FEATURE_AVX_IFMA (1ULL << 22)
 
 /**
  * CPU flags needed for each implementation
diff --git a/lib/x86_64/cpu_feature.c b/lib/x86_64/cpu_feature.c
index 5248853b..74b245f7 100644
--- a/lib/x86_64/cpu_feature.c
+++ b/lib/x86_64/cpu_feature.c
@@ -41,6 +41,7 @@ struct cpuid_regs {
 
 static struct cpuid_regs cpuid_1_0;
 static struct cpuid_regs cpuid_7_0;
+static struct cpuid_regs cpuid_7_1;
 
 /*
  * A C wrapper for CPUID opcode
@@ -174,6 +175,12 @@ static uint32_t detect_avx512_ifma(void)
         return (cpuid_7_0.ebx & (1UL << 21));
 }
 
+static uint32_t detect_avx_ifma(void)
+{
+        /* Check presence of AVX-IFMA - bit 23 of EAX */
+        return (cpuid_7_1.eax & (1UL << 23));
+}
+
 static uint32_t detect_bmi2(void)
 {
         /* Check presence of BMI2 - bit 8 of EBX */
@@ -204,6 +211,7 @@ uint64_t cpu_feature_detect(void)
                 { 7, IMB_FEATURE_GFNI, detect_gfni },
                 { 7, IMB_FEATURE_AVX512_IFMA, detect_avx512_ifma },
                 { 7, IMB_FEATURE_BMI2, detect_bmi2 },
+                { 7, IMB_FEATURE_AVX_IFMA, detect_avx_ifma },
         };
         struct cpuid_regs r;
         unsigned hi_leaf_number = 0;
@@ -221,6 +229,9 @@ uint64_t cpu_feature_detect(void)
         if (hi_leaf_number >= 7)
                 __mbcpuid(0x7, 0x0, &cpuid_7_0);
 
+        if (hi_leaf_number >= 7)
+                __mbcpuid(0x7, 0x1, &cpuid_7_1);
+
         for (i = 0; i < IMB_DIM(feat_tab); i++) {
                 if (hi_leaf_number < feat_tab[i].req_leaf_number)
                         continue;
diff --git a/test/main.c b/test/main.c
index 9cfb68c6..87ed790d 100644
--- a/test/main.c
+++ b/test/main.c
@@ -282,6 +282,7 @@ print_hw_features(void)
                 { IMB_FEATURE_VPCLMULQDQ, "VPCLMULQDQ" },
                 { IMB_FEATURE_GFNI, "GFNI" },
                 { IMB_FEATURE_AVX512_IFMA, "AVX512-IFMA" },
+                { IMB_FEATURE_AVX_IFMA, "AVX-IFMA" },
                 { IMB_FEATURE_BMI2, "BMI2" },
         };
         IMB_MGR *p_mgr = NULL;
-- 
GitLab


From c6052e25b1ad895bbc6e8a2be63fe32ef8af15ac Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 20 Dec 2022 14:25:16 +0000
Subject: [PATCH 053/332] avx2: [POLY1305] implement version with VEX IFMA
 instructions

---
 lib/Makefile                    |   15 +
 lib/avx2_t1/mb_mgr_avx2.c       |    5 +-
 lib/avx2_t2/mb_mgr_avx2_t2.c    |    1 -
 lib/avx2_t3/README              |    3 +
 lib/avx2_t3/mb_mgr_avx2_t3.c    |  485 ++++++++++++
 lib/avx2_t3/poly_fma_avx2.asm   | 1238 +++++++++++++++++++++++++++++++
 lib/include/arch_avx2_type2.h   |    1 -
 lib/include/arch_avx2_type3.h   |   37 +
 lib/include/chacha20_poly1305.h |   25 +
 lib/include/ipsec_ooo_mgr.h     |   39 +
 lib/intel-ipsec-mb.h            |    1 +
 lib/libIPSec_MB.def             |   16 +-
 lib/win_x64.mak                 |    8 +
 lib/x86_64/chacha20_poly1305.c  |   67 +-
 14 files changed, 1932 insertions(+), 9 deletions(-)
 create mode 100644 lib/avx2_t3/README
 create mode 100644 lib/avx2_t3/mb_mgr_avx2_t3.c
 create mode 100644 lib/avx2_t3/poly_fma_avx2.asm
 create mode 100644 lib/include/arch_avx2_type3.h

diff --git a/lib/Makefile b/lib/Makefile
index 08fada7b..eaa9b6fd 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -585,6 +585,7 @@ asm_avx2_lib_objs := \
 	mb_mgr_hmac_sha512_submit_avx2.o \
 	mb_mgr_zuc_submit_flush_avx2.o \
 	mb_mgr_zuc_submit_flush_gfni_avx2.o \
+	poly_fma_avx2.o \
 	chacha20_avx2.o
 
 #
@@ -908,6 +909,20 @@ ifeq ($(CC_HAS_CET),1)
 	mv $@.tmp $@
 endif
 
+$(OBJ_DIR)/%.o:avx2_t3/%.c
+	$(CC) -MMD $(OPT_AVX2) -c $(CFLAGS) $< -o $@
+
+$(OBJ_DIR)/%.o:avx2_t3/%.asm
+ifeq ($(USE_YASM),y)
+	$(YASM) $(YASM_FLAGS) $< -o $@
+else
+	$(NASM) -MD $(@:.o=.d) -MT $@ -o $@ $(NASM_FLAGS) $<
+endif
+ifeq ($(CC_HAS_CET),1)
+	$(LD) $(CET_LDFLAGS) -o $@.tmp $@
+	mv $@.tmp $@
+endif
+
 $(OBJ_DIR)/%.o:avx512_t1/%.c
 	$(CC) -MMD $(OPT_AVX512) -c $(CFLAGS) $< -o $@
 
diff --git a/lib/avx2_t1/mb_mgr_avx2.c b/lib/avx2_t1/mb_mgr_avx2.c
index 12370752..0c701b39 100644
--- a/lib/avx2_t1/mb_mgr_avx2.c
+++ b/lib/avx2_t1/mb_mgr_avx2.c
@@ -53,7 +53,10 @@ init_mb_mgr_avx2_internal(IMB_MGR *state, const int reset_mgrs)
         state->features = cpu_feature_adjust(state->flags,
                                              cpu_feature_detect());
 
-        if ((state->features & IMB_CPUFLAGS_AVX2_T2) ==
+        if ((state->features & IMB_CPUFLAGS_AVX2_T3) ==
+            IMB_CPUFLAGS_AVX2_T3)
+                init_mb_mgr_avx2_t3_internal(state, reset_mgrs);
+        else if ((state->features & IMB_CPUFLAGS_AVX2_T2) ==
             IMB_CPUFLAGS_AVX2_T2)
                 init_mb_mgr_avx2_t2_internal(state, reset_mgrs);
         else
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index 5c7854b2..d050c2b9 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -345,7 +345,6 @@ init_mb_mgr_avx2_t2_internal(IMB_MGR *state, const int reset_mgrs)
                 state->earliest_job = -1;
         }
 
-        /* set handlers */
         /* set handlers */
         state->get_next_job        = GET_NEXT_JOB;
         state->submit_job          = SUBMIT_JOB;
diff --git a/lib/avx2_t3/README b/lib/avx2_t3/README
new file mode 100644
index 00000000..1d77c4f1
--- /dev/null
+++ b/lib/avx2_t3/README
@@ -0,0 +1,3 @@
+AVX2 TYPE3:
+- AVX2 TYPE2: AVX2, BMI2, AESNI, PCLMULQDQ, CMOV, VAES, VPCLMULQDQ, SHANI, GFNI
+- AVXIFMA
diff --git a/lib/avx2_t3/mb_mgr_avx2_t3.c b/lib/avx2_t3/mb_mgr_avx2_t3.c
new file mode 100644
index 00000000..bb46626f
--- /dev/null
+++ b/lib/avx2_t3/mb_mgr_avx2_t3.c
@@ -0,0 +1,485 @@
+/*******************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#define AVX2
+
+#include "intel-ipsec-mb.h"
+#include "include/ipsec_ooo_mgr.h"
+#include "include/kasumi_interface.h"
+#include "include/zuc_internal.h"
+#include "include/snow3g.h"
+#include "include/snow3g_submit.h"
+#include "include/gcm.h"
+#include "include/chacha20_poly1305.h"
+
+#include "include/save_xmms.h"
+#include "include/des.h"
+#include "include/cpu_feature.h"
+#include "include/noaesni.h"
+#include "include/aesni_emu.h"
+#include "include/error.h"
+
+#include "include/arch_sse_type1.h" /* poly1305, snow3g */
+#include "include/arch_sse_type2.h" /* shani */
+#include "include/arch_avx_type1.h"
+#include "include/arch_avx2_type1.h"
+#include "include/arch_avx2_type2.h"
+#include "include/arch_avx2_type3.h"
+
+#include "include/ooo_mgr_reset.h"
+
+#define SAVE_XMMS               save_xmms_avx
+#define RESTORE_XMMS            restore_xmms_avx
+
+/* JOB API */
+#define SUBMIT_JOB         submit_job_avx2_t3
+#define FLUSH_JOB          flush_job_avx2_t3
+#define QUEUE_SIZE         queue_size_avx2_t3
+#define SUBMIT_JOB_NOCHECK submit_job_nocheck_avx2_t3
+#define GET_NEXT_JOB       get_next_job_avx2_t3
+#define GET_COMPLETED_JOB  get_completed_job_avx2_t3
+#define GET_NEXT_BURST     get_next_burst_avx2_t3
+#define SUBMIT_BURST       submit_burst_avx2_t3
+#define SUBMIT_BURST_NOCHECK submit_burst_nocheck_avx2_t3
+#define FLUSH_BURST       flush_burst_avx2_t3
+#define SUBMIT_CIPHER_BURST submit_cipher_burst_avx2_t3
+#define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_avx2_t3
+#define SUBMIT_HASH_BURST submit_hash_burst_avx2_t3
+#define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_avx2_t3
+
+/* Hash */
+#define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_AVX2
+#define FLUSH_JOB_HASH     FLUSH_JOB_HASH_AVX2
+
+/* Cipher encrypt / decrypt */
+#define SUBMIT_JOB_CIPHER_ENC SUBMIT_JOB_CIPHER_ENC_AVX2
+#define FLUSH_JOB_CIPHER_ENC  FLUSH_JOB_CIPHER_ENC_AVX2
+#define SUBMIT_JOB_CIPHER_DEC SUBMIT_JOB_CIPHER_DEC_AVX2
+
+/* AES-GCM */
+#define AES_GCM_DEC_IV_128   aes_gcm_dec_var_iv_128_avx_gen4
+#define AES_GCM_ENC_IV_128   aes_gcm_enc_var_iv_128_avx_gen4
+#define AES_GCM_DEC_IV_192   aes_gcm_dec_var_iv_192_avx_gen4
+#define AES_GCM_ENC_IV_192   aes_gcm_enc_var_iv_192_avx_gen4
+#define AES_GCM_DEC_IV_256   aes_gcm_dec_var_iv_256_avx_gen4
+#define AES_GCM_ENC_IV_256   aes_gcm_enc_var_iv_256_avx_gen4
+
+#define SUBMIT_JOB_AES_GCM_DEC submit_job_gcm_dec_avx2
+#define SUBMIT_JOB_AES_GCM_ENC submit_job_gcm_enc_avx2
+
+/* AES-CBC */
+#define SUBMIT_JOB_AES_CBC_128_ENC submit_job_aes128_enc_avx
+#define SUBMIT_JOB_AES_CBC_128_DEC submit_job_aes128_dec_avx
+#define FLUSH_JOB_AES_CBC_128_ENC  flush_job_aes128_enc_avx
+
+#define SUBMIT_JOB_AES_CBC_192_ENC submit_job_aes192_enc_avx
+#define SUBMIT_JOB_AES_CBC_192_DEC submit_job_aes192_dec_avx
+#define FLUSH_JOB_AES_CBC_192_ENC  flush_job_aes192_enc_avx
+
+#define SUBMIT_JOB_AES_CBC_256_ENC submit_job_aes256_enc_avx
+#define SUBMIT_JOB_AES_CBC_256_DEC submit_job_aes256_dec_avx
+#define FLUSH_JOB_AES_CBC_256_ENC  flush_job_aes256_enc_avx
+
+#define AES_CBC_DEC_128       aes_cbc_dec_128_avx
+#define AES_CBC_DEC_192       aes_cbc_dec_192_avx
+#define AES_CBC_DEC_256       aes_cbc_dec_256_avx
+
+/* AES-CBCS */
+#define SUBMIT_JOB_AES128_CBCS_1_9_ENC submit_job_aes128_cbcs_1_9_enc_avx
+#define FLUSH_JOB_AES128_CBCS_1_9_ENC  flush_job_aes128_cbcs_1_9_enc_avx
+#define SUBMIT_JOB_AES128_CBCS_1_9_DEC submit_job_aes128_cbcs_1_9_dec_avx
+#define AES_CBCS_1_9_DEC_128           aes_cbcs_1_9_dec_128_avx
+
+/* AES-ECB */
+#define SUBMIT_JOB_AES_ECB_128_ENC submit_job_aes_ecb_128_enc_vaes_avx2
+#define SUBMIT_JOB_AES_ECB_128_DEC submit_job_aes_ecb_128_dec_vaes_avx2
+#define SUBMIT_JOB_AES_ECB_192_ENC submit_job_aes_ecb_192_enc_vaes_avx2
+#define SUBMIT_JOB_AES_ECB_192_DEC submit_job_aes_ecb_192_dec_vaes_avx2
+#define SUBMIT_JOB_AES_ECB_256_ENC submit_job_aes_ecb_256_enc_vaes_avx2
+#define SUBMIT_JOB_AES_ECB_256_DEC submit_job_aes_ecb_256_dec_vaes_avx2
+
+#define AES_ECB_ENC_128       aes_ecb_enc_128_vaes_avx2
+#define AES_ECB_ENC_192       aes_ecb_enc_192_vaes_avx2
+#define AES_ECB_ENC_256       aes_ecb_enc_256_vaes_avx2
+#define AES_ECB_DEC_128       aes_ecb_dec_128_vaes_avx2
+#define AES_ECB_DEC_192       aes_ecb_dec_192_vaes_avx2
+#define AES_ECB_DEC_256       aes_ecb_dec_256_vaes_avx2
+
+/* AES-CTR */
+#define AES_CTR_128       aes_cntr_128_avx
+#define AES_CTR_192       aes_cntr_192_avx
+#define AES_CTR_256       aes_cntr_256_avx
+#define AES_CTR_128_BIT   aes_cntr_bit_128_avx
+#define AES_CTR_192_BIT   aes_cntr_bit_192_avx
+#define AES_CTR_256_BIT   aes_cntr_bit_256_avx
+
+/* AES-CCM */
+#define AES_CNTR_CCM_128   aes_cntr_ccm_128_avx
+#define AES_CNTR_CCM_256   aes_cntr_ccm_256_avx
+
+#define FLUSH_JOB_AES128_CCM_AUTH     flush_job_aes128_ccm_auth_avx
+#define SUBMIT_JOB_AES128_CCM_AUTH    submit_job_aes128_ccm_auth_avx
+
+#define FLUSH_JOB_AES256_CCM_AUTH     flush_job_aes256_ccm_auth_avx
+#define SUBMIT_JOB_AES256_CCM_AUTH    submit_job_aes256_ccm_auth_avx
+
+/* AES-CMAC */
+#define FLUSH_JOB_AES128_CMAC_AUTH    flush_job_aes128_cmac_auth_avx
+#define SUBMIT_JOB_AES128_CMAC_AUTH   submit_job_aes128_cmac_auth_avx
+
+#define FLUSH_JOB_AES256_CMAC_AUTH    flush_job_aes256_cmac_auth_avx
+#define SUBMIT_JOB_AES256_CMAC_AUTH   submit_job_aes256_cmac_auth_avx
+
+/* AES-CFB */
+#define AES_CFB_128_ONE    aes_cfb_128_one_avx2
+#define AES_CFB_256_ONE    aes_cfb_256_one_avx2
+
+/* AES-XCBC */
+#define SUBMIT_JOB_AES_XCBC   submit_job_aes_xcbc_avx
+#define FLUSH_JOB_AES_XCBC    flush_job_aes_xcbc_avx
+
+/* PON */
+#define SUBMIT_JOB_PON_ENC        submit_job_pon_enc_avx
+#define SUBMIT_JOB_PON_DEC        submit_job_pon_dec_avx
+#define SUBMIT_JOB_PON_ENC_NO_CTR submit_job_pon_enc_no_ctr_avx
+#define SUBMIT_JOB_PON_DEC_NO_CTR submit_job_pon_dec_no_ctr_avx
+
+/* SHA1/224/256/384/512 */
+/* note: SHA1 MB is better than SHANI on Xeon processors */
+#define SUBMIT_JOB_SHA1     submit_job_sha1_avx2
+#define FLUSH_JOB_SHA1      flush_job_sha1_avx2
+#define SUBMIT_JOB_SHA224   submit_job_sha224_ni_sse
+#define FLUSH_JOB_SHA224    flush_job_sha224_ni_sse
+#define SUBMIT_JOB_SHA256   submit_job_sha256_ni_sse
+#define FLUSH_JOB_SHA256    flush_job_sha256_ni_sse
+#define SUBMIT_JOB_SHA384   submit_job_sha384_avx2
+#define FLUSH_JOB_SHA384    flush_job_sha384_avx2
+#define SUBMIT_JOB_SHA512   submit_job_sha512_avx2
+#define FLUSH_JOB_SHA512    flush_job_sha512_avx2
+
+/* HMAC-SHA1/224/256/384/512 */
+#define SUBMIT_JOB_HMAC               submit_job_hmac_avx2
+#define FLUSH_JOB_HMAC                flush_job_hmac_avx2
+#define SUBMIT_JOB_HMAC_SHA_224       submit_job_hmac_sha_224_ni_sse
+#define FLUSH_JOB_HMAC_SHA_224        flush_job_hmac_sha_224_ni_sse
+#define SUBMIT_JOB_HMAC_SHA_256       submit_job_hmac_sha_256_ni_sse
+#define FLUSH_JOB_HMAC_SHA_256        flush_job_hmac_sha_256_ni_sse
+#define SUBMIT_JOB_HMAC_SHA_384       submit_job_hmac_sha_384_avx2
+#define FLUSH_JOB_HMAC_SHA_384        flush_job_hmac_sha_384_avx2
+#define SUBMIT_JOB_HMAC_SHA_512       submit_job_hmac_sha_512_avx2
+#define FLUSH_JOB_HMAC_SHA_512        flush_job_hmac_sha_512_avx2
+#define SUBMIT_JOB_HMAC_MD5           submit_job_hmac_md5_avx2
+#define FLUSH_JOB_HMAC_MD5            flush_job_hmac_md5_avx2
+
+/* CHACHA20 & POLY1305 */
+#define SUBMIT_JOB_CHACHA20_ENC_DEC      submit_job_chacha20_enc_dec_avx2
+#define SUBMIT_JOB_CHACHA20_POLY1305     aead_chacha20_poly1305_avx2
+#define SUBMIT_JOB_CHACHA20_POLY1305_SGL aead_chacha20_poly1305_sgl_avx2
+#define POLY1305_MAC                     poly1305_mac_fma_avx2
+
+/* ZUC EEA3 & EIA3 */
+#define SUBMIT_JOB_ZUC_EEA3   submit_job_zuc_eea3_gfni_avx2
+#define FLUSH_JOB_ZUC_EEA3    flush_job_zuc_eea3_gfni_avx2
+#define SUBMIT_JOB_ZUC_EIA3   submit_job_zuc_eia3_gfni_avx2
+#define FLUSH_JOB_ZUC_EIA3    flush_job_zuc_eia3_gfni_avx2
+#define SUBMIT_JOB_ZUC256_EEA3   submit_job_zuc256_eea3_gfni_avx2
+#define FLUSH_JOB_ZUC256_EEA3    flush_job_zuc256_eea3_gfni_avx2
+#define SUBMIT_JOB_ZUC256_EIA3   submit_job_zuc256_eia3_gfni_avx2
+#define FLUSH_JOB_ZUC256_EIA3    flush_job_zuc256_eia3_gfni_avx2
+
+/* SNOW-V */
+#define SUBMIT_JOB_SNOW_V      snow_v_avx
+#define SUBMIT_JOB_SNOW_V_AEAD snow_v_aead_init_avx
+
+/* SNOW3G UE2 & UIA2 */
+static IMB_JOB *
+submit_snow3g_uea2_job_avx2_t2(IMB_MGR *state, IMB_JOB *job)
+{
+        MB_MGR_SNOW3G_OOO *snow3g_uea2_ooo = state->snow3g_uea2_ooo;
+
+        if ((job->msg_len_to_cipher_in_bits & 7) ||
+            (job->cipher_start_offset_in_bits & 7))
+                return def_submit_snow3g_uea2_job(state, job);
+
+        return submit_job_snow3g_uea2_sse(snow3g_uea2_ooo, job);
+}
+
+static IMB_JOB *
+flush_snow3g_uea2_job_avx2_t2(IMB_MGR *state)
+{
+        MB_MGR_SNOW3G_OOO *snow3g_uea2_ooo = state->snow3g_uea2_ooo;
+
+        return flush_job_snow3g_uea2_sse(snow3g_uea2_ooo);
+}
+
+#define SUBMIT_JOB_SNOW3G_UEA2 submit_snow3g_uea2_job_avx2_t2
+#define FLUSH_JOB_SNOW3G_UEA2  flush_snow3g_uea2_job_avx2_t2
+
+#define SUBMIT_JOB_SNOW3G_UIA2 submit_job_snow3g_uia2_sse
+#define FLUSH_JOB_SNOW3G_UIA2  flush_job_snow3g_uia2_sse
+
+/* AES-DOCSIS */
+#define ETHERNET_FCS ethernet_fcs_avx_local
+
+static void reset_ooo_mgrs(IMB_MGR *state)
+{
+        /* Init AES out-of-order fields */
+        ooo_mgr_aes_reset(state->aes128_ooo, 8);
+        ooo_mgr_aes_reset(state->aes192_ooo, 8);
+        ooo_mgr_aes_reset(state->aes256_ooo, 8);
+
+        /* DOCSIS SEC BPI (AES CBC + AES CFB for partial block)
+         * uses same settings as AES CBC.
+         */
+        ooo_mgr_docsis_aes_reset(state->docsis128_sec_ooo, 8);
+        ooo_mgr_docsis_aes_reset(state->docsis128_crc32_sec_ooo, 8);
+        ooo_mgr_docsis_aes_reset(state->docsis256_sec_ooo, 8);
+        ooo_mgr_docsis_aes_reset(state->docsis256_crc32_sec_ooo, 8);
+
+        /* Init ZUC out-of-order fields */
+        ooo_mgr_zuc_reset(state->zuc_eea3_ooo, 8);
+        ooo_mgr_zuc_reset(state->zuc_eia3_ooo, 8);
+        ooo_mgr_zuc_reset(state->zuc256_eea3_ooo, 8);
+        ooo_mgr_zuc_reset(state->zuc256_eia3_ooo, 8);
+
+        /* Init HMAC/SHA1 out-of-order fields */
+        ooo_mgr_hmac_sha1_reset(state->hmac_sha_1_ooo, AVX2_NUM_SHA1_LANES);
+
+        /* Init HMAC/SHA224 out-of-order fields */
+        ooo_mgr_hmac_sha224_reset(state->hmac_sha_224_ooo, 2);
+
+        /* Init HMAC/SHA_256 out-of-order fields */
+        ooo_mgr_hmac_sha256_reset(state->hmac_sha_256_ooo, 2);
+
+        /* Init HMAC/SHA384 out-of-order fields */
+        ooo_mgr_hmac_sha384_reset(state->hmac_sha_384_ooo,
+                                  AVX2_NUM_SHA512_LANES);
+
+        /* Init HMAC/SHA512 out-of-order fields */
+        ooo_mgr_hmac_sha512_reset(state->hmac_sha_512_ooo,
+                                  AVX2_NUM_SHA512_LANES);
+
+        /* Init HMAC/MD5 out-of-order fields */
+        ooo_mgr_hmac_md5_reset(state->hmac_md5_ooo, AVX2_NUM_MD5_LANES);
+
+        /* Init AES/XCBC OOO fields */
+        ooo_mgr_aes_xcbc_reset(state->aes_xcbc_ooo, 8);
+
+        /* Init AES-CCM auth out-of-order fields */
+        ooo_mgr_ccm_reset(state->aes_ccm_ooo, 8);
+        ooo_mgr_ccm_reset(state->aes256_ccm_ooo, 8);
+
+        /* Init AES-CMAC auth out-of-order fields */
+        ooo_mgr_cmac_reset(state->aes_cmac_ooo, 8);
+        ooo_mgr_cmac_reset(state->aes256_cmac_ooo, 8);
+
+        /* Init AES CBC-S out-of-order fields */
+        ooo_mgr_aes_reset(state->aes128_cbcs_ooo, 8);
+
+        /* Init SHA1 out-of-order fields */
+        ooo_mgr_sha1_reset(state->sha_1_ooo, AVX2_NUM_SHA1_LANES);
+
+        /* Init SHA224 out-of-order fields */
+        ooo_mgr_sha256_reset(state->sha_224_ooo, 2);
+
+        /* Init SHA256 out-of-order fields */
+        ooo_mgr_sha256_reset(state->sha_256_ooo, 2);
+
+        /* Init SHA384 out-of-order fields */
+        ooo_mgr_sha512_reset(state->sha_384_ooo, AVX2_NUM_SHA512_LANES);
+
+        /* Init SHA512 out-of-order fields */
+        ooo_mgr_sha512_reset(state->sha_512_ooo, AVX2_NUM_SHA512_LANES);
+
+        /* Init SNOW3G-UEA out-of-order fields */
+        ooo_mgr_snow3g_reset(state->snow3g_uea2_ooo, 4);
+
+        /* Init SNOW3G-UIA out-of-order fields */
+        ooo_mgr_snow3g_reset(state->snow3g_uia2_ooo, 4);
+}
+
+IMB_DLL_LOCAL void
+init_mb_mgr_avx2_t3_internal(IMB_MGR *state, const int reset_mgrs)
+{
+        /* Check if CPU flags needed for AVX2 interface are present */
+        if ((state->features & IMB_CPUFLAGS_AVX2) != IMB_CPUFLAGS_AVX2) {
+                imb_set_errno(state, IMB_ERR_MISSING_CPUFLAGS_INIT_MGR);
+                return;
+        }
+
+        /* Set architecture for future checks */
+        state->used_arch = (uint32_t) IMB_ARCH_AVX2;
+
+        if (reset_mgrs) {
+                reset_ooo_mgrs(state);
+
+                /* Init "in order" components */
+                state->next_job = 0;
+                state->earliest_job = -1;
+        }
+
+        /* set handlers */
+        state->get_next_job        = GET_NEXT_JOB;
+        state->submit_job          = SUBMIT_JOB;
+        state->submit_job_nocheck  = SUBMIT_JOB_NOCHECK;
+        state->get_completed_job   = GET_COMPLETED_JOB;
+        state->flush_job           = FLUSH_JOB;
+        state->queue_size          = QUEUE_SIZE;
+        state->get_next_burst      = GET_NEXT_BURST;
+        state->submit_burst        = SUBMIT_BURST;
+        state->submit_burst_nocheck= SUBMIT_BURST_NOCHECK;
+        state->flush_burst         = FLUSH_BURST;
+        state->submit_cipher_burst = SUBMIT_CIPHER_BURST;
+        state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
+        state->submit_hash_burst   = SUBMIT_HASH_BURST;
+        state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+
+        state->keyexp_128          = aes_keyexp_128_avx2;
+        state->keyexp_192          = aes_keyexp_192_avx2;
+        state->keyexp_256          = aes_keyexp_256_avx2;
+
+        state->cmac_subkey_gen_128 = aes_cmac_subkey_gen_avx2;
+        state->cmac_subkey_gen_256 = aes_cmac_256_subkey_gen_avx2;
+
+        state->xcbc_keyexp         = aes_xcbc_expand_key_avx2;
+        state->des_key_sched       = des_key_schedule;
+
+        state->sha1_one_block      = sha1_one_block_avx2;
+        state->sha1                = sha1_avx2;
+        state->sha224_one_block    = sha224_one_block_avx2;
+        state->sha224              = sha224_avx2;
+        state->sha256_one_block    = sha256_one_block_avx2;
+        state->sha256              = sha256_avx2;
+        state->sha384_one_block    = sha384_one_block_avx2;
+        state->sha384              = sha384_avx2;
+        state->sha512_one_block    = sha512_one_block_avx2;
+        state->sha512              = sha512_avx2;
+        state->md5_one_block       = md5_one_block_avx2;
+
+        state->aes128_cfb_one      = aes_cfb_128_one_avx2;
+
+        state->eea3_1_buffer       = zuc_eea3_1_buffer_avx2;
+        state->eea3_4_buffer       = zuc_eea3_4_buffer_avx;
+        state->eea3_n_buffer       = zuc_eea3_n_buffer_avx2;
+        state->eia3_1_buffer       = zuc_eia3_1_buffer_avx2;
+        state->eia3_n_buffer       = zuc_eia3_n_buffer_avx2;
+
+        state->f8_1_buffer         = kasumi_f8_1_buffer_avx;
+        state->f8_1_buffer_bit     = kasumi_f8_1_buffer_bit_avx;
+        state->f8_2_buffer         = kasumi_f8_2_buffer_avx;
+        state->f8_3_buffer         = kasumi_f8_3_buffer_avx;
+        state->f8_4_buffer         = kasumi_f8_4_buffer_avx;
+        state->f8_n_buffer         = kasumi_f8_n_buffer_avx;
+        state->f9_1_buffer         = kasumi_f9_1_buffer_avx;
+        state->f9_1_buffer_user    = kasumi_f9_1_buffer_user_avx;
+        state->kasumi_init_f8_key_sched = kasumi_init_f8_key_sched_avx;
+        state->kasumi_init_f9_key_sched = kasumi_init_f9_key_sched_avx;
+        state->kasumi_key_sched_size = kasumi_key_sched_size_avx;
+
+        state->snow3g_f8_1_buffer_bit = snow3g_f8_1_buffer_bit_avx2;
+        state->snow3g_f8_1_buffer  = snow3g_f8_1_buffer_avx2;
+        state->snow3g_f8_2_buffer  = snow3g_f8_2_buffer_avx2;
+        state->snow3g_f8_4_buffer  = snow3g_f8_4_buffer_avx2;
+        state->snow3g_f8_8_buffer  = snow3g_f8_8_buffer_avx2;
+        state->snow3g_f8_n_buffer  = snow3g_f8_n_buffer_avx2;
+        state->snow3g_f8_8_buffer_multikey = snow3g_f8_8_buffer_multikey_avx2;
+        state->snow3g_f8_n_buffer_multikey = snow3g_f8_n_buffer_multikey_avx2;
+        state->snow3g_f9_1_buffer = snow3g_f9_1_buffer_avx2;
+        state->snow3g_init_key_sched = snow3g_init_key_sched_avx2;
+        state->snow3g_key_sched_size = snow3g_key_sched_size_avx2;
+
+        state->hec_32              = hec_32_avx;
+        state->hec_64              = hec_64_avx;
+
+        state->crc32_ethernet_fcs  = ethernet_fcs_avx;
+        state->crc16_x25           = crc16_x25_avx;
+        state->crc32_sctp          = crc32_sctp_avx;
+        state->crc24_lte_a         = crc24_lte_a_avx;
+        state->crc24_lte_b         = crc24_lte_b_avx;
+        state->crc16_fp_data       = crc16_fp_data_avx;
+        state->crc11_fp_header     = crc11_fp_header_avx;
+        state->crc7_fp_header      = crc7_fp_header_avx;
+        state->crc10_iuup_data     = crc10_iuup_data_avx;
+        state->crc6_iuup_header    = crc6_iuup_header_avx;
+        state->crc32_wimax_ofdma_data = crc32_wimax_ofdma_data_avx;
+        state->crc8_wimax_ofdma_hcs = crc8_wimax_ofdma_hcs_avx;
+
+        state->chacha20_poly1305_init = init_chacha20_poly1305_fma_avx2;
+        state->chacha20_poly1305_enc_update = update_enc_chacha20_poly1305_fma_avx2;
+        state->chacha20_poly1305_dec_update = update_dec_chacha20_poly1305_fma_avx2;
+        state->chacha20_poly1305_finalize = finalize_chacha20_poly1305_fma_avx2;
+
+        state->gcm128_enc          = aes_gcm_enc_128_avx_gen4;
+        state->gcm192_enc          = aes_gcm_enc_192_avx_gen4;
+        state->gcm256_enc          = aes_gcm_enc_256_avx_gen4;
+        state->gcm128_dec          = aes_gcm_dec_128_avx_gen4;
+        state->gcm192_dec          = aes_gcm_dec_192_avx_gen4;
+        state->gcm256_dec          = aes_gcm_dec_256_avx_gen4;
+        state->gcm128_init         = aes_gcm_init_128_avx_gen4;
+        state->gcm192_init         = aes_gcm_init_192_avx_gen4;
+        state->gcm256_init         = aes_gcm_init_256_avx_gen4;
+        state->gcm128_init_var_iv  = aes_gcm_init_var_iv_128_avx_gen4;
+        state->gcm192_init_var_iv  = aes_gcm_init_var_iv_192_avx_gen4;
+        state->gcm256_init_var_iv  = aes_gcm_init_var_iv_256_avx_gen4;
+        state->gcm128_enc_update   = aes_gcm_enc_128_update_avx_gen4;
+        state->gcm192_enc_update   = aes_gcm_enc_192_update_avx_gen4;
+        state->gcm256_enc_update   = aes_gcm_enc_256_update_avx_gen4;
+        state->gcm128_dec_update   = aes_gcm_dec_128_update_avx_gen4;
+        state->gcm192_dec_update   = aes_gcm_dec_192_update_avx_gen4;
+        state->gcm256_dec_update   = aes_gcm_dec_256_update_avx_gen4;
+        state->gcm128_enc_finalize = aes_gcm_enc_128_finalize_avx_gen4;
+        state->gcm192_enc_finalize = aes_gcm_enc_192_finalize_avx_gen4;
+        state->gcm256_enc_finalize = aes_gcm_enc_256_finalize_avx_gen4;
+        state->gcm128_dec_finalize = aes_gcm_dec_128_finalize_avx_gen4;
+        state->gcm192_dec_finalize = aes_gcm_dec_192_finalize_avx_gen4;
+        state->gcm256_dec_finalize = aes_gcm_dec_256_finalize_avx_gen4;
+        state->gcm128_precomp      = aes_gcm_precomp_128_avx_gen4;
+        state->gcm192_precomp      = aes_gcm_precomp_192_avx_gen4;
+        state->gcm256_precomp      = aes_gcm_precomp_256_avx_gen4;
+        state->gcm128_pre          = aes_gcm_pre_128_avx_gen4;
+        state->gcm192_pre          = aes_gcm_pre_192_avx_gen4;
+        state->gcm256_pre          = aes_gcm_pre_256_avx_gen4;
+
+        state->ghash               = ghash_avx_gen4;
+        state->ghash_pre           = ghash_pre_avx_gen2;
+
+        state->gmac128_init        = imb_aes_gmac_init_128_avx_gen4;
+        state->gmac192_init        = imb_aes_gmac_init_192_avx_gen4;
+        state->gmac256_init        = imb_aes_gmac_init_256_avx_gen4;
+        state->gmac128_update      = imb_aes_gmac_update_128_avx_gen4;
+        state->gmac192_update      = imb_aes_gmac_update_192_avx_gen4;
+        state->gmac256_update      = imb_aes_gmac_update_256_avx_gen4;
+        state->gmac128_finalize    = imb_aes_gmac_finalize_128_avx_gen4;
+        state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen4;
+        state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen4;
+}
+
+#include "mb_mgr_code.h"
diff --git a/lib/avx2_t3/poly_fma_avx2.asm b/lib/avx2_t3/poly_fma_avx2.asm
new file mode 100644
index 00000000..059757a6
--- /dev/null
+++ b/lib/avx2_t3/poly_fma_avx2.asm
@@ -0,0 +1,1238 @@
+;;
+;; Copyright (c) 2023, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+
+%include "include/os.inc"
+%include "include/reg_sizes.inc"
+%include "include/memcpy.inc"
+%include "include/imb_job.inc"
+%include "include/clear_regs.inc"
+%include "include/cet.inc"
+
+;; Enforce VEX encoding for AVX2 capable systems
+%xdefine vpmadd52luq {vex3}vpmadd52luq
+%xdefine vpmadd52huq {vex3}vpmadd52huq
+
+[bits 64]
+default rel
+
+align 32
+mask_44:
+dq      0xfffffffffff, 0xfffffffffff, 0xfffffffffff, 0xfffffffffff
+
+align 32
+mask_42:
+dq      0x3ffffffffff, 0x3ffffffffff, 0x3ffffffffff, 0x3ffffffffff
+
+align 32
+high_bit:
+dq      0x10000000000, 0x10000000000, 0x10000000000, 0x10000000000
+
+align 16
+pad16_bit:
+dq      0x01, 0x0
+dq      0x0100, 0x0
+dq      0x010000, 0x0
+dq      0x01000000, 0x0
+dq      0x0100000000, 0x0
+dq      0x010000000000, 0x0
+dq      0x01000000000000, 0x0
+dq      0x0100000000000000, 0x0
+dq      0x0, 0x01
+dq      0x0, 0x0100
+dq      0x0, 0x010000
+dq      0x0, 0x01000000
+dq      0x0, 0x0100000000
+dq      0x0, 0x010000000000
+dq      0x0, 0x01000000000000
+dq      0x0, 0x0100000000000000
+
+%ifdef LINUX
+%define arg1    rdi
+%define arg2    rsi
+%define arg3    rdx
+%define arg4    rcx
+
+%define job     arg1
+%define gp1     rsi
+%define gp2     rcx
+
+%else
+%define arg1    rcx
+%define arg2    rdx
+%define arg3    r8
+%define arg4    r9
+
+%define job     rdi
+%define gp1     rcx     ;; 'arg1' copied to 'job' at start
+%define gp2     rsi
+%endif
+
+;; don't use rdx and rax - they are needed for multiply operation
+%define gp3     rbp
+%define gp4     r8
+%define gp5     r9
+%define gp6     r10
+%define gp7     r11
+%define gp8     r12
+%define gp9     r13
+%define gp10    r14
+%define gp11    r15
+
+%xdefine len    gp11
+%xdefine msg    gp10
+
+%define POLY1305_BLOCK_SIZE 16
+
+%define APPEND(a,b) a %+ b
+
+struc STACKFRAME
+_r4_r1_save:    resy    3  ; Memory to save limbs of powers of R
+_r4_save:       resy    3  ; Memory to save limbs of powers of R
+_r4p_save:      resy    2  ; Memory to save limbs of powers of R
+_gpr_save:      resq    8  ; Memory to save GP registers
+_xmm_save:      reso    10 ; Memory to save XMM registers
+_rsp_save:      resq    1  ; Memory to save RSP
+endstruc
+
+mksection .text
+
+;; =============================================================================
+;; =============================================================================
+;; Initializes POLY1305 context structure
+;; =============================================================================
+%macro POLY1305_INIT 6
+%define %%KEY %1        ; [in] pointer to 32-byte key
+%define %%A0  %2        ; [out] GPR with accumulator bits 63..0
+%define %%A1  %3        ; [out] GPR with accumulator bits 127..64
+%define %%A2  %4        ; [out] GPR with accumulator bits 195..128
+%define %%R0  %5        ; [out] GPR with R constant bits 63..0
+%define %%R1  %6        ; [out] GPR with R constant bits 127..64
+
+        ;; R = KEY[0..15] & 0xffffffc0ffffffc0ffffffc0fffffff
+        mov     %%R0, 0x0ffffffc0fffffff
+        and     %%R0, [%%KEY + (0 * 8)]
+
+        mov     %%R1, 0x0ffffffc0ffffffc
+        and     %%R1, [%%KEY + (1 * 8)]
+
+        ;; set accumulator to 0
+        xor     %%A0, %%A0
+        xor     %%A1, %%A1
+        xor     %%A2, %%A2
+%endmacro
+
+;; =============================================================================
+;; =============================================================================
+;; Computes hash for message length being multiple of block size
+;; =============================================================================
+%macro POLY1305_MUL_REDUCE 11-12
+%define %%A0      %1    ; [in/out] GPR with accumulator bits 63:0
+%define %%A1      %2    ; [in/out] GPR with accumulator bits 127:64
+%define %%A2      %3    ; [in/out] GPR with accumulator bits 195:128
+%define %%R0      %4    ; [in] GPR with R constant bits 63:0
+%define %%R1      %5    ; [in] GPR with R constant bits 127:64
+%define %%C1      %6    ; [in] C1 = R1 + (R1 >> 2)
+%define %%T1      %7    ; [clobbered] GPR register
+%define %%T2      %8    ; [clobbered] GPR register
+%define %%T3      %9    ; [clobbered] GPR register
+%define %%GP_RAX  %10   ; [clobbered] RAX register
+%define %%GP_RDX  %11   ; [clobbered] RDX register
+%define %%ONLY128 %12   ; [in] Used if input A2 is 0
+
+        ;; Combining 64-bit x 64-bit multiplication with reduction steps
+        ;;
+        ;; NOTES:
+        ;;   1) A2 here is only two bits so anything above is subject of reduction.
+        ;;      Constant C1 = R1 + (R1 >> 2) simplifies multiply with less operations
+        ;;   2) Magic 5x comes from mod 2^130-5 property and incorporating
+        ;;      reduction into multiply phase.
+        ;;      See "Cheating at modular arithmetic" and "Poly1305's prime: 2^130 - 5"
+        ;;      paragraphs at https://loup-vaillant.fr/tutorials/poly1305-design for more details.
+        ;;
+        ;; Flow of the code below is as follows:
+        ;;
+        ;;          A2        A1        A0
+        ;;        x           R1        R0
+        ;;   -----------------------------
+        ;;       A2×R0     A1×R0     A0×R0
+        ;;   +             A0×R1
+        ;;   +           5xA2xR1   5xA1xR1
+        ;;   -----------------------------
+        ;;     [0|L2L] [L1H|L1L] [L0H|L0L]
+        ;;
+        ;;   Registers:  T3:T2     T1:A0
+        ;;
+        ;; Completing the multiply and adding (with carry) 3x128-bit limbs into
+        ;; 192-bits again (3x64-bits):
+        ;; A0 = L0L
+        ;; A1 = L0H + L1L
+        ;; T3 = L1H + L2L
+
+        ;; T3:T2 = (A0 * R1)
+        mov     %%GP_RAX, %%R1
+        mul     %%A0
+        mov     %%T2, %%GP_RAX
+        mov     %%GP_RAX, %%R0
+        mov     %%T3, %%GP_RDX
+
+        ;; T1:A0 = (A0 * R0)
+        mul     %%A0
+        mov     %%A0, %%GP_RAX  ;; A0 not used in other operations
+        mov     %%GP_RAX, %%R0
+        mov     %%T1, %%GP_RDX
+
+        ;; T3:T2 += (A1 * R0)
+        mul     %%A1
+        add     %%T2, %%GP_RAX
+        mov     %%GP_RAX, %%C1
+        adc     %%T3, %%GP_RDX
+
+        ;; T1:A0 += (A1 * R1x5)
+        mul     %%A1
+%if %0 == 11
+        mov     %%A1, %%A2      ;; use A1 for A2
+%endif
+        add     %%A0, %%GP_RAX
+        adc     %%T1, %%GP_RDX
+
+        ;; NOTE: A2 is clamped to 2-bits,
+        ;;       R1/R0 is clamped to 60-bits,
+        ;;       their product is less than 2^64.
+
+%if %0 == 11
+        ;; T3:T2 += (A2 * R1x5)
+        imul    %%A1, %%C1
+        add     %%T2, %%A1
+        mov     %%A1, %%T1 ;; T1:A0 => A1:A0
+        adc     %%T3, 0
+
+        ;; T3:A1 += (A2 * R0)
+        imul    %%A2, %%R0
+        add     %%A1, %%T2
+        adc     %%T3, %%A2
+        ;; If A2 == 0, just move and add T1-T2 to A1
+%else
+        mov     %%A1, %%T1
+        add     %%A1, %%T2
+        adc     %%T3, 0
+%endif
+
+        ;; At this point, 3 64-bit limbs are in T3:A1:A0
+        ;; T3 can span over more than 2 bits so final partial reduction step is needed.
+        ;;
+        ;; Partial reduction (just to fit into 130 bits)
+        ;;    A2 = T3 & 3
+        ;;    k = (T3 & ~3) + (T3 >> 2)
+        ;;         Y    x4  +  Y    x1
+        ;;    A2:A1:A0 += k
+        ;;
+        ;; Result will be in A2:A1:A0
+        mov     %%T1, %%T3
+        mov     DWORD(%%A2), DWORD(%%T3)
+        and     %%T1, ~3
+        shr     %%T3, 2
+        and     DWORD(%%A2), 3
+        add     %%T1, %%T3
+
+        ;; A2:A1:A0 += k (kept in T1)
+        add     %%A0, %%T1
+        adc     %%A1, 0
+        adc     DWORD(%%A2), 0
+%endmacro
+
+;; =============================================================================
+;; =============================================================================
+;; Computes hash for 4 16-byte message blocks,
+;; and adds new message blocks to accumulator.
+;;
+;; It first multiplies all 4 blocks with powers of R:
+;;
+;;      a2      a1      a0
+;; ×    b2      b1      b0
+;; ---------------------------------------
+;;     a2×b0   a1×b0   a0×b0
+;; +   a1×b1   a0×b1 5×a2×b1
+;; +   a0×b2 5×a2×b2 5×a1×b2
+;; ---------------------------------------
+;;        p2      p1      p0
+;;
+;; Then, it propagates the carry (higher bits after bit 43) from lower limbs into higher limbs,
+;; multiplying by 5 in case of the carry of p2.
+;;
+%macro POLY1305_MUL_REDUCE_VEC 15
+%define %%A0      %1  ; [in/out] YMM register containing 1st 44-bit limb of the 4 blocks
+%define %%A1      %2  ; [in/out] YMM register containing 2nd 44-bit limb of the 4 blocks
+%define %%A2      %3  ; [in/out] YMM register containing 3rd 44-bit limb of the 4 blocks
+%define %%R0      %4  ; [in] YMM register (R0) to include the 1st limb of R
+%define %%R1      %5  ; [in] YMM register (R1) to include the 2nd limb of R
+%define %%R2      %6  ; [in] YMM register (R2) to include the 3rd limb of R
+%define %%R1P     %7  ; [in] YMM register (R1') to include the 2nd limb of R (multiplied by 5)
+%define %%R2P     %8  ; [in] YMM register (R2') to include the 3rd limb of R (multiplied by 5)
+%define %%P0_L    %9  ; [clobbered] YMM register to contain p[0] of the 4 blocks
+%define %%P0_H    %10 ; [clobbered] YMM register to contain p[0] of the 4 blocks
+%define %%P1_L    %11 ; [clobbered] YMM register to contain p[1] of the 4 blocks
+%define %%P1_H    %12 ; [clobbered] YMM register to contain p[1] of the 4 blocks
+%define %%P2_L    %13 ; [clobbered] YMM register to contain p[2] of the 4 blocks
+%define %%P2_H    %14 ; [clobbered] YMM register to contain p[2] of the 4 blocks
+%define %%YTMP1   %15 ; [clobbered] Temporary YMM register
+
+        ;; Reset accumulator
+        vpxor   %%P0_L, %%P0_L
+        vpxor   %%P0_H, %%P0_H
+        vpxor   %%P1_L, %%P1_L
+        vpxor   %%P1_H, %%P1_H
+        vpxor   %%P2_L, %%P2_L
+        vpxor   %%P2_H, %%P2_H
+
+        ; Reset accumulator and calculate products
+        vpmadd52luq %%P0_L, %%A2, %%R1P
+        vpmadd52huq %%P0_H, %%A2, %%R1P
+        vpmadd52luq %%P1_L, %%A2, %%R2P
+        vpmadd52huq %%P1_H, %%A2, %%R2P
+        vpmadd52luq %%P2_L, %%A2, %%R0
+        vpmadd52huq %%P2_H, %%A2, %%R0
+
+        vpmadd52luq %%P1_L, %%A0, %%R1
+        vpmadd52huq %%P1_H, %%A0, %%R1
+        vpmadd52luq %%P2_L, %%A0, %%R2
+        vpmadd52huq %%P2_H, %%A0, %%R2
+        vpmadd52luq %%P0_L, %%A0, %%R0
+        vpmadd52huq %%P0_H, %%A0, %%R0
+
+        vpmadd52luq %%P0_L, %%A1, %%R2P
+        vpmadd52huq %%P0_H, %%A1, %%R2P
+        vpmadd52luq %%P1_L, %%A1, %%R0
+        vpmadd52huq %%P1_H, %%A1, %%R0
+        vpmadd52luq %%P2_L, %%A1, %%R1
+        vpmadd52huq %%P2_H, %%A1, %%R1
+
+        ; Carry propagation (first pass)
+        vpsrlq  %%YTMP1, %%P0_L, 44
+        vpand   %%A0, %%P0_L, [rel mask_44] ; Clear top 20 bits
+        vpsllq  %%P0_H, 8
+        vpaddq  %%P0_H, %%YTMP1
+        vpaddq  %%P1_L, %%P0_H
+        vpand   %%A1, %%P1_L, [rel mask_44] ; Clear top 20 bits
+        vpsrlq  %%YTMP1, %%P1_L, 44
+        vpsllq  %%P1_H, 8
+        vpaddq  %%P1_H, %%YTMP1
+        vpaddq  %%P2_L, %%P1_H
+        vpand   %%A2, %%P2_L, [rel mask_42] ; Clear top 22 bits
+        vpsrlq  %%YTMP1, %%P2_L, 42
+        vpsllq  %%P2_H, 10
+        vpaddq  %%P2_H, %%YTMP1
+
+        ; Carry propagation (second pass)
+
+        ; Multiply by 5 the highest bits (above 130 bits)
+        vpaddq  %%A0, %%P2_H
+        vpsllq  %%P2_H, 2
+        vpaddq  %%A0, %%P2_H
+        vpsrlq  %%YTMP1, %%A0, 44
+        vpand   %%A0, [rel mask_44]
+        vpaddq  %%A1, %%YTMP1
+%endmacro
+
+;; =============================================================================
+;; =============================================================================
+;; Computes hash for 4 16-byte message blocks,
+;; and adds new message blocks to accumulator,
+;; interleaving this computation with the loading and splatting
+;; of new data.
+;;
+;; It first multiplies all 4 blocks with powers of R
+;;
+;;      a2      a1      a0
+;; ×    b2      b1      b0
+;; ---------------------------------------
+;;     a2×b0   a1×b0   a0×b0
+;; +   a1×b1   a0×b1 5×a2×b1
+;; +   a0×b2 5×a2×b2 5×a1×b2
+;; ---------------------------------------
+;;        p2      p1      p0
+;;
+;; Then, it propagates the carry (higher bits after bit 43)
+;; from lower limbs into higher limbs,
+;; multiplying by 5 in case of the carry of p2, and adds
+;; the results to A0-A2 and B0-B2.
+;;
+;; =============================================================================
+%macro POLY1305_MSG_MUL_REDUCE_VEC4 22
+%define %%A0      %1  ; [in/out] YMM register containing 1st 44-bit limb of blocks 1-4
+%define %%A1      %2  ; [in/out] YMM register containing 2nd 44-bit limb of blocks 1-4
+%define %%A2      %3  ; [in/out] YMM register containing 3rd 44-bit limb of blocks 1-4
+%define %%R0      %4  ; [in] YMM register/memory (R0) to include the 1st limb of R
+%define %%R1      %5  ; [in] YMM register/memory (R1) to include the 2nd limb of R
+%define %%R2      %6  ; [in] YMM register/memory (R2) to include the 3rd limb of R
+%define %%R1P     %7  ; [in] YMM register/memory (R1') to include the 2nd limb of R (multiplied by 5)
+%define %%R2P     %8  ; [in] YMM register/memory (R2') to include the 3rd limb of R (multiplied by 5)
+%define %%P0_L    %9  ; [clobbered] YMM register to contain p[0] of the 4 blocks 1-4
+%define %%P0_H    %10 ; [clobbered] YMM register to contain p[0] of the 4 blocks 1-4
+%define %%P1_L    %11 ; [clobbered] YMM register to contain p[1] of the 4 blocks 1-4
+%define %%P1_H    %12 ; [clobbered] YMM register to contain p[1] of the 4 blocks 1-4
+%define %%P2_L    %13 ; [clobbered] YMM register to contain p[2] of the 4 blocks 1-4
+%define %%P2_H    %14 ; [clobbered] YMM register to contain p[2] of the 4 blocks 1-4
+%define %%YTMP1   %15 ; [clobbered] Temporary YMM register
+%define %%YTMP2   %16 ; [clobbered] Temporary YMM register
+%define %%YTMP3   %17 ; [clobbered] Temporary YMM register
+%define %%YTMP4   %18 ; [clobbered] Temporary YMM register
+%define %%YTMP5   %19 ; [clobbered] Temporary YMM register
+%define %%YTMP6   %20 ; [clobbered] Temporary YMM register
+%define %%MSG     %21 ; [in/out] Pointer to message
+%define %%LEN     %22 ; [in/out] Length left of message
+
+        ;; Reset accumulator
+        vpxor   %%P0_L, %%P0_L
+        vpxor   %%P0_H, %%P0_H
+        vpxor   %%P1_L, %%P1_L
+        vpxor   %%P1_H, %%P1_H
+        vpxor   %%P2_L, %%P2_L
+        vpxor   %%P2_H, %%P2_H
+
+        ;; This code interleaves hash computation with input loading/splatting
+
+                ; Calculate products
+                vpmadd52luq %%P0_L, %%A2, %%R1P
+                vpmadd52huq %%P0_H, %%A2, %%R1P
+        ;; input loading of new blocks
+        add     %%MSG, POLY1305_BLOCK_SIZE*4
+        sub     %%LEN, POLY1305_BLOCK_SIZE*4
+
+                vpmadd52luq %%P1_L, %%A2, %%R2P
+                vpmadd52huq %%P1_H, %%A2, %%R2P
+        ; Load next block of data (64 bytes)
+        vmovdqu   %%YTMP1, [%%MSG]
+        vmovdqu   %%YTMP2, [%%MSG + 32]
+
+        ; Interleave new blocks of data
+        vpunpckhqdq %%YTMP3, %%YTMP1, %%YTMP2
+        vpunpcklqdq %%YTMP1, %%YTMP1, %%YTMP2
+
+                vpmadd52luq %%P0_L, %%A0, %%R0
+                vpmadd52huq %%P0_H, %%A0, %%R0
+        ; Highest 42-bit limbs of new blocks
+        vpsrlq  %%YTMP6, %%YTMP3, 24
+        vpor    %%YTMP6, [rel high_bit] ; Add 2^128 to all 4 final qwords of the message
+
+        ; Middle 44-bit limbs of new blocks
+        vpsrlq  %%YTMP2, %%YTMP1, 44
+        vpsllq  %%YTMP4, %%YTMP3, 20
+
+                vpmadd52luq %%P2_L, %%A2, %%R0
+                vpmadd52huq %%P2_H, %%A2, %%R0
+        vpor    %%YTMP2, %%YTMP4
+        vpand   %%YTMP2, [rel mask_44]
+
+        ; Lowest 44-bit limbs of new blocks
+        vpand   %%YTMP1, [rel mask_44]
+
+                vpmadd52luq %%P1_L, %%A0, %%R1
+                vpmadd52huq %%P1_H, %%A0, %%R1
+
+                vpmadd52luq %%P0_L, %%A1, %%R2P
+                vpmadd52huq %%P0_H, %%A1, %%R2P
+
+                vpmadd52luq %%P2_L, %%A0, %%R2
+                vpmadd52huq %%P2_H, %%A0, %%R2
+        ; Carry propagation (first pass)
+        vpsrlq  %%YTMP5, %%P0_L, 44
+        vpsllq  %%P0_H, 8
+
+                vpmadd52luq %%P1_L, %%A1, %%R0
+                vpmadd52huq %%P1_H, %%A1, %%R0
+        ; Carry propagation (first pass) - continue
+        vpand   %%A0, %%P0_L, [rel mask_44] ; Clear top 20 bits
+        vpaddq  %%P0_H, %%YTMP5
+
+                vpmadd52luq %%P2_L, %%A1, %%R1
+                vpmadd52huq %%P2_H, %%A1, %%R1
+        ; Carry propagation (first pass) - continue
+        vpaddq  %%P1_L, %%P0_H
+        vpsllq  %%P1_H, 8
+        vpsrlq  %%YTMP5, %%P1_L, 44
+        vpand   %%A1, %%P1_L, [rel mask_44] ; Clear top 20 bits
+
+        vpaddq  %%P2_L, %%P1_H          ; P2_L += P1_H + P1_L[63:44]
+        vpaddq  %%P2_L, %%YTMP5
+        vpand   %%A2, %%P2_L, [rel mask_42] ; Clear top 22 bits
+        vpaddq  %%A2, %%YTMP6 ; Add highest bits from new blocks to accumulator
+        vpsrlq  %%YTMP5, %%P2_L, 42
+        vpsllq  %%P2_H, 10
+        vpaddq  %%P2_H, %%YTMP5
+
+        ; Carry propagation (second pass)
+        ; Multiply by 5 the highest bits (above 130 bits)
+        vpaddq  %%A0, %%P2_H
+        vpsllq  %%P2_H, 2
+        vpaddq  %%A0, %%P2_H
+
+        vpsrlq  %%YTMP5, %%A0, 44
+        vpand   %%A0, [rel mask_44]
+        vpaddq  %%A0, %%YTMP1 ; Add low 42-bit bits from new blocks to accumulator
+        vpaddq  %%A1, %%YTMP2 ; Add medium 42-bit bits from new blocks to accumulator
+        vpaddq  %%A1, %%YTMP5
+%endmacro
+
+;; =============================================================================
+;; =============================================================================
+;; Computes hash for 4 16-byte message blocks.
+;;
+;; It first multiplies all 4 blocks with powers of R (4 blocks from A0-A2
+;; multiplied by R0-R2)
+;;
+;;
+;;      a2      a1      a0
+;; ×    b2      b1      b0
+;; ---------------------------------------
+;;     a2×b0   a1×b0   a0×b0
+;; +   a1×b1   a0×b1 5×a2×b1
+;; +   a0×b2 5×a2×b2 5×a1×b2
+;; ---------------------------------------
+;;        p2      p1      p0
+;;
+;; Then, it propagates the carry (higher bits after bit 43) from lower limbs into higher limbs,
+;; multiplying by 5 in case of the carry of p2.
+;;
+;; =============================================================================
+%macro POLY1305_MUL_REDUCE_VEC4 16
+%define %%A0      %1  ; [in/out] YMM register containing 1st 44-bit limb of the 4 blocks
+%define %%A1      %2  ; [in/out] YMM register containing 2nd 44-bit limb of the 4 blocks
+%define %%A2      %3  ; [in/out] YMM register containing 3rd 44-bit limb of the 4 blocks
+%define %%R0      %4  ; [in] YMM register (R0) to include the 1st limb in IDX
+%define %%R1      %5  ; [in] YMM register (R1) to include the 2nd limb in IDX
+%define %%R2      %6  ; [in] YMM register (R2) to include the 3rd limb in IDX
+%define %%R1P     %7  ; [in] YMM register (R1') to include the 2nd limb (multiplied by 5) in IDX
+%define %%R2P     %8  ; [in] YMM register (R2') to include the 3rd limb (multiplied by 5) in IDX
+%define %%P0_L    %9  ; [clobbered] YMM register to contain p[0] of the 4 blocks
+%define %%P0_H    %10 ; [clobbered] YMM register to contain p[0] of the 4 blocks
+%define %%P1_L    %11 ; [clobbered] YMM register to contain p[1] of the 4 blocks
+%define %%P1_H    %12 ; [clobbered] YMM register to contain p[1] of the 4 blocks
+%define %%P2_L    %13 ; [clobbered] YMM register to contain p[2] of the 4 blocks
+%define %%P2_H    %14 ; [clobbered] YMM register to contain p[2] of the 4 blocks
+%define %%YTMP1   %15 ; [clobbered] Temporary YMM register
+%define %%YTMP2   %16 ; [clobbered] Temporary YMM register
+
+        ;; Reset accumulator
+        vpxor   %%P0_L, %%P0_L
+        vpxor   %%P0_H, %%P0_H
+        vpxor   %%P1_L, %%P1_L
+        vpxor   %%P1_H, %%P1_H
+        vpxor   %%P2_L, %%P2_L
+        vpxor   %%P2_H, %%P2_H
+
+        ;; This code interleaves hash computation with input loading/splatting
+
+        ; Calculate products
+        vpmadd52luq %%P0_L, %%A2, %%R1P
+        vpmadd52huq %%P0_H, %%A2, %%R1P
+
+        vpmadd52luq %%P1_L, %%A2, %%R2P
+        vpmadd52huq %%P1_H, %%A2, %%R2P
+
+        vpmadd52luq %%P0_L, %%A0, %%R0
+        vpmadd52huq %%P0_H, %%A0, %%R0
+
+        vpmadd52luq %%P2_L, %%A2, %%R0
+        vpmadd52huq %%P2_H, %%A2, %%R0
+
+        vpmadd52luq %%P1_L, %%A0, %%R1
+        vpmadd52huq %%P1_H, %%A0, %%R1
+
+        vpmadd52luq %%P0_L, %%A1, %%R2P
+        vpmadd52huq %%P0_H, %%A1, %%R2P
+
+        vpmadd52luq %%P2_L, %%A0, %%R2
+        vpmadd52huq %%P2_H, %%A0, %%R2
+
+        ; Carry propagation (first pass)
+        vpsrlq  %%YTMP1, %%P0_L, 44
+        vpsllq  %%P0_H, 8
+
+        vpmadd52luq %%P1_L, %%A1, %%R0
+        vpmadd52huq %%P1_H, %%A1, %%R0
+
+        ; Carry propagation (first pass) - continue
+        vpand   %%A0, %%P0_L, [rel mask_44] ; Clear top 20 bits
+        vpaddq  %%P0_H, %%YTMP1
+
+        vpmadd52luq %%P2_L, %%A1, %%R1
+        vpmadd52huq %%P2_H, %%A1, %%R1
+
+        ; Carry propagation (first pass) - continue
+        vpaddq  %%P1_L, %%P0_H
+        vpsllq  %%P1_H, 8
+        vpsrlq  %%YTMP1, %%P1_L, 44
+        vpand   %%A1, %%P1_L, [rel mask_44] ; Clear top 20 bits
+
+        vpaddq  %%P2_L, %%P1_H          ; P2_L += P1_H + P1_L[63:44]
+        vpaddq  %%P2_L, %%YTMP1
+        vpand   %%A2, %%P2_L, [rel mask_42] ; Clear top 22 bits
+        vpsrlq  %%YTMP1, %%P2_L, 42
+        vpsllq  %%P2_H, 10
+        vpaddq  %%P2_H, %%YTMP1
+
+        ; Carry propagation (second pass)
+        ; Multiply by 5 the highest bits (above 130 bits)
+        vpaddq  %%A0, %%P2_H
+        vpsllq  %%P2_H, 2
+        vpaddq  %%A0, %%P2_H
+
+        vpsrlq  %%YTMP1, %%A0, 44
+        vpand   %%A0, [rel mask_44]
+        vpaddq  %%A1, %%YTMP1
+%endmacro
+
+;; =============================================================================
+;; =============================================================================
+;; Computes hash for message length being multiple of block size
+;; =============================================================================
+%macro POLY1305_BLOCKS 14
+%define %%MSG     %1    ; [in/out] GPR pointer to input message (updated)
+%define %%LEN     %2    ; [in/out] GPR in: length in bytes / out: length mod 16
+%define %%A0      %3    ; [in/out] accumulator bits 63..0
+%define %%A1      %4    ; [in/out] accumulator bits 127..64
+%define %%A2      %5    ; [in/out] accumulator bits 195..128
+%define %%R0      %6    ; [in] R constant bits 63..0
+%define %%R1      %7    ; [in] R constant bits 127..64
+%define %%T0      %8    ; [clobbered] GPR register
+%define %%T1      %9    ; [clobbered] GPR register
+%define %%T2      %10   ; [clobbered] GPR register
+%define %%T3      %11   ; [clobbered] GPR register
+%define %%GP_RAX  %12   ; [clobbered] RAX register
+%define %%GP_RDX  %13   ; [clobbered] RDX register
+%define %%PAD_16  %14   ; [in] text "pad_to_16" or "no_padding"
+
+%define %%YMM_ACC0 ymm0
+%define %%YMM_ACC1 ymm1
+%define %%YMM_ACC2 ymm2
+
+%define %%YTMP1 ymm3
+%define %%YTMP2 ymm4
+%define %%YTMP3 ymm5
+%define %%YTMP4 ymm6
+%define %%YTMP5 ymm7
+%define %%YTMP6 ymm8
+%define %%YTMP7 ymm9
+%define %%YTMP8 ymm10
+%define %%YTMP9 ymm11
+%define %%YTMP10 ymm12
+%define %%YTMP11 ymm13
+%define %%YTMP12 ymm14
+%define %%YTMP13 ymm15
+
+%define %%YMM_R0 %%YTMP11
+%define %%YMM_R1 %%YTMP12
+%define %%YMM_R2 %%YTMP13
+
+%define %%XTMP1 XWORD(%%YTMP1)
+%define %%XTMP2 XWORD(%%YTMP2)
+%define %%XTMP3 XWORD(%%YTMP3)
+
+        ; Minimum of 128 bytes to run vectorized code
+        cmp     %%LEN, POLY1305_BLOCK_SIZE*8
+        jb      %%_final_loop
+
+        ; Spread accumulator into 44-bit limbs in quadwords
+        mov     %%T0, %%A0
+        and     %%T0, [rel mask_44] ;; First limb (A[43:0])
+        vmovq   %%XTMP1, %%T0
+
+        mov     %%T0, %%A1
+        shrd    %%A0, %%T0, 44
+        and     %%A0, [rel mask_44] ;; Second limb (A[77:52])
+        vmovq   %%XTMP2, %%A0
+
+        shrd    %%A1, %%A2, 24
+        and     %%A1, [rel mask_42] ;; Third limb (A[129:88])
+        vmovq   %%XTMP3, %%A1
+
+        ; Load first block of data (64 bytes)
+        vmovdqu   %%YTMP4, [%%MSG]
+        vmovdqu   %%YTMP5, [%%MSG + 32]
+
+        ; Interleave the data to form 44-bit limbs
+        ;
+        ; %%YMM_ACC0 to have bits 0-43 of all 4 blocks in 4 qwords
+        ; %%YMM_ACC1 to have bits 87-44 of all 4 blocks in 4 qwords
+        ; %%YMM_ACC2 to have bits 127-88 of all 4 blocks in 4 qwords
+        vpunpckhqdq %%YMM_ACC2, %%YTMP4, %%YTMP5
+        vpunpcklqdq %%YMM_ACC0, %%YTMP4, %%YTMP5
+
+        vpsrlq  %%YMM_ACC1, %%YMM_ACC0, 44
+        vpsllq  %%YTMP4, %%YMM_ACC2, 20
+        vpor    %%YMM_ACC1, %%YTMP4
+        vpand   %%YMM_ACC1, [rel mask_44]
+
+        vpand   %%YMM_ACC0, [rel mask_44]
+        vpsrlq  %%YMM_ACC2, 24
+
+        ; Add 2^128 to all 4 final qwords of the message
+        vpor    %%YMM_ACC2, [rel high_bit]
+
+        vpaddq  %%YMM_ACC0, %%YTMP1
+        vpaddq  %%YMM_ACC1, %%YTMP2
+        vpaddq  %%YMM_ACC2, %%YTMP3
+
+        ; Use memory in stack to save powers of R, before loading them into YMM registers
+        ; The first 16*4 bytes will contain the 16 bytes of the 4 powers of R
+        ; The last 32 bytes will contain the last 2 bits of powers of R, spread in 4 qwords,
+        ; to be OR'd with the highest qwords
+        vmovq   %%XTMP1, %%R0
+        vpinsrq %%XTMP1, %%R1, 1
+        vinserti128 %%YTMP5, %%XTMP1, 1
+
+        vpxor   %%YTMP10, %%YTMP10
+        vpxor   %%YTMP6, %%YTMP6
+
+        ; Calculate R^2
+        mov     %%T0, %%R1
+        shr     %%T0, 2
+        add     %%T0, %%R1      ;; T0 = R1 + (R1 >> 2)
+
+        mov     %%A0, %%R0
+        mov     %%A1, %%R1
+
+        POLY1305_MUL_REDUCE %%A0, %%A1, %%A2, %%R0, %%R1, %%T0, %%T1, %%T2, %%T3, %%GP_RAX, %%GP_RDX, no_A2
+
+        vmovq   %%XTMP1, %%A0
+        vpinsrq %%XTMP1, %%A1, 1
+        vinserti128 %%YTMP5, %%XTMP1, 0
+
+        vmovq   %%XTMP1, %%A2
+        vinserti128 %%YTMP6, %%XTMP1, 0
+
+        ; Calculate R^3
+        POLY1305_MUL_REDUCE %%A0, %%A1, %%A2, %%R0, %%R1, %%T0, %%T1, %%T2, %%T3, %%GP_RAX, %%GP_RDX
+
+        vmovq   %%XTMP1, %%A0
+        vpinsrq %%XTMP1, %%A1, 1
+        vinserti128 %%YTMP7, %%XTMP1, 1
+
+        vmovq   %%XTMP1, %%A2
+        vinserti128 %%YTMP2, %%XTMP1, 1
+
+        ; Calculate R^4
+        POLY1305_MUL_REDUCE %%A0, %%A1, %%A2, %%R0, %%R1, %%T0, %%T1, %%T2, %%T3, %%GP_RAX, %%GP_RDX
+
+        vmovq   %%XTMP1, %%A0
+        vpinsrq %%XTMP1, %%A1, 1
+        vinserti128 %%YTMP7, %%XTMP1, 0
+
+        vmovq   %%XTMP1, %%A2
+        vinserti128 %%YTMP2, %%XTMP1, 0
+
+        vpunpckhqdq %%YMM_R2, %%YTMP5, %%YTMP10
+        vpunpcklqdq %%YMM_R0, %%YTMP5, %%YTMP10
+        vpunpckhqdq %%YTMP3, %%YTMP7, %%YTMP10
+        vpunpcklqdq %%YTMP4, %%YTMP7, %%YTMP10
+
+        vpslldq %%YMM_R2, %%YMM_R2, 8
+        vpslldq %%YTMP6, %%YTMP6, 8
+        vpslldq %%YMM_R0, %%YMM_R0, 8
+        vpor    %%YMM_R2, %%YMM_R2, %%YTMP3
+        vpor    %%YMM_R0, %%YMM_R0, %%YTMP4
+        vpor    %%YTMP6, %%YTMP6, %%YTMP2
+
+        ; Move 2 MSbits to top 24 bits, to be OR'ed later
+        vpsllq  %%YTMP6, 40
+
+        vpsrlq  %%YMM_R1, %%YMM_R0, 44
+        vpsllq  %%YTMP5, %%YMM_R2, 20
+        vpor    %%YMM_R1, %%YTMP5
+        vpand   %%YMM_R1, [rel mask_44]
+
+        vpand   %%YMM_R0, [rel mask_44]
+        vpsrlq  %%YMM_R2, 24
+
+        vpor    %%YMM_R2, %%YTMP6
+
+        ; Store R^4-R for later use
+        vmovdqa   [rsp + _r4_r1_save], %%YMM_R0
+        vmovdqa   [rsp + _r4_r1_save + 32], %%YMM_R1
+        vmovdqa   [rsp + _r4_r1_save + 32*2], %%YMM_R2
+
+        ; Broadcast 44-bit limbs of R^4
+        mov     %%T0, %%A0
+        and     %%T0, [rel mask_44] ;; First limb (R^4[43:0])
+        vmovq   XWORD(%%YMM_R0), %%T0
+        vpermq  %%YMM_R0, %%YMM_R0, 0x0
+
+        mov     %%T0, %%A1
+        shrd    %%A0, %%T0, 44
+        and     %%A0, [rel mask_44] ;; Second limb (R^4[87:44])
+        vmovq   XWORD(%%YMM_R1), %%A0
+        vpermq  %%YMM_R1, %%YMM_R1, 0x0
+
+        shrd    %%A1, %%A2, 24
+        and     %%A1, [rel mask_42] ;; Third limb (R^4[129:88])
+        vmovq   XWORD(%%YMM_R2), %%A1
+        vpermq  %%YMM_R2, %%YMM_R2, 0x0
+
+        ; Generate 4*5*R^4
+        vpsllq  %%YTMP1, %%YMM_R1, 2
+        vpsllq  %%YTMP2, %%YMM_R2, 2
+
+        ; 5*R^4
+        vpaddq  %%YTMP1, %%YMM_R1
+        vpaddq  %%YTMP2, %%YMM_R2
+
+        ; 4*5*R^4
+        vpsllq  %%YTMP1, 2
+        vpsllq  %%YTMP2, 2
+
+        ; Store R^4-R for later use
+        vmovdqa   [rsp + _r4_save], %%YMM_R0
+        vmovdqa   [rsp + _r4_save + 32], %%YMM_R1
+        vmovdqa   [rsp + _r4_save + 32*2], %%YMM_R2
+        vmovdqa   [rsp + _r4p_save], %%YTMP1
+        vmovdqa   [rsp + _r4p_save + 32], %%YTMP2
+
+        mov     %%T0, %%LEN
+        and     %%T0, 0xffffffffffffffc0 ; multiple of 64 bytes
+
+%%_poly1305_blocks_loop:
+        cmp     %%T0, POLY1305_BLOCK_SIZE*4
+        jbe     %%_poly1305_blocks_loop_end
+
+        POLY1305_MSG_MUL_REDUCE_VEC4 %%YMM_ACC0, %%YMM_ACC1, %%YMM_ACC2, \
+                                     [rsp + _r4_save], [rsp + _r4_save + 32], [rsp + _r4_save + 32*2], \
+                                     [rsp + _r4p_save], [rsp + _r4p_save + 32], \
+                                     %%YTMP1, %%YTMP2, %%YTMP3, %%YTMP4, %%YTMP5, %%YTMP6, \
+                                     %%YTMP7, %%YTMP8, %%YTMP9, %%YTMP10, %%YTMP11, %%YTMP12, \
+                                     %%MSG, %%T0
+
+        jmp     %%_poly1305_blocks_loop
+
+%%_poly1305_blocks_loop_end:
+
+        ;; Need to multiply by r^4, r^3, r^2, r
+
+        ; Read R^4-R
+        vmovdqa   %%YMM_R0, [rsp + _r4_r1_save]
+        vmovdqa   %%YMM_R1, [rsp + _r4_r1_save + 32]
+        vmovdqa   %%YMM_R2, [rsp + _r4_r1_save + 32*2]
+
+        ; Then multiply by r^4-r
+
+        ; %%YTMP1 to have bits 87-44 of all 1-4th powers of R' in 4 qwords
+        ; %%YTMP2 to have bits 129-88 of all 1-4th powers of R' in 4 qwords
+        vpsllq  %%YTMP10, %%YMM_R1, 2
+        vpaddq  %%YTMP1, %%YMM_R1, %%YTMP10 ; R1' (R1*5)
+        vpsllq  %%YTMP10, %%YMM_R2, 2
+        vpaddq  %%YTMP2, %%YMM_R2, %%YTMP10 ; R2' (R2*5)
+
+        ; 4*5*R
+        vpsllq  %%YTMP1, 2
+        vpsllq  %%YTMP2, 2
+
+        POLY1305_MUL_REDUCE_VEC4 %%YMM_ACC0, %%YMM_ACC1, %%YMM_ACC2, \
+                                 %%YMM_R0, %%YMM_R1, %%YMM_R2, %%YTMP1, %%YTMP2, \
+                                 %%YTMP3, %%YTMP4, %%YTMP5, %%YTMP6, \
+                                 %%YTMP7, %%YTMP8, %%YTMP9, %%YTMP10
+
+        vextracti128   XWORD(%%YTMP1), %%YMM_ACC0, 1
+        vextracti128   XWORD(%%YTMP2), %%YMM_ACC1, 1
+        vextracti128   XWORD(%%YTMP3), %%YMM_ACC2, 1
+
+        vpaddq  XWORD(%%YMM_ACC0), XWORD(%%YTMP1)
+        vpaddq  XWORD(%%YMM_ACC1), XWORD(%%YTMP2)
+        vpaddq  XWORD(%%YMM_ACC2), XWORD(%%YTMP3)
+
+        vpsrldq XWORD(%%YTMP1), XWORD(%%YMM_ACC0), 8
+        vpsrldq XWORD(%%YTMP2), XWORD(%%YMM_ACC1), 8
+        vpsrldq XWORD(%%YTMP3), XWORD(%%YMM_ACC2), 8
+
+        ; Finish folding and clear second qword
+        vpaddq  XWORD(%%YMM_ACC0), XWORD(%%YTMP1)
+        vpaddq  XWORD(%%YMM_ACC1), XWORD(%%YTMP2)
+        vpaddq  XWORD(%%YMM_ACC2), XWORD(%%YTMP3)
+        vmovq   XWORD(%%YMM_ACC0), XWORD(%%YMM_ACC0)
+        vmovq   XWORD(%%YMM_ACC1), XWORD(%%YMM_ACC1)
+        vmovq   XWORD(%%YMM_ACC2), XWORD(%%YMM_ACC2)
+
+        add     %%MSG, POLY1305_BLOCK_SIZE*4
+
+        and     %%LEN, (POLY1305_BLOCK_SIZE*4 - 1) ; Get remaining lengths (LEN < 64 bytes)
+
+%%_simd_to_gp:
+        ; Carry propagation
+        vpsrlq  %%XTMP1, XWORD(%%YMM_ACC0), 44
+        vpand   XWORD(%%YMM_ACC0), [rel mask_44] ; Clear top 20 bits
+        vpaddq  XWORD(%%YMM_ACC1), %%XTMP1
+        vpsrlq  %%XTMP1, XWORD(%%YMM_ACC1), 44
+        vpand   XWORD(%%YMM_ACC1), [rel mask_44] ; Clear top 20 bits
+        vpaddq  XWORD(%%YMM_ACC2), %%XTMP1
+        vpsrlq  %%XTMP1, XWORD(%%YMM_ACC2), 42
+        vpand   XWORD(%%YMM_ACC2), [rel mask_42] ; Clear top 22 bits
+        vpsllq  %%XTMP2, %%XTMP1, 2
+        vpaddq  %%XTMP1, %%XTMP2
+        vpaddq  XWORD(%%YMM_ACC0), %%XTMP1
+
+        ; Put together A
+        vmovq   %%A0, XWORD(%%YMM_ACC0)
+
+        vmovq   %%T0, XWORD(%%YMM_ACC1)
+        mov     %%T1, %%T0
+        shl     %%T1, 44
+        or      %%A0, %%T1
+
+        shr     %%T0, 20
+        vmovq   %%A2, XWORD(%%YMM_ACC2)
+        mov     %%A1, %%A2
+        shl     %%A1, 24
+        or      %%A1, %%T0
+        shr     %%A2, 40
+
+        ; Clear powers of R
+%ifdef SAFE_DATA
+        vpxor   %%YTMP1, %%YTMP1
+        vmovdqa [rsp + _r4_r1_save], %%YTMP1
+        vmovdqa [rsp + _r4_r1_save + 32], %%YTMP1
+        vmovdqa [rsp + _r4_r1_save + 32*2], %%YTMP1
+        vmovdqa [rsp + _r4_save], %%YTMP1
+        vmovdqa [rsp + _r4_save + 32], %%YTMP1
+        vmovdqa [rsp + _r4_save + 32*2], %%YTMP1
+        vmovdqa [rsp + _r4p_save], %%YTMP1
+        vmovdqa [rsp + _r4p_save + 32], %%YTMP1
+%endif
+
+%%_final_loop:
+        cmp     %%LEN, POLY1305_BLOCK_SIZE
+        jb      %%_poly1305_blocks_partial
+
+        ;; A += MSG[i]
+        add     %%A0, [%%MSG + 0]
+        adc     %%A1, [%%MSG + 8]
+        adc     %%A2, 1                 ;; no padding bit
+
+        mov     %%T0, %%R1
+        shr     %%T0, 2
+        add     %%T0, %%R1      ;; T0 = R1 + (R1 >> 2)
+
+        POLY1305_MUL_REDUCE %%A0, %%A1, %%A2, %%R0, %%R1, \
+                            %%T0, %%T1, %%T2, %%T3, %%GP_RAX, %%GP_RDX
+
+        add     %%MSG, POLY1305_BLOCK_SIZE
+        sub     %%LEN, POLY1305_BLOCK_SIZE
+
+        jmp     %%_final_loop
+
+%%_poly1305_blocks_partial:
+
+        or      %%LEN, %%LEN
+        jz      %%_poly1305_blocks_exit
+
+        simd_load_avx_16 %%XTMP1, %%MSG, %%LEN
+
+%ifnidn %%PAD_16,pad_to_16
+        ;; pad the message
+        lea     %%T2, [rel pad16_bit]
+        shl     %%LEN, 4
+        vpor    %%XTMP1, [%%T2 + %%LEN]
+%endif
+        vmovq   %%T0, %%XTMP1
+        vpextrq %%T1, %%XTMP1, 1
+        ;; A += MSG[i]
+        add     %%A0, %%T0
+        adc     %%A1, %%T1
+%ifnidn %%PAD_16,pad_to_16
+        adc     %%A2, 0                 ;; no padding bit
+%else
+        adc     %%A2, 1                 ;; padding bit please
+%endif
+
+        mov     %%T0, %%R1
+        shr     %%T0, 2
+        add     %%T0, %%R1      ;; T0 = R1 + (R1 >> 2)
+
+        POLY1305_MUL_REDUCE %%A0, %%A1, %%A2, %%R0, %%R1, \
+                            %%T0, %%T1, %%T2, %%T3, %%GP_RAX, %%GP_RDX
+
+%%_poly1305_blocks_exit:
+%endmacro
+
+;; =============================================================================
+;; =============================================================================
+;; Finalizes Poly1305 hash calculation on a message
+;; =============================================================================
+%macro POLY1305_FINALIZE 8
+%define %%KEY     %1    ; [in] pointer to 32 byte key
+%define %%MAC     %2    ; [in/out] pointer to store MAC value into (16 bytes)
+%define %%A0      %3    ; [in/out] accumulator bits 63..0
+%define %%A1      %4    ; [in/out] accumulator bits 127..64
+%define %%A2      %5    ; [in/out] accumulator bits 195..128
+%define %%T0      %6    ; [clobbered] GPR register
+%define %%T1      %7    ; [clobbered] GPR register
+%define %%T2      %8    ; [clobbered] GPR register
+
+        ;; T = A - P, where P = 2^130 - 5
+        ;;     P[63..0]    = 0xFFFFFFFFFFFFFFFB
+        ;;     P[127..64]  = 0xFFFFFFFFFFFFFFFF
+        ;;     P[195..128] = 0x0000000000000003
+        mov     %%T0, %%A0
+        mov     %%T1, %%A1
+        mov     %%T2, %%A2
+
+        sub     %%T0, -5        ;; 0xFFFFFFFFFFFFFFFB
+        sbb     %%T1, -1        ;; 0xFFFFFFFFFFFFFFFF
+        sbb     %%T2, 0x3
+
+        ;; if A > (2^130 - 5) then A = T
+        ;;     - here, if borrow/CF == false then A = T
+        cmovnc  %%A0, %%T0
+        cmovnc  %%A1, %%T1
+
+        ;; MAC = (A + S) mod 2^128 (S = key[16..31])
+        add     %%A0, [%%KEY + (2 * 8)]
+        adc     %%A1, [%%KEY + (3 * 8)]
+
+        ;; store MAC
+        mov     [%%MAC + (0 * 8)], %%A0
+        mov     [%%MAC + (1 * 8)], %%A1
+%endmacro
+
+;; =============================================================================
+;; =============================================================================
+;; Creates stack frame and saves registers
+;; =============================================================================
+%macro FUNC_ENTRY 0
+        mov     rax, rsp
+        sub     rsp, STACKFRAME_size
+	and	rsp, -32
+
+        mov     [rsp + _gpr_save + 8*0], rbx
+        mov     [rsp + _gpr_save + 8*1], rbp
+        mov     [rsp + _gpr_save + 8*2], r12
+        mov     [rsp + _gpr_save + 8*3], r13
+        mov     [rsp + _gpr_save + 8*4], r14
+        mov     [rsp + _gpr_save + 8*5], r15
+%ifndef LINUX
+        mov     [rsp + _gpr_save + 8*6], rsi
+        mov     [rsp + _gpr_save + 8*7], rdi
+%assign i 0
+%assign j 6
+%rep 10
+	vmovdqa	[rsp + _xmm_save + i*16], APPEND(xmm, j)
+%assign i (i + 1)
+%assign j (j + 1)
+%endrep
+%endif
+        mov     [rsp + _rsp_save], rax
+
+%endmacro       ; FUNC_ENTRY
+
+;; =============================================================================
+;; =============================================================================
+;; Restores registers and removes the stack frame
+;; =============================================================================
+%macro FUNC_EXIT 0
+%ifdef SAFE_DATA
+        clear_scratch_gps_asm
+        clear_all_ymms_asm
+%else
+        vzeroupper
+%endif ;; SAFE_DATA
+
+        mov     rbx, [rsp + _gpr_save + 8*0]
+        mov     rbp, [rsp + _gpr_save + 8*1]
+        mov     r12, [rsp + _gpr_save + 8*2]
+        mov     r13, [rsp + _gpr_save + 8*3]
+        mov     r14, [rsp + _gpr_save + 8*4]
+        mov     r15, [rsp + _gpr_save + 8*5]
+%ifndef LINUX
+        mov     rsi, [rsp + _gpr_save + 8*6]
+        mov     rdi, [rsp + _gpr_save + 8*7]
+%assign i 0
+%assign j 6
+%rep 10
+	vmovdqa	APPEND(xmm, j), [rsp + _xmm_save + i*16]
+%assign i (i + 1)
+%assign j (j + 1)
+%endrep
+%endif
+        mov     rsp, [rsp + _rsp_save]
+
+%endmacro
+
+;; =============================================================================
+;; =============================================================================
+;; void poly1305_aead_update_fma_avx2(const void *msg, const uint64_t msg_len,
+;;                                      void *hash, const void *key)
+;; arg1 - Input message
+;; arg2 - Message length
+;; arg3 - Input/output hash
+;; arg4 - Poly1305 key
+align 32
+MKGLOBAL(poly1305_aead_update_fma_avx2,function,internal)
+poly1305_aead_update_fma_avx2:
+
+%ifdef SAFE_PARAM
+        or      arg1, arg1
+        jz      .poly1305_update_exit
+
+        or      arg3, arg3
+        jz      .poly1305_update_exit
+
+        or      arg4, arg4
+        jz      .poly1305_update_exit
+%endif
+
+        FUNC_ENTRY
+
+%ifdef LINUX
+%xdefine _a0 gp3
+%xdefine _a1 gp4
+%xdefine _a2 gp5
+%xdefine _r0 gp6
+%xdefine _r1 gp7
+%xdefine _len arg2
+%xdefine _arg3 arg4             ; use rcx, arg3 = rdx
+%else
+%xdefine _a0 gp3
+%xdefine _a1 rdi
+%xdefine _a2 gp5                ; = arg4 / r9
+%xdefine _r0 gp6
+%xdefine _r1 gp7
+%xdefine _len gp2               ; rsi
+%xdefine _arg3 arg3             ; arg
+%endif
+
+        ;; load R
+        mov     _r0, [arg4 + 0 * 8]
+        mov     _r1, [arg4 + 1 * 8]
+
+        ;; load accumulator / current hash value
+        ;; note: arg4 can't be used beyond this point
+%ifdef LINUX
+        mov     _arg3, arg3             ; note: _arg3 = arg4 (linux)
+%endif
+        mov     _a0, [_arg3 + 0 * 8]
+        mov     _a1, [_arg3 + 1 * 8]
+        mov     _a2, [_arg3 + 2 * 8]    ; note: _a2 = arg4 (win)
+
+%ifndef LINUX
+        mov     _len, arg2      ;; arg2 = rdx on Windows
+%endif
+        POLY1305_BLOCKS arg1, _len, _a0, _a1, _a2, _r0, _r1, \
+                        gp10, gp11, gp8, gp9, rax, rdx, pad_to_16
+
+        ;; save accumulator back
+        mov     [_arg3 + 0 * 8], _a0
+        mov     [_arg3 + 1 * 8], _a1
+        mov     [_arg3 + 2 * 8], _a2
+
+        FUNC_EXIT
+.poly1305_update_exit:
+        ret
+
+;; =============================================================================
+;; =============================================================================
+;; void poly1305_aead_complete_fma_avx2(const void *hash, const void *key,
+;;                                        void *tag)
+;; arg1 - Input hash
+;; arg2 - Poly1305 key
+;; arg3 - Output tag
+align 32
+MKGLOBAL(poly1305_aead_complete_fma_avx2,function,internal)
+poly1305_aead_complete_fma_avx2:
+
+%ifdef SAFE_PARAM
+        or      arg1, arg1
+        jz      .poly1305_complete_exit
+
+        or      arg2, arg2
+        jz      .poly1305_complete_exit
+
+        or      arg3, arg3
+        jz      .poly1305_complete_exit
+%endif
+
+        FUNC_ENTRY
+
+%xdefine _a0 gp6
+%xdefine _a1 gp7
+%xdefine _a2 gp8
+
+        ;; load accumulator / current hash value
+        mov     _a0, [arg1 + 0 * 8]
+        mov     _a1, [arg1 + 1 * 8]
+        mov     _a2, [arg1 + 2 * 8]
+
+        POLY1305_FINALIZE arg2, arg3, _a0, _a1, _a2, gp9, gp10, gp11
+
+        ;; clear Poly key
+%ifdef SAFE_DATA
+        vpxor   xmm0, xmm0
+        vmovdqu   [arg2], ymm0
+%endif
+
+        FUNC_EXIT
+.poly1305_complete_exit:
+        ret
+
+;; =============================================================================
+;; =============================================================================
+;; void poly1305_mac_fma_avx2(IMB_JOB *job)
+;; arg1 - job structure
+align 32
+MKGLOBAL(poly1305_mac_fma_avx2,function,internal)
+poly1305_mac_fma_avx2:
+        FUNC_ENTRY
+
+%ifndef LINUX
+        mov     job, arg1
+%endif
+
+%ifdef SAFE_PARAM
+        or      job, job
+        jz      .poly1305_mac_exit
+%endif
+
+%xdefine _a0 gp1
+%xdefine _a1 gp2
+%xdefine _a2 gp3
+%xdefine _r0 gp4
+%xdefine _r1 gp5
+
+        mov     gp6, [job + _poly1305_key]
+        POLY1305_INIT   gp6, _a0, _a1, _a2, _r0, _r1
+
+        mov     msg, [job + _src]
+        add     msg, [job + _hash_start_src_offset_in_bytes]
+        mov     len, [job + _msg_len_to_hash]
+        POLY1305_BLOCKS msg, len, _a0, _a1, _a2, _r0, _r1, \
+                        gp6, gp7, gp8, gp9, rax, rdx, no_padding
+
+        mov     rax, [job + _poly1305_key]
+        mov     rdx, [job + _auth_tag_output]
+        POLY1305_FINALIZE rax, rdx, _a0, _a1, _a2, gp6, gp7, gp8
+
+.poly1305_mac_exit:
+        FUNC_EXIT
+        ret
+
+mksection stack-noexec
diff --git a/lib/include/arch_avx2_type2.h b/lib/include/arch_avx2_type2.h
index 4d9d6842..cd7f9761 100644
--- a/lib/include/arch_avx2_type2.h
+++ b/lib/include/arch_avx2_type2.h
@@ -67,5 +67,4 @@ IMB_JOB *submit_job_zuc256_eia3_gfni_avx2(MB_MGR_ZUC_OOO *state,
                                      const uint64_t tag_sz);
 IMB_JOB *flush_job_zuc256_eia3_gfni_avx2(MB_MGR_ZUC_OOO *state,
                                     const uint64_t tag_sz);
-
 #endif /* IMB_ASM_AVX2_T2_H */
diff --git a/lib/include/arch_avx2_type3.h b/lib/include/arch_avx2_type3.h
new file mode 100644
index 00000000..3c2bf674
--- /dev/null
+++ b/lib/include/arch_avx2_type3.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+  Copyright (c) 2023, Intel Corporation
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions are met:
+
+      * Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+      * Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+      * Neither the name of Intel Corporation nor the names of its contributors
+        may be used to endorse or promote products derived from this software
+        without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/* AVX_IFMA */
+
+#ifndef IMB_ASM_AVX2_T3_H
+#define IMB_ASM_AVX2_T3_H
+
+#include "intel-ipsec-mb.h"
+#include "ipsec_ooo_mgr.h"
+
+void poly1305_mac_fma_avx2(IMB_JOB *job);
+#endif /* IMB_ASM_AVX2_T2_H */
diff --git a/lib/include/chacha20_poly1305.h b/lib/include/chacha20_poly1305.h
index ced3872a..022a7901 100644
--- a/lib/include/chacha20_poly1305.h
+++ b/lib/include/chacha20_poly1305.h
@@ -78,6 +78,10 @@ void poly1305_aead_update_fma_avx512(const void *msg, const uint64_t msg_len,
                                      void *hash, const void *key);
 void poly1305_aead_complete_fma_avx512(const void *hash, const void *key,
                                        void *tag);
+void poly1305_aead_update_fma_avx2(const void *msg, const uint64_t msg_len,
+                                     void *hash, const void *key);
+void poly1305_aead_complete_fma_avx2(const void *hash, const void *key,
+                                       void *tag);
 
 void gen_keystr_poly_key_sse(const void *key, const void *iv,
                              const uint64_t len, void *ks);
@@ -93,6 +97,14 @@ void init_chacha20_poly1305_avx(const void *key,
                                 struct chacha20_poly1305_context_data *ctx,
                                 const void *iv, const void *aad,
                                 const uint64_t aad_len);
+void init_chacha20_poly1305_avx2(const void *key,
+                                struct chacha20_poly1305_context_data *ctx,
+                                const void *iv, const void *aad,
+                                const uint64_t aad_len);
+void init_chacha20_poly1305_fma_avx2(const void *key,
+                                struct chacha20_poly1305_context_data *ctx,
+                                const void *iv, const void *aad,
+                                const uint64_t aad_len);
 void init_chacha20_poly1305_avx512(const void *key,
                                 struct chacha20_poly1305_context_data *ctx,
                                 const void *iv, const void *aad,
@@ -113,6 +125,10 @@ void update_enc_chacha20_poly1305_avx2(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
                                      const uint64_t len);
+void update_enc_chacha20_poly1305_fma_avx2(const void *key,
+                                     struct chacha20_poly1305_context_data *ctx,
+                                     void *dst, const void *src,
+                                     const uint64_t len);
 void update_enc_chacha20_poly1305_avx512(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
@@ -133,6 +149,10 @@ void update_dec_chacha20_poly1305_avx2(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
                                      const uint64_t len);
+void update_dec_chacha20_poly1305_fma_avx2(const void *key,
+                                     struct chacha20_poly1305_context_data *ctx,
+                                     void *dst, const void *src,
+                                     const uint64_t len);
 void update_dec_chacha20_poly1305_avx512(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
@@ -145,6 +165,11 @@ void finalize_chacha20_poly1305_sse(struct chacha20_poly1305_context_data *ctx,
                                     void *tag, const uint64_t tag_len);
 void finalize_chacha20_poly1305_avx(struct chacha20_poly1305_context_data *ctx,
                                     void *tag, const uint64_t tag_len);
+void finalize_chacha20_poly1305_avx2(struct chacha20_poly1305_context_data *ctx,
+                                    void *tag, const uint64_t tag_len);
+void
+finalize_chacha20_poly1305_fma_avx2(struct chacha20_poly1305_context_data *ctx,
+                                    void *tag, const uint64_t tag_len);
 void finalize_chacha20_poly1305_avx512(
                                     struct chacha20_poly1305_context_data *ctx,
                                     void *tag, const uint64_t tag_len);
diff --git a/lib/include/ipsec_ooo_mgr.h b/lib/include/ipsec_ooo_mgr.h
index 1c376482..efa54629 100644
--- a/lib/include/ipsec_ooo_mgr.h
+++ b/lib/include/ipsec_ooo_mgr.h
@@ -434,6 +434,8 @@ init_mb_mgr_avx2_t1_internal(IMB_MGR *state, const int reset_mgrs);
 IMB_DLL_LOCAL void
 init_mb_mgr_avx2_t2_internal(IMB_MGR *state, const int reset_mgrs);
 IMB_DLL_LOCAL void
+init_mb_mgr_avx2_t3_internal(IMB_MGR *state, const int reset_mgrs);
+IMB_DLL_LOCAL void
 init_mb_mgr_avx512_internal(IMB_MGR *state, const int reset_mgrs);
 IMB_DLL_LOCAL void
 init_mb_mgr_avx512_t1_internal(IMB_MGR *state, const int reset_mgrs);
@@ -455,6 +457,8 @@ get_next_burst_avx2_t1(IMB_MGR *state, const uint32_t n_jobs, IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
 get_next_burst_avx2_t2(IMB_MGR *state, const uint32_t n_jobs, IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
+get_next_burst_avx2_t3(IMB_MGR *state, const uint32_t n_jobs, IMB_JOB **jobs);
+IMB_DLL_EXPORT uint32_t
 get_next_burst_avx512_t1(IMB_MGR *state, const uint32_t n_jobs, IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
 get_next_burst_avx512_t2(IMB_MGR *state, const uint32_t n_jobs, IMB_JOB **jobs);
@@ -474,6 +478,8 @@ submit_burst_avx2_t1(IMB_MGR *state, const uint32_t n_jobs, IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
 submit_burst_avx2_t2(IMB_MGR *state, const uint32_t n_jobs, IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
+submit_burst_avx2_t3(IMB_MGR *state, const uint32_t n_jobs, IMB_JOB **jobs);
+IMB_DLL_EXPORT uint32_t
 submit_burst_avx512_t1(IMB_MGR *state, const uint32_t n_jobs, IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
 submit_burst_avx512_t2(IMB_MGR *state, const uint32_t n_jobs, IMB_JOB **jobs);
@@ -500,6 +506,9 @@ IMB_DLL_EXPORT uint32_t
 submit_burst_nocheck_avx2_t2(IMB_MGR *state, const uint32_t n_jobs,
                              IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
+submit_burst_nocheck_avx2_t3(IMB_MGR *state, const uint32_t n_jobs,
+                             IMB_JOB **jobs);
+IMB_DLL_EXPORT uint32_t
 submit_burst_nocheck_avx512_t1(IMB_MGR *state, const uint32_t n_jobs,
                                IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
@@ -521,6 +530,8 @@ flush_burst_avx2_t1(IMB_MGR *state, const uint32_t max_jobs, IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
 flush_burst_avx2_t2(IMB_MGR *state, const uint32_t max_jobs, IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
+flush_burst_avx2_t3(IMB_MGR *state, const uint32_t max_jobs, IMB_JOB **jobs);
+IMB_DLL_EXPORT uint32_t
 flush_burst_avx512_t1(IMB_MGR *state, const uint32_t max_jobs, IMB_JOB **jobs);
 IMB_DLL_EXPORT uint32_t
 flush_burst_avx512_t2(IMB_MGR *state, const uint32_t max_jobs, IMB_JOB **jobs);
@@ -568,6 +579,12 @@ submit_cipher_burst_avx2_t2(IMB_MGR *state, IMB_JOB *jobs,
                             const IMB_CIPHER_DIRECTION dir,
                             const IMB_KEY_SIZE_BYTES key_size);
 IMB_DLL_EXPORT uint32_t
+submit_cipher_burst_avx2_t3(IMB_MGR *state, IMB_JOB *jobs,
+                            const uint32_t n_jobs,
+                            const IMB_CIPHER_MODE cipher,
+                            const IMB_CIPHER_DIRECTION dir,
+                            const IMB_KEY_SIZE_BYTES key_size);
+IMB_DLL_EXPORT uint32_t
 submit_cipher_burst_avx512_t1(IMB_MGR *state, IMB_JOB *jobs,
                               const uint32_t n_jobs,
                               const IMB_CIPHER_MODE cipher,
@@ -623,6 +640,12 @@ submit_cipher_burst_nocheck_avx2_t2(IMB_MGR *state, IMB_JOB *jobs,
                                     const IMB_CIPHER_DIRECTION dir,
                                     const IMB_KEY_SIZE_BYTES key_size);
 IMB_DLL_EXPORT uint32_t
+submit_cipher_burst_nocheck_avx2_t3(IMB_MGR *state, IMB_JOB *jobs,
+                                    const uint32_t n_jobs,
+                                    const IMB_CIPHER_MODE cipher,
+                                    const IMB_CIPHER_DIRECTION dir,
+                                    const IMB_KEY_SIZE_BYTES key_size);
+IMB_DLL_EXPORT uint32_t
 submit_cipher_burst_nocheck_avx512_t1(IMB_MGR *state, IMB_JOB *jobs,
                                       const uint32_t n_jobs,
                                       const IMB_CIPHER_MODE cipher,
@@ -664,6 +687,10 @@ submit_hash_burst_avx2_t2(IMB_MGR *state, IMB_JOB *jobs,
                           const uint32_t n_jobs,
                           const IMB_HASH_ALG hash);
 IMB_DLL_EXPORT uint32_t
+submit_hash_burst_avx2_t3(IMB_MGR *state, IMB_JOB *jobs,
+                          const uint32_t n_jobs,
+                          const IMB_HASH_ALG hash);
+IMB_DLL_EXPORT uint32_t
 submit_hash_burst_avx512_t1(IMB_MGR *state, IMB_JOB *jobs,
                             const uint32_t n_jobs,
                             const IMB_HASH_ALG hash);
@@ -701,6 +728,10 @@ submit_hash_burst_nocheck_avx2_t2(IMB_MGR *state, IMB_JOB *jobs,
                                   const uint32_t n_jobs,
                                   const IMB_HASH_ALG hash);
 IMB_DLL_EXPORT uint32_t
+submit_hash_burst_nocheck_avx2_t3(IMB_MGR *state, IMB_JOB *jobs,
+                                  const uint32_t n_jobs,
+                                  const IMB_HASH_ALG hash);
+IMB_DLL_EXPORT uint32_t
 submit_hash_burst_nocheck_avx512_t1(IMB_MGR *state, IMB_JOB *jobs,
                                     const uint32_t n_jobs,
                                     const IMB_HASH_ALG hash);
@@ -765,6 +796,14 @@ IMB_DLL_EXPORT IMB_JOB *submit_job_nocheck_avx2_t2(IMB_MGR *state);
 IMB_DLL_EXPORT IMB_JOB *get_next_job_avx2_t2(IMB_MGR *state);
 IMB_DLL_EXPORT IMB_JOB *get_completed_job_avx2_t2(IMB_MGR *state);
 
+/* AVX2 TYPE3 manager functions */
+IMB_DLL_EXPORT IMB_JOB *submit_job_avx2_t3(IMB_MGR *state);
+IMB_DLL_EXPORT IMB_JOB *flush_job_avx2_t3(IMB_MGR *state);
+IMB_DLL_EXPORT uint32_t queue_size_avx2_t3(IMB_MGR *state);
+IMB_DLL_EXPORT IMB_JOB *submit_job_nocheck_avx2_t3(IMB_MGR *state);
+IMB_DLL_EXPORT IMB_JOB *get_next_job_avx2_t3(IMB_MGR *state);
+IMB_DLL_EXPORT IMB_JOB *get_completed_job_avx2_t3(IMB_MGR *state);
+
 /* AVX512 TYPE1 manager functions */
 IMB_DLL_EXPORT IMB_JOB *submit_job_avx512_t1(IMB_MGR *state);
 IMB_DLL_EXPORT IMB_JOB *flush_job_avx512_t1(IMB_MGR *state);
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 55e5f3c1..15c971f0 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -1055,6 +1055,7 @@ typedef uint32_t (*crc32_fn_t)(const void *, const uint64_t);
                                  IMB_FEATURE_GFNI)
 #define IMB_CPUFLAGS_AVX_T2     (IMB_CPUFLAGS_AVX | IMB_FEATURE_SHANI | \
                                  IMB_FEATURE_GFNI)
+#define IMB_CPUFLAGS_AVX2_T3    (IMB_CPUFLAGS_AVX2_T2 | IMB_FEATURE_AVX_IFMA)
 
 /* TOP LEVEL (IMB_MGR) Data structure fields */
 
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index 903b3368..783adbb0 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -677,4 +677,18 @@ EXPORTS
     get_completed_job_avx2_t1              	@651
     get_completed_job_avx2_t2            	@652
     get_completed_job_avx512_t1              	@653
-    get_completed_job_avx512_t2            	@654
\ No newline at end of file
+    get_completed_job_avx512_t2            	@654
+    get_next_burst_avx2_t3                      @655
+    submit_burst_avx2_t3                        @656
+    submit_burst_nocheck_avx2_t3                @657
+    flush_burst_avx2_t3                         @658
+    submit_cipher_burst_avx2_t3                 @659
+    submit_cipher_burst_nocheck_avx2_t3         @660
+    submit_hash_burst_avx2_t3                   @661
+    submit_hash_burst_nocheck_avx2_t3           @662
+    flush_job_avx2_t3				@663
+    queue_size_avx2_t3				@664
+    submit_job_avx2_t3				@665
+    submit_job_nocheck_avx2_t3			@666
+    get_next_job_avx2_t3                	@667
+    get_completed_job_avx2_t3            	@668
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index a4e97567..6c0038bd 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -454,6 +454,7 @@ lib_objs2 = \
 	$(OBJ_DIR)\mb_mgr_avx2.obj \
 	$(OBJ_DIR)\mb_mgr_avx2_t1.obj \
 	$(OBJ_DIR)\mb_mgr_avx2_t2.obj \
+	$(OBJ_DIR)\mb_mgr_avx2_t3.obj \
 	$(OBJ_DIR)\mb_mgr_avx512.obj \
 	$(OBJ_DIR)\mb_mgr_avx512_t1.obj \
 	$(OBJ_DIR)\mb_mgr_avx512_t2.obj \
@@ -663,6 +664,13 @@ $(DEPALL): $(all_objs)
 {avx2_t2\}.asm{$(OBJ_DIR)}.obj:
 	$(AS) -MD $@.dep -o $@ $(AFLAGS) $<
 
+{avx2_t3\}.c{$(OBJ_DIR)}.obj:
+	$(CC) /arch:AVX /Fo$@ /c $(CFLAGS) $<
+        $(DEPTOOL) $< $@ "$(DEPFLAGS)" > $@.dep
+
+{avx2_t3\}.asm{$(OBJ_DIR)}.obj:
+	$(AS) -MD $@.dep -o $@ $(AFLAGS) $<
+
 {avx512_t1\}.c{$(OBJ_DIR)}.obj:
 	$(CC) /arch:AVX /Fo$@ /c $(CFLAGS) $<
         $(DEPTOOL) $< $@ "$(DEPFLAGS)" > $@.dep
diff --git a/lib/x86_64/chacha20_poly1305.c b/lib/x86_64/chacha20_poly1305.c
index 3e52e809..12ca0b89 100644
--- a/lib/x86_64/chacha20_poly1305.c
+++ b/lib/x86_64/chacha20_poly1305.c
@@ -75,7 +75,9 @@ void poly1305_aead_update(const void *msg, const uint64_t msg_len,
                                                         key);
                 else
                         poly1305_aead_update_avx512(msg, msg_len, hash, key);
-        } else
+        } else if (arch == IMB_ARCH_AVX2 && ifma)
+                poly1305_aead_update_fma_avx2(msg, msg_len, hash, key);
+        else
                 poly1305_aead_update_scalar(msg, msg_len, hash, key);
 }
 
@@ -88,6 +90,8 @@ void poly1305_aead_complete(const void *hash, const void *key,
                         poly1305_aead_complete_fma_avx512(hash, key, tag);
                 else
                         poly1305_aead_complete_avx512(hash, key, tag);
+        } else if (arch == IMB_ARCH_AVX2 && ifma) {
+                poly1305_aead_complete_fma_avx2(hash, key, tag);
         } else
                 poly1305_aead_complete_scalar(hash, key, tag);
 }
@@ -699,8 +703,10 @@ IMB_JOB *aead_chacha20_poly1305_avx(IMB_MGR *mgr, IMB_JOB *job)
 IMB_DLL_LOCAL
 IMB_JOB *aead_chacha20_poly1305_avx2(IMB_MGR *mgr, IMB_JOB *job)
 {
-        (void) mgr;
-        return aead_chacha20_poly1305(job, IMB_ARCH_AVX2, 0);
+        if (mgr->features & IMB_FEATURE_AVX_IFMA)
+                return aead_chacha20_poly1305(job, IMB_ARCH_AVX2, 1);
+        else
+                return aead_chacha20_poly1305(job, IMB_ARCH_AVX2, 0);
 }
 
 IMB_DLL_LOCAL
@@ -729,8 +735,10 @@ IMB_JOB *aead_chacha20_poly1305_sgl_avx(IMB_MGR *mgr, IMB_JOB *job)
 IMB_DLL_LOCAL
 IMB_JOB *aead_chacha20_poly1305_sgl_avx2(IMB_MGR *mgr, IMB_JOB *job)
 {
-        (void) mgr;
-        return aead_chacha20_poly1305_sgl(job, IMB_ARCH_AVX2, 0);
+        if (mgr->features & IMB_FEATURE_AVX_IFMA)
+                return aead_chacha20_poly1305_sgl(job, IMB_ARCH_AVX2, 1);
+        else
+                return aead_chacha20_poly1305_sgl(job, IMB_ARCH_AVX2, 0);
 }
 
 IMB_DLL_LOCAL
@@ -762,6 +770,26 @@ void init_chacha20_poly1305_avx(const void *key,
                                       aad_len, IMB_ARCH_AVX, 1, 0);
 }
 
+IMB_DLL_LOCAL
+void init_chacha20_poly1305_avx2(const void *key,
+                                struct chacha20_poly1305_context_data *ctx,
+                                const void *iv, const void *aad,
+                                const uint64_t aad_len)
+{
+        init_chacha20_poly1305_direct(key, ctx, iv, aad,
+                                      aad_len, IMB_ARCH_AVX2, 1, 0);
+}
+
+IMB_DLL_LOCAL
+void init_chacha20_poly1305_fma_avx2(const void *key,
+                                struct chacha20_poly1305_context_data *ctx,
+                                const void *iv, const void *aad,
+                                const uint64_t aad_len)
+{
+        init_chacha20_poly1305_direct(key, ctx, iv, aad,
+                                      aad_len, IMB_ARCH_AVX2, 1, 1);
+}
+
 IMB_DLL_LOCAL
 void init_chacha20_poly1305_avx512(const void *key,
                                 struct chacha20_poly1305_context_data *ctx,
@@ -809,6 +837,14 @@ void update_enc_chacha20_poly1305_avx2(const void *key,
                                         IMB_DIR_ENCRYPT, IMB_ARCH_AVX2, 1, 0);
 }
 
+void update_enc_chacha20_poly1305_fma_avx2(const void *key,
+                                     struct chacha20_poly1305_context_data *ctx,
+                                     void *dst, const void *src,
+                                     const uint64_t len)
+{
+        update_chacha20_poly1305_direct(key, ctx, dst, src, len,
+                                        IMB_DIR_ENCRYPT, IMB_ARCH_AVX2, 1, 1);
+}
 
 void update_enc_chacha20_poly1305_avx512(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
@@ -855,6 +891,15 @@ void update_dec_chacha20_poly1305_avx2(const void *key,
                                         IMB_DIR_DECRYPT, IMB_ARCH_AVX2, 1, 0);
 }
 
+void update_dec_chacha20_poly1305_fma_avx2(const void *key,
+                                     struct chacha20_poly1305_context_data *ctx,
+                                     void *dst, const void *src,
+                                     const uint64_t len)
+{
+        update_chacha20_poly1305_direct(key, ctx, dst, src, len,
+                                        IMB_DIR_DECRYPT, IMB_ARCH_AVX2, 1, 1);
+}
+
 void update_dec_chacha20_poly1305_avx512(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
@@ -885,6 +930,18 @@ void finalize_chacha20_poly1305_avx(struct chacha20_poly1305_context_data *ctx,
         finalize_chacha20_poly1305_direct(ctx, tag, tag_len, IMB_ARCH_AVX, 1, 0);
 }
 
+void finalize_chacha20_poly1305_avx2(struct chacha20_poly1305_context_data *ctx,
+                                         void *tag, const uint64_t tag_len)
+{
+        finalize_chacha20_poly1305_direct(ctx, tag, tag_len, IMB_ARCH_AVX2, 1, 0);
+}
+
+void finalize_chacha20_poly1305_fma_avx2(struct chacha20_poly1305_context_data *ctx,
+                                         void *tag, const uint64_t tag_len)
+{
+        finalize_chacha20_poly1305_direct(ctx, tag, tag_len, IMB_ARCH_AVX2, 1, 1);
+}
+
 void finalize_chacha20_poly1305_avx512(
                                     struct chacha20_poly1305_context_data *ctx,
                                     void *tag, const uint64_t tag_len)
-- 
GitLab


From b0f1932b0be7aea1f441870676b8126ab5d6c833 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Wed, 11 Jan 2023 15:25:29 +0000
Subject: [PATCH 054/332] lib: check if NASM supports AVX_IFMA

---
 lib/Makefile                    | 77 ++++++++++++++++++++++++++-------
 lib/avx2_t1/mb_mgr_avx2.c       | 16 ++++---
 lib/avx2_t3/mb_mgr_avx2_t3.c    |  2 +
 lib/include/chacha20_poly1305.h | 10 +++++
 lib/win_x64.mak                 | 23 ++++++++--
 lib/x86_64/chacha20_poly1305.c  | 16 ++++++-
 lib/x86_64/cpu_feature.c        |  4 ++
 7 files changed, 123 insertions(+), 25 deletions(-)

diff --git a/lib/Makefile b/lib/Makefile
index eaa9b6fd..0cc48b35 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -50,28 +50,49 @@ USE_YASM ?= n
 YASM ?= yasm
 NASM ?= nasm
 
+CC ?= gcc
+# MINGW should be non-zero value if detected
+MINGW ?= $(shell $(CC) -dM -E - < /dev/null | grep -i mingw | wc -l | sed 's/^ *//')
+
+ifeq ($(MINGW),0)
+MULT = \*
+else
+MULT = \\*
+endif
+
 # Detect NASM version (minimum version required: 2.14)
 NASM_VERSION = $(shell $(NASM) -v | cut -d " " -f 3)
 
 NASM_MAJOR_REQ = 2
 NASM_MINOR_REQ = 14
+NASM_MIN_REQ = $(shell expr $(NASM_MAJOR_REQ) $(MULT) 100 + $(NASM_MINOR_REQ) )
 
 ifeq ($(NASM_VERSION),)
 $(error "NASM is not installed! Minimum required version: $(NASM_MAJOR_REQ).$(NASM_MINOR_REQ)")
 else
 NASM_MAJOR_VER = $(shell echo $(NASM_VERSION) | cut -d "." -f 1)
 NASM_MINOR_VER = $(shell echo $(NASM_VERSION) | cut -d "." -f 2 | cut -c 1-2)
-NASM_GE_MAJOR = $(shell [ $(NASM_MAJOR_VER) -ge $(NASM_MAJOR_REQ) ] && echo true)
-NASM_GE_MINOR = $(shell [ $(NASM_MINOR_VER) -ge $(NASM_MINOR_REQ) ] && echo true)
-ifneq ($(NASM_GE_MAJOR),true)
+NASM_VER = $(shell expr $(NASM_MAJOR_VER) $(MULT) 100 + $(NASM_MINOR_VER) )
+
+NASM_GE_REQ = $(shell [ $(NASM_VER) -ge $(NASM_MIN_REQ) ] && echo true)
+ifneq ($(NASM_GE_REQ),true)
 $(warning "NASM version found: $(NASM_VERSION)")
 $(error "Minimum required: $(NASM_MAJOR_REQ).$(NASM_MINOR_REQ)")
-endif
-ifneq ($(NASM_GE_MINOR),true)
+endif # NASM_GE_REQ
+endif # NASM_VERSION
+
+# Minimum version of NASM with AVX_IFMA support: 2.16
+AVX_IFMA := y
+NASM_MAJOR_AVX_IFMA = 2
+NASM_MINOR_AVX_IFMA = 16
+NASM_MIN_IFMA_REQ = $(shell expr $(NASM_MAJOR_AVX_IFMA) $(MULT) 100 + $(NASM_MINOR_AVX_IFMA) )
+
+NASM_IFMA_GE_REQ = $(shell [ $(NASM_VER) -ge $(NASM_MIN_IFMA_REQ) ] && echo true)
+ifneq ($(NASM_IFMA_GE_REQ),true)
 $(warning "NASM version found: $(NASM_VERSION)")
-$(error "Minimum required: $(NASM_MAJOR_REQ).$(NASM_MINOR_REQ)")
-endif
-endif
+$(warning "AVX-IFMA not supported. Minimum required: $(NASM_MAJOR_AVX_IFMA).$(NASM_MINOR_AVX_IFMA)")
+AVX_IFMA := n
+endif # NASM_AVX_IFMA_GET_REQ
 
 OBJ_DIR ?= obj
 LIB_DIR ?= .
@@ -79,10 +100,6 @@ LIB_DIR ?= .
 INCLUDE_DIRS := include . no-aesni
 INCLUDES := $(foreach i,$(INCLUDE_DIRS),-I $i)
 
-CC ?= gcc
-# MINGW should be non-zero value if detected
-MINGW ?= $(shell $(CC) -dM -E - < /dev/null | grep -i mingw | wc -l | sed 's/^ *//')
-
 # if "-z ibt" is supported then assume "-z shstk, -z cet-report=error" are also supported
 # "-fcf-protection" needs to be checked separately
 ifeq ($(MINGW),0)
@@ -111,6 +128,10 @@ ifeq ($(CC_HAS_CET),1)
 CFLAGS += -fcf-protection=full
 endif
 
+ifeq ($(AVX_IFMA), y)
+CFLAGS += -DAVX_IFMA
+endif
+
 ASM_INCLUDE_DIRS := .
 
 YASM_INCLUDES := $(foreach i,$(ASM_INCLUDE_DIRS),-I $i)
@@ -300,6 +321,10 @@ c_lib_objs := $(c_lib_objs) \
 	snow3g_sse_no_aesni.o
 endif
 
+ifeq ($(AVX_IFMA), y)
+c_lib_objs := $(c_lib_objs) \
+	mb_mgr_avx2_t3.o
+endif
 #
 # List of ASM modules (root directory/common)
 #
@@ -585,9 +610,14 @@ asm_avx2_lib_objs := \
 	mb_mgr_hmac_sha512_submit_avx2.o \
 	mb_mgr_zuc_submit_flush_avx2.o \
 	mb_mgr_zuc_submit_flush_gfni_avx2.o \
-	poly_fma_avx2.o \
 	chacha20_avx2.o
 
+#
+# List of ASM modules (avx2_t3 directory)
+#
+asm_avx2_ifma_lib_objs := \
+	poly_fma_avx2.o
+
 #
 # List of ASM modules (avx512 directory)
 #
@@ -694,6 +724,10 @@ asm_obj_files := $(asm_generic_lib_objs) \
 ifeq ($(AESNI_EMU), y)
 asm_obj_files := $(asm_obj_files) $(asm_noaesni_lib_objs) $(asm_noaesni_gcm_objs)
 endif
+ifeq ($(AVX_IFMA), y)
+asm_obj_files := $(asm_obj_files) $(asm_avx2_ifma_lib_objs)
+endif
+
 c_obj_files := $(c_lib_objs) $(c_gcm_objs)
 
 #
@@ -720,9 +754,22 @@ dep_target_files := $(dep_files:%=$(OBJ_DIR)/%)
 
 all: $(LIB_DIR)/$(LIBNAME)
 
+STR_FILTER = ""
+ifneq ($(AESNI_EMU),y)
+ifneq ($(AVX_IFMA),y)
+STR_FILTER = "_no_aesni\|_avx2_t3"
+else
+STR_FILTER = "_no_aesni"
+endif
+else
+ifneq ($(AVX_IFMA),y)
+STR_FILTER = "_avx2_t3"
+endif
+endif
+
 $(LIB)_lnk.def: $(LIB).def
-ifneq ($(AESNI_EMU), y)
-	grep -v _no_aesni $(LIB).def > $(LIB)_lnk.def
+ifneq ($(STR_FILTER), "")
+	grep -v $(STR_FILTER) $(LIB).def > $(LIB)_lnk.def
 else
 	cp -f $(LIB).def $(LIB)_lnk.def
 endif
diff --git a/lib/avx2_t1/mb_mgr_avx2.c b/lib/avx2_t1/mb_mgr_avx2.c
index 0c701b39..ac98218c 100644
--- a/lib/avx2_t1/mb_mgr_avx2.c
+++ b/lib/avx2_t1/mb_mgr_avx2.c
@@ -53,14 +53,20 @@ init_mb_mgr_avx2_internal(IMB_MGR *state, const int reset_mgrs)
         state->features = cpu_feature_adjust(state->flags,
                                              cpu_feature_detect());
 
+#ifdef AVX_IFMA
         if ((state->features & IMB_CPUFLAGS_AVX2_T3) ==
-            IMB_CPUFLAGS_AVX2_T3)
+            IMB_CPUFLAGS_AVX2_T3) {
                 init_mb_mgr_avx2_t3_internal(state, reset_mgrs);
-        else if ((state->features & IMB_CPUFLAGS_AVX2_T2) ==
-            IMB_CPUFLAGS_AVX2_T2)
+                return;
+        }
+#endif
+        if ((state->features & IMB_CPUFLAGS_AVX2_T2) ==
+            IMB_CPUFLAGS_AVX2_T2) {
                 init_mb_mgr_avx2_t2_internal(state, reset_mgrs);
-        else
-                init_mb_mgr_avx2_t1_internal(state, reset_mgrs);
+                return;
+        }
+
+        init_mb_mgr_avx2_t1_internal(state, reset_mgrs);
 }
 
 void
diff --git a/lib/avx2_t3/mb_mgr_avx2_t3.c b/lib/avx2_t3/mb_mgr_avx2_t3.c
index bb46626f..99717fca 100644
--- a/lib/avx2_t3/mb_mgr_avx2_t3.c
+++ b/lib/avx2_t3/mb_mgr_avx2_t3.c
@@ -432,10 +432,12 @@ init_mb_mgr_avx2_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->crc32_wimax_ofdma_data = crc32_wimax_ofdma_data_avx;
         state->crc8_wimax_ofdma_hcs = crc8_wimax_ofdma_hcs_avx;
 
+#ifdef AVX_IFMA
         state->chacha20_poly1305_init = init_chacha20_poly1305_fma_avx2;
         state->chacha20_poly1305_enc_update = update_enc_chacha20_poly1305_fma_avx2;
         state->chacha20_poly1305_dec_update = update_dec_chacha20_poly1305_fma_avx2;
         state->chacha20_poly1305_finalize = finalize_chacha20_poly1305_fma_avx2;
+#endif
 
         state->gcm128_enc          = aes_gcm_enc_128_avx_gen4;
         state->gcm192_enc          = aes_gcm_enc_192_avx_gen4;
diff --git a/lib/include/chacha20_poly1305.h b/lib/include/chacha20_poly1305.h
index 022a7901..59b8bcf0 100644
--- a/lib/include/chacha20_poly1305.h
+++ b/lib/include/chacha20_poly1305.h
@@ -78,10 +78,12 @@ void poly1305_aead_update_fma_avx512(const void *msg, const uint64_t msg_len,
                                      void *hash, const void *key);
 void poly1305_aead_complete_fma_avx512(const void *hash, const void *key,
                                        void *tag);
+#ifdef AVX_IFMA
 void poly1305_aead_update_fma_avx2(const void *msg, const uint64_t msg_len,
                                      void *hash, const void *key);
 void poly1305_aead_complete_fma_avx2(const void *hash, const void *key,
                                        void *tag);
+#endif
 
 void gen_keystr_poly_key_sse(const void *key, const void *iv,
                              const uint64_t len, void *ks);
@@ -101,10 +103,12 @@ void init_chacha20_poly1305_avx2(const void *key,
                                 struct chacha20_poly1305_context_data *ctx,
                                 const void *iv, const void *aad,
                                 const uint64_t aad_len);
+#ifdef AVX_IFMA
 void init_chacha20_poly1305_fma_avx2(const void *key,
                                 struct chacha20_poly1305_context_data *ctx,
                                 const void *iv, const void *aad,
                                 const uint64_t aad_len);
+#endif
 void init_chacha20_poly1305_avx512(const void *key,
                                 struct chacha20_poly1305_context_data *ctx,
                                 const void *iv, const void *aad,
@@ -125,10 +129,12 @@ void update_enc_chacha20_poly1305_avx2(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
                                      const uint64_t len);
+#ifdef AVX_IFMA
 void update_enc_chacha20_poly1305_fma_avx2(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
                                      const uint64_t len);
+#endif
 void update_enc_chacha20_poly1305_avx512(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
@@ -149,10 +155,12 @@ void update_dec_chacha20_poly1305_avx2(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
                                      const uint64_t len);
+#ifdef AVX_IFMA
 void update_dec_chacha20_poly1305_fma_avx2(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
                                      const uint64_t len);
+#endif
 void update_dec_chacha20_poly1305_avx512(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
@@ -167,9 +175,11 @@ void finalize_chacha20_poly1305_avx(struct chacha20_poly1305_context_data *ctx,
                                     void *tag, const uint64_t tag_len);
 void finalize_chacha20_poly1305_avx2(struct chacha20_poly1305_context_data *ctx,
                                     void *tag, const uint64_t tag_len);
+#ifdef AVX_IFMA
 void
 finalize_chacha20_poly1305_fma_avx2(struct chacha20_poly1305_context_data *ctx,
                                     void *tag, const uint64_t tag_len);
+#endif
 void finalize_chacha20_poly1305_avx512(
                                     struct chacha20_poly1305_context_data *ctx,
                                     void *tag, const uint64_t tag_len);
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 6c0038bd..c31023db 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -454,7 +454,6 @@ lib_objs2 = \
 	$(OBJ_DIR)\mb_mgr_avx2.obj \
 	$(OBJ_DIR)\mb_mgr_avx2_t1.obj \
 	$(OBJ_DIR)\mb_mgr_avx2_t2.obj \
-	$(OBJ_DIR)\mb_mgr_avx2_t3.obj \
 	$(OBJ_DIR)\mb_mgr_avx512.obj \
 	$(OBJ_DIR)\mb_mgr_avx512_t1.obj \
 	$(OBJ_DIR)\mb_mgr_avx512_t2.obj \
@@ -573,6 +572,11 @@ all_objs = $(lib_objs1) $(lib_objs2) $(gcm_objs) $(no_aesni_objs)
 all_objs = $(lib_objs1) $(lib_objs2) $(gcm_objs)
 !endif
 
+!if "$(AVX_IFMA)" == "y"
+all_objs = $(all_objs) $(OBJ_DIR)\mb_mgr_avx2_t3.obj $(OBJ_DIR)\poly_fma_avx2.obj
+DCFLAGS = $(DCFLAGS) /DAVX_IFMA
+!endif
+
 all: $(LIB_DIR)\$(LIBNAME) $(DEPALL)
 
 $(LIB_DIR)\$(LIBNAME): $(all_objs) $(LIBBASE)_lnk.def
@@ -596,13 +600,26 @@ $(LIB_DIR)\$(LIBNAME): $(all_objs) $(LIBBASE)_lnk.def
 	@echo NOTE:  $(SAFE_OPTIONS_MSG1) $(SAFE_OPTIONS_MSG2)
 !endif
 
+STR_FILTER = ""
+!if "$(AESNI_EMU)" != "y"
+!if "$(AVX_IFMA)" != "y"
+STR_FILTER = "_no_aesni _avx2_t3"
+!else
+STR_FILTER = "_no_aesni"
+!endif
+!else
+!if "$(AVX_IFMA)" != "y"
+STR_FILTER = "_avx2_t3"
+!endif
+!endif
+
 $(all_objs): $(OBJ_DIR) $(LIB_DIR)
 
 $(LIBBASE)_lnk.def: $(LIBBASE).def
-!if "$(AESNI_EMU)" == "y"
+!if $(STR_FILTER) == ""
         copy /Y $(LIBBASE).def $(LIBBASE)_lnk.def
 !else
-	findstr /v _no_aesni $(LIBBASE).def > $(LIBBASE)_lnk.def
+	findstr /v $(STR_FILTER) $(LIBBASE).def > $(LIBBASE)_lnk.def
 !endif
 
 $(DEPALL): $(all_objs)
diff --git a/lib/x86_64/chacha20_poly1305.c b/lib/x86_64/chacha20_poly1305.c
index 12ca0b89..47903817 100644
--- a/lib/x86_64/chacha20_poly1305.c
+++ b/lib/x86_64/chacha20_poly1305.c
@@ -75,9 +75,11 @@ void poly1305_aead_update(const void *msg, const uint64_t msg_len,
                                                         key);
                 else
                         poly1305_aead_update_avx512(msg, msg_len, hash, key);
-        } else if (arch == IMB_ARCH_AVX2 && ifma)
+#ifdef AVX_IFMA
+        } else if (arch == IMB_ARCH_AVX2 && ifma) {
                 poly1305_aead_update_fma_avx2(msg, msg_len, hash, key);
-        else
+#endif
+        } else
                 poly1305_aead_update_scalar(msg, msg_len, hash, key);
 }
 
@@ -90,8 +92,10 @@ void poly1305_aead_complete(const void *hash, const void *key,
                         poly1305_aead_complete_fma_avx512(hash, key, tag);
                 else
                         poly1305_aead_complete_avx512(hash, key, tag);
+#ifdef AVX_IFMA
         } else if (arch == IMB_ARCH_AVX2 && ifma) {
                 poly1305_aead_complete_fma_avx2(hash, key, tag);
+#endif
         } else
                 poly1305_aead_complete_scalar(hash, key, tag);
 }
@@ -780,6 +784,7 @@ void init_chacha20_poly1305_avx2(const void *key,
                                       aad_len, IMB_ARCH_AVX2, 1, 0);
 }
 
+#ifdef AVX_IFMA
 IMB_DLL_LOCAL
 void init_chacha20_poly1305_fma_avx2(const void *key,
                                 struct chacha20_poly1305_context_data *ctx,
@@ -789,6 +794,7 @@ void init_chacha20_poly1305_fma_avx2(const void *key,
         init_chacha20_poly1305_direct(key, ctx, iv, aad,
                                       aad_len, IMB_ARCH_AVX2, 1, 1);
 }
+#endif
 
 IMB_DLL_LOCAL
 void init_chacha20_poly1305_avx512(const void *key,
@@ -837,6 +843,7 @@ void update_enc_chacha20_poly1305_avx2(const void *key,
                                         IMB_DIR_ENCRYPT, IMB_ARCH_AVX2, 1, 0);
 }
 
+#ifdef AVX_IFMA
 void update_enc_chacha20_poly1305_fma_avx2(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
@@ -845,6 +852,7 @@ void update_enc_chacha20_poly1305_fma_avx2(const void *key,
         update_chacha20_poly1305_direct(key, ctx, dst, src, len,
                                         IMB_DIR_ENCRYPT, IMB_ARCH_AVX2, 1, 1);
 }
+#endif
 
 void update_enc_chacha20_poly1305_avx512(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
@@ -891,6 +899,7 @@ void update_dec_chacha20_poly1305_avx2(const void *key,
                                         IMB_DIR_DECRYPT, IMB_ARCH_AVX2, 1, 0);
 }
 
+#ifdef AVX_IFMA
 void update_dec_chacha20_poly1305_fma_avx2(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
                                      void *dst, const void *src,
@@ -899,6 +908,7 @@ void update_dec_chacha20_poly1305_fma_avx2(const void *key,
         update_chacha20_poly1305_direct(key, ctx, dst, src, len,
                                         IMB_DIR_DECRYPT, IMB_ARCH_AVX2, 1, 1);
 }
+#endif
 
 void update_dec_chacha20_poly1305_avx512(const void *key,
                                      struct chacha20_poly1305_context_data *ctx,
@@ -936,11 +946,13 @@ void finalize_chacha20_poly1305_avx2(struct chacha20_poly1305_context_data *ctx,
         finalize_chacha20_poly1305_direct(ctx, tag, tag_len, IMB_ARCH_AVX2, 1, 0);
 }
 
+#ifdef AVX_IFMA
 void finalize_chacha20_poly1305_fma_avx2(struct chacha20_poly1305_context_data *ctx,
                                          void *tag, const uint64_t tag_len)
 {
         finalize_chacha20_poly1305_direct(ctx, tag, tag_len, IMB_ARCH_AVX2, 1, 1);
 }
+#endif
 
 void finalize_chacha20_poly1305_avx512(
                                     struct chacha20_poly1305_context_data *ctx,
diff --git a/lib/x86_64/cpu_feature.c b/lib/x86_64/cpu_feature.c
index 74b245f7..3421ad2a 100644
--- a/lib/x86_64/cpu_feature.c
+++ b/lib/x86_64/cpu_feature.c
@@ -178,7 +178,11 @@ static uint32_t detect_avx512_ifma(void)
 static uint32_t detect_avx_ifma(void)
 {
         /* Check presence of AVX-IFMA - bit 23 of EAX */
+#ifdef AVX_IFMA
         return (cpuid_7_1.eax & (1UL << 23));
+#else
+        return 0;
+#endif
 }
 
 static uint32_t detect_bmi2(void)
-- 
GitLab


From 2715a46d8dd0689ca44ef9491df8f203324cc2e0 Mon Sep 17 00:00:00 2001
From: Colin Ian King <colin.i.king@gmail.com>
Date: Mon, 16 Jan 2023 12:08:09 +0000
Subject: [PATCH 055/332] test: remove redundant initialization of variable j

Variable j is being initialized with zero however this value is never
read and j is being re-assigned later in for-loop. Remove the redundant
initialization.

Found using cppcheck static analysis

Signed-off-by: Colin Ian King <colin.i.king@gmail.com>
---
 test/zuc_test.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/test/zuc_test.c b/test/zuc_test.c
index 0823a547..919bd420 100644
--- a/test/zuc_test.c
+++ b/test/zuc_test.c
@@ -102,7 +102,7 @@ static uint32_t createData(uint8_t *pSrcData[MAXBUFS],
                 pSrcData[i] = (uint8_t *)malloc(MAX_BUFFER_LENGTH_IN_BYTES);
 
                 if (!pSrcData[i]) {
-                        uint32_t j = 0;
+                        uint32_t j;
 
                         printf("malloc(pSrcData[i]): failed!\n");
 
@@ -136,7 +136,7 @@ static uint32_t createKeyVecData(uint32_t keyLen, uint8_t *pKeys[MAXBUFS],
         uint32_t i = 0;
 
         for (i = 0; i < numOfBuffs; i++) {
-                uint32_t j = 0;
+                uint32_t j;
 
                 pIV[i] = (uint8_t *)malloc(ivLen);
 
-- 
GitLab


From acdb096a8944e2f1fdba4a6abffd5afcbbd33a35 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 30 Jan 2023 14:18:04 +0000
Subject: [PATCH 056/332] avx: [gcm] fix for Windows self-test issue #115

GCM finalize function was clobbering registers xmm10 and xmm13 on Windows.
---
 lib/include/gcm_avx_gen2.inc | 29 ++++++++++++++++-------------
 1 file changed, 16 insertions(+), 13 deletions(-)

diff --git a/lib/include/gcm_avx_gen2.inc b/lib/include/gcm_avx_gen2.inc
index 76c09c2b..14a14fa8 100644
--- a/lib/include/gcm_avx_gen2.inc
+++ b/lib/include/gcm_avx_gen2.inc
@@ -2526,22 +2526,25 @@ FN_NAME(dec,_finalize_):
 
 %ifidn __OUTPUT_FORMAT__, win64
 	; xmm6:xmm15 need to be maintained for Windows
-	sub	rsp, 5*16
-	vmovdqu	[rsp + 0*16],xmm6
-	vmovdqu	[rsp + 1*16],xmm9
-	vmovdqu	[rsp + 2*16],xmm11
-	vmovdqu	[rsp + 3*16],xmm14
-	vmovdqu	[rsp + 4*16],xmm15
+	sub	rsp, 7*16
+        vmovdqu	[rsp + 0*16], xmm6
+        vmovdqu	[rsp + 1*16], xmm9
+        vmovdqu	[rsp + 2*16], xmm10
+        vmovdqu	[rsp + 3*16], xmm11
+        vmovdqu	[rsp + 4*16], xmm13
+        vmovdqu	[rsp + 5*16], xmm14
+        vmovdqu	[rsp + 6*16], xmm15
 %endif
 	GCM_COMPLETE	arg1, arg2, arg3, arg4
-
 %ifidn __OUTPUT_FORMAT__, win64
-	vmovdqu	xmm15  , [rsp + 4*16]
-	vmovdqu	xmm14  , [rsp + 3*16]
-	vmovdqu	xmm11  , [rsp + 2*16]
-	vmovdqu	xmm9 , [rsp + 1*16]
-	vmovdqu	xmm6 , [rsp + 0*16]
-	add	rsp, 5*16
+        vmovdqu	xmm15, [rsp + 6*16]
+        vmovdqu	xmm14, [rsp + 5*16]
+        vmovdqu	xmm13, [rsp + 4*16]
+        vmovdqu	xmm11, [rsp + 3*16]
+        vmovdqu	xmm10, [rsp + 2*16]
+        vmovdqu	xmm9,  [rsp + 1*16]
+        vmovdqu	xmm6,  [rsp + 0*16]
+        add     rsp, 7*16
 %endif
 
 	pop r12
-- 
GitLab


From 7e8c87f17ed724e5a3e5e0612fc17480af74b7e1 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 30 Jan 2023 14:20:36 +0000
Subject: [PATCH 057/332] avx2: [gcm] fix for xmm14 register being clobbered
 during self-test on Windows

GCM initialization function was using xmm14 without properly saving and restoring it on Windows.
---
 lib/include/gcm_avx_gen4.inc | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/lib/include/gcm_avx_gen4.inc b/lib/include/gcm_avx_gen4.inc
index fd0ce417..1207c11e 100644
--- a/lib/include/gcm_avx_gen4.inc
+++ b/lib/include/gcm_avx_gen4.inc
@@ -3258,8 +3258,9 @@ FN_NAME(init_var_iv,_):
         push    r15
         mov     r14, rsp
 	; xmm6 needs to be maintained for Windows
-	sub	rsp, 1*16
+	sub	rsp, 2*16
 	vmovdqu	[rsp + 0*16], xmm6
+	vmovdqu	[rsp + 1*16], xmm14
 %endif
 
 %ifdef SAFE_PARAM
@@ -3309,7 +3310,8 @@ skip_iv_len_12_init_IV:
 exit_init_IV:
 
 %ifidn __OUTPUT_FORMAT__, win64
-	vmovdqu	xmm6 , [rsp + 0*16]
+	vmovdqu	xmm6, [rsp + 0*16]
+	vmovdqu	xmm14, [rsp + 1*16]
         mov     rsp, r14
         pop     r15
         pop     r14
-- 
GitLab


From 5453d91ddc0a0968f5e7c8971f11213e58102991 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 20 Jan 2023 14:22:26 +0000
Subject: [PATCH 058/332] lib: Rename SNOW3G include file extensions

---
 lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm   | 2 +-
 lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm   | 2 +-
 ...a2_by16_vaes_avx512.asm => snow3g_uea2_by16_vaes_avx512.inc} | 0
 lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/{snow3g_uea2_by4_sse.asm => snow3g_uea2_by4_sse.inc} | 0
 lib/win_x64.mak                                                 | 1 -
 7 files changed, 4 insertions(+), 5 deletions(-)
 rename lib/avx512_t2/{snow3g_uea2_by16_vaes_avx512.asm => snow3g_uea2_by16_vaes_avx512.inc} (100%)
 rename lib/sse_t1/{snow3g_uea2_by4_sse.asm => snow3g_uea2_by4_sse.inc} (100%)

diff --git a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
index b34b2d83..028cff26 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
@@ -32,7 +32,7 @@
 %include "include/os.inc"
 %include "include/clear_regs.inc"
 
-%include "avx512_t2/snow3g_uea2_by16_vaes_avx512.asm"
+%include "avx512_t2/snow3g_uea2_by16_vaes_avx512.inc"
 
 %ifndef SUBMIT_JOB_SNOW3G_UEA2
 %define SUBMIT_JOB_SNOW3G_UEA2_GEN2 submit_job_snow3g_uea2_vaes_avx512
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
index f2ba1553..6c4c3490 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
@@ -32,7 +32,7 @@
 %include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
-%include "avx512_t2/snow3g_uea2_by16_vaes_avx512.asm"
+%include "avx512_t2/snow3g_uea2_by16_vaes_avx512.inc"
 
 %ifndef SUBMIT_JOB_SNOW3G_UIA2
 %define SUBMIT_JOB_SNOW3G_UIA2_GEN2     submit_job_snow3g_uia2_vaes_avx512
diff --git a/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm b/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.inc
similarity index 100%
rename from lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.asm
rename to lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.inc
diff --git a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
index ec1e30a7..ef82a397 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.inc"
-%include "sse_t1/snow3g_uea2_by4_sse.asm"
+%include "sse_t1/snow3g_uea2_by4_sse.inc"
 
 %define SUBMIT_JOB_SNOW3G_UEA2 submit_job_snow3g_uea2_sse
 %define FLUSH_JOB_SNOW3G_UEA2 flush_job_snow3g_uea2_sse
diff --git a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
index 6e1c8ea3..9ecdb404 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
-%include "sse_t1/snow3g_uea2_by4_sse.asm"
+%include "sse_t1/snow3g_uea2_by4_sse.inc"
 
 %define SUBMIT_JOB_SNOW3G_UIA2 submit_job_snow3g_uia2_sse
 %define FLUSH_JOB_SNOW3G_UIA2 flush_job_snow3g_uia2_sse
diff --git a/lib/sse_t1/snow3g_uea2_by4_sse.asm b/lib/sse_t1/snow3g_uea2_by4_sse.inc
similarity index 100%
rename from lib/sse_t1/snow3g_uea2_by4_sse.asm
rename to lib/sse_t1/snow3g_uea2_by4_sse.inc
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index c31023db..f309e208 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -260,7 +260,6 @@ lib_objs1 = \
 	$(OBJ_DIR)\zuc_x16_vaes_avx512.obj \
 	$(OBJ_DIR)\zuc_iv.obj \
 	$(OBJ_DIR)\snow3g_sse.obj \
-	$(OBJ_DIR)\snow3g_uea2_by4_sse.obj \
 	$(OBJ_DIR)\snow3g_uia2_by4_sse.obj \
 	$(OBJ_DIR)\snow3g_avx.obj \
 	$(OBJ_DIR)\snow3g_avx2.obj \
-- 
GitLab


From 6ecdfe05cc2a3ae7b0c2a3514dbea7da2ea10cd0 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 24 Jan 2023 00:06:14 +0000
Subject: [PATCH 059/332] lib: Experimental Windows CMake support

---
 lib/CMakeLists.txt | 236 ++++++++++++++++++++++++++++++++-------------
 1 file changed, 169 insertions(+), 67 deletions(-)

diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index 63f2fac5..a4480768 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -30,8 +30,12 @@
 cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb)
 
+# Ensure building entire project
+if(NOT PROJECT_BUILD)
+  message(FATAL_ERROR "Please run CMake from project root directory")
+endif()
+
 # set default options
-option(AESNI_EMU "AESNI emulation support" OFF)
 option(SAFE_PARAM "Parameter checking" ON)
 option(SAFE_DATA "Clear sensitive data from registers and memory" ON)
 option(SAFE_LOOKUP "Secure table lookups" ON)
@@ -39,6 +43,7 @@ option(SAFE_OPTIONS "Library security features" ON)
 option(NO_COMPAT_IMB_API_053 "Disable compatibility with v0.53" ON)
 option(BUILD_SHARED_LIBS "Build shared library" ON)
 set(EXTRA_CFLAGS "" CACHE STRING "Extra compiler flags")
+set(CMAKE_GENERATOR_PLATFORM "x64" CACHE STRING "Platform arch" FORCE)
 
 # disable all SAFE options when SAFE_OPTIONS false
 if(NOT SAFE_OPTIONS)
@@ -48,6 +53,25 @@ if(NOT SAFE_OPTIONS)
   set(SAFE_LOOKUP OFF)
 endif()
 
+# detect Linux or Windows
+if(CMAKE_HOST_UNIX)
+  set(LINUX 1)
+  set(LIB IPSec_MB) # 'lib' prefix assumed on Linux
+else()
+  set(WINDOWS 1)
+  set(LIB libIPSec_MB)
+  if(NOT (${CMAKE_GENERATOR_PLATFORM} MATCHES "x64"))
+    message(FATAL_ERROR "Only 64-bit platform supported. Re-run with '-A x64' option.")
+  endif()
+endif()
+
+# temporarily enable AESNI emulation build by default on Windows
+if(WINDOWS)
+  option(AESNI_EMU "AESNI emulation support" ON)
+else()
+  option(AESNI_EMU "AESNI emulation support" OFF)
+endif()
+
 message(STATUS "AESNI emulation support... ${AESNI_EMU}")
 message(STATUS "SAFE_OPTIONS...            ${SAFE_OPTIONS}")
 message(STATUS "SAFE_PARAM...              ${SAFE_PARAM}")
@@ -56,6 +80,9 @@ message(STATUS "SAFE_LOOKUP...             ${SAFE_LOOKUP}")
 message(STATUS "BUILD_SHARED_LIBS...       ${BUILD_SHARED_LIBS}")
 message(STATUS "EXTRA_CFLAGS...            ${EXTRA_CFLAGS}")
 message(STATUS "NO_COMPAT_IMB_API_053...   ${NO_COMPAT_IMB_API_053}")
+message(STATUS "CMAKE_GENERATOR...         ${CMAKE_GENERATOR}")
+message(STATUS "PLATFORM...                ${CMAKE_GENERATOR_PLATFORM}")
+message(STATUS "BUILD_TYPE...              ${CMAKE_BUILD_TYPE}")
 
 # set directories
 set(DIR_CURRENT ${CMAKE_CURRENT_SOURCE_DIR}/)
@@ -90,18 +117,53 @@ if(AESNI_EMU)
 endif()
 
 # set compiler definitions
-set(LIB_DEFINES -DLINUX)
+if(LINUX)
+  set(LIB_DEFINES -DLINUX)
+else()
+  set(LIB_DEFINES )
+endif()
+
+# enable SAFE OPTIONS
 if(SAFE_DATA)
-  list(APPEND LIB_DEFINES -DSAFE_DATA)
+  if(LINUX)
+    list(APPEND LIB_DEFINES -DSAFE_DATA)
+  else()
+    list(APPEND LIB_DEFINES SAFE_DATA)
+  endif()
+  string(APPEND CMAKE_ASM_NASM_FLAGS " -DSAFE_DATA")
 endif()
 if(SAFE_PARAM)
-  list(APPEND LIB_DEFINES -DSAFE_PARAM)
+  if(LINUX)
+    list(APPEND LIB_DEFINES -DSAFE_PARAM)
+  else()
+    list(APPEND LIB_DEFINES SAFE_PARAM)
+  endif()
+  string(APPEND CMAKE_ASM_NASM_FLAGS " -DSAFE_PARAM")
 endif()
 if(SAFE_LOOKUP)
-  list(APPEND LIB_DEFINES -DSAFE_LOOKUP)
+  if(LINUX)
+    list(APPEND LIB_DEFINES -DSAFE_LOOKUP)
+  else()
+    list(APPEND LIB_DEFINES SAFE_LOOKUP)
+  endif()
+  string(APPEND CMAKE_ASM_NASM_FLAGS " -DSAFE_LOOKUP")
 endif()
+if(AESNI_EMU)
+  if(LINUX)
+    list(APPEND LIB_DEFINES -DAESNI_EMU)
+  else()
+    list(APPEND LIB_DEFINES AESNI_EMU)
+  endif()
+  string(APPEND CMAKE_ASM_NASM_FLAGS " -DAESNI_EMU")
+endif()
+
+# enable backward compatibility
 if(NO_COMPAT_IMB_API_053)
-  list(APPEND LIB_DEFINES -DNO_COMPAT_IMB_API_053)
+  if(LINUX)
+    list(APPEND LIB_DEFINES -DNO_COMPAT_IMB_API_053)
+  else()
+    list(APPEND LIB_DEFINES NO_COMPAT_IMB_API_053)
+  endif()
 endif()
 
 # set up NASM compilation
@@ -118,7 +180,14 @@ foreach(DIR ${DIR_SOURCES})
 endforeach()
 
 # set NASM flags
-set(CMAKE_ASM_NASM_FLAGS "-Werror -felf64 -Xgnu -gdwarf -I${DIR_INCLUDE}")
+if(LINUX)
+  string(APPEND CMAKE_ASM_NASM_FLAGS " -Werror -felf64 -Xgnu -gdwarf -I${DIR_INCLUDE}")
+else()
+  # Windows
+  string(APPEND CMAKE_ASM_NASM_FLAGS " -Werror -Xvc -DWIN_ABI")
+  set_source_files_properties(${SRC_FILES_ASM} PROPERTIES
+    COMPILE_FLAGS "$<$<CONFIG:DEBUG>:-gcv8>")
+endif()
 
 # generate list of C source files
 file(GLOB SRC_FILES_AVX_T1 "${DIR_AVX_T1}/*.c")
@@ -132,69 +201,90 @@ file(GLOB SRC_FILES_SSE_T2 "${DIR_SSE_T2}/*.c")
 file(GLOB SRC_FILES_SSE_T3 "${DIR_SSE_T3}/*.c")
 file(GLOB SRC_FILES_X86_64 "${DIR_X86_64}/*.c")
 file(GLOB SRC_FILES_NO_AESNI "${DIR_NO_AESNI}/*.c")
+if(WINDOWS)
+  set(SRC_DEF_FILE libIPSec_MB.def)
+endif()
 
 # set compiler flags
-set_source_files_properties(
-  ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
-  PPROPERTIES COMPILE_FLAGS
-  "-march=sandybridge -maes -mpclmul")
-set_source_files_properties(
-  ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
-  PPROPERTIES COMPILE_FLAGS
-  "-march=haswell -maes -mpclmul")
-set_source_files_properties(
-  ${SRC_FILES_AVX512_T1} ${SRC_FILES_AVX512_T2}
-  PPROPERTIES COMPILE_FLAGS 
-  "-march=broadwell -maes -mpclmul")
-set_source_files_properties(
-  ${SRC_FILES_SSE_T1} ${SRC_FILES_SSE_T2} ${SRC_FILES_SSE_T3} 
-  PROPERTIES COMPILE_FLAGS
-  "-march=nehalem -maes -mpclmul")
-set_source_files_properties(
-  ${SRC_FILES_X86_64}
-  PROPERTIES COMPILE_FLAGS 
-  "-msse4.2")
-if(AESNI_EMU)
+# linux flags
+if(LINUX)
   set_source_files_properties(
-    ${SRC_FILES_NO_AESNI}
+    ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
+    PPROPERTIES COMPILE_FLAGS
+    "-march=sandybridge -maes -mpclmul")
+  set_source_files_properties(
+    ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
+    PPROPERTIES COMPILE_FLAGS
+    "-march=haswell -maes -mpclmul")
+  set_source_files_properties(
+    ${SRC_FILES_AVX512_T1} ${SRC_FILES_AVX512_T2}
+    PPROPERTIES COMPILE_FLAGS
+    "-march=broadwell -maes -mpclmul")
+  set_source_files_properties(
+    ${SRC_FILES_SSE_T1} ${SRC_FILES_SSE_T2} ${SRC_FILES_SSE_T3}
     PROPERTIES COMPILE_FLAGS
-    "-march=nehalem -mno-pclmul")
-  list(APPEND SOURCES ${SRC_FILES_NO_AESNI})
-endif()
-
-set(CFLAGS "
-  -fPIC
-  -W
-  -Wall
-  -Wextra
-  -Wmissing-declarations
-  -Wpointer-arith
-  -Wcast-qual
-  -Wundef
-  -Wwrite-strings
-  -Wformat
-  -Wformat-security
-  -Wunreachable-code
-  -Wmissing-noreturn
-  -Wsign-compare
-  -Wno-endif-labels
-  -Wstrict-prototypes
-  -Wmissing-prototypes
-  -Wold-style-definition
-  -fno-delete-null-pointer-checks
-  -fwrapv"
-  )
-# -fno-strict-overflow is not supported by clang
-if(CMAKE_COMPILER_IS_GNUCC)
-  list(APPEND CFLAGS "-fno-strict-overflow")
-endif()
-if(${CMAKE_BUILD_TYPE} STREQUAL "Debug")
-  list(APPEND CFLAGS "-g -DDEBUG")
-  list(APPEND CFLAGS "-O0")
+    "-march=nehalem -maes -mpclmul")
+  set_source_files_properties(
+    ${SRC_FILES_X86_64}
+    PROPERTIES COMPILE_FLAGS
+    "-msse4.2")
+  if(AESNI_EMU)
+    set_source_files_properties(
+      ${SRC_FILES_NO_AESNI}
+      PROPERTIES COMPILE_FLAGS
+      "-march=nehalem -mno-pclmul")
+  endif()
+
+  set(CMAKE_C_FLAGS "
+    -fPIC
+    -W
+    -Wall
+    -Wextra
+    -Wmissing-declarations
+    -Wpointer-arith
+    -Wcast-qual
+    -Wundef
+    -Wwrite-strings
+    -Wformat
+    -Wformat-security
+    -Wunreachable-code
+    -Wmissing-noreturn
+    -Wsign-compare
+    -Wno-endif-labels
+    -Wstrict-prototypes
+    -Wmissing-prototypes
+    -Wold-style-definition
+    -fno-delete-null-pointer-checks
+    -fwrapv"
+    )
+  # -fno-strict-overflow is not supported by clang
+  if(CMAKE_COMPILER_IS_GNUCC)
+    string(APPEND CMAKE_C_FLAGS " -fno-strict-overflow")
+  endif()
+  if(${CMAKE_BUILD_TYPE} STREQUAL "Debug")
+    string(APPEND CMAKE_C_FLAGS " -g -DDEBUG")
+    string(APPEND CMAKE_C_FLAGS " -O0")
+  else()
+    string(APPEND CMAKE_C_FLAGS " -O2 -fstack-protector -d_fortify_source=2")
+  endif()
 else()
-  list(APPEND CFLAGS "-O2 -fstack-protector -d_fortify_source=2")
+  # Windows flags
+  set(CMAKE_C_FLAGS "/nologo /Y- /W3 /WX- /Gm- /fp:precise /EHsc")
+  set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
+  set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
+  set(CMAKE_SHARED_LINKER_FLAGS "/nologo")
+  set(CMAKE_SHARED_LINKER_FLAGS_RELEASE "/RELEASE /DEBUG /OPT:REF /OPT:ICF /INCREMENTAL:NO")
+  set(CMAKE_SHARED_LINKER_FLAGS_DEBUG "/DEBUG /INCREMENTAL:NO")
+  set(CMAKE_STATIC "/nologo /nodefaultlib")
+  set_source_files_properties(
+    ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
+    ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
+    ${SRC_FILES_AVX512_T1} ${SRC_FILES_AVX512_T2}
+    PPROPERTIES COMPILE_FLAGS
+    "${CMAKE_C_FLAGS} /arch:AVX")
 endif()
-list(APPEND CFLAGS ${EXTRA_CFLAGS})
+
+list(APPEND CMAKE_C_FLAGS ${EXTRA_CFLAGS})
 
 set(SRC_FILES_C
   ${SRC_FILES_AVX_T1}
@@ -212,8 +302,20 @@ if(AESNI_EMU)
   list(APPEND SRC_FILES_C ${SRC_FILES_NO_AESNI})
 endif()
 
+if(NOT LINUX)
+  foreach(FILE ${SRC_FILES_C})
+    set_source_files_properties(${FILE} PROPERTIES
+      COMPILE_DEFINITIONS "${LIB_DEFINES}")
+  endforeach()
+
+  foreach(FILE ${SRC_FILES_NO_AESNI})
+    set_source_files_properties(${FILE} PROPERTIES
+      COMPILE_DEFINITIONS "${LIB_DEFINES}"
+      COMPILE_OPTIONS "$<$<CONFIG:RELEASE>:/Od>")
+  endforeach()
+endif()
+
 # add the library
-add_library(IPSec_MB ${SRC_FILES_ASM} ${SRC_FILES_C})
-target_include_directories(IPSec_MB PRIVATE ${DIR_CURRENT} ${DIR_INCLUDE} ${DIR_NO_AESNI})
-target_compile_definitions(IPSec_MB PRIVATE ${LIB_DEFINES})
+add_library(${LIB} ${SRC_FILES_ASM} ${SRC_FILES_C} ${SRC_DEF_FILE})
+target_include_directories(${LIB} PRIVATE ${DIR_CURRENT} ${DIR_INCLUDE} ${DIR_NO_AESNI})
 
-- 
GitLab


From f3ae82e7f599f3baf118695be0108422fc2ff2b1 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 24 Jan 2023 00:06:48 +0000
Subject: [PATCH 060/332] test: Experimental Windows CMake support

---
 test/CMakeLists.txt | 156 ++++++++++++++++++++++++++------------------
 1 file changed, 93 insertions(+), 63 deletions(-)

diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index e0ce650f..019fd400 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -26,22 +26,42 @@
 cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb)
 
+# Ensure building entire project
+if(NOT PROJECT_BUILD)
+  message(FATAL_ERROR "Please run CMake from project root directory")
+endif()
+
 # #################
 # Test Applications
 # #################
 
 set(TEST_APP ipsec_MB_testapp)
 set(XVALID_APP ipsec_xvalid_test)
-set(IPSEC_MB_LIB IPSec_MB)
 set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../lib)
 
+# detect Linux or Windows system
+if(CMAKE_HOST_UNIX)
+  set(LINUX 1)
+  set(IPSEC_MB_LIB IPSec_MB)
+else()
+  set(WINDOWS 1)
+  set(IPSEC_MB_LIB libIPSec_MB)
+  if(NOT (${CMAKE_GENERATOR_PLATFORM} MATCHES "x64"))
+    MESSAGE(FATAL_ERROR "Only 64-bit platform supported. Re-run with '-A x64' option.")
+  endif()
+endif()
+
 # set up NASM compilation
 enable_language(ASM_NASM)
 if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
   message(FATAL_ERROR "Can't find assembler")
 endif()
 set(CAN_USE_ASSEMBLER TRUE)
-set(CMAKE_ASM_NASM_FLAGS "-felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
+if(LINUX)
+  set(CMAKE_ASM_NASM_FLAGS "-felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
+else()
+  set(CMAKE_ASM_NASM_FLAGS "-Werror -fwin64 -Xvc -DWIN_ABI")
+endif()
 
 # set ipsec_MB_test source files
 set(TEST_APP_SRC_FILES
@@ -51,81 +71,91 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/customop_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/des_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/ccm_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/cmac_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/utils.c
-	${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha1_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha256_sha512_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/hmac_md5_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/aes_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/sha_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/chained_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/api_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/pon_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/ecb_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/zuc_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/kasumi_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/snow3g_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/direct_api_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/clear_mem_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/hec_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/xcbc_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/aes_cbcs_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/crc_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/chacha_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/poly1305_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/chacha20_poly1305_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/null_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/snow_v_test.c
-	${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/cmac_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/utils.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha1_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha256_sha512_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_md5_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/aes_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/sha_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/chained_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/api_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/pon_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/ecb_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/zuc_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/kasumi_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/snow3g_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/clear_mem_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hec_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/xcbc_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/aes_cbcs_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/crc_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/chacha_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/poly1305_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/chacha20_poly1305_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/null_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/snow_v_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
 )
 
 # set ipsec_xvalid_test source files
-set(XVALID_APP_SRC_FILES
+set(XVALID_APP_SRC_FILES_C
   ${CMAKE_CURRENT_SOURCE_DIR}/ipsec_xvalid.c
   ${CMAKE_CURRENT_SOURCE_DIR}/utils.c
+)
+set(XVALID_APP_SRC_FILES_ASM
   ${CMAKE_CURRENT_SOURCE_DIR}/misc.asm
 )
 
 # set flags for different OS's
-set(CFLAGS "
-  -MMD
-  -W
-  -Wall
-  -Wextra 
-  -Wmissing-declarations
-  -Wpointer-arith
-  -Wcast-qual -Wundef
-  -Wwrite-strings
-  -Wformat -Wformat-security
-  -Wunreachable-code
-  -Wmissing-noreturn
-  -Wsign-compare
-  -Wno-endif-labels
-  -Wstrict-prototypes
-  -Wmissing-prototypes
-  -Wold-style-definition
-  -fno-delete-null-pointer-checks
-  -fwrapv"
-)
-
-# -fno-strict-overflow is not supported by clang
-if(CMAKE_COMPILER_IS_GNUCC)
-  list(APPEND CFLAGS "-fno-strict-overflow")
+if(LINUX)
+  set(CMAKE_C_FLAGS "
+    -MMD
+    -W
+    -Wall
+    -Wextra
+    -Wmissing-declarations
+    -Wpointer-arith
+    -Wcast-qual -Wundef
+    -Wwrite-strings
+    -Wformat -Wformat-security
+    -Wunreachable-code
+    -Wmissing-noreturn
+    -Wsign-compare
+    -Wno-endif-labels
+    -Wstrict-prototypes
+    -Wmissing-prototypes
+    -Wold-style-definition
+    -fno-delete-null-pointer-checks
+    -fwrapv"
+  )
+  # -fno-strict-overflow is not supported by clang
+  if(CMAKE_COMPILER_IS_GNUCC)
+    list(APPEND CMAKE_C_FLAGS "-fno-strict-overflow")
+  endif()
+else()
+  # windows
+  set(CMAKE_C_FLAGS "/nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc ${EXTRA_CFLAGS}")
+  set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
+  set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
+  set(CMAKE_EXE_LINKER_FLAGS_DEBUG "/debug")
 endif()
 
-set(APP_DEFINES 
-  -DLINUX
-  -D_GNU_SOURCE
-  -DNO_COMPAT_IMB_API_053
-)
+if(LINUX)
+  set(APP_DEFINES
+    -DLINUX
+    -D_GNU_SOURCE
+    -DNO_COMPAT_IMB_API_053
+  )
+endif()
 
-add_executable(${XVALID_APP} ${XVALID_APP_SRC_FILES})
-target_link_libraries(${XVALID_APP} PRIVATE ${IPSEC_MB_LIB})
-target_compile_definitions(${XVALID_APP} PRIVATE ${APP_DEFINES})
-target_include_directories(${XVALID_APP} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR})
+include_directories(${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR})
+link_directories(${LIB_DIR})
 
 add_executable(${TEST_APP} ${TEST_APP_SRC_FILES})
 target_link_libraries(${TEST_APP} PRIVATE ${IPSEC_MB_LIB})
 target_compile_definitions(${TEST_APP} PRIVATE ${APP_DEFINES})
-target_include_directories(${TEST_APP} PRIVATE ${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR})
 
+add_executable(${XVALID_APP} ${XVALID_APP_SRC_FILES_C} ${XVALID_APP_SRC_FILES_ASM})
+target_link_libraries(${XVALID_APP} PUBLIC ${IPSEC_MB_LIB})
-- 
GitLab


From bc5207a8f2e86f22cc4bbf0e8dd09ae0fab0ec80 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 24 Jan 2023 15:04:25 +0000
Subject: [PATCH 061/332] lib: Disable AESNI emulation in default Windows CMake
 build

---
 CMakeLists.txt     |  3 +++
 lib/CMakeLists.txt | 26 +++++++++++++++++---------
 2 files changed, 20 insertions(+), 9 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 6230467c..2972c54e 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -37,5 +37,8 @@ if("${CMAKE_BUILD_TYPE}" STREQUAL "")
   set(CMAKE_BUILD_TYPE "Release")
 endif()
 
+# Flag to force full project build
+set(PROJECT_BUILD TRUE)
+
 add_subdirectory(lib)
 add_subdirectory(test)
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index a4480768..5baf8022 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -36,6 +36,7 @@ if(NOT PROJECT_BUILD)
 endif()
 
 # set default options
+option(AESNI_EMU "AESNI emulation support" OFF)
 option(SAFE_PARAM "Parameter checking" ON)
 option(SAFE_DATA "Clear sensitive data from registers and memory" ON)
 option(SAFE_LOOKUP "Secure table lookups" ON)
@@ -65,13 +66,6 @@ else()
   endif()
 endif()
 
-# temporarily enable AESNI emulation build by default on Windows
-if(WINDOWS)
-  option(AESNI_EMU "AESNI emulation support" ON)
-else()
-  option(AESNI_EMU "AESNI emulation support" OFF)
-endif()
-
 message(STATUS "AESNI emulation support... ${AESNI_EMU}")
 message(STATUS "SAFE_OPTIONS...            ${SAFE_OPTIONS}")
 message(STATUS "SAFE_PARAM...              ${SAFE_PARAM}")
@@ -202,7 +196,7 @@ file(GLOB SRC_FILES_SSE_T3 "${DIR_SSE_T3}/*.c")
 file(GLOB SRC_FILES_X86_64 "${DIR_X86_64}/*.c")
 file(GLOB SRC_FILES_NO_AESNI "${DIR_NO_AESNI}/*.c")
 if(WINDOWS)
-  set(SRC_DEF_FILE libIPSec_MB.def)
+  set(SRC_DEF_FILE ${LIB}_lnk.def)
 endif()
 
 # set compiler flags
@@ -302,7 +296,8 @@ if(AESNI_EMU)
   list(APPEND SRC_FILES_C ${SRC_FILES_NO_AESNI})
 endif()
 
-if(NOT LINUX)
+if(WINDOWS)
+  # set extra windows compiler flags
   foreach(FILE ${SRC_FILES_C})
     set_source_files_properties(${FILE} PROPERTIES
       COMPILE_DEFINITIONS "${LIB_DEFINES}")
@@ -313,6 +308,19 @@ if(NOT LINUX)
       COMPILE_DEFINITIONS "${LIB_DEFINES}"
       COMPILE_OPTIONS "$<$<CONFIG:RELEASE>:/Od>")
   endforeach()
+
+  # generate windows DEF file
+  if(AESNI_EMU)
+    set(GEN_DEF_FILE_CMD "copy /Y ${LIB}.def ${SRC_DEF_FILE}")
+  else()
+    # remove AESNI emulation symbol exports
+    set(GEN_DEF_FILE_CMD "findstr /v _no_aesni ${LIB}.def > ${SRC_DEF_FILE}")
+  endif()
+  execute_process(
+    COMMAND cmd /C ${GEN_DEF_FILE_CMD}
+    WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
+    OUTPUT_QUIET
+  )
 endif()
 
 # add the library
-- 
GitLab


From 3cfdc69433d68f433fa638e7d895419f8d94e1b7 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 26 Jan 2023 17:33:08 +0000
Subject: [PATCH 062/332] lib: Update CMake to build avx2_t3 files on Windows

---
 CMakeLists.txt     |  1 -
 lib/CMakeLists.txt | 38 +++++++++++++++++++++++++++++++-------
 2 files changed, 31 insertions(+), 8 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 2972c54e..3dd26f2f 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -33,7 +33,6 @@ if(("${CMAKE_C_COMPILER_ID}" STREQUAL "GNU") AND
 endif()
 
 if("${CMAKE_BUILD_TYPE}" STREQUAL "")
-  message(STATUS "CMAKE_BUILD_TYPE not set, defaulting to Release")
   set(CMAKE_BUILD_TYPE "Release")
 endif()
 
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index 5baf8022..70a1a438 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -27,9 +27,6 @@
 # Build IPSec_MB library
 # ##############################################################################
 
-cmake_minimum_required(VERSION 3.16)
-project(intel-ipsec-mb)
-
 # Ensure building entire project
 if(NOT PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
@@ -43,6 +40,7 @@ option(SAFE_LOOKUP "Secure table lookups" ON)
 option(SAFE_OPTIONS "Library security features" ON)
 option(NO_COMPAT_IMB_API_053 "Disable compatibility with v0.53" ON)
 option(BUILD_SHARED_LIBS "Build shared library" ON)
+option(CMAKE_VERBOSE_MAKEFILE "Verbose build output" OFF)
 set(EXTRA_CFLAGS "" CACHE STRING "Extra compiler flags")
 set(CMAKE_GENERATOR_PLATFORM "x64" CACHE STRING "Platform arch" FORCE)
 
@@ -77,6 +75,7 @@ message(STATUS "NO_COMPAT_IMB_API_053...   ${NO_COMPAT_IMB_API_053}")
 message(STATUS "CMAKE_GENERATOR...         ${CMAKE_GENERATOR}")
 message(STATUS "PLATFORM...                ${CMAKE_GENERATOR_PLATFORM}")
 message(STATUS "BUILD_TYPE...              ${CMAKE_BUILD_TYPE}")
+message(STATUS "CMAKE_VERBOSE_MAKEFILE...  ${CMAKE_VERBOSE_MAKEFILE}")
 
 # set directories
 set(DIR_CURRENT ${CMAKE_CURRENT_SOURCE_DIR}/)
@@ -92,6 +91,9 @@ set(DIR_SSE_T2 ${CMAKE_CURRENT_SOURCE_DIR}/sse_t2)
 set(DIR_SSE_T3 ${CMAKE_CURRENT_SOURCE_DIR}/sse_t3)
 set(DIR_X86_64 ${CMAKE_CURRENT_SOURCE_DIR}/x86_64)
 set(DIR_NO_AESNI ${CMAKE_CURRENT_SOURCE_DIR}/no-aesni)
+if(AVX_IFMA)
+  set(DIR_AVX2_T3 ${CMAKE_CURRENT_SOURCE_DIR}/avx2_t3)
+endif()
 
 # list all source directories
 set(DIR_SOURCES
@@ -110,6 +112,10 @@ if(AESNI_EMU)
   list(APPEND DIR_SOURCES ${DIR_NO_AESNI})
 endif()
 
+if(AVX_IFMA)
+  list(APPEND DIR_SOURCES ${DIR_AVX2_T3})
+endif()
+
 # set compiler definitions
 if(LINUX)
   set(LIB_DEFINES -DLINUX)
@@ -160,6 +166,10 @@ if(NO_COMPAT_IMB_API_053)
   endif()
 endif()
 
+if(AVX_IFMA)
+  list(APPEND LIB_DEFINES AVX_IFMA)
+endif()
+
 # set up NASM compilation
 enable_language(ASM_NASM)
 if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
@@ -188,6 +198,7 @@ file(GLOB SRC_FILES_AVX_T1 "${DIR_AVX_T1}/*.c")
 file(GLOB SRC_FILES_AVX_T2 "${DIR_AVX_T2}/*.c")
 file(GLOB SRC_FILES_AVX2_T1 "${DIR_AVX2_T1}/*.c")
 file(GLOB SRC_FILES_AVX2_T2 "${DIR_AVX2_T2}/*.c")
+file(GLOB SRC_FILES_AVX2_T3 "${DIR_AVX2_T3}/*.c")
 file(GLOB SRC_FILES_AVX512_T1 "${DIR_AVX512_T1}/*.c")
 file(GLOB SRC_FILES_AVX512_T2 "${DIR_AVX512_T2}/*.c")
 file(GLOB SRC_FILES_SSE_T1 "${DIR_SSE_T1}/*.c")
@@ -208,6 +219,7 @@ if(LINUX)
     "-march=sandybridge -maes -mpclmul")
   set_source_files_properties(
     ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
+    ${SRC_FILES_AVX2_T3}
     PPROPERTIES COMPILE_FLAGS
     "-march=haswell -maes -mpclmul")
   set_source_files_properties(
@@ -273,7 +285,8 @@ else()
   set_source_files_properties(
     ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
     ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
-    ${SRC_FILES_AVX512_T1} ${SRC_FILES_AVX512_T2}
+    ${SRC_FILES_AVX2_T3} ${SRC_FILES_AVX512_T1}
+    ${SRC_FILES_AVX512_T2}
     PPROPERTIES COMPILE_FLAGS
     "${CMAKE_C_FLAGS} /arch:AVX")
 endif()
@@ -295,6 +308,9 @@ set(SRC_FILES_C
 if(AESNI_EMU)
   list(APPEND SRC_FILES_C ${SRC_FILES_NO_AESNI})
 endif()
+if(AVX_IFMA)
+  list(APPEND SRC_FILES_C ${SRC_FILES_AVX2_T3})
+endif()
 
 if(WINDOWS)
   # set extra windows compiler flags
@@ -310,12 +326,20 @@ if(WINDOWS)
   endforeach()
 
   # generate windows DEF file
-  if(AESNI_EMU)
+  if(NOT AESNI_EMU)
+    set(STR_FILTER "/c:_no_aesni")
+  endif()
+  if(NOT AVX_IFMA)
+    set(STR_FILTER "${STR_FILTER} /c:_avx2_t3")
+  endif()
+
+  # filter unused symbol exports
+  if(NOT STR_FILTER)
     set(GEN_DEF_FILE_CMD "copy /Y ${LIB}.def ${SRC_DEF_FILE}")
   else()
-    # remove AESNI emulation symbol exports
-    set(GEN_DEF_FILE_CMD "findstr /v _no_aesni ${LIB}.def > ${SRC_DEF_FILE}")
+    set(GEN_DEF_FILE_CMD "findstr /v ${STR_FILTER} ${LIB}.def > ${SRC_DEF_FILE}")
   endif()
+
   execute_process(
     COMMAND cmd /C ${GEN_DEF_FILE_CMD}
     WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
-- 
GitLab


From 401d7a096d2dd5aaea7f047e3b268198bbc33128 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Fri, 20 Jan 2023 13:49:45 +0000
Subject: [PATCH 063/332] test [fuzz]: add SNOW3G direct api to fuzz test

---
 test/direct_api_fuzz_test.c | 177 +++++++++++++++++++++++++++++-------
 1 file changed, 145 insertions(+), 32 deletions(-)

diff --git a/test/direct_api_fuzz_test.c b/test/direct_api_fuzz_test.c
index 7747612b..fbbd350c 100644
--- a/test/direct_api_fuzz_test.c
+++ b/test/direct_api_fuzz_test.c
@@ -38,10 +38,30 @@
 int LLVMFuzzerTestOneInput(const uint8_t *, size_t);
 int LLVMFuzzerInitialize(int *, char ***);
 
-int algo;
-int keysize;
-int dir;
-int api;
+enum algorithm {
+        GCM = 1,
+        SNOW3G
+};
+
+enum key_size {
+        SIZE_128 = 1,
+        SIZE_192,
+        SIZE_256
+};
+
+enum direction {
+        ENCRYPT = 1,
+        DECRYPT
+};
+
+enum api_id {
+        SGL = 1
+};
+
+enum algorithm algo;
+enum key_size keysize;
+enum direction dir;
+enum api_id api;
 
 static void parse_matched(int argc, char **argv)
 {
@@ -50,19 +70,21 @@ static void parse_matched(int argc, char **argv)
         for (i = 0; i < argc; i++) {
                 if (strcmp(argv[i], "GCM") == 0) {
                         i++;
-                        algo = 1;
+                        algo = GCM;
                         if (strcmp(argv[i], "128") == 0)
-                                keysize = 1;
+                                keysize = SIZE_128;
                         else if (strcmp(argv[i], "192") == 0)
-                                keysize = 2;
+                                keysize = SIZE_192;
                         else if (strcmp(argv[i], "256") == 0)
-                                keysize = 3;
+                                keysize = SIZE_256;
                 } else if (strcmp(argv[i], "SGL") == 0)
-                        api = 1;
-                else if (strcmp(argv[i], "ENCRYPT") == 0)
-                        dir = 1;
+                        api = SGL;
+                else if (strcmp(argv[i], "SNOW3G") == 0) {
+                        algo = SNOW3G;
+                } else if (strcmp(argv[i], "ENCRYPT") == 0)
+                        dir = ENCRYPT;
                 else if (strcmp(argv[i], "DECRYPT") == 0)
-                        dir = 2;
+                        dir = DECRYPT;
         }
 }
 
@@ -109,16 +131,77 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
 
 	const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
 	struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+
+        const snow3g_key_schedule_t exp_key_s;
+        const snow3g_key_schedule_t *exp_key = &exp_key_s;
+
+        const snow3g_key_schedule_t *const exp_key_s_multi;
+        const snow3g_key_schedule_t *const *exp_key_multi = &exp_key_s_multi;
+
+        snow3g_key_schedule_t exp_key_init;
+        snow3g_key_schedule_t *exp_key_i = &exp_key_init;
+
 	uint8_t *out = buff;
-	const uint8_t *in = buff;
+        uint8_t *out2 = buff;
+        uint8_t *out3 = buff;
+        uint8_t *out4 = buff;
+        uint8_t *out5 = buff;
+        uint8_t *out6 = buff;
+        uint8_t *out7 = buff;
+        uint8_t *out8 = buff;
+        void *out_multi = buff;
+
+        const uint8_t *in = buff;
+	const uint8_t *in2 = buff;
+	const uint8_t *in3 = buff;
+	const uint8_t *in4 = buff;
+	const uint8_t *in5 = buff;
+	const uint8_t *in6 = buff;
+	const uint8_t *in7 = buff;
+	const uint8_t *in8 = buff;
+        const void *const in_multi = buff;
+
 	uint64_t len = dataSize;
+        uint64_t len2 = dataSize;
+        uint64_t len3 = dataSize;
+	uint64_t len4 = dataSize;
+	uint64_t len5 = dataSize;
+	uint64_t len6 = dataSize;
+	uint64_t len7 = dataSize;
+	uint64_t len8 = dataSize;
+        const void *const len_multi = buff;
+
 	const uint8_t *iv = buff;
-	const uint8_t *aad = buff;
+        const uint8_t *iv2 = buff;
+        const uint8_t *iv3 = buff;
+        const uint8_t *iv4 = buff;
+        const uint8_t *iv5 = buff;
+        const uint8_t *iv6 = buff;
+        const uint8_t *iv7 = buff;
+	const uint8_t *iv8 = buff;
+        const void *const iv_multi = buff;
+
+        const uint8_t *aad = buff;
 	uint64_t aad_len = (uint64_t) *buff;
 	uint8_t *auth_tag = buff;
         uint64_t tag_len = (uint64_t) *buff;
+        const uint32_t offset = (uint32_t) *buff;
+        const void *init_key = buff;
 
-	/* allocate multi-buffer manager */
+        const void *iv_n[8];
+        const void *in_n[8];
+        void *out_n[8];
+        uint32_t len_n[8];
+        const uint32_t count = 8;
+
+        for (int i = 0; i < 8; i++) {
+                iv_n[i] = buff;
+                in_n[i] = buff;
+                out_n[i] = buff;
+                len_n[i] = dataSize;
+        }
+
+        /* allocate multi-buffer manager */
         p_mgr = alloc_mb_mgr(0);
         if (p_mgr == NULL) {
                 printf("Error allocating MB_MGR structure!\n");
@@ -141,11 +224,11 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                         init_mb_mgr_auto(p_mgr, &arch);
         }
 
-        if (algo == 1) {
-                if (keysize == 1) {
+        if (algo == GCM) {
+                if (keysize == SIZE_128) {
                         /* 128 key size */
-                        if (dir == 1) {
-                                if (api == 1) {
+                        if (dir == ENCRYPT) {
+                                if (api == SGL) {
                                         IMB_AES128_GCM_ENC(p_mgr, key,
                                                            ctx, out, in, len,
                                                            iv, aad, aad_len,
@@ -162,8 +245,8 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                                                                     auth_tag,
                                                                     tag_len);
                                 }
-                        } else if (dir == 2) {
-                                if (api == 1) {
+                        } else if (dir == DECRYPT) {
+                                if (api == SGL) {
                                         IMB_AES128_GCM_DEC(p_mgr, key,
                                                            ctx, out, in, len,
                                                            iv, aad, aad_len,
@@ -181,10 +264,10 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                                                                     tag_len);
                                 }
                         }
-                } else if (keysize == 2) {
+                } else if (keysize == SIZE_192) {
                         /* 192 key size */
-                        if (dir == 1) {
-                                if (api == 1) {
+                        if (dir == ENCRYPT) {
+                                if (api == SGL) {
                                         IMB_AES192_GCM_ENC(p_mgr, key,
                                                            ctx, out, in, len,
                                                            iv, aad, aad_len,
@@ -201,8 +284,8 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                                                                     auth_tag,
                                                                     tag_len);
                                 }
-                        } else if (dir == 2) {
-                                if (api == 1) {
+                        } else if (dir == DECRYPT) {
+                                if (api == SGL) {
                                         IMB_AES192_GCM_DEC(p_mgr, key,
                                                            ctx, out, in, len,
                                                            iv, aad, aad_len,
@@ -220,10 +303,10 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                                                                     tag_len);
                                 }
                         }
-                } else if (keysize == 3) {
+                } else if (keysize == SIZE_256) {
                         /* 256 key size */
-                        if (dir == 1) {
-                                if (api == 1) {
+                        if (dir == ENCRYPT) {
+                                if (api == SGL) {
                                         IMB_AES256_GCM_ENC(p_mgr, key,
                                                            ctx, out, in, len,
                                                            iv, aad, aad_len,
@@ -240,8 +323,8 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                                                                     auth_tag,
                                                                     tag_len);
                                 }
-                        } else if (dir == 2) {
-                                if (api == 1) {
+                        } else if (dir == DECRYPT) {
+                                if (api == SGL) {
                                         IMB_AES256_GCM_DEC(p_mgr, key,
                                                            ctx, out, in, len,
                                                            iv, aad, aad_len,
@@ -260,8 +343,38 @@ int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
                                 }
                         }
                 }
+        } else if (algo == SNOW3G) {
+                IMB_SNOW3G_INIT_KEY_SCHED(p_mgr, init_key, exp_key_i);
+                IMB_SNOW3G_F8_1_BUFFER_BIT(p_mgr, exp_key, iv, in, out,
+                                           len, offset);
+                IMB_SNOW3G_F8_1_BUFFER(p_mgr, exp_key, iv, in, out,
+                                       len);
+                IMB_SNOW3G_F8_2_BUFFER(p_mgr, exp_key, iv, iv2, in,
+                                               out, len, in2, out2, len2);
+                IMB_SNOW3G_F8_4_BUFFER(p_mgr, exp_key, iv, iv2, iv3,
+                                       iv4, in, out, len, in2, out2,
+                                       len2, in3, out3, len3,
+                                       in4, out4, len4);
+                IMB_SNOW3G_F8_8_BUFFER(p_mgr, exp_key, iv, iv2, iv3,
+                                       iv4, iv5, iv6, iv7, iv8,
+                                       in, out, len, in2, out2, len2,
+                                       in3, out3, len3,
+                                       in4, out4, len4, in5, out5,
+                                       len5, in6, out6, len6, in7,
+                                       out7, len7, in8, out8, len8);
+                IMB_SNOW3G_F8_N_BUFFER(p_mgr, exp_key, iv_n,
+                                       in_n, out_n,
+                                       len_n, count);
+                IMB_SNOW3G_F8_8_BUFFER_MULTIKEY(p_mgr, exp_key_multi,
+                                                iv_multi, in_multi,
+                                                out_multi, len_multi);
+                IMB_SNOW3G_F8_N_BUFFER_MULTIKEY(p_mgr, exp_key_multi,
+                                                iv_n, in_n,
+                                                out_n, len_n,
+                                                count);
+                IMB_SNOW3G_F9_1_BUFFER(p_mgr, exp_key, iv,
+                                       in, len, auth_tag);
         }
-
         free_mb_mgr(p_mgr);
 	free(buff);
         return 0;
-- 
GitLab


From 38634560323855cff5de24745219c36696b55acf Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 31 Jan 2023 16:08:44 +0000
Subject: [PATCH 064/332] lib: [DES-CFB] expose DES-CFB one block API

---
 lib/intel-ipsec-mb.h   | 17 +++++++++++++++++
 lib/libIPSec_MB.def    |  1 +
 lib/x86_64/des_basic.c |  8 ++++++++
 3 files changed, 26 insertions(+)

diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 15c971f0..6ff1cc0a 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -2656,6 +2656,23 @@ IMB_DLL_EXPORT void init_mb_mgr_auto(IMB_MGR *state, IMB_ARCH *arch);
 IMB_DLL_EXPORT int
 des_key_schedule(uint64_t *ks, const void *key);
 
+
+/**
+ * @brief DES-CFB Encrypt/Decrypt up to one block.
+ *
+ * Processes only one buffer at a time.
+ * Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.
+ *
+ * @param [out] out Plaintext/Ciphertext output
+ * @param [in] in   Plaintext/Ciphertext input
+ * @param [in] iv   Pointer to 8 byte IV
+ * @param [in] ks   Pointer to DES key schedule
+ * @param [in] len  Length of data in bytes
+ */
+IMB_DLL_EXPORT void
+des_cfb_one(void *out, const void *in, const uint64_t *iv,
+            const uint64_t *ks, const int len);
+
 /**
  * Authenticate variable sized data with SHA1.
  *
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index 783adbb0..f10b20b3 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -692,3 +692,4 @@ EXPORTS
     submit_job_nocheck_avx2_t3			@666
     get_next_job_avx2_t3                	@667
     get_completed_job_avx2_t3            	@668
+    des_cfb_one					@669
diff --git a/lib/x86_64/des_basic.c b/lib/x86_64/des_basic.c
index bb59c155..fab58b96 100644
--- a/lib/x86_64/des_basic.c
+++ b/lib/x86_64/des_basic.c
@@ -751,3 +751,11 @@ docsis_des_dec_basic(const void *input, void *output, const int size,
                 iv = in_block;
         }
 }
+
+IMB_DLL_EXPORT
+void
+des_cfb_one(void *output, const void *input, const uint64_t *iv,
+            const uint64_t *ks, const int size)
+{
+        cfb_one_basic(input, output, size, ks, iv);
+}
-- 
GitLab


From eefe2c2a35e34b06e355cf89c3984f94ba15087f Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 31 Jan 2023 16:09:21 +0000
Subject: [PATCH 065/332] test: [DES] add DES-CFB tests

---
 test/des_test.c | 78 +++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 78 insertions(+)

diff --git a/test/des_test.c b/test/des_test.c
index 165a10dd..b52e5471 100644
--- a/test/des_test.c
+++ b/test/des_test.c
@@ -158,6 +158,10 @@ static struct des_vector docsis_vectors[] = {
         {DK3, DIV3, DP3, sizeof(DP3), DC3},
 };
 
+static struct des_vector des_cfb_vectors[] = {
+        {DK3, DIV3, DP3, sizeof(DP3), DC3},
+};
+
 /* 3DES vectors - 2x and 3x keys */
 
 static const uint8_t D3K1_1[] = {
@@ -609,6 +613,76 @@ test_des3_vectors(struct IMB_MGR *mb_mgr,
 	printf("\n");
 }
 
+static int
+des_cfb_validate(struct test_suite_context *ctx)
+{
+        unsigned i;
+
+        printf("DES-CFB standard test vectors:\n");
+        for (i = 0; i < DIM(des_cfb_vectors); i++) {
+                uint8_t output1[8];
+                uint8_t output2[8];
+                uint64_t ks[16];
+
+                des_key_schedule(ks, des_cfb_vectors[i].K);
+
+                /* Out of place */
+
+                /* encrypt test */
+                des_cfb_one(output1, des_cfb_vectors[i].P,
+                            (const uint64_t *)des_cfb_vectors[i].IV, ks,
+                            (int)des_cfb_vectors[i].Plen);
+                if (memcmp(output1, des_cfb_vectors[i].C,
+                            des_cfb_vectors[i].Plen)) {
+                        printf("DES-CFB enc (OOP) vector %d mismatched\n", i);
+                        test_suite_update(ctx, 0, 1);
+                } else {
+                        test_suite_update(ctx, 1, 0);
+                }
+                /* decrypt test */
+                des_cfb_one(output2, output1,
+                            (const uint64_t *)des_cfb_vectors[i].IV, ks,
+                            (int)des_cfb_vectors[i].Plen);
+                if (memcmp(output2, des_cfb_vectors[i].P,
+                            des_cfb_vectors[i].Plen)) {
+                        printf("DES-CFB dec (OOP) vector %d mismatched\n", i);
+                        test_suite_update(ctx, 0, 1);
+                } else {
+                        test_suite_update(ctx, 1, 0);
+                }
+
+                /* In place */
+
+                /* encrypt test */
+                memcpy(output1, des_cfb_vectors[i].P, des_cfb_vectors[i].Plen);
+                des_cfb_one(output1, output1,
+                            (const uint64_t *)des_cfb_vectors[i].IV, ks,
+                            (int)des_cfb_vectors[i].Plen);
+                if (memcmp(output1, des_cfb_vectors[i].C,
+                            des_cfb_vectors[i].Plen)) {
+                        printf("DES-CFB enc (OOP) vector %d mismatched\n", i);
+                        test_suite_update(ctx, 0, 1);
+                } else {
+                        test_suite_update(ctx, 1, 0);
+                }
+                /* decrypt test */
+                memcpy(output1, des_cfb_vectors[i].C, des_cfb_vectors[i].Plen);
+                des_cfb_one(output1, output1,
+                            (const uint64_t *)des_cfb_vectors[i].IV, ks,
+                            (int)des_cfb_vectors[i].Plen);
+                if (memcmp(output1, des_cfb_vectors[i].P,
+                            des_cfb_vectors[i].Plen)) {
+                        printf("DES-CFB dec (OOP) vector %d mismatched\n", i);
+                        test_suite_update(ctx, 0, 1);
+                } else {
+                        test_suite_update(ctx, 1, 0);
+                }
+
+        }
+        printf("\n");
+        return 1;
+}
+
 int
 des_test(struct IMB_MGR *mb_mgr)
 {
@@ -626,6 +700,10 @@ des_test(struct IMB_MGR *mb_mgr)
                          IMB_CIPHER_DOCSIS_DES, &ctx);
         errors += test_suite_end(&ctx);
 
+        test_suite_start(&ctx, "DES-CFB-64");
+        des_cfb_validate(&ctx);
+        errors += test_suite_end(&ctx);
+
         test_suite_start(&ctx, "3DES-CBC-192");
         test_des_vectors(mb_mgr, DIM(vectors), vectors,
                          "3DES (single key) standard test vectors",
-- 
GitLab


From bd6ccb3c7aab39de9bfd7c970206999377d04911 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 25 Jan 2023 19:47:56 +0000
Subject: [PATCH 066/332] CMake improvements

- Fix compiler flags on Linux
- Ensure full project build
---
 CMakeLists.txt      | 20 +++++----
 lib/CMakeLists.txt  | 98 ++++++++++++++-------------------------------
 test/CMakeLists.txt | 43 ++++++--------------
 3 files changed, 56 insertions(+), 105 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 3dd26f2f..ae292a69 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -23,21 +23,25 @@
 # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
+# set default CMakeCache.txt values
+set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Set default build to release")
+set(CMAKE_C_FLAGS_RELEASE "" CACHE STRING "Clear default release build C Compiler Flags" FORCE)
+set(CMAKE_C_FLAGS_DEBUG "" CACHE STRING "Clear default debug build C Compiler Flags" FORCE)
+
 cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb VERSION 1.3.0 DESCRIPTION "Intel(R) IPSec Multi-Buffer library")
 
-# Check compiler version
+# flag to force full project build
+set(FULL_PROJECT_BUILD TRUE)
+
+# check compiler version
 if(("${CMAKE_C_COMPILER_ID}" STREQUAL "GNU") AND
     (CMAKE_C_COMPILER_VERSION VERSION_LESS 5.0))
     message(FATAL_ERROR "GNU C Compiler version must be 5.0 or higher")
 endif()
 
-if("${CMAKE_BUILD_TYPE}" STREQUAL "")
-  set(CMAKE_BUILD_TYPE "Release")
-endif()
-
-# Flag to force full project build
-set(PROJECT_BUILD TRUE)
-
+# build library
 add_subdirectory(lib)
+
+# build test applications
 add_subdirectory(test)
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index 70a1a438..01d0da5e 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -27,8 +27,8 @@
 # Build IPSec_MB library
 # ##############################################################################
 
-# Ensure building entire project
-if(NOT PROJECT_BUILD)
+# ensure building entire project
+if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
 endif()
 
@@ -42,7 +42,6 @@ option(NO_COMPAT_IMB_API_053 "Disable compatibility with v0.53" ON)
 option(BUILD_SHARED_LIBS "Build shared library" ON)
 option(CMAKE_VERBOSE_MAKEFILE "Verbose build output" OFF)
 set(EXTRA_CFLAGS "" CACHE STRING "Extra compiler flags")
-set(CMAKE_GENERATOR_PLATFORM "x64" CACHE STRING "Platform arch" FORCE)
 
 # disable all SAFE options when SAFE_OPTIONS false
 if(NOT SAFE_OPTIONS)
@@ -59,8 +58,10 @@ if(CMAKE_HOST_UNIX)
 else()
   set(WINDOWS 1)
   set(LIB libIPSec_MB)
-  if(NOT (${CMAKE_GENERATOR_PLATFORM} MATCHES "x64"))
-    message(FATAL_ERROR "Only 64-bit platform supported. Re-run with '-A x64' option.")
+  if(CMAKE_GENERATOR MATCHES "Visual Studio")
+    if(NOT (${CMAKE_GENERATOR_PLATFORM} MATCHES "x64"))
+      message(FATAL_ERROR "Only 64-bit platform supported. Re-run with '-A x64' option.")
+    endif()
   endif()
 endif()
 
@@ -118,52 +119,32 @@ endif()
 
 # set compiler definitions
 if(LINUX)
-  set(LIB_DEFINES -DLINUX)
+  set(LIB_DEFINES LINUX)
 else()
   set(LIB_DEFINES )
 endif()
 
 # enable SAFE OPTIONS
 if(SAFE_DATA)
-  if(LINUX)
-    list(APPEND LIB_DEFINES -DSAFE_DATA)
-  else()
-    list(APPEND LIB_DEFINES SAFE_DATA)
-  endif()
+  list(APPEND LIB_DEFINES SAFE_DATA)
   string(APPEND CMAKE_ASM_NASM_FLAGS " -DSAFE_DATA")
 endif()
 if(SAFE_PARAM)
-  if(LINUX)
-    list(APPEND LIB_DEFINES -DSAFE_PARAM)
-  else()
-    list(APPEND LIB_DEFINES SAFE_PARAM)
-  endif()
+  list(APPEND LIB_DEFINES SAFE_PARAM)
   string(APPEND CMAKE_ASM_NASM_FLAGS " -DSAFE_PARAM")
 endif()
 if(SAFE_LOOKUP)
-  if(LINUX)
-    list(APPEND LIB_DEFINES -DSAFE_LOOKUP)
-  else()
-    list(APPEND LIB_DEFINES SAFE_LOOKUP)
-  endif()
+  list(APPEND LIB_DEFINES SAFE_LOOKUP)
   string(APPEND CMAKE_ASM_NASM_FLAGS " -DSAFE_LOOKUP")
 endif()
 if(AESNI_EMU)
-  if(LINUX)
-    list(APPEND LIB_DEFINES -DAESNI_EMU)
-  else()
-    list(APPEND LIB_DEFINES AESNI_EMU)
-  endif()
+  list(APPEND LIB_DEFINES AESNI_EMU)
   string(APPEND CMAKE_ASM_NASM_FLAGS " -DAESNI_EMU")
 endif()
 
 # enable backward compatibility
 if(NO_COMPAT_IMB_API_053)
-  if(LINUX)
-    list(APPEND LIB_DEFINES -DNO_COMPAT_IMB_API_053)
-  else()
-    list(APPEND LIB_DEFINES NO_COMPAT_IMB_API_053)
-  endif()
+  list(APPEND LIB_DEFINES NO_COMPAT_IMB_API_053)
 endif()
 
 if(AVX_IFMA)
@@ -185,7 +166,7 @@ endforeach()
 
 # set NASM flags
 if(LINUX)
-  string(APPEND CMAKE_ASM_NASM_FLAGS " -Werror -felf64 -Xgnu -gdwarf -I${DIR_INCLUDE}")
+  string(APPEND CMAKE_ASM_NASM_FLAGS " -Werror -felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
 else()
   # Windows
   string(APPEND CMAKE_ASM_NASM_FLAGS " -Werror -Xvc -DWIN_ABI")
@@ -241,38 +222,20 @@ if(LINUX)
       "-march=nehalem -mno-pclmul")
   endif()
 
-  set(CMAKE_C_FLAGS "
-    -fPIC
-    -W
-    -Wall
-    -Wextra
-    -Wmissing-declarations
-    -Wpointer-arith
-    -Wcast-qual
-    -Wundef
-    -Wwrite-strings
-    -Wformat
-    -Wformat-security
-    -Wunreachable-code
-    -Wmissing-noreturn
-    -Wsign-compare
-    -Wno-endif-labels
-    -Wstrict-prototypes
-    -Wmissing-prototypes
-    -Wold-style-definition
-    -fno-delete-null-pointer-checks
-    -fwrapv"
-    )
+  set(CMAKE_C_FLAGS "-MMD -fPIC -W -Wall -Wextra -Wmissing-declarations \
+    -Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
+    -Wformat-security -Wunreachable-code -Wmissing-noreturn \
+    -Wsign-compare -Wno-endif-labels -Wstrict-prototypes \
+    -Wmissing-prototypes -Wold-style-definition \
+    -fno-delete-null-pointer-checks -fwrapv"
+  )
   # -fno-strict-overflow is not supported by clang
   if(CMAKE_COMPILER_IS_GNUCC)
     string(APPEND CMAKE_C_FLAGS " -fno-strict-overflow")
   endif()
-  if(${CMAKE_BUILD_TYPE} STREQUAL "Debug")
-    string(APPEND CMAKE_C_FLAGS " -g -DDEBUG")
-    string(APPEND CMAKE_C_FLAGS " -O0")
-  else()
-    string(APPEND CMAKE_C_FLAGS " -O2 -fstack-protector -d_fortify_source=2")
-  endif()
+  set(CMAKE_C_FLAGS_DEBUG "-g -DDEBUG -O0")
+  set(CMAKE_C_FLAGS_RELEASE "-fstack-protector -D_FORTIFY_SOURCE=2 -O3")
+  set(CMAKE_SHARED_LINKER_FLAGS "-Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now -lc")
 else()
   # Windows flags
   set(CMAKE_C_FLAGS "/nologo /Y- /W3 /WX- /Gm- /fp:precise /EHsc")
@@ -281,7 +244,7 @@ else()
   set(CMAKE_SHARED_LINKER_FLAGS "/nologo")
   set(CMAKE_SHARED_LINKER_FLAGS_RELEASE "/RELEASE /DEBUG /OPT:REF /OPT:ICF /INCREMENTAL:NO")
   set(CMAKE_SHARED_LINKER_FLAGS_DEBUG "/DEBUG /INCREMENTAL:NO")
-  set(CMAKE_STATIC "/nologo /nodefaultlib")
+  set(CMAKE_STATIC_LINKER_FLAGS "/nologo /nodefaultlib")
   set_source_files_properties(
     ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
     ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
@@ -291,7 +254,7 @@ else()
     "${CMAKE_C_FLAGS} /arch:AVX")
 endif()
 
-list(APPEND CMAKE_C_FLAGS ${EXTRA_CFLAGS})
+string(APPEND CMAKE_C_FLAGS " ${EXTRA_CFLAGS}")
 
 set(SRC_FILES_C
   ${SRC_FILES_AVX_T1}
@@ -312,13 +275,14 @@ if(AVX_IFMA)
   list(APPEND SRC_FILES_C ${SRC_FILES_AVX2_T3})
 endif()
 
+# set C source file compiler definitions
+foreach(FILE ${SRC_FILES_C})
+  set_source_files_properties(${FILE} PROPERTIES
+    COMPILE_DEFINITIONS "${LIB_DEFINES}")
+endforeach()
+
 if(WINDOWS)
   # set extra windows compiler flags
-  foreach(FILE ${SRC_FILES_C})
-    set_source_files_properties(${FILE} PROPERTIES
-      COMPILE_DEFINITIONS "${LIB_DEFINES}")
-  endforeach()
-
   foreach(FILE ${SRC_FILES_NO_AESNI})
     set_source_files_properties(${FILE} PROPERTIES
       COMPILE_DEFINITIONS "${LIB_DEFINES}"
diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index 019fd400..2cca0e68 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -27,7 +27,7 @@ cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb)
 
 # Ensure building entire project
-if(NOT PROJECT_BUILD)
+if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
 endif()
 
@@ -46,9 +46,6 @@ if(CMAKE_HOST_UNIX)
 else()
   set(WINDOWS 1)
   set(IPSEC_MB_LIB libIPSec_MB)
-  if(NOT (${CMAKE_GENERATOR_PLATFORM} MATCHES "x64"))
-    MESSAGE(FATAL_ERROR "Only 64-bit platform supported. Re-run with '-A x64' option.")
-  endif()
 endif()
 
 # set up NASM compilation
@@ -110,29 +107,19 @@ set(XVALID_APP_SRC_FILES_ASM
 
 # set flags for different OS's
 if(LINUX)
-  set(CMAKE_C_FLAGS "
-    -MMD
-    -W
-    -Wall
-    -Wextra
-    -Wmissing-declarations
-    -Wpointer-arith
-    -Wcast-qual -Wundef
-    -Wwrite-strings
-    -Wformat -Wformat-security
-    -Wunreachable-code
-    -Wmissing-noreturn
-    -Wsign-compare
-    -Wno-endif-labels
-    -Wstrict-prototypes
-    -Wmissing-prototypes
-    -Wold-style-definition
-    -fno-delete-null-pointer-checks
-    -fwrapv"
+  set(CMAKE_C_FLAGS "-MMD -W -Wall -Wextra -Wmissing-declarations \
+    -Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
+    -Wformat-security -Wunreachable-code -Wmissing-noreturn -Wsign-compare \
+    -Wno-endif-labels -Wstrict-prototypes -Wmissing-prototypes \
+    -Wold-style-definition -fno-delete-null-pointer-checks -fwrapv"
   )
+  set(CMAKE_C_FLAGS_DEBUG "-O0 -DDEBUG -g")
+  set(CMAKE_C_FLAGS_RELEASE "-O3")
+  set(CMAKE_EXE_LINKER_FLAGS_DEBUG "-g")
+
   # -fno-strict-overflow is not supported by clang
   if(CMAKE_COMPILER_IS_GNUCC)
-    list(APPEND CMAKE_C_FLAGS "-fno-strict-overflow")
+    string(APPEND CMAKE_C_FLAGS " -fno-strict-overflow")
   endif()
 else()
   # windows
@@ -143,11 +130,7 @@ else()
 endif()
 
 if(LINUX)
-  set(APP_DEFINES
-    -DLINUX
-    -D_GNU_SOURCE
-    -DNO_COMPAT_IMB_API_053
-  )
+  set(APP_DEFINES LINUX _GNU_SOURCE NO_COMPAT_IMB_API_053)
 endif()
 
 include_directories(${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR})
@@ -158,4 +141,4 @@ target_link_libraries(${TEST_APP} PRIVATE ${IPSEC_MB_LIB})
 target_compile_definitions(${TEST_APP} PRIVATE ${APP_DEFINES})
 
 add_executable(${XVALID_APP} ${XVALID_APP_SRC_FILES_C} ${XVALID_APP_SRC_FILES_ASM})
-target_link_libraries(${XVALID_APP} PUBLIC ${IPSEC_MB_LIB})
+target_link_libraries(${XVALID_APP} PRIVATE ${IPSEC_MB_LIB})
-- 
GitLab


From c168fe2030e482fab92685959213708f407f8353 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Mon, 30 Jan 2023 14:41:38 +0000
Subject: [PATCH 067/332] lib: [AES-CFB] expose 256-bit AES-CFB

---
 lib/avx2_t1/mb_mgr_avx2_t1.c       |  1 +
 lib/avx2_t2/mb_mgr_avx2_t2.c       |  1 +
 lib/avx2_t3/mb_mgr_avx2_t3.c       |  1 +
 lib/avx512_t1/mb_mgr_avx512_t1.c   |  1 +
 lib/avx512_t2/mb_mgr_avx512_t2.c   |  1 +
 lib/avx_t1/mb_mgr_avx_t1.c         |  1 +
 lib/avx_t2/mb_mgr_avx_t2.c         |  1 +
 lib/include/arch_avx2_type1.h      |  5 +++++
 lib/include/arch_avx512_type1.h    |  5 +++++
 lib/include/arch_avx_type1.h       |  6 ++++++
 lib/include/arch_sse_type1.h       |  5 +++++
 lib/include/docsis_common.h        | 21 ---------------------
 lib/include/noaesni.h              |  4 ++++
 lib/intel-ipsec-mb.h               | 17 +++++++++++++++++
 lib/libIPSec_MB.def                |  5 +++++
 lib/no-aesni/mb_mgr_sse_no_aesni.c |  1 +
 lib/sse_t1/mb_mgr_sse_t1.c         |  1 +
 lib/sse_t2/mb_mgr_sse_t2.c         |  1 +
 lib/sse_t3/mb_mgr_sse_t3.c         |  1 +
 19 files changed, 58 insertions(+), 21 deletions(-)

diff --git a/lib/avx2_t1/mb_mgr_avx2_t1.c b/lib/avx2_t1/mb_mgr_avx2_t1.c
index 44782ec2..2094a883 100644
--- a/lib/avx2_t1/mb_mgr_avx2_t1.c
+++ b/lib/avx2_t1/mb_mgr_avx2_t1.c
@@ -383,6 +383,7 @@ init_mb_mgr_avx2_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->md5_one_block       = md5_one_block_avx2;
 
         state->aes128_cfb_one      = aes_cfb_128_one_avx2;
+        state->aes256_cfb_one      = aes_cfb_256_one_avx2;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_avx2;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_avx;
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index d050c2b9..e7d98884 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -384,6 +384,7 @@ init_mb_mgr_avx2_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->md5_one_block       = md5_one_block_avx2;
 
         state->aes128_cfb_one      = aes_cfb_128_one_avx2;
+        state->aes256_cfb_one      = aes_cfb_256_one_avx2;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_avx2;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_avx;
diff --git a/lib/avx2_t3/mb_mgr_avx2_t3.c b/lib/avx2_t3/mb_mgr_avx2_t3.c
index 99717fca..8af8e995 100644
--- a/lib/avx2_t3/mb_mgr_avx2_t3.c
+++ b/lib/avx2_t3/mb_mgr_avx2_t3.c
@@ -385,6 +385,7 @@ init_mb_mgr_avx2_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->md5_one_block       = md5_one_block_avx2;
 
         state->aes128_cfb_one      = aes_cfb_128_one_avx2;
+        state->aes256_cfb_one      = aes_cfb_256_one_avx2;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_avx2;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_avx;
diff --git a/lib/avx512_t1/mb_mgr_avx512_t1.c b/lib/avx512_t1/mb_mgr_avx512_t1.c
index 78c53f35..17bd12cc 100644
--- a/lib/avx512_t1/mb_mgr_avx512_t1.c
+++ b/lib/avx512_t1/mb_mgr_avx512_t1.c
@@ -487,6 +487,7 @@ init_mb_mgr_avx512_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->md5_one_block       = md5_one_block_avx512;
 
         state->aes128_cfb_one      = aes_cfb_128_one_avx512;
+        state->aes256_cfb_one      = aes_cfb_256_one_avx512;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_avx512;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_avx;
diff --git a/lib/avx512_t2/mb_mgr_avx512_t2.c b/lib/avx512_t2/mb_mgr_avx512_t2.c
index 8b94a712..e4f65b10 100644
--- a/lib/avx512_t2/mb_mgr_avx512_t2.c
+++ b/lib/avx512_t2/mb_mgr_avx512_t2.c
@@ -495,6 +495,7 @@ init_mb_mgr_avx512_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->md5_one_block       = md5_one_block_avx512;
 
         state->aes128_cfb_one      = aes_cfb_128_one_avx512;
+        state->aes256_cfb_one      = aes_cfb_256_one_avx512;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_avx512;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_avx;
diff --git a/lib/avx_t1/mb_mgr_avx_t1.c b/lib/avx_t1/mb_mgr_avx_t1.c
index d84f4c2d..67e45e82 100644
--- a/lib/avx_t1/mb_mgr_avx_t1.c
+++ b/lib/avx_t1/mb_mgr_avx_t1.c
@@ -382,6 +382,7 @@ init_mb_mgr_avx_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->md5_one_block       = md5_one_block_avx;
 
         state->aes128_cfb_one      = aes_cfb_128_one_avx;
+        state->aes256_cfb_one      = aes_cfb_256_one_avx;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_avx;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_avx;
diff --git a/lib/avx_t2/mb_mgr_avx_t2.c b/lib/avx_t2/mb_mgr_avx_t2.c
index 977ca576..9fea5e77 100644
--- a/lib/avx_t2/mb_mgr_avx_t2.c
+++ b/lib/avx_t2/mb_mgr_avx_t2.c
@@ -383,6 +383,7 @@ init_mb_mgr_avx_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->md5_one_block       = md5_one_block_avx;
 
         state->aes128_cfb_one      = aes_cfb_128_one_avx;
+        state->aes256_cfb_one      = aes_cfb_256_one_avx;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_avx;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_avx;
diff --git a/lib/include/arch_avx2_type1.h b/lib/include/arch_avx2_type1.h
index edb73f9a..fe4a4995 100644
--- a/lib/include/arch_avx2_type1.h
+++ b/lib/include/arch_avx2_type1.h
@@ -38,6 +38,11 @@ void call_sha1_x8_avx2_from_c(SHA1_ARGS *args, uint32_t size_in_blocks);
 void call_sha256_oct_avx2_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 void call_sha512_x4_avx2_from_c(SHA512_ARGS *args, uint64_t size_in_blocks);
 
+/*AES-CFB*/
+IMB_DLL_EXPORT void aes_cfb_256_one_avx2(void *out, const void *in,
+                                         const void *iv, const void *keys,
+                                         uint64_t len);
+
 /* moved from MB MGR */
 IMB_JOB *submit_job_zuc_eea3_avx2(MB_MGR_ZUC_OOO *state,
                                   IMB_JOB *job);
diff --git a/lib/include/arch_avx512_type1.h b/lib/include/arch_avx512_type1.h
index cf551921..229ea745 100644
--- a/lib/include/arch_avx512_type1.h
+++ b/lib/include/arch_avx512_type1.h
@@ -156,6 +156,11 @@ void call_sha1_x16_avx512_from_c(SHA1_ARGS *args, uint32_t size_in_blocks);
 void call_sha256_x16_avx512_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 void call_sha512_x8_avx512_from_c(SHA512_ARGS *args, uint64_t size_in_blocks);
 
+/* AES-CFB */
+IMB_DLL_EXPORT void aes_cfb_256_one_avx512(void *out, const void *in,
+                                           const void *iv, const void *keys,
+                                           uint64_t len);
+
 #endif /* IMB_ASM_AVX512_T1_H */
 
 
diff --git a/lib/include/arch_avx_type1.h b/lib/include/arch_avx_type1.h
index 8a11a0f4..a0983f41 100644
--- a/lib/include/arch_avx_type1.h
+++ b/lib/include/arch_avx_type1.h
@@ -97,6 +97,12 @@ void aes_cbcs_1_9_dec_128_avx(const void *in, const uint8_t *IV,
                               const void *keys, void *out,
                               uint64_t len_bytes, void *next_iv);
 
+/* AES-CFB */
+IMB_DLL_EXPORT void aes_cfb_256_one_avx(void *out, const void *in,
+                                        const void *iv, const void *keys,
+                                        uint64_t len);
+
+
 /* stitched AES128-CNTR, CRC32 and BIP */
 IMB_JOB *submit_job_pon_enc_avx(IMB_JOB *job);
 IMB_JOB *submit_job_pon_dec_avx(IMB_JOB *job);
diff --git a/lib/include/arch_sse_type1.h b/lib/include/arch_sse_type1.h
index baf13691..51abe4e8 100644
--- a/lib/include/arch_sse_type1.h
+++ b/lib/include/arch_sse_type1.h
@@ -91,6 +91,11 @@ void aes_cbcs_1_9_dec_128_sse(const void *in, const uint8_t *IV,
                               const void *keys, void *out,
                               uint64_t len_bytes, void *next_iv);
 
+/* AES-CFB */
+IMB_DLL_EXPORT void aes_cfb_256_one_sse(void *out, const void *in,
+                                        const void *iv, const void *keys,
+                                        uint64_t len);
+
 /* stitched AES128-CNTR, CRC32 and BIP */
 IMB_JOB *submit_job_pon_enc_sse(IMB_JOB *job);
 IMB_JOB *submit_job_pon_dec_sse(IMB_JOB *job);
diff --git a/lib/include/docsis_common.h b/lib/include/docsis_common.h
index ca57ab95..365fad05 100644
--- a/lib/include/docsis_common.h
+++ b/lib/include/docsis_common.h
@@ -58,27 +58,6 @@
 #define IMB_AES_BLOCK_SIZE 16
 #endif
 
-IMB_DLL_LOCAL void aes_cfb_256_one_sse_no_aesni(void *out, const void *in,
-                                                const void *iv,
-                                                const void *keys,
-                                                const uint64_t len);
-
-IMB_DLL_LOCAL void aes_cfb_256_one_sse(void *out, const void *in,
-                                       const void *iv, const void *keys,
-                                       const uint64_t len);
-
-IMB_DLL_LOCAL void aes_cfb_256_one_avx(void *out, const void *in,
-                                       const void *iv, const void *keys,
-                                       const uint64_t len);
-
-IMB_DLL_LOCAL void aes_cfb_256_one_avx2(void *out, const void *in,
-                                       const void *iv, const void *keys,
-                                       const uint64_t len);
-
-IMB_DLL_LOCAL void aes_cfb_256_one_avx512(void *out, const void *in,
-                                          const void *iv, const void *keys,
-                                          const uint64_t len);
-
 /**
  * @brief Encrypts/decrypts the last partial block for DOCSIS SEC v3.1 BPI
  *
diff --git a/lib/include/noaesni.h b/lib/include/noaesni.h
index e809326d..6e6d9c90 100644
--- a/lib/include/noaesni.h
+++ b/lib/include/noaesni.h
@@ -98,4 +98,8 @@ IMB_DLL_EXPORT void
 aes_cfb_128_one_sse_no_aesni(void *out, const void *in, const void *iv,
                              const void *keys, uint64_t len);
 
+IMB_DLL_EXPORT void
+aes_cfb_256_one_sse_no_aesni(void *out, const void *in, const void *iv,
+                             const void *keys, uint64_t len);
+
 #endif /* NOAESNI_H */
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 6ff1cc0a..d560ecf1 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -1205,6 +1205,7 @@ typedef struct IMB_MGR {
         submit_cipher_burst_t submit_cipher_burst_nocheck;
         submit_hash_burst_t submit_hash_burst;
         submit_hash_burst_t submit_hash_burst_nocheck;
+        aes_cfb_t aes256_cfb_one;
 
         /* in-order scheduler fields */
         int              earliest_job; /**< byte offset, -1 if none */
@@ -1926,6 +1927,22 @@ IMB_DLL_EXPORT void init_mb_mgr_auto(IMB_MGR *state, IMB_ARCH *arch);
 #define IMB_AES128_CFB_ONE(_mgr, _dst, _src, _iv, _exp_key, _len)       \
         ((_mgr)->aes128_cfb_one((_dst), (_src), (_iv), (_exp_key), (_len)))
 
+/**
+ * @brief AES-CFB-256 Encrypt/Decrypt up to one block.
+ *
+ * Processes only one buffer at a time.
+ * Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.
+ *
+ * @param [in] _mgr     Pointer to multi-buffer structure
+ * @param [out] _dst    Plaintext/Ciphertext output
+ * @param [in] _src     Plaintext/Ciphertext input
+ * @param [in] _iv      Pointer to 16 byte IV
+ * @param [in] _exp_key Pointer to expanded AES keys
+ * @param [in] _len     Length of data in bytes
+ */
+#define IMB_AES256_CFB_ONE(_mgr, _dst, _src, _iv, _exp_key, _len)       \
+        ((_mgr)->aes256_cfb_one((_dst), (_src), (_iv), (_exp_key), (_len)))
+
 /* AES-GCM API's */
 #define IMB_AES128_GCM_ENC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, _aad,  \
                            _aadl, _tag, _tagl)                                 \
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index f10b20b3..3904b0d5 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -693,3 +693,8 @@ EXPORTS
     get_next_job_avx2_t3                	@667
     get_completed_job_avx2_t3            	@668
     des_cfb_one					@669
+    aes_cfb_256_one_sse				@670
+    aes_cfb_256_one_avx 			@671
+    aes_cfb_256_one_avx2			@672
+    aes_cfb_256_one_avx512			@673
+    aes_cfb_256_one_sse_no_aesni		@674
diff --git a/lib/no-aesni/mb_mgr_sse_no_aesni.c b/lib/no-aesni/mb_mgr_sse_no_aesni.c
index f071419d..f14a1e54 100644
--- a/lib/no-aesni/mb_mgr_sse_no_aesni.c
+++ b/lib/no-aesni/mb_mgr_sse_no_aesni.c
@@ -370,6 +370,7 @@ init_mb_mgr_sse_no_aesni_internal(IMB_MGR *state, const int reset_mgrs)
         state->sha512              = sha512_sse;
         state->md5_one_block       = md5_one_block_sse;
         state->aes128_cfb_one      = aes_cfb_128_one_sse_no_aesni;
+        state->aes256_cfb_one      = aes_cfb_256_one_sse_no_aesni;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_sse_no_aesni;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_sse_no_aesni;
diff --git a/lib/sse_t1/mb_mgr_sse_t1.c b/lib/sse_t1/mb_mgr_sse_t1.c
index e6cd7953..6d6ad988 100644
--- a/lib/sse_t1/mb_mgr_sse_t1.c
+++ b/lib/sse_t1/mb_mgr_sse_t1.c
@@ -390,6 +390,7 @@ init_mb_mgr_sse_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->md5_one_block       = md5_one_block_sse;
 
         state->aes128_cfb_one      = aes_cfb_128_one_sse;
+        state->aes256_cfb_one      = aes_cfb_256_one_sse;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_sse;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_sse;
diff --git a/lib/sse_t2/mb_mgr_sse_t2.c b/lib/sse_t2/mb_mgr_sse_t2.c
index 9bed6aa9..02933755 100644
--- a/lib/sse_t2/mb_mgr_sse_t2.c
+++ b/lib/sse_t2/mb_mgr_sse_t2.c
@@ -388,6 +388,7 @@ init_mb_mgr_sse_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->md5_one_block       = md5_one_block_sse;
 
         state->aes128_cfb_one      = aes_cfb_128_one_sse;
+        state->aes256_cfb_one      = aes_cfb_256_one_sse;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_sse;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_sse;
diff --git a/lib/sse_t3/mb_mgr_sse_t3.c b/lib/sse_t3/mb_mgr_sse_t3.c
index 418dea2e..4381d9a0 100644
--- a/lib/sse_t3/mb_mgr_sse_t3.c
+++ b/lib/sse_t3/mb_mgr_sse_t3.c
@@ -389,6 +389,7 @@ init_mb_mgr_sse_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->md5_one_block       = md5_one_block_sse;
 
         state->aes128_cfb_one      = aes_cfb_128_one_sse;
+        state->aes256_cfb_one      = aes_cfb_256_one_sse;
 
         state->eea3_1_buffer       = zuc_eea3_1_buffer_sse;
         state->eea3_4_buffer       = zuc_eea3_4_buffer_gfni_sse;
-- 
GitLab


From 55b51bdbe3d21885ff44f14ce2d051c04fcc74df Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Tue, 7 Feb 2023 17:47:44 +0000
Subject: [PATCH 068/332] test: [AES-CFB] test new AES-256 CFB API

---
 test/aes_test.c | 290 ++++++++++++++++++++++++++++++++++++------------
 1 file changed, 221 insertions(+), 69 deletions(-)

diff --git a/test/aes_test.c b/test/aes_test.c
index 2b1c2540..36a28f06 100644
--- a/test/aes_test.c
+++ b/test/aes_test.c
@@ -922,6 +922,8 @@ static const uint8_t CFBC2[] = {
  * Test vectors from
  * https://nvlpubs.nist.gov/nistpubs/Legacy/SP/nistspecialpublication800-38a.pdf
  */
+
+/* 128-Bit */
 static const uint8_t CFBK3[] = {
         0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6,
         0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c
@@ -989,13 +991,116 @@ static const uint8_t CFBC6[] = {
         0xc0, 0x4b, 0x05, 0x35, 0x7c, 0x5d, 0x1c, 0x0e,
         0xea, 0xc4, 0xc6, 0x6f, 0x9f, 0xf7, 0xf2, 0xe6
 };
-static struct aes_vector aes_cfb_128_tab[] = {
-        {CFBK1, CFBIV1, CFBP1, sizeof(CFBP1), CFBC1, sizeof(CFBK1)},
-        {CFBK2, CFBIV2, CFBP2, sizeof(CFBP2), CFBC2, sizeof(CFBK2)},
-        {CFBK3, CFBIV3, CFBP3, sizeof(CFBP3), CFBC3, sizeof(CFBK3)},
-        {CFBK4, CFBIV4, CFBP4, sizeof(CFBP4), CFBC4, sizeof(CFBK4)},
-        {CFBK5, CFBIV5, CFBP5, sizeof(CFBP5), CFBC5, sizeof(CFBK5)},
-        {CFBK6, CFBIV6, CFBP6, sizeof(CFBP6), CFBC6, sizeof(CFBK6)},
+
+static const uint8_t CFBK7[] = {
+        0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6,
+        0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c
+};
+static const uint8_t CFBIV7[] = {
+        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
+};
+static const uint8_t CFBP7[] = {
+        0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96
+};
+static const uint8_t CFBC7[] = {
+        0x3b, 0x3f, 0xd9, 0x2e, 0xb7, 0x2d, 0xad, 0x20
+};
+static const uint8_t CFBK8[] = {
+        0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6,
+        0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c
+};
+static const uint8_t CFBIV8[] = {
+        0xc8, 0xa6, 0x45, 0x37, 0xa0, 0xb3, 0xa9, 0x3f,
+        0xcd, 0xe3, 0xcd, 0xad, 0x9f, 0x1c, 0xe5, 0x8b
+};
+static const uint8_t CFBP8[] = {
+        0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11
+};
+static const uint8_t CFBC8[] = {
+        0x26, 0x75, 0x1f, 0x67, 0xa3, 0xcb, 0xb1, 0x40
+};
+
+/* 256-Bit */
+static const uint8_t CFBK9[] = {
+        0x60, 0x3d, 0xeb, 0x10, 0x15, 0xca, 0x71, 0xbe,
+        0x2b, 0x73, 0xae, 0xf0, 0x85, 0x7d, 0x77, 0x81,
+        0x1f, 0x35, 0x2c, 0x07, 0x3b, 0x61, 0x08, 0xd7,
+        0x2d, 0x98, 0x10, 0xa3, 0x09, 0x14, 0xdf, 0xf4
+};
+static const uint8_t CFBIV9[] = {
+        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
+};
+static const uint8_t CFBP9[] = {
+        0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
+        0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a
+};
+static const uint8_t CFBC9[] = {
+        0xdc, 0x7e, 0x84, 0xbf, 0xda, 0x79, 0x16, 0x4b,
+        0x7e, 0xcd, 0x84, 0x86, 0x98, 0x5d, 0x38, 0x60
+};
+static const uint8_t CFBIV10[] = {
+        0xdc, 0x7e, 0x84, 0xbf, 0xda, 0x79, 0x16, 0x4b,
+        0x7e, 0xcd, 0x84, 0x86, 0x98, 0x5d, 0x38, 0x60
+};
+static const uint8_t CFBP10[] = {
+        0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
+        0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51
+};
+static const uint8_t CFBC10[] = {
+        0x39, 0xff, 0xed, 0x14, 0x3b, 0x28, 0xb1, 0xc8,
+        0x32, 0x11, 0x3c, 0x63, 0x31, 0xe5, 0x40, 0x7b
+};
+static const uint8_t CFBIV11[] = {
+        0x39, 0xff, 0xed, 0x14, 0x3b, 0x28, 0xb1, 0xc8,
+        0x32, 0x11, 0x3c, 0x63, 0x31, 0xe5, 0x40, 0x7b
+};
+static const uint8_t CFBP11[] = {
+        0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
+        0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef
+};
+static const uint8_t CFBC11[] = {
+        0xdf, 0x10, 0x13, 0x24, 0x15, 0xe5, 0x4b, 0x92,
+        0xa1, 0x3e, 0xd0, 0xa8, 0x26, 0x7a, 0xe2, 0xf9
+};
+static const uint8_t CFBIV12[] = {
+        0xdf, 0x10, 0x13, 0x24, 0x15, 0xe5, 0x4b, 0x92,
+        0xa1, 0x3e, 0xd0, 0xa8, 0x26, 0x7a, 0xe2, 0xf9
+};
+static const uint8_t CFBP12[] = {
+        0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
+        0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10
+};
+static const uint8_t CFBC12[] = {
+        0x75, 0xa3, 0x85, 0x74, 0x1a, 0xb9, 0xce, 0xf8,
+        0x20, 0x31, 0x62, 0x3d, 0x55, 0xb1, 0xe4, 0x71
+};
+static const uint8_t CFBIV13[] = {
+        0xdc, 0x7e, 0x84, 0xbf, 0xda, 0x79, 0x16, 0x4b,
+        0x7e, 0xcd, 0x84, 0x86, 0x98, 0x5d, 0x38, 0x60
+};
+static const uint8_t CFBP13[] = {
+        0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c
+};
+static const uint8_t CFBC13[] = {
+        0x39, 0xff, 0xed, 0x14, 0x3b, 0x28, 0xb1, 0xc8
+};
+
+static struct aes_vector aes_cfb_tab[] = {
+       {CFBK1, CFBIV1, CFBP1, sizeof(CFBP1), CFBC1, sizeof(CFBK1)},
+       {CFBK2, CFBIV2, CFBP2, sizeof(CFBP2), CFBC2, sizeof(CFBK2)},
+       {CFBK3, CFBIV3, CFBP3, sizeof(CFBP3), CFBC3, sizeof(CFBK3)},
+       {CFBK4, CFBIV4, CFBP4, sizeof(CFBP4), CFBC4, sizeof(CFBK4)},
+       {CFBK5, CFBIV5, CFBP5, sizeof(CFBP5), CFBC5, sizeof(CFBK5)},
+       {CFBK6, CFBIV6, CFBP6, sizeof(CFBP6), CFBC6, sizeof(CFBK6)},
+       {CFBK7, CFBIV7, CFBP7, sizeof(CFBP7), CFBC7, sizeof(CFBK7)},
+       {CFBK8, CFBIV8, CFBP8, sizeof(CFBP8), CFBC8, sizeof(CFBK8)},
+       {CFBK9, CFBIV9, CFBP9, sizeof(CFBP9), CFBC9, sizeof(CFBK9)},
+       {CFBK9, CFBIV10, CFBP10, sizeof(CFBP10), CFBC10, sizeof(CFBK9)},
+       {CFBK9, CFBIV11, CFBP11, sizeof(CFBP11), CFBC11, sizeof(CFBK9)},
+       {CFBK9, CFBIV12, CFBP12, sizeof(CFBP12), CFBC12, sizeof(CFBK9)},
+       {CFBK9, CFBIV13, CFBP13, sizeof(CFBP13), CFBC13, sizeof(CFBK9)},
 };
 
 /* =================================================================== */
@@ -2605,18 +2710,14 @@ test_docrc_vectors(struct IMB_MGR *mb_mgr,
 #else
 		printf(".");
 #endif
-                switch (vec_tab[vect].key_len) {
-                case 16:
+                if (vec_tab[vect].key_len == 16) {
                         IMB_AES_KEYEXP_128(mb_mgr, vec_tab[vect].key, enc_keys,
                                            dec_keys);
                         ctx = ctx128;
-                        break;
-                case 32:
-                default:
+                } else {
                         IMB_AES_KEYEXP_256(mb_mgr, vec_tab[vect].key, enc_keys,
                                            dec_keys);
                         ctx = ctx256;
-                        break;
                 }
 
 
@@ -2645,12 +2746,14 @@ test_docrc_vectors(struct IMB_MGR *mb_mgr,
 }
 
 static int
-cfb128_validate_ok(const uint8_t *output, const uint8_t *in_text,
-                   const size_t plen, const unsigned i, const unsigned is_enc,
-                   const int in_place)
+cfb_validate_ok(const uint8_t *output, const uint8_t *in_text,
+                const size_t plen, const uint32_t klen,
+                const unsigned i, const unsigned is_enc,
+                const int in_place)
 {
         if (memcmp(output, in_text, plen) != 0) {
-                printf("\nAES-CFB128 standard test vector %u %s (%s): fail\n",
+                printf("\nAES-CFB%s standard test vector %u %s (%s): fail\n",
+                       (klen == 16) ? "128" : "256",
                        i + 1, (is_enc) ? "encrypt" : "decrypt",
                        (in_place) ? "in-place" : "out-of-place");
                 return 0;
@@ -2659,70 +2762,114 @@ cfb128_validate_ok(const uint8_t *output, const uint8_t *in_text,
         printf("Standard test vector %u %s %s\n", i + 1,
                (in_place) ? "in-place" : "out-of-place",
                (is_enc) ? "encrypt" : "decrypt");
-#else
-	printf(".");
 #endif
-
         return 1;
 }
 
-
 static int
-cfb128_validate(struct IMB_MGR *mb_mgr)
+cfb_validate(struct IMB_MGR *mb_mgr,
+             const struct aes_vector *p_vec,
+             const unsigned i)
 {
-        unsigned i;
-
-        printf("AES-CFB128 standard test vectors:\n");
-        for (i = 0; i < DIM(aes_cfb_128_tab); i++) {
-                uint8_t output1[16];
-                uint8_t output2[16];
-                DECLARE_ALIGNED(uint32_t key[4], 16);
-                DECLARE_ALIGNED(uint32_t keys_enc[11*4], 16);
-                DECLARE_ALIGNED(uint32_t keys_dec[11*4], 16);
-
-                memcpy(key, aes_cfb_128_tab[i].K, aes_cfb_128_tab[i].Klen);
-                IMB_AES_KEYEXP_128(mb_mgr, key, keys_enc, keys_dec);
-
-                /* Out of place */
-
-                /* encrypt test */
-                IMB_AES128_CFB_ONE(mb_mgr, output1, aes_cfb_128_tab[i].P,
-                                   aes_cfb_128_tab[i].IV, keys_enc,
-                                   aes_cfb_128_tab[i].Plen);
-                if (!cfb128_validate_ok(output1, aes_cfb_128_tab[i].C,
-                        aes_cfb_128_tab[i].Plen, i, 1, 0))
-                        return 0;
+        uint8_t output1[16];
+        uint8_t output2[16];
+        const uint32_t kLength = p_vec->Klen;
+        DECLARE_ALIGNED(uint32_t keys_enc[15*4], 16);
+        DECLARE_ALIGNED(uint32_t keys_dec[15*4], 16);
+
+        if (kLength == 16)
+                IMB_AES_KEYEXP_128(mb_mgr, p_vec->K,
+                                   keys_enc, keys_dec);
+        else
+                IMB_AES_KEYEXP_256(mb_mgr, p_vec->K,
+                                   keys_enc, keys_dec);
+        /* Out of place */
+
+        /* encrypt test */
+        if (kLength == 16)
+                IMB_AES128_CFB_ONE(mb_mgr, output1, p_vec->P,
+                                  p_vec->IV, keys_enc,
+                                  p_vec->Plen);
+        else
+                IMB_AES256_CFB_ONE(mb_mgr, output1, p_vec->P,
+                                   p_vec->IV, keys_enc,
+                                   p_vec->Plen);
+        if (!cfb_validate_ok(output1, p_vec->C,
+                             p_vec->Plen, p_vec->Klen, i, 1, 0))
+                return 0;
 
-                /* decrypt test */
+        /* decrypt test */
+        if (kLength == 16)
                 IMB_AES128_CFB_ONE(mb_mgr, output2, output1,
-                                   aes_cfb_128_tab[i].IV, keys_enc,
-                                   aes_cfb_128_tab[i].Plen);
-                if (!cfb128_validate_ok(output2, aes_cfb_128_tab[i].P,
-                        aes_cfb_128_tab[i].Plen, i, 0, 0))
-                        return 0;
-
-                /* In place */
+                                   p_vec->IV, keys_enc,
+                                   p_vec->Plen);
+        else
+                IMB_AES256_CFB_ONE(mb_mgr, output2, output1,
+                                   p_vec->IV, keys_enc,
+                                   p_vec->Plen);
+        if (!cfb_validate_ok(output2, p_vec->P,
+                             p_vec->Plen, p_vec->Klen, i, 0, 0))
+                return 0;
+        /* In place */
 
-                /* encrypt test */
-                memcpy(output1, aes_cfb_128_tab[i].P, aes_cfb_128_tab[i].Plen);
+        /* encrypt test */
+        memcpy(output1, p_vec->P, p_vec->Plen);
+        if (kLength == 16)
                 IMB_AES128_CFB_ONE(mb_mgr, output1, output1,
-                                   aes_cfb_128_tab[i].IV, keys_enc,
-                                   aes_cfb_128_tab[i].Plen);
-                if (!cfb128_validate_ok(output1, aes_cfb_128_tab[i].C,
-                        aes_cfb_128_tab[i].Plen, i, 1, 1))
-                        return 0;
+                                   p_vec->IV, keys_enc,
+                                   p_vec->Plen);
+        else
+                IMB_AES256_CFB_ONE(mb_mgr, output1, output1,
+                                   p_vec->IV, keys_enc,
+                                   p_vec->Plen);
+        if (!cfb_validate_ok(output1, p_vec->C,
+                            p_vec->Plen, p_vec->Klen, i, 1, 1))
+                return 0;
 
-                /* decrypt test */
-                memcpy(output1, aes_cfb_128_tab[i].C, aes_cfb_128_tab[i].Plen);
+        /* decrypt test */
+        memcpy(output1, p_vec->C, p_vec->Plen);
+        if (kLength == 16)
                 IMB_AES128_CFB_ONE(mb_mgr, output1, output1,
-                                   aes_cfb_128_tab[i].IV, keys_enc,
-                                   aes_cfb_128_tab[i].Plen);
-                if (!cfb128_validate_ok(output1, aes_cfb_128_tab[i].P,
-                        aes_cfb_128_tab[i].Plen, i, 0, 1))
-                        return 0;
+                                   p_vec->IV, keys_enc,
+                                   p_vec->Plen);
+        else
+                IMB_AES256_CFB_ONE(mb_mgr, output1, output1,
+                                   p_vec->IV, keys_enc,
+                                   p_vec->Plen);
+        if (!cfb_validate_ok(output1, p_vec->P,
+                             p_vec->Plen, p_vec->Klen, i, 0, 1))
+                return 0;
+        return 1;
+}
+
+static void
+cfb_test_vectors(struct IMB_MGR *mb_mgr, struct test_suite_context *ctx128,
+                 struct test_suite_context *ctx256, const int num_jobs)
+{
+        unsigned vect;
+
+
+        printf("AES-CFB test vectors (N jobs = %d):\n", num_jobs);
+	for (vect = 0; vect < DIM(aes_cfb_tab); vect++) {
+                struct test_suite_context *ctx;
+#ifdef DEBUG
+		printf("[%d/%lu] Standard %s-bit vector\n",
+                       vect + 1,
+                       (unsigned long) DIM(aes_cfb_tab),
+                       (aes_cfb_tab[vect].Klen == 16) ? "128":"256");
+#else
+		printf(".");
+#endif
+                if (aes_cfb_tab[vect].Klen == 16)
+                        ctx = ctx128;
+                else
+                        ctx = ctx256;
+                if (!cfb_validate(mb_mgr, &aes_cfb_tab[vect], vect))
+                        test_suite_update(ctx, 0, 1);
+                else
+                        test_suite_update(ctx, 1, 0);
         }
         printf("\n");
-        return 1;
 }
 
 int
@@ -2763,8 +2910,13 @@ aes_test(struct IMB_MGR *mb_mgr)
         errors += test_suite_end(&ctx128);
         errors += test_suite_end(&ctx256);
 
-        if (!cfb128_validate(mb_mgr))
-                errors++;
+        test_suite_start(&ctx128, "AES-CFB-128");
+        test_suite_start(&ctx256, "AES-CFB-256");
+        for (i = 0; i < DIM(num_jobs_tab); i++)
+                cfb_test_vectors(mb_mgr, &ctx128, &ctx256, num_jobs_tab[i]);
+        errors += test_suite_end(&ctx128);
+        errors += test_suite_end(&ctx256);
+
 
         test_suite_start(&ctx128, "DOCSIS-SEC-128-CRC32");
         test_suite_start(&ctx256, "DOCSIS-SEC-256-CRC32");
-- 
GitLab


From 738ec179e255b08f3eaa1dbc91dc3bba1cf70d8c Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 15 Feb 2023 17:35:31 +0000
Subject: [PATCH 069/332] lib: create linux cmake module

---
 lib/cmake/linux.cmake | 86 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 86 insertions(+)
 create mode 100644 lib/cmake/linux.cmake

diff --git a/lib/cmake/linux.cmake b/lib/cmake/linux.cmake
new file mode 100644
index 00000000..249a508e
--- /dev/null
+++ b/lib/cmake/linux.cmake
@@ -0,0 +1,86 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice, this
+#   list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright notice,
+#   this list of conditions and the following disclaimer in the documentation
+#   and/or other materials provided with the distribution.
+# * Neither the name of Intel Corporation nor the names of its contributors may
+#   be used to endorse or promote products derived from this software without
+#   specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# ##############################################################################
+# IPSec_MB library CMake Linux config
+# ##############################################################################
+
+set(LINUX 1)
+set(LIB IPSec_MB) # 'lib' prefix assumed on Linux
+
+message(STATUS "BUILD_TYPE...              ${CMAKE_BUILD_TYPE}")
+message(STATUS "CMAKE_VERBOSE_MAKEFILE...  ${CMAKE_VERBOSE_MAKEFILE}")
+
+# set compiler definitions
+list(APPEND LIB_DEFINES LINUX)
+
+# set NASM flags
+string(APPEND CMAKE_ASM_NASM_FLAGS
+       " -Werror -felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
+
+# set C compiler flags
+set(CMAKE_C_FLAGS
+    "-MMD -fPIC -W -Wall -Wextra -Wmissing-declarations \
+-Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
+-Wformat-security -Wunreachable-code -Wmissing-noreturn \
+-Wsign-compare -Wno-endif-labels -Wstrict-prototypes \
+-Wmissing-prototypes -Wold-style-definition \
+-fno-delete-null-pointer-checks -fwrapv")
+set(CMAKE_C_FLAGS_DEBUG "-g -DDEBUG -O0")
+set(CMAKE_C_FLAGS_RELEASE "-fstack-protector -D_FORTIFY_SOURCE=2 -O3")
+set(CMAKE_SHARED_LINKER_FLAGS "-Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now -lc")
+
+# -fno-strict-overflow is not supported by clang
+if(CMAKE_COMPILER_IS_GNUCC)
+  string(APPEND CMAKE_C_FLAGS " -fno-strict-overflow")
+endif()
+
+# set directory specific C compiler flags
+set_source_files_properties(
+  ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
+  PPROPERTIES COMPILE_FLAGS
+  "-march=sandybridge -maes -mpclmul")
+set_source_files_properties(
+  ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2} ${SRC_FILES_AVX2_T3}
+  PPROPERTIES COMPILE_FLAGS
+  "-march=haswell -maes -mpclmul")
+set_source_files_properties(
+  ${SRC_FILES_AVX512_T1} ${SRC_FILES_AVX512_T2}
+  PROPERTIES COMPILE_FLAGS
+  "-march=broadwell -maes -mpclmul")
+set_source_files_properties(
+  ${SRC_FILES_SSE_T1} ${SRC_FILES_SSE_T2} ${SRC_FILES_SSE_T3}
+  PROPERTIES COMPILE_FLAGS
+  "-march=nehalem -maes -mpclmul")
+set_source_files_properties(${SRC_FILES_X86_64}
+  PROPERTIES COMPILE_FLAGS
+  "-msse4.2")
+if(AESNI_EMU)
+  set_source_files_properties(
+    ${SRC_FILES_NO_AESNI}
+    PROPERTIES COMPILE_FLAGS
+    "-march=nehalem -mno-pclmul")
+endif()
+
-- 
GitLab


From d4c76da4ad98fc3d4c1d6ac88ac4b6aca4add6ba Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 15 Feb 2023 17:35:52 +0000
Subject: [PATCH 070/332] lib: create windows cmake module

---
 lib/cmake/windows.cmake | 91 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 91 insertions(+)
 create mode 100644 lib/cmake/windows.cmake

diff --git a/lib/cmake/windows.cmake b/lib/cmake/windows.cmake
new file mode 100644
index 00000000..50ccdeb7
--- /dev/null
+++ b/lib/cmake/windows.cmake
@@ -0,0 +1,91 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice, this
+#   list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright notice,
+#   this list of conditions and the following disclaimer in the documentation
+#   and/or other materials provided with the distribution.
+# * Neither the name of Intel Corporation nor the names of its contributors may
+#   be used to endorse or promote products derived from this software without
+#   specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# ##############################################################################
+# IPSec_MB library CMake Windows config
+# ##############################################################################
+
+set(WINDOWS 1)
+set(LIB libIPSec_MB)
+set(SRC_DEF_FILE ${LIB}_lnk.def)
+
+if(CMAKE_GENERATOR MATCHES "Visual Studio")
+  if(NOT (${CMAKE_GENERATOR_PLATFORM} MATCHES "x64"))
+    message(FATAL_ERROR "Only 64-bit platform supported. Re-run with '-A x64' option.")
+  endif()
+else()
+  message(STATUS "BUILD_TYPE...              ${CMAKE_BUILD_TYPE}")
+  message(STATUS "CMAKE_VERBOSE_MAKEFILE...  ${CMAKE_VERBOSE_MAKEFILE}")
+endif()
+
+# set NASM flags
+string(APPEND CMAKE_ASM_NASM_FLAGS " -Werror -Xvc -DWIN_ABI")
+set_source_files_properties(${SRC_FILES_ASM} PROPERTIES
+  COMPILE_FLAGS "$<$<CONFIG:DEBUG>:-gcv8>")
+
+# set C compiler flags
+set(CMAKE_C_FLAGS "/nologo /Y- /W3 /WX- /Gm- /fp:precise /EHsc")
+set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
+set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
+set(CMAKE_SHARED_LINKER_FLAGS "/nologo")
+set(CMAKE_SHARED_LINKER_FLAGS_RELEASE "/RELEASE /DEBUG /OPT:REF /OPT:ICF /INCREMENTAL:NO")
+set(CMAKE_SHARED_LINKER_FLAGS_DEBUG "/DEBUG /INCREMENTAL:NO")
+set(CMAKE_STATIC_LINKER_FLAGS "/nologo /nodefaultlib")
+set_source_files_properties(
+  ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
+  ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
+  ${SRC_FILES_AVX2_T3} ${SRC_FILES_AVX512_T1}
+  ${SRC_FILES_AVX512_T2}
+  PPROPERTIES COMPILE_FLAGS
+  "${CMAKE_C_FLAGS} /arch:AVX")
+
+# set AESNI_EMU specific compiler flags
+foreach(FILE ${SRC_FILES_NO_AESNI})
+  set_source_files_properties(${FILE} PROPERTIES
+    COMPILE_DEFINITIONS "${LIB_DEFINES}"
+    COMPILE_OPTIONS "$<$<CONFIG:RELEASE>:/Od>")
+endforeach()
+
+# generate windows DEF file
+if(NOT AESNI_EMU)
+  set(STR_FILTER "/c:_no_aesni")
+endif()
+if(NOT AVX_IFMA)
+  set(STR_FILTER "${STR_FILTER} /c:_avx2_t3")
+endif()
+
+# filter unused symbol exports
+if(NOT STR_FILTER)
+  set(GEN_DEF_FILE_CMD "copy /Y ${LIB}.def ${SRC_DEF_FILE}")
+else()
+  set(GEN_DEF_FILE_CMD "findstr /v ${STR_FILTER} ${LIB}.def > ${SRC_DEF_FILE}")
+endif()
+
+execute_process(
+  COMMAND cmd /C ${GEN_DEF_FILE_CMD}
+  WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
+  OUTPUT_QUIET
+)
+
-- 
GitLab


From a51dc08d5ab2f024a0632a453712806556519be2 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 15 Feb 2023 17:36:15 +0000
Subject: [PATCH 071/332] lib: remove os specific options from CMake file

---
 lib/CMakeLists.txt | 271 +++++++++++++++------------------------------
 1 file changed, 87 insertions(+), 184 deletions(-)

diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index 01d0da5e..dc5b61d1 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -32,7 +32,9 @@ if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
 endif()
 
-# set default options
+#######################################
+# set default library options
+#######################################
 option(AESNI_EMU "AESNI emulation support" OFF)
 option(SAFE_PARAM "Parameter checking" ON)
 option(SAFE_DATA "Clear sensitive data from registers and memory" ON)
@@ -51,34 +53,9 @@ if(NOT SAFE_OPTIONS)
   set(SAFE_LOOKUP OFF)
 endif()
 
-# detect Linux or Windows
-if(CMAKE_HOST_UNIX)
-  set(LINUX 1)
-  set(LIB IPSec_MB) # 'lib' prefix assumed on Linux
-else()
-  set(WINDOWS 1)
-  set(LIB libIPSec_MB)
-  if(CMAKE_GENERATOR MATCHES "Visual Studio")
-    if(NOT (${CMAKE_GENERATOR_PLATFORM} MATCHES "x64"))
-      message(FATAL_ERROR "Only 64-bit platform supported. Re-run with '-A x64' option.")
-    endif()
-  endif()
-endif()
-
-message(STATUS "AESNI emulation support... ${AESNI_EMU}")
-message(STATUS "SAFE_OPTIONS...            ${SAFE_OPTIONS}")
-message(STATUS "SAFE_PARAM...              ${SAFE_PARAM}")
-message(STATUS "SAFE_DATA...               ${SAFE_DATA}")
-message(STATUS "SAFE_LOOKUP...             ${SAFE_LOOKUP}")
-message(STATUS "BUILD_SHARED_LIBS...       ${BUILD_SHARED_LIBS}")
-message(STATUS "EXTRA_CFLAGS...            ${EXTRA_CFLAGS}")
-message(STATUS "NO_COMPAT_IMB_API_053...   ${NO_COMPAT_IMB_API_053}")
-message(STATUS "CMAKE_GENERATOR...         ${CMAKE_GENERATOR}")
-message(STATUS "PLATFORM...                ${CMAKE_GENERATOR_PLATFORM}")
-message(STATUS "BUILD_TYPE...              ${CMAKE_BUILD_TYPE}")
-message(STATUS "CMAKE_VERBOSE_MAKEFILE...  ${CMAKE_VERBOSE_MAKEFILE}")
-
-# set directories
+#######################################
+# set library directories
+#######################################
 set(DIR_CURRENT ${CMAKE_CURRENT_SOURCE_DIR}/)
 set(DIR_INCLUDE ${CMAKE_CURRENT_SOURCE_DIR}/include)
 set(DIR_AVX_T1 ${CMAKE_CURRENT_SOURCE_DIR}/avx_t1)
@@ -96,7 +73,9 @@ if(AVX_IFMA)
   set(DIR_AVX2_T3 ${CMAKE_CURRENT_SOURCE_DIR}/avx2_t3)
 endif()
 
-# list all source directories
+########################################
+# create list of all source directories
+########################################
 set(DIR_SOURCES
   ${DIR_AVX_T1}
   ${DIR_AVX_T2}
@@ -117,13 +96,69 @@ if(AVX_IFMA)
   list(APPEND DIR_SOURCES ${DIR_AVX2_T3})
 endif()
 
-# set compiler definitions
-if(LINUX)
-  set(LIB_DEFINES LINUX)
-else()
-  set(LIB_DEFINES )
+########################################
+# find C source files in all directories
+########################################
+file(GLOB SRC_FILES_AVX_T1 "${DIR_AVX_T1}/*.c")
+file(GLOB SRC_FILES_AVX_T2 "${DIR_AVX_T2}/*.c")
+file(GLOB SRC_FILES_AVX2_T1 "${DIR_AVX2_T1}/*.c")
+file(GLOB SRC_FILES_AVX2_T2 "${DIR_AVX2_T2}/*.c")
+file(GLOB SRC_FILES_AVX2_T3 "${DIR_AVX2_T3}/*.c")
+file(GLOB SRC_FILES_AVX512_T1 "${DIR_AVX512_T1}/*.c")
+file(GLOB SRC_FILES_AVX512_T2 "${DIR_AVX512_T2}/*.c")
+file(GLOB SRC_FILES_SSE_T1 "${DIR_SSE_T1}/*.c")
+file(GLOB SRC_FILES_SSE_T2 "${DIR_SSE_T2}/*.c")
+file(GLOB SRC_FILES_SSE_T3 "${DIR_SSE_T3}/*.c")
+file(GLOB SRC_FILES_X86_64 "${DIR_X86_64}/*.c")
+file(GLOB SRC_FILES_NO_AESNI "${DIR_NO_AESNI}/*.c")
+
+# create list of all C source files
+set(SRC_FILES_C
+  ${SRC_FILES_AVX_T1}
+  ${SRC_FILES_AVX_T2}
+  ${SRC_FILES_AVX2_T1}
+  ${SRC_FILES_AVX2_T2}
+  ${SRC_FILES_AVX512_T1}
+  ${SRC_FILES_AVX512_T2}
+  ${SRC_FILES_SSE_T1}
+  ${SRC_FILES_SSE_T2}
+  ${SRC_FILES_SSE_T3}
+  ${SRC_FILES_X86_64}
+)
+if(AESNI_EMU)
+  list(APPEND SRC_FILES_C ${SRC_FILES_NO_AESNI})
+endif()
+if(AVX_IFMA)
+  list(APPEND SRC_FILES_C ${SRC_FILES_AVX2_T3})
 endif()
 
+########################################
+# generate list of assembly source files
+########################################
+foreach(DIR ${DIR_SOURCES})
+  file(GLOB_RECURSE TMP "${DIR}/*.asm")
+  list(APPEND SRC_FILES_ASM ${TMP})
+endforeach()
+
+########################################
+# print build information
+########################################
+message(STATUS "AESNI emulation support... ${AESNI_EMU}")
+message(STATUS "SAFE_OPTIONS...            ${SAFE_OPTIONS}")
+message(STATUS "SAFE_PARAM...              ${SAFE_PARAM}")
+message(STATUS "SAFE_DATA...               ${SAFE_DATA}")
+message(STATUS "SAFE_LOOKUP...             ${SAFE_LOOKUP}")
+message(STATUS "BUILD_SHARED_LIBS...       ${BUILD_SHARED_LIBS}")
+message(STATUS "EXTRA_CFLAGS...            ${EXTRA_CFLAGS}")
+message(STATUS "NO_COMPAT_IMB_API_053...   ${NO_COMPAT_IMB_API_053}")
+message(STATUS "CMAKE_GENERATOR...         ${CMAKE_GENERATOR}")
+message(STATUS "PLATFORM...                ${CMAKE_GENERATOR_PLATFORM}")
+
+########################################
+# set C compiler options
+########################################
+set(LIB_DEFINES)
+
 # enable SAFE OPTIONS
 if(SAFE_DATA)
   list(APPEND LIB_DEFINES SAFE_DATA)
@@ -147,171 +182,39 @@ if(NO_COMPAT_IMB_API_053)
   list(APPEND LIB_DEFINES NO_COMPAT_IMB_API_053)
 endif()
 
+# enable AVX IFMA support
 if(AVX_IFMA)
   list(APPEND LIB_DEFINES AVX_IFMA)
 endif()
 
-# set up NASM compilation
-enable_language(ASM_NASM)
-if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
-  message(FATAL_ERROR "Can't find assembler")
-endif()
-set(CAN_USE_ASSEMBLER 1)
-
-# generate list of assembly source files
-foreach(DIR ${DIR_SOURCES})
-  file(GLOB_RECURSE TMP "${DIR}/*.asm")
-  list(APPEND SRC_FILES_ASM ${TMP})
-endforeach()
-
-# set NASM flags
-if(LINUX)
-  string(APPEND CMAKE_ASM_NASM_FLAGS " -Werror -felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
-else()
-  # Windows
-  string(APPEND CMAKE_ASM_NASM_FLAGS " -Werror -Xvc -DWIN_ABI")
-  set_source_files_properties(${SRC_FILES_ASM} PROPERTIES
-    COMPILE_FLAGS "$<$<CONFIG:DEBUG>:-gcv8>")
-endif()
-
-# generate list of C source files
-file(GLOB SRC_FILES_AVX_T1 "${DIR_AVX_T1}/*.c")
-file(GLOB SRC_FILES_AVX_T2 "${DIR_AVX_T2}/*.c")
-file(GLOB SRC_FILES_AVX2_T1 "${DIR_AVX2_T1}/*.c")
-file(GLOB SRC_FILES_AVX2_T2 "${DIR_AVX2_T2}/*.c")
-file(GLOB SRC_FILES_AVX2_T3 "${DIR_AVX2_T3}/*.c")
-file(GLOB SRC_FILES_AVX512_T1 "${DIR_AVX512_T1}/*.c")
-file(GLOB SRC_FILES_AVX512_T2 "${DIR_AVX512_T2}/*.c")
-file(GLOB SRC_FILES_SSE_T1 "${DIR_SSE_T1}/*.c")
-file(GLOB SRC_FILES_SSE_T2 "${DIR_SSE_T2}/*.c")
-file(GLOB SRC_FILES_SSE_T3 "${DIR_SSE_T3}/*.c")
-file(GLOB SRC_FILES_X86_64 "${DIR_X86_64}/*.c")
-file(GLOB SRC_FILES_NO_AESNI "${DIR_NO_AESNI}/*.c")
-if(WINDOWS)
-  set(SRC_DEF_FILE ${LIB}_lnk.def)
-endif()
-
-# set compiler flags
-# linux flags
-if(LINUX)
-  set_source_files_properties(
-    ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
-    PPROPERTIES COMPILE_FLAGS
-    "-march=sandybridge -maes -mpclmul")
-  set_source_files_properties(
-    ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
-    ${SRC_FILES_AVX2_T3}
-    PPROPERTIES COMPILE_FLAGS
-    "-march=haswell -maes -mpclmul")
-  set_source_files_properties(
-    ${SRC_FILES_AVX512_T1} ${SRC_FILES_AVX512_T2}
-    PPROPERTIES COMPILE_FLAGS
-    "-march=broadwell -maes -mpclmul")
-  set_source_files_properties(
-    ${SRC_FILES_SSE_T1} ${SRC_FILES_SSE_T2} ${SRC_FILES_SSE_T3}
-    PROPERTIES COMPILE_FLAGS
-    "-march=nehalem -maes -mpclmul")
-  set_source_files_properties(
-    ${SRC_FILES_X86_64}
-    PROPERTIES COMPILE_FLAGS
-    "-msse4.2")
-  if(AESNI_EMU)
-    set_source_files_properties(
-      ${SRC_FILES_NO_AESNI}
-      PROPERTIES COMPILE_FLAGS
-      "-march=nehalem -mno-pclmul")
-  endif()
-
-  set(CMAKE_C_FLAGS "-MMD -fPIC -W -Wall -Wextra -Wmissing-declarations \
-    -Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
-    -Wformat-security -Wunreachable-code -Wmissing-noreturn \
-    -Wsign-compare -Wno-endif-labels -Wstrict-prototypes \
-    -Wmissing-prototypes -Wold-style-definition \
-    -fno-delete-null-pointer-checks -fwrapv"
-  )
-  # -fno-strict-overflow is not supported by clang
-  if(CMAKE_COMPILER_IS_GNUCC)
-    string(APPEND CMAKE_C_FLAGS " -fno-strict-overflow")
-  endif()
-  set(CMAKE_C_FLAGS_DEBUG "-g -DDEBUG -O0")
-  set(CMAKE_C_FLAGS_RELEASE "-fstack-protector -D_FORTIFY_SOURCE=2 -O3")
-  set(CMAKE_SHARED_LINKER_FLAGS "-Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now -lc")
+# add OS specific options
+if(CMAKE_HOST_UNIX)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/linux.cmake)
 else()
-  # Windows flags
-  set(CMAKE_C_FLAGS "/nologo /Y- /W3 /WX- /Gm- /fp:precise /EHsc")
-  set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
-  set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
-  set(CMAKE_SHARED_LINKER_FLAGS "/nologo")
-  set(CMAKE_SHARED_LINKER_FLAGS_RELEASE "/RELEASE /DEBUG /OPT:REF /OPT:ICF /INCREMENTAL:NO")
-  set(CMAKE_SHARED_LINKER_FLAGS_DEBUG "/DEBUG /INCREMENTAL:NO")
-  set(CMAKE_STATIC_LINKER_FLAGS "/nologo /nodefaultlib")
-  set_source_files_properties(
-    ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
-    ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
-    ${SRC_FILES_AVX2_T3} ${SRC_FILES_AVX512_T1}
-    ${SRC_FILES_AVX512_T2}
-    PPROPERTIES COMPILE_FLAGS
-    "${CMAKE_C_FLAGS} /arch:AVX")
+  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/windows.cmake)
 endif()
 
+# add user defined cflags
 string(APPEND CMAKE_C_FLAGS " ${EXTRA_CFLAGS}")
 
-set(SRC_FILES_C
-  ${SRC_FILES_AVX_T1}
-  ${SRC_FILES_AVX_T2}
-  ${SRC_FILES_AVX2_T1}
-  ${SRC_FILES_AVX2_T2}
-  ${SRC_FILES_AVX512_T1}
-  ${SRC_FILES_AVX512_T2}
-  ${SRC_FILES_SSE_T1}
-  ${SRC_FILES_SSE_T2}
-  ${SRC_FILES_SSE_T3}
-  ${SRC_FILES_X86_64}
-)
-if(AESNI_EMU)
-  list(APPEND SRC_FILES_C ${SRC_FILES_NO_AESNI})
-endif()
-if(AVX_IFMA)
-  list(APPEND SRC_FILES_C ${SRC_FILES_AVX2_T3})
-endif()
-
-# set C source file compiler definitions
+# add library definitions to all C source files
 foreach(FILE ${SRC_FILES_C})
   set_source_files_properties(${FILE} PROPERTIES
     COMPILE_DEFINITIONS "${LIB_DEFINES}")
 endforeach()
 
-if(WINDOWS)
-  # set extra windows compiler flags
-  foreach(FILE ${SRC_FILES_NO_AESNI})
-    set_source_files_properties(${FILE} PROPERTIES
-      COMPILE_DEFINITIONS "${LIB_DEFINES}"
-      COMPILE_OPTIONS "$<$<CONFIG:RELEASE>:/Od>")
-  endforeach()
-
-  # generate windows DEF file
-  if(NOT AESNI_EMU)
-    set(STR_FILTER "/c:_no_aesni")
-  endif()
-  if(NOT AVX_IFMA)
-    set(STR_FILTER "${STR_FILTER} /c:_avx2_t3")
-  endif()
-
-  # filter unused symbol exports
-  if(NOT STR_FILTER)
-    set(GEN_DEF_FILE_CMD "copy /Y ${LIB}.def ${SRC_DEF_FILE}")
-  else()
-    set(GEN_DEF_FILE_CMD "findstr /v ${STR_FILTER} ${LIB}.def > ${SRC_DEF_FILE}")
-  endif()
-
-  execute_process(
-    COMMAND cmd /C ${GEN_DEF_FILE_CMD}
-    WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
-    OUTPUT_QUIET
-  )
+########################################
+# setup NASM
+########################################
+enable_language(ASM_NASM)
+if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
+  message(FATAL_ERROR "Can't find assembler")
 endif()
+set(CAN_USE_ASSEMBLER 1)
 
-# add the library
+########################################
+# add library target
+########################################
 add_library(${LIB} ${SRC_FILES_ASM} ${SRC_FILES_C} ${SRC_DEF_FILE})
 target_include_directories(${LIB} PRIVATE ${DIR_CURRENT} ${DIR_INCLUDE} ${DIR_NO_AESNI})
 
-- 
GitLab


From 6ed80f76ba05e40a725c1655a1992203f80d7c48 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 16 Feb 2023 10:16:33 +0000
Subject: [PATCH 072/332] test: create linux cmake module

---
 test/cmake/linux.cmake | 54 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 54 insertions(+)
 create mode 100644 test/cmake/linux.cmake

diff --git a/test/cmake/linux.cmake b/test/cmake/linux.cmake
new file mode 100644
index 00000000..3c4c5cb2
--- /dev/null
+++ b/test/cmake/linux.cmake
@@ -0,0 +1,54 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice, this
+#   list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright notice,
+#   this list of conditions and the following disclaimer in the documentation
+#   and/or other materials provided with the distribution.
+# * Neither the name of Intel Corporation nor the names of its contributors may
+#   be used to endorse or promote products derived from this software without
+#   specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# ##############################################################################
+# Test application CMake Linux config
+# ##############################################################################
+
+set(LINUX 1)
+set(IPSEC_MB_LIB IPSec_MB)
+
+# set NASM flags
+set(CMAKE_ASM_NASM_FLAGS "-felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
+
+# set compiler definitions
+set(APP_DEFINES LINUX _GNU_SOURCE NO_COMPAT_IMB_API_053)
+
+# set C compiler flags
+set(CMAKE_C_FLAGS
+    "-MMD -W -Wall -Wextra -Wmissing-declarations \
+-Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
+-Wformat-security -Wunreachable-code -Wmissing-noreturn -Wsign-compare \
+-Wno-endif-labels -Wstrict-prototypes -Wmissing-prototypes \
+-Wold-style-definition -fno-delete-null-pointer-checks -fwrapv")
+set(CMAKE_C_FLAGS_DEBUG "-O0 -DDEBUG -g")
+set(CMAKE_C_FLAGS_RELEASE "-O3")
+set(CMAKE_EXE_LINKER_FLAGS_DEBUG "-g")
+
+# -fno-strict-overflow is not supported by clang
+if(CMAKE_COMPILER_IS_GNUCC)
+  string(APPEND CMAKE_C_FLAGS " -fno-strict-overflow")
+endif()
+
-- 
GitLab


From 9bf37b4b16c9516eb45860aead5442bc4e4e2727 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 16 Feb 2023 10:16:51 +0000
Subject: [PATCH 073/332] test: create windows cmake module

---
 test/cmake/windows.cmake | 41 ++++++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)
 create mode 100644 test/cmake/windows.cmake

diff --git a/test/cmake/windows.cmake b/test/cmake/windows.cmake
new file mode 100644
index 00000000..2c0d5316
--- /dev/null
+++ b/test/cmake/windows.cmake
@@ -0,0 +1,41 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice, this
+#   list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright notice,
+#   this list of conditions and the following disclaimer in the documentation
+#   and/or other materials provided with the distribution.
+# * Neither the name of Intel Corporation nor the names of its contributors may
+#   be used to endorse or promote products derived from this software without
+#   specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# ##############################################################################
+# Test application CMake Windows config
+# ##############################################################################
+
+set(WINDOWS 1)
+set(IPSEC_MB_LIB libIPSec_MB)
+
+# set NASM flags
+set(CMAKE_ASM_NASM_FLAGS "-Werror -fwin64 -Xvc -DWIN_ABI")
+
+# set C compiler flags
+set(CMAKE_C_FLAGS "/nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc ${EXTRA_CFLAGS}")
+set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
+set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
+set(CMAKE_EXE_LINKER_FLAGS_DEBUG "/debug")
+
-- 
GitLab


From bf6c82cab645fbd2e70576ecb9276a8908776d45 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 16 Feb 2023 10:17:30 +0000
Subject: [PATCH 074/332] test: remove os specific options from CMake file

---
 test/CMakeLists.txt | 74 ++++++++++++++++-----------------------------
 1 file changed, 26 insertions(+), 48 deletions(-)

diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index 2cca0e68..58d5ba0a 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -31,36 +31,16 @@ if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
 endif()
 
-# #################
-# Test Applications
-# #################
-
+########################################
+# set test and library names
+########################################
 set(TEST_APP ipsec_MB_testapp)
 set(XVALID_APP ipsec_xvalid_test)
 set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../lib)
 
-# detect Linux or Windows system
-if(CMAKE_HOST_UNIX)
-  set(LINUX 1)
-  set(IPSEC_MB_LIB IPSec_MB)
-else()
-  set(WINDOWS 1)
-  set(IPSEC_MB_LIB libIPSec_MB)
-endif()
-
-# set up NASM compilation
-enable_language(ASM_NASM)
-if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
-  message(FATAL_ERROR "Can't find assembler")
-endif()
-set(CAN_USE_ASSEMBLER TRUE)
-if(LINUX)
-  set(CMAKE_ASM_NASM_FLAGS "-felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
-else()
-  set(CMAKE_ASM_NASM_FLAGS "-Werror -fwin64 -Xvc -DWIN_ABI")
-endif()
-
+########################################
 # set ipsec_MB_test source files
+########################################
 set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/gcm_test.c
@@ -96,7 +76,9 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
 )
 
+########################################
 # set ipsec_xvalid_test source files
+########################################
 set(XVALID_APP_SRC_FILES_C
   ${CMAKE_CURRENT_SOURCE_DIR}/ipsec_xvalid.c
   ${CMAKE_CURRENT_SOURCE_DIR}/utils.c
@@ -105,34 +87,29 @@ set(XVALID_APP_SRC_FILES_ASM
   ${CMAKE_CURRENT_SOURCE_DIR}/misc.asm
 )
 
-# set flags for different OS's
-if(LINUX)
-  set(CMAKE_C_FLAGS "-MMD -W -Wall -Wextra -Wmissing-declarations \
-    -Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
-    -Wformat-security -Wunreachable-code -Wmissing-noreturn -Wsign-compare \
-    -Wno-endif-labels -Wstrict-prototypes -Wmissing-prototypes \
-    -Wold-style-definition -fno-delete-null-pointer-checks -fwrapv"
-  )
-  set(CMAKE_C_FLAGS_DEBUG "-O0 -DDEBUG -g")
-  set(CMAKE_C_FLAGS_RELEASE "-O3")
-  set(CMAKE_EXE_LINKER_FLAGS_DEBUG "-g")
+########################################
+# setup NASM
+########################################
+enable_language(ASM_NASM)
+if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
+  message(FATAL_ERROR "Can't find assembler")
+endif()
+set(CAN_USE_ASSEMBLER TRUE)
 
-  # -fno-strict-overflow is not supported by clang
-  if(CMAKE_COMPILER_IS_GNUCC)
-    string(APPEND CMAKE_C_FLAGS " -fno-strict-overflow")
-  endif()
+########################################
+# set C compiler and NASM options
+########################################
+# add OS specific options
+if(CMAKE_HOST_UNIX)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/linux.cmake)
 else()
-  # windows
-  set(CMAKE_C_FLAGS "/nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc ${EXTRA_CFLAGS}")
-  set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
-  set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
-  set(CMAKE_EXE_LINKER_FLAGS_DEBUG "/debug")
+  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/windows.cmake)
 endif()
 
-if(LINUX)
-  set(APP_DEFINES LINUX _GNU_SOURCE NO_COMPAT_IMB_API_053)
-endif()
 
+########################################
+# add targets
+########################################
 include_directories(${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR})
 link_directories(${LIB_DIR})
 
@@ -142,3 +119,4 @@ target_compile_definitions(${TEST_APP} PRIVATE ${APP_DEFINES})
 
 add_executable(${XVALID_APP} ${XVALID_APP_SRC_FILES_C} ${XVALID_APP_SRC_FILES_ASM})
 target_link_libraries(${XVALID_APP} PRIVATE ${IPSEC_MB_LIB})
+
-- 
GitLab


From 4686d94fb021a16562e1464b1e2af1f3ca7a36af Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 16 Feb 2023 17:06:31 +0000
Subject: [PATCH 075/332] FreeBSD CMake support

---
 lib/CMakeLists.txt                     | 2 +-
 lib/cmake/{linux.cmake => unix.cmake}  | 7 +++++--
 test/CMakeLists.txt                    | 2 +-
 test/cmake/{linux.cmake => unix.cmake} | 7 +++++--
 4 files changed, 12 insertions(+), 6 deletions(-)
 rename lib/cmake/{linux.cmake => unix.cmake} (95%)
 rename test/cmake/{linux.cmake => unix.cmake} (93%)

diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index dc5b61d1..72d834d4 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -189,7 +189,7 @@ endif()
 
 # add OS specific options
 if(CMAKE_HOST_UNIX)
-  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/linux.cmake)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/unix.cmake)
 else()
   include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/windows.cmake)
 endif()
diff --git a/lib/cmake/linux.cmake b/lib/cmake/unix.cmake
similarity index 95%
rename from lib/cmake/linux.cmake
rename to lib/cmake/unix.cmake
index 249a508e..27596c3a 100644
--- a/lib/cmake/linux.cmake
+++ b/lib/cmake/unix.cmake
@@ -24,7 +24,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 # ##############################################################################
-# IPSec_MB library CMake Linux config
+# IPSec_MB library CMake Unix config
 # ##############################################################################
 
 set(LINUX 1)
@@ -42,12 +42,15 @@ string(APPEND CMAKE_ASM_NASM_FLAGS
 
 # set C compiler flags
 set(CMAKE_C_FLAGS
-    "-MMD -fPIC -W -Wall -Wextra -Wmissing-declarations \
+    "-fPIC -W -Wall -Wextra -Wmissing-declarations \
 -Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
 -Wformat-security -Wunreachable-code -Wmissing-noreturn \
 -Wsign-compare -Wno-endif-labels -Wstrict-prototypes \
 -Wmissing-prototypes -Wold-style-definition \
 -fno-delete-null-pointer-checks -fwrapv")
+if(${CMAKE_SYSTEM_NAME} MATCHES "Linux")
+    string(APPEND CMAKE_C_FLAGS " -MMD")
+endif()
 set(CMAKE_C_FLAGS_DEBUG "-g -DDEBUG -O0")
 set(CMAKE_C_FLAGS_RELEASE "-fstack-protector -D_FORTIFY_SOURCE=2 -O3")
 set(CMAKE_SHARED_LINKER_FLAGS "-Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now -lc")
diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index 58d5ba0a..addb71a0 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -101,7 +101,7 @@ set(CAN_USE_ASSEMBLER TRUE)
 ########################################
 # add OS specific options
 if(CMAKE_HOST_UNIX)
-  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/linux.cmake)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/unix.cmake)
 else()
   include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/windows.cmake)
 endif()
diff --git a/test/cmake/linux.cmake b/test/cmake/unix.cmake
similarity index 93%
rename from test/cmake/linux.cmake
rename to test/cmake/unix.cmake
index 3c4c5cb2..9be85a76 100644
--- a/test/cmake/linux.cmake
+++ b/test/cmake/unix.cmake
@@ -24,7 +24,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 # ##############################################################################
-# Test application CMake Linux config
+# Test application CMake Unix config
 # ##############################################################################
 
 set(LINUX 1)
@@ -38,11 +38,14 @@ set(APP_DEFINES LINUX _GNU_SOURCE NO_COMPAT_IMB_API_053)
 
 # set C compiler flags
 set(CMAKE_C_FLAGS
-    "-MMD -W -Wall -Wextra -Wmissing-declarations \
+    "-W -Wall -Wextra -Wmissing-declarations \
 -Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
 -Wformat-security -Wunreachable-code -Wmissing-noreturn -Wsign-compare \
 -Wno-endif-labels -Wstrict-prototypes -Wmissing-prototypes \
 -Wold-style-definition -fno-delete-null-pointer-checks -fwrapv")
+if(${CMAKE_SYSTEM_NAME} MATCHES "Linux")
+    string(APPEND CMAKE_C_FLAGS " -MMD")
+endif()
 set(CMAKE_C_FLAGS_DEBUG "-O0 -DDEBUG -g")
 set(CMAKE_C_FLAGS_RELEASE "-O3")
 set(CMAKE_EXE_LINKER_FLAGS_DEBUG "-g")
-- 
GitLab


From cec497924dd080e98ee6c2d735513003ccd6462a Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 17 Feb 2023 11:42:39 +0000
Subject: [PATCH 076/332] lib: [cmake] Copy .def file to build directory

---
 lib/cmake/windows.cmake | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/cmake/windows.cmake b/lib/cmake/windows.cmake
index 50ccdeb7..c38e6c0f 100644
--- a/lib/cmake/windows.cmake
+++ b/lib/cmake/windows.cmake
@@ -29,7 +29,7 @@
 
 set(WINDOWS 1)
 set(LIB libIPSec_MB)
-set(SRC_DEF_FILE ${LIB}_lnk.def)
+set(SRC_DEF_FILE ${CMAKE_CURRENT_BINARY_DIR}/${LIB}_lnk.def)
 
 if(CMAKE_GENERATOR MATCHES "Visual Studio")
   if(NOT (${CMAKE_GENERATOR_PLATFORM} MATCHES "x64"))
-- 
GitLab


From 3dfaa9591486fe96d26d621afd7dfc1447c16e85 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Thu, 2 Feb 2023 15:57:11 +0000
Subject: [PATCH 077/332] test [fuzz]: refactor direct api fuzz test

---
 test/direct_api_fuzz_test.c | 811 +++++++++++++++++++++++-------------
 1 file changed, 532 insertions(+), 279 deletions(-)

diff --git a/test/direct_api_fuzz_test.c b/test/direct_api_fuzz_test.c
index fbbd350c..c0087898 100644
--- a/test/direct_api_fuzz_test.c
+++ b/test/direct_api_fuzz_test.c
@@ -34,57 +34,89 @@
 #include <time.h>
 #include <stdbool.h>
 #include <intel-ipsec-mb.h>
+#include "utils.h"
 
 int LLVMFuzzerTestOneInput(const uint8_t *, size_t);
 int LLVMFuzzerInitialize(int *, char ***);
 
-enum algorithm {
-        GCM = 1,
-        SNOW3G
+/* SNOW3G */
+void test_snow3g_init_key_sched(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_snow3g_f8_1_buff_bit(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_snow3g_f8_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_snow3g_f8_2_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_snow3g_f8_4_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_snow3g_f8_8_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_snow3g_f8_n_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_snow3g_f8_8_multikey(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_snow3g_f8_n_multikey(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_snow3g_f9_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+/* GCM-SGL */
+void test_aes128_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_aes128_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_aes192_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_aes192_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_aes256_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_aes256_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+/* GCM */
+void test_aes128_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_aes128_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_aes192_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_aes192_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_aes256_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+void test_aes256_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
+
+struct {
+        void (*func)(IMB_MGR *mb_mgr, uint8_t *buff, size_t dataSize);
+        const char *func_name;
+} direct_apis[] = {
+        {test_snow3g_init_key_sched, "test_snow3g_init_key_sched"},
+        {test_snow3g_f8_1_buff_bit, "test_snow3g_f8_1_buff_bit"},
+        {test_snow3g_f8_1_buff, "test_snow3g_f8_1_buff"},
+        {test_snow3g_f8_2_buff, "test_snow3g_f8_2_buff"},
+        {test_snow3g_f8_4_buff, "test_snow3g_f8_4_buff"},
+        {test_snow3g_f8_8_buff, "test_snow3g_f8_8_buff"},
+        {test_snow3g_f8_n_buff, "test_snow3g_f8_n_buff"},
+        {test_snow3g_f8_8_multikey, "test_snow3g_f8_8_multikey"},
+        {test_snow3g_f8_n_multikey, "test_snow3g_f8_n_multikey"},
+        {test_snow3g_f9_1_buff, "test_snow3g_f9_1_buff"},
+        {test_aes128_gcm_enc_sgl, "test_aes128_gcm_enc_sgl"},
+        {test_aes128_gcm_dec_sgl, "test_aes128_gcm_dec_sgl"},
+        {test_aes192_gcm_enc_sgl, "test_aes192_gcm_enc_sgl"},
+        {test_aes192_gcm_dec_sgl, "test_aes192_gcm_dec_sgl"},
+        {test_aes256_gcm_enc_sgl, "test_aes256_gcm_enc_sgl"},
+        {test_aes256_gcm_dec_sgl, "test_aes256_gcm_dec_sgl"},
+        {test_aes128_gcm_enc, "test_aes128_gcm_enc"},
+        {test_aes128_gcm_dec, "test_aes128_gcm_dec"},
+        {test_aes192_gcm_enc, "test_aes192_gcm_enc"},
+        {test_aes192_gcm_dec, "test_aes192_gcm_dec"},
+        {test_aes256_gcm_enc, "test_aes256_gcm_enc"},
+        {test_aes256_gcm_dec, "test_aes256_gcm_dec"},
 };
 
-enum key_size {
-        SIZE_128 = 1,
-        SIZE_192,
-        SIZE_256
+enum ar {
+        SSE = 1,
+        AVX,
+        AVX2,
+        AVX512
 };
 
-enum direction {
-        ENCRYPT = 1,
-        DECRYPT
-};
-
-enum api_id {
-        SGL = 1
-};
+enum ar arch;
 
-enum algorithm algo;
-enum key_size keysize;
-enum direction dir;
-enum api_id api;
+const uint32_t count = 8;
 
 static void parse_matched(int argc, char **argv)
 {
         int i;
 
         for (i = 0; i < argc; i++) {
-                if (strcmp(argv[i], "GCM") == 0) {
-                        i++;
-                        algo = GCM;
-                        if (strcmp(argv[i], "128") == 0)
-                                keysize = SIZE_128;
-                        else if (strcmp(argv[i], "192") == 0)
-                                keysize = SIZE_192;
-                        else if (strcmp(argv[i], "256") == 0)
-                                keysize = SIZE_256;
-                } else if (strcmp(argv[i], "SGL") == 0)
-                        api = SGL;
-                else if (strcmp(argv[i], "SNOW3G") == 0) {
-                        algo = SNOW3G;
-                } else if (strcmp(argv[i], "ENCRYPT") == 0)
-                        dir = ENCRYPT;
-                else if (strcmp(argv[i], "DECRYPT") == 0)
-                        dir = DECRYPT;
+                if (strcmp(argv[i], "SSE") == 0)
+                        arch = SSE;
+                else if (strcmp(argv[i], "AVX") == 0)
+                        arch = AVX;
+                else if (strcmp(argv[i], "AVX2") == 0)
+                        arch = AVX2;
+                else if (strcmp(argv[i], "AVX512") == 0)
+                        arch = AVX512;
         }
 }
 
@@ -93,14 +125,14 @@ int LLVMFuzzerInitialize(int *argc, char ***argv)
         int i;
 
         for (i = 0; i < *argc; i++) {
-                 /*
-                  * Check if the current argument matches the
-                  *  argument we are looking for.
+                /*
+                 * Check if the current argument matches the
+                 * argument we are looking for.
                  */
                 if (strcmp((*argv)[i], "custom") == 0) {
                         parse_matched(*argc - (i + 1), &((*argv)[i + 1]));
                         /*
-                         * Remove the matching argument and all arguments
+                         *  Remove the matching argument and all arguments
                          * after it from the command line.
                          */
                         *argc = i;
@@ -108,274 +140,495 @@ int LLVMFuzzerInitialize(int *argc, char ***argv)
                         break;
                 }
         }
-
         return 0;
 }
 
-int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
+void test_snow3g_init_key_sched(IMB_MGR *p_mgr, uint8_t *buff,
+                                size_t dataSize)
 {
-        IMB_MGR *p_mgr = NULL;
-        IMB_ARCH arch;
-        const char *ar = getenv("ARCH");
-	uint8_t *buff;
-	/* Setting minimum datasize to always fill GCM data structure  */
-        if ((dataSize < sizeof(struct gcm_key_data)) ||
-	    (dataSize < sizeof(struct gcm_context_data)))
-                return 0;
+        const void *init_key = buff;
+        snow3g_key_schedule_t exp_key_s;
+        snow3g_key_schedule_t *exp_key = &exp_key_s;
 
-	buff = malloc(dataSize);
-        if (buff == NULL)
-                return EXIT_FAILURE;
-	memcpy(buff, data, dataSize);
+        if (dataSize < sizeof(exp_key_s))
+                return;
+
+        IMB_SNOW3G_INIT_KEY_SCHED(p_mgr, init_key, exp_key);
+}
 
+void test_snow3g_f8_1_buff_bit(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const snow3g_key_schedule_t exp_key_s;
+        const snow3g_key_schedule_t *exp_key = &exp_key_s;
 
-	const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
-	struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        if (dataSize < sizeof(exp_key_s))
+                return;
 
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+
+        len = len * 8;
+        const uint8_t *iv = buff;
+        const uint32_t offset = *(uint32_t *)buff;
+
+        IMB_SNOW3G_F8_1_BUFFER_BIT(p_mgr, exp_key, iv, in, out, len, offset);
+}
+
+void test_snow3g_f8_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
         const snow3g_key_schedule_t exp_key_s;
         const snow3g_key_schedule_t *exp_key = &exp_key_s;
 
-        const snow3g_key_schedule_t *const exp_key_s_multi;
-        const snow3g_key_schedule_t *const *exp_key_multi = &exp_key_s_multi;
+        if (dataSize < sizeof(exp_key_s))
+                return;
 
-        snow3g_key_schedule_t exp_key_init;
-        snow3g_key_schedule_t *exp_key_i = &exp_key_init;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+
+        IMB_SNOW3G_F8_1_BUFFER(p_mgr, exp_key, iv, in, out, len);
+}
+
+void test_snow3g_f8_2_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const snow3g_key_schedule_t exp_key_s;
+        const snow3g_key_schedule_t *exp_key = &exp_key_s;
 
-	uint8_t *out = buff;
-        uint8_t *out2 = buff;
-        uint8_t *out3 = buff;
-        uint8_t *out4 = buff;
-        uint8_t *out5 = buff;
-        uint8_t *out6 = buff;
-        uint8_t *out7 = buff;
-        uint8_t *out8 = buff;
-        void *out_multi = buff;
+        if (dataSize < sizeof(exp_key_s))
+                return;
 
+        uint8_t *out = buff;
         const uint8_t *in = buff;
-	const uint8_t *in2 = buff;
-	const uint8_t *in3 = buff;
-	const uint8_t *in4 = buff;
-	const uint8_t *in5 = buff;
-	const uint8_t *in6 = buff;
-	const uint8_t *in7 = buff;
-	const uint8_t *in8 = buff;
-        const void *const in_multi = buff;
-
-	uint64_t len = dataSize;
-        uint64_t len2 = dataSize;
-        uint64_t len3 = dataSize;
-	uint64_t len4 = dataSize;
-	uint64_t len5 = dataSize;
-	uint64_t len6 = dataSize;
-	uint64_t len7 = dataSize;
-	uint64_t len8 = dataSize;
-        const void *const len_multi = buff;
-
-	const uint8_t *iv = buff;
-        const uint8_t *iv2 = buff;
-        const uint8_t *iv3 = buff;
-        const uint8_t *iv4 = buff;
-        const uint8_t *iv5 = buff;
-        const uint8_t *iv6 = buff;
-        const uint8_t *iv7 = buff;
-	const uint8_t *iv8 = buff;
-        const void *const iv_multi = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
 
-        const uint8_t *aad = buff;
-	uint64_t aad_len = (uint64_t) *buff;
-	uint8_t *auth_tag = buff;
-        uint64_t tag_len = (uint64_t) *buff;
-        const uint32_t offset = (uint32_t) *buff;
-        const void *init_key = buff;
+        IMB_SNOW3G_F8_2_BUFFER(p_mgr, exp_key, iv, iv, in,
+                               out, len, in, out, len);
+}
+
+void test_snow3g_f8_4_buff(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+{
+        const snow3g_key_schedule_t exp_key_s;
+        const snow3g_key_schedule_t *exp_key = &exp_key_s;
+
+        if (dataSize < sizeof(exp_key_s))
+                return;
+
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+
+        IMB_SNOW3G_F8_4_BUFFER(p_mgr, exp_key, iv, iv, iv,
+                               iv, in, out, len, in, out,
+                               len, in, out, len,
+                               in, out, len);
+}
+
+void test_snow3g_f8_8_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const snow3g_key_schedule_t exp_key_s;
+        const snow3g_key_schedule_t *exp_key = &exp_key_s;
+
+        if (dataSize < sizeof(exp_key_s))
+                return;
+
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+
+        IMB_SNOW3G_F8_8_BUFFER(p_mgr, exp_key, iv, iv, iv,
+                               iv, iv, iv, iv, iv,
+                               in, out, len, in, out, len,
+                               in, out, len,
+                               in, out, len, in, out,
+                               len, in, out, len, in,
+                               out, len, in, out, len);
+}
+
+void test_snow3g_f8_n_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const snow3g_key_schedule_t exp_key_s;
+        const snow3g_key_schedule_t *exp_key = &exp_key_s;
+
+        if (dataSize < sizeof(exp_key_s))
+                return;
 
-        const void *iv_n[8];
-        const void *in_n[8];
-        void *out_n[8];
-        uint32_t len_n[8];
-        const uint32_t count = 8;
+        const void *iv[8];
+        const void *in[8];
+        void *out[8];
+        uint32_t len[8];
 
         for (int i = 0; i < 8; i++) {
-                iv_n[i] = buff;
-                in_n[i] = buff;
-                out_n[i] = buff;
-                len_n[i] = dataSize;
+                iv[i] = buff;
+                in[i] = buff;
+                out[i] = buff;
+                len[i] = dataSize;
         }
 
+        IMB_SNOW3G_F8_N_BUFFER(p_mgr, exp_key, iv, in, out, len, count);
+}
+
+void test_snow3g_f8_8_multikey(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+{
+        const snow3g_key_schedule_t exp_key_s;
+        const snow3g_key_schedule_t *exp_key = &exp_key_s;
+
+        if (dataSize < sizeof(exp_key_s))
+                return;
+
+        const void *iv[8];
+        const void *in[8];
+        void *out[8];
+        uint32_t len[8];
+
+        for (int i = 0; i < 8; i++) {
+                iv[i] = buff;
+                in[i] = buff;
+                out[i] = buff;
+                len[i] = dataSize;
+        }
+
+        IMB_SNOW3G_F8_8_BUFFER_MULTIKEY(p_mgr, &exp_key, iv, in, out, len);
+}
+
+void test_snow3g_f8_n_multikey(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const snow3g_key_schedule_t exp_key_s;
+        const snow3g_key_schedule_t *exp_key = &exp_key_s;
+
+        if (dataSize < sizeof(exp_key_s))
+                return;
+
+        const void *iv[8];
+        const void *in[8];
+        void *out[8];
+        uint32_t len[8];
+
+        for (int i = 0; i < 8; i++) {
+                iv[i] = buff;
+                in[i] = buff;
+                out[i] = buff;
+                len[i] = dataSize;
+        }
+
+        IMB_SNOW3G_F8_N_BUFFER_MULTIKEY(p_mgr, &exp_key, iv, in, out, len,
+                                        count);
+}
+
+void test_snow3g_f9_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const snow3g_key_schedule_t exp_key_s;
+        const snow3g_key_schedule_t *exp_key = &exp_key_s;
+
+        if (dataSize < sizeof(exp_key_s))
+                return;
+
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        uint8_t *auth_tag = buff;
+
+        IMB_SNOW3G_F9_1_BUFFER(p_mgr, exp_key, iv, in, len, auth_tag);
+}
+
+void test_aes128_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+
+        IMB_AES128_GCM_ENC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, tag_len);
+}
+
+void test_aes128_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES128_GCM_DEC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, tag_len);
+}
+
+void test_aes192_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES192_GCM_ENC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, tag_len);
+}
+
+void test_aes192_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES192_GCM_DEC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, tag_len);
+}
+
+void test_aes256_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES256_GCM_ENC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, tag_len);
+}
+
+void test_aes256_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES256_GCM_DEC(p_mgr, key, ctx, out, in, len, iv, aad,
+                           aad_len, auth_tag, tag_len);
+}
+
+void test_aes128_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES128_GCM_INIT(p_mgr, key, ctx, iv, aad, aad_len);
+        IMB_AES128_GCM_ENC_UPDATE(p_mgr, key, ctx, out, in, len);
+        IMB_AES128_GCM_ENC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
+}
+
+void test_aes128_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES128_GCM_INIT(p_mgr, key, ctx, iv, aad, aad_len);
+        IMB_AES128_GCM_DEC_UPDATE(p_mgr, key, ctx, out, in, len);
+        IMB_AES128_GCM_DEC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
+}
+
+void test_aes192_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES192_GCM_INIT(p_mgr, key, ctx, iv, aad, aad_len);
+        IMB_AES192_GCM_ENC_UPDATE(p_mgr, key, ctx, out, in, len);
+        IMB_AES192_GCM_ENC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
+}
+
+void test_aes192_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES192_GCM_INIT(p_mgr, key, ctx, iv, aad, aad_len);
+        IMB_AES192_GCM_DEC_UPDATE(p_mgr, key, ctx, out, in, len);
+        IMB_AES192_GCM_DEC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
+}
+
+void test_aes256_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES256_GCM_INIT(p_mgr, key, ctx, iv, aad, aad_len);
+        IMB_AES256_GCM_ENC_UPDATE(p_mgr, key, ctx, out, in, len);
+        IMB_AES256_GCM_ENC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
+}
+
+void test_aes256_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if ((dataSize < sizeof(struct gcm_key_data)) ||
+            (dataSize < sizeof(struct gcm_context_data)))
+                return;
+
+        const struct gcm_key_data *key = (const struct gcm_key_data *)buff;
+        struct gcm_context_data *ctx = (struct gcm_context_data *)buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = (uint64_t) *buff;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_AES256_GCM_INIT(p_mgr, key, ctx, iv, aad, aad_len);
+        IMB_AES256_GCM_DEC_UPDATE(p_mgr, key, ctx, out, in, len);
+        IMB_AES256_GCM_DEC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
+}
+
+int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
+{
+        IMB_ARCH arch_to_run = IMB_ARCH_NUM;
+        static IMB_MGR *p_mgr = NULL;
+        uint8_t *buff;
+
+        buff = malloc(dataSize);
+        if (buff == NULL)
+                return EXIT_FAILURE;
+        memcpy(buff, data, dataSize);
+
         /* allocate multi-buffer manager */
-        p_mgr = alloc_mb_mgr(0);
         if (p_mgr == NULL) {
-                printf("Error allocating MB_MGR structure!\n");
-                free(buff);
-                return EXIT_FAILURE;
-        }
+                p_mgr = alloc_mb_mgr(0);
+                if (p_mgr == NULL) {
+                        printf("Error allocating MB_MGR structure!\n");
+                        free(buff);
+                        return EXIT_FAILURE;
+                }
 
-	if (ar == NULL) {
-                init_mb_mgr_auto(p_mgr, &arch);
-        } else {
-                if (strcasecmp(ar, "AVX") == 0)
+                if (arch == SSE)
+                        init_mb_mgr_sse(p_mgr);
+                else if (arch == AVX)
                         init_mb_mgr_avx(p_mgr);
-                else if (strcasecmp(ar, "AVX2") == 0)
+                else if (arch == AVX2)
                         init_mb_mgr_avx2(p_mgr);
-                else if (strcasecmp(ar, "AVX512") == 0)
+                else if (arch == AVX512)
                         init_mb_mgr_avx512(p_mgr);
-                else if (strcasecmp(ar, "SSE") == 0)
-                        init_mb_mgr_sse(p_mgr);
                 else
-                        init_mb_mgr_auto(p_mgr, &arch);
+                        init_mb_mgr_auto(p_mgr, &arch_to_run);
         }
 
-        if (algo == GCM) {
-                if (keysize == SIZE_128) {
-                        /* 128 key size */
-                        if (dir == ENCRYPT) {
-                                if (api == SGL) {
-                                        IMB_AES128_GCM_ENC(p_mgr, key,
-                                                           ctx, out, in, len,
-                                                           iv, aad, aad_len,
-                                                           auth_tag,
-                                                           tag_len);
-                                } else {
-                                        IMB_AES128_GCM_INIT(p_mgr, key, ctx,
-                                                            iv, aad, aad_len);
-                                        IMB_AES128_GCM_ENC_UPDATE(p_mgr, key,
-                                                                  ctx, out,
-                                                                  in, len);
-                                        IMB_AES128_GCM_ENC_FINALIZE(p_mgr, key,
-                                                                    ctx,
-                                                                    auth_tag,
-                                                                    tag_len);
-                                }
-                        } else if (dir == DECRYPT) {
-                                if (api == SGL) {
-                                        IMB_AES128_GCM_DEC(p_mgr, key,
-                                                           ctx, out, in, len,
-                                                           iv, aad, aad_len,
-                                                           auth_tag,
-                                                           tag_len);
-                                } else {
-                                        IMB_AES128_GCM_INIT(p_mgr, key, ctx,
-                                                            iv, aad, aad_len);
-                                        IMB_AES128_GCM_DEC_UPDATE(p_mgr, key,
-                                                                  ctx, out,
-                                                                  in, len);
-                                        IMB_AES128_GCM_DEC_FINALIZE(p_mgr, key,
-                                                                    ctx,
-                                                                    auth_tag,
-                                                                    tag_len);
-                                }
-                        }
-                } else if (keysize == SIZE_192) {
-                        /* 192 key size */
-                        if (dir == ENCRYPT) {
-                                if (api == SGL) {
-                                        IMB_AES192_GCM_ENC(p_mgr, key,
-                                                           ctx, out, in, len,
-                                                           iv, aad, aad_len,
-                                                           auth_tag,
-                                                           tag_len);
-                                } else {
-                                        IMB_AES192_GCM_INIT(p_mgr, key, ctx,
-                                                            iv, aad, aad_len);
-                                        IMB_AES192_GCM_ENC_UPDATE(p_mgr, key,
-                                                                  ctx, out,
-                                                                  in, len);
-                                        IMB_AES192_GCM_ENC_FINALIZE(p_mgr, key,
-                                                                    ctx,
-                                                                    auth_tag,
-                                                                    tag_len);
-                                }
-                        } else if (dir == DECRYPT) {
-                                if (api == SGL) {
-                                        IMB_AES192_GCM_DEC(p_mgr, key,
-                                                           ctx, out, in, len,
-                                                           iv, aad, aad_len,
-                                                           auth_tag,
-                                                           tag_len);
-                                } else {
-                                        IMB_AES192_GCM_INIT(p_mgr, key, ctx,
-                                                            iv, aad, aad_len);
-                                        IMB_AES192_GCM_DEC_UPDATE(p_mgr, key,
-                                                                  ctx, out,
-                                                                  in, len);
-                                        IMB_AES192_GCM_DEC_FINALIZE(p_mgr, key,
-                                                                    ctx,
-                                                                    auth_tag,
-                                                                    tag_len);
-                                }
-                        }
-                } else if (keysize == SIZE_256) {
-                        /* 256 key size */
-                        if (dir == ENCRYPT) {
-                                if (api == SGL) {
-                                        IMB_AES256_GCM_ENC(p_mgr, key,
-                                                           ctx, out, in, len,
-                                                           iv, aad, aad_len,
-                                                           auth_tag,
-                                                           tag_len);
-                                } else {
-                                        IMB_AES256_GCM_INIT(p_mgr, key, ctx,
-                                                            iv, aad, aad_len);
-                                        IMB_AES256_GCM_ENC_UPDATE(p_mgr, key,
-                                                                  ctx, out,
-                                                                  in, len);
-                                        IMB_AES256_GCM_ENC_FINALIZE(p_mgr, key,
-                                                                    ctx,
-                                                                    auth_tag,
-                                                                    tag_len);
-                                }
-                        } else if (dir == DECRYPT) {
-                                if (api == SGL) {
-                                        IMB_AES256_GCM_DEC(p_mgr, key,
-                                                           ctx, out, in, len,
-                                                           iv, aad, aad_len,
-                                                           auth_tag,
-                                                           tag_len);
-                                } else {
-                                        IMB_AES256_GCM_INIT(p_mgr, key, ctx,
-                                                            iv, aad, aad_len);
-                                        IMB_AES256_GCM_DEC_UPDATE(p_mgr, key,
-                                                                  ctx, out,
-                                                                  in, len);
-                                        IMB_AES256_GCM_DEC_FINALIZE(p_mgr, key,
-                                                                    ctx,
-                                                                    auth_tag,
-                                                                    tag_len);
-                                }
-                        }
-                }
-        } else if (algo == SNOW3G) {
-                IMB_SNOW3G_INIT_KEY_SCHED(p_mgr, init_key, exp_key_i);
-                IMB_SNOW3G_F8_1_BUFFER_BIT(p_mgr, exp_key, iv, in, out,
-                                           len, offset);
-                IMB_SNOW3G_F8_1_BUFFER(p_mgr, exp_key, iv, in, out,
-                                       len);
-                IMB_SNOW3G_F8_2_BUFFER(p_mgr, exp_key, iv, iv2, in,
-                                               out, len, in2, out2, len2);
-                IMB_SNOW3G_F8_4_BUFFER(p_mgr, exp_key, iv, iv2, iv3,
-                                       iv4, in, out, len, in2, out2,
-                                       len2, in3, out3, len3,
-                                       in4, out4, len4);
-                IMB_SNOW3G_F8_8_BUFFER(p_mgr, exp_key, iv, iv2, iv3,
-                                       iv4, iv5, iv6, iv7, iv8,
-                                       in, out, len, in2, out2, len2,
-                                       in3, out3, len3,
-                                       in4, out4, len4, in5, out5,
-                                       len5, in6, out6, len6, in7,
-                                       out7, len7, in8, out8, len8);
-                IMB_SNOW3G_F8_N_BUFFER(p_mgr, exp_key, iv_n,
-                                       in_n, out_n,
-                                       len_n, count);
-                IMB_SNOW3G_F8_8_BUFFER_MULTIKEY(p_mgr, exp_key_multi,
-                                                iv_multi, in_multi,
-                                                out_multi, len_multi);
-                IMB_SNOW3G_F8_N_BUFFER_MULTIKEY(p_mgr, exp_key_multi,
-                                                iv_n, in_n,
-                                                out_n, len_n,
-                                                count);
-                IMB_SNOW3G_F9_1_BUFFER(p_mgr, exp_key, iv,
-                                       in, len, auth_tag);
-        }
-        free_mb_mgr(p_mgr);
-	free(buff);
+        const int idx = data[0]%DIM(direct_apis);
+
+        direct_apis[idx].func(p_mgr, buff, dataSize);
+
+        free(buff);
         return 0;
 }
-- 
GitLab


From 5eec7136deeadd0a3a9fddb793533ce1c0d02ef7 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Mon, 13 Feb 2023 13:52:38 +0000
Subject: [PATCH 078/332] avx2: [POLY1305] use scalar code for buffers below
 256 bytes

Buffers below 256 bytes are faster handled by scalar code
than the new vectorized code.
---
 lib/avx2_t3/poly_fma_avx2.asm | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/lib/avx2_t3/poly_fma_avx2.asm b/lib/avx2_t3/poly_fma_avx2.asm
index 059757a6..9fdebb2f 100644
--- a/lib/avx2_t3/poly_fma_avx2.asm
+++ b/lib/avx2_t3/poly_fma_avx2.asm
@@ -652,8 +652,8 @@ mksection .text
 %define %%XTMP2 XWORD(%%YTMP2)
 %define %%XTMP3 XWORD(%%YTMP3)
 
-        ; Minimum of 128 bytes to run vectorized code
-        cmp     %%LEN, POLY1305_BLOCK_SIZE*8
+        ; Minimum of 256 bytes to run vectorized code
+        cmp     %%LEN, POLY1305_BLOCK_SIZE*16
         jb      %%_final_loop
 
         ; Spread accumulator into 44-bit limbs in quadwords
-- 
GitLab


From e64b2321c5a3cb552fbc27394a92f9a0ac6ed078 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Tue, 21 Feb 2023 10:40:44 +0000
Subject: [PATCH 079/332] lib [cfb]: fix cet issue in cfb 256

---
 lib/sse_t1/aes_cfb_sse.asm | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/sse_t1/aes_cfb_sse.asm b/lib/sse_t1/aes_cfb_sse.asm
index bafa891d..dee9caab 100644
--- a/lib/sse_t1/aes_cfb_sse.asm
+++ b/lib/sse_t1/aes_cfb_sse.asm
@@ -206,6 +206,7 @@ AES_CFB_128_ONE:
 MKGLOBAL(AES_CFB_256_ONE,function,)
 align 32
 AES_CFB_256_ONE:
+        endbranch64
         do_cfb 13
 
 	ret
-- 
GitLab


From 206775e1993d657869f2d2ebc7d2ec982a21154d Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Mon, 20 Feb 2023 14:38:54 +0000
Subject: [PATCH 080/332] lib: [CFB] make CFB-128 API internal

---
 lib/include/arch_avx2_type1.h   |  3 +++
 lib/include/arch_avx512_type1.h |  3 +++
 lib/include/arch_avx_type1.h    |  4 +++-
 lib/include/arch_sse_type1.h    |  3 +++
 lib/intel-ipsec-mb.h            | 33 ---------------------------------
 5 files changed, 12 insertions(+), 34 deletions(-)

diff --git a/lib/include/arch_avx2_type1.h b/lib/include/arch_avx2_type1.h
index fe4a4995..c72a189a 100644
--- a/lib/include/arch_avx2_type1.h
+++ b/lib/include/arch_avx2_type1.h
@@ -39,6 +39,9 @@ void call_sha256_oct_avx2_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 void call_sha512_x4_avx2_from_c(SHA512_ARGS *args, uint64_t size_in_blocks);
 
 /*AES-CFB*/
+IMB_DLL_EXPORT void aes_cfb_128_one_avx2(void *out, const void *in,
+                                         const void *iv, const void *keys,
+                                         uint64_t len);
 IMB_DLL_EXPORT void aes_cfb_256_one_avx2(void *out, const void *in,
                                          const void *iv, const void *keys,
                                          uint64_t len);
diff --git a/lib/include/arch_avx512_type1.h b/lib/include/arch_avx512_type1.h
index 229ea745..8e07eae9 100644
--- a/lib/include/arch_avx512_type1.h
+++ b/lib/include/arch_avx512_type1.h
@@ -157,6 +157,9 @@ void call_sha256_x16_avx512_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 void call_sha512_x8_avx512_from_c(SHA512_ARGS *args, uint64_t size_in_blocks);
 
 /* AES-CFB */
+IMB_DLL_EXPORT void aes_cfb_128_one_avx512(void *out, const void *in,
+                                           const void *iv, const void *keys,
+                                           uint64_t len);
 IMB_DLL_EXPORT void aes_cfb_256_one_avx512(void *out, const void *in,
                                            const void *iv, const void *keys,
                                            uint64_t len);
diff --git a/lib/include/arch_avx_type1.h b/lib/include/arch_avx_type1.h
index a0983f41..008b7eda 100644
--- a/lib/include/arch_avx_type1.h
+++ b/lib/include/arch_avx_type1.h
@@ -98,11 +98,13 @@ void aes_cbcs_1_9_dec_128_avx(const void *in, const uint8_t *IV,
                               uint64_t len_bytes, void *next_iv);
 
 /* AES-CFB */
+IMB_DLL_EXPORT void aes_cfb_128_one_avx(void *out, const void *in,
+                                        const void *iv, const void *keys,
+                                        uint64_t len);
 IMB_DLL_EXPORT void aes_cfb_256_one_avx(void *out, const void *in,
                                         const void *iv, const void *keys,
                                         uint64_t len);
 
-
 /* stitched AES128-CNTR, CRC32 and BIP */
 IMB_JOB *submit_job_pon_enc_avx(IMB_JOB *job);
 IMB_JOB *submit_job_pon_dec_avx(IMB_JOB *job);
diff --git a/lib/include/arch_sse_type1.h b/lib/include/arch_sse_type1.h
index 51abe4e8..9efc4a03 100644
--- a/lib/include/arch_sse_type1.h
+++ b/lib/include/arch_sse_type1.h
@@ -92,6 +92,9 @@ void aes_cbcs_1_9_dec_128_sse(const void *in, const uint8_t *IV,
                               uint64_t len_bytes, void *next_iv);
 
 /* AES-CFB */
+IMB_DLL_EXPORT void aes_cfb_128_one_sse(void *out, const void *in,
+                                        const void *iv, const void *keys,
+                                        uint64_t len);
 IMB_DLL_EXPORT void aes_cfb_256_one_sse(void *out, const void *in,
                                         const void *iv, const void *keys,
                                         uint64_t len);
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index d560ecf1..57f03983 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -3134,39 +3134,6 @@ IMB_DLL_EXPORT void aes_cmac_subkey_gen_avx2(const void *key_exp, void *key1,
  */
 IMB_DLL_EXPORT void aes_cmac_subkey_gen_avx512(const void *key_exp, void *key1,
                                                void *key2);
-/**
- * @brief AES-CFB-128 Encrypt/Decrypt up to one block.
- *
- * Processes only one buffer at a time.
- * Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.
- *
- * @param [out] out Plaintext/Ciphertext output
- * @param [in] in   Plaintext/Ciphertext input
- * @param [in] iv   Pointer to 16 byte IV
- * @param [in] keys Pointer to expanded AES keys
- * @param [in] len  Length of data in bytes
- */
-IMB_DLL_EXPORT void aes_cfb_128_one_sse(void *out, const void *in,
-                                        const void *iv, const void *keys,
-                                        uint64_t len);
-/**
- * @copydoc aes_cfb_128_one_sse
- */
-IMB_DLL_EXPORT void aes_cfb_128_one_avx(void *out, const void *in,
-                                        const void *iv, const void *keys,
-                                        uint64_t len);
-/**
- * @copydoc aes_cfb_128_one_sse
- */
-IMB_DLL_EXPORT void aes_cfb_128_one_avx2(void *out, const void *in,
-                                         const void *iv, const void *keys,
-                                         uint64_t len);
-/**
- * @copydoc aes_cfb_128_one_sse
- */
-IMB_DLL_EXPORT void aes_cfb_128_one_avx512(void *out, const void *in,
-                                           const void *iv, const void *keys,
-                                           uint64_t len);
 
 /*
  * Direct GCM API.
-- 
GitLab


From fc698fd3442906a80bc4a773a7b9e43582b97e6f Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 29 Aug 2022 06:26:38 -0700
Subject: [PATCH 081/332] gcm: [quic] Added AES-GCM API for QUIC use case

- test: GCM test module extended with GCM QUIC API
---
 lib/Makefile              |   3 +-
 lib/intel-ipsec-mb.h      |  35 +++++++
 lib/libIPSec_MB.def       |   1 +
 lib/win_x64.mak           |   3 +-
 lib/x86_64/quic_aes_gcm.c | 195 ++++++++++++++++++++++++++++++++++++++
 test/gcm_test.c           | 185 +++++++++++++++++++++++++++++++++++-
 6 files changed, 419 insertions(+), 3 deletions(-)
 create mode 100644 lib/x86_64/quic_aes_gcm.c

diff --git a/lib/Makefile b/lib/Makefile
index 0cc48b35..d125edc4 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -311,7 +311,8 @@ c_lib_objs := \
 	mb_mgr_auto.o \
 	error.o \
 	ooo_mgr_reset.o \
-	self_test.o
+	self_test.o \
+	quic_aes_gcm.o
 
 ifeq ($(AESNI_EMU), y)
 c_lib_objs := $(c_lib_objs) \
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 57f03983..c330c6f0 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -4083,6 +4083,41 @@ IMB_DLL_EXPORT int snow3g_f9_iv_gen(const uint32_t count,
  */
 IMB_DLL_EXPORT void imb_clear_mem(void *mem, const size_t size);
 
+/**
+ * @brief Batch of GCM encrypt/decrypt operations with the same key
+ *
+ * @note IV length of 12 bytes is assumed.
+ * @note If used out of place then AAD needs to be copied by the caller.
+ *
+ * @param [in]  state         pointer to IMB_MGR
+ * @param [in]  key_data      initialized key data (AES keys and hash keys)
+ * @param [in]  key_size      key size (in bytes, see IMB_KEY_128_BYTES etc.)
+ * @param [in]  cipher_dir    cipher direction (IMB_DIR_ENCRYPT / DECRYPT)
+ * @param [out] dst_ptr_array array with destination pointers
+ * @param [in]  src_ptr_array array with source pointers
+ * @param [in]  len_array     array with message lengths in bytes
+ * @param [in]  iv_ptr_array  array with IV pointers
+ * @param [in]  aad_ptr_array array with AAD pointers
+ * @param [in]  aad_len       AAD length in bytes
+ * @param [out] tag_ptr_array array with authentication TAG pointers
+ * @param [in]  tag_len       authentication TAG length in bytes
+ * @param [in]  num_packets   number of packets in this batch
+ */
+IMB_DLL_EXPORT void
+imb_quic_aes_gcm(IMB_MGR *state,
+                 const struct gcm_key_data *key_data,
+                 const IMB_KEY_SIZE_BYTES key_size,
+                 const IMB_CIPHER_DIRECTION cipher_dir,
+                 void *dst_ptr_array[],
+                 const void * const src_ptr_array[],
+                 const uint64_t len_array[],
+                 const void * const iv_ptr_array[],
+                 const void * const aad_ptr_array[],
+                 const uint64_t aad_len,
+                 void *tag_ptr_array[],
+                 const uint64_t tag_len,
+                 const uint64_t num_packets);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index 3904b0d5..f2594cf7 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -698,3 +698,4 @@ EXPORTS
     aes_cfb_256_one_avx2			@672
     aes_cfb_256_one_avx512			@673
     aes_cfb_256_one_sse_no_aesni		@674
+    imb_quic_aes_gcm				@675
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index f309e208..efc0dcb7 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -351,7 +351,8 @@ lib_objs1 = \
 	$(OBJ_DIR)\memcpy_sse.obj \
 	$(OBJ_DIR)\memcpy_avx.obj \
 	$(OBJ_DIR)\ooo_mgr_reset.obj \
-	$(OBJ_DIR)\self_test.obj
+	$(OBJ_DIR)\self_test.obj \
+	$(OBJ_DIR)\quic_aes_gcm.obj
 
 lib_objs2 = \
 	$(OBJ_DIR)\mb_mgr_aes192_cbc_enc_flush_avx.obj \
diff --git a/lib/x86_64/quic_aes_gcm.c b/lib/x86_64/quic_aes_gcm.c
new file mode 100644
index 00000000..f0d13daa
--- /dev/null
+++ b/lib/x86_64/quic_aes_gcm.c
@@ -0,0 +1,195 @@
+/*******************************************************************************
+  Copyright (c) 2023, Intel Corporation
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions are met:
+
+      * Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+      * Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+      * Neither the name of Intel Corporation nor the names of its contributors
+        may be used to endorse or promote products derived from this software
+        without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include "intel-ipsec-mb.h"
+#include "include/error.h"
+
+IMB_DLL_EXPORT void
+imb_quic_aes_gcm(IMB_MGR *state,
+                 const struct gcm_key_data *key_data,
+                 const IMB_KEY_SIZE_BYTES key_size,
+                 const IMB_CIPHER_DIRECTION cipher_dir,
+                 void *dst_ptr_array[],
+                 const void * const src_ptr_array[],
+                 const uint64_t len_array[],
+                 const void * const iv_ptr_array[],
+                 const void * const aad_ptr_array[],
+                 const uint64_t aad_len,
+                 void *tag_ptr_array[],
+                 const uint64_t tag_len,
+                 const uint64_t num_packets)
+{
+	/* @note 12 byte IV is assumed */
+	/* @note it can be out of place operation but AAD needs to be copied by the caller */
+	struct gcm_context_data ctx;
+	uint64_t n;
+
+#ifdef SAFE_PARAM
+        if (key_data == NULL) {
+                imb_set_errno(state, IMB_ERR_NULL_EXP_KEY);
+                return;
+        }
+        if (dst_ptr_array == NULL) {
+                imb_set_errno(state, IMB_ERR_NULL_DST);
+                return;
+        }
+        if (src_ptr_array == NULL) {
+                imb_set_errno(state, IMB_ERR_NULL_SRC);
+                return;
+        }
+        if (iv_ptr_array == NULL) {
+                imb_set_errno(state, IMB_ERR_NULL_IV);
+                return;
+        }
+        if (aad_ptr_array == NULL) {
+                imb_set_errno(state, IMB_ERR_NULL_AAD);
+                return;
+        }
+        if (tag_ptr_array == NULL) {
+                imb_set_errno(state, IMB_ERR_NULL_AUTH);
+                return;
+        }
+        for (n = 0; n < num_packets; n++) {
+                if (dst_ptr_array[n] == NULL && len_array[n] != 0) {
+                        imb_set_errno(state, IMB_ERR_NULL_DST);
+                        return;
+                }
+                if (src_ptr_array[n] == NULL && len_array[n] != 0) {
+                        imb_set_errno(state, IMB_ERR_NULL_SRC);
+                        return;
+                }
+                if (iv_ptr_array[n] == NULL) {
+                        imb_set_errno(state, IMB_ERR_NULL_IV);
+                        return;
+                }
+                if (aad_ptr_array[n] == NULL && aad_len != 0) {
+                        imb_set_errno(state, IMB_ERR_NULL_AAD);
+                        return;
+                }
+                if (tag_ptr_array[n] == NULL) {
+                        imb_set_errno(state, IMB_ERR_NULL_AUTH);
+                        return;
+                }
+        }
+        switch (key_size) {
+        case IMB_KEY_128_BYTES:
+        case IMB_KEY_192_BYTES:
+        case IMB_KEY_256_BYTES:
+                break;
+        default:
+                imb_set_errno(state, IMB_ERR_KEY_LEN);
+                return;
+        }
+        switch (cipher_dir) {
+        case IMB_DIR_ENCRYPT:
+        case IMB_DIR_DECRYPT:
+                break;
+        default:
+                imb_set_errno(state, IMB_ERR_JOB_CIPH_DIR);
+                return;
+        }
+#endif /* SAFE_PARAM */
+
+	if (cipher_dir == IMB_DIR_ENCRYPT) {
+		if (key_size == IMB_KEY_128_BYTES) {
+			for (n = 0; n < num_packets; n++) {
+				IMB_AES128_GCM_ENC(state, key_data, &ctx,
+						   dst_ptr_array[n],
+						   src_ptr_array[n],
+						   len_array[n],
+						   iv_ptr_array[n],
+						   aad_ptr_array[n],
+						   aad_len,
+						   tag_ptr_array[n],
+						   tag_len);
+			}
+		} else if (key_size == IMB_KEY_256_BYTES) {
+			for (n = 0; n < num_packets; n++) {
+				IMB_AES256_GCM_ENC(state, key_data, &ctx,
+						   dst_ptr_array[n],
+						   src_ptr_array[n],
+						   len_array[n],
+						   iv_ptr_array[n],
+						   aad_ptr_array[n],
+						   aad_len,
+						   tag_ptr_array[n],
+						   tag_len);
+			}
+		} else /* assume 192-bits key */ {
+			for (n = 0; n < num_packets; n++) {
+				IMB_AES192_GCM_ENC(state, key_data, &ctx,
+						   dst_ptr_array[n],
+						   src_ptr_array[n],
+						   len_array[n],
+						   iv_ptr_array[n],
+						   aad_ptr_array[n],
+						   aad_len,
+						   tag_ptr_array[n],
+						   tag_len);
+			}
+		}
+	} else /* decrypt direction */ {
+		if (key_size == IMB_KEY_128_BYTES) {
+			for (n = 0; n < num_packets; n++) {
+				IMB_AES128_GCM_DEC(state, key_data, &ctx,
+						   dst_ptr_array[n],
+						   src_ptr_array[n],
+						   len_array[n],
+						   iv_ptr_array[n],
+						   aad_ptr_array[n],
+						   aad_len,
+						   tag_ptr_array[n],
+						   tag_len);
+			}
+		} else if (key_size == IMB_KEY_256_BYTES) {
+			for (n = 0; n < num_packets; n++) {
+				IMB_AES256_GCM_DEC(state, key_data, &ctx,
+						   dst_ptr_array[n],
+						   src_ptr_array[n],
+						   len_array[n],
+						   iv_ptr_array[n],
+						   aad_ptr_array[n],
+						   aad_len,
+						   tag_ptr_array[n],
+						   tag_len);
+			}
+		} else /* assume 192-bits key */ {
+			for (n = 0; n < num_packets; n++) {
+				IMB_AES192_GCM_DEC(state, key_data, &ctx,
+						   dst_ptr_array[n],
+						   src_ptr_array[n],
+						   len_array[n],
+						   iv_ptr_array[n],
+						   aad_ptr_array[n],
+						   aad_len,
+						   tag_ptr_array[n],
+						   tag_len);
+			}
+		}
+	}
+}
+
diff --git a/test/gcm_test.c b/test/gcm_test.c
index 13052a75..a5bb4269 100644
--- a/test/gcm_test.c
+++ b/test/gcm_test.c
@@ -1629,6 +1629,75 @@ sgl_aes_gcm_dec(IMB_MGR *p_mgr,
         return 0;
 }
 
+/*****************************************************************************
+ * QUIC API
+ *****************************************************************************/
+static int
+quic_aes_gcm_enc(IMB_MGR *p_mgr,
+		 const struct gcm_key_data *key,
+		 struct gcm_context_data *ctx,
+		 uint8_t *out, const uint8_t *in, uint64_t len,
+		 const uint8_t *iv, const uint64_t iv_len,
+		 const uint8_t *aad, uint64_t aad_len,
+		 uint8_t *auth_tag, uint64_t auth_tag_len,
+		 IMB_KEY_SIZE_BYTES key_len)
+{
+	if (iv_len != 12)
+		return aes_gcm_enc(p_mgr, key, ctx,
+				   out, in, len,
+				   iv, iv_len,
+				   aad, aad_len,
+				   auth_tag, auth_tag_len, key_len);
+
+	imb_quic_aes_gcm(p_mgr, key, key_len, IMB_DIR_ENCRYPT,
+			 (void **) &out, (const void * const*) &in, &len,
+			 (const void * const*) &iv,
+                         (const void * const*) &aad, aad_len,
+			 (void **) &auth_tag, auth_tag_len, 1);
+
+        const int err = imb_get_errno(p_mgr);
+
+        if (err != 0) {
+                printf("QUIC GCM encrypt error %d, %s\n",
+                       err, imb_get_strerror(err));
+                return 1;
+        }
+        return 0;
+}
+
+static int
+quic_aes_gcm_dec(IMB_MGR *p_mgr,
+		 const struct gcm_key_data *key,
+		 struct gcm_context_data *ctx,
+		 uint8_t *out, const uint8_t *in, uint64_t len,
+		 const uint8_t *iv, const uint64_t iv_len,
+		 const uint8_t *aad, uint64_t aad_len,
+		 uint8_t *auth_tag, uint64_t auth_tag_len,
+		 IMB_KEY_SIZE_BYTES key_len)
+{
+	if (iv_len != 12)
+		return aes_gcm_dec(p_mgr, key, ctx,
+				   out, in, len,
+				   iv, iv_len,
+				   aad, aad_len,
+				   auth_tag, auth_tag_len, key_len);
+
+	imb_quic_aes_gcm(p_mgr, key, key_len, IMB_DIR_DECRYPT,
+			 (void **) &out, (const void * const*) &in, &len,
+			 (const void * const*) &iv,
+                         (const void * const*) &aad, aad_len,
+			 (void **) &auth_tag, auth_tag_len, 1);
+
+        const int err = imb_get_errno(p_mgr);
+
+        if (err != 0) {
+                printf("QUIC GCM decrypt error %d, %s\n",
+                       err, imb_get_strerror(err));
+                return 1;
+        }
+        return 0;
+}
+
 /*****************************************************************************
  * burst API
  *****************************************************************************/
@@ -1725,6 +1794,51 @@ burst_aes_gcm_enc(IMB_MGR *p_mgr,
                              num_jobs);
 }
 
+static int
+burst_quic_gcm_enc(IMB_MGR *p_mgr,
+                   const struct gcm_key_data *key,
+                   struct gcm_context_data **ctx, uint8_t **out,
+                   const uint8_t *in, const uint64_t len,
+                   const uint8_t *iv, const uint64_t iv_len,
+                   const uint8_t *aad, const uint64_t aad_len,
+                   uint8_t **auth_tag, const uint64_t auth_tag_len,
+                   const IMB_KEY_SIZE_BYTES key_len, const uint32_t num_jobs)
+{
+	if (iv_len != 12) {
+		return burst_aes_gcm_enc(p_mgr, key, ctx, out, in, len,
+                                         iv, iv_len, aad, aad_len,
+                                         auth_tag, auth_tag_len,
+                                         key_len, num_jobs);
+        }
+
+        const void *in_array[GCM_MAX_JOBS];
+        uint64_t len_array[GCM_MAX_JOBS];
+        const void *iv_array[GCM_MAX_JOBS];
+        const void *aad_array[GCM_MAX_JOBS];
+        uint32_t i;
+
+        for (i = 0; i < num_jobs; i++) {
+                in_array[i] = (const void *) in;
+                len_array[i] = len;
+                iv_array[i] = (const void *) iv;
+                aad_array[i] = (const void *) aad;
+        }
+
+	imb_quic_aes_gcm(p_mgr, key, key_len, IMB_DIR_ENCRYPT,
+			 (void **) out, in_array, len_array,
+                         iv_array, aad_array, aad_len,
+			 (void **) auth_tag, auth_tag_len, num_jobs);
+
+        const int err = imb_get_errno(p_mgr);
+
+        if (err != 0) {
+                printf("QUIC GCM burst-encrypt error %d, %s\n",
+                       err, imb_get_strerror(err));
+                return 1;
+        }
+        return 0;
+}
+
 static int
 burst_aes_gcm_dec(IMB_MGR *p_mgr,
                   const struct gcm_key_data *key,
@@ -1741,6 +1855,51 @@ burst_aes_gcm_dec(IMB_MGR *p_mgr,
                              num_jobs);
 }
 
+static int
+burst_quic_gcm_dec(IMB_MGR *p_mgr,
+                   const struct gcm_key_data *key,
+                   struct gcm_context_data **ctx, uint8_t **out,
+                   const uint8_t *in, const uint64_t len,
+                   const uint8_t *iv, const uint64_t iv_len,
+                   const uint8_t *aad, const uint64_t aad_len,
+                   uint8_t **auth_tag, const uint64_t auth_tag_len,
+                   const IMB_KEY_SIZE_BYTES key_len, const uint32_t num_jobs)
+{
+	if (iv_len != 12) {
+		return burst_aes_gcm_dec(p_mgr, key, ctx, out, in, len,
+                                         iv, iv_len, aad, aad_len,
+                                         auth_tag, auth_tag_len,
+                                         key_len, num_jobs);
+        }
+
+        const void *in_array[GCM_MAX_JOBS];
+        uint64_t len_array[GCM_MAX_JOBS];
+        const void *iv_array[GCM_MAX_JOBS];
+        const void *aad_array[GCM_MAX_JOBS];
+        uint32_t i;
+
+        for (i = 0; i < num_jobs; i++) {
+                in_array[i] = (const void *) in;
+                len_array[i] = len;
+                iv_array[i] = (const void *) iv;
+                aad_array[i] = (const void *) aad;
+        }
+
+	imb_quic_aes_gcm(p_mgr, key, key_len, IMB_DIR_DECRYPT,
+			 (void **) out, in_array, len_array,
+                         iv_array, aad_array, aad_len,
+			 (void **) auth_tag, auth_tag_len, num_jobs);
+
+        const int err = imb_get_errno(p_mgr);
+
+        if (err != 0) {
+                printf("QUIC GCM burst-decrypt error %d, %s\n",
+                       err, imb_get_strerror(err));
+                return 1;
+        }
+        return 0;
+}
+
 static int
 burst_sgl_aes_gcm(IMB_MGR *p_mgr,
                   IMB_CIPHER_DIRECTION cipher_dir,
@@ -2145,6 +2304,7 @@ test_gcm_vectors(struct gcm_ctr_vector const *vector,
 		free(T2_test);
 }
 
+
 static void
 test_gcm_vectors_burst(struct gcm_ctr_vector const *vector,
                        gcm_enc_dec_many_fn_t encfn,
@@ -2358,6 +2518,14 @@ test_gcm_std_vectors(struct test_suite_context *ts128,
                                                        burst_aes_gcm_enc,
                                                        burst_aes_gcm_dec,
                                                        ts128);
+                                test_gcm_vectors(&vectors[vect],
+						 quic_aes_gcm_enc,
+						 quic_aes_gcm_dec,
+						 ts128);
+                                test_gcm_vectors_burst(&vectors[vect],
+                                                       burst_quic_gcm_enc,
+                                                       burst_quic_gcm_dec,
+                                                       ts128);
                         }
                         break;
                 case IMB_KEY_192_BYTES:
@@ -2387,6 +2555,14 @@ test_gcm_std_vectors(struct test_suite_context *ts128,
                                                        burst_aes_gcm_enc,
                                                        burst_aes_gcm_dec,
                                                        ts192);
+                                test_gcm_vectors(&vectors[vect],
+						 quic_aes_gcm_enc,
+						 quic_aes_gcm_dec,
+						 ts192);
+                                test_gcm_vectors_burst(&vectors[vect],
+                                                       burst_quic_gcm_enc,
+                                                       burst_quic_gcm_dec,
+                                                       ts192);
                         }
                         break;
                 case IMB_KEY_256_BYTES:
@@ -2417,7 +2593,14 @@ test_gcm_std_vectors(struct test_suite_context *ts128,
                                                  burst_aes_gcm_enc,
                                                  burst_aes_gcm_dec,
                                                  ts256);
-
+                                test_gcm_vectors(&vectors[vect],
+						 quic_aes_gcm_enc,
+						 quic_aes_gcm_dec,
+						 ts256);
+                                test_gcm_vectors_burst(&vectors[vect],
+                                                       burst_quic_gcm_enc,
+                                                       burst_quic_gcm_dec,
+                                                       ts256);
                         }
                         break;
                 default:
-- 
GitLab


From b52bf2b577ab38e4f9a5f496c0d8d76ef8645220 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 13 Jan 2023 19:15:54 +0000
Subject: [PATCH 082/332] lib: [quic] added AES-ECB header protection API for
 QUIC use case

---
 lib/Makefile                 |   3 +-
 lib/intel-ipsec-mb.h         |  22 +++++++
 lib/libIPSec_MB.def          |   1 +
 lib/win_x64.mak              |   3 +-
 lib/x86_64/quic_hp_aes_ecb.c | 117 +++++++++++++++++++++++++++++++++++
 5 files changed, 144 insertions(+), 2 deletions(-)
 create mode 100644 lib/x86_64/quic_hp_aes_ecb.c

diff --git a/lib/Makefile b/lib/Makefile
index d125edc4..e9f9c36b 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -312,7 +312,8 @@ c_lib_objs := \
 	error.o \
 	ooo_mgr_reset.o \
 	self_test.o \
-	quic_aes_gcm.o
+	quic_aes_gcm.o \
+	quic_hp_aes_ecb.o
 
 ifeq ($(AESNI_EMU), y)
 c_lib_objs := $(c_lib_objs) \
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index c330c6f0..39fa9cf5 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -4118,6 +4118,28 @@ imb_quic_aes_gcm(IMB_MGR *state,
                  const uint64_t tag_len,
                  const uint64_t num_packets);
 
+/**
+ * @brief Batch of AES-ECB encrypt/decrypt operations with the same key
+ *
+ * Sample size is fixed to 16 bytes (read from source pointers).
+ * Mask output size is fixed to 5 bytes (written to destination pointer).
+ * Cipher direction is fixed to ENCRYPT.
+ *
+ * @param [in]  state         pointer to IMB_MGR
+ * @param [in]  exp_key_data  expanded AES encrypt keys
+ * @param [out] dst_ptr_array array with destination pointers
+ * @param [in]  src_ptr_array array with source sample pointers
+ * @param [in]  num_packets   number of packets in this batch
+ * @param [in]  key_size      key size (in bytes, see IMB_KEY_128_BYTES etc.)
+ */
+IMB_DLL_EXPORT void
+imb_quic_hp_aes_ecb(IMB_MGR *state,
+                    const void *exp_key_data,
+                    void *dst_ptr_array[],
+                    const void * const src_ptr_array[],
+                    const uint64_t num_packets,
+                    const IMB_KEY_SIZE_BYTES key_size);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index f2594cf7..2c9e6d65 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -699,3 +699,4 @@ EXPORTS
     aes_cfb_256_one_avx512			@673
     aes_cfb_256_one_sse_no_aesni		@674
     imb_quic_aes_gcm				@675
+    imb_quic_hp_aes_ecb				@676
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index efc0dcb7..8688974a 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -352,7 +352,8 @@ lib_objs1 = \
 	$(OBJ_DIR)\memcpy_avx.obj \
 	$(OBJ_DIR)\ooo_mgr_reset.obj \
 	$(OBJ_DIR)\self_test.obj \
-	$(OBJ_DIR)\quic_aes_gcm.obj
+	$(OBJ_DIR)\quic_aes_gcm.obj \
+	$(OBJ_DIR)\quic_hp_aes_ecb.obj
 
 lib_objs2 = \
 	$(OBJ_DIR)\mb_mgr_aes192_cbc_enc_flush_avx.obj \
diff --git a/lib/x86_64/quic_hp_aes_ecb.c b/lib/x86_64/quic_hp_aes_ecb.c
new file mode 100644
index 00000000..eae8e7ac
--- /dev/null
+++ b/lib/x86_64/quic_hp_aes_ecb.c
@@ -0,0 +1,117 @@
+/*******************************************************************************
+  Copyright (c) 2023, Intel Corporation
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions are met:
+
+      * Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+      * Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+      * Neither the name of Intel Corporation nor the names of its contributors
+        may be used to endorse or promote products derived from this software
+        without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include "intel-ipsec-mb.h"
+#include "include/error.h"
+#include <string.h> /* memcpy() */
+
+IMB_DLL_EXPORT void
+imb_quic_hp_aes_ecb(IMB_MGR *state,
+                    const void *exp_key_data,
+                    void *dst_ptr_array[],
+                    const void * const src_ptr_array[],
+                    const uint64_t num_packets,
+                    const IMB_KEY_SIZE_BYTES key_size)
+{
+#ifdef SAFE_PARAM
+        uint64_t i;
+
+        if (exp_key_data == NULL) {
+                imb_set_errno(state, IMB_ERR_NULL_EXP_KEY);
+                return;
+        }
+        if (dst_ptr_array == NULL) {
+                imb_set_errno(state, IMB_ERR_NULL_DST);
+                return;
+        }
+        if (src_ptr_array == NULL) {
+                imb_set_errno(state, IMB_ERR_NULL_SRC);
+                return;
+        }
+        for (i = 0; i < num_packets; i++) {
+                if (dst_ptr_array[i] == NULL) {
+                        imb_set_errno(state, IMB_ERR_NULL_DST);
+                        return;
+                }
+                if (src_ptr_array[i] == NULL) {
+                        imb_set_errno(state, IMB_ERR_NULL_SRC);
+                        return;
+                }
+        }
+
+        switch (key_size) {
+        case IMB_KEY_128_BYTES:
+        case IMB_KEY_192_BYTES:
+        case IMB_KEY_256_BYTES:
+                break;
+        default:
+                imb_set_errno(state, IMB_ERR_KEY_LEN);
+                return;
+                break;
+        }
+#endif /* SAFE_PARAM */
+
+        imb_set_errno(state, 0);
+
+        /*
+         * Very clunky but rather functional version.
+         *
+         * @todo optimisation plan:
+         * - create optimized AES-ECB API for this case in assembly
+         * - puzzle: how to keep this API internal, ARCH specific and without adding to MB_MGR?
+         */
+        for (i = 0; i < num_packets; i++) {
+                const uint64_t sample_len = 16;
+                const size_t mask_len = 5;
+                struct IMB_JOB *job = IMB_GET_NEXT_JOB(state);
+                uint8_t db[16];
+
+                job->cipher_direction = IMB_DIR_ENCRYPT; /* fixed */
+                job->chain_order = IMB_ORDER_CIPHER_HASH;
+                job->dst = db;
+                job->src = src_ptr_array[i],
+                job->cipher_mode = IMB_CIPHER_ECB;
+                job->enc_keys = exp_key_data;
+                job->key_len_in_bytes = key_size;
+
+                job->iv_len_in_bytes = 0;
+                job->cipher_start_src_offset_in_bytes = 0;
+                job->msg_len_to_cipher_in_bytes = sample_len;
+
+                job->hash_alg = IMB_AUTH_NULL;
+
+                job = IMB_SUBMIT_JOB_NOCHECK(state);
+                while (job == NULL) {
+                        /*
+                         * This is not expected to happen (single-buffer)
+                         * - let's flush anyway
+                         */
+                        job = IMB_FLUSH_JOB(state);
+                }
+                memcpy(dst_ptr_array[i], db, mask_len);
+        }
+}
-- 
GitLab


From 5245019ff017c3cf62cd543b2204c51f605c6609 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 13 Jan 2023 20:21:11 +0000
Subject: [PATCH 083/332] test: [quic] test module for QUIC HP AES-ECB API
 added

---
 test/CMakeLists.txt  |   1 +
 test/Makefile        |   2 +-
 test/main.c          |   6 +
 test/quic_ecb_test.c | 310 +++++++++++++++++++++++++++++++++++++++++++
 test/win_x64.mak     |   2 +-
 5 files changed, 319 insertions(+), 2 deletions(-)
 create mode 100644 test/quic_ecb_test.c

diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index addb71a0..4338df1b 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -74,6 +74,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/null_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/snow_v_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/quic_ecb_test.c
 )
 
 ########################################
diff --git a/test/Makefile b/test/Makefile
index ec3dc955..3ea6a7e8 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -119,7 +119,7 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	hmac_md5_test.c aes_test.c sha_test.c chained_test.c api_test.c pon_test.c \
 	ecb_test.c zuc_test.c kasumi_test.c snow3g_test.c direct_api_test.c clear_mem_test.c \
 	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
-	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c
+	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c
 OBJECTS := $(SOURCES:%.c=%.o)
 
 ifneq ($(PIN_CEC_ROOT),)
diff --git a/test/main.c b/test/main.c
index 87ed790d..14bd65de 100644
--- a/test/main.c
+++ b/test/main.c
@@ -62,6 +62,7 @@ extern int chacha20_poly1305_test(struct IMB_MGR *mb_mgr);
 extern int null_test(struct IMB_MGR *mb_mgr);
 extern int snow_v_test(struct IMB_MGR *mb_mgr);
 extern int direct_api_param_test(struct IMB_MGR *mb_mgr);
+extern int quic_ecb_test(struct IMB_MGR *mb_mgr);
 
 typedef int (*imb_test_t)(struct IMB_MGR *mb_mgr);
 
@@ -239,6 +240,11 @@ struct imb_test tests[] = {
                 .str = "DIRECT_API_PARAM",
                 .fn = direct_api_param_test,
                 .enabled = 1
+        },
+        {
+                .str = "QUIC",
+                .fn = quic_ecb_test,
+                .enabled = 1
         }
 };
 
diff --git a/test/quic_ecb_test.c b/test/quic_ecb_test.c
new file mode 100644
index 00000000..3b7e29ee
--- /dev/null
+++ b/test/quic_ecb_test.c
@@ -0,0 +1,310 @@
+/*****************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************/
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+#include <assert.h>
+
+#include <intel-ipsec-mb.h>
+
+#include "utils.h"
+
+int quic_ecb_test(struct IMB_MGR *mb_mgr);
+
+struct quic_ecb_vector {
+	const uint8_t *K;          /* key */
+	const uint8_t *P;          /* plain text (16 bytes) */
+        const uint8_t *C;          /* cipher text - same length as plain text */
+        uint32_t       Klen;       /* key length */
+};
+
+/* 128-bit */
+static const uint8_t ecb_128_K1[] = {
+        0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6,
+        0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c
+};
+static const uint8_t ecb_128_P1[] = {
+        0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
+        0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a
+};
+static const uint8_t ecb_128_C1[] = {
+        0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
+        0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
+};
+
+/* 192-bit */
+static const uint8_t ecb_192_K20[] = {
+        0x8e, 0x73, 0xb0, 0xf7, 0xda, 0x0e, 0x64, 0x52,
+        0xc8, 0x10, 0xf3, 0x2b, 0x80, 0x90, 0x79, 0xe5,
+        0x62, 0xf8, 0xea, 0xd2, 0x52, 0x2c, 0x6b, 0x7b
+};
+static const uint8_t ecb_192_P20[] = {
+        0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
+        0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
+};
+static const uint8_t ecb_192_P21[] = {
+        0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
+        0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
+};
+static const uint8_t ecb_192_P22[] = {
+        0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
+        0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef,
+};
+static const uint8_t ecb_192_P23[] = {
+        0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
+        0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10
+};
+static const uint8_t ecb_192_C20[] = {
+        0xbd, 0x33, 0x4f, 0x1d, 0x6e, 0x45, 0xf2, 0x5f,
+        0xf7, 0x12, 0xa2, 0x14, 0x57, 0x1f, 0xa5, 0xcc,
+};
+static const uint8_t ecb_192_C21[] = {
+        0x97, 0x41, 0x04, 0x84, 0x6d, 0x0a, 0xd3, 0xad,
+        0x77, 0x34, 0xec, 0xb3, 0xec, 0xee, 0x4e, 0xef,
+};
+static const uint8_t ecb_192_C22[] = {
+        0xef, 0x7a, 0xfd, 0x22, 0x70, 0xe2, 0xe6, 0x0a,
+        0xdc, 0xe0, 0xba, 0x2f, 0xac, 0xe6, 0x44, 0x4e,
+};
+static const uint8_t ecb_192_C23[] = {
+        0x9a, 0x4b, 0x41, 0xba, 0x73, 0x8d, 0x6c, 0x72,
+        0xfb, 0x16, 0x69, 0x16, 0x03, 0xc1, 0x8e, 0x0e
+};
+
+/* 256-bit */
+static const uint8_t ecb_256_K30[] = {
+        0x60, 0x3d, 0xeb, 0x10, 0x15, 0xca, 0x71, 0xbe,
+        0x2b, 0x73, 0xae, 0xf0, 0x85, 0x7d, 0x77, 0x81,
+        0x1f, 0x35, 0x2c, 0x07, 0x3b, 0x61, 0x08, 0xd7,
+        0x2d, 0x98, 0x10, 0xa3, 0x09, 0x14, 0xdf, 0xf4
+};
+static const uint8_t ecb_256_P30[] = {
+        0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
+        0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
+};
+static const uint8_t ecb_256_P31[] = {
+        0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
+        0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
+};
+static const uint8_t ecb_256_P32[] = {
+        0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
+        0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef,
+};
+static const uint8_t ecb_256_P33[] = {
+        0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
+        0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10
+};
+static const uint8_t ecb_256_C30[] = {
+        0xf3, 0xee, 0xd1, 0xbd, 0xb5, 0xd2, 0xa0, 0x3c,
+        0x06, 0x4b, 0x5a, 0x7e, 0x3d, 0xb1, 0x81, 0xf8,
+};
+static const uint8_t ecb_256_C31[] = {
+        0x59, 0x1c, 0xcb, 0x10, 0xd4, 0x10, 0xed, 0x26,
+        0xdc, 0x5b, 0xa7, 0x4a, 0x31, 0x36, 0x28, 0x70,
+};
+static const uint8_t ecb_256_C32[] = {
+        0xb6, 0xed, 0x21, 0xb9, 0x9c, 0xa6, 0xf4, 0xf9,
+        0xf1, 0x53, 0xe7, 0xb1, 0xbe, 0xaf, 0xed, 0x1d,
+};
+static const uint8_t ecb_256_C33[] = {
+        0x23, 0x30, 0x4b, 0x7a, 0x39, 0xf9, 0xf3, 0xff,
+        0x06, 0x7d, 0x8d, 0x8f, 0x9e, 0x24, 0xec, 0xc7
+};
+
+static const struct quic_ecb_vector quic_ecb_vectors[] = {
+        {ecb_128_K1,  ecb_128_P1, ecb_128_C1, sizeof(ecb_128_K1)},
+        {ecb_192_K20, ecb_192_P20, ecb_192_C20, sizeof(ecb_192_K20)},
+        {ecb_192_K20, ecb_192_P21, ecb_192_C21, sizeof(ecb_192_K20)},
+        {ecb_192_K20, ecb_192_P22, ecb_192_C22, sizeof(ecb_192_K20)},
+        {ecb_192_K20, ecb_192_P23, ecb_192_C23, sizeof(ecb_192_K20)},
+        {ecb_256_K30, ecb_256_P30, ecb_256_C30, sizeof(ecb_256_K30)},
+        {ecb_256_K30, ecb_256_P31, ecb_256_C31, sizeof(ecb_256_K30)},
+        {ecb_256_K30, ecb_256_P32, ecb_256_C32, sizeof(ecb_256_K30)},
+        {ecb_256_K30, ecb_256_P33, ecb_256_C33, sizeof(ecb_256_K30)},
+};
+
+static int
+test_quic_ecb_many(struct IMB_MGR *mb_mgr,
+                   void *enc_keys,
+                   const uint8_t *in_text,
+                   const uint8_t *out_text,
+                   const int in_place,
+                   const int key_len,
+                   const int num_jobs)
+{
+        const unsigned text_len = 16;
+        const unsigned out_len = 5;
+        uint8_t **src_bufs = malloc(num_jobs * sizeof(void *));
+        uint8_t **dst_bufs = malloc(num_jobs * sizeof(void *));
+        int i, ret = -1;
+
+        for (i = 0; i < num_jobs; i++) {
+                src_bufs[i] = malloc(text_len);
+                memcpy(src_bufs[i], in_text, text_len);
+
+                dst_bufs[i] = malloc(out_len);
+                memset(dst_bufs[i], -1, out_len);
+        }
+
+        if (in_place) {
+                imb_quic_hp_aes_ecb(mb_mgr, enc_keys,
+                                    (void **) src_bufs,
+                                    (const void * const*) src_bufs,
+                                    num_jobs, key_len);
+        } else {
+                imb_quic_hp_aes_ecb(mb_mgr, enc_keys,
+                                    (void **) dst_bufs,
+                                    (const void * const*) src_bufs,
+                                    num_jobs, key_len);
+        }
+
+        const int err = imb_get_errno(mb_mgr);
+
+        if (err != 0) {
+                printf("QUIC AES-ECB error status:%d, %s\n", err,
+                       imb_get_strerror(err));
+                goto end;
+        }
+
+        for (i = 0; i < num_jobs; i++) {
+                const uint8_t *d = (in_place) ? src_bufs[i] : dst_bufs[i];
+
+                if (memcmp(d, out_text, out_len) != 0) {
+                        printf("QUIC AES-ECB %d vector mismatched\n", i);
+                        hexdump(stderr, "Expected",
+                                out_text, out_len);
+                        hexdump(stderr, "Received",
+                                d, out_len);
+                        goto end;
+                }
+        }
+
+        ret = 0;
+
+ end:
+        for (i = 0; i < num_jobs; i++) {
+                free(src_bufs[i]);
+                free(dst_bufs[i]);
+        }
+        free(src_bufs);
+        free(dst_bufs);
+        return ret;
+}
+
+static void
+test_quic_ecb_vectors(struct IMB_MGR *mb_mgr, const int vec_cnt,
+                      const struct quic_ecb_vector *vec_tab, const char *banner,
+                      const int num_jobs,
+                      struct test_suite_context *ts128,
+                      struct test_suite_context *ts192,
+                      struct test_suite_context *ts256)
+{
+	int vect;
+        DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
+        DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
+
+	printf("%s (N jobs = %d):\n", banner, num_jobs);
+	for (vect = 0; vect < vec_cnt; vect++) {
+                struct test_suite_context *ctx = NULL;
+
+#ifdef DEBUG
+		printf("[%d/%d] Standard vector key_len:%d\n",
+                       vect + 1, vec_cnt,
+                       (int) vec_tab[vect].Klen);
+#else
+		printf(".");
+#endif
+
+                switch (vec_tab[vect].Klen) {
+                case 16:
+                        IMB_AES_KEYEXP_128(mb_mgr, vec_tab[vect].K, enc_keys,
+                                           dec_keys);
+                        ctx = ts128;
+                        break;
+                case 24:
+                        IMB_AES_KEYEXP_192(mb_mgr, vec_tab[vect].K, enc_keys,
+                                           dec_keys);
+                        ctx = ts192;
+                        break;
+                case 32:
+                default:
+                        IMB_AES_KEYEXP_256(mb_mgr, vec_tab[vect].K, enc_keys,
+                                           dec_keys);
+                        ctx = ts256;
+                        break;
+                }
+
+                if (test_quic_ecb_many(mb_mgr, enc_keys,
+                                       vec_tab[vect].P, vec_tab[vect].C, 0,
+                                       vec_tab[vect].Klen, num_jobs)) {
+                        printf("error #%d encrypt\n", vect + 1);
+                        test_suite_update(ctx, 0, 1);
+                } else {
+                        test_suite_update(ctx, 1, 0);
+                }
+
+                if (test_quic_ecb_many(mb_mgr, enc_keys,
+                                       vec_tab[vect].P, vec_tab[vect].C, 1,
+                                       vec_tab[vect].Klen, num_jobs)) {
+                        printf("error #%d encrypt in-place\n", vect + 1);
+                        test_suite_update(ctx, 0, 1);
+                } else {
+                        test_suite_update(ctx, 1, 0);
+                }
+	}
+	printf("\n");
+}
+
+int
+quic_ecb_test(struct IMB_MGR *mb_mgr)
+{
+        struct test_suite_context ts128, ts192, ts256;
+        const int num_jobs_tab[] = {
+                1, 3, 4, 5, 7, 8, 9, 15, 16, 17
+        };
+        unsigned i;
+        int errors = 0;
+
+        test_suite_start(&ts128, "QUIC HP AES-ECB-128");
+        test_suite_start(&ts192, "QUIC HP AES-ECB-192");
+        test_suite_start(&ts256, "QUIC HP AES-ECB-256");
+
+        for (i = 0; i < DIM(num_jobs_tab); i++)
+                test_quic_ecb_vectors(mb_mgr, DIM(quic_ecb_vectors),
+                                      quic_ecb_vectors,
+                                      "QUIC HP AES-ECB test vectors",
+                                      num_jobs_tab[i],
+                                      &ts128, &ts192, &ts256);
+
+        errors = test_suite_end(&ts128);
+        errors += test_suite_end(&ts192);
+        errors += test_suite_end(&ts256);
+
+	return errors;
+}
diff --git a/test/win_x64.mak b/test/win_x64.mak
index 67959bbb..4954422a 100644
--- a/test/win_x64.mak
+++ b/test/win_x64.mak
@@ -76,7 +76,7 @@ DEPTOOL = ..\mkdep.bat
 !endif
 DEPFLAGS = $(INCDIR)
 
-TEST_OBJS = main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj utils.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj
+TEST_OBJS = main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj utils.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj
 
 XVALID_OBJS = ipsec_xvalid.obj misc.obj utils.obj
 
-- 
GitLab


From 9442c7b65af55078f16b59bb6911b82203cb7cae Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Fri, 10 Feb 2023 11:35:50 +0000
Subject: [PATCH 084/332] avx512: [quic] add multi-buffer AES-ECB for 16-byte
 buffers

---
 lib/Makefile                               |   1 +
 lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm | 298 +++++++++++++++++++++
 lib/include/arch_avx512_type2.h            |   7 +
 lib/win_x64.mak                            |   1 +
 4 files changed, 307 insertions(+)
 create mode 100644 lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm

diff --git a/lib/Makefile b/lib/Makefile
index e9f9c36b..736ccd2d 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -629,6 +629,7 @@ asm_avx512_lib_objs := \
 	sha512_x8_avx512.o \
 	des_x16_avx512.o \
 	aes_ecb_vaes_avx512.o \
+	aes_ecb_quic_vaes_avx512.o \
 	aes_cntr_api_by16_vaes_avx512.o \
 	aes_cntr_bit_api_by16_vaes_avx512.o \
 	aes_cntr_ccm_api_by16_vaes_avx512.o \
diff --git a/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm b/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm
new file mode 100644
index 00000000..a50b46bd
--- /dev/null
+++ b/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm
@@ -0,0 +1,298 @@
+;;
+;; Copyright (c) 2023, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+
+; routine to do AES ECB encrypt for QUIC on 16-byte buffers
+
+; YMM registers are clobbered. Saving/restoring must be done at a higher level
+
+; void aes_ecb_quic_enc_x_vaes_avx512(void *in,
+;                                     UINT128  keys[],
+;                                     void    *out,
+;                                     UINT64   num_buffers);
+;
+; x = key size (128/192/256)
+; arg 1: IN: array of pointers to input buffers
+; arg 2: KEYS: pointer to keys (common for all buffers)
+; arg 3: OUT: array of pointers to output buffers)
+; arg 4: N_BUFS: number of 16-byte buffers
+;
+
+%include "include/os.inc"
+%include "include/clear_regs.inc"
+%include "include/aes_common.inc"
+
+%define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_vaes_avx512
+%define AES_ECB_QUIC_ENC_192 aes_ecb_quic_enc_192_vaes_avx512
+%define AES_ECB_QUIC_ENC_256 aes_ecb_quic_enc_256_vaes_avx512
+
+%ifdef LINUX
+%define IN      rdi
+%define KEYS    rsi
+%define OUT     rdx
+%define N_BUFS  rcx
+%else
+%define IN      rcx
+%define KEYS    rdx
+%define OUT     r8
+%define N_BUFS  r9
+%endif
+%define IDX     rax
+%define TMP     r11
+
+%define YKEY1       ymm1
+%define YDATA0      ymm2
+%define YDATA1      ymm3
+%define YDATA2      ymm4
+%define YDATA3      ymm5
+%define YDATA4      ymm6
+%define YDATA5      ymm7
+%define YDATA6      ymm8
+%define YDATA7      ymm9
+
+mksection .text
+
+;; =============================================================================
+;; Loads specified single 16-byte block from different buffers into YMM registers
+%macro YMM_LOAD_BLOCKS_MULT_IN_0_16 11
+%define %%NUM_BUFFERS   %1 ; [in] numerical value, number of AES blocks (0 to 16)
+%define %%ARRAY_INP     %2 ; [in] array of input data pointers
+%define %%INP           %3 ; [clobbered] input data pointer to read 16 bytes from
+%define %%DST0          %4 ; [out] YMM register with loaded data
+%define %%DST1          %5 ; [out] YMM register with loaded data
+%define %%DST2          %6 ; [out] YMM register with loaded data
+%define %%DST3          %7 ; [out] YMM register with loaded data
+%define %%DST4          %8 ; [out] YMM register with loaded data
+%define %%DST5          %9 ; [out] YMM register with loaded data
+%define %%DST6          %10 ; [out] YMM register with loaded data
+%define %%DST7          %11 ; [out] YMM register with loaded data
+
+%assign dst_idx     0
+%assign buf_idx     0
+
+%rep (%%NUM_BUFFERS / 2)
+%xdefine %%DSTREG %%DST %+ dst_idx
+        mov             %%INP, [%%ARRAY_INP + buf_idx]
+        vmovdqu8        XWORD(%%DSTREG), [%%INP]
+        mov             %%INP, [%%ARRAY_INP + buf_idx + 8]
+        vinserti64x2    %%DSTREG, [%%INP], 1
+%undef %%DSTREG
+%assign dst_idx     (dst_idx + 1)
+%assign buf_idx     (buf_idx + 16)
+%endrep
+
+%assign blocks_left (%%NUM_BUFFERS % 2)
+%xdefine %%DSTREG %%DST %+ dst_idx
+
+%if blocks_left == 1
+        mov             %%INP, [%%ARRAY_INP + buf_idx]
+        vmovdqu8        XWORD(%%DSTREG), [%%INP]
+%endif
+
+%endmacro
+
+;; =============================================================================
+;; Stores up to 16 bytes from YMM registers to different output buffers
+%macro YMM_STORE_MASKED_BLOCKS_MULT_OUT_0_16 13
+%define %%NUM_BLOCKS    %1 ; [in] numerical value, number of AES blocks (0 to 16)
+%define %%ARRAY_OUTP    %2 ; [in] array of output data pointers to write to
+%define %%OUTP          %3 ; [clobbered] output data pointer to write to
+%define %%SRC0          %4 ; [in] YMM register with data to store
+%define %%SRC1          %5 ; [in] YMM register with data to store
+%define %%SRC2          %6 ; [in] YMM register with data to store
+%define %%SRC3          %7 ; [in] YMM register with data to store
+%define %%SRC4          %8 ; [in] YMM register with data to store
+%define %%SRC5          %9 ; [in] YMM register with data to store
+%define %%SRC6          %10 ; [in] YMM register with data to store
+%define %%SRC7          %11 ; [in] YMM register with data to store
+%define %%XTMP          %12 ; [clobbered] XMM register
+%define %%KMASK         %13 ; [in] K mask register
+
+%assign src_idx     0
+%assign buf_idx     0
+
+%rep (%%NUM_BLOCKS / 2)
+%xdefine %%SRCREG %%SRC %+ src_idx
+        mov             %%OUTP, [%%ARRAY_OUTP + buf_idx]
+        vmovdqu8        [%%OUTP]{%%KMASK}, XWORD(%%SRCREG)
+        mov             %%OUTP, [%%ARRAY_OUTP + buf_idx + 8]
+        vextracti64x2   %%XTMP, %%SRCREG, 1
+        vmovdqu8        [%%OUTP]{%%KMASK}, %%XTMP
+%undef %%SRCREG
+%assign src_idx     (src_idx + 1)
+%assign buf_idx     (buf_idx + 16)
+%endrep
+
+%assign blocks_left (%%NUM_BLOCKS % 2)
+%xdefine %%SRCREG %%SRC %+ src_idx
+
+%if blocks_left == 1
+        mov             %%OUTP, [%%ARRAY_OUTP + buf_idx]
+        vmovdqu8        [%%OUTP]{%%KMASK}, XWORD(%%SRCREG)
+%endif
+
+%endmacro
+
+;
+; Performs AES-ECB on 16-byte blocks from multiple buffers (IN, number = N_BUFS)
+; and outputs 5 bytes of ciphertext to the same number of buffers (OUT),
+; all sharing the same AES key
+%macro AES_ECB_QUIC 1
+%define %%NROUNDS %1 ; [in] Number of AES rounds, numerical value
+
+        or      N_BUFS, N_BUFS
+        mov     TMP, N_BUFS
+        jz      %%done
+
+        xor     IDX, IDX
+        and     TMP, 0xf
+        jz      %%main_loop
+
+        ; branch to different code block based on remainder
+        cmp     TMP, 8
+        je      %%initial_num_buffers_is_8
+        jb      %%initial_num_buffers_is_7_1
+        cmp     TMP, 12
+        je      %%initial_num_buffers_is_12
+        jb      %%initial_num_buffers_is_11_9
+        ;; 15, 14 or 13
+        cmp     TMP, 14
+        ja      %%initial_num_buffers_is_15
+        je      %%initial_num_buffers_is_14
+        jmp     %%initial_num_buffers_is_13
+%%initial_num_buffers_is_11_9:
+        ;; 11, 10 or 9
+        cmp     TMP, 10
+        ja      %%initial_num_buffers_is_11
+        je      %%initial_num_buffers_is_10
+        jmp     %%initial_num_buffers_is_9
+%%initial_num_buffers_is_7_1:
+        cmp     TMP, 4
+        je      %%initial_num_buffers_is_4
+        jb      %%initial_num_buffers_is_3_1
+        ;; 7, 6 or 5
+        cmp     TMP, 6
+        ja      %%initial_num_buffers_is_7
+        je      %%initial_num_buffers_is_6
+        jmp     %%initial_num_buffers_is_5
+%%initial_num_buffers_is_3_1:
+        ;; 3, 2 or 1
+        cmp     TMP, 2
+        ja      %%initial_num_buffers_is_3
+        je      %%initial_num_buffers_is_2
+        ;; fall through for `jmp %%initial_num_buffers_is_1`
+
+%assign num_buffers 1
+%rep 15
+
+        %%initial_num_buffers_is_ %+ num_buffers :
+%assign %%I 0
+        ; load blocks
+        YMM_LOAD_BLOCKS_MULT_IN_0_16 num_buffers, IN, TMP, YDATA0,\
+                YDATA1, YDATA2, YDATA3, YDATA4, YDATA5,\
+                YDATA6, YDATA7
+
+; Perform AES encryption on blocks
+%rep (%%NROUNDS + 1)          ; 10/12/14
+        vbroadcasti128      YKEY1, [KEYS + %%I*16]
+        YMM_AESENC_ROUND_BLOCKS_0_16 YDATA0, YDATA1, YDATA2, YDATA3, YDATA4,\
+                YDATA5, YDATA6, YDATA7, YKEY1, %%I, no_data,\
+                no_data, no_data, no_data, no_data, no_data,\
+                no_data, no_data, num_buffers, (%%NROUNDS - 1)
+%assign %%I (%%I + 1)
+%endrep
+
+        ; store blocks
+        mov     TMP, 0x1f
+        kmovq   k1, TMP
+        YMM_STORE_MASKED_BLOCKS_MULT_OUT_0_16 num_buffers, OUT, TMP, YDATA0, YDATA1,\
+                YDATA2, YDATA3, YDATA4, YDATA5, YDATA6, YDATA7, XWORD(YKEY1), k1
+
+        add     IDX, num_buffers
+        cmp     IDX, N_BUFS
+        je      %%done
+
+%assign num_buffers (num_buffers + 1)
+        jmp     %%main_loop
+%endrep
+
+align 16
+%%main_loop:
+        ; load next 16 blocks
+        YMM_LOAD_BLOCKS_MULT_IN_0_16 16, {IN + IDX*8}, TMP, YDATA0,\
+                YDATA1, YDATA2, YDATA3, YDATA4, YDATA5,\
+                YDATA6, YDATA7
+
+        ; Perform AES encryption/decryption on 16 blocks
+%assign %%ROUNDNO 0        ; current key number
+%rep (%%NROUNDS + 1)          ; 10/12/14
+        vbroadcasti128      YKEY1, [KEYS + %%ROUNDNO*16]
+        YMM_AESENC_ROUND_BLOCKS_0_16 YDATA0, YDATA1, YDATA2, YDATA3, YDATA4,\
+                YDATA5, YDATA6, YDATA7, YKEY1, %%ROUNDNO, no_data,\
+                no_data, no_data, no_data, no_data, no_data,\
+                no_data, no_data, 16, (%%NROUNDS - 1)
+
+%assign %%ROUNDNO (%%ROUNDNO + 1)
+%endrep
+
+        ; write 16 blocks to output
+        mov     TMP, 0x1f
+        kmovq   k1, TMP
+        YMM_STORE_MASKED_BLOCKS_MULT_OUT_0_16 16, {OUT + IDX*8}, TMP, YDATA0, YDATA1,\
+                YDATA2, YDATA3, YDATA4, YDATA5, YDATA6, YDATA7, XWORD(YKEY1), k1
+
+        add     IDX, 16
+
+        cmp     IDX, N_BUFS
+        jne     %%main_loop
+
+%%done:
+%ifdef SAFE_DATA
+        clear_all_zmms_asm
+%else
+        vzeroupper
+%endif
+%endmacro
+
+align 16
+MKGLOBAL(AES_ECB_QUIC_ENC_128,function,internal)
+AES_ECB_QUIC_ENC_128:
+        AES_ECB_QUIC 10
+        ret
+
+align 16
+MKGLOBAL(AES_ECB_QUIC_ENC_192,function,internal)
+AES_ECB_QUIC_ENC_192:
+        AES_ECB_QUIC 12
+        ret
+
+align 16
+MKGLOBAL(AES_ECB_QUIC_ENC_256,function,internal)
+AES_ECB_QUIC_ENC_256:
+        AES_ECB_QUIC 14
+        ret
+
+mksection stack-noexec
diff --git a/lib/include/arch_avx512_type2.h b/lib/include/arch_avx512_type2.h
index 2ed2cf4b..5e0303a7 100644
--- a/lib/include/arch_avx512_type2.h
+++ b/lib/include/arch_avx512_type2.h
@@ -71,6 +71,13 @@ void aes_ecb_dec_192_vaes_avx512(const void *in, const void *keys,
 void aes_ecb_dec_128_vaes_avx512(const void *in, const void *keys,
                                  void *out, uint64_t len_bytes);
 
+void aes_ecb_quic_enc_128_vaes_avx512(const void *in, const void *keys,
+                                      void *out, uint64_t num_buffers);
+void aes_ecb_quic_enc_192_vaes_avx512(const void *in, const void *keys,
+                                      void *out, uint64_t num_buffers);
+void aes_ecb_quic_enc_256_vaes_avx512(const void *in, const void *keys,
+                                      void *out, uint64_t num_buffers);
+
 /* AES-CBCS */
 void aes_cbcs_1_9_dec_128_vaes_avx512(const void *in, const uint8_t *IV,
                                       const void *keys, void *out,
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 8688974a..86066d15 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -165,6 +165,7 @@ lib_objs1 = \
 	$(OBJ_DIR)\aes192_ecb_vaes_avx2.obj \
 	$(OBJ_DIR)\aes256_ecb_vaes_avx2.obj \
 	$(OBJ_DIR)\aes_ecb_vaes_avx512.obj \
+	$(OBJ_DIR)\aes_ecb_quic_vaes_avx512.obj \
 	$(OBJ_DIR)\pon_by8_sse.obj \
 	$(OBJ_DIR)\aes128_cntr_by8_sse.obj \
 	$(OBJ_DIR)\pon_by8_avx.obj \
-- 
GitLab


From a4c08ea23e67487216f0af5fcef409de1cbb7d5c Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 17 Jan 2023 10:36:33 +0000
Subject: [PATCH 085/332] lib: [quic] use AES-ECB multi-buffer

---
 lib/x86_64/quic_hp_aes_ecb.c | 54 +++++++++++-------------------------
 1 file changed, 16 insertions(+), 38 deletions(-)

diff --git a/lib/x86_64/quic_hp_aes_ecb.c b/lib/x86_64/quic_hp_aes_ecb.c
index eae8e7ac..ee90aaf6 100644
--- a/lib/x86_64/quic_hp_aes_ecb.c
+++ b/lib/x86_64/quic_hp_aes_ecb.c
@@ -28,6 +28,7 @@
 #include "intel-ipsec-mb.h"
 #include "include/error.h"
 #include <string.h> /* memcpy() */
+#include <include/arch_avx512_type2.h>
 
 IMB_DLL_EXPORT void
 imb_quic_hp_aes_ecb(IMB_MGR *state,
@@ -71,47 +72,24 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
         default:
                 imb_set_errno(state, IMB_ERR_KEY_LEN);
                 return;
-                break;
         }
 #endif /* SAFE_PARAM */
 
         imb_set_errno(state, 0);
 
-        /*
-         * Very clunky but rather functional version.
-         *
-         * @todo optimisation plan:
-         * - create optimized AES-ECB API for this case in assembly
-         * - puzzle: how to keep this API internal, ARCH specific and without adding to MB_MGR?
-         */
-        for (i = 0; i < num_packets; i++) {
-                const uint64_t sample_len = 16;
-                const size_t mask_len = 5;
-                struct IMB_JOB *job = IMB_GET_NEXT_JOB(state);
-                uint8_t db[16];
-
-                job->cipher_direction = IMB_DIR_ENCRYPT; /* fixed */
-                job->chain_order = IMB_ORDER_CIPHER_HASH;
-                job->dst = db;
-                job->src = src_ptr_array[i],
-                job->cipher_mode = IMB_CIPHER_ECB;
-                job->enc_keys = exp_key_data;
-                job->key_len_in_bytes = key_size;
-
-                job->iv_len_in_bytes = 0;
-                job->cipher_start_src_offset_in_bytes = 0;
-                job->msg_len_to_cipher_in_bytes = sample_len;
-
-                job->hash_alg = IMB_AUTH_NULL;
-
-                job = IMB_SUBMIT_JOB_NOCHECK(state);
-                while (job == NULL) {
-                        /*
-                         * This is not expected to happen (single-buffer)
-                         * - let's flush anyway
-                         */
-                        job = IMB_FLUSH_JOB(state);
-                }
-                memcpy(dst_ptr_array[i], db, mask_len);
-        }
+        switch (key_size) {
+        case IMB_KEY_128_BYTES:
+                aes_ecb_quic_enc_128_vaes_avx512(src_ptr_array, exp_key_data,
+                                                 dst_ptr_array, num_packets);
+                break;
+        case IMB_KEY_192_BYTES:
+                aes_ecb_quic_enc_192_vaes_avx512(src_ptr_array, exp_key_data,
+                                                 dst_ptr_array, num_packets);
+                break;
+        case IMB_KEY_256_BYTES:
+        default:
+                aes_ecb_quic_enc_256_vaes_avx512(src_ptr_array, exp_key_data,
+                                                 dst_ptr_array, num_packets);
+                break;
+        };
 }
-- 
GitLab


From 921909364e243984f931990a1c9f96da0765e0b7 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Fri, 10 Feb 2023 16:20:29 +0000
Subject: [PATCH 086/332] sse: [quic] add multi-buffer AES-ECB for 16-byte
 buffers

---
 lib/Makefile                              |   1 +
 lib/avx2_t1/mb_mgr_avx2_t1.c              |   5 +
 lib/avx2_t2/mb_mgr_avx2_t2.c              |   4 +
 lib/avx512_t1/mb_mgr_avx512_t1.c          |   5 +
 lib/avx512_t2/mb_mgr_avx512_t2.c          |   4 +
 lib/avx_t1/mb_mgr_avx_t1.c                |   4 +
 lib/avx_t2/mb_mgr_avx_t2.c                |   4 +
 lib/include/arch_noaesni.h                |   7 +
 lib/include/arch_sse_type1.h              |   8 +
 lib/intel-ipsec-mb.h                      |   8 +
 lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm |   4 +
 lib/no-aesni/mb_mgr_sse_no_aesni.c        |   4 +
 lib/sse_t1/aes_ecb_quic_x8_sse.asm        | 255 ++++++++++++++++++++++
 lib/sse_t1/mb_mgr_sse_t1.c                |   4 +
 lib/sse_t2/mb_mgr_sse_t2.c                |   4 +
 lib/sse_t3/mb_mgr_sse_t3.c                |   4 +
 lib/win_x64.mak                           |   1 +
 lib/x86_64/quic_hp_aes_ecb.c              |  14 +-
 18 files changed, 332 insertions(+), 8 deletions(-)
 create mode 100644 lib/sse_t1/aes_ecb_quic_x8_sse.asm

diff --git a/lib/Makefile b/lib/Makefile
index 736ccd2d..f7fa6156 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -418,6 +418,7 @@ asm_sse_lib_objs := \
 	aes128_cntr_by8_sse.o \
 	aes192_cntr_by8_sse.o \
 	aes256_cntr_by8_sse.o \
+	aes_ecb_quic_x8_sse.o \
 	aes128_ecb_by4_sse.o \
 	aes192_ecb_by4_sse.o \
 	aes256_ecb_by4_sse.o \
diff --git a/lib/avx2_t1/mb_mgr_avx2_t1.c b/lib/avx2_t1/mb_mgr_avx2_t1.c
index 2094a883..811dbdc3 100644
--- a/lib/avx2_t1/mb_mgr_avx2_t1.c
+++ b/lib/avx2_t1/mb_mgr_avx2_t1.c
@@ -50,6 +50,7 @@
 #include "include/arch_sse_type1.h" /* poly1305, snow3g */
 #include "include/arch_avx_type1.h"
 #include "include/arch_avx2_type1.h"
+#include "include/arch_avx512_type2.h"
 
 #include "include/ooo_mgr_reset.h"
 
@@ -479,6 +480,10 @@ init_mb_mgr_avx2_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac128_finalize    = imb_aes_gmac_finalize_128_avx_gen4;
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen4;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen4;
+
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index e7d98884..6a461a73 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -480,6 +480,10 @@ init_mb_mgr_avx2_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac128_finalize    = imb_aes_gmac_finalize_128_avx_gen4;
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen4;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen4;
+
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/avx512_t1/mb_mgr_avx512_t1.c b/lib/avx512_t1/mb_mgr_avx512_t1.c
index 17bd12cc..0ebc2978 100644
--- a/lib/avx512_t1/mb_mgr_avx512_t1.c
+++ b/lib/avx512_t1/mb_mgr_avx512_t1.c
@@ -52,6 +52,7 @@
 #include "include/arch_avx2_type1.h" /* MD5 */
 #include "include/arch_avx512_type1.h"
 #include "include/arch_avx512_type2.h"
+#include "include/arch_sse_type1.h"
 
 #include "include/ooo_mgr_reset.h"
 
@@ -586,6 +587,10 @@ init_mb_mgr_avx512_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac128_finalize    = imb_aes_gmac_finalize_128_avx512;
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx512;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx512;
+
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/avx512_t2/mb_mgr_avx512_t2.c b/lib/avx512_t2/mb_mgr_avx512_t2.c
index e4f65b10..ce53f0e9 100644
--- a/lib/avx512_t2/mb_mgr_avx512_t2.c
+++ b/lib/avx512_t2/mb_mgr_avx512_t2.c
@@ -598,6 +598,10 @@ init_mb_mgr_avx512_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac128_finalize = imb_aes_gmac_finalize_128_vaes_avx512;
         state->gmac192_finalize = imb_aes_gmac_finalize_192_vaes_avx512;
         state->gmac256_finalize = imb_aes_gmac_finalize_256_vaes_avx512;
+
+        state->aes_ecb_128_quic = aes_ecb_quic_enc_128_vaes_avx512;
+        state->aes_ecb_192_quic = aes_ecb_quic_enc_192_vaes_avx512;
+        state->aes_ecb_256_quic = aes_ecb_quic_enc_256_vaes_avx512;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/avx_t1/mb_mgr_avx_t1.c b/lib/avx_t1/mb_mgr_avx_t1.c
index 67e45e82..83987ee2 100644
--- a/lib/avx_t1/mb_mgr_avx_t1.c
+++ b/lib/avx_t1/mb_mgr_avx_t1.c
@@ -478,6 +478,10 @@ init_mb_mgr_avx_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac128_finalize    = imb_aes_gmac_finalize_128_avx_gen2;
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen2;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen2;
+
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/avx_t2/mb_mgr_avx_t2.c b/lib/avx_t2/mb_mgr_avx_t2.c
index 9fea5e77..a36bb128 100644
--- a/lib/avx_t2/mb_mgr_avx_t2.c
+++ b/lib/avx_t2/mb_mgr_avx_t2.c
@@ -479,6 +479,10 @@ init_mb_mgr_avx_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac128_finalize    = imb_aes_gmac_finalize_128_avx_gen2;
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen2;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen2;
+
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/include/arch_noaesni.h b/lib/include/arch_noaesni.h
index f1a1100d..8d965096 100644
--- a/lib/include/arch_noaesni.h
+++ b/lib/include/arch_noaesni.h
@@ -83,6 +83,13 @@ void aes_ecb_dec_192_sse_no_aesni(const void *in, const void *keys,
 void aes_ecb_dec_128_sse_no_aesni(const void *in, const void *keys,
                                   void *out, uint64_t len_bytes);
 
+void aes_ecb_quic_enc_128_sse_no_aesni(const void *in, const void *keys,
+                                       void *out, uint64_t num_buffers);
+void aes_ecb_quic_enc_192_sse_no_aesni(const void *in, const void *keys,
+                                       void *out, uint64_t num_buffers);
+void aes_ecb_quic_enc_256_sse_no_aesni(const void *in, const void *keys,
+                                       void *out, uint64_t num_buffers);
+
 /* AES128-ECBENC */
 void aes128_ecbenc_x3_sse_no_aesni(const void *in, void *keys,
                                    void *out1, void *out2, void *out3);
diff --git a/lib/include/arch_sse_type1.h b/lib/include/arch_sse_type1.h
index 9efc4a03..db94b666 100644
--- a/lib/include/arch_sse_type1.h
+++ b/lib/include/arch_sse_type1.h
@@ -82,6 +82,14 @@ void aes_ecb_dec_192_by4_sse(const void *in, const void *keys,
 void aes_ecb_dec_128_by4_sse(const void *in, const void *keys,
                              void *out, uint64_t len_bytes);
 
+void aes_ecb_quic_enc_128_sse(const void *in, const void *keys,
+                              void *out, uint64_t num_buffers);
+void aes_ecb_quic_enc_192_sse(const void *in, const void *keys,
+                              void *out, uint64_t num_buffers);
+void aes_ecb_quic_enc_256_sse(const void *in, const void *keys,
+                              void *out, uint64_t num_buffers);
+
+
 /* AES128-ECBENC */
 void aes128_ecbenc_x3_sse(const void *in, void *keys,
                           void *out1, void *out2, void *out3);
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 39fa9cf5..676bf172 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -995,6 +995,10 @@ typedef uint32_t (*hec_32_t)(const uint8_t *);
 typedef uint64_t (*hec_64_t)(const uint8_t *);
 
 typedef uint32_t (*crc32_fn_t)(const void *, const uint64_t);
+
+typedef void (*aes_ecb_quic_t)(const void *, const void *,
+                               void *out, uint64_t);
+
 /* Multi-buffer manager flags passed to alloc_mb_mgr() */
 
 #define IMB_FLAG_SHANI_OFF (1ULL << 0) /**< disable use of SHANI extension */
@@ -1207,6 +1211,10 @@ typedef struct IMB_MGR {
         submit_hash_burst_t submit_hash_burst_nocheck;
         aes_cfb_t aes256_cfb_one;
 
+        aes_ecb_quic_t aes_ecb_128_quic;
+        aes_ecb_quic_t aes_ecb_192_quic;
+        aes_ecb_quic_t aes_ecb_256_quic;
+
         /* in-order scheduler fields */
         int              earliest_job; /**< byte offset, -1 if none */
         int              next_job;     /**< byte offset */
diff --git a/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm b/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm
index f5072f67..fec72391 100644
--- a/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm
@@ -32,4 +32,8 @@
 %define AES_ECB_DEC_128 aes_ecb_dec_128_sse_no_aesni
 %define AES_ECB_DEC_192 aes_ecb_dec_192_sse_no_aesni
 %define AES_ECB_DEC_256 aes_ecb_dec_256_sse_no_aesni
+%define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_sse_no_aesni
+%define AES_ECB_QUIC_ENC_192 aes_ecb_quic_enc_192_sse_no_aesni
+%define AES_ECB_QUIC_ENC_256 aes_ecb_quic_enc_256_sse_no_aesni
 %include "sse_t1/aes128_ecb_by4_sse.asm"
+%include "sse_t1/aes_ecb_quic_x8_sse.asm"
diff --git a/lib/no-aesni/mb_mgr_sse_no_aesni.c b/lib/no-aesni/mb_mgr_sse_no_aesni.c
index f14a1e54..04c72271 100644
--- a/lib/no-aesni/mb_mgr_sse_no_aesni.c
+++ b/lib/no-aesni/mb_mgr_sse_no_aesni.c
@@ -466,6 +466,10 @@ init_mb_mgr_sse_no_aesni_internal(IMB_MGR *state, const int reset_mgrs)
         state->chacha20_poly1305_enc_update = update_enc_chacha20_poly1305_sse;
         state->chacha20_poly1305_dec_update = update_dec_chacha20_poly1305_sse;
         state->chacha20_poly1305_finalize = finalize_chacha20_poly1305_sse;
+
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse_no_aesni;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse_no_aesni;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse_no_aesni;
 }
 
 void
diff --git a/lib/sse_t1/aes_ecb_quic_x8_sse.asm b/lib/sse_t1/aes_ecb_quic_x8_sse.asm
new file mode 100644
index 00000000..23af814e
--- /dev/null
+++ b/lib/sse_t1/aes_ecb_quic_x8_sse.asm
@@ -0,0 +1,255 @@
+;;
+;; Copyright (c) 2023, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+
+; routine to do AES ECB encrypt for QUIC on 16-byte buffers
+
+; XMM registers are clobbered. Saving/restoring must be done at a higher level
+
+; void aes_ecb_quic_enc_x_sse(void *in,
+;                             UINT128  keys[],
+;                             void    *out,
+;                             UINT64   num_buffers);
+;
+; x = key size (128/192/256)
+; arg 1: IN: array of pointers to input buffers
+; arg 2: KEYS: pointer to keys (common for all buffers)
+; arg 3: OUT: array of pointers to output buffers)
+; arg 4: N_BUFS: number of 16-byte buffers
+;
+
+%include "include/os.inc"
+%include "include/clear_regs.inc"
+%include "include/aes_common.inc"
+
+%ifndef AES_ECB_QUIC_ENC_128
+%define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_sse
+%define AES_ECB_QUIC_ENC_192 aes_ecb_quic_enc_192_sse
+%define AES_ECB_QUIC_ENC_256 aes_ecb_quic_enc_256_sse
+%endif
+
+;; =============================================================================
+;; Loads 1 AES block from up to 8 buffers into XMM registers
+%macro XMM_LOAD_BLOCKS_MULT_IN_0_8 11
+%define %%NUM_BLOCKS    %1      ; [in] numerical value, number of AES blocks (0 to 16)
+%define %%ARRAY_INP     %2      ; [in] array of input data pointers
+%define %%INP           %3      ; [clobbered] input data pointer to read 16 bytes from
+%define %%DST0          %4      ; [out] XMM register with loaded data
+%define %%DST1          %5      ; [out] XMM register with loaded data
+%define %%DST2          %6      ; [out] XMM register with loaded data
+%define %%DST3          %7      ; [out] XMM register with loaded data
+%define %%DST4          %8      ; [out] XMM register with loaded data
+%define %%DST5          %9      ; [out] XMM register with loaded data
+%define %%DST6          %10     ; [out] XMM register with loaded data
+%define %%DST7          %11     ; [out] XMM register with loaded data
+
+%assign dst_idx     0
+
+%rep (%%NUM_BLOCKS)
+%xdefine %%DSTREG %%DST %+ dst_idx
+        mov             %%INP, [%%ARRAY_INP + dst_idx*8]
+        movdqu          %%DSTREG, [%%INP]
+%undef %%DSTREG
+%assign dst_idx     (dst_idx + 1)
+%endrep
+
+%endmacro
+
+;; =============================================================================
+;; Stores 1 AES blocks to up to 8 buffers from XMM registers
+%macro XMM_STORE_BLOCKS_MULT_OUT_0_8 12
+%define %%NUM_BLOCKS    %1      ; [in] numerical value, number of AES blocks (0 to 8)
+%define %%ARRAY_OUTP    %2      ; [in] array of output data pointers to write to
+%define %%OUTP          %3      ; [clobbered] output data pointer to write to
+%define %%SRC0          %4      ; [in] XMM register with data to store
+%define %%SRC1          %5      ; [in] XMM register with data to store
+%define %%SRC2          %6      ; [in] XMM register with data to store
+%define %%SRC3          %7      ; [in] XMM register with data to store
+%define %%SRC4          %8      ; [in] XMM register with data to store
+%define %%SRC5          %9      ; [in] XMM register with data to store
+%define %%SRC6          %10     ; [in] XMM register with data to store
+%define %%SRC7          %11     ; [in] XMM register with data to store
+%define %%TMP           %12     ; [clobbered] Temporary GP register
+
+%assign src_idx     0
+%rep (%%NUM_BLOCKS)
+%xdefine %%SRCREG %%SRC %+ src_idx
+        ; Store 5 bytes to each buffer
+        mov     %%OUTP, [%%ARRAY_OUTP + src_idx*8]
+        movd    [%%OUTP], %%SRCREG
+        pextrb  [%%OUTP + 4], %%SRCREG, 4
+%undef %%SRCREG
+%assign src_idx     (src_idx + 1)
+%endrep
+
+%endmacro
+
+%ifdef LINUX
+%define IN		rdi
+%define KEYS		rsi
+%define OUT		rdx
+%define N_BUFS		rcx
+%else
+%define IN		rcx
+%define KEYS		rdx
+%define OUT		r8
+%define N_BUFS		r9
+%endif
+
+%define IDX		rax
+%define TMP		IDX
+%define XDATA0		xmm0
+%define XDATA1		xmm1
+%define XDATA2		xmm2
+%define XDATA3		xmm3
+%define XKEY0		xmm4
+%define XKEY2		xmm5
+%define XKEY4		xmm6
+%define XKEY6		xmm7
+%define XKEY10		xmm8
+%define XKEY_A		xmm14
+%define XKEY_B		xmm15
+
+mksection .text
+
+%macro AES_ECB_QUIC 1
+%define %%NROUNDS     %1 ; [in] Number of rounds
+
+%define IDX             rax
+%define TMP             r11
+%define TMP2            r10
+%define XDATA0          xmm0
+%define XDATA1          xmm1
+%define XDATA2          xmm2
+%define XDATA3          xmm3
+%define XDATA4          xmm4
+%define XDATA5          xmm5
+%define XDATA6          xmm6
+%define XDATA7          xmm7
+%define XKEY1           xmm8
+
+        or      N_BUFS, N_BUFS
+        jz      %%done
+        xor     IDX, IDX
+        mov     TMP, N_BUFS
+        and     TMP, 0x7        ; number of initial buffers (0 to 7 buffers)
+        jz      %%main_loop
+        ; branch to different code block based on remainder
+        cmp     TMP, 4
+        je      %%initial_num_buffers_is_4
+        jb      %%initial_num_buffers_is_3_1
+        cmp     TMP, 6
+        je      %%initial_num_buffers_is_6
+        jb      %%initial_num_buffers_is_5
+        ja      %%initial_num_buffers_is_7
+%%initial_num_buffers_is_3_1:
+        ;; 3, 2 or 1
+        cmp     TMP, 2
+        ja      %%initial_num_buffers_is_3
+        je      %%initial_num_buffers_is_2
+        ;; fall through for `jmp %%initial_num_buffers_is_1`
+%assign num_buffers 1
+%rep 7
+%%initial_num_buffers_is_ %+ num_buffers :
+        ; load initial blocks
+        XMM_LOAD_BLOCKS_MULT_IN_0_8 num_buffers, IN, TMP, XDATA0,\
+                XDATA1, XDATA2, XDATA3, XDATA4, XDATA5,\
+                XDATA6, XDATA7
+%assign %%I 0
+; Perform aesenc encryption/decryption on initial blocks
+%rep (%%NROUNDS + 1)          ; 10/12/14
+        movdqu      XKEY1, [KEYS + %%I*16]
+        XMM_AESENC_ROUND_BLOCKS_SSE_0_8 XDATA0, XDATA1, XDATA2, XDATA3, XDATA4,\
+                XDATA5, XDATA6, XDATA7, XKEY1, %%I, no_data,\
+                no_data, no_data, no_data, no_data, no_data,\
+                no_data, no_data, num_buffers, (%%NROUNDS - 1)
+%assign %%I (%%I + 1)
+%endrep
+        ; store initial blocks
+        XMM_STORE_BLOCKS_MULT_OUT_0_8 num_buffers, OUT, TMP, XDATA0, XDATA1,\
+                XDATA2, XDATA3, XDATA4, XDATA5, XDATA6, XDATA7, TMP2
+        add     IDX, num_buffers
+        cmp     IDX, N_BUFS
+        je      %%done
+%assign num_buffers (num_buffers + 1)
+        jmp     %%main_loop
+%endrep
+align 16
+%%main_loop:
+        ; load next 8 blocks
+        XMM_LOAD_BLOCKS_MULT_IN_0_8 8, {IN + IDX*8}, TMP, XDATA0,\
+                XDATA1, XDATA2, XDATA3, XDATA4, XDATA5,\
+                XDATA6, XDATA7
+%assign %%I 0
+; Perform AES encryption/decryption on 8 blocks
+%rep (%%NROUNDS + 1)          ; 10/12/14
+        movdqu      XKEY1, [KEYS + %%I*16]
+        XMM_AESENC_ROUND_BLOCKS_SSE_0_8 XDATA0, XDATA1, XDATA2, XDATA3, XDATA4,\
+                XDATA5, XDATA6, XDATA7, XKEY1, %%I, no_data,\
+                no_data, no_data, no_data, no_data, no_data,\
+                no_data, no_data, 8, (%%NROUNDS - 1)
+%assign %%I (%%I + 1)
+%endrep
+        ; store 8 blocks
+        XMM_STORE_BLOCKS_MULT_OUT_0_8 8, {OUT + IDX*8}, TMP, XDATA0, XDATA1,\
+                XDATA2, XDATA3, XDATA4, XDATA5, XDATA6, XDATA7, TMP2
+        add     IDX, 8
+        cmp     IDX, N_BUFS
+        jne     %%main_loop
+%%done:
+%ifdef SAFE_DATA
+        clear_all_xmms_sse_asm
+%endif
+        ret
+%endmacro
+
+%ifdef AES_ECB_QUIC_ENC_128
+align 16
+MKGLOBAL(AES_ECB_QUIC_ENC_128,function,internal)
+AES_ECB_QUIC_ENC_128:
+
+        AES_ECB_QUIC 10
+
+%endif
+
+%ifdef AES_ECB_QUIC_ENC_192
+align 16
+MKGLOBAL(AES_ECB_QUIC_ENC_192,function,internal)
+AES_ECB_QUIC_ENC_192:
+
+        AES_ECB_QUIC 12
+
+%endif
+
+%ifdef AES_ECB_QUIC_ENC_256
+align 16
+MKGLOBAL(AES_ECB_QUIC_ENC_256,function,internal)
+AES_ECB_QUIC_ENC_256:
+
+        AES_ECB_QUIC 14
+
+%endif
+mksection stack-noexec
diff --git a/lib/sse_t1/mb_mgr_sse_t1.c b/lib/sse_t1/mb_mgr_sse_t1.c
index 6d6ad988..22a8d4f5 100644
--- a/lib/sse_t1/mb_mgr_sse_t1.c
+++ b/lib/sse_t1/mb_mgr_sse_t1.c
@@ -486,6 +486,10 @@ init_mb_mgr_sse_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac128_finalize    = imb_aes_gmac_finalize_128_sse;
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_sse;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_sse;
+
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/sse_t2/mb_mgr_sse_t2.c b/lib/sse_t2/mb_mgr_sse_t2.c
index 02933755..2dce8f76 100644
--- a/lib/sse_t2/mb_mgr_sse_t2.c
+++ b/lib/sse_t2/mb_mgr_sse_t2.c
@@ -484,6 +484,10 @@ init_mb_mgr_sse_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac128_finalize    = imb_aes_gmac_finalize_128_sse;
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_sse;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_sse;
+
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/sse_t3/mb_mgr_sse_t3.c b/lib/sse_t3/mb_mgr_sse_t3.c
index 4381d9a0..34684975 100644
--- a/lib/sse_t3/mb_mgr_sse_t3.c
+++ b/lib/sse_t3/mb_mgr_sse_t3.c
@@ -485,6 +485,10 @@ init_mb_mgr_sse_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac128_finalize    = imb_aes_gmac_finalize_128_sse;
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_sse;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_sse;
+
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 86066d15..5e0f0296 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -161,6 +161,7 @@ lib_objs1 = \
 	$(OBJ_DIR)\aes128_ecb_by8_avx.obj \
 	$(OBJ_DIR)\aes192_ecb_by8_avx.obj \
 	$(OBJ_DIR)\aes256_ecb_by8_avx.obj \
+	$(OBJ_DIR)\aes_ecb_quic_x8_sse.obj \
 	$(OBJ_DIR)\aes128_ecb_vaes_avx2.obj \
 	$(OBJ_DIR)\aes192_ecb_vaes_avx2.obj \
 	$(OBJ_DIR)\aes256_ecb_vaes_avx2.obj \
diff --git a/lib/x86_64/quic_hp_aes_ecb.c b/lib/x86_64/quic_hp_aes_ecb.c
index ee90aaf6..bd836453 100644
--- a/lib/x86_64/quic_hp_aes_ecb.c
+++ b/lib/x86_64/quic_hp_aes_ecb.c
@@ -27,8 +27,6 @@
 
 #include "intel-ipsec-mb.h"
 #include "include/error.h"
-#include <string.h> /* memcpy() */
-#include <include/arch_avx512_type2.h>
 
 IMB_DLL_EXPORT void
 imb_quic_hp_aes_ecb(IMB_MGR *state,
@@ -79,17 +77,17 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
 
         switch (key_size) {
         case IMB_KEY_128_BYTES:
-                aes_ecb_quic_enc_128_vaes_avx512(src_ptr_array, exp_key_data,
-                                                 dst_ptr_array, num_packets);
+                state->aes_ecb_128_quic(src_ptr_array, exp_key_data,
+                                        dst_ptr_array, num_packets);
                 break;
         case IMB_KEY_192_BYTES:
-                aes_ecb_quic_enc_192_vaes_avx512(src_ptr_array, exp_key_data,
-                                                 dst_ptr_array, num_packets);
+                state->aes_ecb_192_quic(src_ptr_array, exp_key_data,
+                                        dst_ptr_array, num_packets);
                 break;
         case IMB_KEY_256_BYTES:
         default:
-                aes_ecb_quic_enc_256_vaes_avx512(src_ptr_array, exp_key_data,
-                                                 dst_ptr_array, num_packets);
+                state->aes_ecb_256_quic(src_ptr_array, exp_key_data,
+                                        dst_ptr_array, num_packets);
                 break;
         };
 }
-- 
GitLab


From 2d29f8589466cdc19b62a79b97e5553ae19206b0 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Fri, 10 Feb 2023 16:28:43 +0000
Subject: [PATCH 087/332] avx: [quic] add multi-buffer AES-ECB for 16-byte
 buffers

---
 lib/Makefile                       |   1 +
 lib/avx2_t1/mb_mgr_avx2_t1.c       |   6 +-
 lib/avx2_t2/mb_mgr_avx2_t2.c       |   6 +-
 lib/avx512_t1/mb_mgr_avx512_t1.c   |   6 +-
 lib/avx_t1/aes_ecb_quic_x8_avx.asm | 245 +++++++++++++++++++++++++++++
 lib/avx_t1/mb_mgr_avx_t1.c         |   6 +-
 lib/avx_t2/mb_mgr_avx_t2.c         |   6 +-
 lib/include/arch_avx_type1.h       |  13 +-
 lib/win_x64.mak                    |   1 +
 9 files changed, 268 insertions(+), 22 deletions(-)
 create mode 100644 lib/avx_t1/aes_ecb_quic_x8_avx.asm

diff --git a/lib/Makefile b/lib/Makefile
index f7fa6156..3d70f2bd 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -529,6 +529,7 @@ asm_avx_lib_objs := \
 	aes128_ecb_by8_avx.o \
 	aes192_ecb_by8_avx.o \
 	aes256_ecb_by8_avx.o \
+	aes_ecb_quic_x8_avx.o \
 	aes_cfb_avx.o \
 	aes128_cbc_mac_x8_avx.o \
 	aes256_cbc_mac_x8_avx.o \
diff --git a/lib/avx2_t1/mb_mgr_avx2_t1.c b/lib/avx2_t1/mb_mgr_avx2_t1.c
index 811dbdc3..c16e2e98 100644
--- a/lib/avx2_t1/mb_mgr_avx2_t1.c
+++ b/lib/avx2_t1/mb_mgr_avx2_t1.c
@@ -481,9 +481,9 @@ init_mb_mgr_avx2_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen4;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen4;
 
-        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
-        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_avx;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index 6a461a73..63fcb6a2 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -481,9 +481,9 @@ init_mb_mgr_avx2_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen4;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen4;
 
-        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
-        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_avx;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/avx512_t1/mb_mgr_avx512_t1.c b/lib/avx512_t1/mb_mgr_avx512_t1.c
index 0ebc2978..5d82aa6d 100644
--- a/lib/avx512_t1/mb_mgr_avx512_t1.c
+++ b/lib/avx512_t1/mb_mgr_avx512_t1.c
@@ -588,9 +588,9 @@ init_mb_mgr_avx512_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx512;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx512;
 
-        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
-        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_avx;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/avx_t1/aes_ecb_quic_x8_avx.asm b/lib/avx_t1/aes_ecb_quic_x8_avx.asm
new file mode 100644
index 00000000..d5060b6f
--- /dev/null
+++ b/lib/avx_t1/aes_ecb_quic_x8_avx.asm
@@ -0,0 +1,245 @@
+;;
+;; Copyright (c) 2023, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+
+; routine to do AES ECB encrypt for QUIC on 16-byte buffers
+
+; XMM registers are clobbered. Saving/restoring must be done at a higher level
+
+; void aes_ecb_quic_enc_x_avx(void *in,
+;                             UINT128  keys[],
+;                             void    *out,
+;                             UINT64   num_buffers);
+;
+; x = key size (128/192/256)
+; arg 1: IN: array of pointers to input buffers
+; arg 2: KEYS: pointer to keys (common for all buffers)
+; arg 3: OUT: array of pointers to output buffers)
+; arg 4: N_BUFS: number of 16-byte buffers
+;
+
+%include "include/os.inc"
+%include "include/clear_regs.inc"
+%include "include/aes_common.inc"
+
+%define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_avx
+%define AES_ECB_QUIC_ENC_192 aes_ecb_quic_enc_192_avx
+%define AES_ECB_QUIC_ENC_256 aes_ecb_quic_enc_256_avx
+
+;; =============================================================================
+;; Loads 1 AES block from up to 8 buffers into XMM registers
+%macro XMM_LOAD_BLOCKS_MULT_IN_0_8 11
+%define %%NUM_BLOCKS    %1      ; [in] numerical value, number of AES blocks (0 to 16)
+%define %%ARRAY_INP     %2      ; [in] array of input data pointers
+%define %%INP           %3      ; [clobbered] input data pointer to read 16 bytes from
+%define %%DST0          %4      ; [out] XMM register with loaded data
+%define %%DST1          %5      ; [out] XMM register with loaded data
+%define %%DST2          %6      ; [out] XMM register with loaded data
+%define %%DST3          %7      ; [out] XMM register with loaded data
+%define %%DST4          %8      ; [out] XMM register with loaded data
+%define %%DST5          %9      ; [out] XMM register with loaded data
+%define %%DST6          %10     ; [out] XMM register with loaded data
+%define %%DST7          %11     ; [out] XMM register with loaded data
+
+%assign dst_idx     0
+
+%rep (%%NUM_BLOCKS)
+%xdefine %%DSTREG %%DST %+ dst_idx
+        mov             %%INP, [%%ARRAY_INP + dst_idx*8]
+        vmovdqu         %%DSTREG, [%%INP]
+%undef %%DSTREG
+%assign dst_idx     (dst_idx + 1)
+%endrep
+
+%endmacro
+
+;; =============================================================================
+;; Stores 1 AES blocks to up to 8 buffers from XMM registers
+%macro XMM_STORE_BLOCKS_MULT_OUT_0_8 12
+%define %%NUM_BLOCKS    %1      ; [in] numerical value, number of AES blocks (0 to 8)
+%define %%ARRAY_OUTP    %2      ; [in] array of output data pointers to write to
+%define %%OUTP          %3      ; [clobbered] output data pointer to write to
+%define %%SRC0          %4      ; [in] XMM register with data to store
+%define %%SRC1          %5      ; [in] XMM register with data to store
+%define %%SRC2          %6      ; [in] XMM register with data to store
+%define %%SRC3          %7      ; [in] XMM register with data to store
+%define %%SRC4          %8      ; [in] XMM register with data to store
+%define %%SRC5          %9      ; [in] XMM register with data to store
+%define %%SRC6          %10     ; [in] XMM register with data to store
+%define %%SRC7          %11     ; [in] XMM register with data to store
+%define %%TMP           %12     ; [clobbered] Temporary GP register
+
+%assign src_idx     0
+%rep (%%NUM_BLOCKS)
+%xdefine %%SRCREG %%SRC %+ src_idx
+        ; Store 5 bytes to each buffer
+        mov     %%OUTP, [%%ARRAY_OUTP + src_idx*8]
+        vmovd   [%%OUTP], %%SRCREG
+        vpextrb [%%OUTP + 4], %%SRCREG, 4
+%undef %%SRCREG
+%assign src_idx     (src_idx + 1)
+%endrep
+
+%endmacro
+
+%ifdef LINUX
+%define IN		rdi
+%define KEYS		rsi
+%define OUT		rdx
+%define N_BUFS		rcx
+%else
+%define IN		rcx
+%define KEYS		rdx
+%define OUT		r8
+%define N_BUFS		r9
+%endif
+
+%define IDX		rax
+%define TMP		IDX
+%define XDATA0		xmm0
+%define XDATA1		xmm1
+%define XDATA2		xmm2
+%define XDATA3		xmm3
+%define XKEY0		xmm4
+%define XKEY2		xmm5
+%define XKEY4		xmm6
+%define XKEY6		xmm7
+%define XKEY10		xmm8
+%define XKEY_A		xmm14
+%define XKEY_B		xmm15
+
+mksection .text
+
+%macro AES_ECB_QUIC 1
+%define %%NROUNDS     %1 ; [in] Number of rounds
+
+%define IDX             rax
+%define TMP             r11
+%define TMP2            r10
+%define XDATA0          xmm0
+%define XDATA1          xmm1
+%define XDATA2          xmm2
+%define XDATA3          xmm3
+%define XDATA4          xmm4
+%define XDATA5          xmm5
+%define XDATA6          xmm6
+%define XDATA7          xmm7
+%define XKEY1           xmm8
+
+        or      N_BUFS, N_BUFS
+        jz      %%done
+        xor     IDX, IDX
+        mov     TMP, N_BUFS
+        and     TMP, 0x7        ; number of initial buffers (0 to 7 buffers)
+        jz      %%main_loop
+        ; branch to different code block based on remainder
+        cmp     TMP, 4
+        je      %%initial_num_buffers_is_4
+        jb      %%initial_num_buffers_is_3_1
+        cmp     TMP, 6
+        je      %%initial_num_buffers_is_6
+        jb      %%initial_num_buffers_is_5
+        ja      %%initial_num_buffers_is_7
+%%initial_num_buffers_is_3_1:
+        ;; 3, 2 or 1
+        cmp     TMP, 2
+        ja      %%initial_num_buffers_is_3
+        je      %%initial_num_buffers_is_2
+        ;; fall through for `jmp %%initial_num_buffers_is_1`
+%assign num_buffers 1
+%rep 7
+%%initial_num_buffers_is_ %+ num_buffers :
+        ; load initial blocks
+        XMM_LOAD_BLOCKS_MULT_IN_0_8 num_buffers, IN, TMP, XDATA0,\
+                XDATA1, XDATA2, XDATA3, XDATA4, XDATA5,\
+                XDATA6, XDATA7
+%assign %%I 0
+; Perform aesenc encryption/decryption on initial blocks
+%rep (%%NROUNDS + 1)          ; 10/12/14
+        movdqu      XKEY1, [KEYS + %%I*16]
+        XMM_AESENC_ROUND_BLOCKS_AVX_0_8 XDATA0, XDATA1, XDATA2, XDATA3, XDATA4,\
+                XDATA5, XDATA6, XDATA7, XKEY1, %%I, no_data,\
+                no_data, no_data, no_data, no_data, no_data,\
+                no_data, no_data, num_buffers, (%%NROUNDS - 1)
+%assign %%I (%%I + 1)
+%endrep
+        ; store initial blocks
+        XMM_STORE_BLOCKS_MULT_OUT_0_8 num_buffers, OUT, TMP, XDATA0, XDATA1,\
+                XDATA2, XDATA3, XDATA4, XDATA5, XDATA6, XDATA7, TMP2
+        add     IDX, num_buffers
+        cmp     IDX, N_BUFS
+        je      %%done
+%assign num_buffers (num_buffers + 1)
+        jmp     %%main_loop
+%endrep
+align 16
+%%main_loop:
+        ; load next 8 blocks
+        XMM_LOAD_BLOCKS_MULT_IN_0_8 8, {IN + IDX*8}, TMP, XDATA0,\
+                XDATA1, XDATA2, XDATA3, XDATA4, XDATA5,\
+                XDATA6, XDATA7
+%assign %%I 0
+; Perform AES encryption/decryption on 8 blocks
+%rep (%%NROUNDS + 1)          ; 10/12/14
+        movdqu      XKEY1, [KEYS + %%I*16]
+        XMM_AESENC_ROUND_BLOCKS_AVX_0_8 XDATA0, XDATA1, XDATA2, XDATA3, XDATA4,\
+                XDATA5, XDATA6, XDATA7, XKEY1, %%I, no_data,\
+                no_data, no_data, no_data, no_data, no_data,\
+                no_data, no_data, 8, (%%NROUNDS - 1)
+%assign %%I (%%I + 1)
+%endrep
+        ; store 8 blocks
+        XMM_STORE_BLOCKS_MULT_OUT_0_8 8, {OUT + IDX*8}, TMP, XDATA0, XDATA1,\
+                XDATA2, XDATA3, XDATA4, XDATA5, XDATA6, XDATA7, TMP2
+        add     IDX, 8
+        cmp     IDX, N_BUFS
+        jne     %%main_loop
+%%done:
+%ifdef SAFE_DATA
+        clear_all_xmms_avx_asm
+%endif
+        ret
+%endmacro
+
+align 16
+MKGLOBAL(AES_ECB_QUIC_ENC_128,function,internal)
+AES_ECB_QUIC_ENC_128:
+
+        AES_ECB_QUIC 10
+
+align 16
+MKGLOBAL(AES_ECB_QUIC_ENC_192,function,internal)
+AES_ECB_QUIC_ENC_192:
+
+        AES_ECB_QUIC 12
+
+align 16
+MKGLOBAL(AES_ECB_QUIC_ENC_256,function,internal)
+AES_ECB_QUIC_ENC_256:
+
+        AES_ECB_QUIC 14
+
+mksection stack-noexec
diff --git a/lib/avx_t1/mb_mgr_avx_t1.c b/lib/avx_t1/mb_mgr_avx_t1.c
index 83987ee2..c4489899 100644
--- a/lib/avx_t1/mb_mgr_avx_t1.c
+++ b/lib/avx_t1/mb_mgr_avx_t1.c
@@ -479,9 +479,9 @@ init_mb_mgr_avx_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen2;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen2;
 
-        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
-        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_avx;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/avx_t2/mb_mgr_avx_t2.c b/lib/avx_t2/mb_mgr_avx_t2.c
index a36bb128..3f1d03fe 100644
--- a/lib/avx_t2/mb_mgr_avx_t2.c
+++ b/lib/avx_t2/mb_mgr_avx_t2.c
@@ -480,9 +480,9 @@ init_mb_mgr_avx_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen2;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen2;
 
-        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
-        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
+        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_avx;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
 #include "mb_mgr_code.h"
diff --git a/lib/include/arch_avx_type1.h b/lib/include/arch_avx_type1.h
index 008b7eda..97c8f7de 100644
--- a/lib/include/arch_avx_type1.h
+++ b/lib/include/arch_avx_type1.h
@@ -81,13 +81,12 @@ void aes_ecb_dec_192_avx(const void *in, const void *keys,
 void aes_ecb_dec_128_avx(const void *in, const void *keys,
                          void *out, uint64_t len_bytes);
 
-void aes_ecb_dec_256_vaes_avx512(const void *in, const void *keys,
-                                 void *out, uint64_t len_bytes);
-void aes_ecb_dec_192_vaes_avx512(const void *in, const void *keys,
-                                 void *out, uint64_t len_bytes);
-void aes_ecb_dec_128_vaes_avx512(const void *in, const void *keys,
-                                 void *out, uint64_t len_bytes);
-
+void aes_ecb_quic_enc_128_avx(const void *in, const void *keys,
+                              void *out, uint64_t num_buffers);
+void aes_ecb_quic_enc_192_avx(const void *in, const void *keys,
+                              void *out, uint64_t num_buffers);
+void aes_ecb_quic_enc_256_avx(const void *in, const void *keys,
+                              void *out, uint64_t num_buffers);
 /* AES128-ECBENC */
 void aes128_ecbenc_x3_avx(const void *in, void *keys,
                           void *out1, void *out2, void *out3);
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 5e0f0296..d619c337 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -162,6 +162,7 @@ lib_objs1 = \
 	$(OBJ_DIR)\aes192_ecb_by8_avx.obj \
 	$(OBJ_DIR)\aes256_ecb_by8_avx.obj \
 	$(OBJ_DIR)\aes_ecb_quic_x8_sse.obj \
+	$(OBJ_DIR)\aes_ecb_quic_x8_avx.obj \
 	$(OBJ_DIR)\aes128_ecb_vaes_avx2.obj \
 	$(OBJ_DIR)\aes192_ecb_vaes_avx2.obj \
 	$(OBJ_DIR)\aes256_ecb_vaes_avx2.obj \
-- 
GitLab


From 504ce5ca80db7a672ccdde195935488451c4f011 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 27 Jan 2023 15:48:49 +0000
Subject: [PATCH 088/332] perf: [quic] add QUIC-API specific benchmark

---
 perf/ipsec_perf.c | 208 +++++++++++++++++++++++++++++++++++++++++++++-
 1 file changed, 206 insertions(+), 2 deletions(-)

diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index 22d43f90..7cc47db7 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -954,6 +954,8 @@ static uint32_t pb_mod = 0;
 static int silent_progress_bar = 0;
 static int plot_output_option = 0;
 
+static int quic_api_test = 0;
+
 /* API types */
 typedef enum  {
         TEST_API_JOB = 0,
@@ -1725,6 +1727,189 @@ set_size_lists(uint32_t *cipher_size_list, uint32_t *hash_size_list,
         }
 }
 
+/*
+ * =========================================================
+ * QUIC specific benchmarks
+ * =========================================================
+ */
+
+#define MAX_K 32
+#define PKT_SIZE_MAX 16384
+
+#define AAD_LEN 12
+#define IV_LEN 12
+#define TAG_LEN 16
+
+static void
+bench_quic_aes_gcm(IMB_MGR *p_mgr, const uint64_t n_max, uint8_t *blob)
+{
+        void *out[MAX_K];
+        const void *in[MAX_K];
+        const void *iv[MAX_K];
+        const void *aad[MAX_K];
+        void *tag[MAX_K];
+        uint64_t len[MAX_K];
+        const uint8_t kp[16] = {
+                0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03,
+                0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03
+        };
+        struct gcm_key_data key;
+        const uint64_t pkt_size = 16384;
+        const int K = MAX_K;
+        uint32_t aux;
+        uint64_t n;
+        int i;
+
+        printf("QUIC-API AES-GCM-128 test start...\n"
+               "    packet-size: %lu\n"
+               "    number of packets : %d\n"
+               "    iterations: %lu\n",
+               (unsigned long) pkt_size, K, (unsigned long) n_max);
+
+        for (n = 0, i = 0; i < K; i++) {
+                iv[i] = &blob[n];
+                n += IV_LEN;
+
+                aad[i] = &blob[n];
+                n += AAD_LEN;
+
+                in[i] = &blob[n];
+                n += pkt_size;
+
+                out[i] = &blob[n];
+                n += pkt_size;
+
+                tag[i] = &blob[n];
+                n += TAG_LEN;
+
+                len[i] = pkt_size;
+        }
+
+        IMB_AES128_GCM_PRE(p_mgr, kp, &key);
+
+        const uint64_t tsc_start = __rdtscp(&aux);
+
+        for (n = 0; n < n_max; n++) {
+                imb_quic_aes_gcm(p_mgr, &key,
+                                 IMB_KEY_128_BYTES, IMB_DIR_ENCRYPT,
+                                 (void **) out, (const void * const*) in, len,
+                                 (const void * const*) iv,
+                                 (const void * const*) &aad, AAD_LEN,
+                                 (void **) tag, TAG_LEN, K);
+        }
+
+        const uint64_t tsc_end = __rdtscp(&aux);
+        const uint64_t cpi = (tsc_end - tsc_start) / n_max;
+        const uint64_t cpp = cpi / (uint64_t) K;
+
+        printf("QUIC-API AES-GCM-128 cycles/iteration = %lu, "
+               "cycles/packet = %lu\n",
+               (unsigned long) cpi, (unsigned long) cpp);
+}
+
+static void
+bench_quic_aes_ecb_hp(IMB_MGR *p_mgr, const uint64_t n_max, uint8_t *blob)
+{
+        void *out[MAX_K];
+        const void *in[MAX_K];
+        const uint8_t kp[16] = {
+                0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03,
+                0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03
+        };
+        DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
+        DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
+        const int K = MAX_K;
+        const uint64_t pkt_size = 16;
+        uint32_t aux;
+        uint64_t n;
+        int i;
+
+        for (n = 0, i = 0; i < K; i++) {
+                in[i] = &blob[n];
+                n += pkt_size;
+
+                out[i] = &blob[n];
+                n += pkt_size;
+        }
+
+        printf("QUIC-API AES-ECB-128 test start...\n"
+               "    packet-size: %lu\n"
+               "    number of packets : %d\n"
+               "    iterations: %lu\n",
+               (unsigned long) pkt_size, K, (unsigned long) n_max);
+
+        IMB_AES_KEYEXP_128(p_mgr, kp, enc_keys, dec_keys);
+
+        const uint64_t tsc_start = __rdtscp(&aux);
+
+        for (n = 0; n < n_max; n++)
+                imb_quic_hp_aes_ecb(p_mgr, enc_keys,
+                                    (void **)out, (const void * const *) in,
+                                    K, IMB_KEY_128_BYTES);
+
+        const uint64_t tsc_end = __rdtscp(&aux);
+        const uint64_t cpi = (tsc_end - tsc_start) / n_max;
+        const uint64_t cpp = cpi / (uint64_t) K;
+
+        printf("QUIC-API AES-ECB-128 cycles/iteration = %lu, "
+               "cycles/packet = %lu\n",
+               (unsigned long) cpi, (unsigned long) cpp);
+}
+
+static void quic_main(IMB_MGR *p_mgr)
+{
+        const size_t blob_sz =
+                (AAD_LEN + IV_LEN + TAG_LEN + PKT_SIZE_MAX) * MAX_K * 2;
+
+        uint8_t *blob_ptr  = (uint8_t *) malloc(blob_sz);
+
+        if (blob_ptr == NULL) {
+                printf("Error allocating QUIC-API test buffer!\n");
+                exit(EXIT_FAILURE);
+        }
+
+        memset(blob_ptr, 0xaa, blob_sz);
+
+        enum arch_type_e arch;
+
+        for (arch = ARCH_SSE; arch <= ARCH_AVX512; arch++) {
+                if (archs[arch] == 0)
+                        continue;
+
+                switch (arch) {
+                case ARCH_SSE:
+                        printf("SSE\n");
+                        init_mb_mgr_sse(p_mgr);
+                        break;
+                case ARCH_AVX:
+                        printf("AVX\n");
+                        init_mb_mgr_avx(p_mgr);
+                        break;
+                case ARCH_AVX2:
+                        printf("AVX2\n");
+                        init_mb_mgr_avx2(p_mgr);
+                        break;
+                default: /* ARCH_AV512 */
+                        printf("AVX512\n");
+                        init_mb_mgr_avx512(p_mgr);
+                        break;
+                }
+
+                if (imb_get_errno(p_mgr) != 0) {
+                        printf("Error initializing MB_MGR! %s\n",
+                               imb_get_strerror(imb_get_errno(p_mgr)));
+                        free(blob_ptr);
+                        exit(EXIT_FAILURE);
+                }
+
+                const uint64_t n_max = 50000;
+
+                bench_quic_aes_ecb_hp(p_mgr, n_max, blob_ptr);
+                bench_quic_aes_gcm(p_mgr, n_max, blob_ptr);
+        }
+        free(blob_ptr);
+}
+
 /* Performs test using AES_HMAC or DOCSIS */
 static uint64_t
 do_test(IMB_MGR *mb_mgr, struct params_s *params,
@@ -3070,6 +3255,15 @@ run_tests(void *arg)
 
         p_mgr = info->p_mgr;
 
+        if (quic_api_test) {
+                quic_main(p_mgr);
+#ifndef _WIN32
+                return NULL;
+#else
+                return;
+#endif
+        }
+
         memset(&params, 0, sizeof(params));
 
         if (job_size_count == 0)
@@ -3241,6 +3435,12 @@ exit_failure:
         exit(EXIT_FAILURE);
 }
 
+/*
+ * =========================================================
+ * Utility functions
+ * =========================================================
+ */
+
 static void usage(void)
 {
         fprintf(stderr, "Usage: ipsec_perf <ALGORITHM> [ARGS]\n"
@@ -3304,7 +3504,8 @@ static void usage(void)
                 "--burst-api: use burst API for perf tests\n"
                 "--cipher-burst-api: use cipher-only burst API for perf tests\n"
                 "--hash-burst-api: use hash-only burst API for perf tests\n"
-                "--burst-size: number of jobs to submit per burst\n",
+                "--burst-size: number of jobs to submit per burst\n"
+                "--quic-api: run QUIC-API specific tests only\n",
                 MAX_NUM_THREADS + 1);
 }
 
@@ -3581,6 +3782,7 @@ end_range:
 
 }
 
+
 /**
  * @brief Update table of supported architectures
  *
@@ -3906,6 +4108,8 @@ int main(int argc, char *argv[])
                         }
                 } else if (strcmp(argv[i], "--no-time-box") == 0) {
                         use_timebox = 0;
+                } else if (strcmp(argv[i], "--quic-api") == 0) {
+                        quic_api_test = 1;
                 } else {
                         usage();
                         return EXIT_FAILURE;
@@ -3943,7 +4147,7 @@ int main(int argc, char *argv[])
         }
 
         if (aead_algo_set == 0 && cipher_algo_set == 0 &&
-            hash_algo_set == 0) {
+            hash_algo_set == 0 && quic_api_test == 0) {
                 fprintf(stderr, "No cipher, hash or "
                         "AEAD algorithms selected\n");
                 usage();
-- 
GitLab


From 40eb4cf93ec067aec933870189a25ec1c5e387fd Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Mon, 20 Feb 2023 11:09:49 +0000
Subject: [PATCH 089/332] test [fuzz]: fuzz zuc direct api

---
 test/direct_api_fuzz_test.c | 249 +++++++++++++++++++++++++-----------
 1 file changed, 172 insertions(+), 77 deletions(-)

diff --git a/test/direct_api_fuzz_test.c b/test/direct_api_fuzz_test.c
index c0087898..64f4738d 100644
--- a/test/direct_api_fuzz_test.c
+++ b/test/direct_api_fuzz_test.c
@@ -39,60 +39,6 @@
 int LLVMFuzzerTestOneInput(const uint8_t *, size_t);
 int LLVMFuzzerInitialize(int *, char ***);
 
-/* SNOW3G */
-void test_snow3g_init_key_sched(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_snow3g_f8_1_buff_bit(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_snow3g_f8_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_snow3g_f8_2_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_snow3g_f8_4_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_snow3g_f8_8_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_snow3g_f8_n_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_snow3g_f8_8_multikey(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_snow3g_f8_n_multikey(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_snow3g_f9_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-/* GCM-SGL */
-void test_aes128_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_aes128_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_aes192_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_aes192_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_aes256_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_aes256_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-/* GCM */
-void test_aes128_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_aes128_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_aes192_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_aes192_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_aes256_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-void test_aes256_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize);
-
-struct {
-        void (*func)(IMB_MGR *mb_mgr, uint8_t *buff, size_t dataSize);
-        const char *func_name;
-} direct_apis[] = {
-        {test_snow3g_init_key_sched, "test_snow3g_init_key_sched"},
-        {test_snow3g_f8_1_buff_bit, "test_snow3g_f8_1_buff_bit"},
-        {test_snow3g_f8_1_buff, "test_snow3g_f8_1_buff"},
-        {test_snow3g_f8_2_buff, "test_snow3g_f8_2_buff"},
-        {test_snow3g_f8_4_buff, "test_snow3g_f8_4_buff"},
-        {test_snow3g_f8_8_buff, "test_snow3g_f8_8_buff"},
-        {test_snow3g_f8_n_buff, "test_snow3g_f8_n_buff"},
-        {test_snow3g_f8_8_multikey, "test_snow3g_f8_8_multikey"},
-        {test_snow3g_f8_n_multikey, "test_snow3g_f8_n_multikey"},
-        {test_snow3g_f9_1_buff, "test_snow3g_f9_1_buff"},
-        {test_aes128_gcm_enc_sgl, "test_aes128_gcm_enc_sgl"},
-        {test_aes128_gcm_dec_sgl, "test_aes128_gcm_dec_sgl"},
-        {test_aes192_gcm_enc_sgl, "test_aes192_gcm_enc_sgl"},
-        {test_aes192_gcm_dec_sgl, "test_aes192_gcm_dec_sgl"},
-        {test_aes256_gcm_enc_sgl, "test_aes256_gcm_enc_sgl"},
-        {test_aes256_gcm_dec_sgl, "test_aes256_gcm_dec_sgl"},
-        {test_aes128_gcm_enc, "test_aes128_gcm_enc"},
-        {test_aes128_gcm_dec, "test_aes128_gcm_dec"},
-        {test_aes192_gcm_enc, "test_aes192_gcm_enc"},
-        {test_aes192_gcm_dec, "test_aes192_gcm_dec"},
-        {test_aes256_gcm_enc, "test_aes256_gcm_enc"},
-        {test_aes256_gcm_dec, "test_aes256_gcm_dec"},
-};
-
 enum ar {
         SSE = 1,
         AVX,
@@ -102,7 +48,7 @@ enum ar {
 
 enum ar arch;
 
-const uint32_t count = 8;
+int count = 8;
 
 static void parse_matched(int argc, char **argv)
 {
@@ -143,7 +89,7 @@ int LLVMFuzzerInitialize(int *argc, char ***argv)
         return 0;
 }
 
-void test_snow3g_init_key_sched(IMB_MGR *p_mgr, uint8_t *buff,
+static void test_snow3g_init_key_sched(IMB_MGR *p_mgr, uint8_t *buff,
                                 size_t dataSize)
 {
         const void *init_key = buff;
@@ -156,7 +102,8 @@ void test_snow3g_init_key_sched(IMB_MGR *p_mgr, uint8_t *buff,
         IMB_SNOW3G_INIT_KEY_SCHED(p_mgr, init_key, exp_key);
 }
 
-void test_snow3g_f8_1_buff_bit(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_snow3g_f8_1_buff_bit(IMB_MGR *p_mgr, uint8_t *buff,
+                                      size_t dataSize)
 {
         const snow3g_key_schedule_t exp_key_s;
         const snow3g_key_schedule_t *exp_key = &exp_key_s;
@@ -175,7 +122,8 @@ void test_snow3g_f8_1_buff_bit(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_SNOW3G_F8_1_BUFFER_BIT(p_mgr, exp_key, iv, in, out, len, offset);
 }
 
-void test_snow3g_f8_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_snow3g_f8_1_buff(IMB_MGR *p_mgr, uint8_t *buff,
+                                  size_t dataSize)
 {
         const snow3g_key_schedule_t exp_key_s;
         const snow3g_key_schedule_t *exp_key = &exp_key_s;
@@ -191,7 +139,8 @@ void test_snow3g_f8_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_SNOW3G_F8_1_BUFFER(p_mgr, exp_key, iv, in, out, len);
 }
 
-void test_snow3g_f8_2_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_snow3g_f8_2_buff(IMB_MGR *p_mgr, uint8_t *buff,
+                                  size_t dataSize)
 {
         const snow3g_key_schedule_t exp_key_s;
         const snow3g_key_schedule_t *exp_key = &exp_key_s;
@@ -208,7 +157,8 @@ void test_snow3g_f8_2_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
                                out, len, in, out, len);
 }
 
-void test_snow3g_f8_4_buff(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+static void test_snow3g_f8_4_buff(IMB_MGR *p_mgr, uint8_t *buff,
+                                  size_t dataSize)
 {
         const snow3g_key_schedule_t exp_key_s;
         const snow3g_key_schedule_t *exp_key = &exp_key_s;
@@ -227,7 +177,8 @@ void test_snow3g_f8_4_buff(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
                                in, out, len);
 }
 
-void test_snow3g_f8_8_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_snow3g_f8_8_buff(IMB_MGR *p_mgr, uint8_t *buff,
+                                  size_t dataSize)
 {
         const snow3g_key_schedule_t exp_key_s;
         const snow3g_key_schedule_t *exp_key = &exp_key_s;
@@ -249,7 +200,8 @@ void test_snow3g_f8_8_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
                                out, len, in, out, len);
 }
 
-void test_snow3g_f8_n_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_snow3g_f8_n_buff(IMB_MGR *p_mgr, uint8_t *buff,
+                                  size_t dataSize)
 {
         const snow3g_key_schedule_t exp_key_s;
         const snow3g_key_schedule_t *exp_key = &exp_key_s;
@@ -272,7 +224,8 @@ void test_snow3g_f8_n_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_SNOW3G_F8_N_BUFFER(p_mgr, exp_key, iv, in, out, len, count);
 }
 
-void test_snow3g_f8_8_multikey(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+static void test_snow3g_f8_8_multikey(IMB_MGR *p_mgr, uint8_t *buff,
+                                      size_t dataSize)
 {
         const snow3g_key_schedule_t exp_key_s;
         const snow3g_key_schedule_t *exp_key = &exp_key_s;
@@ -295,7 +248,8 @@ void test_snow3g_f8_8_multikey(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
         IMB_SNOW3G_F8_8_BUFFER_MULTIKEY(p_mgr, &exp_key, iv, in, out, len);
 }
 
-void test_snow3g_f8_n_multikey(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_snow3g_f8_n_multikey(IMB_MGR *p_mgr, uint8_t *buff,
+                                      size_t dataSize)
 {
         const snow3g_key_schedule_t exp_key_s;
         const snow3g_key_schedule_t *exp_key = &exp_key_s;
@@ -319,7 +273,8 @@ void test_snow3g_f8_n_multikey(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
                                         count);
 }
 
-void test_snow3g_f9_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_snow3g_f9_1_buff(IMB_MGR *p_mgr, uint8_t *buff,
+                                  size_t dataSize)
 {
         const snow3g_key_schedule_t exp_key_s;
         const snow3g_key_schedule_t *exp_key = &exp_key_s;
@@ -335,7 +290,7 @@ void test_snow3g_f9_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_SNOW3G_F9_1_BUFFER(p_mgr, exp_key, iv, in, len, auth_tag);
 }
 
-void test_aes128_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_aes128_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -357,7 +312,7 @@ void test_aes128_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
                            aad_len, auth_tag, tag_len);
 }
 
-void test_aes128_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_aes128_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -378,7 +333,7 @@ void test_aes128_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
                            aad_len, auth_tag, tag_len);
 }
 
-void test_aes192_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_aes192_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -399,7 +354,7 @@ void test_aes192_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
                            aad_len, auth_tag, tag_len);
 }
 
-void test_aes192_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+static void test_aes192_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -420,7 +375,7 @@ void test_aes192_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
                            aad_len, auth_tag, tag_len);
 }
 
-void test_aes256_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_aes256_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -441,7 +396,7 @@ void test_aes256_gcm_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
                            aad_len, auth_tag, tag_len);
 }
 
-void test_aes256_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_aes256_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -462,7 +417,8 @@ void test_aes256_gcm_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
                            aad_len, auth_tag, tag_len);
 }
 
-void test_aes128_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_aes128_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff,
+                                    size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -484,7 +440,8 @@ void test_aes128_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_AES128_GCM_ENC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
 }
 
-void test_aes128_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+static void test_aes128_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff,
+                                    size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -506,7 +463,8 @@ void test_aes128_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
         IMB_AES128_GCM_DEC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
 }
 
-void test_aes192_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_aes192_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff,
+                                    size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -528,7 +486,8 @@ void test_aes192_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_AES192_GCM_ENC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
 }
 
-void test_aes192_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_aes192_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff,
+                                    size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -550,7 +509,8 @@ void test_aes192_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_AES192_GCM_DEC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
 }
 
-void test_aes256_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_aes256_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff,
+                                    size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -571,7 +531,8 @@ void test_aes256_gcm_enc_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_AES256_GCM_ENC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
 }
 
-void test_aes256_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+static void test_aes256_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff,
+                                    size_t dataSize)
 {
         if ((dataSize < sizeof(struct gcm_key_data)) ||
             (dataSize < sizeof(struct gcm_context_data)))
@@ -593,6 +554,140 @@ void test_aes256_gcm_dec_sgl(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_AES256_GCM_DEC_FINALIZE(p_mgr, key, ctx, auth_tag, tag_len);
 }
 
+static void test_zuc_eea3_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *key = buff;
+
+        if (dataSize < 16)
+                return;
+
+        void *out = buff;
+        const void *in = buff;
+	const uint32_t len = dataSize;
+	const void *iv = (const void *) buff;
+
+        IMB_ZUC_EEA3_1_BUFFER(p_mgr, key, iv, in, out, len);
+}
+
+static void test_zuc_eea3_4_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *key[4];
+
+        if (dataSize < 16)
+                return;
+
+        const void *iv[4];
+        const void *in[4];
+        void *out[4];
+        uint32_t len[4];
+
+        for (int i = 0; i < 4; i++) {
+                key[i] = buff;
+                iv[i] = buff;
+                in[i] = buff;
+                out[i] = buff;
+                len[i] = dataSize;
+        }
+
+        IMB_ZUC_EEA3_4_BUFFER(p_mgr, key, iv, in, out, len);
+}
+
+static void test_zuc_eea3_n_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *key[8];
+
+        if (dataSize < 16)
+                return;
+
+        const void *iv[8];
+        const void *in[8];
+        void *out[8];
+        uint32_t len[8];
+
+        for (int i = 0; i < count; i++) {
+                key[i] = buff;
+                iv[i] = buff;
+                in[i] = buff;
+                out[i] = buff;
+                len[i] = dataSize;
+        }
+
+        IMB_ZUC_EEA3_N_BUFFER(p_mgr, key, iv, in, out, len, count);
+}
+
+static void test_zuc_eia3_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *key = buff;
+
+        if (dataSize < 16)
+                return;
+
+        const void *in = buff;
+	uint32_t len = dataSize * 8;
+	const void *iv = (const void *) buff;
+        uint32_t *tag = (uint32_t *)buff;
+
+        IMB_ZUC_EIA3_1_BUFFER(p_mgr, key, iv, in, len, tag);
+}
+
+static void test_zuc_eia3_n_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *key[8];
+
+        if (dataSize < 16)
+                return;
+
+        const void *iv[8];
+        const void *in[8];
+        void *tag_ptr_array[8];
+        uint32_t len[8];
+        uint32_t *tag[8];
+
+        for (int i = 0; i < count; i++) {
+                key[i] = buff;
+                iv[i] = buff;
+                in[i] = buff;
+                tag_ptr_array[i] = buff;
+                tag[i] = (uint32_t *)buff;
+                len[i] = dataSize * 8;
+        }
+
+        IMB_ZUC_EIA3_N_BUFFER(p_mgr, key, iv, in, len, tag, count);
+}
+
+struct {
+        void (*func)(IMB_MGR *mb_mgr, uint8_t *buff, size_t dataSize);
+        const char *func_name;
+} direct_apis[] = {
+        {test_snow3g_init_key_sched, "test_snow3g_init_key_sched"},
+        {test_snow3g_f8_1_buff_bit, "test_snow3g_f8_1_buff_bit"},
+        {test_snow3g_f8_1_buff, "test_snow3g_f8_1_buff"},
+        {test_snow3g_f8_2_buff, "test_snow3g_f8_2_buff"},
+        {test_snow3g_f8_4_buff, "test_snow3g_f8_4_buff"},
+        {test_snow3g_f8_8_buff, "test_snow3g_f8_8_buff"},
+        {test_snow3g_f8_n_buff, "test_snow3g_f8_n_buff"},
+        {test_snow3g_f8_8_multikey, "test_snow3g_f8_8_multikey"},
+        {test_snow3g_f8_n_multikey, "test_snow3g_f8_n_multikey"},
+        {test_snow3g_f9_1_buff, "test_snow3g_f9_1_buff"},
+        {test_aes128_gcm_enc_sgl, "test_aes128_gcm_enc_sgl"},
+        {test_aes128_gcm_dec_sgl, "test_aes128_gcm_dec_sgl"},
+        {test_aes192_gcm_enc_sgl, "test_aes192_gcm_enc_sgl"},
+        {test_aes192_gcm_dec_sgl, "test_aes192_gcm_dec_sgl"},
+        {test_aes256_gcm_enc_sgl, "test_aes256_gcm_enc_sgl"},
+        {test_aes256_gcm_dec_sgl, "test_aes256_gcm_dec_sgl"},
+        {test_aes128_gcm_enc, "test_aes128_gcm_enc"},
+        {test_aes128_gcm_dec, "test_aes128_gcm_dec"},
+        {test_aes192_gcm_enc, "test_aes192_gcm_enc"},
+        {test_aes192_gcm_dec, "test_aes192_gcm_dec"},
+        {test_aes256_gcm_enc, "test_aes256_gcm_enc"},
+        {test_aes256_gcm_dec, "test_aes256_gcm_dec"},
+        {test_zuc_eea3_1_buff, "test_zuc_eea3_1_buff"},
+        {test_zuc_eea3_4_buff, "test_zuc_eea3_4_buff"},
+        {test_zuc_eea3_n_buff, "test_zuc_eea3_n_buff"},
+        {test_zuc_eia3_1_buff, "test_zuc_eia3_1_buff"},
+        {test_zuc_eia3_n_buff, "test_zuc_eia3_n_buff"},
+};
+
 int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
 {
         IMB_ARCH arch_to_run = IMB_ARCH_NUM;
-- 
GitLab


From f4be9ce82239c860c40fda97f3fff0935d2d70f5 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Wed, 22 Feb 2023 14:01:41 +0000
Subject: [PATCH 090/332] lib: [CFB] fix cfb cet issue

---
 lib/avx_t1/aes_cfb_avx.asm | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/lib/avx_t1/aes_cfb_avx.asm b/lib/avx_t1/aes_cfb_avx.asm
index cbab23d3..645520d5 100644
--- a/lib/avx_t1/aes_cfb_avx.asm
+++ b/lib/avx_t1/aes_cfb_avx.asm
@@ -207,7 +207,7 @@ align 32
 aes_cfb_256_one_avx:
 aes_cfb_256_one_avx2:
 aes_cfb_256_one_avx512:
-
+        endbranch64
         do_cfb 13
 
         ret
-- 
GitLab


From 841d56a4d690fa2aed469670ef4e7c1e5e39c2d7 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Mon, 13 Feb 2023 14:08:59 +0000
Subject: [PATCH 091/332] lib: opad/ipad for sha1

---
 lib/Makefile                 |   3 +-
 lib/intel-ipsec-mb.h         |  13 ++++
 lib/libIPSec_MB.def          |   1 +
 lib/win_x64.mak              |   3 +-
 lib/x86_64/hmac_ipad_opad.c  |  84 +++++++++++++++++++++++
 lib/x86_64/self_test.c       |  17 +----
 test/acvp_app_main.c         |  26 +------
 test/chained_test.c          |  51 ++------------
 test/hmac_sha1_test.c        | 128 ++++++++---------------------------
 test/ipsec_xvalid.c          |  14 +---
 test/wycheproof/wycheproof.c |  21 +-----
 11 files changed, 143 insertions(+), 218 deletions(-)
 create mode 100644 lib/x86_64/hmac_ipad_opad.c

diff --git a/lib/Makefile b/lib/Makefile
index 3d70f2bd..dc758b4e 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -313,7 +313,8 @@ c_lib_objs := \
 	ooo_mgr_reset.o \
 	self_test.o \
 	quic_aes_gcm.o \
-	quic_hp_aes_ecb.o
+	quic_hp_aes_ecb.o \
+	hmac_ipad_opad.o
 
 ifeq ($(AESNI_EMU), y)
 c_lib_objs := $(c_lib_objs) \
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 676bf172..8cb2bf9f 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -2681,6 +2681,19 @@ IMB_DLL_EXPORT void init_mb_mgr_auto(IMB_MGR *state, IMB_ARCH *arch);
 IMB_DLL_EXPORT int
 des_key_schedule(uint64_t *ks, const void *key);
 
+/**
+ * @brief Ipad Opad padding for sha1
+ *
+ * @param [in] mb_mgr           Pointer to initialized IMB_MGR structure
+ * @param [in] pkey             Pointer to a HMAC key
+ * @param [in] key_len          Length of the HMAC key
+ * @param [out] ipad_hash       Block-sized inner padding
+ * @param [out] opad_hash       Block-sized outer padding
+ */
+IMB_DLL_EXPORT void
+imb_ipad_opad_sha1(struct IMB_MGR *mb_mgr, const void *pkey,
+                   const size_t key_len, void *ipad_hash,
+                   void *opad_hash);
 
 /**
  * @brief DES-CFB Encrypt/Decrypt up to one block.
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index 2c9e6d65..bc05a2f3 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -700,3 +700,4 @@ EXPORTS
     aes_cfb_256_one_sse_no_aesni		@674
     imb_quic_aes_gcm				@675
     imb_quic_hp_aes_ecb				@676
+    imb_ipad_opad_sha1		                @677
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index d619c337..302e19fb 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -356,7 +356,8 @@ lib_objs1 = \
 	$(OBJ_DIR)\ooo_mgr_reset.obj \
 	$(OBJ_DIR)\self_test.obj \
 	$(OBJ_DIR)\quic_aes_gcm.obj \
-	$(OBJ_DIR)\quic_hp_aes_ecb.obj
+	$(OBJ_DIR)\quic_hp_aes_ecb.obj \
+	$(OBJ_DIR)\hmac_ipad_opad.obj
 
 lib_objs2 = \
 	$(OBJ_DIR)\mb_mgr_aes192_cbc_enc_flush_avx.obj \
diff --git a/lib/x86_64/hmac_ipad_opad.c b/lib/x86_64/hmac_ipad_opad.c
new file mode 100644
index 00000000..46b11100
--- /dev/null
+++ b/lib/x86_64/hmac_ipad_opad.c
@@ -0,0 +1,84 @@
+/*****************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************/
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include <intel-ipsec-mb.h>
+#include "include/error.h"
+
+IMB_DLL_EXPORT
+void
+imb_ipad_opad_sha1(struct IMB_MGR *mb_mgr, const void *pkey,
+                   const size_t key_len, void *ipad_hash,
+                   void *opad_hash)
+{
+#ifdef SAFE_PARAM
+        imb_set_errno(NULL, 0);
+        if (pkey == NULL) {
+                imb_set_errno(NULL, IMB_ERR_NULL_KEY);
+                return;
+        }
+        if (mb_mgr == NULL) {
+                imb_set_errno(NULL, IMB_ERR_NULL_MBMGR);
+                return;
+        }
+#endif
+        uint32_t i = 0;
+        const size_t local_key_len = (key_len <= IMB_SHA1_BLOCK_SIZE) ?
+                                        key_len : IMB_SHA1_DIGEST_SIZE_IN_BYTES;
+        uint8_t key[IMB_SHA1_BLOCK_SIZE];
+        uint8_t buf[IMB_SHA1_BLOCK_SIZE];
+
+        /* prepare the key */
+        if (local_key_len == key_len) {
+                memset(key, 0, sizeof(key));
+                memcpy(key, pkey, key_len);
+        } else
+                IMB_SHA1(mb_mgr, pkey, key_len, key);
+
+        /* compute ipad hash */
+        if (ipad_hash != NULL) {
+                memset(buf, 0x36, sizeof(buf));
+                for (i = 0; i < local_key_len; i++)
+                        buf[i] ^= key[i];
+                IMB_SHA1_ONE_BLOCK(mb_mgr, buf, ipad_hash);
+        }
+        /* compute opad hash */
+        if (opad_hash != NULL) {
+                memset(buf, 0x5c, sizeof(buf));
+                for (i = 0; i < local_key_len; i++)
+                        buf[i] ^= key[i];
+                IMB_SHA1_ONE_BLOCK(mb_mgr, buf, opad_hash);
+        }
+#ifdef SAFE_DATA
+       imb_clear_mem(key, sizeof(key));
+       imb_clear_mem(buf, sizeof(buf));
+#endif
+}
diff --git a/lib/x86_64/self_test.c b/lib/x86_64/self_test.c
index fb661b8a..6b547132 100644
--- a/lib/x86_64/self_test.c
+++ b/lib/x86_64/self_test.c
@@ -783,21 +783,8 @@ static int self_test_hash(IMB_MGR *p_mgr)
                 job->auth_tag_output_len_in_bytes = v->tag_size;
 
                 if (v->hash_mode == IMB_AUTH_HMAC_SHA_1) {
-                        /* compute IPAD and OPAD */
-                        unsigned j;
-
-                        IMB_ASSERT(sizeof(scratch) >= IMB_SHA1_BLOCK_SIZE);
-
-                        memset(scratch, 0x36, IMB_SHA1_BLOCK_SIZE);
-                        for (j = 0; j < v->hash_key_size; j++)
-                                scratch[j] ^= v->hash_key[j];
-                        IMB_SHA1_ONE_BLOCK(p_mgr, scratch, hmac_ipad);
-
-                        memset(scratch, 0x5c, IMB_SHA1_BLOCK_SIZE);
-                        for (j = 0; j < v->hash_key_size; j++)
-                                scratch[j] ^= v->hash_key[j];
-                        IMB_SHA1_ONE_BLOCK(p_mgr, scratch, hmac_opad);
-
+                        imb_ipad_opad_sha1(p_mgr, v->hash_key, v->hash_key_size,
+                                           hmac_ipad, hmac_opad);
                         job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
                         job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
                 }
diff --git a/test/acvp_app_main.c b/test/acvp_app_main.c
index cd1b55a7..11adca90 100644
--- a/test/acvp_app_main.c
+++ b/test/acvp_app_main.c
@@ -665,39 +665,15 @@ static int hmac_sha1_handler(ACVP_TEST_CASE *test_case)
 {
         ACVP_HMAC_TC *tc;
         IMB_JOB *job = NULL;
-        uint32_t i = 0;
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
-        uint8_t key[IMB_SHA1_BLOCK_SIZE];
-        uint8_t buf[IMB_SHA1_BLOCK_SIZE];
-        uint32_t key_len = 0;
 
         if (test_case == NULL)
                 return EXIT_FAILURE;
 
         tc = test_case->tc.hmac;
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (tc->key_len <= IMB_SHA1_BLOCK_SIZE) {
-                memcpy(key, tc->key, tc->key_len);
-                key_len = (uint32_t) tc->key_len;
-        } else {
-                IMB_SHA1(mb_mgr, tc->key, tc->key_len, key);
-                key_len = IMB_SHA1_DIGEST_SIZE_IN_BYTES;
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA1_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA1_ONE_BLOCK(mb_mgr, buf, opad_hash);
+        imb_ipad_opad_sha1(mb_mgr, tc->key, tc->key_len, ipad_hash, opad_hash);
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
         job->key_len_in_bytes = tc->key_len;
diff --git a/test/chained_test.c b/test/chained_test.c
index bd355553..c403c04b 100644
--- a/test/chained_test.c
+++ b/test/chained_test.c
@@ -380,29 +380,14 @@ test_chained_vectors(struct IMB_MGR *mb_mgr,
                      const int vec_cnt,
                      const struct chained_vector *vec_tab, const char *banner,
                      const IMB_CIPHER_MODE cipher,
-                     const IMB_HASH_ALG hash,
-                     unsigned hash_block_size, int num_jobs)
+                     const IMB_HASH_ALG hash, int num_jobs)
 {
         int vect;
         DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
         DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
-        uint8_t *buf = NULL;
-        uint8_t *hash_key = NULL;
         DECLARE_ALIGNED(uint8_t ipad_hash[128], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[128], 16);
-        unsigned hash_key_len, i;
-
-        buf = malloc(hash_block_size);
-        if (buf == NULL) {
-                fprintf(stderr, "Can't allocate buffer memory\n");
-                goto exit;
-        }
-
-        hash_key = malloc(hash_block_size);
-        if (hash_key == NULL) {
-                fprintf(stderr, "Can't allocate key memory\n");
-                goto exit;
-        }
+        unsigned i;
 
         printf("%s (N jobs = %d):\n", banner, num_jobs);
         for (vect = 0; vect < vec_cnt; vect++) {
@@ -430,29 +415,9 @@ test_chained_vectors(struct IMB_MGR *mb_mgr,
                         break;
                 }
 
-                /* prepare the hash key */
-                memset(hash_key, 0, hash_block_size);
-                if (vec_tab[vect].hash_key_len <= hash_block_size) {
-                        memcpy(hash_key, vec_tab[vect].hash_key,
-                               vec_tab[vect].hash_key_len);
-                        hash_key_len = (int) vec_tab[vect].hash_key_len;
-                } else {
-                        IMB_SHA1(mb_mgr, vec_tab[vect].hash_key,
-                                 vec_tab[vect].hash_key_len, hash_key);
-                        hash_key_len = hash_block_size;
-                }
-
-                /* compute ipad hash */
-                memset(buf, 0x36, hash_block_size);
-                for (i = 0; i < hash_key_len; i++)
-                        buf[i] ^= hash_key[i];
-                IMB_SHA1_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-
-                /* compute opad hash */
-                memset(buf, 0x5c, hash_block_size);
-                for (i = 0; i < hash_key_len; i++)
-                        buf[i] ^= hash_key[i];
-                IMB_SHA1_ONE_BLOCK(mb_mgr, buf, opad_hash);
+                imb_ipad_opad_sha1(mb_mgr, vec_tab[vect].cipher_key,
+                                   vec_tab[vect].cipher_key_len,
+                                   ipad_hash, opad_hash);
 
                 for (i = 0; i < DIM(test_sets); i++) {
                         unsigned in_place;
@@ -478,10 +443,6 @@ test_chained_vectors(struct IMB_MGR *mb_mgr,
                 }
         }
         printf("\n");
-
-exit:
-        free(buf);
-        free(hash_key);
 }
 
 int
@@ -501,7 +462,7 @@ chained_test(struct IMB_MGR *mb_mgr)
                                      chained_vectors,
                                      "AES-CBC + SHA1-HMAC standard test vectors",
                                      IMB_CIPHER_CBC, IMB_AUTH_HMAC_SHA_1,
-                                     IMB_SHA1_BLOCK_SIZE, num_jobs_tab[i]);
+                                     num_jobs_tab[i]);
 
         errors += test_suite_end(&ctx);
 
diff --git a/test/hmac_sha1_test.c b/test/hmac_sha1_test.c
index bd800f66..891de45d 100644
--- a/test/hmac_sha1_test.c
+++ b/test/hmac_sha1_test.c
@@ -36,10 +36,8 @@
 
 int hmac_sha1_test(struct IMB_MGR *mb_mgr);
 
-#define block_size    64
-#define digest_size   20
-#define digest96_size 12
-#define max_burst_jobs 32
+#define DIGEST96_SIZE 12
+#define MAX_BURST_JOBS 32
 
 /*
  * Test vectors from https://tools.ietf.org/html/rfc2202
@@ -56,7 +54,7 @@ int hmac_sha1_test(struct IMB_MGR *mb_mgr);
 #define test_case1  "1"
 #define key_len1    20
 #define data_len1   8
-#define digest_len1 digest_size
+#define digest_len1 IMB_SHA1_DIGEST_SIZE_IN_BYTES
 static const uint8_t key1[key_len1] = {
         0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
         0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
@@ -80,7 +78,7 @@ static const uint8_t digest1[digest_len1] = {
 #define test_case2  "2"
 #define key_len2    4
 #define data_len2   28
-#define digest_len2 digest_size
+#define digest_len2 IMB_SHA1_DIGEST_SIZE_IN_BYTES
 static const char key2[] = "Jefe";
 static const char data2[] = "what do ya want for nothing?";
 static const uint8_t digest2[digest_len2] = {
@@ -100,7 +98,7 @@ static const uint8_t digest2[digest_len2] = {
 #define test_case3  "3"
 #define key_len3    20
 #define data_len3   50
-#define digest_len3 digest_size
+#define digest_len3 IMB_SHA1_DIGEST_SIZE_IN_BYTES
 static const uint8_t key3[key_len3] = {
         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
@@ -132,7 +130,7 @@ static const uint8_t digest3[digest_len3] = {
 #define test_case4  "4"
 #define key_len4    25
 #define data_len4   50
-#define digest_len4 digest_size
+#define digest_len4 IMB_SHA1_DIGEST_SIZE_IN_BYTES
 static const uint8_t key4[key_len4] = {
         0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
         0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10,
@@ -166,7 +164,7 @@ static const uint8_t digest4[digest_len4] = {
 #define test_case5  "5"
 #define key_len5    20
 #define data_len5   20
-#define digest_len5 digest_size
+#define digest_len5 IMB_SHA1_DIGEST_SIZE_IN_BYTES
 static const uint8_t key5[key_len5] = {
         0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
         0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
@@ -182,7 +180,7 @@ static const uint8_t digest5[digest_len5] = {
 #define test_case5_96  "5-96"
 #define key_len5_96    key_len5
 #define data_len5_96   data_len5
-#define digest_len5_96 digest96_size
+#define digest_len5_96 DIGEST96_SIZE
 #define key5_96 key5
 #define data5_96 data5
 static const uint8_t digest5_96[digest_len5_96] = {
@@ -201,7 +199,7 @@ static const uint8_t digest5_96[digest_len5_96] = {
 #define test_case6  "6"
 #define key_len6    80
 #define data_len6   54
-#define digest_len6 digest_size
+#define digest_len6 IMB_SHA1_DIGEST_SIZE_IN_BYTES
 static const uint8_t key6[key_len6] = {
         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
@@ -234,7 +232,7 @@ static const uint8_t digest6[digest_len6] = {
 #define test_case7  "7"
 #define key_len7    80
 #define data_len7   73
-#define digest_len7 digest_size
+#define digest_len7 IMB_SHA1_DIGEST_SIZE_IN_BYTES
 static const uint8_t key7[key_len7] = {
         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
@@ -263,7 +261,7 @@ static const uint8_t digest7[digest_len7] = {
 #define test_case8  "8"
 #define key_len8    49
 #define data_len8   9
-#define digest_len8 digest96_size
+#define digest_len8 DIGEST96_SIZE
 static const uint8_t key8[key_len8] = {
         0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
         0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
@@ -288,7 +286,7 @@ static const uint8_t digest8[digest_len8] = {
 static const struct hmac_sha1_rfc2202_vector {
         const char *test_case;
         const uint8_t *key;
-        size_t key_len;
+        uint32_t key_len;
         const uint8_t *data;
         size_t data_len;
         const uint8_t *digest;
@@ -355,11 +353,8 @@ test_hmac_sha1(struct IMB_MGR *mb_mgr,
         uint8_t **auths = malloc(num_jobs * sizeof(void *));
         uint32_t i = 0, jobs_rx = 0;
         int ret = -1;
-        uint8_t key[block_size];
-        uint8_t buf[block_size];
-        DECLARE_ALIGNED(uint8_t ipad_hash[digest_size], 16);
-        DECLARE_ALIGNED(uint8_t opad_hash[digest_size], 16);
-        uint32_t key_len = 0;
+        DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
+        DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
 
         if (auths == NULL) {
 		fprintf(stderr, "Can't allocate buffer memory\n");
@@ -381,31 +376,8 @@ test_hmac_sha1(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (vec->key_len <= block_size) {
-                memcpy(key, vec->key, vec->key_len);
-                key_len = (int) vec->key_len;
-        } else {
-                IMB_SHA1(mb_mgr, vec->key, vec->key_len, key);
-                key_len = digest_size;
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA1_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA1_ONE_BLOCK(mb_mgr, buf, opad_hash);
-
-        /* empty the manager */
-        while (IMB_FLUSH_JOB(mb_mgr) != NULL)
-                ;
+        imb_ipad_opad_sha1(mb_mgr, vec->key, vec->key_len,
+                           ipad_hash, opad_hash);
 
         for (i = 0; i < num_jobs; i++) {
                 job = IMB_GET_NEXT_JOB(mb_mgr);
@@ -484,16 +456,14 @@ test_hmac_sha1_burst(struct IMB_MGR *mb_mgr,
                      const struct hmac_sha1_rfc2202_vector *vec,
                      const uint32_t num_jobs)
 {
-        struct IMB_JOB *job, *jobs[max_burst_jobs] = {NULL};
+        struct IMB_JOB *job, *jobs[MAX_BURST_JOBS] = {NULL};
         uint8_t padding[16];
         uint8_t **auths = malloc(num_jobs * sizeof(void *));
         uint32_t i = 0, jobs_rx = 0;
         int ret = -1, err;
-        uint8_t key[block_size];
-        uint8_t buf[block_size];
-        DECLARE_ALIGNED(uint8_t ipad_hash[digest_size], 16);
-        DECLARE_ALIGNED(uint8_t opad_hash[digest_size], 16);
-        uint32_t completed_jobs = 0, key_len = 0;
+        DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
+        DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
+        uint32_t completed_jobs = 0;
 
         if (auths == NULL) {
 		fprintf(stderr, "Can't allocate buffer memory\n");
@@ -515,27 +485,8 @@ test_hmac_sha1_burst(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (vec->key_len <= block_size) {
-                memcpy(key, vec->key, vec->key_len);
-                key_len = (int) vec->key_len;
-        } else {
-                IMB_SHA1(mb_mgr, vec->key, vec->key_len, key);
-                key_len = digest_size;
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA1_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA1_ONE_BLOCK(mb_mgr, buf, opad_hash);
+        imb_ipad_opad_sha1(mb_mgr, vec->key, vec->key_len,
+                           ipad_hash, opad_hash);
 
         while (IMB_GET_NEXT_BURST(mb_mgr, num_jobs, jobs) < num_jobs)
                 IMB_FLUSH_BURST(mb_mgr, num_jobs, jobs);
@@ -621,16 +572,14 @@ test_hmac_sha1_hash_burst(struct IMB_MGR *mb_mgr,
                           const struct hmac_sha1_rfc2202_vector *vec,
                           const uint32_t num_jobs)
 {
-        struct IMB_JOB *job, jobs[max_burst_jobs] = {0};
+        struct IMB_JOB *job, jobs[MAX_BURST_JOBS] = {0};
         uint8_t padding[16];
         uint8_t **auths = malloc(num_jobs * sizeof(void *));
         uint32_t i = 0, jobs_rx = 0;
         int ret = -1;
-        uint8_t key[block_size];
-        uint8_t buf[block_size];
-        DECLARE_ALIGNED(uint8_t ipad_hash[digest_size], 16);
-        DECLARE_ALIGNED(uint8_t opad_hash[digest_size], 16);
-        uint32_t completed_jobs = 0, key_len = 0;
+        DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
+        DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
+        uint32_t completed_jobs = 0;
 
         if (auths == NULL) {
 		fprintf(stderr, "Can't allocate buffer memory\n");
@@ -652,27 +601,8 @@ test_hmac_sha1_hash_burst(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (vec->key_len <= block_size) {
-                memcpy(key, vec->key, vec->key_len);
-                key_len = (int) vec->key_len;
-        } else {
-                IMB_SHA1(mb_mgr, vec->key, vec->key_len, key);
-                key_len = digest_size;
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA1_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA1_ONE_BLOCK(mb_mgr, buf, opad_hash);
+        imb_ipad_opad_sha1(mb_mgr, vec->key, vec->key_len,
+                           ipad_hash, opad_hash);
 
         for (i = 0; i < num_jobs; i++) {
                 job = &jobs[i];
@@ -804,7 +734,7 @@ hmac_sha1_test(struct IMB_MGR *mb_mgr)
         uint32_t num_jobs;
 
         test_suite_start(&ts, "HMAC-SHA1");
-        for (num_jobs = 1; num_jobs <= max_burst_jobs; num_jobs++)
+        for (num_jobs = 1; num_jobs <= MAX_BURST_JOBS; num_jobs++)
                 test_hmac_sha1_std_vectors(mb_mgr, num_jobs, &ts);
         errors = test_suite_end(&ts);
 
diff --git a/test/ipsec_xvalid.c b/test/ipsec_xvalid.c
index 0e32f646..9dcab82d 100644
--- a/test/ipsec_xvalid.c
+++ b/test/ipsec_xvalid.c
@@ -1371,18 +1371,8 @@ prepare_keys(IMB_MGR *mb_mgr, struct cipher_auth_keys *keys,
                 IMB_AES_CMAC_SUBKEY_GEN_256(mb_mgr, k1_expanded, k2, k3);
                 break;
         case IMB_AUTH_HMAC_SHA_1:
-                /* compute ipad hash */
-                nosimd_memset(buf, 0x36, IMB_SHA1_BLOCK_SIZE);
-                for (i = 0; i < IMB_SHA1_BLOCK_SIZE; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_SHA1_ONE_BLOCK(mb_mgr, buf, ipad);
-
-                /* compute opad hash */
-                nosimd_memset(buf, 0x5c, IMB_SHA1_BLOCK_SIZE);
-                for (i = 0; i < IMB_SHA1_BLOCK_SIZE; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_SHA1_ONE_BLOCK(mb_mgr, buf, opad);
-
+                imb_ipad_opad_sha1(mb_mgr, auth_key,
+                                   MAX_KEY_SIZE, ipad, opad);
                 break;
         case IMB_AUTH_HMAC_SHA_224:
                 /* compute ipad hash */
diff --git a/test/wycheproof/wycheproof.c b/test/wycheproof/wycheproof.c
index 790fc6e6..1ebf27fc 100644
--- a/test/wycheproof/wycheproof.c
+++ b/test/wycheproof/wycheproof.c
@@ -388,16 +388,12 @@ static int test_hmac_sha1(IMB_MGR *p_mgr)
         const struct mac_test *v = hmac_sha1_test_json;
         DECLARE_ALIGNED(uint8_t hmac_ipad[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t hmac_opad[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
-        uint8_t scratch[IMB_SHA1_BLOCK_SIZE];
-        uint8_t key[IMB_SHA1_DIGEST_SIZE_IN_BYTES];
         uint8_t tag[IMB_SHA1_DIGEST_SIZE_IN_BYTES];
 
         while (IMB_FLUSH_JOB(p_mgr) != NULL)
                 ;
 
         for ( ; v->msg != NULL; v++, run_vectors++) {
-                const void *key_ptr = NULL;
-                size_t key_size = 0;
 
                 IMB_ASSERT((v->tagSize / 8) <= sizeof(tag));
 
@@ -435,22 +431,7 @@ static int test_hmac_sha1(IMB_MGR *p_mgr)
                 else
                         job->auth_tag_output_len_in_bytes = v->tagSize / 8;
 
-                /* prepare key */
-                if ((v->keySize / 8) <= IMB_SHA1_BLOCK_SIZE) {
-                        key_ptr = v->key;
-                        key_size = v->keySize / 8;
-                } else {
-                        IMB_SHA1(p_mgr, v->key, v->keySize / 8, key);
-                        key_ptr = key;
-                        key_size = IMB_SHA1_DIGEST_SIZE_IN_BYTES;
-                }
-
-                /* compute IPAD and OPAD */
-                prep_iopad(sizeof(scratch), scratch, key_size, key_ptr, 0x36);
-                IMB_SHA1_ONE_BLOCK(p_mgr, scratch, hmac_ipad);
-
-                prep_iopad(sizeof(scratch), scratch, key_size, key_ptr, 0x5c);
-                IMB_SHA1_ONE_BLOCK(p_mgr, scratch, hmac_opad);
+                imb_ipad_opad_sha1(p_mgr, v->key, v->keySize / 8, hmac_ipad, hmac_opad);
 
                 job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
                 job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
-- 
GitLab


From f923561b4fbd458a28d9beb825dbbf1a9a37583e Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Thu, 23 Feb 2023 16:37:36 +0000
Subject: [PATCH 092/332] lib: [ECB] cet fixes for ecb quic

---
 lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm | 4 ++++
 lib/avx_t1/aes_ecb_quic_x8_avx.asm         | 7 ++++---
 lib/sse_t1/aes_ecb_quic_x8_sse.asm         | 7 ++++---
 3 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm b/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm
index a50b46bd..bf82290e 100644
--- a/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm
@@ -44,6 +44,7 @@
 %include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/aes_common.inc"
+%include "include/cet.inc"
 
 %define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_vaes_avx512
 %define AES_ECB_QUIC_ENC_192 aes_ecb_quic_enc_192_vaes_avx512
@@ -280,18 +281,21 @@ align 16
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_128,function,internal)
 AES_ECB_QUIC_ENC_128:
+        endbranch64
         AES_ECB_QUIC 10
         ret
 
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_192,function,internal)
 AES_ECB_QUIC_ENC_192:
+        endbranch64
         AES_ECB_QUIC 12
         ret
 
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_256,function,internal)
 AES_ECB_QUIC_ENC_256:
+        endbranch64
         AES_ECB_QUIC 14
         ret
 
diff --git a/lib/avx_t1/aes_ecb_quic_x8_avx.asm b/lib/avx_t1/aes_ecb_quic_x8_avx.asm
index d5060b6f..3939abe7 100644
--- a/lib/avx_t1/aes_ecb_quic_x8_avx.asm
+++ b/lib/avx_t1/aes_ecb_quic_x8_avx.asm
@@ -44,6 +44,7 @@
 %include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/aes_common.inc"
+%include "include/cet.inc"
 
 %define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_avx
 %define AES_ECB_QUIC_ENC_192 aes_ecb_quic_enc_192_avx
@@ -227,19 +228,19 @@ align 16
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_128,function,internal)
 AES_ECB_QUIC_ENC_128:
-
+        endbranch64
         AES_ECB_QUIC 10
 
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_192,function,internal)
 AES_ECB_QUIC_ENC_192:
-
+        endbranch64
         AES_ECB_QUIC 12
 
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_256,function,internal)
 AES_ECB_QUIC_ENC_256:
-
+        endbranch64
         AES_ECB_QUIC 14
 
 mksection stack-noexec
diff --git a/lib/sse_t1/aes_ecb_quic_x8_sse.asm b/lib/sse_t1/aes_ecb_quic_x8_sse.asm
index 23af814e..b2f79a0b 100644
--- a/lib/sse_t1/aes_ecb_quic_x8_sse.asm
+++ b/lib/sse_t1/aes_ecb_quic_x8_sse.asm
@@ -44,6 +44,7 @@
 %include "include/os.inc"
 %include "include/clear_regs.inc"
 %include "include/aes_common.inc"
+%include "include/cet.inc"
 
 %ifndef AES_ECB_QUIC_ENC_128
 %define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_sse
@@ -230,7 +231,7 @@ align 16
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_128,function,internal)
 AES_ECB_QUIC_ENC_128:
-
+        endbranch64
         AES_ECB_QUIC 10
 
 %endif
@@ -239,7 +240,7 @@ AES_ECB_QUIC_ENC_128:
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_192,function,internal)
 AES_ECB_QUIC_ENC_192:
-
+        endbranch64
         AES_ECB_QUIC 12
 
 %endif
@@ -248,7 +249,7 @@ AES_ECB_QUIC_ENC_192:
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_256,function,internal)
 AES_ECB_QUIC_ENC_256:
-
+        endbranch64
         AES_ECB_QUIC 14
 
 %endif
-- 
GitLab


From 39ef84685a7911ba125cbc2be5f313bcc3d3ded3 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Thu, 23 Feb 2023 15:10:43 +0000
Subject: [PATCH 093/332] test: [fuzz] fuzz chacha poly1305 direct api

---
 test/direct_api_fuzz_test.c | 47 +++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/test/direct_api_fuzz_test.c b/test/direct_api_fuzz_test.c
index 64f4738d..4211d107 100644
--- a/test/direct_api_fuzz_test.c
+++ b/test/direct_api_fuzz_test.c
@@ -655,6 +655,51 @@ static void test_zuc_eia3_n_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_ZUC_EIA3_N_BUFFER(p_mgr, key, iv, in, len, tag, count);
 }
 
+static void test_chacha_poly_enc(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if (dataSize < sizeof(struct chacha20_poly1305_context_data))
+                return;
+
+        struct chacha20_poly1305_context_data *ctx =
+                (struct chacha20_poly1305_context_data *)buff;
+        const void *key = buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = dataSize;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_CHACHA20_POLY1305_INIT(p_mgr, key, ctx, iv, aad, aad_len);
+        IMB_CHACHA20_POLY1305_ENC_UPDATE(p_mgr, key, ctx, out, in, len);
+        IMB_CHACHA20_POLY1305_ENC_FINALIZE(p_mgr, ctx, auth_tag, tag_len);
+}
+
+static void test_chacha_poly_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        if (dataSize < sizeof(struct chacha20_poly1305_context_data))
+                return;
+
+        struct chacha20_poly1305_context_data *ctx =
+                (struct chacha20_poly1305_context_data *)buff;
+        const void *key = buff;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+        uint64_t len = dataSize;
+        const uint8_t *iv = buff;
+        const uint8_t *aad = buff;
+        uint64_t aad_len = dataSize;
+        uint8_t *auth_tag = buff;
+        uint64_t tag_len = (uint64_t) *buff;
+
+        IMB_CHACHA20_POLY1305_INIT(p_mgr, key, ctx, iv, aad, aad_len);
+        IMB_CHACHA20_POLY1305_DEC_UPDATE(p_mgr, key, ctx, out, in, len);
+        IMB_CHACHA20_POLY1305_DEC_FINALIZE(p_mgr, ctx, auth_tag, tag_len);
+}
+
+
 struct {
         void (*func)(IMB_MGR *mb_mgr, uint8_t *buff, size_t dataSize);
         const char *func_name;
@@ -686,6 +731,8 @@ struct {
         {test_zuc_eea3_n_buff, "test_zuc_eea3_n_buff"},
         {test_zuc_eia3_1_buff, "test_zuc_eia3_1_buff"},
         {test_zuc_eia3_n_buff, "test_zuc_eia3_n_buff"},
+        {test_chacha_poly_enc, "test_chacha_poly_enc"},
+        {test_chacha_poly_dec, "test_chacha_poly_dec"},
 };
 
 int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
-- 
GitLab


From 4229a28c2b1453fc8851c5b5f2551d83c35a0459 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 13:48:50 +0000
Subject: [PATCH 094/332] test: parse arguments first then print details (tool
 version added)

---
 test/main.c | 35 ++++++++++++++++++++++-------------
 1 file changed, 22 insertions(+), 13 deletions(-)

diff --git a/test/main.c b/test/main.c
index 14bd65de..74ff258b 100644
--- a/test/main.c
+++ b/test/main.c
@@ -356,31 +356,21 @@ int
 main(int argc, char **argv)
 {
         uint8_t arch_support[IMB_ARCH_NUM];
+        uint8_t arch_select[IMB_ARCH_NUM];
         int i, atype, auto_detect = 0;
         uint64_t flags = 0;
         int errors = 0;
         unsigned int stop_on_fail = 0;
         const uint64_t feat_flags = imb_get_feature_flags();
 
-        /* Check version number */
-        if (imb_get_version() < IMB_VERSION(0, 50, 0))
-                printf("Library version detection unsupported!\n");
-        else
-                printf("Detected library version: %s\n", imb_get_version_str());
-
-        /* Print available CPU features */
-        print_hw_features();
-
-        /* Detect available architectures and features */
-        if (detect_arch(arch_support) < 0)
-                return EXIT_FAILURE;
+        memset(arch_select, 0xff, sizeof(arch_select));
 
 	for (i = 1; i < argc; i++) {
 		if (strcmp(argv[i], "-h") == 0) {
 			usage(argv[0]);
 			return EXIT_SUCCESS;
 		} else if (update_flags_and_archs(argv[i],
-                                                  arch_support,
+                                                  arch_select,
                                                   &flags))
 			continue;
 		else if (strcmp(argv[i], "--auto-detect") == 0)
@@ -407,6 +397,25 @@ main(int argc, char **argv)
                 }
         }
 
+        /* Check version number */
+        if (imb_get_version() < IMB_VERSION(0, 50, 0)) {
+                printf("Library version detection unsupported!\n");
+        } else {
+                printf("Detected library version: %s\n", imb_get_version_str());
+                printf("Tool version: %s\n", IMB_VERSION_STR);
+        }
+
+        /* Print available CPU features */
+        print_hw_features();
+
+        /* Detect available architectures and features */
+        if (detect_arch(arch_support) < 0)
+                return EXIT_FAILURE;
+
+        /* Combine user arch selection with HW capabilities */
+        for (unsigned j = 0; j < DIM(arch_support); j++)
+                arch_support[j] = arch_support[j] & arch_select[j];
+
         /* Go through architectures */
         for (atype = IMB_ARCH_NOAESNI; atype < IMB_ARCH_NUM; atype++) {
                 IMB_MGR *p_mgr = NULL;
-- 
GitLab


From 0ca51eda0a60a2434f1074da722015848cc0abf8 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 13:50:29 +0000
Subject: [PATCH 095/332] test: accept -h and --help options and show available
 test types on the help page

---
 test/main.c | 47 ++++++++++++++++++++++++++++++++++++++++-------
 1 file changed, 40 insertions(+), 7 deletions(-)

diff --git a/test/main.c b/test/main.c
index 74ff258b..28cebf10 100644
--- a/test/main.c
+++ b/test/main.c
@@ -248,25 +248,57 @@ struct imb_test tests[] = {
         }
 };
 
+static char *get_test_types(void)
+{
+        const size_t separator_length = 2;
+        size_t buffer_sz = 1; /* 1 for NULL termination */
+
+        for (unsigned i = 0; i < DIM(tests); i++)
+                buffer_sz += strlen(tests[i].str) + separator_length;
+
+        char *ret_str = malloc(buffer_sz);
+
+        if (ret_str == NULL) {
+                fprintf(stderr, "Error allocating memory!\n");
+                exit(EXIT_FAILURE);
+        }
+
+        memset(ret_str, 0, buffer_sz);
+
+        for (unsigned i = 0; i < DIM(tests); i++) {
+                if (i != 0)
+                        strcat(ret_str, ", ");
+
+                strcat(ret_str, tests[i].str);
+        }
+
+        return ret_str;
+}
+
 static void
 usage(const char *name)
 {
+        char *test_types = get_test_types();
+
 	fprintf(stderr,
                 "Usage: %s [args], where args are zero or more\n"
-                "--test-type TEST_NAME : Run single test type\n"
+                "--help: Prints this page\n"
+                "--test-type <TEST_NAME>: Run selected test type. <TEST_NAME> is one of %s.\n"
                 "--stop-on-fail: Stop test execution if a test fails\n"
                 "--no-aesni-emu: Don't do AESNI emulation\n"
                 "--no-avx512: Don't do AVX512\n"
 		"--no-avx2: Don't do AVX2\n"
 		"--no-avx: Don't do AVX\n"
 		"--no-sse: Don't do SSE\n"
-                "--auto-detect: auto detects current architecture "
+                "--auto-detect: Auto detects current architecture "
                 "to run the tests\n  Note: Auto detection "
                 "option now run by default and will be removed in the future\n"
-                "--gfni-on: use Galois Field extensions, default: auto-detect\n"
-                "--gfni-off: don't use Galois Field extensions\n"
-		"--shani-on: use SHA extensions, default: auto-detect\n"
-		"--shani-off: don't use SHA extensions\n", name);
+                "--gfni-on: Use Galois Field extensions, default: auto-detect\n"
+                "--gfni-off: Don't use Galois Field extensions\n"
+		"--shani-on: Use SHA extensions, default: auto-detect\n"
+		"--shani-off: Don't use SHA extensions\n", name, test_types);
+
+        free(test_types);
 }
 
 static void
@@ -366,7 +398,8 @@ main(int argc, char **argv)
         memset(arch_select, 0xff, sizeof(arch_select));
 
 	for (i = 1; i < argc; i++) {
-		if (strcmp(argv[i], "-h") == 0) {
+		if (strcmp(argv[i], "-h") == 0 ||
+                    strcmp(argv[i], "--help") == 0) {
 			usage(argv[0]);
 			return EXIT_SUCCESS;
 		} else if (update_flags_and_archs(argv[i],
-- 
GitLab


From 082ff3824fb324a7f7480f7897f1f86473fde7d9 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 13:52:42 +0000
Subject: [PATCH 096/332] test: change parsing test type argument to re-use
 get_test_types() function

---
 test/main.c | 27 ++++++++++++---------------
 1 file changed, 12 insertions(+), 15 deletions(-)

diff --git a/test/main.c b/test/main.c
index 28cebf10..2d1cc4bb 100644
--- a/test/main.c
+++ b/test/main.c
@@ -351,24 +351,21 @@ print_hw_features(void)
 static unsigned
 check_test_string_arg(const char *param, const char *arg)
 {
-        unsigned test_idx;
+        if (arg != NULL) {
+                for (unsigned test_idx = 0; test_idx < DIM(tests); test_idx++)
+                        if (strcasecmp(arg, tests[test_idx].str) == 0)
+                                return test_idx;
 
-        if (arg == NULL) {
-                fprintf(stderr, "%s requires an argument\n", param);
-                goto exit;
+                /* Argument is not listed in the available options */
+                fprintf(stderr, "Invalid test type \"%s\"\n", arg);
+        } else {
+                fprintf(stderr, "%s requires test type argument\n", param);
         }
 
-        for (test_idx = 0; test_idx < DIM(tests); test_idx++)
-                if (strcasecmp(arg, tests[test_idx].str) == 0)
-                        return test_idx;
-
-        /* Argument is not listed in the available options */
-        fprintf(stderr, "Invalid argument for %s\n", param);
-exit:
-        fprintf(stderr, "Accepted arguments: ");
-        for (test_idx = 0; test_idx < DIM(tests); test_idx++)
-                fprintf(stderr, "%s ", tests[test_idx].str);
-        fprintf(stderr, "\n");
+        char *test_types = get_test_types();
+
+        fprintf(stderr, "Accepted test types: %s\n", test_types);
+        free(test_types);
 
         return DIM(tests);
 }
-- 
GitLab


From ea281504583f5308c2bacd1e3919e1ec8337b5c8 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:43:26 +0000
Subject: [PATCH 097/332] test: [utils] add quiet_mode flag

---
 test/utils.c | 6 ++++++
 test/utils.h | 2 ++
 2 files changed, 8 insertions(+)

diff --git a/test/utils.c b/test/utils.c
index 95e6a383..16b81640 100644
--- a/test/utils.c
+++ b/test/utils.c
@@ -35,6 +35,12 @@
 #include "utils.h"
 #include <intel-ipsec-mb.h>
 
+/**
+ * If not zero then modules need to limit amount of printed information
+ * (even in debug compilation mode).
+ */
+int quiet_mode = 0;
+
 /**
  * @brief Simplistic memory copy (intentionally not using libc)
  *
diff --git a/test/utils.h b/test/utils.h
index 84a89349..270d8147 100644
--- a/test/utils.h
+++ b/test/utils.h
@@ -34,6 +34,8 @@
 #define DIM(_x) (sizeof(_x)/sizeof(_x[0]))
 #define DIV_ROUND_UP(x, y) ((x + y - 1) / y)
 
+extern int quiet_mode;
+
 void hexdump(FILE *fp, const char *msg, const void *p, size_t len);
 void hexdump_ex(FILE *fp, const char *msg, const void *p, size_t len,
                 const void *start_ptr);
-- 
GitLab


From f83b958071477fd35f224f5ef320144b86836975 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:44:57 +0000
Subject: [PATCH 098/332] test: add support --quiet option to the test
 application

---
 test/main.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/test/main.c b/test/main.c
index 2d1cc4bb..a28d8e94 100644
--- a/test/main.c
+++ b/test/main.c
@@ -296,7 +296,9 @@ usage(const char *name)
                 "--gfni-on: Use Galois Field extensions, default: auto-detect\n"
                 "--gfni-off: Don't use Galois Field extensions\n"
 		"--shani-on: Use SHA extensions, default: auto-detect\n"
-		"--shani-off: Don't use SHA extensions\n", name, test_types);
+		"--shani-off: Don't use SHA extensions\n"
+		"--quiet: Enable quiet mode with reduced text output\n",
+                name, test_types);
 
         free(test_types);
 }
@@ -407,6 +409,8 @@ main(int argc, char **argv)
                         (void) auto_detect; /* legacy option - to be removed */
 		else if (strcmp(argv[i], "--stop-on-fail") == 0)
                         stop_on_fail = 1;
+		else if (strcmp(argv[i], "--quiet") == 0)
+                        quiet_mode = 1;
                 else if (strcmp(argv[i], "--test-type") == 0) {
                         unsigned selected_test;
 
-- 
GitLab


From 5f7707a7808c80b7b84150834b7995846dca0a4e Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:45:51 +0000
Subject: [PATCH 099/332] test: [style] extend line width from 80 to 100
 characters

---
 test/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/Makefile b/test/Makefile
index 3ea6a7e8..9b9618a1 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -197,7 +197,7 @@ clean:
 
 # style check section
 CHECKPATCH?=checkpatch.pl
-CHECKPATCH_FLAGS = --no-tree --no-signoff --emacs --no-color --ignore CODE_INDENT,INITIALISED_STATIC,LEADING_SPACE,SPLIT_STRING,UNSPECIFIED_INT,ARRAY_SIZE,BLOCK_COMMENT_STYLE,GLOBAL_INITIALISERS,AVOID_EXTERNS,COMPLEX_MACRO,USE_FUNC,CONSTANT_COMPARISON,MISSING_SPACE,NEW_TYPEDEFS
+CHECKPATCH_FLAGS = --no-tree --no-signoff --emacs --no-color --max-line-length=100 --ignore CODE_INDENT,INITIALISED_STATIC,LEADING_SPACE,SPLIT_STRING,UNSPECIFIED_INT,ARRAY_SIZE,BLOCK_COMMENT_STYLE,GLOBAL_INITIALISERS,AVOID_EXTERNS,COMPLEX_MACRO,USE_FUNC,CONSTANT_COMPARISON,MISSING_SPACE,NEW_TYPEDEFS
 
 %.c_style_check : %.c
 	$(CHECKPATCH) $(CHECKPATCH_FLAGS) -f $<
-- 
GitLab


From b85242eeca51520713d023e7df0bfad4da8f0d51 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:48:42 +0000
Subject: [PATCH 100/332] test: [aes-cbcs] add support for quiet mode

---
 test/aes_cbcs_test.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/test/aes_cbcs_test.c b/test/aes_cbcs_test.c
index 176820e2..df704c37 100644
--- a/test/aes_cbcs_test.c
+++ b/test/aes_cbcs_test.c
@@ -3644,13 +3644,16 @@ test_aes_vectors(struct IMB_MGR *mb_mgr,
 
 	printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_cnt; vect++) {
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("[%d/%d] Standard vector key_len:%d\n",
-                       vect + 1, vec_cnt,
-                       (int) vec_tab[vect].Klen);
+                        printf("[%d/%d] Standard vector key_len:%d\n",
+                               vect + 1, vec_cnt,
+                               (int) vec_tab[vect].Klen);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
+
                 IMB_AES_KEYEXP_128(mb_mgr, vec_tab[vect].K, enc_keys,
                                            dec_keys);
 
@@ -3706,7 +3709,8 @@ test_aes_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From adcb3e1fa5fbd29ae7676c13bdbf2d10485d2537 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:49:04 +0000
Subject: [PATCH 101/332] test: [aes] add support for quiet mode

---
 test/aes_test.c | 54 ++++++++++++++++++++++++++++++++-----------------
 1 file changed, 36 insertions(+), 18 deletions(-)

diff --git a/test/aes_test.c b/test/aes_test.c
index 36a28f06..3df62246 100644
--- a/test/aes_test.c
+++ b/test/aes_test.c
@@ -2319,13 +2319,17 @@ test_aes_vectors(struct IMB_MGR *mb_mgr,
 	printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_cnt; vect++) {
                 struct test_suite_context *ctx;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("[%d/%d] Standard vector key_len:%d\n",
-                       vect + 1, vec_cnt,
-                       (int) vec_tab[vect].Klen);
+                        printf("[%d/%d] Standard vector key_len:%d\n",
+                               vect + 1, vec_cnt,
+                               (int) vec_tab[vect].Klen);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
+
                 switch (vec_tab[vect].Klen) {
                 case 16:
                         IMB_AES_KEYEXP_128(mb_mgr, vec_tab[vect].K, enc_keys,
@@ -2506,7 +2510,8 @@ test_aes_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 static int
@@ -2704,12 +2709,16 @@ test_docrc_vectors(struct IMB_MGR *mb_mgr,
 	printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_cnt; vect++) {
                 struct test_suite_context *ctx;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("[%d/%d] Standard vector\n",
-                       vect + 1, vec_cnt);
+                        printf("[%d/%d] Standard vector\n",
+                               vect + 1, vec_cnt);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
+
                 if (vec_tab[vect].key_len == 16) {
                         IMB_AES_KEYEXP_128(mb_mgr, vec_tab[vect].key, enc_keys,
                                            dec_keys);
@@ -2742,7 +2751,8 @@ test_docrc_vectors(struct IMB_MGR *mb_mgr,
                 }
 
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 static int
@@ -2758,10 +2768,13 @@ cfb_validate_ok(const uint8_t *output, const uint8_t *in_text,
                        (in_place) ? "in-place" : "out-of-place");
                 return 0;
         }
+
 #ifdef DEBUG
-        printf("Standard test vector %u %s %s\n", i + 1,
-               (in_place) ? "in-place" : "out-of-place",
-               (is_enc) ? "encrypt" : "decrypt");
+        if (!quiet_mode) {
+                printf("Standard test vector %u %s %s\n", i + 1,
+                       (in_place) ? "in-place" : "out-of-place",
+                       (is_enc) ? "encrypt" : "decrypt");
+        }
 #endif
         return 1;
 }
@@ -2852,14 +2865,18 @@ cfb_test_vectors(struct IMB_MGR *mb_mgr, struct test_suite_context *ctx128,
         printf("AES-CFB test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 0; vect < DIM(aes_cfb_tab); vect++) {
                 struct test_suite_context *ctx;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("[%d/%lu] Standard %s-bit vector\n",
-                       vect + 1,
-                       (unsigned long) DIM(aes_cfb_tab),
-                       (aes_cfb_tab[vect].Klen == 16) ? "128":"256");
+                        printf("[%d/%lu] Standard %s-bit vector\n",
+                               vect + 1,
+                               (unsigned long) DIM(aes_cfb_tab),
+                               (aes_cfb_tab[vect].Klen == 16) ? "128" : "256");
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
+
                 if (aes_cfb_tab[vect].Klen == 16)
                         ctx = ctx128;
                 else
@@ -2869,7 +2886,8 @@ cfb_test_vectors(struct IMB_MGR *mb_mgr, struct test_suite_context *ctx128,
                 else
                         test_suite_update(ctx, 1, 0);
         }
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From eb3c744dbefaaea5b6a62db731587900f02641ba Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:50:39 +0000
Subject: [PATCH 102/332] test: [api] add support for quiet mode with
 re-indentation

---
 test/api_test.c | 364 +++++++++++++++++++++++++-----------------------
 1 file changed, 190 insertions(+), 174 deletions(-)

diff --git a/test/api_test.c b/test/api_test.c
index ab9d52a9..0d1c4479 100644
--- a/test/api_test.c
+++ b/test/api_test.c
@@ -4,12 +4,12 @@
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
 
-     * Redistributions of source code must retain the above copyright notice,
+ * Redistributions of source code must retain the above copyright notice,
        this list of conditions and the following disclaimer.
-     * Redistributions in binary form must reproduce the above copyright
+       * Redistributions in binary form must reproduce the above copyright
        notice, this list of conditions and the following disclaimer in the
        documentation and/or other materials provided with the distribution.
-     * Neither the name of Intel Corporation nor the names of its contributors
+       * Neither the name of Intel Corporation nor the names of its contributors
        may be used to endorse or promote products derived from this software
        without specific prior written permission.
 
@@ -43,38 +43,44 @@
 int api_test(struct IMB_MGR *mb_mgr);
 
 enum {
-      TEST_UNEXPECTED_JOB = 1,
-      TEST_INVALID_JOB,
-      TEST_INVALID_BURST,
-      TEST_AUTH_SRC_NULL = 100,
-      TEST_AUTH_AUTH_TAG_OUTPUT_NULL,
-      TEST_AUTH_TAG_OUTPUT_LEN_ZERO,
-      TEST_AUTH_MSG_LEN_ZERO,
-      TEST_AUTH_MSG_LEN_GT_MAX,
-      TEST_AUTH_IV_LEN,
-      TEST_AUTH_NULL_HMAC_OPAD,
-      TEST_AUTH_NULL_HMAC_IPAD,
-      TEST_AUTH_NULL_XCBC_K1_EXP,
-      TEST_AUTH_NULL_XCBC_K2,
-      TEST_AUTH_NULL_XCBC_K3,
-      TEST_AUTH_NULL_GHASH_KEY,
-      TEST_AUTH_NULL_GHASH_INIT_TAG,
-      TEST_AUTH_NULL_GMAC_KEY,
-      TEST_AUTH_NULL_GMAC_IV,
-      TEST_AUTH_GMAC_IV_LEN,
-      TEST_CIPH_SRC_NULL = 200,
-      TEST_CIPH_DST_NULL,
-      TEST_CIPH_IV_NULL,
-      TEST_CIPH_ENC_KEY_NULL,
-      TEST_CIPH_DEC_KEY_NULL,
-      TEST_CIPH_MSG_LEN_ZERO,
-      TEST_CIPH_MSG_LEN_GT_MAX,
-      TEST_CIPH_NEXT_IV_NULL,
-      TEST_CIPH_IV_LEN,
-      TEST_CIPH_DIR,
-      TEST_INVALID_PON_PLI = 300,
+        TEST_UNEXPECTED_JOB = 1,
+        TEST_INVALID_JOB,
+        TEST_INVALID_BURST,
+        TEST_AUTH_SRC_NULL = 100,
+        TEST_AUTH_AUTH_TAG_OUTPUT_NULL,
+        TEST_AUTH_TAG_OUTPUT_LEN_ZERO,
+        TEST_AUTH_MSG_LEN_ZERO,
+        TEST_AUTH_MSG_LEN_GT_MAX,
+        TEST_AUTH_IV_LEN,
+        TEST_AUTH_NULL_HMAC_OPAD,
+        TEST_AUTH_NULL_HMAC_IPAD,
+        TEST_AUTH_NULL_XCBC_K1_EXP,
+        TEST_AUTH_NULL_XCBC_K2,
+        TEST_AUTH_NULL_XCBC_K3,
+        TEST_AUTH_NULL_GHASH_KEY,
+        TEST_AUTH_NULL_GHASH_INIT_TAG,
+        TEST_AUTH_NULL_GMAC_KEY,
+        TEST_AUTH_NULL_GMAC_IV,
+        TEST_AUTH_GMAC_IV_LEN,
+        TEST_CIPH_SRC_NULL = 200,
+        TEST_CIPH_DST_NULL,
+        TEST_CIPH_IV_NULL,
+        TEST_CIPH_ENC_KEY_NULL,
+        TEST_CIPH_DEC_KEY_NULL,
+        TEST_CIPH_MSG_LEN_ZERO,
+        TEST_CIPH_MSG_LEN_GT_MAX,
+        TEST_CIPH_NEXT_IV_NULL,
+        TEST_CIPH_IV_LEN,
+        TEST_CIPH_DIR,
+        TEST_INVALID_PON_PLI = 300,
 };
 
+static void print_progress(void)
+{
+        if (!quiet_mode)
+                printf(".");
+}
+
 /*
  * @brief Performs JOB API behavior tests
  */
@@ -93,14 +99,14 @@ test_job_api(struct IMB_MGR *mb_mgr)
                        __func__, TEST_UNEXPECTED_JOB);
                 return 1;
         }
-        printf(".");
+        print_progress();
         err = imb_get_errno(mb_mgr);
         if (err != 0) {
                 printf("%s: test %d, unexpected error: %s\n",
                        __func__, TEST_UNEXPECTED_JOB, imb_get_strerror(err));
                 return 1;
         }
-	printf(".");
+        print_progress();
 
         /* ======== test 2 : invalid cipher and mac */
         memset(job, 0, sizeof(*job));
@@ -111,14 +117,14 @@ test_job_api(struct IMB_MGR *mb_mgr)
                        __func__, TEST_INVALID_JOB);
                 return 1;
         }
-        printf(".");
+        print_progress();
         err = imb_get_errno(mb_mgr);
         if (err == 0) {
                 printf("%s: test %d, unexpected error: %s\n",
                        __func__, TEST_INVALID_JOB, imb_get_strerror(err));
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         if (job_next->status != IMB_STATUS_INVALID_ARGS) {
                 /* Invalid job is returned, and status should be INVALID_ARGS */
@@ -126,7 +132,7 @@ test_job_api(struct IMB_MGR *mb_mgr)
                        "IMB_STATUS_INVALID_ARGS\n", __func__, TEST_INVALID_JOB);
                 return 1;
         }
-	printf(".");
+        print_progress();
 
         job_next = IMB_GET_NEXT_JOB(mb_mgr);
         if (job == job_next) {
@@ -135,14 +141,14 @@ test_job_api(struct IMB_MGR *mb_mgr)
                        __func__, TEST_INVALID_JOB);
                 return 1;
         }
-	printf(".");
+        print_progress();
         err = imb_get_errno(mb_mgr);
         if (err != 0) {
                 printf("%s: test %d, unexpected error: %s\n",
                        __func__, TEST_INVALID_JOB, imb_get_strerror(err));
                 return 1;
         }
-	printf(".");
+        print_progress();
 
         job = IMB_GET_COMPLETED_JOB(mb_mgr);
         if (job) {
@@ -151,20 +157,21 @@ test_job_api(struct IMB_MGR *mb_mgr)
                        __func__, TEST_INVALID_JOB);
                 return 1;
         }
-        printf(".");
+        print_progress();
         err = imb_get_errno(mb_mgr);
         if (err != 0) {
                 printf("%s: test %d, unexpected error: %s\n",
                        __func__, TEST_INVALID_JOB, imb_get_strerror(err));
                 return 1;
         }
-	printf(".");
+        print_progress();
 
         /* clean up */
         while (IMB_FLUSH_JOB(mb_mgr) != NULL)
                 ;
 
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -330,7 +337,7 @@ fill_in_job(struct IMB_JOB *job,
                 uint64_t *ptr64 = (uint64_t *) dust_bin;
 
                 ptr64[0] = ((pli >> 8) & 0xff) |
-                                ((pli & 0xff) << 8);
+                        ((pli & 0xff) << 8);
                 break;
         case IMB_CIPHER_ECB:
                 job->key_len_in_bytes = UINT64_C(16);
@@ -654,7 +661,7 @@ is_submit_burst_invalid(struct IMB_MGR *mb_mgr, const struct IMB_JOB *job,
         for (i = 0; i < n_jobs; i++)
                 *jobs[i] = *job;
 
-         /* submit the job for processing */
+        /* submit the job for processing */
         completed_jobs = IMB_SUBMIT_BURST(mb_mgr, n_jobs, jobs);
         if (completed_jobs != 0) {
                 printf("%s : test %d, hash_alg %d, chain_order %d, "
@@ -712,7 +719,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                                "jobs\n", __func__, TEST_INVALID_BURST);
                         return 1;
                 }
-                printf(".");
+                print_progress();
 
                 err = imb_get_errno(mb_mgr);
                 if (err != IMB_ERR_NULL_BURST) {
@@ -721,7 +728,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                                imb_get_strerror(err));
                         return 1;
                 }
-                printf(".");
+                print_progress();
 
                 /* ======== test 2 : NULL jobs array  */
 
@@ -731,7 +738,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                                "jobs\n", __func__, TEST_INVALID_BURST);
                         return 1;
                 }
-                printf(".");
+                print_progress();
 
                 err = imb_get_errno(mb_mgr);
                 if (err != IMB_ERR_NULL_JOB) {
@@ -740,7 +747,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                                imb_get_strerror(err));
                         return 1;
                 }
-                printf(".");
+                print_progress();
 
                 /* ========== test 3: invalid burst size */
 
@@ -751,7 +758,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                                "jobs\n", __func__, TEST_INVALID_BURST);
                         return 1;
                 }
-                printf(".");
+                print_progress();
 
                 err = imb_get_errno(mb_mgr);
                 if (err != IMB_ERR_BURST_SIZE) {
@@ -760,7 +767,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                                imb_get_strerror(err));
                         return 1;
                 }
-                printf(".");
+                print_progress();
         }
 
         /* ======== test 4 : invalid job order */
@@ -784,7 +791,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                        "jobs\n", __func__, TEST_INVALID_BURST);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         err = imb_get_errno(mb_mgr);
         if (err != IMB_ERR_BURST_OOO) {
@@ -793,7 +800,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                        imb_get_strerror(err));
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         /* ======== test 5 : invalid job */
 
@@ -817,7 +824,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                        __func__, TEST_INVALID_BURST);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         err = imb_get_errno(mb_mgr);
         if (err != IMB_ERR_JOB_NULL_KEY) {
@@ -825,7 +832,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                        __func__, TEST_INVALID_BURST, imb_get_strerror(err));
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         /* check invalid job returned in jobs[0] */
         if (jobs[0] != jobs[n_jobs - 1]) {
@@ -835,7 +842,8 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                 return 1;
         }
 
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 
         if ((mb_mgr->features & IMB_FEATURE_SAFE_PARAM) == 0)
                 return 0;
@@ -850,7 +858,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                        __func__, TEST_INVALID_BURST);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         err = imb_get_errno(mb_mgr);
         if (err != IMB_ERR_NULL_BURST) {
@@ -859,7 +867,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                        imb_get_strerror(err));
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         /* ======== test 7 : Invalid burst size */
 
@@ -870,7 +878,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                        __func__, TEST_INVALID_BURST);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         err = imb_get_errno(mb_mgr);
         if (err != IMB_ERR_BURST_SIZE) {
@@ -879,7 +887,9 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                        imb_get_strerror(err));
                 return 1;
         }
-        printf(".\n");
+        print_progress();
+        if (!quiet_mode)
+                printf("\n");
 
         printf("FLUSH_BURST() API behavior test:\n");
 
@@ -889,7 +899,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                        __func__, TEST_INVALID_BURST);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         err = imb_get_errno(mb_mgr);
         if (err != IMB_ERR_NULL_BURST) {
@@ -898,7 +908,9 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                        imb_get_strerror(err));
                 return 1;
         }
-        printf(".\n");
+        print_progress();
+        if (!quiet_mode)
+                printf("\n");
 
         return 0;
 }
@@ -980,11 +992,11 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                          &template_job,
-                                                          TEST_AUTH_SRC_NULL,
-                                                          IMB_ERR_JOB_NULL_SRC))
+                                                             &template_job,
+                                                             TEST_AUTH_SRC_NULL,
+                                                             IMB_ERR_JOB_NULL_SRC))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
 
         /*
@@ -1013,16 +1025,16 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                         template_job.sgl_state =
                                                 IMB_SGL_COMPLETE;
                                 if (!is_submit_invalid(mb_mgr, &template_job,
-                                                 TEST_AUTH_AUTH_TAG_OUTPUT_NULL,
-                                                 IMB_ERR_JOB_NULL_AUTH))
+                                                       TEST_AUTH_AUTH_TAG_OUTPUT_NULL,
+                                                       IMB_ERR_JOB_NULL_AUTH))
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                 &template_job,
-                                                 TEST_AUTH_AUTH_TAG_OUTPUT_NULL,
-                                                 IMB_ERR_JOB_NULL_AUTH))
+                                                             &template_job,
+                                                             TEST_AUTH_AUTH_TAG_OUTPUT_NULL,
+                                                             IMB_ERR_JOB_NULL_AUTH))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
 
         /*
@@ -1051,15 +1063,15 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                         template_job.sgl_state =
                                                 IMB_SGL_COMPLETE;
                                 if (!is_submit_invalid(mb_mgr, &template_job,
-                                                  TEST_AUTH_TAG_OUTPUT_LEN_ZERO,
-                                                  IMB_ERR_JOB_AUTH_TAG_LEN))
+                                                       TEST_AUTH_TAG_OUTPUT_LEN_ZERO,
+                                                       IMB_ERR_JOB_AUTH_TAG_LEN))
                                         return 1;
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                  &template_job,
-                                                  TEST_AUTH_TAG_OUTPUT_LEN_ZERO,
-                                                  IMB_ERR_JOB_AUTH_TAG_LEN))
+                                                             &template_job,
+                                                             TEST_AUTH_TAG_OUTPUT_LEN_ZERO,
+                                                             IMB_ERR_JOB_AUTH_TAG_LEN))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
 
         /*
@@ -1134,16 +1146,16 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                         break;
                                 }
                                 if (!is_submit_invalid(mb_mgr, &template_job,
-                                                  TEST_AUTH_MSG_LEN_GT_MAX,
-                                                  IMB_ERR_JOB_AUTH_LEN))
+                                                       TEST_AUTH_MSG_LEN_GT_MAX,
+                                                       IMB_ERR_JOB_AUTH_LEN))
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                       &template_job,
-                                                       TEST_AUTH_MSG_LEN_GT_MAX,
-                                                       IMB_ERR_JOB_AUTH_LEN))
+                                                             &template_job,
+                                                             TEST_AUTH_MSG_LEN_GT_MAX,
+                                                             IMB_ERR_JOB_AUTH_LEN))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
 
         /*
@@ -1156,10 +1168,10 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                              hash < IMB_AUTH_NUM; hash++) {
 
                                 switch (hash) {
-                                /*
-                                 * Cases below don't allow for zero length
-                                 * hash messages
-                                 */
+                                        /*
+                                         * Cases below don't allow for zero length
+                                         * hash messages
+                                         */
                                 case IMB_AUTH_HMAC_SHA_1:
                                 case IMB_AUTH_HMAC_SHA_224:
                                 case IMB_AUTH_HMAC_SHA_256:
@@ -1194,11 +1206,11 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                         &template_job,
-                                                         TEST_AUTH_MSG_LEN_ZERO,
-                                                         IMB_ERR_JOB_AUTH_LEN))
+                                                             &template_job,
+                                                             TEST_AUTH_MSG_LEN_ZERO,
+                                                             IMB_ERR_JOB_AUTH_LEN))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
 
         /*
@@ -1237,10 +1249,10 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr, job,
-                                                            TEST_AUTH_IV_LEN,
-                                                            IMB_ERR_JOB_IV_LEN))
+                                                             TEST_AUTH_IV_LEN,
+                                                             IMB_ERR_JOB_IV_LEN))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
 
         /*
@@ -1283,10 +1295,10 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr, job,
-                                                       TEST_AUTH_NULL_HMAC_IPAD,
-                                                       err_ipad))
+                                                             TEST_AUTH_NULL_HMAC_IPAD,
+                                                             err_ipad))
                                         return 1;
-                                printf(".");
+                                print_progress();
 
                                 fill_in_job(job, cipher, dir,
                                             hash, order, &chacha_ctx,
@@ -1301,10 +1313,10 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr, job,
-                                                       TEST_AUTH_NULL_HMAC_OPAD,
-                                                       err_opad))
+                                                             TEST_AUTH_NULL_HMAC_OPAD,
+                                                             err_opad))
                                         return 1;
-                                printf(".");
+                                print_progress();
 
                         }
 
@@ -1328,10 +1340,10 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                 return 1;
 
                         if (!is_submit_burst_invalid(mb_mgr, job,
-                                                  TEST_AUTH_NULL_XCBC_K1_EXP,
-                                                  IMB_ERR_JOB_NULL_XCBC_K1_EXP))
+                                                     TEST_AUTH_NULL_XCBC_K1_EXP,
+                                                     IMB_ERR_JOB_NULL_XCBC_K1_EXP))
                                 return 1;
-                        printf(".");
+                        print_progress();
 
                         fill_in_job(job, cipher, dir,
                                     hash, order, &chacha_ctx,
@@ -1346,7 +1358,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                      TEST_AUTH_NULL_XCBC_K2,
                                                      IMB_ERR_JOB_NULL_XCBC_K2))
                                 return 1;
-                        printf(".");
+                        print_progress();
 
                         fill_in_job(job, cipher, dir,
                                     hash, order, &chacha_ctx,
@@ -1360,7 +1372,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                      TEST_AUTH_NULL_XCBC_K3,
                                                      IMB_ERR_JOB_NULL_XCBC_K3))
                                 return 1;
-                        printf(".");
+                        print_progress();
                 }
 
         /*
@@ -1386,7 +1398,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                      TEST_AUTH_NULL_GHASH_KEY,
                                                      IMB_ERR_JOB_NULL_AUTH_KEY))
                                 return 1;
-                        printf(".");
+                        print_progress();
 
                         fill_in_job(job, cipher, dir,
                                     hash, order, &chacha_ctx,
@@ -1398,10 +1410,10 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                 return 1;
 
                         if (!is_submit_burst_invalid(mb_mgr, job,
-                                               TEST_AUTH_NULL_GHASH_INIT_TAG,
-                                               IMB_ERR_JOB_NULL_GHASH_INIT_TAG))
+                                                     TEST_AUTH_NULL_GHASH_INIT_TAG,
+                                                     IMB_ERR_JOB_NULL_GHASH_INIT_TAG))
                                 return 1;
-                        printf(".");
+                        print_progress();
                 }
 
         /*
@@ -1420,15 +1432,15 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                 job->u.GMAC._key = NULL;
 
                                 if (!is_submit_invalid(mb_mgr, job,
-                                                     TEST_AUTH_NULL_GMAC_KEY,
-                                                     IMB_ERR_JOB_NULL_AUTH_KEY))
+                                                       TEST_AUTH_NULL_GMAC_KEY,
+                                                       IMB_ERR_JOB_NULL_AUTH_KEY))
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr, job,
-                                                     TEST_AUTH_NULL_GMAC_KEY,
-                                                     IMB_ERR_JOB_NULL_AUTH_KEY))
+                                                             TEST_AUTH_NULL_GMAC_KEY,
+                                                             IMB_ERR_JOB_NULL_AUTH_KEY))
                                         return 1;
-                                printf(".");
+                                print_progress();
 
                                 fill_in_job(job, cipher, dir,
                                             hash, order, &chacha_ctx,
@@ -1440,10 +1452,10 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr, job,
-                                                         TEST_AUTH_NULL_GMAC_IV,
-                                                         IMB_ERR_JOB_NULL_IV))
+                                                             TEST_AUTH_NULL_GMAC_IV,
+                                                             IMB_ERR_JOB_NULL_IV))
                                         return 1;
-                                printf(".");
+                                print_progress();
 
                                 fill_in_job(job, cipher, dir,
                                             hash, order, &chacha_ctx,
@@ -1455,10 +1467,10 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr, job,
-                                                          TEST_AUTH_GMAC_IV_LEN,
-                                                          IMB_ERR_JOB_IV_LEN))
+                                                             TEST_AUTH_GMAC_IV_LEN,
+                                                             IMB_ERR_JOB_IV_LEN))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
                 }
 
@@ -1466,7 +1478,8 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
         while (IMB_FLUSH_JOB(mb_mgr) != NULL)
                 ;
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -1518,11 +1531,11 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                          &template_job,
-                                                          TEST_CIPH_SRC_NULL,
-                                                          IMB_ERR_JOB_NULL_SRC))
+                                                             &template_job,
+                                                             TEST_CIPH_SRC_NULL,
+                                                             IMB_ERR_JOB_NULL_SRC))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
 
         /*
@@ -1553,11 +1566,11 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                          &template_job,
-                                                          TEST_CIPH_DST_NULL,
-                                                          IMB_ERR_JOB_NULL_DST))
+                                                             &template_job,
+                                                             TEST_CIPH_DST_NULL,
+                                                             IMB_ERR_JOB_NULL_DST))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
 
         /*
@@ -1592,13 +1605,13 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                           &template_job,
-                                                           TEST_CIPH_IV_NULL,
-                                                           IMB_ERR_JOB_NULL_IV))
+                                                             &template_job,
+                                                             TEST_CIPH_IV_NULL,
+                                                             IMB_ERR_JOB_NULL_IV))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
-         /*
+        /*
          * CIPHER_DIR = Invalid dir
          */
         for (dir = 0; dir <= 10; dir++) {
@@ -1634,7 +1647,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                      TEST_CIPH_DIR,
                                                      IMB_ERR_JOB_CIPH_DIR))
                                 return 1;
-                        printf(".");
+                        print_progress();
                 }
         }
 
@@ -1668,13 +1681,13 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                         &template_job,
-                                                         TEST_CIPH_ENC_KEY_NULL,
-                                                         IMB_ERR_JOB_NULL_KEY))
+                                                             &template_job,
+                                                             TEST_CIPH_ENC_KEY_NULL,
+                                                             IMB_ERR_JOB_NULL_KEY))
                                         return 1;
                                 break;
                         }
-                        printf(".");
+                        print_progress();
                 }
 
         /* ======== (decrypt test)
@@ -1709,9 +1722,9 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                         &template_job,
-                                                         TEST_CIPH_DEC_KEY_NULL,
-                                                         IMB_ERR_JOB_NULL_KEY))
+                                                             &template_job,
+                                                             TEST_CIPH_DEC_KEY_NULL,
+                                                             IMB_ERR_JOB_NULL_KEY))
                                         return 1;
                                 break;
                         case IMB_CIPHER_CNTR:
@@ -1729,9 +1742,9 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                         &template_job,
-                                                         TEST_CIPH_DEC_KEY_NULL,
-                                                         IMB_ERR_JOB_NULL_KEY))
+                                                             &template_job,
+                                                             TEST_CIPH_DEC_KEY_NULL,
+                                                             IMB_ERR_JOB_NULL_KEY))
                                         return 1;
                                 break;
                         case IMB_CIPHER_DOCSIS_SEC_BPI:
@@ -1742,9 +1755,9 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                         &template_job,
-                                                         TEST_CIPH_DEC_KEY_NULL,
-                                                         IMB_ERR_JOB_NULL_KEY))
+                                                             &template_job,
+                                                             TEST_CIPH_DEC_KEY_NULL,
+                                                             IMB_ERR_JOB_NULL_KEY))
                                         return 1;
                                 template_job.enc_keys =
                                         template_job.dec_keys;
@@ -1755,9 +1768,9 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr,
-                                                         &template_job,
-                                                         TEST_CIPH_DEC_KEY_NULL,
-                                                         IMB_ERR_JOB_NULL_KEY))
+                                                             &template_job,
+                                                             TEST_CIPH_DEC_KEY_NULL,
+                                                             IMB_ERR_JOB_NULL_KEY))
                                         return 1;
                                 break;
                         case IMB_CIPHER_NULL:
@@ -1765,7 +1778,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                         default:
                                 break;
                         }
-                        printf(".");
+                        print_progress();
                 }
 
         /*
@@ -1793,7 +1806,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                             &chacha_ctx, &gcm_ctx);
 
                                 switch (cipher) {
-                                /* skip ciphers that allow msg length 0 */
+                                        /* skip ciphers that allow msg length 0 */
                                 case IMB_CIPHER_GCM:
                                 case IMB_CIPHER_GCM_SGL:
                                 case IMB_CIPHER_CCM:
@@ -1808,17 +1821,17 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                 default:
                                         job->msg_len_to_cipher_in_bytes = 0;
                                         if (!is_submit_invalid(mb_mgr, job,
-                                                         TEST_CIPH_MSG_LEN_ZERO,
-                                                         IMB_ERR_JOB_CIPH_LEN))
+                                                               TEST_CIPH_MSG_LEN_ZERO,
+                                                               IMB_ERR_JOB_CIPH_LEN))
                                                 return 1;
 
                                         if (!is_submit_burst_invalid(mb_mgr,
-                                                         job,
-                                                         TEST_CIPH_MSG_LEN_ZERO,
-                                                         IMB_ERR_JOB_CIPH_LEN))
+                                                                     job,
+                                                                     TEST_CIPH_MSG_LEN_ZERO,
+                                                                     IMB_ERR_JOB_CIPH_LEN))
                                                 return 1;
                                 }
-                                printf(".");
+                                print_progress();
                         }
 
         /*
@@ -1897,11 +1910,11 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr, job,
-                                                       TEST_CIPH_MSG_LEN_GT_MAX,
-                                                       IMB_ERR_JOB_CIPH_LEN))
+                                                             TEST_CIPH_MSG_LEN_GT_MAX,
+                                                             IMB_ERR_JOB_CIPH_LEN))
                                         return 1;
 
-                                printf(".");
+                                print_progress();
                         }
 
         /*
@@ -2035,10 +2048,10 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr, job,
-                                                            TEST_CIPH_IV_LEN,
-                                                            IMB_ERR_JOB_IV_LEN))
+                                                             TEST_CIPH_IV_LEN,
+                                                             IMB_ERR_JOB_IV_LEN))
                                         return 1;
-                                printf(".");
+                                print_progress();
                         }
                 }
         }
@@ -2076,14 +2089,15 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                      TEST_CIPH_NEXT_IV_NULL,
                                                      IMB_ERR_JOB_NULL_NEXT_IV))
                                 return 1;
-                        printf(".");
+                        print_progress();
                 }
 
         /* clean up */
         while (IMB_FLUSH_JOB(mb_mgr) != NULL)
                 ;
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -2136,7 +2150,7 @@ test_job_invalid_misc_args(struct IMB_MGR *mb_mgr)
                                                      TEST_INVALID_PON_PLI,
                                                      IMB_ERR_JOB_PON_PLI))
                                 return 1;
-                        printf(".");
+                        print_progress();
                 }
 
 
@@ -2183,18 +2197,19 @@ test_job_invalid_misc_args(struct IMB_MGR *mb_mgr)
                                         return 1;
 
                                 if (!is_submit_burst_invalid(mb_mgr, job,
-                                                       TEST_CIPH_MSG_LEN_GT_MAX,
-                                                       IMB_ERR_JOB_CIPH_LEN))
+                                                             TEST_CIPH_MSG_LEN_GT_MAX,
+                                                             IMB_ERR_JOB_CIPH_LEN))
                                         return 1;
 
-                                printf(".");
+                                print_progress();
                         }
 
         /* clean up */
         while (IMB_FLUSH_JOB(mb_mgr) != NULL)
                 ;
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -2378,7 +2393,8 @@ test_reset_api(struct IMB_MGR *mb_mgr)
         while (IMB_FLUSH_JOB(mb_mgr) != NULL)
                 ;
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
-- 
GitLab


From 83e32c7225e50ad8d252d52b22693430958b2ac8 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:50:56 +0000
Subject: [PATCH 103/332] test: [aes-ccm] add support for quiet mode

---
 test/ccm_test.c | 43 +++++++++++++++++++++++++------------------
 1 file changed, 25 insertions(+), 18 deletions(-)

diff --git a/test/ccm_test.c b/test/ccm_test.c
index a65fdb46..1b33235a 100644
--- a/test/ccm_test.c
+++ b/test/ccm_test.c
@@ -2448,17 +2448,19 @@ test_ccm_128_std_vectors(struct IMB_MGR *mb_mgr,
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
 
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Standard vector [%d/%d] NONCELen:%d PktLen:%d "
-                       "AADLen:%d AUTHlen:%d\n",
-                       vect, vectors_cnt,
-                       (int) ccm_vectors[idx].nonce_len,
-                       (int) ccm_vectors[idx].packet_len,
-                       (int) ccm_vectors[idx].clear_len,
-                       (int) ccm_vectors[idx].auth_len);
+                        printf("Standard vector [%d/%d] NONCELen:%d PktLen:%d "
+                               "AADLen:%d AUTHlen:%d\n",
+                               vect, vectors_cnt,
+                               (int) ccm_vectors[idx].nonce_len,
+                               (int) ccm_vectors[idx].packet_len,
+                               (int) ccm_vectors[idx].clear_len,
+                               (int) ccm_vectors[idx].auth_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_ccm(mb_mgr, &ccm_vectors[idx], IMB_DIR_ENCRYPT, 1,
                              num_jobs, 16)) {
@@ -2492,7 +2494,8 @@ test_ccm_128_std_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 static void
@@ -2506,17 +2509,20 @@ test_ccm_256_std_vectors(struct IMB_MGR *mb_mgr,
 	printf("AES-CCM-256 standard test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Standard vector [%d/%d] NONCELen:%d PktLen:%d "
-                       "AADLen:%d AUTHlen:%d\n",
-                       vect, vectors_cnt,
-                       (int) ccm_256_vectors[idx].nonce_len,
-                       (int) ccm_256_vectors[idx].packet_len,
-                       (int) ccm_256_vectors[idx].clear_len,
-                       (int) ccm_256_vectors[idx].auth_len);
+                        printf("Standard vector [%d/%d] NONCELen:%d PktLen:%d "
+                               "AADLen:%d AUTHlen:%d\n",
+                               vect, vectors_cnt,
+                               (int) ccm_256_vectors[idx].nonce_len,
+                               (int) ccm_256_vectors[idx].packet_len,
+                               (int) ccm_256_vectors[idx].clear_len,
+                               (int) ccm_256_vectors[idx].auth_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_ccm(mb_mgr, &ccm_256_vectors[idx], IMB_DIR_ENCRYPT, 1,
                              num_jobs, 32)) {
@@ -2550,7 +2556,8 @@ test_ccm_256_std_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 
-- 
GitLab


From 38eacab7beff6efb30d05eb37466198d51577c00 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:51:25 +0000
Subject: [PATCH 104/332] test: [chacha20-poly1305] add support for quiet mode

---
 test/chacha20_poly1305_test.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/test/chacha20_poly1305_test.c b/test/chacha20_poly1305_test.c
index d952baea..9ceb282c 100644
--- a/test/chacha20_poly1305_test.c
+++ b/test/chacha20_poly1305_test.c
@@ -588,13 +588,15 @@ test_aead_vectors(struct IMB_MGR *mb_mgr,
 
 	printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_array_size; vect++) {
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Vector [%d/%d], M len: %d\n",
-                       (int) vect + 1, (int) vec_array_size,
-                       (int) vec_array[vect].msg_len);
+                        printf("Vector [%d/%d], M len: %d\n",
+                               (int) vect + 1, (int) vec_array_size,
+                               (int) vec_array[vect].msg_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_aead(mb_mgr, &vec_array[vect],
                               IMB_DIR_ENCRYPT, num_jobs, 1)) {
@@ -632,7 +634,8 @@ test_aead_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 
 }
 
-- 
GitLab


From 704c568985f2a8e5c707c0eb4e14f899254fd613 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:51:45 +0000
Subject: [PATCH 105/332] test: [chacha20] add support for quiet mode

---
 test/chacha_test.c  | 14 +++++++++-----
 test/chained_test.c | 14 +++++++++-----
 2 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/test/chacha_test.c b/test/chacha_test.c
index 761c5252..c8a904d3 100644
--- a/test/chacha_test.c
+++ b/test/chacha_test.c
@@ -359,13 +359,16 @@ test_chacha_vectors(struct IMB_MGR *mb_mgr,
 
 	printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_cnt; vect++) {
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("[%d/%d] Standard vector key_len:%d\n",
-                       vect + 1, vec_cnt,
-                       (int) vec_tab[vect].Klen);
+                        printf("[%d/%d] Standard vector key_len:%d\n",
+                               vect + 1, vec_cnt,
+                               (int) vec_tab[vect].Klen);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
+
                 memcpy(enc_keys, vec_tab[vect].K, vec_tab[vect].Klen);
                 memcpy(dec_keys, vec_tab[vect].K, vec_tab[vect].Klen);
 
@@ -421,7 +424,8 @@ test_chacha_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
diff --git a/test/chained_test.c b/test/chained_test.c
index c403c04b..beea0efc 100644
--- a/test/chained_test.c
+++ b/test/chained_test.c
@@ -391,13 +391,16 @@ test_chained_vectors(struct IMB_MGR *mb_mgr,
 
         printf("%s (N jobs = %d):\n", banner, num_jobs);
         for (vect = 0; vect < vec_cnt; vect++) {
+                if (!quiet_mode) {
 #ifdef DEBUG
-                printf("[%d/%d] Standard vector key_len:%d\n",
-                       vect + 1, vec_cnt,
-                       (int) vec_tab[vect].cipher_key_len);
+                        printf("[%d/%d] Standard vector key_len:%d\n",
+                               vect + 1, vec_cnt,
+                               (int) vec_tab[vect].cipher_key_len);
 #else
-                printf(".");
+                        printf(".");
 #endif
+                }
+
                 /* prepare the cipher key */
                 switch (vec_tab[vect].cipher_key_len) {
                 case 16:
@@ -442,7 +445,8 @@ test_chained_vectors(struct IMB_MGR *mb_mgr,
                         }
                 }
         }
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From 5d2d217d7b7bf6375bc48ca3fe40a810a47f96be Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:52:24 +0000
Subject: [PATCH 106/332] test: [clear-mem] add support for quiet mode

---
 test/clear_mem_test.c | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/test/clear_mem_test.c b/test/clear_mem_test.c
index c4d8b7c5..9e7af3db 100644
--- a/test/clear_mem_test.c
+++ b/test/clear_mem_test.c
@@ -139,9 +139,11 @@ int clear_mem_test(struct IMB_MGR *mb_mgr)
 
                 free(buf);
 
-                printf(".");
+                if (!quiet_mode)
+                        printf(".");
         }
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 
         errors = test_suite_end(&ctx);
 
-- 
GitLab


From c20d15da3e061c4628fffa02685226029e68b631 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:52:51 +0000
Subject: [PATCH 107/332] test: [aes-cmac] add support for quiet mode

---
 test/cmac_test.c | 70 ++++++++++++++++++++++++++++++------------------
 1 file changed, 44 insertions(+), 26 deletions(-)

diff --git a/test/cmac_test.c b/test/cmac_test.c
index 51b0690f..bad7cd23 100644
--- a/test/cmac_test.c
+++ b/test/cmac_test.c
@@ -1332,14 +1332,18 @@ test_cmac_std_vectors(struct IMB_MGR *mb_mgr,
 	printf("AES-CMAC-128 standard test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Standard CMAC-128 vector [%d/%d] M len: %d, T len:%d\n",
-                       vect, vectors_cnt,
-                       (int) cmac_vectors[idx].len,
-                       (int) cmac_vectors[idx].T_len);
+                        printf("Standard CMAC-128 vector [%d/%d] M len: %d, "
+                               "T len:%d\n",
+                               vect, vectors_cnt,
+                               (int) cmac_vectors[idx].len,
+                               (int) cmac_vectors[idx].T_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_cmac(mb_mgr, &cmac_vectors[idx],
                               IMB_DIR_ENCRYPT, num_jobs, CMAC_128)) {
@@ -1357,7 +1361,8 @@ test_cmac_std_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 static void
@@ -1371,14 +1376,18 @@ test_cmac_256_std_vectors(struct IMB_MGR *mb_mgr,
 	printf("AES-CMAC-256 standard test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Standard CMAC-256 vector [%d/%d] M len: %d, T len:%d\n",
-                       vect, vectors_cnt,
-                       (int) cmac_256_vectors[idx].len,
-                       (int) cmac_256_vectors[idx].T_len);
+                        printf("Standard CMAC-256 vector [%d/%d] M len: %d, "
+                               "T len:%d\n",
+                               vect, vectors_cnt,
+                               (int) cmac_256_vectors[idx].len,
+                               (int) cmac_256_vectors[idx].T_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_cmac(mb_mgr, &cmac_256_vectors[idx],
                               IMB_DIR_ENCRYPT, num_jobs, CMAC_256)) {
@@ -1395,7 +1404,8 @@ test_cmac_256_std_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 static void
@@ -1410,15 +1420,18 @@ test_cmac_bitlen_std_vectors(struct IMB_MGR *mb_mgr,
                "(N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Standard vector [%d/%d] M len: %d (bits), "
-                       "T len:%d\n",
-                       vect, vectors_cnt,
-                       (int) cmac_vectors[idx].len * 8,
-                       (int) cmac_vectors[idx].T_len);
+                        printf("Standard vector [%d/%d] M len: %d (bits), "
+                               "T len:%d\n",
+                               vect, vectors_cnt,
+                               (int) cmac_vectors[idx].len * 8,
+                               (int) cmac_vectors[idx].T_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_cmac(mb_mgr, &cmac_vectors[idx],
                               IMB_DIR_ENCRYPT, num_jobs, CMAC_128_BITLEN)) {
@@ -1437,7 +1450,8 @@ test_cmac_bitlen_std_vectors(struct IMB_MGR *mb_mgr,
                 }
 
 	}
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 static void
@@ -1453,15 +1467,18 @@ test_cmac_bitlen_3gpp_vectors(struct IMB_MGR *mb_mgr,
                num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("3GPP vector [%d/%d] M len: %d (bits), "
-                       "T len:%d (bytes)\n",
-                       vect, vectors_cnt,
-                       (int) cmac_3gpp_vectors[idx].len,
-                       (int) cmac_3gpp_vectors[idx].T_len);
+                        printf("3GPP vector [%d/%d] M len: %d (bits), "
+                               "T len:%d (bytes)\n",
+                               vect, vectors_cnt,
+                               (int) cmac_3gpp_vectors[idx].len,
+                               (int) cmac_3gpp_vectors[idx].T_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_cmac(mb_mgr, &cmac_3gpp_vectors[idx],
                               IMB_DIR_ENCRYPT, num_jobs, CMAC_128_BITLEN)) {
@@ -1480,7 +1497,8 @@ test_cmac_bitlen_3gpp_vectors(struct IMB_MGR *mb_mgr,
                 }
 
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From 47cf25adc4802742dd30929289163a45bcce046b Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:53:04 +0000
Subject: [PATCH 108/332] test: [aes-ctr] add support for quiet mode

---
 test/ctr_test.c | 72 +++++++++++++++++++++++++++----------------------
 1 file changed, 40 insertions(+), 32 deletions(-)

diff --git a/test/ctr_test.c b/test/ctr_test.c
index 4c8c9310..30d9513f 100644
--- a/test/ctr_test.c
+++ b/test/ctr_test.c
@@ -1715,24 +1715,27 @@ test_ctr_vectors(struct IMB_MGR *mb_mgr,
 	printf("AES-CTR standard test vectors:\n");
 	for (vect = 0; vect < vectors_cnt; vect++) {
                 struct test_suite_context *ctx;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-                if (alg == IMB_CIPHER_CNTR)
-		        printf("Standard vector %u/%u  Keylen:%d "
-                               "IVlen:%d PTLen:%d\n",
-                               vect, vectors_cnt - 1,
-                               (int) vectors[vect].Klen,
-                               (int) vectors[vect].IVlen,
-                               (int) vectors[vect].Plen);
-                else
-		        printf("Bit vector %u/%u  Keylen:%d "
-                               "IVlen:%d PTLen:%d\n",
-                               vect, vectors_cnt - 1,
-                               (int) vectors[vect].Klen,
-                               (int) vectors[vect].IVlen,
-                               (int) vectors[vect].Plen);
+                        if (alg == IMB_CIPHER_CNTR)
+                                printf("Standard vector %u/%u  Keylen:%d "
+                                       "IVlen:%d PTLen:%d\n",
+                                       vect, vectors_cnt - 1,
+                                       (int) vectors[vect].Klen,
+                                       (int) vectors[vect].IVlen,
+                                       (int) vectors[vect].Plen);
+                        else
+                                printf("Bit vector %u/%u  Keylen:%d "
+                                       "IVlen:%d PTLen:%d\n",
+                                       vect, vectors_cnt - 1,
+                                       (int) vectors[vect].Klen,
+                                       (int) vectors[vect].IVlen,
+                                       (int) vectors[vect].Plen);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 switch (vectors[vect].Klen) {
                 case IMB_KEY_128_BYTES:
@@ -1824,7 +1827,8 @@ test_ctr_vectors(struct IMB_MGR *mb_mgr,
                         }
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 static void
@@ -1843,24 +1847,27 @@ test_ctr_vectors_burst(struct IMB_MGR *mb_mgr,
 	printf("AES-CTR standard test vectors - Burst API:\n");
 	for (vect = 0; vect < vectors_cnt; vect++) {
                 struct test_suite_context *ctx;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-                if (alg == IMB_CIPHER_CNTR)
-		        printf("Standard vector %u/%u  Keylen:%d "
-                               "IVlen:%d PTLen:%d (burst)\n",
-                               vect, vectors_cnt - 1,
-                               (int) vectors[vect].Klen,
-                               (int) vectors[vect].IVlen,
-                               (int) vectors[vect].Plen);
-                else
-		        printf("Bit vector %u/%u  Keylen:%d "
-                               "IVlen:%d PTLen:%d (burst)\n",
-                               vect, vectors_cnt - 1,
-                               (int) vectors[vect].Klen,
-                               (int) vectors[vect].IVlen,
-                               (int) vectors[vect].Plen);
+                        if (alg == IMB_CIPHER_CNTR)
+                                printf("Standard vector %u/%u  Keylen:%d "
+                                       "IVlen:%d PTLen:%d (burst)\n",
+                                       vect, vectors_cnt - 1,
+                                       (int) vectors[vect].Klen,
+                                       (int) vectors[vect].IVlen,
+                                       (int) vectors[vect].Plen);
+                        else
+                                printf("Bit vector %u/%u  Keylen:%d "
+                                       "IVlen:%d PTLen:%d (burst)\n",
+                                       vect, vectors_cnt - 1,
+                                       (int) vectors[vect].Klen,
+                                       (int) vectors[vect].IVlen,
+                                       (int) vectors[vect].Plen);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 switch (vectors[vect].Klen) {
                 case IMB_KEY_128_BYTES:
@@ -2046,7 +2053,8 @@ test_ctr_vectors_burst(struct IMB_MGR *mb_mgr,
                         }
                 }
         }
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From b0181e2e6fcdad7dc8c17ead36c543e4370669d7 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:54:04 +0000
Subject: [PATCH 109/332] test: [des] add support for quiet mode

---
 test/des_test.c | 30 +++++++++++++++++++-----------
 1 file changed, 19 insertions(+), 11 deletions(-)

diff --git a/test/des_test.c b/test/des_test.c
index b52e5471..2825b9b5 100644
--- a/test/des_test.c
+++ b/test/des_test.c
@@ -477,13 +477,16 @@ test_des_vectors(struct IMB_MGR *mb_mgr,
 
 	printf("%s:\n", banner);
 	for (vect = 0; vect < vec_cnt; vect++) {
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Standard vector %d/%d  PTLen:%d\n",
-                       vect + 1, vec_cnt,
-                       (int) vec_tab[vect].Plen);
+                        printf("Standard vector %d/%d  PTLen:%d\n",
+                               vect + 1, vec_cnt,
+                               (int) vec_tab[vect].Plen);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
+
                 des_key_schedule(ks, vec_tab[vect].K);
 
                 if (test_des(mb_mgr, ks, NULL, NULL,
@@ -534,7 +537,8 @@ test_des_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 static void
@@ -551,13 +555,15 @@ test_des3_vectors(struct IMB_MGR *mb_mgr,
 
 	printf("%s:\n", banner);
 	for (vect = 0; vect < vec_cnt; vect++) {
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Standard vector %d/%d  PTLen:%d\n",
-                       vect + 1, vec_cnt,
-                       (int) vec_tab[vect].Plen);
+                        printf("Standard vector %d/%d  PTLen:%d\n",
+                               vect + 1, vec_cnt,
+                               (int) vec_tab[vect].Plen);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
                 des_key_schedule(ks1, vec_tab[vect].K1);
                 des_key_schedule(ks2, vec_tab[vect].K2);
                 des_key_schedule(ks3, vec_tab[vect].K3);
@@ -610,7 +616,8 @@ test_des3_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 static int
@@ -679,7 +686,8 @@ des_cfb_validate(struct test_suite_context *ctx)
                 }
 
         }
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 1;
 }
 
-- 
GitLab


From cbcc8420dce3db346a6a243209139cde1bce45ae Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:54:23 +0000
Subject: [PATCH 110/332] test: [aes-ecb] add support for quiet mode

---
 test/ecb_test.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/test/ecb_test.c b/test/ecb_test.c
index 3d9f2b99..8312e32a 100644
--- a/test/ecb_test.c
+++ b/test/ecb_test.c
@@ -720,13 +720,15 @@ test_ecb_vectors(struct IMB_MGR *mb_mgr, const int vec_cnt,
 	for (vect = 0; vect < vec_cnt; vect++) {
                 struct test_suite_context *ctx = NULL;
 
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("[%d/%d] Standard vector key_len:%d\n",
-                       vect + 1, vec_cnt,
-                       (int) vec_tab[vect].Klen);
+                        printf("[%d/%d] Standard vector key_len:%d\n",
+                               vect + 1, vec_cnt,
+                               (int) vec_tab[vect].Klen);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 switch (vec_tab[vect].Klen) {
                 case 16:
@@ -791,7 +793,8 @@ test_ecb_vectors(struct IMB_MGR *mb_mgr, const int vec_cnt,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From bbd42a2f4c62a2e6f60ae16274f48303a54aa304 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:54:43 +0000
Subject: [PATCH 111/332] test: [aes-gcm] add support for quiet mode

---
 test/gcm_test.c | 24 ++++++++++++++----------
 1 file changed, 14 insertions(+), 10 deletions(-)

diff --git a/test/gcm_test.c b/test/gcm_test.c
index a5bb4269..8475c2a0 100644
--- a/test/gcm_test.c
+++ b/test/gcm_test.c
@@ -2478,18 +2478,21 @@ test_gcm_std_vectors(struct test_suite_context *ts128,
 	printf("AES-GCM (%s API) standard test vectors:\n",
                test_sgl_api ? "SGL" : "Direct/JOB");
 	for (vect = 0; vect < vectors_cnt; vect++) {
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Standard vector %d/%d  Keylen:%d IVlen:%d PTLen:%d "
-                       "AADlen:%d Tlen:%d\n",
-                       vect + 1, vectors_cnt,
-                       (int) vectors[vect].Klen,
-                       (int) vectors[vect].IVlen,
-                       (int) vectors[vect].Plen,
-                       (int) vectors[vect].Alen,
-                       (int) vectors[vect].Tlen);
+                        printf("Standard vector %d/%d  Keylen:%d IVlen:%d "
+                               "PTLen:%d AADlen:%d Tlen:%d\n",
+                               vect + 1, vectors_cnt,
+                               (int) vectors[vect].Klen,
+                               (int) vectors[vect].IVlen,
+                               (int) vectors[vect].Plen,
+                               (int) vectors[vect].Alen,
+                               (int) vectors[vect].Tlen);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
+
                 switch (vectors[vect].Klen) {
                 case IMB_KEY_128_BYTES:
                         if (test_sgl_api) {
@@ -2608,7 +2611,8 @@ test_gcm_std_vectors(struct test_suite_context *ts128,
                         return;
 		}
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 static void
-- 
GitLab


From a091f0683364812206a3ee7c7d264a21af1998cd Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:55:00 +0000
Subject: [PATCH 112/332] test: [hec] add support for quiet mode

---
 test/hec_test.c | 16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/test/hec_test.c b/test/hec_test.c
index 25278bea..d17b63a6 100644
--- a/test/hec_test.c
+++ b/test/hec_test.c
@@ -58,8 +58,9 @@ test_32_bit(IMB_MGR *mgr, struct test_suite_context *ctx)
                 uint32_t out = 0;
                 const uint8_t *in_p = (const uint8_t *) &in;
 #ifdef DEBUG
-                printf("[32-bit %u] PF | HEC:\t0x%08lx", i + 1,
-                       (unsigned long) expected_out);
+                if (!quiet_mode)
+                        printf("[32-bit %u] PF | HEC:\t0x%08lx", i + 1,
+                               (unsigned long) expected_out);
 #endif
                 out = IMB_HEC_32(mgr, in_p);
 
@@ -70,7 +71,8 @@ test_32_bit(IMB_MGR *mgr, struct test_suite_context *ctx)
                 } else {
                         test_suite_update(ctx, 1, 0);
 #ifdef DEBUG
-                        printf("\tHEC 32 - Pass\n");
+                        if (!quiet_mode)
+                                printf("\tHEC 32 - Pass\n");
 #endif
                 }
         }
@@ -100,8 +102,9 @@ test_64_bit(IMB_MGR *mgr, struct test_suite_context *ctx)
                 uint64_t out = 0;
                 const uint8_t *in_p = (const uint8_t *) &in;
 #ifdef DEBUG
-                printf("[64-bit %u] PF | HEC:\t0x%016llx", i + 1,
-                       (unsigned long long)expected_out);
+                if (!quiet_mode)
+                        printf("[64-bit %u] PF | HEC:\t0x%016llx", i + 1,
+                               (unsigned long long)expected_out);
 #endif
                 out = IMB_HEC_64(mgr, in_p);
 
@@ -112,7 +115,8 @@ test_64_bit(IMB_MGR *mgr, struct test_suite_context *ctx)
                 } else {
                         test_suite_update(ctx, 1, 0);
 #ifdef DEBUG
-                        printf("\tHEC 64 - Pass\n");
+                        if (!quiet_mode)
+                                printf("\tHEC 64 - Pass\n");
 #endif
                 }
         }
-- 
GitLab


From b5087fdcebd223757634ad6d368db21f2c3a7875 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:55:37 +0000
Subject: [PATCH 113/332] test: [direct-api] add support for quiet mode

---
 test/direct_api_test.c | 190 ++++++++++++++++++++++-------------------
 1 file changed, 102 insertions(+), 88 deletions(-)

diff --git a/test/direct_api_test.c b/test/direct_api_test.c
index 441693a2..051b9661 100644
--- a/test/direct_api_test.c
+++ b/test/direct_api_test.c
@@ -64,6 +64,12 @@ seg_handler(int signum)
 }
 #endif /* DEBUG */
 
+static void print_progress(void)
+{
+        if (!quiet_mode)
+                printf(".");
+}
+
 /*
  * @brief Performs direct GCM API invalid param tests
  */
@@ -102,7 +108,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES192_GCM_ENC(mgr, NULL, NULL, NULL, NULL, -1,
                            NULL, NULL, -1, NULL, -1);
@@ -113,7 +119,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES256_GCM_ENC(mgr, NULL, NULL, NULL, NULL, -1,
                            NULL, NULL, -1, NULL, -1);
@@ -124,7 +130,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         /* GCM Decrypt API tests */
         IMB_AES128_GCM_DEC(mgr, NULL, NULL, NULL, NULL, -1,
@@ -136,7 +142,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES192_GCM_ENC(mgr, NULL, NULL, NULL, NULL, -1,
                            NULL, NULL, -1, NULL, -1);
@@ -147,7 +153,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES256_GCM_DEC(mgr, NULL, NULL, NULL, NULL, -1,
                            NULL, NULL, -1, NULL, -1);
@@ -158,7 +164,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         /* GCM Init tests */
         IMB_AES128_GCM_INIT(mgr, NULL, NULL, NULL, NULL, -1);
@@ -169,7 +175,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES192_GCM_INIT(mgr, NULL, NULL, NULL, NULL, -1);
         IMB_AES192_GCM_INIT(mgr, NULL, (struct gcm_context_data *)out_buf,
@@ -179,7 +185,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES256_GCM_INIT(mgr, NULL, NULL, NULL, NULL, -1);
         IMB_AES256_GCM_INIT(mgr, NULL, (struct gcm_context_data *)out_buf,
@@ -189,7 +195,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         /* GCM Encrypt update tests */
         IMB_AES128_GCM_ENC_UPDATE(mgr, NULL, NULL, NULL, NULL, -1);
@@ -199,7 +205,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES192_GCM_ENC_UPDATE(mgr, NULL, NULL, NULL, NULL, -1);
         IMB_AES192_GCM_ENC_UPDATE(mgr, NULL, NULL, out_buf, zero_buf, -1);
@@ -208,7 +214,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES256_GCM_ENC_UPDATE(mgr, NULL, NULL, NULL, NULL, -1);
         IMB_AES256_GCM_ENC_UPDATE(mgr, NULL, NULL, out_buf, zero_buf, -1);
@@ -217,7 +223,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         /* GCM Decrypt update tests */
         IMB_AES128_GCM_DEC_UPDATE(mgr, NULL, NULL, NULL, NULL, -1);
@@ -227,7 +233,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES192_GCM_DEC_UPDATE(mgr, NULL, NULL, NULL, NULL, -1);
         IMB_AES192_GCM_DEC_UPDATE(mgr, NULL, NULL, out_buf, zero_buf, -1);
@@ -236,7 +242,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES256_GCM_DEC_UPDATE(mgr, NULL, NULL, NULL, NULL, -1);
         IMB_AES256_GCM_DEC_UPDATE(mgr, NULL, NULL, out_buf, zero_buf, -1);
@@ -245,7 +251,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         /* GCM Encrypt complete tests */
         IMB_AES128_GCM_ENC_FINALIZE(mgr, NULL, NULL, NULL, -1);
@@ -255,7 +261,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES192_GCM_ENC_FINALIZE(mgr, NULL, NULL, NULL, -1);
         IMB_AES192_GCM_ENC_FINALIZE(mgr, NULL, NULL, out_buf, -1);
@@ -264,7 +270,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES256_GCM_ENC_FINALIZE(mgr, NULL, NULL, NULL, -1);
         IMB_AES256_GCM_ENC_FINALIZE(mgr, NULL, NULL, out_buf, -1);
@@ -273,7 +279,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         /* GCM Decrypt complete tests */
         IMB_AES128_GCM_DEC_FINALIZE(mgr, NULL, NULL, NULL, -1);
@@ -283,7 +289,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES192_GCM_DEC_FINALIZE(mgr, NULL, NULL, NULL, -1);
         IMB_AES192_GCM_DEC_FINALIZE(mgr, NULL, NULL, out_buf, -1);
@@ -292,7 +298,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES256_GCM_DEC_FINALIZE(mgr, NULL, NULL, NULL, -1);
         IMB_AES256_GCM_DEC_FINALIZE(mgr, NULL, NULL, out_buf, -1);
@@ -301,17 +307,17 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         /* GCM key data pre-processing tests */
         IMB_AES128_GCM_PRECOMP(mgr, NULL);
-        printf(".");
+        print_progress();
 
         IMB_AES192_GCM_PRECOMP(mgr, NULL);
-        printf(".");
+        print_progress();
 
         IMB_AES256_GCM_PRECOMP(mgr, NULL);
-        printf(".");
+        print_progress();
 
         IMB_AES128_GCM_PRE(mgr, NULL, NULL);
         IMB_AES128_GCM_PRE(mgr, NULL, key_data);
@@ -320,7 +326,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES192_GCM_PRE(mgr, NULL, NULL);
         IMB_AES192_GCM_PRE(mgr, NULL, key_data);
@@ -329,7 +335,7 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES256_GCM_PRE(mgr, NULL, NULL);
         IMB_AES256_GCM_PRE(mgr, NULL, key_data);
@@ -338,9 +344,10 @@ test_gcm_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -379,7 +386,7 @@ test_key_exp_gen_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES_KEYEXP_192(mgr, NULL, NULL, NULL);
         IMB_AES_KEYEXP_192(mgr, NULL, out_buf, zero_buf);
@@ -388,7 +395,7 @@ test_key_exp_gen_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES_KEYEXP_256(mgr, NULL, NULL, NULL);
         IMB_AES_KEYEXP_256(mgr, NULL, out_buf, zero_buf);
@@ -397,7 +404,7 @@ test_key_exp_gen_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES_CMAC_SUBKEY_GEN_128(mgr, NULL, NULL, NULL);
         IMB_AES_CMAC_SUBKEY_GEN_128(mgr, NULL, out_buf, zero_buf);
@@ -406,7 +413,7 @@ test_key_exp_gen_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_AES_XCBC_KEYEXP(mgr, NULL, NULL, NULL, NULL);
         IMB_AES_XCBC_KEYEXP(mgr, NULL, out_buf, out_buf, out_buf);
@@ -415,7 +422,7 @@ test_key_exp_gen_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_DES_KEYSCHED(mgr, NULL, NULL);
         IMB_DES_KEYSCHED(mgr, (uint64_t *)out_buf, NULL);
@@ -424,9 +431,10 @@ test_key_exp_gen_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -464,7 +472,7 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SHA1(mgr, NULL, -1, NULL);
         IMB_SHA1(mgr, NULL, BUF_SIZE, out_buf);
@@ -473,7 +481,7 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SHA224_ONE_BLOCK(mgr, NULL, NULL);
         IMB_SHA224_ONE_BLOCK(mgr, NULL, out_buf);
@@ -482,7 +490,7 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SHA224(mgr, NULL, -1, NULL);
         IMB_SHA224(mgr, NULL, BUF_SIZE, out_buf);
@@ -491,7 +499,7 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SHA256_ONE_BLOCK(mgr, NULL, NULL);
         IMB_SHA256_ONE_BLOCK(mgr, NULL, out_buf);
@@ -500,7 +508,7 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SHA256(mgr, NULL, -1, NULL);
         IMB_SHA256(mgr, NULL, BUF_SIZE, out_buf);
@@ -509,7 +517,7 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SHA384_ONE_BLOCK(mgr, NULL, NULL);
         IMB_SHA384_ONE_BLOCK(mgr, NULL, out_buf);
@@ -518,7 +526,7 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SHA384(mgr, NULL, -1, NULL);
         IMB_SHA384(mgr, NULL, BUF_SIZE, out_buf);
@@ -527,7 +535,7 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SHA512_ONE_BLOCK(mgr, NULL, NULL);
         IMB_SHA512_ONE_BLOCK(mgr, NULL, out_buf);
@@ -536,7 +544,7 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SHA512(mgr, NULL, -1, NULL);
         IMB_SHA512(mgr, NULL, BUF_SIZE, out_buf);
@@ -545,7 +553,7 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_MD5_ONE_BLOCK(mgr, NULL, NULL);
         IMB_MD5_ONE_BLOCK(mgr, NULL, out_buf);
@@ -554,9 +562,10 @@ test_hash_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -594,9 +603,10 @@ test_aes_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -645,7 +655,7 @@ test_zuc_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         ret1 = zuc_eia3_iv_gen(inv_len, (const uint8_t)inv_len,
                                (const uint8_t)inv_len, NULL);
@@ -657,7 +667,7 @@ test_zuc_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_ZUC_EEA3_1_BUFFER(mgr, NULL, NULL, NULL, NULL, inv_len);
         IMB_ZUC_EEA3_1_BUFFER(mgr, NULL, NULL, NULL, out_buf, text_len);
@@ -666,7 +676,7 @@ test_zuc_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_ZUC_EEA3_4_BUFFER(mgr, NULL, NULL, NULL, NULL, NULL);
         IMB_ZUC_EEA3_4_BUFFER(mgr, NULL, NULL, NULL, out_bufs, lens);
@@ -675,7 +685,7 @@ test_zuc_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_ZUC_EEA3_N_BUFFER(mgr, NULL, NULL, NULL,
                               NULL, NULL, inv_len);
@@ -686,7 +696,7 @@ test_zuc_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_ZUC_EIA3_1_BUFFER(mgr, NULL, NULL, NULL, inv_len, NULL);
         IMB_ZUC_EIA3_1_BUFFER(mgr, NULL, NULL, NULL, text_len, out_bufs[0]);
@@ -695,9 +705,10 @@ test_zuc_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -747,7 +758,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         ret1 = kasumi_f9_iv_gen(inv_len, inv_len, NULL);
         if ((memcmp(out_buf, zero_buf, text_len) != 0) || ret1 == 0) {
@@ -755,7 +766,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_KASUMI_F8_1_BUFFER(mgr, NULL, inv_iv, NULL, NULL, inv_len);
         IMB_KASUMI_F8_1_BUFFER(mgr, NULL, inv_iv, NULL, out_buf, text_len);
@@ -764,7 +775,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_KASUMI_F8_1_BUFFER_BIT(mgr, NULL, inv_iv, NULL,
                                    NULL, inv_len, inv_len);
@@ -775,7 +786,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_KASUMI_F8_2_BUFFER(mgr, NULL, inv_iv, inv_iv, NULL,
                                NULL, inv_len, NULL, NULL, inv_len);
@@ -786,7 +797,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_KASUMI_F8_3_BUFFER(mgr, NULL, inv_iv, inv_iv, inv_iv, NULL,
                                NULL, NULL, NULL, NULL, NULL, inv_len);
@@ -797,7 +808,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_KASUMI_F8_4_BUFFER(mgr, NULL, inv_iv, inv_iv, inv_iv, inv_iv,
                                NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
@@ -810,7 +821,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_KASUMI_F8_N_BUFFER(mgr, NULL, NULL, NULL,
                                NULL, NULL, inv_len);
@@ -821,7 +832,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_KASUMI_F9_1_BUFFER(mgr, NULL, NULL, inv_len, NULL);
         IMB_KASUMI_F9_1_BUFFER(mgr, NULL, NULL, text_len, out_buf);
@@ -830,7 +841,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_KASUMI_F9_1_BUFFER_USER(mgr, NULL, inv_iv, NULL,
                                     inv_len, NULL, inv_len);
@@ -841,7 +852,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         ret1 = IMB_KASUMI_INIT_F8_KEY_SCHED(mgr, NULL, NULL);
         ret2 = IMB_KASUMI_INIT_F8_KEY_SCHED(mgr, NULL,
@@ -852,7 +863,7 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         ret1 = IMB_KASUMI_INIT_F9_KEY_SCHED(mgr, NULL, NULL);
         ret2 = IMB_KASUMI_INIT_F9_KEY_SCHED(mgr, NULL,
@@ -863,16 +874,17 @@ test_kasumi_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         if (IMB_KASUMI_KEY_SCHED_SIZE(mgr) == 0) {
                 printf("%s: IMB_KASUMI_KEY_SCHED_SIZE, invalid "
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -921,7 +933,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         ret1 = snow3g_f9_iv_gen(inv_len, (const uint8_t)inv_len,
                                 (const uint8_t)inv_len, NULL);
@@ -933,7 +945,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SNOW3G_F8_1_BUFFER(mgr, NULL, NULL, NULL, NULL, inv_len);
         IMB_SNOW3G_F8_1_BUFFER(mgr, NULL, NULL, NULL, out_buf, text_len);
@@ -942,7 +954,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SNOW3G_F8_1_BUFFER_BIT(mgr, NULL, NULL, NULL, NULL,
                                    inv_len, inv_len);
@@ -953,7 +965,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SNOW3G_F8_2_BUFFER(mgr, NULL, NULL, NULL, NULL,
                                NULL, inv_len, NULL, NULL, inv_len);
@@ -964,7 +976,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SNOW3G_F8_4_BUFFER(mgr, NULL, NULL, NULL, NULL, NULL,
                                NULL, NULL, inv_len, NULL, NULL, inv_len,
@@ -977,7 +989,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SNOW3G_F8_8_BUFFER(mgr, NULL, NULL, NULL, NULL,
                                NULL, NULL, NULL, NULL, NULL,
@@ -996,7 +1008,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SNOW3G_F8_8_BUFFER_MULTIKEY(mgr, NULL, NULL, NULL, NULL, &inv_len);
         IMB_SNOW3G_F8_8_BUFFER_MULTIKEY(mgr, NULL, NULL, NULL, out_bufs, lens);
@@ -1005,7 +1017,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SNOW3G_F8_N_BUFFER(mgr, NULL, NULL, NULL, NULL, NULL, inv_len);
         IMB_SNOW3G_F8_N_BUFFER(mgr, NULL, NULL, NULL, out_bufs, lens, NUM_BUFS);
@@ -1014,7 +1026,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SNOW3G_F8_N_BUFFER_MULTIKEY(mgr, NULL, NULL, NULL, NULL,
                                         NULL, inv_len);
@@ -1025,7 +1037,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         IMB_SNOW3G_F9_1_BUFFER(mgr, NULL, NULL, NULL, inv_len, NULL);
         IMB_SNOW3G_F9_1_BUFFER(mgr, NULL, NULL, NULL, text_len, out_buf);
@@ -1034,7 +1046,7 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         ret1 = IMB_SNOW3G_INIT_KEY_SCHED(mgr, NULL, NULL);
         ret2 = IMB_SNOW3G_INIT_KEY_SCHED(mgr, NULL,
@@ -1045,16 +1057,17 @@ test_snow3g_api(struct IMB_MGR *mgr)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         if (IMB_SNOW3G_KEY_SCHED_SIZE(mgr) == 0) {
                 printf("%s: IMB_SNOW3G_KEY_SCHED_SIZE, invalid "
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
@@ -1091,7 +1104,7 @@ test_clear_mem_api(void)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         imb_clear_mem(out_buf, 0);
         if (memcmp(out_buf, cmp_buf, text_len) != 0) {
@@ -1099,7 +1112,7 @@ test_clear_mem_api(void)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
         imb_clear_mem(out_buf, text_len);
         if (memcmp(out_buf, cmp_buf, text_len) == 0) {
@@ -1107,9 +1120,10 @@ test_clear_mem_api(void)
                        "param test failed!\n", __func__);
                 return 1;
         }
-        printf(".");
+        print_progress();
 
-        printf("\n");
+        if (!quiet_mode)
+                printf("\n");
         return 0;
 }
 
-- 
GitLab


From d3e6d490d1e9448e6263e7895a4d2920f12c5611 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:56:04 +0000
Subject: [PATCH 114/332] test: [hmac-md5] add support for quiet mode

---
 test/hmac_md5_test.c | 22 +++++++++++++---------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/test/hmac_md5_test.c b/test/hmac_md5_test.c
index 180ebb13..418d453c 100644
--- a/test/hmac_md5_test.c
+++ b/test/hmac_md5_test.c
@@ -509,17 +509,20 @@ test_hmac_md5_std_vectors(struct IMB_MGR *mb_mgr,
 	printf("HMAC-MD5 standard test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("[%d/%d] RFC2202 Test Case %s key_len:%d data_len:%d "
-                       "digest_len:%d\n",
-                       vect, vectors_cnt,
-                       hmac_md5_vectors[idx].test_case,
-                       (int) hmac_md5_vectors[idx].key_len,
-                       (int) hmac_md5_vectors[idx].data_len,
-                       (int) hmac_md5_vectors[idx].digest_len);
+                        printf("[%d/%d] RFC2202 Test Case %s key_len:%d "
+                               "data_len:%d digest_len:%d\n",
+                               vect, vectors_cnt,
+                               hmac_md5_vectors[idx].test_case,
+                               (int) hmac_md5_vectors[idx].key_len,
+                               (int) hmac_md5_vectors[idx].data_len,
+                               (int) hmac_md5_vectors[idx].digest_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_hmac_md5(mb_mgr, &hmac_md5_vectors[idx], num_jobs)) {
                         printf("error #%d\n", vect);
@@ -528,7 +531,8 @@ test_hmac_md5_std_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ts, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From d60e1ad79c64c59a74e3aa3ca06de12bc99d3c35 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:56:41 +0000
Subject: [PATCH 115/332] test: [hmac-sha1] add support for quiet mode

---
 test/hmac_sha1_test.c | 22 +++++++++++++---------
 1 file changed, 13 insertions(+), 9 deletions(-)

diff --git a/test/hmac_sha1_test.c b/test/hmac_sha1_test.c
index 891de45d..7072fd47 100644
--- a/test/hmac_sha1_test.c
+++ b/test/hmac_sha1_test.c
@@ -690,17 +690,20 @@ test_hmac_sha1_std_vectors(struct IMB_MGR *mb_mgr,
 	printf("HMAC-SHA1 standard test vectors (N jobs = %u):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("[%d/%d] RFC2202 Test Case %s key_len:%d data_len:%d "
-                       "digest_len:%d\n",
-                       vect, vectors_cnt,
-                       hmac_sha1_vectors[idx].test_case,
-                       (int) hmac_sha1_vectors[idx].key_len,
-                       (int) hmac_sha1_vectors[idx].data_len,
-                       (int) hmac_sha1_vectors[idx].digest_len);
+                        printf("[%d/%d] RFC2202 Test Case %s key_len:%d "
+                               "data_len:%d digest_len:%d\n",
+                               vect, vectors_cnt,
+                               hmac_sha1_vectors[idx].test_case,
+                               (int) hmac_sha1_vectors[idx].key_len,
+                               (int) hmac_sha1_vectors[idx].data_len,
+                               (int) hmac_sha1_vectors[idx].digest_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_hmac_sha1(mb_mgr, &hmac_sha1_vectors[idx], num_jobs)) {
                         printf("error #%d\n", vect);
@@ -723,7 +726,8 @@ test_hmac_sha1_std_vectors(struct IMB_MGR *mb_mgr,
                         test_suite_update(ts, 1, 0);
                 }
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From c3a4ec9addc479c19cc3525323e7a14e115fe2a5 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:57:00 +0000
Subject: [PATCH 116/332] test: [hmac-sha256/sha512] add support for quiet mode

---
 test/hmac_sha256_sha512_test.c | 25 ++++++++++++++++---------
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/test/hmac_sha256_sha512_test.c b/test/hmac_sha256_sha512_test.c
index 4223b5ae..32484b61 100644
--- a/test/hmac_sha256_sha512_test.c
+++ b/test/hmac_sha256_sha512_test.c
@@ -1537,20 +1537,26 @@ test_hmac_shax_std_vectors(struct IMB_MGR *mb_mgr,
                          hmac_sha256_sha512_vectors[idx].hmac_sha384 == NULL) ||
                         (sha_type == 512 &&
                          hmac_sha256_sha512_vectors[idx].hmac_sha512 == NULL);
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("[%d/%d] RFC4231 Test Case %d key_len:%d data_len:%d\n",
-                       vect, vectors_cnt,
-                       hmac_sha256_sha512_vectors[idx].test_case_num,
-                       (int) hmac_sha256_sha512_vectors[idx].key_len,
-                       (int) hmac_sha256_sha512_vectors[idx].data_len);
+                        printf("[%d/%d] RFC4231 Test Case %d key_len:%d "
+                               "data_len:%d\n",
+                               vect, vectors_cnt,
+                               hmac_sha256_sha512_vectors[idx].test_case_num,
+                               (int) hmac_sha256_sha512_vectors[idx].key_len,
+                               (int) hmac_sha256_sha512_vectors[idx].data_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (flag) {
 #ifdef DEBUG
-                        printf("Skipped vector %d, N/A for HMAC-SHA%d\n",
-                               vect, sha_type);
+                        if (!quiet_mode)
+                                printf("Skipped vector %d, "
+                                       "N/A for HMAC-SHA%d\n",
+                                       vect, sha_type);
 #endif
                         continue;
                 }
@@ -1580,7 +1586,8 @@ test_hmac_shax_std_vectors(struct IMB_MGR *mb_mgr,
                 }
 
         }
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From 5112f2b8b043d78c6afc802acead51d3b95c3c52 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:57:42 +0000
Subject: [PATCH 117/332] test: [poly1305] add support for quiet mode

---
 test/poly1305_test.c | 13 ++++++++-----
 1 file changed, 8 insertions(+), 5 deletions(-)

diff --git a/test/poly1305_test.c b/test/poly1305_test.c
index ab2d35d8..39bb218f 100644
--- a/test/poly1305_test.c
+++ b/test/poly1305_test.c
@@ -555,13 +555,15 @@ test_poly1305_vectors(struct IMB_MGR *mb_mgr,
 
 	printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_array_size; vect++) {
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Vector [%d/%d], M len: %d\n",
-                       (int) vect + 1, (int) vec_array_size,
-                       (int) vec_array[vect].msg_len);
+                        printf("Vector [%d/%d], M len: %d\n",
+                               (int) vect + 1, (int) vec_array_size,
+                               (int) vec_array[vect].msg_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_poly1305(mb_mgr, &vec_array[vect],
                                   IMB_DIR_ENCRYPT, num_jobs)) {
@@ -577,7 +579,8 @@ test_poly1305_vectors(struct IMB_MGR *mb_mgr,
                 } else
                         test_suite_update(ctx, 1, 0);
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 
-- 
GitLab


From d9c4cb2fa3bf3bdd8a23d2a788a276b7fc13a5c6 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:57:59 +0000
Subject: [PATCH 118/332] test: [pon] add support for quiet mode

---
 test/pon_test.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/test/pon_test.c b/test/pon_test.c
index 8f6004b4..b30deb4c 100644
--- a/test/pon_test.c
+++ b/test/pon_test.c
@@ -526,8 +526,10 @@ test_pon(struct IMB_MGR *mb_mgr,
         crc_output = (uint32_t) (tag_output >> 32);
 
 #ifdef DEBUG
-        printf("CRC received 0x%08x\n", crc_output);
-        printf("BIP received 0x%08x\n", bip_output);
+        if (!quiet_mode) {
+                printf("CRC received 0x%08x\n", crc_output);
+                printf("BIP received 0x%08x\n", bip_output);
+        }
 #endif
 
 #ifdef DEBUG
@@ -640,14 +642,16 @@ test_pon_std_vectors(struct IMB_MGR *mb_mgr, struct test_suite_context *ctx)
 	printf("PON (AES128-CTR/CRC/BIP) test vectors:\n");
 
 	for (vect = 0; vect < vectors_cnt; vect++) {
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Vector %d/%d CIPHLen:%d BIPLen:%d\n",
-                       vect + 1, vectors_cnt,
-                       (int) pon_vectors[vect].length_to_cipher,
-                       (int) pon_vectors[vect].length_to_bip);
+                        printf("Vector %d/%d CIPHLen:%d BIPLen:%d\n",
+                               vect + 1, vectors_cnt,
+                               (int) pon_vectors[vect].length_to_cipher,
+                               (int) pon_vectors[vect].length_to_bip);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (pon_vectors[vect].key != NULL)
                         IMB_AES_KEYEXP_128(mb_mgr, pon_vectors[vect].key,
@@ -683,7 +687,8 @@ test_pon_std_vectors(struct IMB_MGR *mb_mgr, struct test_suite_context *ctx)
                 } else
                         test_suite_update(ctx, 1, 0);
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 	return errors;
 }
 
-- 
GitLab


From c6454628f1272d74835241e9b601789afdf8b3b2 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:58:28 +0000
Subject: [PATCH 119/332] test: [sha] add support for quiet mode

---
 test/sha_test.c | 18 +++++++++++-------
 1 file changed, 11 insertions(+), 7 deletions(-)

diff --git a/test/sha_test.c b/test/sha_test.c
index 26b5b6a6..bcdba8c6 100644
--- a/test/sha_test.c
+++ b/test/sha_test.c
@@ -554,15 +554,19 @@ test_sha_vectors(struct IMB_MGR *mb_mgr,
 	printf("SHA standard test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
+
 #ifdef DEBUG
-		printf("[%d/%d] SHA%d Test Case %s data_len:%d "
-                       "digest_len:%d\n",
-                       vect, vectors_cnt,
-                       sha_vectors[idx].sha_type,
-                       sha_vectors[idx].test_case,
-                       (int) sha_vectors[idx].data_len,
-                       (int) sha_vectors[idx].digest_len);
+                if (!quiet_mode) {
+                        printf("[%d/%d] SHA%d Test Case %s data_len:%d "
+                               "digest_len:%d\n",
+                               vect, vectors_cnt,
+                               sha_vectors[idx].sha_type,
+                               sha_vectors[idx].test_case,
+                               (int) sha_vectors[idx].data_len,
+                               (int) sha_vectors[idx].digest_len);
+                }
 #endif
+
                 switch (sha_vectors[idx].sha_type) {
                 case 1:
                         ctx = sha1_ctx;
-- 
GitLab


From cea6136d9869b8de95d7b276ab97f58cacb18257 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:59:15 +0000
Subject: [PATCH 120/332] test: [snow3g] fix two line breaks

---
 test/snow3g_test.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/test/snow3g_test.c b/test/snow3g_test.c
index f32f9df7..77ec6501 100644
--- a/test/snow3g_test.c
+++ b/test/snow3g_test.c
@@ -336,8 +336,7 @@ validate_snow3g_f8_1_block(struct IMB_MGR *mb_mgr, uint32_t job_api,
 
         pKeySched = malloc(size);
         if (!pKeySched) {
-                printf("malloc(IMB_SNOW3G_KEY_SCHED_SIZE(mb_mgr)): failed ! "
-                       "\n");
+                printf("malloc(IMB_SNOW3G_KEY_SCHED_SIZE(mb_mgr)): failed!\n");
                 goto snow3g_f8_1_buffer_exit;
         }
 
@@ -511,8 +510,7 @@ validate_snow3g_f8_1_bitblock(struct IMB_MGR *mb_mgr,
 
         pKeySched = malloc(size);
         if (!pKeySched) {
-                printf("malloc(IMB_SNOW3G_KEY_SCHED_SIZE(mb_mgr)): failed ! "
-                       "\n");
+                printf("malloc(IMB_SNOW3G_KEY_SCHED_SIZE(mb_mgr)): failed!\n");
                 goto snow3g_f8_1_buffer_bit_exit;
         }
 
-- 
GitLab


From 2ab4e3e4e269da31835701e84640d28458f50a68 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:59:32 +0000
Subject: [PATCH 121/332] test: [aes-xcbc] add support for quiet mode

---
 test/xcbc_test.c | 17 +++++++++++------
 1 file changed, 11 insertions(+), 6 deletions(-)

diff --git a/test/xcbc_test.c b/test/xcbc_test.c
index 8470879d..05b8e454 100644
--- a/test/xcbc_test.c
+++ b/test/xcbc_test.c
@@ -496,14 +496,18 @@ test_xcbc_std_vectors(struct IMB_MGR *mb_mgr,
 	printf("AES-XCBC-128 standard test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
+
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("Standard XCBC-128 vector [%d/%d] M len: %d, T len:%d\n",
-                       vect, vectors_cnt,
-                       (int) xcbc_vectors[idx].len,
-                       (int) xcbc_vectors[idx].T_len);
+                        printf("Standard XCBC-128 vector [%d/%d] M len: %d, "
+                               "T len:%d\n",
+                               vect, vectors_cnt,
+                               (int) xcbc_vectors[idx].len,
+                               (int) xcbc_vectors[idx].T_len);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 if (test_xcbc(mb_mgr, &xcbc_vectors[idx],
                               IMB_DIR_ENCRYPT, num_jobs)) {
@@ -522,7 +526,8 @@ test_xcbc_std_vectors(struct IMB_MGR *mb_mgr,
                 }
 
 	}
-	printf("\n");
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From 540c26da9d5feaf7cc99b9babae905f00de9018a Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 16:59:56 +0000
Subject: [PATCH 122/332] test: [zuc] add support for quiet mode

---
 test/zuc_test.c | 67 +++++++++++++++++++++++++++++++------------------
 1 file changed, 42 insertions(+), 25 deletions(-)

diff --git a/test/zuc_test.c b/test/zuc_test.c
index 919bd420..dac10d73 100644
--- a/test/zuc_test.c
+++ b/test/zuc_test.c
@@ -505,13 +505,17 @@ test_output(const uint8_t *out, const uint8_t *ref, const uint32_t bytelen,
                         ret = -1;
                 }
 #ifdef DEBUG
-                else
-                        printf("%s : PASS\n", err_msg);
+                else {
+                        if (!quiet_mode)
+                                printf("%s : PASS\n", err_msg);
+                }
 #endif
         }
 #ifdef DEBUG
-        else
-                printf("%s : PASS\n", err_msg);
+        else {
+                if (!quiet_mode)
+                        printf("%s : PASS\n", err_msg);
+        }
 #endif
         fflush(stdout);
 
@@ -894,9 +898,12 @@ int validate_zuc_EIA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                         ret = retTmp;
                 }
 #ifdef DEBUG
-                else
-                        printf("Validate ZUC 1 block  test %u (Int): PASS\n",
-                               i + 1);
+                else {
+                        if (!quiet_mode)
+                                printf("Validate ZUC 1 block  test %u (Int): "
+                                       "PASS\n",
+                                       i + 1);
+                }
 #endif
                 fflush(stdout);
         }
@@ -954,9 +961,12 @@ int validate_zuc_EIA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                                 ret = retTmp;
                         }
 #ifdef DEBUG
-                        else
-                                printf("Validate ZUC n block test %u, index %u "
-                                       "(Int): PASS\n", i + 1, j);
+                        else {
+                                if (!quiet_mode)
+                                        printf("Validate ZUC n block test %u, "
+                                               "index %u (Int): PASS\n",
+                                               i + 1, j);
+                        }
 #endif
                         fflush(stdout);
                 }
@@ -1007,10 +1017,12 @@ int validate_zuc_EIA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                         ret = retTmp;
                 }
 #ifdef DEBUG
-                else
-                        printf("Validate ZUC n block multi-vector test, "
-                               "# jobs = %u, index %u (Int): PASS\n",
-                               numBuffs, i);
+                else {
+                        if (!quiet_mode)
+                                printf("Validate ZUC n block multi-vector test,"
+                                       " #jobs = %u, index %u (Int): PASS\n",
+                                       numBuffs, i);
+                }
 #endif
                 fflush(stdout);
         }
@@ -1051,15 +1063,18 @@ verify_tag_256(void *mac, const struct test256EIA3_vectors_t *vector,
         }
 #ifdef DEBUG
         else {
-                if (multi_vector) {
-                        printf("Validate ZUC-256 n block multi-vector test "
-                               "# jobs = %u, index %u (Int - %u bytes): PASS\n",
-                               test_idx, vector_idx, tag_sz);
-
-                } else {
-                        printf("Validate ZUC-256 n block test %u, "
-                               "index %u (Int - %u bytes): PASS\n",
-                               test_idx + 1, vector_idx, tag_sz);
+                if (!quiet_mode) {
+                        if (multi_vector) {
+                                printf("Validate ZUC-256 n block multi-vector "
+                                       "test #jobs = %u, index %u "
+                                       "(Int - %u bytes): PASS\n",
+                                       test_idx, vector_idx, tag_sz);
+
+                        } else {
+                                printf("Validate ZUC-256 n block test %u, "
+                                       "index %u (Int - %u bytes): PASS\n",
+                                       test_idx + 1, vector_idx, tag_sz);
+                        }
                 }
         }
 #endif
@@ -1161,8 +1176,10 @@ int validate_zuc_algorithm(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                 if (ret)
                         printf("ZUC 1 algorithm test %u: FAIL\n", i);
 #ifdef DEBUG
-                else
-                        printf("ZUC 1 algorithm test %u: PASS\n", i);
+                else {
+                        if (!quiet_mode)
+                                printf("ZUC 1 algorithm test %u: PASS\n", i);
+                }
 #endif
         }
         return ret;
-- 
GitLab


From ea1ba8bc1b3e9e415f5937ea193999d1bf99c8f0 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 22 Feb 2023 17:01:07 +0000
Subject: [PATCH 123/332] test: [custom] add support for quiet mode

---
 test/customop_test.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

diff --git a/test/customop_test.c b/test/customop_test.c
index 5127c8a2..eb35dec0 100644
--- a/test/customop_test.c
+++ b/test/customop_test.c
@@ -36,11 +36,13 @@
 
 #ifdef DEBUG
 #ifdef _WIN32
-#define TRACE(fmt, ...)	fprintf(stderr, "%s:%d "fmt, \
-                                __FUNCTION__, __LINE__, __VA_ARGS__)
+#define TRACE(fmt, ...)	if (!quiet_mode)                                \
+                fprintf(stderr, "%s:%d "fmt,                            \
+                        __FUNCTION__, __LINE__, __VA_ARGS__)
 #else
-#define TRACE(fmt, ...)	fprintf(stderr, "%s:%d "fmt, \
-                                __func__, __LINE__, __VA_ARGS__)
+#define TRACE(fmt, ...)	if (!quiet_mode)                                \
+                fprintf(stderr, "%s:%d "fmt,                            \
+                        __func__, __LINE__, __VA_ARGS__)
 #endif
 #else
 # define TRACE(fmt, ...)
-- 
GitLab


From 12048b698900ab3f1bf83397aa891066f1113253 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 24 Feb 2023 19:18:42 +0000
Subject: [PATCH 124/332] test: [QUIC-HP-AES-ECB] change test suite name to
 avoid spaces

---
 test/quic_ecb_test.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/test/quic_ecb_test.c b/test/quic_ecb_test.c
index 3b7e29ee..21ea3e74 100644
--- a/test/quic_ecb_test.c
+++ b/test/quic_ecb_test.c
@@ -291,14 +291,14 @@ quic_ecb_test(struct IMB_MGR *mb_mgr)
         unsigned i;
         int errors = 0;
 
-        test_suite_start(&ts128, "QUIC HP AES-ECB-128");
-        test_suite_start(&ts192, "QUIC HP AES-ECB-192");
-        test_suite_start(&ts256, "QUIC HP AES-ECB-256");
+        test_suite_start(&ts128, "QUIC-HP-AES-ECB-128");
+        test_suite_start(&ts192, "QUIC-HP-AES-ECB-192");
+        test_suite_start(&ts256, "QUIC-HP-AES-ECB-256");
 
         for (i = 0; i < DIM(num_jobs_tab); i++)
                 test_quic_ecb_vectors(mb_mgr, DIM(quic_ecb_vectors),
                                       quic_ecb_vectors,
-                                      "QUIC HP AES-ECB test vectors",
+                                      "QUIC-HP-AES-ECB test vectors",
                                       num_jobs_tab[i],
                                       &ts128, &ts192, &ts256);
 
-- 
GitLab


From e29262d3e4968d16e122b209a98ebe2a88031ad4 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 24 Feb 2023 19:25:38 +0000
Subject: [PATCH 125/332] test: [quic-hp-aes-ecb] add support for quiet mode

---
 test/quic_ecb_test.c | 14 +++++++++-----
 1 file changed, 9 insertions(+), 5 deletions(-)

diff --git a/test/quic_ecb_test.c b/test/quic_ecb_test.c
index 21ea3e74..97442a7a 100644
--- a/test/quic_ecb_test.c
+++ b/test/quic_ecb_test.c
@@ -233,13 +233,15 @@ test_quic_ecb_vectors(struct IMB_MGR *mb_mgr, const int vec_cnt,
 	for (vect = 0; vect < vec_cnt; vect++) {
                 struct test_suite_context *ctx = NULL;
 
+                if (!quiet_mode) {
 #ifdef DEBUG
-		printf("[%d/%d] Standard vector key_len:%d\n",
-                       vect + 1, vec_cnt,
-                       (int) vec_tab[vect].Klen);
+                        printf("[%d/%d] Standard vector key_len:%d\n",
+                               vect + 1, vec_cnt,
+                               (int) vec_tab[vect].Klen);
 #else
-		printf(".");
+                        printf(".");
 #endif
+                }
 
                 switch (vec_tab[vect].Klen) {
                 case 16:
@@ -278,7 +280,9 @@ test_quic_ecb_vectors(struct IMB_MGR *mb_mgr, const int vec_cnt,
                         test_suite_update(ctx, 1, 0);
                 }
 	}
-	printf("\n");
+
+        if (!quiet_mode)
+                printf("\n");
 }
 
 int
-- 
GitLab


From 5fdce7dae1311089f85aa8f0105804dfd536f1b0 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Mon, 27 Feb 2023 16:46:41 +0000
Subject: [PATCH 126/332] test: [fuzz] fuzz crc direct api

---
 test/direct_api_fuzz_test.c | 113 ++++++++++++++++++++++++++++++++++++
 1 file changed, 113 insertions(+)

diff --git a/test/direct_api_fuzz_test.c b/test/direct_api_fuzz_test.c
index 4211d107..5c373b66 100644
--- a/test/direct_api_fuzz_test.c
+++ b/test/direct_api_fuzz_test.c
@@ -699,6 +699,107 @@ static void test_chacha_poly_dec(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
         IMB_CHACHA20_POLY1305_DEC_FINALIZE(p_mgr, ctx, auth_tag, tag_len);
 }
 
+static void test_crc32_ethernet_fcs(IMB_MGR *p_mgr, uint8_t *buff,
+                                    size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC32_ETHERNET_FCS(p_mgr, in, len);
+}
+
+static void test_crc16_x25(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC16_X25(p_mgr, in, len);
+}
+
+static void test_crc32_sctp(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC32_SCTP(p_mgr, in, len);
+}
+
+static void test_crc24_lte_a(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC24_LTE_A(p_mgr, in, len);
+}
+
+static void test_crc24_lte_b(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC24_LTE_B(p_mgr, in, len);
+}
+
+static void test_crc16_fp_data(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC16_FP_DATA(p_mgr, in, len);
+}
+
+static void test_crc11_fp_header(IMB_MGR *p_mgr, uint8_t *buff,
+                                 size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC11_FP_HEADER(p_mgr, in, len);
+}
+
+static void test_crc7_fp_header(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC7_FP_HEADER(p_mgr, in, len);
+}
+
+static void test_crc10_iuup_data(IMB_MGR *p_mgr, uint8_t *buff,
+                                 size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC10_IUUP_DATA(p_mgr, in, len);
+}
+
+static void test_crc6_iuup_header(IMB_MGR *p_mgr, uint8_t *buff,
+                                  size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC6_IUUP_HEADER(p_mgr, in, len);
+}
+
+static void test_crc32_wimax_ofdma_data(IMB_MGR *p_mgr, uint8_t *buff,
+                                        size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC32_WIMAX_OFDMA_DATA(p_mgr, in, len);
+}
+
+static void test_crc8_wimax_ofdma_hcs(IMB_MGR *p_mgr, uint8_t *buff,
+                                      size_t dataSize)
+{
+        const void *in = buff;
+        const uint64_t len = dataSize;
+
+        IMB_CRC8_WIMAX_OFDMA_HCS(p_mgr, in, len);
+}
 
 struct {
         void (*func)(IMB_MGR *mb_mgr, uint8_t *buff, size_t dataSize);
@@ -733,6 +834,18 @@ struct {
         {test_zuc_eia3_n_buff, "test_zuc_eia3_n_buff"},
         {test_chacha_poly_enc, "test_chacha_poly_enc"},
         {test_chacha_poly_dec, "test_chacha_poly_dec"},
+        {test_crc32_ethernet_fcs, "test_crc32_ethernet_fcs"},
+        {test_crc16_x25, "test_crc16_x25"},
+        {test_crc32_sctp, "test_crc32_sctp"},
+        {test_crc16_fp_data, "test_crc16_fp_data"},
+        {test_crc11_fp_header, "test_crc11_fp_header"},
+        {test_crc24_lte_a, "test_crc24_lte_a"},
+        {test_crc24_lte_b, "test_crc24_lte_b"},
+        {test_crc7_fp_header, "test_crc7_fp_header"},
+        {test_crc10_iuup_data, "test_crc10_iuup_data"},
+        {test_crc6_iuup_header, "test_crc6_iuup_header"},
+        {test_crc32_wimax_ofdma_data, "test_crc32_wimax_ofdma_data"},
+        {test_crc8_wimax_ofdma_hcs, "test_crc8_wimax_ofdma_hcs"},
 };
 
 int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
-- 
GitLab


From 39bf6312f7e6eea8873400848c2350a9492d15a0 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 27 Feb 2023 13:11:35 +0000
Subject: [PATCH 127/332] lib: use memalign() instead of posix_memalign()

---
 lib/x86_64/alloc.c | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

diff --git a/lib/x86_64/alloc.c b/lib/x86_64/alloc.c
index 191d4ee8..422ee1f1 100644
--- a/lib/x86_64/alloc.c
+++ b/lib/x86_64/alloc.c
@@ -27,7 +27,8 @@
 
 #include <stdint.h>
 #ifdef LINUX
-#include <stdlib.h> /* posix_memalign() and free() */
+#include <stdlib.h> /* free() */
+#include <malloc.h> /* memalign() */
 #else
 #include <malloc.h> /* _aligned_malloc() and aligned_free() */
 #endif
@@ -247,14 +248,11 @@ alloc_aligned_mem(const size_t size)
         void *ptr;
 
 #ifdef LINUX
-        if (posix_memalign((void **)&ptr, ALIGNMENT, size))
-                return NULL;
+        ptr = memalign(ALIGNMENT, size);
 #else
         ptr = _aligned_malloc(size, ALIGNMENT);
 #endif
 
-        IMB_ASSERT(ptr != NULL);
-
         return ptr;
 }
 
-- 
GitLab


From e1145bba703fb97b6f24041700a19275991c62a4 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 27 Feb 2023 16:24:28 +0000
Subject: [PATCH 128/332] lib: [error] replace static assert to comply with C99

---
 lib/x86_64/error.c | 9 ++++-----
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/lib/x86_64/error.c b/lib/x86_64/error.c
index 24dcded3..69b25c59 100644
--- a/lib/x86_64/error.c
+++ b/lib/x86_64/error.c
@@ -95,13 +95,12 @@ IMB_DLL_LOCAL const int imb_errno_types[] = {
         IMB_ERR_SELFTEST
 };
 
-#ifdef DEBUG
-static_assert((IMB_DIM(imb_errno_types) + 1) == (IMB_ERR_MAX - IMB_ERR_MIN),
-              "imb_errno_types[] mismatch vs enum IMB_ERR");
-#endif
-
 int imb_get_errno(IMB_MGR *mb_mgr)
 {
+        /* check for imb_errno_types[] mismatch vs enum IMB_ERR */
+        IMB_ASSERT((IMB_DIM(imb_errno_types) + 1) ==
+                   (IMB_ERR_MAX - IMB_ERR_MIN));
+
         /* try get IMB_MGR error status first */
         if (mb_mgr != NULL && mb_mgr->imb_errno)
                 return mb_mgr->imb_errno;
-- 
GitLab


From 20c28f8b4af1d6901d6777af76a9408deacc64be Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 27 Feb 2023 13:14:04 +0000
Subject: [PATCH 129/332] lib: move cpuid function into assembly module

---
 lib/Makefile             |  3 +-
 lib/win_x64.mak          |  1 +
 lib/x86_64/cpu_feature.c | 39 +++-------------------
 lib/x86_64/mbcpuid.asm   | 72 ++++++++++++++++++++++++++++++++++++++++
 4 files changed, 80 insertions(+), 35 deletions(-)
 create mode 100644 lib/x86_64/mbcpuid.asm

diff --git a/lib/Makefile b/lib/Makefile
index dc758b4e..724e87cf 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -346,7 +346,8 @@ asm_generic_lib_objs := \
 	crc32_refl_const.o \
 	crc32_const.o \
 	poly1305.o \
-	chacha20_poly1305.o
+	chacha20_poly1305.o \
+	mbcpuid.o \
 
 #
 # List of ASM modules (no-aesni directory)
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 302e19fb..5f830d65 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -219,6 +219,7 @@ lib_objs1 = \
 	$(OBJ_DIR)\md5_x4x2_sse.obj \
 	$(OBJ_DIR)\md5_x8x2_avx2.obj \
 	$(OBJ_DIR)\save_xmms.obj \
+	$(OBJ_DIR)\mbcpuid.obj \
 	$(OBJ_DIR)\clear_regs_mem_fns.obj \
 	$(OBJ_DIR)\sha1_x4_avx.obj \
 	$(OBJ_DIR)\sha1_x4_sse.obj \
diff --git a/lib/x86_64/cpu_feature.c b/lib/x86_64/cpu_feature.c
index 3421ad2a..19c11814 100644
--- a/lib/x86_64/cpu_feature.c
+++ b/lib/x86_64/cpu_feature.c
@@ -26,9 +26,6 @@
 *******************************************************************************/
 
 #include <stdint.h>
-#ifdef __WIN32
-#include <intrin.h>
-#endif
 
 #include "cpu_feature.h"
 
@@ -51,33 +48,7 @@ static struct cpuid_regs cpuid_7_1;
  *    [in] subleaf - CPUID sub-leaf number (ECX)
  *    [out] out    - registers structure to store results of CPUID into
  */
-static void
-__mbcpuid(const unsigned leaf, const unsigned subleaf, struct cpuid_regs *out)
-{
-#ifdef _WIN32
-        /* Windows */
-        int regs[4];
-
-        __cpuidex(regs, leaf, subleaf);
-        out->eax = regs[0];
-        out->ebx = regs[1];
-        out->ecx = regs[2];
-        out->edx = regs[3];
-#else
-        /* Linux */
-        asm volatile("mov %4, %%eax\n\t"
-                     "mov %5, %%ecx\n\t"
-                     "cpuid\n\t"
-                     "mov %%eax, %0\n\t"
-                     "mov %%ebx, %1\n\t"
-                     "mov %%ecx, %2\n\t"
-                     "mov %%edx, %3\n\t"
-                     : "=g" (out->eax), "=g" (out->ebx), "=g" (out->ecx),
-                       "=g" (out->edx)
-                     : "g" (leaf), "g" (subleaf)
-                     : "%eax", "%ebx", "%ecx", "%edx");
-#endif /* Linux */
-}
+void mbcpuid(const unsigned leaf, const unsigned subleaf, struct cpuid_regs *out);
 
 static uint32_t detect_shani(void)
 {
@@ -223,18 +194,18 @@ uint64_t cpu_feature_detect(void)
         unsigned i;
 
         /* Get highest supported CPUID leaf number */
-        __mbcpuid(0x0, 0x0, &r);
+        mbcpuid(0x0, 0x0, &r);
         hi_leaf_number = r.eax;
 
         /* Get the most common CPUID leafs to speed up the detection */
         if (hi_leaf_number >= 1)
-                __mbcpuid(0x1, 0x0, &cpuid_1_0);
+                mbcpuid(0x1, 0x0, &cpuid_1_0);
 
         if (hi_leaf_number >= 7)
-                __mbcpuid(0x7, 0x0, &cpuid_7_0);
+                mbcpuid(0x7, 0x0, &cpuid_7_0);
 
         if (hi_leaf_number >= 7)
-                __mbcpuid(0x7, 0x1, &cpuid_7_1);
+                mbcpuid(0x7, 0x1, &cpuid_7_1);
 
         for (i = 0; i < IMB_DIM(feat_tab); i++) {
                 if (hi_leaf_number < feat_tab[i].req_leaf_number)
diff --git a/lib/x86_64/mbcpuid.asm b/lib/x86_64/mbcpuid.asm
new file mode 100644
index 00000000..fc5c873d
--- /dev/null
+++ b/lib/x86_64/mbcpuid.asm
@@ -0,0 +1,72 @@
+;;
+;; Copyright (c) 2023, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+
+;; function to wrap cpuid opcode across OS versions
+%include "include/os.inc"
+%include "include/reg_sizes.inc"
+
+%ifdef LINUX
+%define arg1		rdi
+%define arg2	        rsi
+%define arg3            rdx
+%else
+%define arg1		rcx
+%define arg2	        rdx
+%define arg3            r8
+%endif
+
+mksection .text
+
+;;
+;; Wrapper for CPUID opcode
+;;
+;; Parameters:
+;;    [in] leaf    - CPUID leaf number (EAX)
+;;    [in] subleaf - CPUID sub-leaf number (ECX)
+;;    [out] out    - registers structure to store results of CPUID into
+;;
+;; void mbcpuid(const unsigned leaf, const unsigned subleaf, struct cpuid_regs *out)
+
+MKGLOBAL(mbcpuid,function,internal)
+mbcpuid:
+        push    rbx
+
+        mov     r11, arg3       ;; arg3 will get overwritten with cpuid on sysv
+        mov     eax, DWORD(arg1)
+        mov     ecx, DWORD(arg2)
+
+        cpuid
+
+        mov     [r11 + 0*4], eax
+        mov     [r11 + 1*4], ebx
+        mov     [r11 + 2*4], ecx
+        mov     [r11 + 3*4], edx
+
+        pop     rbx
+        ret
+
+mksection stack-noexec
-- 
GitLab


From 7ef57aa521132911110dbf3fac64e9ef3c8d4501 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 27 Feb 2023 13:32:53 +0000
Subject: [PATCH 130/332] test: move cpuid function into assembly module

---
 test/misc.asm | 54 +++++++++++++++++++++++++++++++++++++++++++--------
 test/misc.h   | 34 ++------------------------------
 2 files changed, 48 insertions(+), 40 deletions(-)

diff --git a/test/misc.asm b/test/misc.asm
index f5e5b54f..7c3500d3 100644
--- a/test/misc.asm
+++ b/test/misc.asm
@@ -36,10 +36,15 @@
 %define MKGLOBAL(name,type,scope) global name %+ : %+ type scope
 
 ;;; ABI function arguments
-%define arg1 rdi
-%define arg2 rsi
-%define arg3 rdx
-%define arg4 rcx
+%define arg1    rdi
+%define arg2    rsi
+%define arg3    rdx
+%define arg4    rcx
+
+%define arg1d   edi
+%define arg2d   esi
+%define arg3d   edx
+%define arg4d   ecx
 %endif
 
 %ifdef WIN_ABI
@@ -50,10 +55,15 @@
 %define MKGLOBAL(name,type,scope) global name
 
 ;;; ABI function arguments
-%define arg1 rcx
-%define arg2 rdx
-%define arg3 r8
-%define arg4 r9
+%define arg1    rcx
+%define arg2    rdx
+%define arg3    r8
+%define arg4    r9
+
+%define arg1d   ecx
+%define arg2d   edx
+%define arg3d   r8d
+%define arg4d   r9d
 %endif
 
 section .bss
@@ -342,6 +352,34 @@ clr_scratch_zmms:
 
         ret
 
+;;
+;; Wrapper for CPUID opcode
+;;
+;; Parameters:
+;;    [in] leaf    - CPUID leaf number (EAX)
+;;    [in] subleaf - CPUID sub-leaf number (ECX)
+;;    [out] out    - registers structure to store results of CPUID into
+;;
+;; void misc_cpuid(const unsigned leaf, const unsigned subleaf, struct cpuid_regs *out)
+
+MKGLOBAL(misc_cpuid,function,internal)
+misc_cpuid:
+        push    rbx
+
+        mov     r11, arg3       ;; arg3 will get overwritten by cpuid on sysv
+        mov     eax, arg1d
+        mov     ecx, arg2d
+
+        cpuid
+
+        mov     [r11 + 0*4], eax
+        mov     [r11 + 1*4], ebx
+        mov     [r11 + 2*4], ecx
+        mov     [r11 + 3*4], edx
+
+        pop     rbx
+        ret
+
 %ifdef LINUX
 section .note.GNU-stack noalloc noexec nowrite progbits
 %endif
diff --git a/test/misc.h b/test/misc.h
index 99539620..4581ea43 100644
--- a/test/misc.h
+++ b/test/misc.h
@@ -25,10 +25,6 @@
  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *****************************************************************************/
 
-#ifdef __WIN32
-#include <intrin.h>
-#endif
-
 #include <intel-ipsec-mb.h>
 
 #ifndef XVALIDAPP_MISC_H
@@ -94,34 +90,8 @@ struct misc_cpuid_regs {
  * @param subleaf[in] CPUID sub-leaf number (ECX)
  * @param out[out]    registers structure to store results of CPUID into
  */
-static void
-misc_cpuid(const unsigned leaf, const unsigned subleaf,
-           struct misc_cpuid_regs *out)
-{
-#ifdef _WIN32
-        /* Windows */
-        int regs[4];
-
-        __cpuidex(regs, leaf, subleaf);
-        out->eax = regs[0];
-        out->ebx = regs[1];
-        out->ecx = regs[2];
-        out->edx = regs[3];
-#else
-        /* Linux */
-        asm volatile("mov %4, %%eax\n\t"
-                     "mov %5, %%ecx\n\t"
-                     "cpuid\n\t"
-                     "mov %%eax, %0\n\t"
-                     "mov %%ebx, %1\n\t"
-                     "mov %%ecx, %2\n\t"
-                     "mov %%edx, %3\n\t"
-                     : "=g" (out->eax), "=g" (out->ebx), "=g" (out->ecx),
-                       "=g" (out->edx)
-                     : "g" (leaf), "g" (subleaf)
-                     : "%eax", "%ebx", "%ecx", "%edx");
-#endif /* Linux */
-}
+void misc_cpuid(const unsigned leaf, const unsigned subleaf,
+                struct misc_cpuid_regs *out);
 
 /**
  * @brief Detects if XGETBV instruction is available to use.
-- 
GitLab


From 03c237617f48267152fb746a1c38894651865e59 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 24 Feb 2023 14:16:25 +0000
Subject: [PATCH 131/332] build: select C99/C11 C standard version

Select C99 on Linux, FreeBSD and Windows Mingw.

Select C11 on Windows with Microsoft (R) C/C++ Optimizing Compiler Version.
C99 standard option is not supported with this compiler.
- disable C5105 warning in msr.c and ipsec_perf.c that appears with C11 and
  including standard headers
---
 lib/Makefile             | 2 +-
 lib/cmake/unix.cmake     | 2 +-
 lib/cmake/windows.cmake  | 2 +-
 lib/win_x64.mak          | 2 +-
 perf/Makefile            | 2 +-
 perf/ipsec_perf.c        | 5 +++++
 perf/msr.c               | 5 +++++
 perf/win_x64.mak         | 2 +-
 test/Makefile            | 2 +-
 test/cmake/unix.cmake    | 2 +-
 test/cmake/windows.cmake | 2 +-
 test/win_x64.mak         | 2 +-
 12 files changed, 20 insertions(+), 10 deletions(-)

diff --git a/lib/Makefile b/lib/Makefile
index 724e87cf..53b70f9e 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -113,7 +113,7 @@ CFLAGS := -fPIC -DNO_COMPAT_IMB_API_053 $(EXTRA_CFLAGS) $(INCLUDES) \
 	-Wformat -Wformat-security \
 	-Wunreachable-code -Wmissing-noreturn -Wsign-compare -Wno-endif-labels \
 	-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition \
-	-fno-delete-null-pointer-checks -fwrapv
+	-fno-delete-null-pointer-checks -fwrapv -std=c99
 
 # -fno-strict-overflow is not supported by clang
 ifneq ($(CC),clang)
diff --git a/lib/cmake/unix.cmake b/lib/cmake/unix.cmake
index 27596c3a..39374fdb 100644
--- a/lib/cmake/unix.cmake
+++ b/lib/cmake/unix.cmake
@@ -47,7 +47,7 @@ set(CMAKE_C_FLAGS
 -Wformat-security -Wunreachable-code -Wmissing-noreturn \
 -Wsign-compare -Wno-endif-labels -Wstrict-prototypes \
 -Wmissing-prototypes -Wold-style-definition \
--fno-delete-null-pointer-checks -fwrapv")
+-fno-delete-null-pointer-checks -fwrapv -std=c99")
 if(${CMAKE_SYSTEM_NAME} MATCHES "Linux")
     string(APPEND CMAKE_C_FLAGS " -MMD")
 endif()
diff --git a/lib/cmake/windows.cmake b/lib/cmake/windows.cmake
index c38e6c0f..02065bea 100644
--- a/lib/cmake/windows.cmake
+++ b/lib/cmake/windows.cmake
@@ -46,7 +46,7 @@ set_source_files_properties(${SRC_FILES_ASM} PROPERTIES
   COMPILE_FLAGS "$<$<CONFIG:DEBUG>:-gcv8>")
 
 # set C compiler flags
-set(CMAKE_C_FLAGS "/nologo /Y- /W3 /WX- /Gm- /fp:precise /EHsc")
+set(CMAKE_C_FLAGS "/nologo /Y- /W3 /WX- /Gm- /fp:precise /EHsc /std:c11")
 set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
 set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
 set(CMAKE_SHARED_LINKER_FLAGS "/nologo")
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 5f830d65..6a923a7e 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -113,7 +113,7 @@ DAFLAGS = $(DAFLAGS) -DAESNI_EMU
 CC = cl
 
 CFLAGS_ALL = $(EXTRA_CFLAGS) /DNO_COMPAT_IMB_API_053 /I. /Iinclude /Ino-aesni \
-	/nologo /Y- /W3 /WX- /Gm- /fp:precise /EHsc /Z7
+	/nologo /Y- /W3 /WX- /Gm- /fp:precise /EHsc /Z7 /std:c11
 
 CFLAGS = $(CFLAGS_ALL) $(OPT) $(DCFLAGS)
 CFLAGS_NO_SIMD = $(CFLAGS_ALL) /Od $(DCFLAGS)
diff --git a/perf/Makefile b/perf/Makefile
index 30fde162..e396e97a 100644
--- a/perf/Makefile
+++ b/perf/Makefile
@@ -36,7 +36,7 @@ CFLAGS = -D_GNU_SOURCE -DNO_COMPAT_IMB_API_053 $(INCLUDES) \
 	-Wformat -Wformat-security \
 	-Wunreachable-code -Wmissing-noreturn -Wsign-compare -Wno-endif-labels \
 	-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition \
-	-pthread -fno-delete-null-pointer-checks -fwrapv
+	-pthread -fno-delete-null-pointer-checks -fwrapv -std=c99
 
 # -fno-strict-overflow is not supported by clang
 ifneq ($(CC),clang)
diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index 7cc47db7..db7c6e9b 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -38,6 +38,11 @@
 #include <sys/time.h>
 #endif
 
+#ifdef _MSC_VER
+/* disable C5105 warning produced by standard headers C11 C standard */
+#pragma warning(disable : 5105)
+#endif
+
 #ifdef _WIN32
 #include <malloc.h> /* memalign() or _aligned_malloc()/aligned_free() */
 #include <windows.h>
diff --git a/perf/msr.c b/perf/msr.c
index e546f7db..b0e9df6c 100644
--- a/perf/msr.c
+++ b/perf/msr.c
@@ -35,6 +35,11 @@
 #include <stdlib.h>
 #include <string.h>
 
+#ifdef _MSC_VER
+/* disable C5105 warning produced by standard headers C11 C standard */
+#pragma warning(disable : 5105)
+#endif
+
 #ifndef _WIN32
 #include <unistd.h>
 #include <sys/types.h>
diff --git a/perf/win_x64.mak b/perf/win_x64.mak
index 2f28549c..6e8eb009 100644
--- a/perf/win_x64.mak
+++ b/perf/win_x64.mak
@@ -63,7 +63,7 @@ DLFLAGS =
 CC = cl
 
 # _CRT_SECURE_NO_WARNINGS disables warning C4996 about insecure strtok() being used
-CFLAGS = /nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR)
+CFLAGS = /nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR) /std:c11
 
 LNK = link
 LFLAGS = /out:$(APP).exe $(DLFLAGS)
diff --git a/test/Makefile b/test/Makefile
index 9b9618a1..393218d7 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -45,7 +45,7 @@ CFLAGS = -MMD -D_GNU_SOURCE -DNO_COMPAT_IMB_API_053 \
 	-Wformat -Wformat-security \
 	-Wunreachable-code -Wmissing-noreturn -Wsign-compare -Wno-endif-labels \
 	-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition \
-	-fno-delete-null-pointer-checks -fwrapv
+	-fno-delete-null-pointer-checks -fwrapv -std=c99
 
 # -fno-strict-overflow is not supported by clang
 ifneq ($(CC),clang)
diff --git a/test/cmake/unix.cmake b/test/cmake/unix.cmake
index 9be85a76..153afd46 100644
--- a/test/cmake/unix.cmake
+++ b/test/cmake/unix.cmake
@@ -42,7 +42,7 @@ set(CMAKE_C_FLAGS
 -Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
 -Wformat-security -Wunreachable-code -Wmissing-noreturn -Wsign-compare \
 -Wno-endif-labels -Wstrict-prototypes -Wmissing-prototypes \
--Wold-style-definition -fno-delete-null-pointer-checks -fwrapv")
+-Wold-style-definition -fno-delete-null-pointer-checks -fwrapv -std=c99")
 if(${CMAKE_SYSTEM_NAME} MATCHES "Linux")
     string(APPEND CMAKE_C_FLAGS " -MMD")
 endif()
diff --git a/test/cmake/windows.cmake b/test/cmake/windows.cmake
index 2c0d5316..b648dc94 100644
--- a/test/cmake/windows.cmake
+++ b/test/cmake/windows.cmake
@@ -34,7 +34,7 @@ set(IPSEC_MB_LIB libIPSec_MB)
 set(CMAKE_ASM_NASM_FLAGS "-Werror -fwin64 -Xvc -DWIN_ABI")
 
 # set C compiler flags
-set(CMAKE_C_FLAGS "/nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc ${EXTRA_CFLAGS}")
+set(CMAKE_C_FLAGS "/nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc /std:c11 ${EXTRA_CFLAGS}")
 set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
 set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
 set(CMAKE_EXE_LINKER_FLAGS_DEBUG "/debug")
diff --git a/test/win_x64.mak b/test/win_x64.mak
index 4954422a..720553ba 100644
--- a/test/win_x64.mak
+++ b/test/win_x64.mak
@@ -60,7 +60,7 @@ DLFLAGS =
 CC = cl
 
 # _CRT_SECURE_NO_WARNINGS disables warning C4996 about insecure snprintf() being used
-CFLAGS = /nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR)
+CFLAGS = /nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR) /std:c11
 
 #linker
 LNK = link
-- 
GitLab


From b47d549d97dfa70be7d33a7adfd03796998d54c0 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 24 Feb 2023 14:27:15 +0000
Subject: [PATCH 132/332] doc: update Windows tool chain version

---
 README.md | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/README.md b/README.md
index 37940bbd..a6c7110b 100644
--- a/README.md
+++ b/README.md
@@ -349,11 +349,11 @@ Windows MSVS (x64 only)
 ------------------
 
 Required tools:  
-- Microsoft (R) Visual Studio 2015:  
-  - NMAKE: Microsoft (R) Program Maintenance Utility Version 14.00.24210.0  
-  - CL: Microsoft (R) C/C++ Optimizing Compiler Version 19.00.24215.1 for x64  
-  - LIB: Microsoft (R) Library Manager Version 14.00.24215.1  
-  - LINK: Microsoft (R) Incremental Linker Version 14.00.24215.1  
+- Microsoft (R) Visual Studio 2019:  
+  - NMAKE: Microsoft (R) Program Maintenance Utility Version 14.29.30148.0  
+  - CL: Microsoft (R) C/C++ Optimizing Compiler Version 19.29.30148 for x64  
+  - LIB: Microsoft (R) Library Manager Version 14.29.30148.0  
+  - LINK: Microsoft (R) Incremental Linker Version 14.29.30148.0  
   - Note: Building on later versions should work but is not verified  
 - NASM version 2.14 (or newer)  
 
-- 
GitLab


From 986cb00f061cab1e663a6cf9e011cfd2f4c38679 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Fri, 24 Feb 2023 17:07:15 +0000
Subject: [PATCH 133/332] lib: opad/ipad for sha224-sha512

---
 lib/intel-ipsec-mb.h           |  14 +-
 lib/libIPSec_MB.def            |   2 +-
 lib/x86_64/hmac_ipad_opad.c    | 108 ++++++++++++--
 lib/x86_64/self_test.c         |  63 +--------
 test/acvp_app_main.c           | 111 ++-------------
 test/chained_test.c            |   3 +-
 test/hmac_md5_test.c           |  44 ++----
 test/hmac_sha1_test.c          |  12 +-
 test/hmac_sha256_sha512_test.c | 250 +++------------------------------
 test/ipsec_xvalid.c            |  71 +---------
 test/wycheproof/wycheproof.c   |  86 ++----------
 11 files changed, 173 insertions(+), 591 deletions(-)

diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 8cb2bf9f..e5645956 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -140,11 +140,16 @@ typedef enum {
 #define IMB_SHA384_DIGEST_SIZE_IN_BYTES 48
 #define IMB_SHA512_DIGEST_SIZE_IN_BYTES 64
 
+#define IMB_MD5_DIGEST_SIZE_IN_BYTES 16
+
 #define IMB_SHA1_BLOCK_SIZE 64    /**< 512 bits is 64 byte blocks */
+#define IMB_SHA_224_BLOCK_SIZE 64 /**< 512 bits is 64 byte blocks */
 #define IMB_SHA_256_BLOCK_SIZE 64 /**< 512 bits is 64 byte blocks */
 #define IMB_SHA_384_BLOCK_SIZE 128
 #define IMB_SHA_512_BLOCK_SIZE 128
 
+#define IMB_MD5_BLOCK_SIZE 64
+
 #define IMB_KASUMI_KEY_SIZE         16
 #define IMB_KASUMI_IV_SIZE          8
 #define IMB_KASUMI_BLOCK_SIZE       8
@@ -2682,18 +2687,19 @@ IMB_DLL_EXPORT int
 des_key_schedule(uint64_t *ks, const void *key);
 
 /**
- * @brief Ipad Opad padding for sha1
+ * @brief Ipad Opad padding for HMAC
  *
  * @param [in] mb_mgr           Pointer to initialized IMB_MGR structure
+ * @param [in] sha_type         Type of HMAC_SHA from IMB_HASH_ALG enum
  * @param [in] pkey             Pointer to a HMAC key
  * @param [in] key_len          Length of the HMAC key
  * @param [out] ipad_hash       Block-sized inner padding
  * @param [out] opad_hash       Block-sized outer padding
  */
 IMB_DLL_EXPORT void
-imb_ipad_opad_sha1(struct IMB_MGR *mb_mgr, const void *pkey,
-                   const size_t key_len, void *ipad_hash,
-                   void *opad_hash);
+imb_hmac_ipad_opad(struct IMB_MGR *mb_mgr, const IMB_HASH_ALG sha_type,
+                   const void *pkey, const size_t key_len,
+                   void *ipad_hash, void *opad_hash);
 
 /**
  * @brief DES-CFB Encrypt/Decrypt up to one block.
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index bc05a2f3..33866563 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -700,4 +700,4 @@ EXPORTS
     aes_cfb_256_one_sse_no_aesni		@674
     imb_quic_aes_gcm				@675
     imb_quic_hp_aes_ecb				@676
-    imb_ipad_opad_sha1		                @677
+    imb_hmac_ipad_opad                          @677
diff --git a/lib/x86_64/hmac_ipad_opad.c b/lib/x86_64/hmac_ipad_opad.c
index 46b11100..c47d2a99 100644
--- a/lib/x86_64/hmac_ipad_opad.c
+++ b/lib/x86_64/hmac_ipad_opad.c
@@ -35,9 +35,9 @@
 
 IMB_DLL_EXPORT
 void
-imb_ipad_opad_sha1(struct IMB_MGR *mb_mgr, const void *pkey,
-                   const size_t key_len, void *ipad_hash,
-                   void *opad_hash)
+imb_hmac_ipad_opad(struct IMB_MGR *mb_mgr, const IMB_HASH_ALG sha_type,
+                   const void *pkey,const size_t key_len,
+                   void *ipad_hash, void *opad_hash)
 {
 #ifdef SAFE_PARAM
         imb_set_errno(NULL, 0);
@@ -51,32 +51,118 @@ imb_ipad_opad_sha1(struct IMB_MGR *mb_mgr, const void *pkey,
         }
 #endif
         uint32_t i = 0;
-        const size_t local_key_len = (key_len <= IMB_SHA1_BLOCK_SIZE) ?
-                                        key_len : IMB_SHA1_DIGEST_SIZE_IN_BYTES;
-        uint8_t key[IMB_SHA1_BLOCK_SIZE];
-        uint8_t buf[IMB_SHA1_BLOCK_SIZE];
+        size_t local_key_len = 0;
+
+        switch (sha_type) {
+        case IMB_AUTH_HMAC_SHA_1:
+                local_key_len = (key_len <= IMB_SHA1_BLOCK_SIZE) ?
+                                 key_len : IMB_SHA1_DIGEST_SIZE_IN_BYTES;
+                break;
+        case IMB_AUTH_HMAC_SHA_224:
+                local_key_len = (key_len <= IMB_SHA_224_BLOCK_SIZE) ?
+                                 key_len : IMB_SHA224_DIGEST_SIZE_IN_BYTES;
+                break;
+        case IMB_AUTH_HMAC_SHA_256:
+                local_key_len = (key_len <= IMB_SHA_256_BLOCK_SIZE) ?
+                                 key_len : IMB_SHA256_DIGEST_SIZE_IN_BYTES;
+                break;
+        case IMB_AUTH_HMAC_SHA_384:
+                local_key_len = (key_len <= IMB_SHA_384_BLOCK_SIZE) ?
+                                 key_len : IMB_SHA384_DIGEST_SIZE_IN_BYTES;
+                break;
+        case IMB_AUTH_HMAC_SHA_512:
+                local_key_len = (key_len <= IMB_SHA_512_BLOCK_SIZE) ?
+                                 key_len : IMB_SHA512_DIGEST_SIZE_IN_BYTES;
+                break;
+        case IMB_AUTH_MD5:
+                if (key_len <= IMB_MD5_BLOCK_SIZE)
+                        local_key_len = key_len;
+                else {
+                        /* Key lengths longer than MD5 block size not supported */
+                        imb_set_errno(NULL, IMB_ERR_KEY_LEN);
+                        return;
+                }
+                break;
+        default:
+                imb_set_errno(NULL, IMB_ERR_HASH_ALGO);
+                return;
+        }
+        uint8_t key[IMB_SHA_512_BLOCK_SIZE];
+        uint8_t buf[IMB_SHA_512_BLOCK_SIZE];
 
         /* prepare the key */
         if (local_key_len == key_len) {
-                memset(key, 0, sizeof(key));
                 memcpy(key, pkey, key_len);
         } else
-                IMB_SHA1(mb_mgr, pkey, key_len, key);
+                switch (sha_type) {
+                case IMB_AUTH_HMAC_SHA_1:
+                        IMB_SHA1(mb_mgr, pkey, key_len, key);
+                        break;
+                case IMB_AUTH_HMAC_SHA_224:
+                        IMB_SHA224(mb_mgr, pkey, key_len, key);
+                        break;
+                case IMB_AUTH_HMAC_SHA_256:
+                        IMB_SHA256(mb_mgr, pkey, key_len, key);
+                        break;
+                case IMB_AUTH_HMAC_SHA_384:
+                        IMB_SHA384(mb_mgr, pkey, key_len, key);
+                        break;
+                default: /* For SHA-512 */
+                        IMB_SHA512(mb_mgr, pkey, key_len, key);
+                }
 
         /* compute ipad hash */
         if (ipad_hash != NULL) {
                 memset(buf, 0x36, sizeof(buf));
                 for (i = 0; i < local_key_len; i++)
                         buf[i] ^= key[i];
-                IMB_SHA1_ONE_BLOCK(mb_mgr, buf, ipad_hash);
+                switch (sha_type) {
+                case IMB_AUTH_HMAC_SHA_1:
+                        IMB_SHA1_ONE_BLOCK(mb_mgr, buf, ipad_hash);
+                        break;
+                case IMB_AUTH_HMAC_SHA_224:
+                        IMB_SHA224_ONE_BLOCK(mb_mgr, buf, ipad_hash);
+                        break;
+                case IMB_AUTH_HMAC_SHA_256:
+                        IMB_SHA256_ONE_BLOCK(mb_mgr, buf, ipad_hash);
+                        break;
+                case IMB_AUTH_HMAC_SHA_384:
+                        IMB_SHA384_ONE_BLOCK(mb_mgr, buf, ipad_hash);
+                        break;
+                case IMB_AUTH_HMAC_SHA_512:
+                        IMB_SHA512_ONE_BLOCK(mb_mgr, buf, ipad_hash);
+                        break;
+                default: /* For MD5*/
+                        IMB_MD5_ONE_BLOCK(mb_mgr, buf, ipad_hash);
+                }
         }
+
         /* compute opad hash */
         if (opad_hash != NULL) {
                 memset(buf, 0x5c, sizeof(buf));
                 for (i = 0; i < local_key_len; i++)
                         buf[i] ^= key[i];
-                IMB_SHA1_ONE_BLOCK(mb_mgr, buf, opad_hash);
+                switch (sha_type) {
+                case IMB_AUTH_HMAC_SHA_1:
+                        IMB_SHA1_ONE_BLOCK(mb_mgr, buf, opad_hash);
+                        break;
+                case IMB_AUTH_HMAC_SHA_224:
+                        IMB_SHA224_ONE_BLOCK(mb_mgr, buf, opad_hash);
+                        break;
+                case IMB_AUTH_HMAC_SHA_256:
+                        IMB_SHA256_ONE_BLOCK(mb_mgr, buf, opad_hash);
+                        break;
+                case IMB_AUTH_HMAC_SHA_384:
+                        IMB_SHA384_ONE_BLOCK(mb_mgr, buf, opad_hash);
+                        break;
+                case IMB_AUTH_HMAC_SHA_512:
+                        IMB_SHA512_ONE_BLOCK(mb_mgr, buf, opad_hash);
+                        break;
+                default: /* For MD5 */
+                        IMB_MD5_ONE_BLOCK(mb_mgr, buf, opad_hash);
+                }
         }
+
 #ifdef SAFE_DATA
        imb_clear_mem(key, sizeof(key));
        imb_clear_mem(buf, sizeof(buf));
diff --git a/lib/x86_64/self_test.c b/lib/x86_64/self_test.c
index 6b547132..0a0c563e 100644
--- a/lib/x86_64/self_test.c
+++ b/lib/x86_64/self_test.c
@@ -781,68 +781,13 @@ static int self_test_hash(IMB_MGR *p_mgr)
                 job->msg_len_to_hash_in_bytes = v->message_size;
                 job->auth_tag_output = scratch;
                 job->auth_tag_output_len_in_bytes = v->tag_size;
-
-                if (v->hash_mode == IMB_AUTH_HMAC_SHA_1) {
-                        imb_ipad_opad_sha1(p_mgr, v->hash_key, v->hash_key_size,
-                                           hmac_ipad, hmac_opad);
-                        job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
-                        job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
-                }
-
-                if (v->hash_mode == IMB_AUTH_HMAC_SHA_224 ||
-                    v->hash_mode == IMB_AUTH_HMAC_SHA_256) {
-                        /* compute IPAD and OPAD */
-                        unsigned j;
-
-                        IMB_ASSERT(sizeof(scratch) >= IMB_SHA_256_BLOCK_SIZE);
-
-                        memset(scratch, 0x36, IMB_SHA_256_BLOCK_SIZE);
-                        for (j = 0; j < v->hash_key_size; j++)
-                                scratch[j] ^= v->hash_key[j];
-                        if (v->hash_mode == IMB_AUTH_HMAC_SHA_224)
-                                IMB_SHA224_ONE_BLOCK(p_mgr, scratch, hmac_ipad);
-                        else
-                                IMB_SHA256_ONE_BLOCK(p_mgr, scratch, hmac_ipad);
-
-                        memset(scratch, 0x5c, IMB_SHA_256_BLOCK_SIZE);
-                        for (j = 0; j < v->hash_key_size; j++)
-                                scratch[j] ^= v->hash_key[j];
-                        if (v->hash_mode == IMB_AUTH_HMAC_SHA_224)
-                                IMB_SHA224_ONE_BLOCK(p_mgr, scratch, hmac_opad);
-                        else
-                                IMB_SHA256_ONE_BLOCK(p_mgr, scratch, hmac_opad);
-
+                if (v->hash_mode >= IMB_AUTH_HMAC_SHA_1 &&
+                    v->hash_mode <= IMB_AUTH_HMAC_SHA_512) {
+                        imb_hmac_ipad_opad(p_mgr, v->hash_mode, v->hash_key,
+                                           v->hash_key_size, hmac_ipad, hmac_opad);
                         job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
                         job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
                 }
-
-                if (v->hash_mode == IMB_AUTH_HMAC_SHA_384 ||
-                    v->hash_mode == IMB_AUTH_HMAC_SHA_512) {
-                        /* compute IPAD and OPAD */
-                        unsigned j;
-
-                        IMB_ASSERT(sizeof(scratch) >= IMB_SHA_512_BLOCK_SIZE);
-
-                        memset(scratch, 0x36, IMB_SHA_512_BLOCK_SIZE);
-                        for (j = 0; j < v->hash_key_size; j++)
-                                scratch[j] ^= v->hash_key[j];
-                        if (v->hash_mode == IMB_AUTH_HMAC_SHA_384)
-                                IMB_SHA384_ONE_BLOCK(p_mgr, scratch, hmac_ipad);
-                        else
-                                IMB_SHA512_ONE_BLOCK(p_mgr, scratch, hmac_ipad);
-
-                        memset(scratch, 0x5c, IMB_SHA_512_BLOCK_SIZE);
-                        for (j = 0; j < v->hash_key_size; j++)
-                                scratch[j] ^= v->hash_key[j];
-                        if (v->hash_mode == IMB_AUTH_HMAC_SHA_384)
-                                IMB_SHA384_ONE_BLOCK(p_mgr, scratch, hmac_opad);
-                        else
-                                IMB_SHA512_ONE_BLOCK(p_mgr, scratch, hmac_opad);
-
-                        job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
-                        job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
-                }
-
                 if (v->hash_mode == IMB_AUTH_AES_CMAC) {
                         IMB_AES_KEYEXP_128(p_mgr, v->hash_key, expkey, dust);
                         IMB_AES_CMAC_SUBKEY_GEN_128(p_mgr, expkey, skey1, skey2);
diff --git a/test/acvp_app_main.c b/test/acvp_app_main.c
index 11adca90..0bc812ca 100644
--- a/test/acvp_app_main.c
+++ b/test/acvp_app_main.c
@@ -673,7 +673,8 @@ static int hmac_sha1_handler(ACVP_TEST_CASE *test_case)
 
         tc = test_case->tc.hmac;
 
-        imb_ipad_opad_sha1(mb_mgr, tc->key, tc->key_len, ipad_hash, opad_hash);
+        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_1,
+                           tc->key, tc->key_len, ipad_hash, opad_hash);
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
         job->key_len_in_bytes = tc->key_len;
@@ -707,39 +708,16 @@ static int hmac_sha256_handler(ACVP_TEST_CASE *test_case)
 {
         ACVP_HMAC_TC *tc;
         IMB_JOB *job = NULL;
-        uint32_t i = 0;
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA256_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA256_DIGEST_SIZE_IN_BYTES], 16);
-        uint8_t key[IMB_SHA_256_BLOCK_SIZE];
-        uint8_t buf[IMB_SHA_256_BLOCK_SIZE];
-        uint32_t key_len = 0;
 
         if (test_case == NULL)
                 return EXIT_FAILURE;
 
         tc = test_case->tc.hmac;
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (tc->key_len <= IMB_SHA_256_BLOCK_SIZE) {
-                memcpy(key, tc->key, tc->key_len);
-                key_len = (uint32_t) tc->key_len;
-        } else {
-                IMB_SHA256(mb_mgr, tc->key, tc->key_len, key);
-                key_len = IMB_SHA256_DIGEST_SIZE_IN_BYTES;
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA256_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA256_ONE_BLOCK(mb_mgr, buf, opad_hash);
+        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_256,
+                           tc->key, tc->key_len, ipad_hash, opad_hash);
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
         job->key_len_in_bytes = tc->key_len;
@@ -773,39 +751,16 @@ static int hmac_sha224_handler(ACVP_TEST_CASE *test_case)
 {
         ACVP_HMAC_TC *tc;
         IMB_JOB *job = NULL;
-        uint32_t i = 0;
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA224_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA224_DIGEST_SIZE_IN_BYTES], 16);
-        uint8_t key[IMB_SHA_256_BLOCK_SIZE];
-        uint8_t buf[IMB_SHA_256_BLOCK_SIZE];
-        uint32_t key_len = 0;
 
         if (test_case == NULL)
                 return EXIT_FAILURE;
 
         tc = test_case->tc.hmac;
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (tc->key_len <= IMB_SHA_256_BLOCK_SIZE) {
-                memcpy(key, tc->key, tc->key_len);
-                key_len = (uint32_t) tc->key_len;
-        } else {
-                IMB_SHA224(mb_mgr, tc->key, tc->key_len, key);
-                key_len = IMB_SHA224_DIGEST_SIZE_IN_BYTES;
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA224_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA224_ONE_BLOCK(mb_mgr, buf, opad_hash);
+        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_224,
+                           tc->key, tc->key_len, ipad_hash, opad_hash);
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
         job->key_len_in_bytes = tc->key_len;
@@ -839,39 +794,16 @@ static int hmac_sha384_handler(ACVP_TEST_CASE *test_case)
 {
         ACVP_HMAC_TC *tc;
         IMB_JOB *job = NULL;
-        uint32_t i = 0;
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
-        uint8_t key[IMB_SHA_384_BLOCK_SIZE];
-        uint8_t buf[IMB_SHA_384_BLOCK_SIZE];
-        uint32_t key_len = 0;
 
         if (test_case == NULL)
                 return EXIT_FAILURE;
 
         tc = test_case->tc.hmac;
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (tc->key_len <= IMB_SHA_384_BLOCK_SIZE) {
-                memcpy(key, tc->key, tc->key_len);
-                key_len = (uint32_t) tc->key_len;
-        } else {
-                IMB_SHA384(mb_mgr, tc->key, tc->key_len, key);
-                key_len = IMB_SHA384_DIGEST_SIZE_IN_BYTES;
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA384_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA384_ONE_BLOCK(mb_mgr, buf, opad_hash);
+        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_384,
+                           tc->key, tc->key_len, ipad_hash, opad_hash);
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
         job->key_len_in_bytes = tc->key_len;
@@ -905,39 +837,16 @@ static int hmac_sha512_handler(ACVP_TEST_CASE *test_case)
 {
         ACVP_HMAC_TC *tc;
         IMB_JOB *job = NULL;
-        uint32_t i = 0;
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
-        uint8_t key[IMB_SHA_512_BLOCK_SIZE];
-        uint8_t buf[IMB_SHA_512_BLOCK_SIZE];
-        uint32_t key_len = 0;
 
         if (test_case == NULL)
                 return EXIT_FAILURE;
 
         tc = test_case->tc.hmac;
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (tc->key_len <= IMB_SHA_512_BLOCK_SIZE) {
-                memcpy(key, tc->key, tc->key_len);
-                key_len = (uint32_t) tc->key_len;
-        } else {
-                IMB_SHA512(mb_mgr, tc->key, tc->key_len, key);
-                key_len = IMB_SHA512_DIGEST_SIZE_IN_BYTES;
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA512_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_SHA512_ONE_BLOCK(mb_mgr, buf, opad_hash);
+        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_512,
+                           tc->key, tc->key_len, ipad_hash, opad_hash);
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
         job->key_len_in_bytes = tc->key_len;
diff --git a/test/chained_test.c b/test/chained_test.c
index beea0efc..83a10304 100644
--- a/test/chained_test.c
+++ b/test/chained_test.c
@@ -418,7 +418,8 @@ test_chained_vectors(struct IMB_MGR *mb_mgr,
                         break;
                 }
 
-                imb_ipad_opad_sha1(mb_mgr, vec_tab[vect].cipher_key,
+                imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_1,
+                                   vec_tab[vect].cipher_key,
                                    vec_tab[vect].cipher_key_len,
                                    ipad_hash, opad_hash);
 
diff --git a/test/hmac_md5_test.c b/test/hmac_md5_test.c
index 418d453c..6cb86e84 100644
--- a/test/hmac_md5_test.c
+++ b/test/hmac_md5_test.c
@@ -36,8 +36,6 @@
 
 int hmac_md5_test(struct IMB_MGR *mb_mgr);
 
-#define block_size    64
-#define digest_size   16
 #define digest96_size 12
 
 /*
@@ -64,7 +62,7 @@ int hmac_md5_test(struct IMB_MGR *mb_mgr);
 #define key_len1        16
 #define data_len1       8
 #define digest_len1     digest96_size
-#define digest_len_l1   digest_size
+#define digest_len_l1   IMB_MD5_DIGEST_SIZE_IN_BYTES
 static const uint8_t key1[key_len1] = {
         0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
         0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b
@@ -95,7 +93,7 @@ static const uint8_t digest1[digest_len_l1] = {
 #define key_len2      4
 #define data_len2     28
 #define digest_len2   digest96_size
-#define digest_len_l2 digest_size
+#define digest_len_l2 IMB_MD5_DIGEST_SIZE_IN_BYTES
 static const char key2[] = "Jefe";
 static const char data2[] = "what do ya want for nothing?";
 static const uint8_t digest2[digest_len_l2] = {
@@ -123,7 +121,7 @@ static const uint8_t digest2[digest_len_l2] = {
 #define key_len3      16
 #define data_len3     50
 #define digest_len3   digest96_size
-#define digest_len_l3 digest_size
+#define digest_len_l3 IMB_MD5_DIGEST_SIZE_IN_BYTES
 static const uint8_t key3[key_len3] = {
         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa
@@ -162,7 +160,7 @@ static const uint8_t digest3[digest_len_l3] = {
 #define key_len4      25
 #define data_len4     50
 #define digest_len4   digest96_size
-#define digest_len_l4 digest_size
+#define digest_len_l4 IMB_MD5_DIGEST_SIZE_IN_BYTES
 static const uint8_t key4[key_len4] = {
         0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
         0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10,
@@ -203,7 +201,7 @@ static const uint8_t digest4[digest_len_l4] = {
 #define key_len5      16
 #define data_len5     20
 #define digest_len5   digest96_size
-#define digest_len_l5 digest_size
+#define digest_len_l5 IMB_MD5_DIGEST_SIZE_IN_BYTES
 static const uint8_t key5[key_len5] = {
         0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
         0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c
@@ -373,11 +371,8 @@ test_hmac_md5(struct IMB_MGR *mb_mgr,
         uint8_t padding[16];
         uint8_t **auths = malloc(num_jobs * sizeof(void *));
         int i = 0, jobs_rx = 0, ret = -1;
-        uint8_t key[block_size];
-        uint8_t buf[block_size];
-        DECLARE_ALIGNED(uint8_t ipad_hash[digest_size], 16);
-        DECLARE_ALIGNED(uint8_t opad_hash[digest_size], 16);
-        int key_len = 0;
+        DECLARE_ALIGNED(uint8_t ipad_hash[IMB_MD5_DIGEST_SIZE_IN_BYTES], 16);
+        DECLARE_ALIGNED(uint8_t opad_hash[IMB_MD5_DIGEST_SIZE_IN_BYTES], 16);
 
         if (auths == NULL) {
 		fprintf(stderr, "Can't allocate buffer memory\n");
@@ -399,29 +394,8 @@ test_hmac_md5(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (vec->key_len <= block_size) {
-                memcpy(key, vec->key, vec->key_len);
-                key_len = (int) vec->key_len;
-        } else {
-                printf("Key length longer than block size is not supported "
-                       "by MD5\n");
-                ret = 0;
-                goto end;
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_MD5_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-        IMB_MD5_ONE_BLOCK(mb_mgr, buf, opad_hash);
+        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_MD5, vec->key, vec->key_len,
+                           ipad_hash, opad_hash);
 
         /* empty the manager */
         while (IMB_FLUSH_JOB(mb_mgr) != NULL)
diff --git a/test/hmac_sha1_test.c b/test/hmac_sha1_test.c
index 7072fd47..1f179d95 100644
--- a/test/hmac_sha1_test.c
+++ b/test/hmac_sha1_test.c
@@ -376,8 +376,8 @@ test_hmac_sha1(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
 
-        imb_ipad_opad_sha1(mb_mgr, vec->key, vec->key_len,
-                           ipad_hash, opad_hash);
+        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_1,
+                           vec->key, vec->key_len, ipad_hash, opad_hash);
 
         for (i = 0; i < num_jobs; i++) {
                 job = IMB_GET_NEXT_JOB(mb_mgr);
@@ -485,8 +485,8 @@ test_hmac_sha1_burst(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
 
-        imb_ipad_opad_sha1(mb_mgr, vec->key, vec->key_len,
-                           ipad_hash, opad_hash);
+        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_1,
+                           vec->key, vec->key_len, ipad_hash, opad_hash);
 
         while (IMB_GET_NEXT_BURST(mb_mgr, num_jobs, jobs) < num_jobs)
                 IMB_FLUSH_BURST(mb_mgr, num_jobs, jobs);
@@ -601,8 +601,8 @@ test_hmac_sha1_hash_burst(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
 
-        imb_ipad_opad_sha1(mb_mgr, vec->key, vec->key_len,
-                           ipad_hash, opad_hash);
+        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_1,
+                           vec->key, vec->key_len, ipad_hash, opad_hash);
 
         for (i = 0; i < num_jobs; i++) {
                 job = &jobs[i];
diff --git a/test/hmac_sha256_sha512_test.c b/test/hmac_sha256_sha512_test.c
index 32484b61..4f057e41 100644
--- a/test/hmac_sha256_sha512_test.c
+++ b/test/hmac_sha256_sha512_test.c
@@ -828,13 +828,10 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
         uint8_t **auths = malloc(num_jobs * sizeof(void *));
         uint32_t i = 0, jobs_rx = 0;
         int ret = -1;
-        uint8_t key[IMB_SHA_512_BLOCK_SIZE];
-        uint8_t buf[IMB_SHA_512_BLOCK_SIZE];
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
-        uint32_t key_len = 0;
         size_t digest_len = 0;
-        size_t block_size = 0;
+        IMB_HASH_ALG hash_type;
 
         if (auths == NULL) {
 		fprintf(stderr, "Can't allocate buffer memory\n");
@@ -856,20 +853,20 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
         switch (sha_type) {
         case 224:
                 digest_len = vec->hmac_sha224_len;
-                block_size = IMB_SHA_256_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_224;
                 break;
         case 256:
                 digest_len = vec->hmac_sha256_len;
-                block_size = IMB_SHA_256_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_256;
                 break;
         case 384:
                 digest_len = vec->hmac_sha384_len;
-                block_size = IMB_SHA_384_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_384;
                 break;
         case 512:
         default:
                 digest_len = vec->hmac_sha512_len;
-                block_size = IMB_SHA_512_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_512;
                 break;
         }
 
@@ -887,75 +884,8 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
                 }
                 memset(auths[i], -1, alloc_len);
         }
-
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (vec->key_len <= block_size) {
-                memcpy(key, vec->key, vec->key_len);
-                key_len = (int) vec->key_len;
-        } else {
-                switch (sha_type) {
-                case 224:
-                        IMB_SHA224(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA224_DIGEST_SIZE_IN_BYTES;
-                        break;
-                case 256:
-                        IMB_SHA256(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA256_DIGEST_SIZE_IN_BYTES;
-                        break;
-                case 384:
-                        IMB_SHA384(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA384_DIGEST_SIZE_IN_BYTES;
-                        break;
-                case 512:
-                default:
-                        IMB_SHA512(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA512_DIGEST_SIZE_IN_BYTES;
-                        break;
-                }
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-
-        switch (sha_type) {
-        case 224:
-                IMB_SHA224_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        case 256:
-                IMB_SHA256_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        case 384:
-                IMB_SHA384_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        case 512:
-        default:
-                IMB_SHA512_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        }
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-
-        switch (sha_type) {
-        case 224:
-                IMB_SHA224_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        case 256:
-                IMB_SHA256_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        case 384:
-                IMB_SHA384_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        case 512:
-        default:
-                IMB_SHA512_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        }
+        imb_hmac_ipad_opad(mb_mgr, hash_type, vec->key,
+                           vec->key_len, ipad_hash, opad_hash);
 
         /* empty the manager */
         while (IMB_FLUSH_JOB(mb_mgr) != NULL)
@@ -1057,13 +987,10 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
         uint8_t **auths = malloc(num_jobs * sizeof(void *));
         uint32_t i = 0, jobs_rx = 0, completed_jobs = 0;
         int ret = -1, err;
-        uint8_t key[IMB_SHA_512_BLOCK_SIZE];
-        uint8_t buf[IMB_SHA_512_BLOCK_SIZE];
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
-        uint32_t key_len = 0;
         size_t digest_len = 0;
-        size_t block_size = 0;
+        IMB_HASH_ALG hash_type;
 
         if (auths == NULL) {
 		fprintf(stderr, "Can't allocate buffer memory\n");
@@ -1085,20 +1012,20 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
         switch (sha_type) {
         case 224:
                 digest_len = vec->hmac_sha224_len;
-                block_size = IMB_SHA_256_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_224;
                 break;
         case 256:
                 digest_len = vec->hmac_sha256_len;
-                block_size = IMB_SHA_256_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_256;
                 break;
         case 384:
                 digest_len = vec->hmac_sha384_len;
-                block_size = IMB_SHA_384_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_384;
                 break;
         case 512:
         default:
                 digest_len = vec->hmac_sha512_len;
-                block_size = IMB_SHA_512_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_512;
                 break;
         }
 
@@ -1117,74 +1044,8 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (vec->key_len <= block_size) {
-                memcpy(key, vec->key, vec->key_len);
-                key_len = (int) vec->key_len;
-        } else {
-                switch (sha_type) {
-                case 224:
-                        IMB_SHA224(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA224_DIGEST_SIZE_IN_BYTES;
-                        break;
-                case 256:
-                        IMB_SHA256(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA256_DIGEST_SIZE_IN_BYTES;
-                        break;
-                case 384:
-                        IMB_SHA384(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA384_DIGEST_SIZE_IN_BYTES;
-                        break;
-                case 512:
-                default:
-                        IMB_SHA512(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA512_DIGEST_SIZE_IN_BYTES;
-                        break;
-                }
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-
-        switch (sha_type) {
-        case 224:
-                IMB_SHA224_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        case 256:
-                IMB_SHA256_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        case 384:
-                IMB_SHA384_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        case 512:
-        default:
-                IMB_SHA512_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        }
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-
-        switch (sha_type) {
-        case 224:
-                IMB_SHA224_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        case 256:
-                IMB_SHA256_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        case 384:
-                IMB_SHA384_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        case 512:
-        default:
-                IMB_SHA512_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        }
+        imb_hmac_ipad_opad(mb_mgr, hash_type, vec->key,
+                           vec->key_len, ipad_hash, opad_hash);
 
         while (IMB_GET_NEXT_BURST(mb_mgr, num_jobs, jobs) < num_jobs)
                 IMB_FLUSH_BURST(mb_mgr, num_jobs, jobs);
@@ -1292,13 +1153,10 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
         uint8_t **auths = NULL;
         uint32_t i = 0, jobs_rx = 0, completed_jobs = 0;
         int ret = -1;
-        uint8_t key[IMB_SHA_512_BLOCK_SIZE];
-        uint8_t buf[IMB_SHA_512_BLOCK_SIZE];
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
-        uint32_t key_len = 0;
         size_t digest_len = 0;
-        size_t block_size = 0;
+        IMB_HASH_ALG hash_type;
 
         if (num_jobs == 0)
                 return 0;
@@ -1324,20 +1182,20 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
         switch (sha_type) {
         case 224:
                 digest_len = vec->hmac_sha224_len;
-                block_size = IMB_SHA_256_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_224;
                 break;
         case 256:
                 digest_len = vec->hmac_sha256_len;
-                block_size = IMB_SHA_256_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_256;
                 break;
         case 384:
                 digest_len = vec->hmac_sha384_len;
-                block_size = IMB_SHA_384_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_384;
                 break;
         case 512:
         default:
                 digest_len = vec->hmac_sha512_len;
-                block_size = IMB_SHA_512_BLOCK_SIZE;
+                hash_type = IMB_AUTH_HMAC_SHA_512;
                 break;
         }
 
@@ -1356,74 +1214,8 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
 
-        /* prepare the key */
-        memset(key, 0, sizeof(key));
-        if (vec->key_len <= block_size) {
-                memcpy(key, vec->key, vec->key_len);
-                key_len = (int) vec->key_len;
-        } else {
-                switch (sha_type) {
-                case 224:
-                        IMB_SHA224(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA224_DIGEST_SIZE_IN_BYTES;
-                        break;
-                case 256:
-                        IMB_SHA256(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA256_DIGEST_SIZE_IN_BYTES;
-                        break;
-                case 384:
-                        IMB_SHA384(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA384_DIGEST_SIZE_IN_BYTES;
-                        break;
-                case 512:
-                default:
-                        IMB_SHA512(mb_mgr, vec->key, vec->key_len, key);
-                        key_len = IMB_SHA512_DIGEST_SIZE_IN_BYTES;
-                        break;
-                }
-        }
-
-        /* compute ipad hash */
-        memset(buf, 0x36, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-
-        switch (sha_type) {
-        case 224:
-                IMB_SHA224_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        case 256:
-                IMB_SHA256_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        case 384:
-                IMB_SHA384_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        case 512:
-        default:
-                IMB_SHA512_ONE_BLOCK(mb_mgr, buf, ipad_hash);
-                break;
-        }
-
-        /* compute opad hash */
-        memset(buf, 0x5c, sizeof(buf));
-        for (i = 0; i < key_len; i++)
-                buf[i] ^= key[i];
-
-        switch (sha_type) {
-        case 224:
-                IMB_SHA224_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        case 256:
-                IMB_SHA256_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        case 384:
-                IMB_SHA384_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        case 512:
-        default:
-                IMB_SHA512_ONE_BLOCK(mb_mgr, buf, opad_hash);
-                break;
-        }
+        imb_hmac_ipad_opad(mb_mgr, hash_type, vec->key,
+                           vec->key_len, ipad_hash, opad_hash);
 
         for (i = 0; i < num_jobs; i++) {
                 job = &jobs[i];
diff --git a/test/ipsec_xvalid.c b/test/ipsec_xvalid.c
index 9dcab82d..c57524be 100644
--- a/test/ipsec_xvalid.c
+++ b/test/ipsec_xvalid.c
@@ -1219,7 +1219,6 @@ prepare_keys(IMB_MGR *mb_mgr, struct cipher_auth_keys *keys,
              const struct params_s *params,
              const unsigned int force_pattern)
 {
-        uint8_t *buf = keys->temp_buf;
         uint32_t *dust = keys->dust;
         uint32_t *k1_expanded = keys->k1_expanded;
         uint8_t *k2 = keys->k2;
@@ -1229,7 +1228,6 @@ prepare_keys(IMB_MGR *mb_mgr, struct cipher_auth_keys *keys,
         uint8_t *ipad = keys->ipad;
         uint8_t *opad = keys->opad;
         struct gcm_key_data *gdata_key = &keys->gdata_key;
-        uint8_t i;
 
         /* Set all expanded keys to pattern_cipher_key/pattern_auth_key
          * if flag is set */
@@ -1371,78 +1369,13 @@ prepare_keys(IMB_MGR *mb_mgr, struct cipher_auth_keys *keys,
                 IMB_AES_CMAC_SUBKEY_GEN_256(mb_mgr, k1_expanded, k2, k3);
                 break;
         case IMB_AUTH_HMAC_SHA_1:
-                imb_ipad_opad_sha1(mb_mgr, auth_key,
-                                   MAX_KEY_SIZE, ipad, opad);
-                break;
         case IMB_AUTH_HMAC_SHA_224:
-                /* compute ipad hash */
-                nosimd_memset(buf, 0x36, IMB_SHA_256_BLOCK_SIZE);
-                for (i = 0; i < IMB_SHA_256_BLOCK_SIZE; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_SHA224_ONE_BLOCK(mb_mgr, buf, ipad);
-
-                /* compute opad hash */
-                nosimd_memset(buf, 0x5c, IMB_SHA_256_BLOCK_SIZE);
-                for (i = 0; i < IMB_SHA_256_BLOCK_SIZE; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_SHA224_ONE_BLOCK(mb_mgr, buf, opad);
-
-                break;
         case IMB_AUTH_HMAC_SHA_256:
-                /* compute ipad hash */
-                nosimd_memset(buf, 0x36, IMB_SHA_256_BLOCK_SIZE);
-                for (i = 0; i < IMB_SHA_256_BLOCK_SIZE; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_SHA256_ONE_BLOCK(mb_mgr, buf, ipad);
-
-                /* compute opad hash */
-                nosimd_memset(buf, 0x5c, IMB_SHA_256_BLOCK_SIZE);
-                for (i = 0; i < IMB_SHA_256_BLOCK_SIZE; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_SHA256_ONE_BLOCK(mb_mgr, buf, opad);
-
-                break;
         case IMB_AUTH_HMAC_SHA_384:
-                /* compute ipad hash */
-                nosimd_memset(buf, 0x36, IMB_SHA_384_BLOCK_SIZE);
-                for (i = 0; i < IMB_SHA_384_BLOCK_SIZE; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_SHA384_ONE_BLOCK(mb_mgr, buf, ipad);
-
-                /* compute opad hash */
-                nosimd_memset(buf, 0x5c, IMB_SHA_384_BLOCK_SIZE);
-                for (i = 0; i < IMB_SHA_384_BLOCK_SIZE; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_SHA384_ONE_BLOCK(mb_mgr, buf, opad);
-
-                break;
         case IMB_AUTH_HMAC_SHA_512:
-                /* compute ipad hash */
-                nosimd_memset(buf, 0x36, IMB_SHA_512_BLOCK_SIZE);
-                for (i = 0; i < IMB_SHA_512_BLOCK_SIZE; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_SHA512_ONE_BLOCK(mb_mgr, buf, ipad);
-
-                /* compute opad hash */
-                nosimd_memset(buf, 0x5c, IMB_SHA_512_BLOCK_SIZE);
-                for (i = 0; i < IMB_SHA_512_BLOCK_SIZE; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_SHA512_ONE_BLOCK(mb_mgr, buf, opad);
-
-                break;
         case IMB_AUTH_MD5:
-                /* compute ipad hash */
-                nosimd_memset(buf, 0x36, 64);
-                for (i = 0; i < 64; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_MD5_ONE_BLOCK(mb_mgr, buf, ipad);
-
-                /* compute opad hash */
-                nosimd_memset(buf, 0x5c, 64);
-                for (i = 0; i < 64; i++)
-                        buf[i] ^= auth_key[i];
-                IMB_MD5_ONE_BLOCK(mb_mgr, buf, opad);
-
+                imb_hmac_ipad_opad(mb_mgr, params->hash_alg, auth_key,
+                                   MAX_KEY_SIZE, ipad, opad);
                 break;
         case IMB_AUTH_ZUC_EIA3_BITLEN:
         case IMB_AUTH_ZUC256_EIA3_BITLEN:
diff --git a/test/wycheproof/wycheproof.c b/test/wycheproof/wycheproof.c
index 1ebf27fc..91bd09cd 100644
--- a/test/wycheproof/wycheproof.c
+++ b/test/wycheproof/wycheproof.c
@@ -67,22 +67,6 @@ static int process_job(IMB_MGR *p_mgr)
         return 1;
 }
 
-static void
-prep_iopad(const size_t scratch_size, void *scratch,
-           const size_t key_size, const void *key,
-           const int pattern)
-{
-        uint8_t *cb = (uint8_t *) scratch;
-        const uint8_t *kp = (const uint8_t *) key;
-        const size_t max_j =
-                (key_size > scratch_size) ? scratch_size : key_size;
-        size_t j;
-
-        memset(scratch, pattern, scratch_size);
-        for (j = 0; j < max_j; j++)
-                cb[j] ^= kp[j];
-}
-
 #define PUTS_ONCE(_s) { \
         static int _ran_already = 0;            \
                                                 \
@@ -431,7 +415,8 @@ static int test_hmac_sha1(IMB_MGR *p_mgr)
                 else
                         job->auth_tag_output_len_in_bytes = v->tagSize / 8;
 
-                imb_ipad_opad_sha1(p_mgr, v->key, v->keySize / 8, hmac_ipad, hmac_opad);
+                imb_hmac_ipad_opad(p_mgr, IMB_AUTH_HMAC_SHA_1,
+                                   v->key, v->keySize / 8, hmac_ipad, hmac_opad);
 
                 job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
                 job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
@@ -453,17 +438,12 @@ static int test_hmac_sha224(IMB_MGR *p_mgr)
         const struct mac_test *v = hmac_sha224_test_json;
         DECLARE_ALIGNED(uint8_t hmac_ipad[IMB_SHA256_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t hmac_opad[IMB_SHA256_DIGEST_SIZE_IN_BYTES], 16);
-        uint8_t scratch[IMB_SHA_256_BLOCK_SIZE];
-        uint8_t key[IMB_SHA256_DIGEST_SIZE_IN_BYTES];
         uint8_t tag[IMB_SHA256_DIGEST_SIZE_IN_BYTES];
 
         while (IMB_FLUSH_JOB(p_mgr) != NULL)
                 ;
 
         for ( ; v->msg != NULL; v++, run_vectors++) {
-                const void *key_ptr = NULL;
-                size_t key_size = 0;
-
                 IMB_ASSERT((v->tagSize / 8) <= sizeof(tag));
 
                 /* tag too long */
@@ -493,21 +473,8 @@ static int test_hmac_sha224(IMB_MGR *p_mgr)
                 job->auth_tag_output = tag;
                 job->auth_tag_output_len_in_bytes = v->tagSize / 8;
 
-                /* prepare key */
-                if ((v->keySize / 8) <= IMB_SHA_256_BLOCK_SIZE) {
-                        key_ptr = v->key;
-                        key_size = v->keySize / 8;
-                } else {
-                        IMB_SHA224(p_mgr, v->key, v->keySize / 8, key);
-                        key_ptr = key;
-                        key_size = IMB_SHA224_DIGEST_SIZE_IN_BYTES;
-                }
-                /* compute IPAD and OPAD */
-                prep_iopad(sizeof(scratch), scratch, key_size, key_ptr, 0x36);
-                IMB_SHA224_ONE_BLOCK(p_mgr, scratch, hmac_ipad);
-
-                prep_iopad(sizeof(scratch), scratch, key_size, key_ptr, 0x5c);
-                IMB_SHA224_ONE_BLOCK(p_mgr, scratch, hmac_opad);
+                imb_hmac_ipad_opad(p_mgr, IMB_AUTH_HMAC_SHA_224,
+                                   v->key, v->keySize / 8, hmac_ipad, hmac_opad);
 
                 job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
                 job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
@@ -529,17 +496,12 @@ static int test_hmac_sha256(IMB_MGR *p_mgr)
         const struct mac_test *v = hmac_sha256_test_json;
         DECLARE_ALIGNED(uint8_t hmac_ipad[IMB_SHA256_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t hmac_opad[IMB_SHA256_DIGEST_SIZE_IN_BYTES], 16);
-        uint8_t scratch[IMB_SHA_256_BLOCK_SIZE];
-        uint8_t key[IMB_SHA256_DIGEST_SIZE_IN_BYTES];
         uint8_t tag[IMB_SHA256_DIGEST_SIZE_IN_BYTES];
 
         while (IMB_FLUSH_JOB(p_mgr) != NULL)
                 ;
 
         for ( ; v->msg != NULL; v++, run_vectors++) {
-                const void *key_ptr = NULL;
-                size_t key_size = 0;
-
                 IMB_ASSERT((v->tagSize / 8) <= sizeof(tag));
 
                 /* tag too long */
@@ -569,22 +531,8 @@ static int test_hmac_sha256(IMB_MGR *p_mgr)
                 job->auth_tag_output = tag;
                 job->auth_tag_output_len_in_bytes = v->tagSize / 8;
 
-                /* prepare key */
-                if ((v->keySize / 8) <= IMB_SHA_256_BLOCK_SIZE) {
-                        key_ptr = v->key;
-                        key_size = v->keySize / 8;
-                } else {
-                        IMB_SHA256(p_mgr, v->key, v->keySize / 8, key);
-                        key_ptr = key;
-                        key_size = IMB_SHA256_DIGEST_SIZE_IN_BYTES;
-                }
-
-                /* compute IPAD and OPAD */
-                prep_iopad(sizeof(scratch), scratch, key_size, key_ptr, 0x36);
-                IMB_SHA256_ONE_BLOCK(p_mgr, scratch, hmac_ipad);
-
-                prep_iopad(sizeof(scratch), scratch, key_size, key_ptr, 0x5c);
-                IMB_SHA256_ONE_BLOCK(p_mgr, scratch, hmac_opad);
+                imb_hmac_ipad_opad(p_mgr, IMB_AUTH_HMAC_SHA_256,
+                                   v->key, v->keySize / 8, hmac_ipad, hmac_opad);
 
                 job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
                 job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
@@ -606,7 +554,7 @@ static int test_hmac_sha384(IMB_MGR *p_mgr)
         const struct mac_test *v = hmac_sha384_test_json;
         DECLARE_ALIGNED(uint8_t hmac_ipad[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t hmac_opad[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
-        uint8_t scratch[IMB_SHA_512_BLOCK_SIZE];
+        uint8_t scratch[IMB_SHA_384_BLOCK_SIZE];
 
         while (IMB_FLUSH_JOB(p_mgr) != NULL)
                 ;
@@ -641,14 +589,8 @@ static int test_hmac_sha384(IMB_MGR *p_mgr)
                 job->auth_tag_output = scratch;
                 job->auth_tag_output_len_in_bytes = v->tagSize / 8;
 
-                /* compute IPAD and OPAD */
-                prep_iopad(sizeof(scratch), scratch,
-                           v->keySize / 8, v->key, 0x36);
-                IMB_SHA384_ONE_BLOCK(p_mgr, scratch, hmac_ipad);
-
-                prep_iopad(sizeof(scratch), scratch,
-                           v->keySize / 8, v->key, 0x5c);
-                IMB_SHA384_ONE_BLOCK(p_mgr, scratch, hmac_opad);
+                imb_hmac_ipad_opad(p_mgr, IMB_AUTH_HMAC_SHA_384,
+                                   v->key, v->keySize / 8, hmac_ipad, hmac_opad);
 
                 job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
                 job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
@@ -705,14 +647,8 @@ static int test_hmac_sha512(IMB_MGR *p_mgr)
                 job->auth_tag_output = scratch;
                 job->auth_tag_output_len_in_bytes = v->tagSize / 8;
 
-                /* compute IPAD and OPAD */
-                prep_iopad(sizeof(scratch), scratch,
-                           v->keySize / 8, v->key, 0x36);
-                IMB_SHA512_ONE_BLOCK(p_mgr, scratch, hmac_ipad);
-
-                prep_iopad(sizeof(scratch), scratch,
-                           v->keySize / 8, v->key, 0x5c);
-                IMB_SHA512_ONE_BLOCK(p_mgr, scratch, hmac_opad);
+                imb_hmac_ipad_opad(p_mgr, IMB_AUTH_HMAC_SHA_512,
+                                   v->key, v->keySize / 8, hmac_ipad, hmac_opad);
 
                 job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
                 job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
-- 
GitLab


From c2cb34114326cd0ff5435e20400285b3c0a52b88 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Mon, 6 Mar 2023 14:58:50 +0000
Subject: [PATCH 134/332] test: AES-CTR Job Counter Fix

---
 test/ctr_test.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/test/ctr_test.c b/test/ctr_test.c
index 30d9513f..fd171d91 100644
--- a/test/ctr_test.c
+++ b/test/ctr_test.c
@@ -1844,7 +1844,7 @@ test_ctr_vectors_burst(struct IMB_MGR *mb_mgr,
         DECLARE_ALIGNED(uint32_t expkey[4*15], 16);
         DECLARE_ALIGNED(uint32_t dust[4*15], 16);
 
-	printf("AES-CTR standard test vectors - Burst API:\n");
+	printf("AES-CTR standard test vectors - Burst API (N jobs = %u):\n", num_jobs);
 	for (vect = 0; vect < vectors_cnt; vect++) {
                 struct test_suite_context *ctx;
 
-- 
GitLab


From b47b843ada509a8479ce5015550d018f8e260227 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Tue, 7 Mar 2023 15:33:29 +0000
Subject: [PATCH 135/332] lib: [ZUC] add key/IV size macros

---
 lib/intel-ipsec-mb.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index e5645956..81225fd8 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -155,6 +155,15 @@ typedef enum {
 #define IMB_KASUMI_BLOCK_SIZE       8
 #define IMB_KASUMI_DIGEST_SIZE      4
 
+#define IMB_ZUC_KEY_LEN_IN_BYTES                16
+#define IMB_ZUC_IV_LEN_IN_BYTES                 16
+#define IMB_ZUC256_KEY_LEN_IN_BYTES             32
+#define IMB_ZUC256_IV_LEN_IN_BYTES_MIN          23
+#define IMB_ZUC256_IV_LEN_IN_BYTES_MAX          25
+#define IMB_ZUC_DIGEST_LEN_IN_BYTES             4
+#define IMB_ZUC256_DIGEST_LEN_IN_BYTES_MIN      4
+#define IMB_ZUC256_DIGEST_LEN_IN_BYTES_MAX      16
+
 /**
  * Minimum Ethernet frame size to calculate CRC32
  * Source Address (6 bytes) + Destination Address (6 bytes) + Type/Len (2 bytes)
-- 
GitLab


From 57bbdb6930f41ebcd365028ae11cc518521d648e Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Tue, 7 Mar 2023 15:37:28 +0000
Subject: [PATCH 136/332] test: [ZUC] use key/IV size macros

---
 test/direct_api_fuzz_test.c | 10 +++---
 test/zuc_test.c             | 70 ++++++++++++++++++-------------------
 test/zuc_test_vectors.h     |  5 ---
 3 files changed, 40 insertions(+), 45 deletions(-)

diff --git a/test/direct_api_fuzz_test.c b/test/direct_api_fuzz_test.c
index 5c373b66..6b7bf2ad 100644
--- a/test/direct_api_fuzz_test.c
+++ b/test/direct_api_fuzz_test.c
@@ -558,7 +558,7 @@ static void test_zuc_eea3_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
 {
         const void *key = buff;
 
-        if (dataSize < 16)
+        if (dataSize < IMB_ZUC_KEY_LEN_IN_BYTES)
                 return;
 
         void *out = buff;
@@ -573,7 +573,7 @@ static void test_zuc_eea3_4_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
 {
         const void *key[4];
 
-        if (dataSize < 16)
+        if (dataSize < IMB_ZUC_KEY_LEN_IN_BYTES)
                 return;
 
         const void *iv[4];
@@ -596,7 +596,7 @@ static void test_zuc_eea3_n_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
 {
         const void *key[8];
 
-        if (dataSize < 16)
+        if (dataSize < IMB_ZUC_KEY_LEN_IN_BYTES)
                 return;
 
         const void *iv[8];
@@ -619,7 +619,7 @@ static void test_zuc_eia3_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
 {
         const void *key = buff;
 
-        if (dataSize < 16)
+        if (dataSize < IMB_ZUC_KEY_LEN_IN_BYTES)
                 return;
 
         const void *in = buff;
@@ -634,7 +634,7 @@ static void test_zuc_eia3_n_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
 {
         const void *key[8];
 
-        if (dataSize < 16)
+        if (dataSize < IMB_ZUC_KEY_LEN_IN_BYTES)
                 return;
 
         const void *iv[8];
diff --git a/test/zuc_test.c b/test/zuc_test.c
index dac10d73..a77de47c 100644
--- a/test/zuc_test.c
+++ b/test/zuc_test.c
@@ -231,8 +231,8 @@ int zuc_test(struct IMB_MGR *mb_mgr)
         }
 
         /* Create random keys and vectors */
-        if (createKeyVecData(ZUC256_KEY_LEN_IN_BYTES, pKeys,
-                             ZUC256_IV_LEN_IN_BYTES,
+        if (createKeyVecData(IMB_ZUC256_KEY_LEN_IN_BYTES, pKeys,
+                             IMB_ZUC256_IV_LEN_IN_BYTES_MAX,
                              pIV, MAXBUFS)) {
                 printf("createKeyVecData() error\n");
                 freePtrArray(pSrcData, MAXBUFS);
@@ -423,7 +423,7 @@ submit_eia3_jobs(struct IMB_MGR *mb_mgr, uint8_t ** const keys,
                 job->chain_order = IMB_ORDER_CIPHER_HASH;
                 job->cipher_mode = IMB_CIPHER_NULL;
                 job->src = src[i];
-                if (iv_lens[i] == 23) {
+                if (iv_lens[i] == IMB_ZUC256_IV_LEN_IN_BYTES_MIN) {
                         job->u.ZUC_EIA3._iv = NULL;
                         job->u.ZUC_EIA3._iv23 = iv[i];
                 } else {
@@ -434,7 +434,7 @@ submit_eia3_jobs(struct IMB_MGR *mb_mgr, uint8_t ** const keys,
 
                 job->hash_start_src_offset_in_bytes = 0;
                 job->msg_len_to_hash_in_bits = lens[i];
-                if (key_sz == 16)
+                if (key_sz == IMB_ZUC_KEY_LEN_IN_BYTES)
                         job->hash_alg = IMB_AUTH_ZUC_EIA3_BITLEN;
                 else
                         job->hash_alg = IMB_AUTH_ZUC256_EIA3_BITLEN;
@@ -535,9 +535,9 @@ validate_zuc_EEA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                 char msg[50];
                 int retTmp;
                 uint32_t byteLength;
-                const unsigned int iv_len = ZUC_IV_LEN_IN_BYTES;
+                const unsigned int iv_len = IMB_ZUC_IV_LEN_IN_BYTES;
 
-                memcpy(pKeys, testEEA3_vectors[i].CK, ZUC_KEY_LEN_IN_BYTES);
+                memcpy(pKeys, testEEA3_vectors[i].CK, IMB_ZUC_KEY_LEN_IN_BYTES);
                 zuc_eea3_iv_gen(testEEA3_vectors[i].count,
                                 testEEA3_vectors[i].Bearer,
                                 testEEA3_vectors[i].Direction,
@@ -548,7 +548,7 @@ validate_zuc_EEA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                         submit_eea3_jobs(mb_mgr, &pKeys, &pIV, &pSrcData,
                                          &pDstData, &byteLength,
                                          IMB_DIR_ENCRYPT, 1,
-                                         ZUC_KEY_LEN_IN_BYTES,
+                                         IMB_ZUC_KEY_LEN_IN_BYTES,
                                          &iv_len);
                 else
                         IMB_ZUC_EEA3_1_BUFFER(mb_mgr, pKeys, pIV, pSrcData,
@@ -582,10 +582,10 @@ submit_and_verify(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
         for (i = 0; i < num_buffers; i++) {
                 vector = &testEEA3_vectors[buf_idx[i]];
                 packetLen[i] = (vector->length_in_bits + 7) / 8;
-                memcpy(pKeys[i], vector->CK, ZUC_KEY_LEN_IN_BYTES);
+                memcpy(pKeys[i], vector->CK, IMB_ZUC_KEY_LEN_IN_BYTES);
                 zuc_eea3_iv_gen(vector->count, vector->Bearer,
                         vector->Direction, pIV[i]);
-                iv_lens[i] = ZUC_IV_LEN_IN_BYTES;
+                iv_lens[i] = IMB_ZUC_IV_LEN_IN_BYTES;
                 if (dir == IMB_DIR_ENCRYPT)
                         memcpy(pSrcData[i], vector->plaintext, packetLen[i]);
                 else
@@ -595,7 +595,7 @@ submit_and_verify(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
         if (job_api)
                 submit_eea3_jobs(mb_mgr, pKeys, pIV, pSrcData,
                                  pDstData, packetLen, dir, num_buffers,
-                                 ZUC_KEY_LEN_IN_BYTES, iv_lens);
+                                 IMB_ZUC_KEY_LEN_IN_BYTES, iv_lens);
         else {
                 if (type == TEST_4_BUFFER)
                         IMB_ZUC_EEA3_4_BUFFER(mb_mgr,
@@ -667,7 +667,7 @@ submit_and_verify_zuc256(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
         for (i = 0; i < num_buffers; i++) {
                 vector = &test256EEA3_vectors[buf_idx[i]];
                 packetLen[i] = (vector->length_in_bits + 7) / 8;
-                memcpy(pKeys[i], vector->CK, ZUC256_KEY_LEN_IN_BYTES);
+                memcpy(pKeys[i], vector->CK, IMB_ZUC256_KEY_LEN_IN_BYTES);
                 memcpy(pIV[i], vector->IV, vector->iv_length);
                 if (dir == IMB_DIR_ENCRYPT)
                         memcpy(pSrcData[i], vector->plaintext, packetLen[i]);
@@ -678,7 +678,7 @@ submit_and_verify_zuc256(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
 
         submit_eea3_jobs(mb_mgr, pKeys, pIV, pSrcData,
                          pDstData, packetLen, dir, num_buffers,
-                         ZUC256_KEY_LEN_IN_BYTES, iv_lens);
+                         IMB_ZUC256_KEY_LEN_IN_BYTES, iv_lens);
 
         for (i = 0; i < num_buffers; i++) {
                 uint8_t *pDst8 = (uint8_t *)pDstData[i];
@@ -864,9 +864,9 @@ int validate_zuc_EIA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
         uint32_t bitLength;
 
         for (i = 0; i < NUM_ZUC_EIA3_TESTS; i++) {
-                const unsigned int iv_len = ZUC_IV_LEN_IN_BYTES;
+                const unsigned int iv_len = IMB_ZUC_IV_LEN_IN_BYTES;
 
-                memcpy(pKeys, testEIA3_vectors[i].CK, ZUC_KEY_LEN_IN_BYTES);
+                memcpy(pKeys, testEIA3_vectors[i].CK, IMB_ZUC_KEY_LEN_IN_BYTES);
 
                 zuc_eia3_iv_gen(testEIA3_vectors[i].count,
                                 testEIA3_vectors[i].Bearer,
@@ -880,8 +880,8 @@ int validate_zuc_EIA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                 if (job_api)
                         submit_eia3_jobs(mb_mgr, &pKeys, &pIV,
                                          &pSrcData, &pDstData,
-                                         &bitLength, 1, ZUC_KEY_LEN_IN_BYTES,
-                                         ZUC_DIGEST_LEN, &iv_len);
+                                         &bitLength, 1, IMB_ZUC_KEY_LEN_IN_BYTES,
+                                         IMB_ZUC_DIGEST_LEN_IN_BYTES, &iv_len);
                 else
                         IMB_ZUC_EIA3_1_BUFFER(mb_mgr, pKeys, pIV, pSrcData,
                                               bitLength, (uint32_t *)pDstData);
@@ -893,8 +893,8 @@ int validate_zuc_EIA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                                i + 1);
                         byte_hexdump("Expected",
                                      (const uint8_t *)&testEIA3_vectors[i].mac,
-                                     ZUC_DIGEST_LEN);
-                        byte_hexdump("Found", pDstData, ZUC_DIGEST_LEN);
+                                     IMB_ZUC_DIGEST_LEN_IN_BYTES);
+                        byte_hexdump("Found", pDstData, IMB_ZUC_DIGEST_LEN_IN_BYTES);
                         ret = retTmp;
                 }
 #ifdef DEBUG
@@ -924,20 +924,20 @@ int validate_zuc_EIA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
         for (i = 0; i < NUM_ZUC_EIA3_TESTS; i++) {
                 vector = testEIA3_vectors[i];
                 for (j = 0; j < numBuffs; j++) {
-                        memcpy(pKeys[j], vector.CK, ZUC_KEY_LEN_IN_BYTES);
+                        memcpy(pKeys[j], vector.CK, IMB_ZUC_KEY_LEN_IN_BYTES);
 
                         zuc_eia3_iv_gen(vector.count, vector.Bearer,
                                         vector.Direction, pIV[j]);
                         bitLength[j] = vector.length_in_bits;
                         byteLength = (bitLength[j] + 7) / 8;
                         memcpy(pSrcData[j], vector.message, byteLength);
-                        iv_lens[j] = ZUC_IV_LEN_IN_BYTES;
+                        iv_lens[j] = IMB_ZUC_IV_LEN_IN_BYTES;
                 }
                 if (job_api)
                         submit_eia3_jobs(mb_mgr, pKeys, pIV,
                                          pSrcData, pDstData,
                                          bitLength, numBuffs,
-                                         ZUC_KEY_LEN_IN_BYTES, ZUC_DIGEST_LEN,
+                                         IMB_ZUC_KEY_LEN_IN_BYTES, IMB_ZUC_DIGEST_LEN_IN_BYTES,
                                          iv_lens);
                 else
                         IMB_ZUC_EIA3_N_BUFFER(mb_mgr,
@@ -949,15 +949,15 @@ int validate_zuc_EIA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
 
                 for (j = 0; j < numBuffs; j++) {
                         retTmp =
-                            memcmp(pDstData[j], &vector.mac, ZUC_DIGEST_LEN);
+                            memcmp(pDstData[j], &vector.mac, IMB_ZUC_DIGEST_LEN_IN_BYTES);
                         if (retTmp) {
                                 printf("Validate ZUC n block test %u, index %u "
                                        "(Int): FAIL\n", i + 1, j);
                                 byte_hexdump("Expected",
                                              (const uint8_t *)&vector.mac,
-                                             ZUC_DIGEST_LEN);
+                                             IMB_ZUC_DIGEST_LEN_IN_BYTES);
                                 byte_hexdump("Found", pDstData[j],
-                                             ZUC_DIGEST_LEN);
+                                             IMB_ZUC_DIGEST_LEN_IN_BYTES);
                                 ret = retTmp;
                         }
 #ifdef DEBUG
@@ -977,21 +977,21 @@ int validate_zuc_EIA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
         for (i = 0; i < numBuffs; i++) {
                 vector = testEIA3_vectors[i % NUM_ZUC_EIA3_TESTS];
                 memcpy(pKeys[i], vector.CK,
-                       ZUC_KEY_LEN_IN_BYTES);
+                       IMB_ZUC_KEY_LEN_IN_BYTES);
 
                 zuc_eia3_iv_gen(vector.count, vector.Bearer,
                                 vector.Direction, pIV[i]);
                 bitLength[i] = vector.length_in_bits;
                 byteLength = (bitLength[i] + 7) / 8;
                 memcpy(pSrcData[i], vector.message, byteLength);
-                iv_lens[j] = ZUC_IV_LEN_IN_BYTES;
+                iv_lens[j] = IMB_ZUC_IV_LEN_IN_BYTES;
         }
 
         if (job_api)
                 submit_eia3_jobs(mb_mgr, pKeys, pIV,
                                  pSrcData, pDstData,
                                  bitLength, numBuffs,
-                                 ZUC_KEY_LEN_IN_BYTES, ZUC_DIGEST_LEN,
+                                 IMB_ZUC_KEY_LEN_IN_BYTES, IMB_ZUC_DIGEST_LEN_IN_BYTES,
                                  iv_lens);
         else
                 IMB_ZUC_EIA3_N_BUFFER(mb_mgr,
@@ -1012,8 +1012,8 @@ int validate_zuc_EIA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                                numBuffs, i);
                         byte_hexdump("Expected",
                                      (const uint8_t *)&vector.mac,
-                                     ZUC_DIGEST_LEN);
-                        byte_hexdump("Found", pDstData[i], ZUC_DIGEST_LEN);
+                                     IMB_ZUC_DIGEST_LEN_IN_BYTES);
+                        byte_hexdump("Found", pDstData[i], IMB_ZUC_DIGEST_LEN_IN_BYTES);
                         ret = retTmp;
                 }
 #ifdef DEBUG
@@ -1098,7 +1098,7 @@ int validate_zuc256_EIA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
         for (i = 0; i < NUM_ZUC_256_EIA3_TESTS; i++) {
                 vector = &test256EIA3_vectors[i];
                 for (j = 0; j < numBuffs; j++) {
-                        memcpy(pKeys[j], vector->CK, ZUC256_KEY_LEN_IN_BYTES);
+                        memcpy(pKeys[j], vector->CK, IMB_ZUC256_KEY_LEN_IN_BYTES);
                         memcpy(pIV[j], vector->IV, vector->iv_length);
                         bitLength[j] = vector->length_in_bits;
                         byteLength = (bitLength[j] + 7) / 8;
@@ -1109,7 +1109,7 @@ int validate_zuc256_EIA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                         submit_eia3_jobs(mb_mgr, pKeys, pIV,
                                          pSrcData, pDstData,
                                          bitLength, numBuffs,
-                                         ZUC256_KEY_LEN_IN_BYTES, tag_sz,
+                                         IMB_ZUC256_KEY_LEN_IN_BYTES, tag_sz,
                                          iv_lens);
 
                         for (j = 0; j < numBuffs; j++) {
@@ -1125,7 +1125,7 @@ int validate_zuc256_EIA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
          * grouping all available tests vectors in groups of N buffers */
         for (i = 0; i < numBuffs; i++) {
                 vector = &test256EIA3_vectors[i % NUM_ZUC_256_EIA3_TESTS];
-                memcpy(pKeys[i], vector->CK, ZUC256_KEY_LEN_IN_BYTES);
+                memcpy(pKeys[i], vector->CK, IMB_ZUC256_KEY_LEN_IN_BYTES);
                 memcpy(pIV[i], vector->IV, vector->iv_length);
 
                 bitLength[i] = vector->length_in_bits;
@@ -1138,7 +1138,7 @@ int validate_zuc256_EIA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                 submit_eia3_jobs(mb_mgr, pKeys, pIV,
                                  pSrcData, pDstData,
                                  bitLength, numBuffs,
-                                 ZUC256_KEY_LEN_IN_BYTES, tag_sz,
+                                 IMB_ZUC256_KEY_LEN_IN_BYTES, tag_sz,
                                  iv_lens);
 
                 for (i = 0; i < numBuffs; i++) {
@@ -1165,8 +1165,8 @@ int validate_zuc_algorithm(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
         } swapBytes;
 
         for (i = 0; i < NUM_ZUC_ALG_TESTS; i++) {
-                memcpy(pKeys, testZUC_vectors[i].CK, ZUC_KEY_LEN_IN_BYTES);
-                memcpy(pIV, testZUC_vectors[i].IV, ZUC_IV_LEN_IN_BYTES);
+                memcpy(pKeys, testZUC_vectors[i].CK, IMB_ZUC_KEY_LEN_IN_BYTES);
+                memcpy(pIV, testZUC_vectors[i].IV, IMB_ZUC_IV_LEN_IN_BYTES);
                 memset(pSrcData, 0, 8);
                 IMB_ZUC_EEA3_1_BUFFER(mb_mgr, pKeys, pIV, pSrcData, pDstData,
                                       8);
diff --git a/test/zuc_test_vectors.h b/test/zuc_test_vectors.h
index 8ab1b343..37709538 100644
--- a/test/zuc_test_vectors.h
+++ b/test/zuc_test_vectors.h
@@ -35,11 +35,6 @@
 #define NUM_ZUC_256_EEA3_TESTS 10
 #define NUM_ZUC_256_EIA3_TESTS 12
 #define NUM_ZUC_EIA3_TESTS 10
-#define ZUC_KEY_LEN_IN_BYTES 16
-#define ZUC_IV_LEN_IN_BYTES 16
-#define ZUC256_KEY_LEN_IN_BYTES 32
-#define ZUC256_IV_LEN_IN_BYTES 25
-#define ZUC_DIGEST_LEN 4
 
 typedef struct testZUC_vectors_t {
 	uint8_t CK[16];
-- 
GitLab


From fbbcb3d462ac2d4149f4441b54e54ad20ec0bfbe Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Tue, 28 Feb 2023 16:30:35 +0000
Subject: [PATCH 137/332] test: [fuzz] fuzz kasumi direct api

---
 test/direct_api_fuzz_test.c | 147 ++++++++++++++++++++++++++++++++++++
 1 file changed, 147 insertions(+)

diff --git a/test/direct_api_fuzz_test.c b/test/direct_api_fuzz_test.c
index 6b7bf2ad..d5a84f09 100644
--- a/test/direct_api_fuzz_test.c
+++ b/test/direct_api_fuzz_test.c
@@ -801,6 +801,143 @@ static void test_crc8_wimax_ofdma_hcs(IMB_MGR *p_mgr, uint8_t *buff,
         IMB_CRC8_WIMAX_OFDMA_HCS(p_mgr, in, len);
 }
 
+static void test_kasumi_f8_init_key_sched(IMB_MGR *p_mgr, uint8_t *buff,
+                                          size_t dataSize)
+{
+        const void *key = buff;
+        kasumi_key_sched_t exp_key_s;
+        kasumi_key_sched_t *exp_key = &exp_key_s;
+
+        if (dataSize < IMB_KASUMI_KEY_SIZE)
+                return;
+
+        IMB_KASUMI_INIT_F8_KEY_SCHED(p_mgr, key, exp_key);
+}
+
+static void test_kasumi_f8_1_buff_bit(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const kasumi_key_sched_t exp_key_s;
+        const kasumi_key_sched_t *exp_key = &exp_key_s;
+        const uint32_t offset = (uint32_t) *buff * 8;
+
+        if (offset >= (dataSize * 8))
+                return;
+
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+	uint64_t len = (dataSize * 8) - offset;
+        const uint64_t iv = *((uint64_t *) buff);
+
+        IMB_KASUMI_F8_1_BUFFER_BIT(p_mgr, exp_key, iv, in, out, len, offset);
+}
+
+static void test_kasumi_f8_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const kasumi_key_sched_t exp_key_s;
+        const kasumi_key_sched_t *exp_key = &exp_key_s;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+	uint64_t len = dataSize;
+        const uint64_t iv = *((uint64_t *) buff);
+
+        IMB_KASUMI_F8_1_BUFFER(p_mgr, exp_key, iv, in, out, len);
+}
+
+static void test_kasumi_f8_2_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const kasumi_key_sched_t exp_key_s;
+        const kasumi_key_sched_t *exp_key = &exp_key_s;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+	uint64_t len = dataSize;
+        const uint64_t iv = *((uint64_t *) buff);
+
+        IMB_KASUMI_F8_2_BUFFER(p_mgr, exp_key, iv, iv, in,
+                               out, len, in, out, len);
+}
+
+static void test_kasumi_f8_3_buff(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+{
+        const kasumi_key_sched_t exp_key_s;
+        const kasumi_key_sched_t *exp_key = &exp_key_s;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+	uint64_t len = dataSize;
+        const uint64_t iv = *((uint64_t *) buff);
+
+        IMB_KASUMI_F8_3_BUFFER(p_mgr, exp_key, iv, iv, iv, in, out,
+                               in, out, in, out, len);
+}
+
+static void test_kasumi_f8_4_buff(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+{
+        const kasumi_key_sched_t exp_key_s;
+        const kasumi_key_sched_t *exp_key = &exp_key_s;
+        uint8_t *out = buff;
+        const uint8_t *in = buff;
+	uint64_t len = dataSize;
+        const uint64_t iv = *((uint64_t *) buff);
+
+        IMB_KASUMI_F8_4_BUFFER(p_mgr, exp_key, iv, iv, iv,
+                               iv, in, out, in, out,
+                               in, out, in, out, len);
+}
+
+static void test_kasumi_f8_n_buff(IMB_MGR *p_mgr, uint8_t *buff,  size_t dataSize)
+{
+        const kasumi_key_sched_t exp_key_s;
+        const kasumi_key_sched_t *exp_key = &exp_key_s;
+        const uint64_t *iv = (uint64_t *) buff;
+        const void *in[8];
+        void *out[8];
+        uint32_t len[8];
+
+        for (int i = 0; i < count; i++) {
+                in[i] = buff;
+                out[i] = buff;
+                len[i] = dataSize;
+        }
+
+        IMB_KASUMI_F8_N_BUFFER(p_mgr, exp_key, iv, in, out, len, count);
+}
+
+static void test_kasumi_f9_1_buff(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const kasumi_key_sched_t exp_key_s;
+        const kasumi_key_sched_t *exp_key = &exp_key_s;
+        const uint8_t *in = buff;
+	uint64_t len = dataSize;
+        uint8_t *tag = buff;
+
+        IMB_KASUMI_F9_1_BUFFER(p_mgr, exp_key, in, len, tag);
+}
+
+static void test_kasumi_f9_1_buff_user(IMB_MGR *p_mgr, uint8_t *buff, size_t dataSize)
+{
+        const kasumi_key_sched_t exp_key_s;
+        const kasumi_key_sched_t *exp_key = &exp_key_s;
+        const uint8_t *in = buff;
+	uint64_t len = dataSize * 8;
+        uint8_t *tag = buff;
+        const uint64_t iv = (uint64_t) buff;
+        const uint32_t dir = (uint32_t) *buff * 8;
+
+        IMB_KASUMI_F9_1_BUFFER_USER(p_mgr, exp_key, iv, in, len, tag, dir);
+}
+
+static void test_kasumi_f9_init_key_sched(IMB_MGR *p_mgr, uint8_t *buff,
+                                          size_t dataSize)
+{
+        const void *key = buff;
+        kasumi_key_sched_t exp_key_s;
+        kasumi_key_sched_t *exp_key = &exp_key_s;
+
+        if (dataSize < IMB_KASUMI_KEY_SIZE)
+                return;
+
+        IMB_KASUMI_INIT_F9_KEY_SCHED(p_mgr, key, exp_key);
+}
+
 struct {
         void (*func)(IMB_MGR *mb_mgr, uint8_t *buff, size_t dataSize);
         const char *func_name;
@@ -846,6 +983,16 @@ struct {
         {test_crc6_iuup_header, "test_crc6_iuup_header"},
         {test_crc32_wimax_ofdma_data, "test_crc32_wimax_ofdma_data"},
         {test_crc8_wimax_ofdma_hcs, "test_crc8_wimax_ofdma_hcs"},
+        {test_kasumi_f8_init_key_sched, "test_kasumi_f8_init_key_sched"},
+        {test_kasumi_f8_1_buff_bit, "test_kasumi_f8_1_buff_bit"},
+        {test_kasumi_f8_1_buff, "test_kasumi_f8_1_buff"},
+        {test_kasumi_f8_2_buff, "test_kasumi_f8_2_buff"},
+        {test_kasumi_f8_3_buff, "test_kasumi_f8_3_buff"},
+        {test_kasumi_f8_4_buff, "test_kasumi_f8_4_buff"},
+        {test_kasumi_f8_n_buff, "test_kasumi_f8_n_buff"},
+        {test_kasumi_f9_1_buff, "test_kasumi_f9_1_buff"},
+        {test_kasumi_f9_1_buff_user, "test_kasumi_f9_1_buff_user"},
+        {test_kasumi_f9_init_key_sched, "test_kasumi_f9_init_key_sched"},
 };
 
 int LLVMFuzzerTestOneInput(const uint8_t *data, size_t dataSize)
-- 
GitLab


From 22af6950a8f1204c448f6b639fd8d741157ec324 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 1 Mar 2023 20:53:38 +0000
Subject: [PATCH 138/332] lib: sort source files in CMakeLists.txt files

---
 lib/CMakeLists.txt | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index 72d834d4..7334ccf8 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -132,6 +132,8 @@ if(AVX_IFMA)
   list(APPEND SRC_FILES_C ${SRC_FILES_AVX2_T3})
 endif()
 
+list(SORT SRC_FILES_C)
+
 ########################################
 # generate list of assembly source files
 ########################################
@@ -140,6 +142,8 @@ foreach(DIR ${DIR_SOURCES})
   list(APPEND SRC_FILES_ASM ${TMP})
 endforeach()
 
+list(SORT SRC_FILES_ASM)
+
 ########################################
 # print build information
 ########################################
-- 
GitLab


From fa459140d0d315d0cb4137f54ab344e55c43f406 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 1 Mar 2023 23:06:27 +0000
Subject: [PATCH 139/332] test: create common directory

Common directory is used to store files common to all test applications
---
 test/common/common.mk     | 108 ++++++++++++++++++++++++++++++++++++++
 test/{ => common}/utils.c |   0
 2 files changed, 108 insertions(+)
 create mode 100644 test/common/common.mk
 rename test/{ => common}/utils.c (100%)

diff --git a/test/common/common.mk b/test/common/common.mk
new file mode 100644
index 00000000..06423c00
--- /dev/null
+++ b/test/common/common.mk
@@ -0,0 +1,108 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+INSTPATH ?= /usr/include/intel-ipsec-mb.h
+LIB_DIR ?= ../../lib
+
+USE_YASM ?= n
+YASM ?= yasm
+NASM ?= nasm
+
+MINGW ?= $(shell $(CC) -dM -E - < /dev/null | grep -i mingw | wc -l | sed 's/^ *//')
+
+CFLAGS = -MMD -D_GNU_SOURCE -DNO_COMPAT_IMB_API_053 \
+	-W -Wall -Wextra -Wmissing-declarations -Wpointer-arith \
+	-Wcast-qual -Wundef -Wwrite-strings  \
+	-Wformat -Wformat-security \
+	-Wunreachable-code -Wmissing-noreturn -Wsign-compare -Wno-endif-labels \
+	-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition \
+	-fno-delete-null-pointer-checks -fwrapv -std=c99
+
+# -fno-strict-overflow is not supported by clang
+ifneq ($(CC),clang)
+CFLAGS += -fno-strict-overflow
+endif
+
+# if "-z ibt" is supported then assume "-z shstk, -z cet-report=error" are also supported
+# "-fcf-protection" needs to be checked separately
+ifeq ($(MINGW),0)
+CC_HAS_CET = $(and $(shell $(CC) --target-help 2> /dev/null | grep -m1 -e "-z ibt" | wc -l), \
+	$(shell $(CC) --help=common 2> /dev/null | grep -m1 -e "-fcf-protection" | wc -l))
+CET_LDFLAGS=-r -z ibt -z shstk
+endif
+
+ifeq ($(CC_HAS_CET),1)
+CFLAGS += -fcf-protection=full
+endif
+
+YASM_FLAGS := -f x64 -f elf64 -X gnu -g dwarf2 -DLINUX -D__linux__
+ifeq ($(MINGW),0)
+CFLAGS += -DLINUX
+NASM_FLAGS := -Werror -felf64 -Xgnu -gdwarf -DLINUX -D__linux__
+else
+NASM_FLAGS := -Werror -fwin64 -Xvc -gcv8 -DWIN_ABI
+endif
+
+ifeq ($(MINGW),0)
+LDFLAGS = -fPIE -z noexecstack -z relro -z now
+else
+LDFLAGS = -fPIE
+endif
+
+ifeq ($(CC_HAS_CET),1)
+LDFLAGS += -fcf-protection=full -Wl,-z,ibt -Wl,-z,shstk -Wl,-z,cet-report=error
+endif
+LDLIBS = -lIPSec_MB
+
+ifeq ("$(shell test -r $(INSTPATH) && echo -n yes)","yes")
+# library installed
+CFLAGS +=
+else
+# library not installed
+CFLAGS +=  -I../../lib/include -I../../lib -I../include/
+LDFLAGS += -L$(LIB_DIR)
+endif
+
+DEBUG_OPT ?= -O0
+ifeq ($(DEBUG),y)
+CFLAGS += $(DEBUG_OPT) -DDEBUG -g
+LDFLAGS += -g
+else
+ifeq ($(MINGW),0)
+CFLAGS += -O3
+else
+CFLAGS += -O2
+endif
+endif
+
+ifneq ($(PIN_CEC_ROOT),)
+CFLAGS += -I$(PIN_CEC_ROOT)/include -DPIN_BASED_CEC
+endif
+
+# list of present dependency files
+DEP_FILES = $(wildcard ./*.d)
+
diff --git a/test/utils.c b/test/common/utils.c
similarity index 100%
rename from test/utils.c
rename to test/common/utils.c
-- 
GitLab


From 2c47de7131c0bcaca80905d91b50f7b94232966f Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 1 Mar 2023 23:08:31 +0000
Subject: [PATCH 140/332] test: create include directory

Used to store header files for test applications
---
 test/{ => include}/customop_test.h        | 0
 test/{ => include}/do_test.h              | 0
 test/{ => include}/gcm_ctr_vectors_test.h | 0
 test/{ => include}/gcm_vectors.h          | 0
 test/{ => include}/kasumi_test_vectors.h  | 0
 test/{ => include}/misc.h                 | 0
 test/{ => include}/snow3g_test_vectors.h  | 0
 test/{ => include}/utils.h                | 0
 test/{ => include}/zuc_test_vectors.h     | 0
 9 files changed, 0 insertions(+), 0 deletions(-)
 rename test/{ => include}/customop_test.h (100%)
 rename test/{ => include}/do_test.h (100%)
 rename test/{ => include}/gcm_ctr_vectors_test.h (100%)
 rename test/{ => include}/gcm_vectors.h (100%)
 rename test/{ => include}/kasumi_test_vectors.h (100%)
 rename test/{ => include}/misc.h (100%)
 rename test/{ => include}/snow3g_test_vectors.h (100%)
 rename test/{ => include}/utils.h (100%)
 rename test/{ => include}/zuc_test_vectors.h (100%)

diff --git a/test/customop_test.h b/test/include/customop_test.h
similarity index 100%
rename from test/customop_test.h
rename to test/include/customop_test.h
diff --git a/test/do_test.h b/test/include/do_test.h
similarity index 100%
rename from test/do_test.h
rename to test/include/do_test.h
diff --git a/test/gcm_ctr_vectors_test.h b/test/include/gcm_ctr_vectors_test.h
similarity index 100%
rename from test/gcm_ctr_vectors_test.h
rename to test/include/gcm_ctr_vectors_test.h
diff --git a/test/gcm_vectors.h b/test/include/gcm_vectors.h
similarity index 100%
rename from test/gcm_vectors.h
rename to test/include/gcm_vectors.h
diff --git a/test/kasumi_test_vectors.h b/test/include/kasumi_test_vectors.h
similarity index 100%
rename from test/kasumi_test_vectors.h
rename to test/include/kasumi_test_vectors.h
diff --git a/test/misc.h b/test/include/misc.h
similarity index 100%
rename from test/misc.h
rename to test/include/misc.h
diff --git a/test/snow3g_test_vectors.h b/test/include/snow3g_test_vectors.h
similarity index 100%
rename from test/snow3g_test_vectors.h
rename to test/include/snow3g_test_vectors.h
diff --git a/test/utils.h b/test/include/utils.h
similarity index 100%
rename from test/utils.h
rename to test/include/utils.h
diff --git a/test/zuc_test_vectors.h b/test/include/zuc_test_vectors.h
similarity index 100%
rename from test/zuc_test_vectors.h
rename to test/include/zuc_test_vectors.h
-- 
GitLab


From 63695d3eb2acc59b976f1f3fa3419ec5ab8d5f2d Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 1 Mar 2023 23:10:39 +0000
Subject: [PATCH 141/332] test: move test app to own directory

---
 test/Makefile                                 | 20 +++----
 test/{ => test-app}/.clang-format             |  0
 test/test-app/Makefile                        | 57 +++++++++++++++++++
 test/{ => test-app}/aes_cbcs_test.c           |  0
 test/{ => test-app}/aes_test.c                |  0
 test/{ => test-app}/api_test.c                |  0
 test/{ => test-app}/ccm_test.c                |  0
 test/{ => test-app}/chacha20_poly1305_test.c  |  0
 test/{ => test-app}/chacha_test.c             |  0
 test/{ => test-app}/chained_test.c            |  0
 test/{ => test-app}/clear_mem_test.c          |  0
 test/{ => test-app}/cmac_test.c               |  0
 test/{ => test-app}/crc_test.c                |  0
 test/{ => test-app}/ctr_test.c                |  0
 test/{ => test-app}/customop_test.c           |  0
 test/{ => test-app}/des_test.c                |  0
 test/{ => test-app}/direct_api_param_test.c   |  0
 .../direct_api_param_test.c_template          |  0
 test/{ => test-app}/direct_api_test.c         |  0
 test/{ => test-app}/ecb_test.c                |  0
 test/{ => test-app}/gcm_test.c                |  0
 test/{ => test-app}/hec_test.c                |  0
 test/{ => test-app}/hmac_md5_test.c           |  0
 test/{ => test-app}/hmac_sha1_test.c          |  0
 test/{ => test-app}/hmac_sha256_sha512_test.c |  0
 test/{ => test-app}/kasumi_test.c             |  0
 test/{ => test-app}/main.c                    |  0
 test/{ => test-app}/null_test.c               |  0
 test/{ => test-app}/poly1305_test.c           |  0
 test/{ => test-app}/pon_test.c                |  0
 test/{ => test-app}/quic_ecb_test.c           |  0
 test/{ => test-app}/sha_test.c                |  0
 test/{ => test-app}/snow3g_test.c             |  0
 test/{ => test-app}/snow_v_test.c             |  0
 test/{ => test-app}/test_api.py               |  2 +-
 test/{ => test-app}/xcbc_test.c               |  0
 test/{ => test-app}/zuc_test.c                |  0
 37 files changed, 65 insertions(+), 14 deletions(-)
 rename test/{ => test-app}/.clang-format (100%)
 create mode 100644 test/test-app/Makefile
 rename test/{ => test-app}/aes_cbcs_test.c (100%)
 rename test/{ => test-app}/aes_test.c (100%)
 rename test/{ => test-app}/api_test.c (100%)
 rename test/{ => test-app}/ccm_test.c (100%)
 rename test/{ => test-app}/chacha20_poly1305_test.c (100%)
 rename test/{ => test-app}/chacha_test.c (100%)
 rename test/{ => test-app}/chained_test.c (100%)
 rename test/{ => test-app}/clear_mem_test.c (100%)
 rename test/{ => test-app}/cmac_test.c (100%)
 rename test/{ => test-app}/crc_test.c (100%)
 rename test/{ => test-app}/ctr_test.c (100%)
 rename test/{ => test-app}/customop_test.c (100%)
 rename test/{ => test-app}/des_test.c (100%)
 rename test/{ => test-app}/direct_api_param_test.c (100%)
 rename test/{ => test-app}/direct_api_param_test.c_template (100%)
 rename test/{ => test-app}/direct_api_test.c (100%)
 rename test/{ => test-app}/ecb_test.c (100%)
 rename test/{ => test-app}/gcm_test.c (100%)
 rename test/{ => test-app}/hec_test.c (100%)
 rename test/{ => test-app}/hmac_md5_test.c (100%)
 rename test/{ => test-app}/hmac_sha1_test.c (100%)
 rename test/{ => test-app}/hmac_sha256_sha512_test.c (100%)
 rename test/{ => test-app}/kasumi_test.c (100%)
 rename test/{ => test-app}/main.c (100%)
 rename test/{ => test-app}/null_test.c (100%)
 rename test/{ => test-app}/poly1305_test.c (100%)
 rename test/{ => test-app}/pon_test.c (100%)
 rename test/{ => test-app}/quic_ecb_test.c (100%)
 rename test/{ => test-app}/sha_test.c (100%)
 rename test/{ => test-app}/snow3g_test.c (100%)
 rename test/{ => test-app}/snow_v_test.c (100%)
 rename test/{ => test-app}/test_api.py (99%)
 rename test/{ => test-app}/xcbc_test.c (100%)
 rename test/{ => test-app}/zuc_test.c (100%)

diff --git a/test/Makefile b/test/Makefile
index 393218d7..69486a44 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -25,8 +25,8 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-TEST_APP := ipsec_MB_testapp
 XVALID_APP := ipsec_xvalid_test
+TEST_APP := test-app
 FUZZ_APP := job_api_fuzz_test
 DIRECT_FUZZ_APP := direct_api_fuzz_test
 ACVP_APP := acvp_app
@@ -113,15 +113,6 @@ ACVP_CFLAGS = -I$(ACVP_HDR) $(CFLAGS)
 ACVP_LDFLAGS = -L$(ACVP_LIB) $(LDFLAGS)
 ACVP_LDLIBS = -lacvp $(LDLIBS)
 
-# ipsec_MB_testapp modules
-SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
-	cmac_test.c utils.c hmac_sha1_test.c hmac_sha256_sha512_test.c \
-	hmac_md5_test.c aes_test.c sha_test.c chained_test.c api_test.c pon_test.c \
-	ecb_test.c zuc_test.c kasumi_test.c snow3g_test.c direct_api_test.c clear_mem_test.c \
-	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
-	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c
-OBJECTS := $(SOURCES:%.c=%.o)
-
 ifneq ($(PIN_CEC_ROOT),)
 CFLAGS += -I$(PIN_CEC_ROOT)/include -DPIN_BASED_CEC
 endif
@@ -156,8 +147,10 @@ endif
 # targets come here
 all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
 
-$(TEST_APP): $(OBJECTS)
-	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
+.PHONY: $(TEST_APP)
+
+$(TEST_APP):
+	$(MAKE) -C test-app
 
 $(XVALID_APP): $(XVALID_OBJECTS)
 	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
@@ -193,7 +186,8 @@ endif
 
 .PHONY: clean
 clean:
-	-rm -f $(OBJECTS) $(TEST_APP) $(DEP_FILES) $(XVALID_OBJECTS) $(XVALID_APP) $(ASM_OBJECTS) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
+	$(MAKE) -C test-app clean
+	-rm -f $(DEP_FILES) $(XVALID_OBJECTS) $(XVALID_APP) $(ASM_OBJECTS) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
 
 # style check section
 CHECKPATCH?=checkpatch.pl
diff --git a/test/.clang-format b/test/test-app/.clang-format
similarity index 100%
rename from test/.clang-format
rename to test/test-app/.clang-format
diff --git a/test/test-app/Makefile b/test/test-app/Makefile
new file mode 100644
index 00000000..c6d4fe02
--- /dev/null
+++ b/test/test-app/Makefile
@@ -0,0 +1,57 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+TEST_APP := ipsec_MB_testapp
+
+# include common options
+include ../common/common.mk
+
+# ipsec_MB_testapp modules
+SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
+	cmac_test.c hmac_sha1_test.c hmac_sha256_sha512_test.c \
+	hmac_md5_test.c aes_test.c sha_test.c chained_test.c api_test.c pon_test.c \
+	ecb_test.c zuc_test.c kasumi_test.c snow3g_test.c direct_api_test.c clear_mem_test.c \
+	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
+	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
+	../common/utils.c
+OBJECTS := $(SOURCES:%.c=%.o)
+
+# targets come here
+all: $(TEST_APP)
+
+$(TEST_APP): $(OBJECTS)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
+
+.PHONY: clean
+clean:
+	-rm -f $(OBJECTS) $(TEST_APP) $(DEP_FILES)
+
+# if target not clean then make dependencies
+ifneq ($(MAKECMDGOALS),clean)
+-include $(wildcard *.d)
+endif
+
diff --git a/test/aes_cbcs_test.c b/test/test-app/aes_cbcs_test.c
similarity index 100%
rename from test/aes_cbcs_test.c
rename to test/test-app/aes_cbcs_test.c
diff --git a/test/aes_test.c b/test/test-app/aes_test.c
similarity index 100%
rename from test/aes_test.c
rename to test/test-app/aes_test.c
diff --git a/test/api_test.c b/test/test-app/api_test.c
similarity index 100%
rename from test/api_test.c
rename to test/test-app/api_test.c
diff --git a/test/ccm_test.c b/test/test-app/ccm_test.c
similarity index 100%
rename from test/ccm_test.c
rename to test/test-app/ccm_test.c
diff --git a/test/chacha20_poly1305_test.c b/test/test-app/chacha20_poly1305_test.c
similarity index 100%
rename from test/chacha20_poly1305_test.c
rename to test/test-app/chacha20_poly1305_test.c
diff --git a/test/chacha_test.c b/test/test-app/chacha_test.c
similarity index 100%
rename from test/chacha_test.c
rename to test/test-app/chacha_test.c
diff --git a/test/chained_test.c b/test/test-app/chained_test.c
similarity index 100%
rename from test/chained_test.c
rename to test/test-app/chained_test.c
diff --git a/test/clear_mem_test.c b/test/test-app/clear_mem_test.c
similarity index 100%
rename from test/clear_mem_test.c
rename to test/test-app/clear_mem_test.c
diff --git a/test/cmac_test.c b/test/test-app/cmac_test.c
similarity index 100%
rename from test/cmac_test.c
rename to test/test-app/cmac_test.c
diff --git a/test/crc_test.c b/test/test-app/crc_test.c
similarity index 100%
rename from test/crc_test.c
rename to test/test-app/crc_test.c
diff --git a/test/ctr_test.c b/test/test-app/ctr_test.c
similarity index 100%
rename from test/ctr_test.c
rename to test/test-app/ctr_test.c
diff --git a/test/customop_test.c b/test/test-app/customop_test.c
similarity index 100%
rename from test/customop_test.c
rename to test/test-app/customop_test.c
diff --git a/test/des_test.c b/test/test-app/des_test.c
similarity index 100%
rename from test/des_test.c
rename to test/test-app/des_test.c
diff --git a/test/direct_api_param_test.c b/test/test-app/direct_api_param_test.c
similarity index 100%
rename from test/direct_api_param_test.c
rename to test/test-app/direct_api_param_test.c
diff --git a/test/direct_api_param_test.c_template b/test/test-app/direct_api_param_test.c_template
similarity index 100%
rename from test/direct_api_param_test.c_template
rename to test/test-app/direct_api_param_test.c_template
diff --git a/test/direct_api_test.c b/test/test-app/direct_api_test.c
similarity index 100%
rename from test/direct_api_test.c
rename to test/test-app/direct_api_test.c
diff --git a/test/ecb_test.c b/test/test-app/ecb_test.c
similarity index 100%
rename from test/ecb_test.c
rename to test/test-app/ecb_test.c
diff --git a/test/gcm_test.c b/test/test-app/gcm_test.c
similarity index 100%
rename from test/gcm_test.c
rename to test/test-app/gcm_test.c
diff --git a/test/hec_test.c b/test/test-app/hec_test.c
similarity index 100%
rename from test/hec_test.c
rename to test/test-app/hec_test.c
diff --git a/test/hmac_md5_test.c b/test/test-app/hmac_md5_test.c
similarity index 100%
rename from test/hmac_md5_test.c
rename to test/test-app/hmac_md5_test.c
diff --git a/test/hmac_sha1_test.c b/test/test-app/hmac_sha1_test.c
similarity index 100%
rename from test/hmac_sha1_test.c
rename to test/test-app/hmac_sha1_test.c
diff --git a/test/hmac_sha256_sha512_test.c b/test/test-app/hmac_sha256_sha512_test.c
similarity index 100%
rename from test/hmac_sha256_sha512_test.c
rename to test/test-app/hmac_sha256_sha512_test.c
diff --git a/test/kasumi_test.c b/test/test-app/kasumi_test.c
similarity index 100%
rename from test/kasumi_test.c
rename to test/test-app/kasumi_test.c
diff --git a/test/main.c b/test/test-app/main.c
similarity index 100%
rename from test/main.c
rename to test/test-app/main.c
diff --git a/test/null_test.c b/test/test-app/null_test.c
similarity index 100%
rename from test/null_test.c
rename to test/test-app/null_test.c
diff --git a/test/poly1305_test.c b/test/test-app/poly1305_test.c
similarity index 100%
rename from test/poly1305_test.c
rename to test/test-app/poly1305_test.c
diff --git a/test/pon_test.c b/test/test-app/pon_test.c
similarity index 100%
rename from test/pon_test.c
rename to test/test-app/pon_test.c
diff --git a/test/quic_ecb_test.c b/test/test-app/quic_ecb_test.c
similarity index 100%
rename from test/quic_ecb_test.c
rename to test/test-app/quic_ecb_test.c
diff --git a/test/sha_test.c b/test/test-app/sha_test.c
similarity index 100%
rename from test/sha_test.c
rename to test/test-app/sha_test.c
diff --git a/test/snow3g_test.c b/test/test-app/snow3g_test.c
similarity index 100%
rename from test/snow3g_test.c
rename to test/test-app/snow3g_test.c
diff --git a/test/snow_v_test.c b/test/test-app/snow_v_test.c
similarity index 100%
rename from test/snow_v_test.c
rename to test/test-app/snow_v_test.c
diff --git a/test/test_api.py b/test/test-app/test_api.py
similarity index 99%
rename from test/test_api.py
rename to test/test-app/test_api.py
index 9d4f4851..92bbd77a 100755
--- a/test/test_api.py
+++ b/test/test-app/test_api.py
@@ -26,7 +26,7 @@
 # *****************************************************************************
 import os, re
 
-LIB_PATH = "../lib/"
+LIB_PATH = "../../lib/"
 LIB_NAME = "libIPSec_MB.so"
 LIB_HEADER = "intel-ipsec-mb.h"
 COMMON_TOP_LINES = "direct_api_param_test.c_template"
diff --git a/test/xcbc_test.c b/test/test-app/xcbc_test.c
similarity index 100%
rename from test/xcbc_test.c
rename to test/test-app/xcbc_test.c
diff --git a/test/zuc_test.c b/test/test-app/zuc_test.c
similarity index 100%
rename from test/zuc_test.c
rename to test/test-app/zuc_test.c
-- 
GitLab


From 89258b8a562231db678c5a45a11fec77b575f2b1 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 2 Mar 2023 14:21:16 +0000
Subject: [PATCH 142/332] test: move xvalid app to own directory

---
 test/Makefile                        | 40 +++---------------
 test/xvalid-app/Makefile             | 63 ++++++++++++++++++++++++++++
 test/{ => xvalid-app}/ipsec_xvalid.c |  0
 test/{ => xvalid-app}/misc.asm       |  0
 4 files changed, 69 insertions(+), 34 deletions(-)
 create mode 100644 test/xvalid-app/Makefile
 rename test/{ => xvalid-app}/ipsec_xvalid.c (100%)
 rename test/{ => xvalid-app}/misc.asm (100%)

diff --git a/test/Makefile b/test/Makefile
index 69486a44..dd06bdfc 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -25,18 +25,14 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-XVALID_APP := ipsec_xvalid_test
 TEST_APP := test-app
+XVALID_APP := xvalid-app
 FUZZ_APP := job_api_fuzz_test
 DIRECT_FUZZ_APP := direct_api_fuzz_test
 ACVP_APP := acvp_app
 INSTPATH ?= /usr/include/intel-ipsec-mb.h
 LIB_DIR ?= ../lib
 
-USE_YASM ?= n
-YASM ?= yasm
-NASM ?= nasm
-
 MINGW ?= $(shell $(CC) -dM -E - < /dev/null | grep -i mingw | wc -l | sed 's/^ *//')
 
 CFLAGS = -MMD -D_GNU_SOURCE -DNO_COMPAT_IMB_API_053 \
@@ -64,14 +60,6 @@ ifeq ($(CC_HAS_CET),1)
 CFLAGS += -fcf-protection=full
 endif
 
-YASM_FLAGS := -f x64 -f elf64 -X gnu -g dwarf2 -DLINUX -D__linux__
-ifeq ($(MINGW),0)
-CFLAGS += -DLINUX
-NASM_FLAGS := -Werror -felf64 -Xgnu -gdwarf -DLINUX -D__linux__
-else
-NASM_FLAGS := -Werror -fwin64 -Xvc -gcv8 -DWIN_ABI
-endif
-
 ifeq ($(MINGW),0)
 LDFLAGS = -fPIE -z noexecstack -z relro -z now
 else
@@ -117,11 +105,6 @@ ifneq ($(PIN_CEC_ROOT),)
 CFLAGS += -I$(PIN_CEC_ROOT)/include -DPIN_BASED_CEC
 endif
 
-# ipsec_xvalid_test modules
-XVALID_ASM := misc.asm
-XVALID_SOURCES := ipsec_xvalid.c utils.c
-XVALID_OBJECTS := $(XVALID_SOURCES:%.c=%.o) $(XVALID_ASM:%.asm=%.o)
-
 # fuzz modules
 FUZZ_SOURCES := job_api_fuzz_test.c
 DIRECT_FUZZ_SOURCES := direct_api_fuzz_test.c
@@ -132,28 +115,16 @@ ACVP_SOURCES := acvp_app_main.c utils.c
 # list of present dependency files
 DEP_FILES = $(wildcard ./*.d)
 
-# rule for compiling assembly code with producing dependencies
-%.o:%.asm
-ifeq ($(USE_YASM),y)
-	$(YASM) $(YASM_FLAGS) $< -o $@
-else
-	$(NASM) -MD $(@:.o=.d) -MT $@ -o $@ $(NASM_FLAGS) $<
-endif
-ifeq ($(CC_HAS_CET),1)
-	$(LD) $(CET_LDFLAGS) -o $@.tmp $@
-	mv $@.tmp $@
-endif
-
 # targets come here
 all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
 
-.PHONY: $(TEST_APP)
+.PHONY: $(TEST_APP) $(XVALID_APP)
 
 $(TEST_APP):
 	$(MAKE) -C test-app
 
-$(XVALID_APP): $(XVALID_OBJECTS)
-	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
+$(XVALID_APP):
+	$(MAKE) -C xvalid-app
 
 $(ACVP_APP): $(ACVP_SOURCES)
 ifneq ("$(wildcard $(ACVP_HDR))","")
@@ -187,7 +158,8 @@ endif
 .PHONY: clean
 clean:
 	$(MAKE) -C test-app clean
-	-rm -f $(DEP_FILES) $(XVALID_OBJECTS) $(XVALID_APP) $(ASM_OBJECTS) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
+	$(MAKE) -C xvalid-app clean
+	-rm -f $(DEP_FILES) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
 
 # style check section
 CHECKPATCH?=checkpatch.pl
diff --git a/test/xvalid-app/Makefile b/test/xvalid-app/Makefile
new file mode 100644
index 00000000..72c7ab9c
--- /dev/null
+++ b/test/xvalid-app/Makefile
@@ -0,0 +1,63 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+XVALID_APP := ipsec_xvalid_test
+
+# include common options
+include ../common/common.mk
+
+# ipsec_xvalid_test modules
+XVALID_ASM := misc.asm
+XVALID_SOURCES := ipsec_xvalid.c ../common/utils.c
+XVALID_OBJECTS := $(XVALID_SOURCES:%.c=%.o) $(XVALID_ASM:%.asm=%.o)
+
+# rule for compiling assembly code with producing dependencies
+%.o:%.asm
+ifeq ($(USE_YASM),y)
+	$(YASM) $(YASM_FLAGS) $< -o $@
+else
+	$(NASM) -MD $(@:.o=.d) -MT $@ -o $@ $(NASM_FLAGS) $<
+endif
+ifeq ($(CC_HAS_CET),1)
+	$(LD) $(CET_LDFLAGS) -o $@.tmp $@
+	mv $@.tmp $@
+endif
+
+# targets come here
+all: $(XVALID_APP)
+
+$(XVALID_APP): $(XVALID_OBJECTS)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
+
+.PHONY: clean
+clean:
+	-rm -f $(DEP_FILES) $(XVALID_OBJECTS) $(XVALID_APP) $(ASM_OBJECTS)
+
+# if target not clean then make dependencies
+ifneq ($(MAKECMDGOALS),clean)
+-include $(wildcard *.d)
+endif
diff --git a/test/ipsec_xvalid.c b/test/xvalid-app/ipsec_xvalid.c
similarity index 100%
rename from test/ipsec_xvalid.c
rename to test/xvalid-app/ipsec_xvalid.c
diff --git a/test/misc.asm b/test/xvalid-app/misc.asm
similarity index 100%
rename from test/misc.asm
rename to test/xvalid-app/misc.asm
-- 
GitLab


From 01a9f4b446c31cc30e42ca012d03854412e1e38f Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 2 Mar 2023 14:56:09 +0000
Subject: [PATCH 143/332] test: move fuzz apps to own directory

---
 test/Makefile                              | 37 ++---------
 test/fuzz-app/Makefile                     | 72 ++++++++++++++++++++++
 test/{ => fuzz-app}/direct_api_fuzz_test.c |  0
 test/{ => fuzz-app}/job_api_fuzz_test.c    |  0
 4 files changed, 78 insertions(+), 31 deletions(-)
 create mode 100644 test/fuzz-app/Makefile
 rename test/{ => fuzz-app}/direct_api_fuzz_test.c (100%)
 rename test/{ => fuzz-app}/job_api_fuzz_test.c (100%)

diff --git a/test/Makefile b/test/Makefile
index dd06bdfc..5d0e3dfb 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -27,8 +27,7 @@
 
 TEST_APP := test-app
 XVALID_APP := xvalid-app
-FUZZ_APP := job_api_fuzz_test
-DIRECT_FUZZ_APP := direct_api_fuzz_test
+FUZZ_APP := fuzz-app
 ACVP_APP := acvp_app
 INSTPATH ?= /usr/include/intel-ipsec-mb.h
 LIB_DIR ?= ../lib
@@ -80,8 +79,6 @@ CFLAGS +=  -I../lib/include -I../lib
 LDFLAGS += -L$(LIB_DIR)
 endif
 
-FUZZ_CFLAGS = -I../lib -L../lib $(CFLAGS) -g -fsanitize=fuzzer,address,leak
-
 DEBUG_OPT ?= -O0
 ifeq ($(DEBUG),y)
 CFLAGS += $(DEBUG_OPT) -DDEBUG -g
@@ -105,10 +102,6 @@ ifneq ($(PIN_CEC_ROOT),)
 CFLAGS += -I$(PIN_CEC_ROOT)/include -DPIN_BASED_CEC
 endif
 
-# fuzz modules
-FUZZ_SOURCES := job_api_fuzz_test.c
-DIRECT_FUZZ_SOURCES := direct_api_fuzz_test.c
-
 # acvp_app modules
 ACVP_SOURCES := acvp_app_main.c utils.c
 
@@ -118,7 +111,7 @@ DEP_FILES = $(wildcard ./*.d)
 # targets come here
 all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
 
-.PHONY: $(TEST_APP) $(XVALID_APP)
+.PHONY: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP)
 
 $(TEST_APP):
 	$(MAKE) -C test-app
@@ -133,33 +126,15 @@ else
 	@echo "No libacvp header found at $(ACVP_HDR), $(ACVP_APP) is not built"
 endif
 
-$(FUZZ_APP): $(FUZZ_SOURCES)
-ifeq ($(MINGW),0)
-ifneq (, $(shell which clang))
-	clang $(FUZZ_CFLAGS) $(FUZZ_SOURCES) $(LDLIBS) -o $@
-else
-	@echo "Clang is not installed. $(FUZZ_APP) is not built"
-endif
-else
-	@echo "Fuzzing not supported on MinGW build. $(FUZZ_APP) is not built"
-endif
-
-$(DIRECT_FUZZ_APP): $(DIRECT_FUZZ_SOURCES)
-ifeq ($(MINGW),0)
-ifneq (, $(shell which clang))
-	clang $(FUZZ_CFLAGS) $(DIRECT_FUZZ_SOURCES) $(LDLIBS) -o $@
-else
-	@echo "Clang is not installed. $(DIRECT_FUZZ_APP) is not built"
-endif
-else
-	@echo "Fuzzing not supported on MinGW build. $(DIRECT_FUZZ_APP) is not built"
-endif
+$(FUZZ_APP):
+	$(MAKE) -C fuzz-app
 
 .PHONY: clean
 clean:
 	$(MAKE) -C test-app clean
 	$(MAKE) -C xvalid-app clean
-	-rm -f $(DEP_FILES) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
+	$(MAKE) -C fuzz-app clean
+	-rm -f $(DEP_FILES) $(ACVP_APP)
 
 # style check section
 CHECKPATCH?=checkpatch.pl
diff --git a/test/fuzz-app/Makefile b/test/fuzz-app/Makefile
new file mode 100644
index 00000000..267c3aab
--- /dev/null
+++ b/test/fuzz-app/Makefile
@@ -0,0 +1,72 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+FUZZ_APP := job_api_fuzz_test
+DIRECT_FUZZ_APP := direct_api_fuzz_test
+
+# include common options
+include ../common/common.mk
+
+FUZZ_CFLAGS = -I../../lib -L../../lib $(CFLAGS) -g -fsanitize=fuzzer,address,leak
+
+# fuzz modules
+FUZZ_SOURCES := job_api_fuzz_test.c
+DIRECT_FUZZ_SOURCES := direct_api_fuzz_test.c
+
+# targets come here
+all: $(FUZZ_APP) $(DIRECT_FUZZ_APP)
+
+$(FUZZ_APP): $(FUZZ_SOURCES)
+ifeq ($(MINGW),0)
+ifneq (, $(shell which clang))
+	clang $(FUZZ_CFLAGS) $(FUZZ_SOURCES) $(LDLIBS) -o $@
+else
+	@echo "Clang is not installed. $(FUZZ_APP) is not built"
+endif
+else
+	@echo "Fuzzing not supported on MinGW build. $(FUZZ_APP) is not built"
+endif
+
+$(DIRECT_FUZZ_APP): $(DIRECT_FUZZ_SOURCES)
+ifeq ($(MINGW),0)
+ifneq (, $(shell which clang))
+	clang $(FUZZ_CFLAGS) $(DIRECT_FUZZ_SOURCES) $(LDLIBS) -o $@
+else
+	@echo "Clang is not installed. $(DIRECT_FUZZ_APP) is not built"
+endif
+else
+	@echo "Fuzzing not supported on MinGW build. $(DIRECT_FUZZ_APP) is not built"
+endif
+
+.PHONY: clean
+clean:
+	-rm -f $(DEP_FILES) $(FUZZ_APP) $(DIRECT_FUZZ_APP)
+
+# if target not clean then make dependencies
+ifneq ($(MAKECMDGOALS),clean)
+-include $(wildcard *.d)
+endif
diff --git a/test/direct_api_fuzz_test.c b/test/fuzz-app/direct_api_fuzz_test.c
similarity index 100%
rename from test/direct_api_fuzz_test.c
rename to test/fuzz-app/direct_api_fuzz_test.c
diff --git a/test/job_api_fuzz_test.c b/test/fuzz-app/job_api_fuzz_test.c
similarity index 100%
rename from test/job_api_fuzz_test.c
rename to test/fuzz-app/job_api_fuzz_test.c
-- 
GitLab


From e514810e3ffc1add9ed0aea3bde6d01ea281f99a Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 2 Mar 2023 15:07:43 +0000
Subject: [PATCH 144/332] test: move acvp app to own directory

---
 test/Makefile                       | 27 +++----------
 test/acvp-app/Makefile              | 60 +++++++++++++++++++++++++++++
 test/{ => acvp-app}/acvp_app_main.c |  0
 3 files changed, 65 insertions(+), 22 deletions(-)
 create mode 100644 test/acvp-app/Makefile
 rename test/{ => acvp-app}/acvp_app_main.c (100%)

diff --git a/test/Makefile b/test/Makefile
index 5d0e3dfb..11abbfbb 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -28,7 +28,7 @@
 TEST_APP := test-app
 XVALID_APP := xvalid-app
 FUZZ_APP := fuzz-app
-ACVP_APP := acvp_app
+ACVP_APP := acvp-app
 INSTPATH ?= /usr/include/intel-ipsec-mb.h
 LIB_DIR ?= ../lib
 
@@ -91,27 +91,17 @@ CFLAGS += -O2
 endif
 endif
 
-ACVP_LOC ?= /usr/local/acvp
-ACVP_HDR ?= $(ACVP_LOC)/include
-ACVP_LIB ?= $(ACVP_LOC)/lib
-ACVP_CFLAGS = -I$(ACVP_HDR) $(CFLAGS)
-ACVP_LDFLAGS = -L$(ACVP_LIB) $(LDFLAGS)
-ACVP_LDLIBS = -lacvp $(LDLIBS)
-
 ifneq ($(PIN_CEC_ROOT),)
 CFLAGS += -I$(PIN_CEC_ROOT)/include -DPIN_BASED_CEC
 endif
 
-# acvp_app modules
-ACVP_SOURCES := acvp_app_main.c utils.c
-
 # list of present dependency files
 DEP_FILES = $(wildcard ./*.d)
 
 # targets come here
 all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
 
-.PHONY: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP)
+.PHONY: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP)
 
 $(TEST_APP):
 	$(MAKE) -C test-app
@@ -119,22 +109,15 @@ $(TEST_APP):
 $(XVALID_APP):
 	$(MAKE) -C xvalid-app
 
-$(ACVP_APP): $(ACVP_SOURCES)
-ifneq ("$(wildcard $(ACVP_HDR))","")
-	$(CC) $(ACVP_CFLAGS) $(ACVP_LDFLAGS) $^ $(ACVP_LDLIBS) -o $@
-else
-	@echo "No libacvp header found at $(ACVP_HDR), $(ACVP_APP) is not built"
-endif
-
-$(FUZZ_APP):
-	$(MAKE) -C fuzz-app
+$(ACVP_APP):
+	$(MAKE) -C acvp-app
 
 .PHONY: clean
 clean:
 	$(MAKE) -C test-app clean
 	$(MAKE) -C xvalid-app clean
 	$(MAKE) -C fuzz-app clean
-	-rm -f $(DEP_FILES) $(ACVP_APP)
+	$(MAKE) -C acvp-app clean
 
 # style check section
 CHECKPATCH?=checkpatch.pl
diff --git a/test/acvp-app/Makefile b/test/acvp-app/Makefile
new file mode 100644
index 00000000..0e1313e0
--- /dev/null
+++ b/test/acvp-app/Makefile
@@ -0,0 +1,60 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+ACVP_APP := acvp_app
+
+# include common options
+include ../common/common.mk
+
+ACVP_LOC ?= /usr/local/acvp
+ACVP_HDR ?= $(ACVP_LOC)/include
+ACVP_LIB ?= $(ACVP_LOC)/lib
+ACVP_CFLAGS = -I$(ACVP_HDR) $(CFLAGS)
+ACVP_LDFLAGS = -L$(ACVP_LIB) $(LDFLAGS)
+ACVP_LDLIBS = -lacvp $(LDLIBS)
+
+# acvp_app modules
+ACVP_SOURCES := acvp_app_main.c ../common/utils.c
+
+# targets come here
+all: $(ACVP_APP)
+
+$(ACVP_APP): $(ACVP_SOURCES)
+ifneq ("$(wildcard $(ACVP_HDR))","")
+	$(CC) $(ACVP_CFLAGS) $(ACVP_LDFLAGS) $^ $(ACVP_LDLIBS) -o $@
+else
+	@echo "No libacvp header found at $(ACVP_HDR), $(ACVP_APP) is not built"
+endif
+
+.PHONY: clean
+clean:
+	-rm -f $(DEP_FILES) $(ACVP_APP)
+
+# if target not clean then make dependencies
+ifneq ($(MAKECMDGOALS),clean)
+-include $(wildcard *.d)
+endif
diff --git a/test/acvp_app_main.c b/test/acvp-app/acvp_app_main.c
similarity index 100%
rename from test/acvp_app_main.c
rename to test/acvp-app/acvp_app_main.c
-- 
GitLab


From 07a565ce1c5b701c3032962130d2c550f4d6bab6 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 2 Mar 2023 15:40:13 +0000
Subject: [PATCH 145/332] test: update stylecheck and checkpatch recipes

---
 test/Makefile | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/test/Makefile b/test/Makefile
index 11abbfbb..c42fad69 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -135,7 +135,11 @@ CHECKPATCH_FLAGS = --no-tree --no-signoff --emacs --no-color --max-line-length=1
 %.inc_style_check : %.inc
 	$(CHECKPATCH) $(CHECKPATCH_FLAGS) -f $<
 
-SOURCES_ALL := $(wildcard *.[ch]) $(wildcard *.asm) $(wildcard *.inc)
+TEST_APP_SOURCES := $(wildcard $(TEST_APP)/*.[ch]) $(wildcard $(TEST_APP)/*.asm) $(wildcard $(TEST_APP)/*.inc)
+XVALID_APP_SOURCES := $(wildcard $(XVALID_APP)/*.[ch]) $(wildcard $(XVALID_APP)/*.asm) $(wildcard $(XVALID_APP)/*.inc)
+FUZZ_APP_SOURCES := $(wildcard $(FUZZ_APP)/*.[ch]) $(wildcard $(FUZZ_APP)/*.asm) $(wildcard $(FUZZ_APP)/*.inc)
+ACVP_APP_SOURCES := $(wildcard $(ACVP_APP)/*.[ch]) $(wildcard $(ACVP_APP)/*.asm) $(wildcard $(ACVP_APP)/*.inc)
+SOURCES_ALL := $(TEST_APP_SOURCES) $(XVALID_APP_SOURCES) $(FUZZ_APP_SOURCES) $(ACVP_APP_SOURCES)
 SOURCES_STYLE := $(foreach infile,$(SOURCES_ALL),$(infile)_style_check)
 
 .PHONY: style
@@ -150,12 +154,12 @@ CPPCHECK_FLAGS2 ?= --cppcheck-build-dir=.bughunt $(CPPCHECK_FLAGS)
 .PHONY: cppcheck
 cppcheck:
 	mkdir -p .cppcheck
-	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) ./
+	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) ./test-app ./xvalid-app ./fuzz-app ./acvp-app
 
 .PHONY: bughunt
 bughunt:
 	mkdir -p .bughunt
-	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) ./
+	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) ./test-app ./xvalid-app ./fuzz-app ./acvp-app
 
 # if target not clean or rinse then make dependencies
 ifneq ($(MAKECMDGOALS),clean)
-- 
GitLab


From ace03c2b8926938a3878f83247d71bccc779ae09 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 2 Mar 2023 15:40:53 +0000
Subject: [PATCH 146/332] test: remove unused options from Makefile

---
 test/Makefile | 78 ++-------------------------------------------------
 1 file changed, 2 insertions(+), 76 deletions(-)

diff --git a/test/Makefile b/test/Makefile
index c42fad69..af12f3b7 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2012-2022, Intel Corporation
+# Copyright (c) 2012-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
@@ -29,77 +29,9 @@ TEST_APP := test-app
 XVALID_APP := xvalid-app
 FUZZ_APP := fuzz-app
 ACVP_APP := acvp-app
-INSTPATH ?= /usr/include/intel-ipsec-mb.h
-LIB_DIR ?= ../lib
-
-MINGW ?= $(shell $(CC) -dM -E - < /dev/null | grep -i mingw | wc -l | sed 's/^ *//')
-
-CFLAGS = -MMD -D_GNU_SOURCE -DNO_COMPAT_IMB_API_053 \
-	-W -Wall -Wextra -Wmissing-declarations -Wpointer-arith \
-	-Wcast-qual -Wundef -Wwrite-strings  \
-	-Wformat -Wformat-security \
-	-Wunreachable-code -Wmissing-noreturn -Wsign-compare -Wno-endif-labels \
-	-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition \
-	-fno-delete-null-pointer-checks -fwrapv -std=c99
-
-# -fno-strict-overflow is not supported by clang
-ifneq ($(CC),clang)
-CFLAGS += -fno-strict-overflow
-endif
-
-# if "-z ibt" is supported then assume "-z shstk, -z cet-report=error" are also supported
-# "-fcf-protection" needs to be checked separately
-ifeq ($(MINGW),0)
-CC_HAS_CET = $(and $(shell $(CC) --target-help 2> /dev/null | grep -m1 -e "-z ibt" | wc -l), \
-	$(shell $(CC) --help=common 2> /dev/null | grep -m1 -e "-fcf-protection" | wc -l))
-CET_LDFLAGS=-r -z ibt -z shstk
-endif
-
-ifeq ($(CC_HAS_CET),1)
-CFLAGS += -fcf-protection=full
-endif
-
-ifeq ($(MINGW),0)
-LDFLAGS = -fPIE -z noexecstack -z relro -z now
-else
-LDFLAGS = -fPIE
-endif
-
-ifeq ($(CC_HAS_CET),1)
-LDFLAGS += -fcf-protection=full -Wl,-z,ibt -Wl,-z,shstk -Wl,-z,cet-report=error
-endif
-LDLIBS = -lIPSec_MB
-
-ifeq ("$(shell test -r $(INSTPATH) && echo -n yes)","yes")
-# library installed
-CFLAGS +=
-else
-# library not installed
-CFLAGS +=  -I../lib/include -I../lib
-LDFLAGS += -L$(LIB_DIR)
-endif
-
-DEBUG_OPT ?= -O0
-ifeq ($(DEBUG),y)
-CFLAGS += $(DEBUG_OPT) -DDEBUG -g
-LDFLAGS += -g
-else
-ifeq ($(MINGW),0)
-CFLAGS += -O3
-else
-CFLAGS += -O2
-endif
-endif
-
-ifneq ($(PIN_CEC_ROOT),)
-CFLAGS += -I$(PIN_CEC_ROOT)/include -DPIN_BASED_CEC
-endif
-
-# list of present dependency files
-DEP_FILES = $(wildcard ./*.d)
 
 # targets come here
-all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(DIRECT_FUZZ_APP) $(ACVP_APP)
+all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP)
 
 .PHONY: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP)
 
@@ -161,9 +93,3 @@ bughunt:
 	mkdir -p .bughunt
 	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) ./test-app ./xvalid-app ./fuzz-app ./acvp-app
 
-# if target not clean or rinse then make dependencies
-ifneq ($(MAKECMDGOALS),clean)
-ifneq ($(MAKECMDGOALS),style)
--include $(wildcard *.d)
-endif
-endif
-- 
GitLab


From 10ad88a5b737c728ea5c272b2e7e2c9b98f84d6c Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 2 Mar 2023 16:02:32 +0000
Subject: [PATCH 147/332] test: rename wycheproof directory

- Rename wycheproof directory to wycheproof-app
- Improve stylecheck and checkpatch formatting
---
 Makefile                                      |   3 -
 test/Makefile                                 |  32 ++--
 test/wycheproof-app/Makefile                  |  52 +++++++
 .../aead_test.h                               |   0
 .../aes_ccm_test.json.c                       |   0
 .../aes_cmac_test.json.c                      |   0
 .../aes_gcm_test.json.c                       |   0
 .../chacha20_poly1305_test.json.c             |   0
 .../gmac_test.json.c                          |   0
 .../hmac_sha1_test.json.c                     |   0
 .../hmac_sha224_test.json.c                   |   0
 .../hmac_sha256_test.json.c                   |   0
 .../hmac_sha384_test.json.c                   |   0
 .../hmac_sha512_test.json.c                   |   0
 .../{wycheproof => wycheproof-app}/mac_test.h |   0
 .../win_x64.mak                               |   0
 .../wycheproof.c                              |   0
 test/wycheproof/Makefile                      | 143 ------------------
 18 files changed, 75 insertions(+), 155 deletions(-)
 create mode 100644 test/wycheproof-app/Makefile
 rename test/{wycheproof => wycheproof-app}/aead_test.h (100%)
 rename test/{wycheproof => wycheproof-app}/aes_ccm_test.json.c (100%)
 rename test/{wycheproof => wycheproof-app}/aes_cmac_test.json.c (100%)
 rename test/{wycheproof => wycheproof-app}/aes_gcm_test.json.c (100%)
 rename test/{wycheproof => wycheproof-app}/chacha20_poly1305_test.json.c (100%)
 rename test/{wycheproof => wycheproof-app}/gmac_test.json.c (100%)
 rename test/{wycheproof => wycheproof-app}/hmac_sha1_test.json.c (100%)
 rename test/{wycheproof => wycheproof-app}/hmac_sha224_test.json.c (100%)
 rename test/{wycheproof => wycheproof-app}/hmac_sha256_test.json.c (100%)
 rename test/{wycheproof => wycheproof-app}/hmac_sha384_test.json.c (100%)
 rename test/{wycheproof => wycheproof-app}/hmac_sha512_test.json.c (100%)
 rename test/{wycheproof => wycheproof-app}/mac_test.h (100%)
 rename test/{wycheproof => wycheproof-app}/win_x64.mak (100%)
 rename test/{wycheproof => wycheproof-app}/wycheproof.c (100%)
 delete mode 100644 test/wycheproof/Makefile

diff --git a/Makefile b/Makefile
index 1286c6a4..2812350a 100644
--- a/Makefile
+++ b/Makefile
@@ -30,19 +30,16 @@
 all:
 	$(MAKE) -C lib
 	$(MAKE) -C test
-	$(MAKE) -C test/wycheproof
 	$(MAKE) -C perf
 
 clean:
 	$(MAKE) -C lib clean
 	$(MAKE) -C test clean
-	$(MAKE) -C test/wycheproof clean
 	$(MAKE) -C perf clean
 
 style:
 	$(MAKE) -C lib style
 	$(MAKE) -C test style
-	$(MAKE) -C test/wycheproof style
 	$(MAKE) -C perf style
 
 install:
diff --git a/test/Makefile b/test/Makefile
index af12f3b7..3072b92f 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -29,11 +29,12 @@ TEST_APP := test-app
 XVALID_APP := xvalid-app
 FUZZ_APP := fuzz-app
 ACVP_APP := acvp-app
+WYCHEPROOF_APP := wycheproof-app
 
 # targets come here
-all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP)
+all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP) $(WYCHEPROOF_APP)
 
-.PHONY: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP)
+.PHONY: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP) $(WYCHEPROOF_APP)
 
 $(TEST_APP):
 	$(MAKE) -C test-app
@@ -41,15 +42,22 @@ $(TEST_APP):
 $(XVALID_APP):
 	$(MAKE) -C xvalid-app
 
+$(FUZZ_APP):
+	$(MAKE) -C fuzz-app
+
 $(ACVP_APP):
 	$(MAKE) -C acvp-app
 
+$(WYCHEPROOF_APP):
+	$(MAKE) -C wycheproof-app
+
 .PHONY: clean
 clean:
 	$(MAKE) -C test-app clean
 	$(MAKE) -C xvalid-app clean
 	$(MAKE) -C fuzz-app clean
 	$(MAKE) -C acvp-app clean
+	$(MAKE) -C wycheproof-app clean
 
 # style check section
 CHECKPATCH?=checkpatch.pl
@@ -67,11 +75,15 @@ CHECKPATCH_FLAGS = --no-tree --no-signoff --emacs --no-color --max-line-length=1
 %.inc_style_check : %.inc
 	$(CHECKPATCH) $(CHECKPATCH_FLAGS) -f $<
 
-TEST_APP_SOURCES := $(wildcard $(TEST_APP)/*.[ch]) $(wildcard $(TEST_APP)/*.asm) $(wildcard $(TEST_APP)/*.inc)
-XVALID_APP_SOURCES := $(wildcard $(XVALID_APP)/*.[ch]) $(wildcard $(XVALID_APP)/*.asm) $(wildcard $(XVALID_APP)/*.inc)
-FUZZ_APP_SOURCES := $(wildcard $(FUZZ_APP)/*.[ch]) $(wildcard $(FUZZ_APP)/*.asm) $(wildcard $(FUZZ_APP)/*.inc)
-ACVP_APP_SOURCES := $(wildcard $(ACVP_APP)/*.[ch]) $(wildcard $(ACVP_APP)/*.asm) $(wildcard $(ACVP_APP)/*.inc)
-SOURCES_ALL := $(TEST_APP_SOURCES) $(XVALID_APP_SOURCES) $(FUZZ_APP_SOURCES) $(ACVP_APP_SOURCES)
+TEST_APP_SOURCES := $(wildcard $(TEST_APP)/*.[ch])
+FUZZ_APP_SOURCES := $(wildcard $(FUZZ_APP)/*.[ch])
+ACVP_APP_SOURCES := $(wildcard $(ACVP_APP)/*.[ch])
+WYCHEPROOF_APP_SOURCES := $(wildcard $(WYCHEPROOF_APP)/*.[ch])
+XVALID_APP_SOURCES := $(wildcard $(XVALID_APP)/*.[ch]) \
+		      $(wildcard $(XVALID_APP)/*.asm) \
+		      $(wildcard $(XVALID_APP)/*.inc)
+SOURCES_ALL := $(TEST_APP_SOURCES) $(XVALID_APP_SOURCES) \
+	       $(FUZZ_APP_SOURCES) $(ACVP_APP_SOURCES) $(WYCHEPROOF_APP_SOURCES)
 SOURCES_STYLE := $(foreach infile,$(SOURCES_ALL),$(infile)_style_check)
 
 .PHONY: style
@@ -86,10 +98,12 @@ CPPCHECK_FLAGS2 ?= --cppcheck-build-dir=.bughunt $(CPPCHECK_FLAGS)
 .PHONY: cppcheck
 cppcheck:
 	mkdir -p .cppcheck
-	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) ./test-app ./xvalid-app ./fuzz-app ./acvp-app
+	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) \
+		./test-app ./xvalid-app ./fuzz-app ./acvp-app ./wycheproof-app
 
 .PHONY: bughunt
 bughunt:
 	mkdir -p .bughunt
-	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) ./test-app ./xvalid-app ./fuzz-app ./acvp-app
+	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) \
+		./test-app ./xvalid-app ./fuzz-app ./acvp-app ./wycheproof-app
 
diff --git a/test/wycheproof-app/Makefile b/test/wycheproof-app/Makefile
new file mode 100644
index 00000000..ef0b972e
--- /dev/null
+++ b/test/wycheproof-app/Makefile
@@ -0,0 +1,52 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+APP := wycheproof
+
+# include common options
+include ../common/common.mk
+
+OBJ_FILES = aes_gcm_test.json.o aes_ccm_test.json.o \
+	chacha20_poly1305_test.json.o \
+	aes_cmac_test.json.o gmac_test.json.o gmac_test.json.o \
+	hmac_sha1_test.json.o hmac_sha224_test.json.o hmac_sha256_test.json.o \
+	hmac_sha384_test.json.o hmac_sha512_test.json.o \
+	wycheproof.o
+
+all: $(APP)
+
+$(APP): $(OBJ_FILES)
+	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
+
+.PHONY: clean
+clean:
+	-rm -f $(OBJ_FILES) *.d $(APP)
+
+# if target not clean then make dependencies
+ifneq ($(MAKECMDGOALS),clean)
+-include $(wildcard *.d)
+endif
diff --git a/test/wycheproof/aead_test.h b/test/wycheproof-app/aead_test.h
similarity index 100%
rename from test/wycheproof/aead_test.h
rename to test/wycheproof-app/aead_test.h
diff --git a/test/wycheproof/aes_ccm_test.json.c b/test/wycheproof-app/aes_ccm_test.json.c
similarity index 100%
rename from test/wycheproof/aes_ccm_test.json.c
rename to test/wycheproof-app/aes_ccm_test.json.c
diff --git a/test/wycheproof/aes_cmac_test.json.c b/test/wycheproof-app/aes_cmac_test.json.c
similarity index 100%
rename from test/wycheproof/aes_cmac_test.json.c
rename to test/wycheproof-app/aes_cmac_test.json.c
diff --git a/test/wycheproof/aes_gcm_test.json.c b/test/wycheproof-app/aes_gcm_test.json.c
similarity index 100%
rename from test/wycheproof/aes_gcm_test.json.c
rename to test/wycheproof-app/aes_gcm_test.json.c
diff --git a/test/wycheproof/chacha20_poly1305_test.json.c b/test/wycheproof-app/chacha20_poly1305_test.json.c
similarity index 100%
rename from test/wycheproof/chacha20_poly1305_test.json.c
rename to test/wycheproof-app/chacha20_poly1305_test.json.c
diff --git a/test/wycheproof/gmac_test.json.c b/test/wycheproof-app/gmac_test.json.c
similarity index 100%
rename from test/wycheproof/gmac_test.json.c
rename to test/wycheproof-app/gmac_test.json.c
diff --git a/test/wycheproof/hmac_sha1_test.json.c b/test/wycheproof-app/hmac_sha1_test.json.c
similarity index 100%
rename from test/wycheproof/hmac_sha1_test.json.c
rename to test/wycheproof-app/hmac_sha1_test.json.c
diff --git a/test/wycheproof/hmac_sha224_test.json.c b/test/wycheproof-app/hmac_sha224_test.json.c
similarity index 100%
rename from test/wycheproof/hmac_sha224_test.json.c
rename to test/wycheproof-app/hmac_sha224_test.json.c
diff --git a/test/wycheproof/hmac_sha256_test.json.c b/test/wycheproof-app/hmac_sha256_test.json.c
similarity index 100%
rename from test/wycheproof/hmac_sha256_test.json.c
rename to test/wycheproof-app/hmac_sha256_test.json.c
diff --git a/test/wycheproof/hmac_sha384_test.json.c b/test/wycheproof-app/hmac_sha384_test.json.c
similarity index 100%
rename from test/wycheproof/hmac_sha384_test.json.c
rename to test/wycheproof-app/hmac_sha384_test.json.c
diff --git a/test/wycheproof/hmac_sha512_test.json.c b/test/wycheproof-app/hmac_sha512_test.json.c
similarity index 100%
rename from test/wycheproof/hmac_sha512_test.json.c
rename to test/wycheproof-app/hmac_sha512_test.json.c
diff --git a/test/wycheproof/mac_test.h b/test/wycheproof-app/mac_test.h
similarity index 100%
rename from test/wycheproof/mac_test.h
rename to test/wycheproof-app/mac_test.h
diff --git a/test/wycheproof/win_x64.mak b/test/wycheproof-app/win_x64.mak
similarity index 100%
rename from test/wycheproof/win_x64.mak
rename to test/wycheproof-app/win_x64.mak
diff --git a/test/wycheproof/wycheproof.c b/test/wycheproof-app/wycheproof.c
similarity index 100%
rename from test/wycheproof/wycheproof.c
rename to test/wycheproof-app/wycheproof.c
diff --git a/test/wycheproof/Makefile b/test/wycheproof/Makefile
deleted file mode 100644
index 7e473f1f..00000000
--- a/test/wycheproof/Makefile
+++ /dev/null
@@ -1,143 +0,0 @@
-#
-# Copyright (c) 2022, Intel Corporation
-#
-# Redistribution and use in source and binary forms, with or without
-# modification, are permitted provided that the following conditions are met:
-#
-#     * Redistributions of source code must retain the above copyright notice,
-#       this list of conditions and the following disclaimer.
-#     * Redistributions in binary form must reproduce the above copyright
-#       notice, this list of conditions and the following disclaimer in the
-#       documentation and/or other materials provided with the distribution.
-#     * Neither the name of Intel Corporation nor the names of its contributors
-#       may be used to endorse or promote products derived from this software
-#       without specific prior written permission.
-#
-# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
-# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-#
-
-APP := wycheproof
-INSTPATH ?= /usr/include/intel-ipsec-mb.h
-LIB_DIR ?= ../../lib
-
-MINGW ?= $(shell $(CC) -dM -E - < /dev/null | grep -i mingw | wc -l | sed 's/^ *//')
-
-CFLAGS = -MMD -D_GNU_SOURCE -DNO_COMPAT_IMB_API_053 \
-	-W -Wall -Wextra -Wmissing-declarations -Wpointer-arith \
-	-Wcast-qual -Wundef -Wwrite-strings  \
-	-Wformat -Wformat-security \
-	-Wunreachable-code -Wmissing-noreturn -Wsign-compare -Wno-endif-labels \
-	-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition \
-	-fno-delete-null-pointer-checks -fwrapv
-
-# -fno-strict-overflow is not supported by clang
-ifneq ($(CC),clang)
-CFLAGS += -fno-strict-overflow
-endif
-
-# if "-z ibt" is supported then assume "-z shstk, -z cet-report=error" are also supported
-# "-fcf-protection" needs to be checked separately
-ifeq ($(MINGW),0)
-CC_HAS_CET = $(and $(shell $(CC) --target-help 2> /dev/null | grep -m1 -e "-z ibt" | wc -l), \
-	$(shell $(CC) --help=common 2> /dev/null | grep -m1 -e "-fcf-protection" | wc -l))
-CET_LDFLAGS=-r -z ibt -z shstk
-endif
-
-ifeq ($(CC_HAS_CET),1)
-CFLAGS += -fcf-protection=full
-endif
-
-ifeq ($(MINGW),0)
-LDFLAGS = -fPIE -z noexecstack -z relro -z now
-else
-LDFLAGS = -fPIE
-endif
-
-ifeq ($(CC_HAS_CET),1)
-LDFLAGS += -fcf-protection=full -Wl,-z,ibt -Wl,-z,shstk -Wl,-z,cet-report=error
-endif
-LDLIBS = -lIPSec_MB
-
-ifeq ("$(shell test -r $(INSTPATH) && echo -n yes)","yes")
-# library installed
-CFLAGS +=
-else
-# library not installed
-CFLAGS +=  -I../../lib
-LDFLAGS += -L$(LIB_DIR)
-endif
-
-DEBUG_OPT ?= -O0
-ifeq ($(DEBUG),y)
-CFLAGS += $(DEBUG_OPT) -DDEBUG -g
-LDFLAGS += -g
-else
-ifeq ($(MINGW),0)
-CFLAGS += -O3
-else
-CFLAGS += -O2
-endif
-endif
-
-OBJ_FILES = aes_gcm_test.json.o aes_ccm_test.json.o \
-	chacha20_poly1305_test.json.o \
-	aes_cmac_test.json.o gmac_test.json.o gmac_test.json.o \
-	hmac_sha1_test.json.o hmac_sha224_test.json.o hmac_sha256_test.json.o \
-	hmac_sha384_test.json.o hmac_sha512_test.json.o \
-	wycheproof.o
-
-all: $(APP)
-
-$(APP): $(OBJ_FILES)
-
-.PHONY: clean
-clean:
-	-rm -f $(OBJ_FILES) *.d $(APP)
-
-# style check section
-CHECKPATCH?=checkpatch.pl
-CHECKPATCH_FLAGS = --no-tree --no-signoff --emacs --no-color --ignore CODE_INDENT,INITIALISED_STATIC,LEADING_SPACE,SPLIT_STRING,UNSPECIFIED_INT,ARRAY_SIZE,BLOCK_COMMENT_STYLE,GLOBAL_INITIALISERS,AVOID_EXTERNS,COMPLEX_MACRO,USE_FUNC,CONSTANT_COMPARISON,MISSING_SPACE,NEW_TYPEDEFS
-
-%.c_style_check : %.c
-	$(CHECKPATCH) $(CHECKPATCH_FLAGS) -f $<
-
-%.h_style_check : %.h
-	$(CHECKPATCH) $(CHECKPATCH_FLAGS) -f $<
-
-SOURCES_ALL := $(wildcard *.[ch])
-SOURCES_STYLE := $(foreach infile,$(SOURCES_ALL),$(infile)_style_check)
-
-.PHONY: style
-style: $(SOURCES_STYLE)
-
-# cppcheck analysis check
-CPPCHECK ?= cppcheck
-CPPCHECK_OPTS ?= -I./ -I../../lib -I../
-CPPCHECK_FLAGS ?= -j $(shell getconf _NPROCESSORS_ONLN)
-CPPCHECK_FLAGS1 ?= --cppcheck-build-dir=.cppcheck $(CPPCHECK_FLAGS)
-CPPCHECK_FLAGS2 ?= --cppcheck-build-dir=.bughunt $(CPPCHECK_FLAGS)
-.PHONY: cppcheck
-cppcheck:
-	mkdir -p .cppcheck
-	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) ./
-
-.PHONY: bughunt
-bughunt:
-	mkdir -p .bughunt
-	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) ./
-
-# if target not clean or rinse then make dependencies
-ifneq ($(MAKECMDGOALS),clean)
-ifneq ($(MAKECMDGOALS),style)
--include $(wildcard *.d)
-endif
-endif
-- 
GitLab


From 08260aee60222cfe80f1c657f8e301ae07bb91e3 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 2 Mar 2023 16:22:26 +0000
Subject: [PATCH 148/332] test: update cmake files for new dir structure

---
 test/CMakeLists.txt            | 92 ++-----------------------------
 test/test-app/CMakeLists.txt   | 99 ++++++++++++++++++++++++++++++++++
 test/xvalid-app/CMakeLists.txt | 81 ++++++++++++++++++++++++++++
 3 files changed, 184 insertions(+), 88 deletions(-)
 create mode 100644 test/test-app/CMakeLists.txt
 create mode 100644 test/xvalid-app/CMakeLists.txt

diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index 4338df1b..8c390e1d 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -31,93 +31,9 @@ if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
 endif()
 
-########################################
-# set test and library names
-########################################
-set(TEST_APP ipsec_MB_testapp)
-set(XVALID_APP ipsec_xvalid_test)
-set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../lib)
+# build ipsec_MB_testapp
+add_subdirectory(test-app)
 
-########################################
-# set ipsec_MB_test source files
-########################################
-set(TEST_APP_SRC_FILES
-  ${CMAKE_CURRENT_SOURCE_DIR}/main.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/gcm_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/ctr_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/customop_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/des_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/ccm_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/cmac_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/utils.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha1_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha256_sha512_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_md5_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/aes_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/sha_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/chained_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/api_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/pon_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/ecb_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/zuc_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/kasumi_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/snow3g_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/clear_mem_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/hec_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/xcbc_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/aes_cbcs_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/crc_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/chacha_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/poly1305_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/chacha20_poly1305_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/null_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/snow_v_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/quic_ecb_test.c
-)
-
-########################################
-# set ipsec_xvalid_test source files
-########################################
-set(XVALID_APP_SRC_FILES_C
-  ${CMAKE_CURRENT_SOURCE_DIR}/ipsec_xvalid.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/utils.c
-)
-set(XVALID_APP_SRC_FILES_ASM
-  ${CMAKE_CURRENT_SOURCE_DIR}/misc.asm
-)
-
-########################################
-# setup NASM
-########################################
-enable_language(ASM_NASM)
-if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
-  message(FATAL_ERROR "Can't find assembler")
-endif()
-set(CAN_USE_ASSEMBLER TRUE)
-
-########################################
-# set C compiler and NASM options
-########################################
-# add OS specific options
-if(CMAKE_HOST_UNIX)
-  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/unix.cmake)
-else()
-  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/windows.cmake)
-endif()
-
-
-########################################
-# add targets
-########################################
-include_directories(${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR})
-link_directories(${LIB_DIR})
-
-add_executable(${TEST_APP} ${TEST_APP_SRC_FILES})
-target_link_libraries(${TEST_APP} PRIVATE ${IPSEC_MB_LIB})
-target_compile_definitions(${TEST_APP} PRIVATE ${APP_DEFINES})
-
-add_executable(${XVALID_APP} ${XVALID_APP_SRC_FILES_C} ${XVALID_APP_SRC_FILES_ASM})
-target_link_libraries(${XVALID_APP} PRIVATE ${IPSEC_MB_LIB})
+# build ipsec_xvalid_app
+add_subdirectory(xvalid-app)
 
diff --git a/test/test-app/CMakeLists.txt b/test/test-app/CMakeLists.txt
new file mode 100644
index 00000000..68e60fcc
--- /dev/null
+++ b/test/test-app/CMakeLists.txt
@@ -0,0 +1,99 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+cmake_minimum_required(VERSION 3.16)
+project(intel-ipsec-mb)
+
+# Ensure building entire project
+if(NOT FULL_PROJECT_BUILD)
+  message(FATAL_ERROR "Please run CMake from project root directory")
+endif()
+
+########################################
+# set test and library names
+########################################
+set(TEST_APP ipsec_MB_testapp)
+set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../lib)
+set(TEST_INCLUDE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../include)
+
+########################################
+# set ipsec_MB_test source files
+########################################
+set(TEST_APP_SRC_FILES
+  ${CMAKE_CURRENT_SOURCE_DIR}/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/gcm_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/ctr_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/customop_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/des_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/ccm_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/cmac_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha1_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha256_sha512_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_md5_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/aes_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/sha_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/chained_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/api_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/pon_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/ecb_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/zuc_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/kasumi_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/snow3g_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/clear_mem_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hec_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/xcbc_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/aes_cbcs_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/crc_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/chacha_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/poly1305_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/chacha20_poly1305_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/null_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/snow_v_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/quic_ecb_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
+)
+
+########################################
+# set C compiler and NASM options
+########################################
+# add OS specific options
+if(CMAKE_HOST_UNIX)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/unix.cmake)
+else()
+  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/windows.cmake)
+endif()
+
+########################################
+# add targets
+########################################
+include_directories(${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR} ${TEST_INCLUDE_DIR})
+link_directories(${LIB_DIR})
+
+add_executable(${TEST_APP} ${TEST_APP_SRC_FILES})
+target_link_libraries(${TEST_APP} PRIVATE ${IPSEC_MB_LIB})
+target_compile_definitions(${TEST_APP} PRIVATE ${APP_DEFINES})
+
diff --git a/test/xvalid-app/CMakeLists.txt b/test/xvalid-app/CMakeLists.txt
new file mode 100644
index 00000000..38d8db08
--- /dev/null
+++ b/test/xvalid-app/CMakeLists.txt
@@ -0,0 +1,81 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+cmake_minimum_required(VERSION 3.16)
+project(intel-ipsec-mb)
+
+# Ensure building entire project
+if(NOT FULL_PROJECT_BUILD)
+  message(FATAL_ERROR "Please run CMake from project root directory")
+endif()
+
+########################################
+# set test and library names
+########################################
+set(XVALID_APP ipsec_xvalid_test)
+set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../lib)
+set(TEST_INCLUDE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../include)
+
+########################################
+# set ipsec_xvalid_test source files
+########################################
+set(XVALID_APP_SRC_FILES_C
+  ${CMAKE_CURRENT_SOURCE_DIR}/ipsec_xvalid.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
+)
+set(XVALID_APP_SRC_FILES_ASM
+  ${CMAKE_CURRENT_SOURCE_DIR}/misc.asm
+)
+
+########################################
+# setup NASM
+########################################
+enable_language(ASM_NASM)
+if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
+  message(FATAL_ERROR "Can't find assembler")
+endif()
+set(CAN_USE_ASSEMBLER TRUE)
+
+########################################
+# set C compiler and NASM options
+########################################
+# add OS specific options
+if(CMAKE_HOST_UNIX)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/unix.cmake)
+else()
+  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/windows.cmake)
+endif()
+
+
+########################################
+# add targets
+########################################
+include_directories(${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR} ${TEST_INCLUDE_DIR})
+link_directories(${LIB_DIR})
+
+add_executable(${XVALID_APP} ${XVALID_APP_SRC_FILES_C} ${XVALID_APP_SRC_FILES_ASM})
+target_link_libraries(${XVALID_APP} PRIVATE ${IPSEC_MB_LIB})
+target_compile_definitions(${XVALID_APP} PRIVATE ${APP_DEFINES})
+
-- 
GitLab


From 5efc1af0c1902430f70bbffd31b1494b840c31f7 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 3 Mar 2023 16:01:31 +0000
Subject: [PATCH 149/332] test: update windows makefiles for new dir structure

---
 test/common/win_x64_common.mk   | 75 +++++++++++++++++++++++++++++
 test/test-app/win_x64.mak       | 56 ++++++++++++++++++++++
 test/win_x64.mak                | 84 +++------------------------------
 test/wycheproof-app/win_x64.mak | 45 +-----------------
 test/xvalid-app/win_x64.mak     | 62 ++++++++++++++++++++++++
 win_x64.mak                     |  2 -
 6 files changed, 202 insertions(+), 122 deletions(-)
 create mode 100644 test/common/win_x64_common.mk
 create mode 100644 test/test-app/win_x64.mak
 create mode 100644 test/xvalid-app/win_x64.mak

diff --git a/test/common/win_x64_common.mk b/test/common/win_x64_common.mk
new file mode 100644
index 00000000..b010fca4
--- /dev/null
+++ b/test/common/win_x64_common.mk
@@ -0,0 +1,75 @@
+#
+# Copyright (c) 2017-2022, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+INSTNAME = intel-ipsec-mb
+
+!if !defined(PREFIX)
+PREFIX = C:\Program Files
+!endif
+
+!if exist("$(PREFIX)\$(INSTNAME)\libIPSec_MB.lib")
+IPSECLIB = "$(PREFIX)\$(INSTNAME)\libIPSec_MB.lib"
+INCDIR = -I"$(PREFIX)\$(INSTNAME)"
+!else
+!if !defined(LIB_DIR)
+LIB_DIR = ..\..\lib
+!endif
+IPSECLIB = "$(LIB_DIR)\libIPSec_MB.lib"
+INCDIR = -I$(LIB_DIR) -I..\include
+!endif
+
+!if !defined(DEBUG_OPT)
+DEBUG_OPT = /Od
+!endif
+
+!ifdef DEBUG
+DCFLAGS = $(DEBUG_OPT) /DDEBUG /Z7
+DLFLAGS = /debug
+!else
+DCFLAGS = /O2 /Oi
+DLFLAGS =
+!endif
+
+# compiler
+CC = cl
+
+# _CRT_SECURE_NO_WARNINGS disables warning C4996 about insecure snprintf() being used
+CFLAGS = /nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR) /std:c11
+
+#linker
+LNK = link
+# XVALID_LFLAGS = /out:$(XVALID_APP).exe $(DLFLAGS)
+
+AS = nasm
+AFLAGS = -Werror -fwin64 -Xvc -DWIN_ABI
+
+# dependency
+!ifndef DEPTOOL
+DEPTOOL = ..\..\mkdep.bat
+!endif
+DEPFLAGS = $(INCDIR)
+
diff --git a/test/test-app/win_x64.mak b/test/test-app/win_x64.mak
new file mode 100644
index 00000000..85cefd1f
--- /dev/null
+++ b/test/test-app/win_x64.mak
@@ -0,0 +1,56 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+TEST_APP = ipsec_MB_testapp
+
+include ..\common\win_x64_common.mk
+
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj
+TEST_LFLAGS = /out:$(TEST_APP).exe $(DLFLAGS)
+
+all: $(TEST_APP).exe tests.dep
+
+$(TEST_APP).exe: $(TEST_OBJS) $(IPSECLIB)
+        $(LNK) $(TEST_LFLAGS) $(TEST_OBJS) $(IPSECLIB)
+
+tests.dep: $(TEST_OBJS)
+        @type *.obj.dep > $@ 2> nul
+
+.c.obj:
+	$(CC) /c $(CFLAGS) $<
+        $(DEPTOOL) $< $@ "$(DEPFLAGS)" > $@.dep
+
+{..\common\}.c.obj:
+	$(CC) /c $(CFLAGS) $<
+        $(DEPTOOL) $< $@ "$(DEPFLAGS)" > $@.dep
+
+clean:
+        del /q $(TEST_OBJS) tests.dep *.obj.dep $(TEST_APP).*
+
+!if exist(tests.dep)
+!include tests.dep
+!endif
diff --git a/test/win_x64.mak b/test/win_x64.mak
index 720553ba..2e15f891 100644
--- a/test/win_x64.mak
+++ b/test/win_x64.mak
@@ -25,82 +25,12 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-TEST_APP = ipsec_MB_testapp
-XVALID_APP = ipsec_xvalid_test
-INSTNAME = intel-ipsec-mb
-
-!if !defined(PREFIX)
-PREFIX = C:\Program Files
-!endif
-
-!if exist("$(PREFIX)\$(INSTNAME)\libIPSec_MB.lib")
-IPSECLIB = "$(PREFIX)\$(INSTNAME)\libIPSec_MB.lib"
-INCDIR = -I"$(PREFIX)\$(INSTNAME)"
-!else
-!if !defined(LIB_DIR)
-LIB_DIR = ..\lib
-!endif
-IPSECLIB = "$(LIB_DIR)\libIPSec_MB.lib"
-INCDIR = -I$(LIB_DIR) -I.\
-!endif
-
-!if !defined(DEBUG_OPT)
-DEBUG_OPT = /Od
-!endif
-
-!ifdef DEBUG
-DCFLAGS = $(DEBUG_OPT) /DDEBUG /Z7
-DLFLAGS = /debug
-!else
-DCFLAGS = /O2 /Oi
-DLFLAGS =
-!endif
-
-# compiler
-CC = cl
-
-# _CRT_SECURE_NO_WARNINGS disables warning C4996 about insecure snprintf() being used
-CFLAGS = /nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR) /std:c11
-
-#linker
-LNK = link
-TEST_LFLAGS = /out:$(TEST_APP).exe $(DLFLAGS)
-XVALID_LFLAGS = /out:$(XVALID_APP).exe $(DLFLAGS)
-
-AS = nasm
-AFLAGS = -Werror -fwin64 -Xvc -DWIN_ABI
-
-# dependency
-!ifndef DEPTOOL
-DEPTOOL = ..\mkdep.bat
-!endif
-DEPFLAGS = $(INCDIR)
-
-TEST_OBJS = main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj utils.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj
-
-XVALID_OBJS = ipsec_xvalid.obj misc.obj utils.obj
-
-all: $(TEST_APP).exe $(XVALID_APP).exe tests.dep
-
-$(TEST_APP).exe: $(TEST_OBJS) $(IPSECLIB)
-        $(LNK) $(TEST_LFLAGS) $(TEST_OBJS) $(IPSECLIB)
-
-$(XVALID_APP).exe: $(XVALID_OBJS) $(IPSECLIB)
-        $(LNK) $(XVALID_LFLAGS) $(XVALID_OBJS) $(IPSECLIB)
-
-tests.dep: $(TEST_OBJS) $(XVALID_OBJS)
-        @type *.obj.dep > $@ 2> nul
-
-.c.obj:
-	$(CC) /c $(CFLAGS) $<
-        $(DEPTOOL) $< $@ "$(DEPFLAGS)" > $@.dep
-
-.asm.obj:
-	$(AS) -MD $@.dep -o $@ $(AFLAGS) $<
+all:
+	cd test-app & $(MAKE) /f win_x64.mak
+	cd xvalid-app & $(MAKE) /f win_x64.mak
+	cd wycheproof-app & $(MAKE) /f win_x64.mak
 
 clean:
-        del /q $(TEST_OBJS) tests.dep *.obj.dep $(TEST_APP).* $(XVALID_OBJS) $(XVALID_APP).*
-
-!if exist(tests.dep)
-!include tests.dep
-!endif
+	cd test-app & $(MAKE) /f win_x64.mak clean
+	cd xvalid-app & $(MAKE) /f win_x64.mak clean
+	cd wycheproof-app & $(MAKE) /f win_x64.mak clean
diff --git a/test/wycheproof-app/win_x64.mak b/test/wycheproof-app/win_x64.mak
index 12d3caac..f06b9f7c 100644
--- a/test/wycheproof-app/win_x64.mak
+++ b/test/wycheproof-app/win_x64.mak
@@ -26,50 +26,8 @@
 #
 
 APP = wycheproof
-INSTNAME = intel-ipsec-mb
 
-!if !defined(PREFIX)
-PREFIX = C:\Program Files
-!endif
-
-!if exist("$(PREFIX)\$(INSTNAME)\libIPSec_MB.lib")
-IPSECLIB = "$(PREFIX)\$(INSTNAME)\libIPSec_MB.lib"
-INCDIR = -I"$(PREFIX)\$(INSTNAME)"
-!else
-!if !defined(LIB_DIR)
-LIB_DIR = ..\..\lib
-!endif
-IPSECLIB = "$(LIB_DIR)\libIPSec_MB.lib"
-INCDIR = -I$(LIB_DIR) -I.\
-!endif
-
-!if !defined(DEBUG_OPT)
-DEBUG_OPT = /Od
-!endif
-
-!ifdef DEBUG
-DCFLAGS = $(DEBUG_OPT) /DDEBUG /Z7
-DLFLAGS = /debug
-!else
-DCFLAGS = /O2 /Oi
-DLFLAGS =
-!endif
-
-# compiler
-CC = cl
-
-# _CRT_SECURE_NO_WARNINGS disables warning C4996 about insecure snprintf() being used
-CFLAGS = /nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR)
-
-#linker
-LNK = link
-LFLAGS = /out:$(APP).exe $(DLFLAGS)
-
-# dependency
-!ifndef DEPTOOL
-DEPTOOL = ..\..\mkdep.bat
-!endif
-DEPFLAGS = $(INCDIR)
+include ..\common\win_x64_common.mk
 
 OBJS = aes_gcm_test.json.obj aes_ccm_test.json.obj \
 	chacha20_poly1305_test.json.obj \
@@ -77,6 +35,7 @@ OBJS = aes_gcm_test.json.obj aes_ccm_test.json.obj \
 	hmac_sha1_test.json.obj hmac_sha224_test.json.obj \
 	hmac_sha256_test.json.obj hmac_sha384_test.json.obj \
 	hmac_sha512_test.json.obj wycheproof.obj
+LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe
 
diff --git a/test/xvalid-app/win_x64.mak b/test/xvalid-app/win_x64.mak
new file mode 100644
index 00000000..ae5a65c8
--- /dev/null
+++ b/test/xvalid-app/win_x64.mak
@@ -0,0 +1,62 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+XVALID_APP = ipsec_xvalid_test
+
+include ..\common\win_x64_common.mk
+
+AS = nasm
+AFLAGS = -Werror -fwin64 -Xvc -DWIN_ABI
+
+XVALID_OBJS = ipsec_xvalid.obj misc.obj utils.obj
+XVALID_LFLAGS = /out:$(XVALID_APP).exe $(DLFLAGS)
+
+all: $(XVALID_APP).exe tests.dep
+
+$(XVALID_APP).exe: $(XVALID_OBJS) $(IPSECLIB)
+        $(LNK) $(XVALID_LFLAGS) $(XVALID_OBJS) $(IPSECLIB)
+
+tests.dep: $(TEST_OBJS) $(XVALID_OBJS)
+        @type *.obj.dep > $@ 2> nul
+
+.c.obj:
+	$(CC) /c $(CFLAGS) $<
+        $(DEPTOOL) $< $@ "$(DEPFLAGS)" > $@.dep
+
+{..\common\}.c.obj:
+	$(CC) /c $(CFLAGS) $<
+        $(DEPTOOL) $< $@ "$(DEPFLAGS)" > $@.dep
+
+.asm.obj:
+	$(AS) -MD $@.dep -o $@ $(AFLAGS) $<
+
+clean:
+        del /q tests.dep *.obj.dep $(XVALID_OBJS) $(XVALID_APP).*
+
+!if exist(tests.dep)
+!include tests.dep
+!endif
diff --git a/win_x64.mak b/win_x64.mak
index 8fac2541..6c097cb9 100644
--- a/win_x64.mak
+++ b/win_x64.mak
@@ -28,13 +28,11 @@
 all:
 	cd lib & $(MAKE) /f win_x64.mak
 	cd test & $(MAKE) /f win_x64.mak
-	cd test\wycheproof & $(MAKE) /f win_x64.mak
 	cd perf & $(MAKE) /f win_x64.mak
 
 clean:
 	cd lib & $(MAKE) /f win_x64.mak clean
 	cd test & $(MAKE) /f win_x64.mak clean
-	cd test\wycheproof & $(MAKE) /f win_x64.mak clean
 	cd perf & $(MAKE) /f win_x64.mak clean
 
 install:
-- 
GitLab


From 2b606bf9160b77a4c6253d070c940b6914d4545c Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 6 Mar 2023 12:24:23 +0000
Subject: [PATCH 150/332] test: move header files to app specific directories

---
 test/include/gcm_vectors.h                    | 38 -------------------
 test/{include => test-app}/customop_test.h    |  0
 test/{include => test-app}/do_test.h          |  0
 .../gcm_ctr_vectors_test.h                    |  0
 .../kasumi_test_vectors.h                     |  0
 .../snow3g_test_vectors.h                     |  0
 test/{include => test-app}/zuc_test_vectors.h |  0
 test/{include => xvalid-app}/misc.h           |  0
 8 files changed, 38 deletions(-)
 delete mode 100644 test/include/gcm_vectors.h
 rename test/{include => test-app}/customop_test.h (100%)
 rename test/{include => test-app}/do_test.h (100%)
 rename test/{include => test-app}/gcm_ctr_vectors_test.h (100%)
 rename test/{include => test-app}/kasumi_test_vectors.h (100%)
 rename test/{include => test-app}/snow3g_test_vectors.h (100%)
 rename test/{include => test-app}/zuc_test_vectors.h (100%)
 rename test/{include => xvalid-app}/misc.h (100%)

diff --git a/test/include/gcm_vectors.h b/test/include/gcm_vectors.h
deleted file mode 100644
index 71eb4170..00000000
--- a/test/include/gcm_vectors.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/**********************************************************************
-  Copyright(c) 2011-2022 Intel Corporation All rights reserved.
-
-  Redistribution and use in source and binary forms, with or without
-  modification, are permitted provided that the following conditions
-  are met:
-    * Redistributions of source code must retain the above copyright
-      notice, this list of conditions and the following disclaimer.
-    * Redistributions in binary form must reproduce the above copyright
-      notice, this list of conditions and the following disclaimer in
-      the documentation and/or other materials provided with the
-      distribution.
-    * Neither the name of Intel Corporation nor the names of its
-      contributors may be used to endorse or promote products derived
-      from this software without specific prior written permission.
-
-  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**********************************************************************/
-
-#ifndef AES_GCM_VECTORS_H_
-#define AES_GCM_VECTORS_H_
-
-#include <stdint.h>
-
-#include "gcm_std_vectors_test.h"
-
-
-#endif /* AES_GCM_VECTORS_H_ */
diff --git a/test/include/customop_test.h b/test/test-app/customop_test.h
similarity index 100%
rename from test/include/customop_test.h
rename to test/test-app/customop_test.h
diff --git a/test/include/do_test.h b/test/test-app/do_test.h
similarity index 100%
rename from test/include/do_test.h
rename to test/test-app/do_test.h
diff --git a/test/include/gcm_ctr_vectors_test.h b/test/test-app/gcm_ctr_vectors_test.h
similarity index 100%
rename from test/include/gcm_ctr_vectors_test.h
rename to test/test-app/gcm_ctr_vectors_test.h
diff --git a/test/include/kasumi_test_vectors.h b/test/test-app/kasumi_test_vectors.h
similarity index 100%
rename from test/include/kasumi_test_vectors.h
rename to test/test-app/kasumi_test_vectors.h
diff --git a/test/include/snow3g_test_vectors.h b/test/test-app/snow3g_test_vectors.h
similarity index 100%
rename from test/include/snow3g_test_vectors.h
rename to test/test-app/snow3g_test_vectors.h
diff --git a/test/include/zuc_test_vectors.h b/test/test-app/zuc_test_vectors.h
similarity index 100%
rename from test/include/zuc_test_vectors.h
rename to test/test-app/zuc_test_vectors.h
diff --git a/test/include/misc.h b/test/xvalid-app/misc.h
similarity index 100%
rename from test/include/misc.h
rename to test/xvalid-app/misc.h
-- 
GitLab


From 6bafaac7aa97a40078271e5ace4975371fa4e648 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 6 Mar 2023 13:16:41 +0000
Subject: [PATCH 151/332] test: rename ipsec_MB_testapp to imb-kat

---
 test/{test-app => kat-app}/.clang-format      |   0
 test/{test-app => kat-app}/CMakeLists.txt     |   6 +++---
 test/{test-app => kat-app}/Makefile           |  10 +++++-----
 test/{test-app => kat-app}/aes_cbcs_test.c    |   0
 test/{test-app => kat-app}/aes_test.c         |   0
 test/{test-app => kat-app}/api_test.c         |   0
 test/{test-app => kat-app}/ccm_test.c         |   0
 .../chacha20_poly1305_test.c                  |   0
 test/{test-app => kat-app}/chacha_test.c      |   0
 test/{test-app => kat-app}/chained_test.c     |   0
 test/{test-app => kat-app}/clear_mem_test.c   |   0
 test/{test-app => kat-app}/cmac_test.c        |   0
 test/{test-app => kat-app}/crc_test.c         |   0
 test/{test-app => kat-app}/ctr_test.c         |   0
 test/{test-app => kat-app}/customop_test.c    |   0
 test/{test-app => kat-app}/customop_test.h    |   0
 test/{test-app => kat-app}/des_test.c         |   0
 .../direct_api_param_test.c                   |   0
 .../direct_api_param_test.c_template          |   0
 test/{test-app => kat-app}/direct_api_test.c  |   0
 test/{test-app => kat-app}/do_test.h          |   0
 test/{test-app => kat-app}/ecb_test.c         |   0
 .../gcm_ctr_vectors_test.h                    |   0
 test/{test-app => kat-app}/gcm_test.c         |   0
 test/{test-app => kat-app}/hec_test.c         |   0
 test/{test-app => kat-app}/hmac_md5_test.c    |   0
 test/{test-app => kat-app}/hmac_sha1_test.c   |   0
 .../hmac_sha256_sha512_test.c                 |   0
 test/kat-app/imb-kat.exe                      | Bin 0 -> 1181184 bytes
 test/{test-app => kat-app}/kasumi_test.c      |   0
 .../kasumi_test_vectors.h                     |   0
 test/{test-app => kat-app}/main.c             |   0
 test/{test-app => kat-app}/null_test.c        |   0
 test/{test-app => kat-app}/poly1305_test.c    |   0
 test/{test-app => kat-app}/pon_test.c         |   0
 test/{test-app => kat-app}/quic_ecb_test.c    |   0
 test/{test-app => kat-app}/sha_test.c         |   0
 test/{test-app => kat-app}/snow3g_test.c      |   0
 .../snow3g_test_vectors.h                     |   0
 test/{test-app => kat-app}/snow_v_test.c      |   0
 test/{test-app => kat-app}/test_api.py        |   0
 test/{test-app => kat-app}/win_x64.mak        |  10 +++++-----
 test/{test-app => kat-app}/xcbc_test.c        |   0
 test/{test-app => kat-app}/zuc_test.c         |   0
 test/{test-app => kat-app}/zuc_test_vectors.h |   0
 test/win_x64.mak                              |   4 ++--
 46 files changed, 15 insertions(+), 15 deletions(-)
 rename test/{test-app => kat-app}/.clang-format (100%)
 rename test/{test-app => kat-app}/CMakeLists.txt (97%)
 rename test/{test-app => kat-app}/Makefile (94%)
 rename test/{test-app => kat-app}/aes_cbcs_test.c (100%)
 rename test/{test-app => kat-app}/aes_test.c (100%)
 rename test/{test-app => kat-app}/api_test.c (100%)
 rename test/{test-app => kat-app}/ccm_test.c (100%)
 rename test/{test-app => kat-app}/chacha20_poly1305_test.c (100%)
 rename test/{test-app => kat-app}/chacha_test.c (100%)
 rename test/{test-app => kat-app}/chained_test.c (100%)
 rename test/{test-app => kat-app}/clear_mem_test.c (100%)
 rename test/{test-app => kat-app}/cmac_test.c (100%)
 rename test/{test-app => kat-app}/crc_test.c (100%)
 rename test/{test-app => kat-app}/ctr_test.c (100%)
 rename test/{test-app => kat-app}/customop_test.c (100%)
 rename test/{test-app => kat-app}/customop_test.h (100%)
 rename test/{test-app => kat-app}/des_test.c (100%)
 rename test/{test-app => kat-app}/direct_api_param_test.c (100%)
 rename test/{test-app => kat-app}/direct_api_param_test.c_template (100%)
 rename test/{test-app => kat-app}/direct_api_test.c (100%)
 rename test/{test-app => kat-app}/do_test.h (100%)
 rename test/{test-app => kat-app}/ecb_test.c (100%)
 rename test/{test-app => kat-app}/gcm_ctr_vectors_test.h (100%)
 rename test/{test-app => kat-app}/gcm_test.c (100%)
 rename test/{test-app => kat-app}/hec_test.c (100%)
 rename test/{test-app => kat-app}/hmac_md5_test.c (100%)
 rename test/{test-app => kat-app}/hmac_sha1_test.c (100%)
 rename test/{test-app => kat-app}/hmac_sha256_sha512_test.c (100%)
 create mode 100644 test/kat-app/imb-kat.exe
 rename test/{test-app => kat-app}/kasumi_test.c (100%)
 rename test/{test-app => kat-app}/kasumi_test_vectors.h (100%)
 rename test/{test-app => kat-app}/main.c (100%)
 rename test/{test-app => kat-app}/null_test.c (100%)
 rename test/{test-app => kat-app}/poly1305_test.c (100%)
 rename test/{test-app => kat-app}/pon_test.c (100%)
 rename test/{test-app => kat-app}/quic_ecb_test.c (100%)
 rename test/{test-app => kat-app}/sha_test.c (100%)
 rename test/{test-app => kat-app}/snow3g_test.c (100%)
 rename test/{test-app => kat-app}/snow3g_test_vectors.h (100%)
 rename test/{test-app => kat-app}/snow_v_test.c (100%)
 rename test/{test-app => kat-app}/test_api.py (100%)
 mode change 100755 => 100644
 rename test/{test-app => kat-app}/win_x64.mak (92%)
 rename test/{test-app => kat-app}/xcbc_test.c (100%)
 rename test/{test-app => kat-app}/zuc_test.c (100%)
 rename test/{test-app => kat-app}/zuc_test_vectors.h (100%)

diff --git a/test/test-app/.clang-format b/test/kat-app/.clang-format
similarity index 100%
rename from test/test-app/.clang-format
rename to test/kat-app/.clang-format
diff --git a/test/test-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
similarity index 97%
rename from test/test-app/CMakeLists.txt
rename to test/kat-app/CMakeLists.txt
index 68e60fcc..53e23796 100644
--- a/test/test-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -32,14 +32,14 @@ if(NOT FULL_PROJECT_BUILD)
 endif()
 
 ########################################
-# set test and library names
+# set app and library names
 ########################################
-set(TEST_APP ipsec_MB_testapp)
+set(TEST_APP imb-kat)
 set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../lib)
 set(TEST_INCLUDE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../include)
 
 ########################################
-# set ipsec_MB_test source files
+# set imb-kat source files
 ########################################
 set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/main.c
diff --git a/test/test-app/Makefile b/test/kat-app/Makefile
similarity index 94%
rename from test/test-app/Makefile
rename to test/kat-app/Makefile
index c6d4fe02..ed879e17 100644
--- a/test/test-app/Makefile
+++ b/test/kat-app/Makefile
@@ -25,12 +25,12 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-TEST_APP := ipsec_MB_testapp
+APP := imb-kat
 
 # include common options
 include ../common/common.mk
 
-# ipsec_MB_testapp modules
+# imb-kat modules
 SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	cmac_test.c hmac_sha1_test.c hmac_sha256_sha512_test.c \
 	hmac_md5_test.c aes_test.c sha_test.c chained_test.c api_test.c pon_test.c \
@@ -41,14 +41,14 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 OBJECTS := $(SOURCES:%.c=%.o)
 
 # targets come here
-all: $(TEST_APP)
+all: $(APP)
 
-$(TEST_APP): $(OBJECTS)
+$(APP): $(OBJECTS)
 	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
 
 .PHONY: clean
 clean:
-	-rm -f $(OBJECTS) $(TEST_APP) $(DEP_FILES)
+	-rm -f $(OBJECTS) $(APP) $(DEP_FILES)
 
 # if target not clean then make dependencies
 ifneq ($(MAKECMDGOALS),clean)
diff --git a/test/test-app/aes_cbcs_test.c b/test/kat-app/aes_cbcs_test.c
similarity index 100%
rename from test/test-app/aes_cbcs_test.c
rename to test/kat-app/aes_cbcs_test.c
diff --git a/test/test-app/aes_test.c b/test/kat-app/aes_test.c
similarity index 100%
rename from test/test-app/aes_test.c
rename to test/kat-app/aes_test.c
diff --git a/test/test-app/api_test.c b/test/kat-app/api_test.c
similarity index 100%
rename from test/test-app/api_test.c
rename to test/kat-app/api_test.c
diff --git a/test/test-app/ccm_test.c b/test/kat-app/ccm_test.c
similarity index 100%
rename from test/test-app/ccm_test.c
rename to test/kat-app/ccm_test.c
diff --git a/test/test-app/chacha20_poly1305_test.c b/test/kat-app/chacha20_poly1305_test.c
similarity index 100%
rename from test/test-app/chacha20_poly1305_test.c
rename to test/kat-app/chacha20_poly1305_test.c
diff --git a/test/test-app/chacha_test.c b/test/kat-app/chacha_test.c
similarity index 100%
rename from test/test-app/chacha_test.c
rename to test/kat-app/chacha_test.c
diff --git a/test/test-app/chained_test.c b/test/kat-app/chained_test.c
similarity index 100%
rename from test/test-app/chained_test.c
rename to test/kat-app/chained_test.c
diff --git a/test/test-app/clear_mem_test.c b/test/kat-app/clear_mem_test.c
similarity index 100%
rename from test/test-app/clear_mem_test.c
rename to test/kat-app/clear_mem_test.c
diff --git a/test/test-app/cmac_test.c b/test/kat-app/cmac_test.c
similarity index 100%
rename from test/test-app/cmac_test.c
rename to test/kat-app/cmac_test.c
diff --git a/test/test-app/crc_test.c b/test/kat-app/crc_test.c
similarity index 100%
rename from test/test-app/crc_test.c
rename to test/kat-app/crc_test.c
diff --git a/test/test-app/ctr_test.c b/test/kat-app/ctr_test.c
similarity index 100%
rename from test/test-app/ctr_test.c
rename to test/kat-app/ctr_test.c
diff --git a/test/test-app/customop_test.c b/test/kat-app/customop_test.c
similarity index 100%
rename from test/test-app/customop_test.c
rename to test/kat-app/customop_test.c
diff --git a/test/test-app/customop_test.h b/test/kat-app/customop_test.h
similarity index 100%
rename from test/test-app/customop_test.h
rename to test/kat-app/customop_test.h
diff --git a/test/test-app/des_test.c b/test/kat-app/des_test.c
similarity index 100%
rename from test/test-app/des_test.c
rename to test/kat-app/des_test.c
diff --git a/test/test-app/direct_api_param_test.c b/test/kat-app/direct_api_param_test.c
similarity index 100%
rename from test/test-app/direct_api_param_test.c
rename to test/kat-app/direct_api_param_test.c
diff --git a/test/test-app/direct_api_param_test.c_template b/test/kat-app/direct_api_param_test.c_template
similarity index 100%
rename from test/test-app/direct_api_param_test.c_template
rename to test/kat-app/direct_api_param_test.c_template
diff --git a/test/test-app/direct_api_test.c b/test/kat-app/direct_api_test.c
similarity index 100%
rename from test/test-app/direct_api_test.c
rename to test/kat-app/direct_api_test.c
diff --git a/test/test-app/do_test.h b/test/kat-app/do_test.h
similarity index 100%
rename from test/test-app/do_test.h
rename to test/kat-app/do_test.h
diff --git a/test/test-app/ecb_test.c b/test/kat-app/ecb_test.c
similarity index 100%
rename from test/test-app/ecb_test.c
rename to test/kat-app/ecb_test.c
diff --git a/test/test-app/gcm_ctr_vectors_test.h b/test/kat-app/gcm_ctr_vectors_test.h
similarity index 100%
rename from test/test-app/gcm_ctr_vectors_test.h
rename to test/kat-app/gcm_ctr_vectors_test.h
diff --git a/test/test-app/gcm_test.c b/test/kat-app/gcm_test.c
similarity index 100%
rename from test/test-app/gcm_test.c
rename to test/kat-app/gcm_test.c
diff --git a/test/test-app/hec_test.c b/test/kat-app/hec_test.c
similarity index 100%
rename from test/test-app/hec_test.c
rename to test/kat-app/hec_test.c
diff --git a/test/test-app/hmac_md5_test.c b/test/kat-app/hmac_md5_test.c
similarity index 100%
rename from test/test-app/hmac_md5_test.c
rename to test/kat-app/hmac_md5_test.c
diff --git a/test/test-app/hmac_sha1_test.c b/test/kat-app/hmac_sha1_test.c
similarity index 100%
rename from test/test-app/hmac_sha1_test.c
rename to test/kat-app/hmac_sha1_test.c
diff --git a/test/test-app/hmac_sha256_sha512_test.c b/test/kat-app/hmac_sha256_sha512_test.c
similarity index 100%
rename from test/test-app/hmac_sha256_sha512_test.c
rename to test/kat-app/hmac_sha256_sha512_test.c
diff --git a/test/kat-app/imb-kat.exe b/test/kat-app/imb-kat.exe
new file mode 100644
index 0000000000000000000000000000000000000000..18e8fbf2f35f768252c734b3db3094c5f57730a7
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z9M)n6mCuF%^SLZ6CB62P{@Rp;>#hptxLUcY3R|A9efhsOrdO`8Mr97jP_DC*G8g2U
z(_q$>-TAz>C*}yfa^*EDb4A9#9BT1i0NO3-ZOyZSuqdv=8eE6vc~`y`>-4(VK#VEF
z>rrLGxDul(2Ujaw^L?aRxn7Ae<%dxv#=;+Iq2!0>h@uX-2UFoLOq|P3k<R9OF;Co$
zX(N5i=e6$jnJwmj`P`PT0pje=G2f%9aD`OAKEpj;Uk!54ad9s$pXJ8a=XvJqGhKyy
zIJNm)cYb}gYhR!50k}^OHlOiHxK~Ggb@&Y(_bvh9f#$z3a(?r7g*<Zx;2zTuA?D5W
zh)naWX^*x!o9{7w%rjLmu4O6ad(2F<;9uAGfBo%XFwaQ;y23l)Zw?RhEad<H+BZWO
zw}B{#F0@qQut39uh6V=$0}T%v8ZJC&Xt*%YO<OgQQYkQ?ATZD{(9qD(@MivBuhyVa
z4_0c31ENUY@11#Xb0>^>io78~?!24}$sBF@1FYdDjLDoyB4?-ro!la0*h-%4L78>r
z3(OF5Nh0Z?RKnb7gDpHS<7K`ik!3Cn!F+hEOrelWs3XICAPGj{#%*AS+PBzAI+VM9
zX2&^wUK8J7d$0lfs||MfM7Pf1#O=y0+ph;OA_?&snPnliQ41R$;FdSBjZwI83oaz9
z*vN8~Qm|LdZ_Hg8B@d3<bgpB^-&cm4BXvroj$Qff;y_ujTYGGd4kmPk^Yq?uQ_yJ+
zqc6dx7S7|m<@VsxDKgy>OiJf*E6+7Q*qhqqRj}MEoTrx-H`r~NI8Q0Qt87K*={;8|
zRk10nh&R=LCv;<q-I7Pd>99Mla2|Hyw6fSr`p=!amBX_0aySpO)&_&UqvZxkSmtZ)
z{nf&Hm_XN+y=I?cIn1obZ^yW7(PzakyvcC>h)bM*W!GSeLziN57A?`kR&!W{!(^so
zhG{gggW+3>GX{$l@4+ZJn8eBXK?VxJ_vJVn!!trw;yP=pEt$3?+Mh^;Sr#W5b4*#q
zdREaKBdd^9#-E%6GwU6hz?52O<OON4Lmo6|2lD9Pnj>s;K6BOCaV;#f16^>vXLMR2
zB=Huqp1Yp;zR<$KGs5J#b?@7*^ZllopZZ4I`8Kn@$vSZbHorEQ5t7Y>m)Tt0ZR~vK
z8|yA)JHQOg4ri-jPMPnhQe4s4FZf$P{6FGfbu2zurSc5u>T^~b^NI@@h6MAOMmG12
zaC7R7R~xwUr(<n&ClB0<_O9tS;wAdbY2#|&R${&l(u@>y3LK-ErX-`eMv_T!67r5y
nkQ+`w7C)t#Hs5>9dGM1qI4Mdc_sNzz^*8J{-0=U`KfeMWQX}OC

literal 0
HcmV?d00001

diff --git a/test/test-app/kasumi_test.c b/test/kat-app/kasumi_test.c
similarity index 100%
rename from test/test-app/kasumi_test.c
rename to test/kat-app/kasumi_test.c
diff --git a/test/test-app/kasumi_test_vectors.h b/test/kat-app/kasumi_test_vectors.h
similarity index 100%
rename from test/test-app/kasumi_test_vectors.h
rename to test/kat-app/kasumi_test_vectors.h
diff --git a/test/test-app/main.c b/test/kat-app/main.c
similarity index 100%
rename from test/test-app/main.c
rename to test/kat-app/main.c
diff --git a/test/test-app/null_test.c b/test/kat-app/null_test.c
similarity index 100%
rename from test/test-app/null_test.c
rename to test/kat-app/null_test.c
diff --git a/test/test-app/poly1305_test.c b/test/kat-app/poly1305_test.c
similarity index 100%
rename from test/test-app/poly1305_test.c
rename to test/kat-app/poly1305_test.c
diff --git a/test/test-app/pon_test.c b/test/kat-app/pon_test.c
similarity index 100%
rename from test/test-app/pon_test.c
rename to test/kat-app/pon_test.c
diff --git a/test/test-app/quic_ecb_test.c b/test/kat-app/quic_ecb_test.c
similarity index 100%
rename from test/test-app/quic_ecb_test.c
rename to test/kat-app/quic_ecb_test.c
diff --git a/test/test-app/sha_test.c b/test/kat-app/sha_test.c
similarity index 100%
rename from test/test-app/sha_test.c
rename to test/kat-app/sha_test.c
diff --git a/test/test-app/snow3g_test.c b/test/kat-app/snow3g_test.c
similarity index 100%
rename from test/test-app/snow3g_test.c
rename to test/kat-app/snow3g_test.c
diff --git a/test/test-app/snow3g_test_vectors.h b/test/kat-app/snow3g_test_vectors.h
similarity index 100%
rename from test/test-app/snow3g_test_vectors.h
rename to test/kat-app/snow3g_test_vectors.h
diff --git a/test/test-app/snow_v_test.c b/test/kat-app/snow_v_test.c
similarity index 100%
rename from test/test-app/snow_v_test.c
rename to test/kat-app/snow_v_test.c
diff --git a/test/test-app/test_api.py b/test/kat-app/test_api.py
old mode 100755
new mode 100644
similarity index 100%
rename from test/test-app/test_api.py
rename to test/kat-app/test_api.py
diff --git a/test/test-app/win_x64.mak b/test/kat-app/win_x64.mak
similarity index 92%
rename from test/test-app/win_x64.mak
rename to test/kat-app/win_x64.mak
index 85cefd1f..596039b0 100644
--- a/test/test-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -25,16 +25,16 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-TEST_APP = ipsec_MB_testapp
+APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
 TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj
-TEST_LFLAGS = /out:$(TEST_APP).exe $(DLFLAGS)
+TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
-all: $(TEST_APP).exe tests.dep
+all: $(APP).exe tests.dep
 
-$(TEST_APP).exe: $(TEST_OBJS) $(IPSECLIB)
+$(APP).exe: $(TEST_OBJS) $(IPSECLIB)
         $(LNK) $(TEST_LFLAGS) $(TEST_OBJS) $(IPSECLIB)
 
 tests.dep: $(TEST_OBJS)
@@ -49,7 +49,7 @@ tests.dep: $(TEST_OBJS)
         $(DEPTOOL) $< $@ "$(DEPFLAGS)" > $@.dep
 
 clean:
-        del /q $(TEST_OBJS) tests.dep *.obj.dep $(TEST_APP).*
+        del /q $(TEST_OBJS) tests.dep *.obj.dep $(APP).*
 
 !if exist(tests.dep)
 !include tests.dep
diff --git a/test/test-app/xcbc_test.c b/test/kat-app/xcbc_test.c
similarity index 100%
rename from test/test-app/xcbc_test.c
rename to test/kat-app/xcbc_test.c
diff --git a/test/test-app/zuc_test.c b/test/kat-app/zuc_test.c
similarity index 100%
rename from test/test-app/zuc_test.c
rename to test/kat-app/zuc_test.c
diff --git a/test/test-app/zuc_test_vectors.h b/test/kat-app/zuc_test_vectors.h
similarity index 100%
rename from test/test-app/zuc_test_vectors.h
rename to test/kat-app/zuc_test_vectors.h
diff --git a/test/win_x64.mak b/test/win_x64.mak
index 2e15f891..1af5891e 100644
--- a/test/win_x64.mak
+++ b/test/win_x64.mak
@@ -26,11 +26,11 @@
 #
 
 all:
-	cd test-app & $(MAKE) /f win_x64.mak
+	cd kat-app & $(MAKE) /f win_x64.mak
 	cd xvalid-app & $(MAKE) /f win_x64.mak
 	cd wycheproof-app & $(MAKE) /f win_x64.mak
 
 clean:
-	cd test-app & $(MAKE) /f win_x64.mak clean
+	cd kat-app & $(MAKE) /f win_x64.mak clean
 	cd xvalid-app & $(MAKE) /f win_x64.mak clean
 	cd wycheproof-app & $(MAKE) /f win_x64.mak clean
-- 
GitLab


From c7f2c907a4e78dac47ba024486c504e60c7fcb39 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 6 Mar 2023 13:17:39 +0000
Subject: [PATCH 152/332] test: rename wycheproof app to imb-wycheproof

---
 test/wycheproof-app/Makefile    | 2 +-
 test/wycheproof-app/win_x64.mak | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/test/wycheproof-app/Makefile b/test/wycheproof-app/Makefile
index ef0b972e..461e3f41 100644
--- a/test/wycheproof-app/Makefile
+++ b/test/wycheproof-app/Makefile
@@ -25,7 +25,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-APP := wycheproof
+APP := imb-wycheproof
 
 # include common options
 include ../common/common.mk
diff --git a/test/wycheproof-app/win_x64.mak b/test/wycheproof-app/win_x64.mak
index f06b9f7c..dba5dfeb 100644
--- a/test/wycheproof-app/win_x64.mak
+++ b/test/wycheproof-app/win_x64.mak
@@ -25,7 +25,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-APP = wycheproof
+APP = imb-wycheproof
 
 include ..\common\win_x64_common.mk
 
-- 
GitLab


From 4086e4db4331266e4ab1cfba418266b30af2c09c Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 6 Mar 2023 13:19:11 +0000
Subject: [PATCH 153/332] test: rename ipsec_xvalid_test app to imb-xvalid

---
 test/xvalid-app/CMakeLists.txt |  6 +++---
 test/xvalid-app/Makefile       | 16 ++++++++--------
 test/xvalid-app/win_x64.mak    | 10 +++++-----
 3 files changed, 16 insertions(+), 16 deletions(-)

diff --git a/test/xvalid-app/CMakeLists.txt b/test/xvalid-app/CMakeLists.txt
index 38d8db08..de22046e 100644
--- a/test/xvalid-app/CMakeLists.txt
+++ b/test/xvalid-app/CMakeLists.txt
@@ -32,14 +32,14 @@ if(NOT FULL_PROJECT_BUILD)
 endif()
 
 ########################################
-# set test and library names
+# set app and library names
 ########################################
-set(XVALID_APP ipsec_xvalid_test)
+set(XVALID_APP imb-xvalid)
 set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../lib)
 set(TEST_INCLUDE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../include)
 
 ########################################
-# set ipsec_xvalid_test source files
+# set imb-xvalid source files
 ########################################
 set(XVALID_APP_SRC_FILES_C
   ${CMAKE_CURRENT_SOURCE_DIR}/ipsec_xvalid.c
diff --git a/test/xvalid-app/Makefile b/test/xvalid-app/Makefile
index 72c7ab9c..7eed05ff 100644
--- a/test/xvalid-app/Makefile
+++ b/test/xvalid-app/Makefile
@@ -25,15 +25,15 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-XVALID_APP := ipsec_xvalid_test
+APP := imb-xvalid
 
 # include common options
 include ../common/common.mk
 
-# ipsec_xvalid_test modules
-XVALID_ASM := misc.asm
-XVALID_SOURCES := ipsec_xvalid.c ../common/utils.c
-XVALID_OBJECTS := $(XVALID_SOURCES:%.c=%.o) $(XVALID_ASM:%.asm=%.o)
+# imb-xvalid modules
+ASM := misc.asm
+SOURCES := ipsec_xvalid.c ../common/utils.c
+OBJECTS := $(SOURCES:%.c=%.o) $(ASM:%.asm=%.o)
 
 # rule for compiling assembly code with producing dependencies
 %.o:%.asm
@@ -48,14 +48,14 @@ ifeq ($(CC_HAS_CET),1)
 endif
 
 # targets come here
-all: $(XVALID_APP)
+all: $(APP)
 
-$(XVALID_APP): $(XVALID_OBJECTS)
+$(APP): $(OBJECTS)
 	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
 
 .PHONY: clean
 clean:
-	-rm -f $(DEP_FILES) $(XVALID_OBJECTS) $(XVALID_APP) $(ASM_OBJECTS)
+	-rm -f $(DEP_FILES) $(OBJECTS) $(APP) $(ASM_OBJECTS)
 
 # if target not clean then make dependencies
 ifneq ($(MAKECMDGOALS),clean)
diff --git a/test/xvalid-app/win_x64.mak b/test/xvalid-app/win_x64.mak
index ae5a65c8..8672c762 100644
--- a/test/xvalid-app/win_x64.mak
+++ b/test/xvalid-app/win_x64.mak
@@ -25,7 +25,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-XVALID_APP = ipsec_xvalid_test
+APP = imb-xvalid
 
 include ..\common\win_x64_common.mk
 
@@ -33,11 +33,11 @@ AS = nasm
 AFLAGS = -Werror -fwin64 -Xvc -DWIN_ABI
 
 XVALID_OBJS = ipsec_xvalid.obj misc.obj utils.obj
-XVALID_LFLAGS = /out:$(XVALID_APP).exe $(DLFLAGS)
+XVALID_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
-all: $(XVALID_APP).exe tests.dep
+all: $(APP).exe tests.dep
 
-$(XVALID_APP).exe: $(XVALID_OBJS) $(IPSECLIB)
+$(APP).exe: $(XVALID_OBJS) $(IPSECLIB)
         $(LNK) $(XVALID_LFLAGS) $(XVALID_OBJS) $(IPSECLIB)
 
 tests.dep: $(TEST_OBJS) $(XVALID_OBJS)
@@ -55,7 +55,7 @@ tests.dep: $(TEST_OBJS) $(XVALID_OBJS)
 	$(AS) -MD $@.dep -o $@ $(AFLAGS) $<
 
 clean:
-        del /q tests.dep *.obj.dep $(XVALID_OBJS) $(XVALID_APP).*
+        del /q tests.dep *.obj.dep $(XVALID_OBJS) $(APP).*
 
 !if exist(tests.dep)
 !include tests.dep
-- 
GitLab


From 3945797d769af4fd60ab0885f09aef956217171b Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 6 Mar 2023 13:19:56 +0000
Subject: [PATCH 154/332] test: update CMakelists.txt with new app names

---
 test/CMakeLists.txt | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index 8c390e1d..0c8bff5e 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -31,9 +31,9 @@ if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
 endif()
 
-# build ipsec_MB_testapp
-add_subdirectory(test-app)
+# build imb-kat application
+add_subdirectory(kat-app)
 
-# build ipsec_xvalid_app
+# build imb-xvalid application
 add_subdirectory(xvalid-app)
 
-- 
GitLab


From 82568e7814479bfaf117bb5cfd4b3293f4d848df Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 6 Mar 2023 13:21:42 +0000
Subject: [PATCH 155/332] test: add test app initial documentation

---
 test/acvp-app/README.md       | 19 +++++++++++++++++++
 test/fuzz-app/README.md       | 27 +++++++++++++++++++++++++++
 test/kat-app/README.md        | 21 +++++++++++++++++++++
 test/wycheproof-app/README.md | 18 ++++++++++++++++++
 test/xvalid-app/README.md     | 20 ++++++++++++++++++++
 5 files changed, 105 insertions(+)
 create mode 100644 test/acvp-app/README.md
 create mode 100644 test/fuzz-app/README.md
 create mode 100644 test/kat-app/README.md
 create mode 100644 test/wycheproof-app/README.md
 create mode 100644 test/xvalid-app/README.md

diff --git a/test/acvp-app/README.md b/test/acvp-app/README.md
new file mode 100644
index 00000000..d194a7d9
--- /dev/null
+++ b/test/acvp-app/README.md
@@ -0,0 +1,19 @@
+# Intel(R) Multi-Buffer Crypto for IPsec Library - ACVP Test Application
+
+## Contents
+
+- Overview
+- Usage
+
+
+## Overview
+
+TBD
+
+## Usage
+
+Usage:
+    `./imb-acvp --help`   This option will display extensive help page.
+    Please refer to "--help" option for usage details
+
+
diff --git a/test/fuzz-app/README.md b/test/fuzz-app/README.md
new file mode 100644
index 00000000..e4d452f3
--- /dev/null
+++ b/test/fuzz-app/README.md
@@ -0,0 +1,27 @@
+# Intel(R) Multi-Buffer Crypto for IPsec Library - Fuzz Test Applications
+
+## Contents
+
+- Overview
+- Dependencies
+- Usage
+
+
+## Overview
+
+The fuzz test applications aim to discover defects in the library by passing
+randomly generated data to the library API's. Currently there are two fuzzing
+applications:
+- imb-fuzz-direct-api: Targets direct API's
+- imb-fuzz-api: Targets job and burst API's
+
+
+## Dependencies
+- clang
+- libfuzzer
+
+## Usage
+
+Usage:
+    `./imb-fuzz-api`
+    `./imb-fuzz-direct-api`
diff --git a/test/kat-app/README.md b/test/kat-app/README.md
new file mode 100644
index 00000000..6d1232a3
--- /dev/null
+++ b/test/kat-app/README.md
@@ -0,0 +1,21 @@
+# Intel(R) Multi-Buffer Crypto for IPsec Library - Known Answer Test (KAT) Application
+
+## Contents
+
+- Overview
+- Usage
+
+
+## Overview
+
+The KAT application validates correct algorithm implementations by passing
+predefined inputs to the library API and verifying the generated output
+against a known correct result.
+
+
+## Usage
+
+Usage:
+    `./imb-kat --help`   This option will display extensive help page.
+    Please refer to "--help" option for usage details
+
diff --git a/test/wycheproof-app/README.md b/test/wycheproof-app/README.md
new file mode 100644
index 00000000..81235f32
--- /dev/null
+++ b/test/wycheproof-app/README.md
@@ -0,0 +1,18 @@
+# Intel(R) Multi-Buffer Crypto for IPsec Library - Wycheproof Test Application
+
+## Contents
+
+- Overview
+- Usage
+
+
+## Overview
+
+TBD
+
+## Usage
+
+Usage:
+    `./imb-wycheproof --help`   This option will display extensive help page.
+    Please refer to "--help" option for usage details
+
diff --git a/test/xvalid-app/README.md b/test/xvalid-app/README.md
new file mode 100644
index 00000000..f1998f8d
--- /dev/null
+++ b/test/xvalid-app/README.md
@@ -0,0 +1,20 @@
+# Intel(R) Multi-Buffer Crypto for IPsec Library - Cross Validation Application
+
+## Contents
+
+- Overview
+- Usage
+
+
+## Overview
+
+The cross validation application validates correct algorithm implementations by
+passing randomly generated inputs to various implementations and comparing all
+generated outputs.
+
+## Usage
+
+Usage:
+    `./imb-xvalid --help`   This option will display extensive help page.
+    Please refer to "--help" option for usage details
+
-- 
GitLab


From 85a838bf96225f7342f680c641772dc34e70002e Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 6 Mar 2023 14:04:47 +0000
Subject: [PATCH 156/332] test: rename acvp_app to imb-acvp

---
 test/acvp-app/Makefile | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/test/acvp-app/Makefile b/test/acvp-app/Makefile
index 0e1313e0..be3e5629 100644
--- a/test/acvp-app/Makefile
+++ b/test/acvp-app/Makefile
@@ -25,7 +25,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-ACVP_APP := acvp_app
+APP := imb-acvp
 
 # include common options
 include ../common/common.mk
@@ -41,18 +41,18 @@ ACVP_LDLIBS = -lacvp $(LDLIBS)
 ACVP_SOURCES := acvp_app_main.c ../common/utils.c
 
 # targets come here
-all: $(ACVP_APP)
+all: $(APP)
 
-$(ACVP_APP): $(ACVP_SOURCES)
+$(APP): $(ACVP_SOURCES)
 ifneq ("$(wildcard $(ACVP_HDR))","")
 	$(CC) $(ACVP_CFLAGS) $(ACVP_LDFLAGS) $^ $(ACVP_LDLIBS) -o $@
 else
-	@echo "No libacvp header found at $(ACVP_HDR), $(ACVP_APP) is not built"
+	@echo "No libacvp header found at $(ACVP_HDR), $(APP) is not built"
 endif
 
 .PHONY: clean
 clean:
-	-rm -f $(DEP_FILES) $(ACVP_APP)
+	-rm -f $(DEP_FILES) $(APP)
 
 # if target not clean then make dependencies
 ifneq ($(MAKECMDGOALS),clean)
-- 
GitLab


From 1d6174ef76146585eca788a86f54cc87e4a90131 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 6 Mar 2023 14:05:27 +0000
Subject: [PATCH 157/332] test: rename fuzz apps

---
 test/fuzz-app/Makefile | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/test/fuzz-app/Makefile b/test/fuzz-app/Makefile
index 267c3aab..fa906739 100644
--- a/test/fuzz-app/Makefile
+++ b/test/fuzz-app/Makefile
@@ -25,8 +25,8 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-FUZZ_APP := job_api_fuzz_test
-DIRECT_FUZZ_APP := direct_api_fuzz_test
+FUZZ_APP := imb-fuzz-api
+DIRECT_FUZZ_APP := imb-fuzz-direct-api
 
 # include common options
 include ../common/common.mk
-- 
GitLab


From d871ab846d32634ba1947a46cac38f76a7eb7f8e Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 6 Mar 2023 14:10:22 +0000
Subject: [PATCH 158/332] test: update Makefile for new app names

---
 Makefile      |  4 +---
 test/Makefile | 20 ++++++++++----------
 2 files changed, 11 insertions(+), 13 deletions(-)

diff --git a/Makefile b/Makefile
index 2812350a..3060bc07 100644
--- a/Makefile
+++ b/Makefile
@@ -75,7 +75,7 @@ CS_IGNORE_WORDS ?= iinclude,struc,fo,ue,od,ba,padd
 spellcheck:
 	$(CODESPELL) -d -L $(CS_IGNORE_WORDS) \
 	-S "*.obj,*.o,*.a,*.so,*.lib,*~,*.so,*.so.*,*.d,ipsec_perf" \
-	-S "ipsec_MB_testapp,ipsec_xvalid_test" \
+	-S "imb-kat,imb-xvalid" \
 	./lib ./perf ./test README.md SECURITY.md CONTRIBUTING \
 	Makefile win_x64.mak ReleaseNotes.txt LICENSE $(CS_EXTRA_OPTS)
 
@@ -83,12 +83,10 @@ spellcheck:
 cppcheck:
 	$(MAKE) -C lib cppcheck
 	$(MAKE) -C test cppcheck
-	$(MAKE) -C test/wycheproof cppcheck
 	$(MAKE) -C perf cppcheck
 
 # cppcheck bughunt analysis check
 bughunt:
 	$(MAKE) -C lib bughunt
 	$(MAKE) -C test bughunt
-	$(MAKE) -C test/wycheproof bughunt
 	$(MAKE) -C perf bughunt
diff --git a/test/Makefile b/test/Makefile
index 3072b92f..3d34e39b 100644
--- a/test/Makefile
+++ b/test/Makefile
@@ -25,19 +25,19 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-TEST_APP := test-app
+KAT_APP := kat-app
 XVALID_APP := xvalid-app
 FUZZ_APP := fuzz-app
 ACVP_APP := acvp-app
 WYCHEPROOF_APP := wycheproof-app
 
 # targets come here
-all: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP) $(WYCHEPROOF_APP)
+all: $(KAT_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP) $(WYCHEPROOF_APP)
 
-.PHONY: $(TEST_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP) $(WYCHEPROOF_APP)
+.PHONY: $(KAT_APP) $(XVALID_APP) $(FUZZ_APP) $(ACVP_APP) $(WYCHEPROOF_APP)
 
-$(TEST_APP):
-	$(MAKE) -C test-app
+$(KAT_APP):
+	$(MAKE) -C kat-app
 
 $(XVALID_APP):
 	$(MAKE) -C xvalid-app
@@ -53,7 +53,7 @@ $(WYCHEPROOF_APP):
 
 .PHONY: clean
 clean:
-	$(MAKE) -C test-app clean
+	$(MAKE) -C kat-app clean
 	$(MAKE) -C xvalid-app clean
 	$(MAKE) -C fuzz-app clean
 	$(MAKE) -C acvp-app clean
@@ -75,14 +75,14 @@ CHECKPATCH_FLAGS = --no-tree --no-signoff --emacs --no-color --max-line-length=1
 %.inc_style_check : %.inc
 	$(CHECKPATCH) $(CHECKPATCH_FLAGS) -f $<
 
-TEST_APP_SOURCES := $(wildcard $(TEST_APP)/*.[ch])
+KAT_APP_SOURCES := $(wildcard $(KAT_APP)/*.[ch])
 FUZZ_APP_SOURCES := $(wildcard $(FUZZ_APP)/*.[ch])
 ACVP_APP_SOURCES := $(wildcard $(ACVP_APP)/*.[ch])
 WYCHEPROOF_APP_SOURCES := $(wildcard $(WYCHEPROOF_APP)/*.[ch])
 XVALID_APP_SOURCES := $(wildcard $(XVALID_APP)/*.[ch]) \
 		      $(wildcard $(XVALID_APP)/*.asm) \
 		      $(wildcard $(XVALID_APP)/*.inc)
-SOURCES_ALL := $(TEST_APP_SOURCES) $(XVALID_APP_SOURCES) \
+SOURCES_ALL := $(KAT_APP_SOURCES) $(XVALID_APP_SOURCES) \
 	       $(FUZZ_APP_SOURCES) $(ACVP_APP_SOURCES) $(WYCHEPROOF_APP_SOURCES)
 SOURCES_STYLE := $(foreach infile,$(SOURCES_ALL),$(infile)_style_check)
 
@@ -99,11 +99,11 @@ CPPCHECK_FLAGS2 ?= --cppcheck-build-dir=.bughunt $(CPPCHECK_FLAGS)
 cppcheck:
 	mkdir -p .cppcheck
 	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) \
-		./test-app ./xvalid-app ./fuzz-app ./acvp-app ./wycheproof-app
+		./kat-app ./xvalid-app ./fuzz-app ./acvp-app ./wycheproof-app
 
 .PHONY: bughunt
 bughunt:
 	mkdir -p .bughunt
 	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) \
-		./test-app ./xvalid-app ./fuzz-app ./acvp-app ./wycheproof-app
+		./kat-app ./xvalid-app ./fuzz-app ./acvp-app ./wycheproof-app
 
-- 
GitLab


From f3848735914ac951024ed85cba84c6bcdb6ce133 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 6 Mar 2023 14:13:52 +0000
Subject: [PATCH 159/332] update .gitignore

---
 .gitignore | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)

diff --git a/.gitignore b/.gitignore
index b6cfdd2a..793b42e7 100644
--- a/.gitignore
+++ b/.gitignore
@@ -10,14 +10,16 @@
 *.d
 *.dep
 *~
-ipsec_MB_testapp*
 ipsec_perf*
-ipsec_xvalid_test*
-job_api_fuzz_test*
+imb-kat*
+imb-xvalid*
+imb-fuzz-*
+imb-acvp*
+imb-wycheproof*
 *_lnk.def
 TAGS
-acvp_app
-test/wycheproof/wycheproof
 !wycheproof.c
+!ipsec_perf.c
 .cppcheck
 .bughunt
+/docs
-- 
GitLab


From 8c4ef1fcd26b3a68126d2f4f578ad064cd4468d6 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 14 Mar 2023 14:52:00 +0000
Subject: [PATCH 160/332] test: update cmake linker flags for test apps

---
 test/cmake/unix.cmake | 1 +
 1 file changed, 1 insertion(+)

diff --git a/test/cmake/unix.cmake b/test/cmake/unix.cmake
index 153afd46..6820de29 100644
--- a/test/cmake/unix.cmake
+++ b/test/cmake/unix.cmake
@@ -48,6 +48,7 @@ if(${CMAKE_SYSTEM_NAME} MATCHES "Linux")
 endif()
 set(CMAKE_C_FLAGS_DEBUG "-O0 -DDEBUG -g")
 set(CMAKE_C_FLAGS_RELEASE "-O3")
+set(CMAKE_EXE_LINKER_FLAGS "-fPIE -z noexecstack -z relro -z now")
 set(CMAKE_EXE_LINKER_FLAGS_DEBUG "-g")
 
 # -fno-strict-overflow is not supported by clang
-- 
GitLab


From 6c65c8b97da6c9d0aac26a164529f27fb398d691 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 14 Mar 2023 15:08:13 +0000
Subject: [PATCH 161/332] perf: add cmake files to build perf app

---
 CMakeLists.txt           |  3 ++
 perf/CMakeLists.txt      | 80 ++++++++++++++++++++++++++++++++++++++++
 perf/cmake/unix.cmake    | 54 +++++++++++++++++++++++++++
 perf/cmake/windows.cmake | 47 +++++++++++++++++++++++
 4 files changed, 184 insertions(+)
 create mode 100644 perf/CMakeLists.txt
 create mode 100644 perf/cmake/unix.cmake
 create mode 100644 perf/cmake/windows.cmake

diff --git a/CMakeLists.txt b/CMakeLists.txt
index ae292a69..bcfb61c6 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -43,5 +43,8 @@ endif()
 # build library
 add_subdirectory(lib)
 
+# build perf application
+add_subdirectory(perf)
+
 # build test applications
 add_subdirectory(test)
diff --git a/perf/CMakeLists.txt b/perf/CMakeLists.txt
new file mode 100644
index 00000000..e5879d8f
--- /dev/null
+++ b/perf/CMakeLists.txt
@@ -0,0 +1,80 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+cmake_minimum_required(VERSION 3.16)
+project(intel-ipsec-mb)
+
+# Ensure building entire project
+if(NOT FULL_PROJECT_BUILD)
+  message(FATAL_ERROR "Please run CMake from project root directory")
+endif()
+
+########################################
+# set app and library names
+########################################
+set(PERF_APP ipsec_perf)
+set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../lib)
+
+########################################
+# set source files
+########################################
+set(PERF_APP_SRC_FILES
+  ${CMAKE_CURRENT_SOURCE_DIR}/ipsec_perf.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/msr.c
+)
+
+set(PERF_APP_SRC_FILES_ASM
+  ${CMAKE_CURRENT_SOURCE_DIR}/misc.asm
+)
+
+########################################
+# setup NASM
+########################################
+enable_language(ASM_NASM)
+if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
+  message(FATAL_ERROR "Can't find assembler")
+endif()
+set(CAN_USE_ASSEMBLER TRUE)
+
+########################################
+# set C compiler and NASM options
+########################################
+# add OS specific options
+if(CMAKE_HOST_UNIX)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/unix.cmake)
+else()
+  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/windows.cmake)
+endif()
+
+########################################
+# add targets
+########################################
+include_directories(${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR})
+link_directories(${LIB_DIR})
+
+add_executable(${PERF_APP} ${PERF_APP_SRC_FILES} ${PERF_APP_SRC_FILES_ASM})
+target_link_libraries(${PERF_APP} PRIVATE ${IPSEC_MB_LIB})
+target_compile_definitions(${PERF_APP} PRIVATE ${APP_DEFINES})
+
diff --git a/perf/cmake/unix.cmake b/perf/cmake/unix.cmake
new file mode 100644
index 00000000..aa5cc18a
--- /dev/null
+++ b/perf/cmake/unix.cmake
@@ -0,0 +1,54 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice, this
+#   list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright notice,
+#   this list of conditions and the following disclaimer in the documentation
+#   and/or other materials provided with the distribution.
+# * Neither the name of Intel Corporation nor the names of its contributors may
+#   be used to endorse or promote products derived from this software without
+#   specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# ##############################################################################
+# Performance application CMake Unix config
+# ##############################################################################
+
+set(LINUX 1)
+set(IPSEC_MB_LIB IPSec_MB)
+
+# set NASM flags
+set(CMAKE_ASM_NASM_FLAGS "-Werror -felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
+
+# set compiler definitions
+set(APP_DEFINES LINUX _GNU_SOURCE NO_COMPAT_IMB_API_053)
+
+# set C compiler flags
+set(CMAKE_C_FLAGS
+    "-W -Wall -Wextra -Wmissing-declarations \
+-Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
+-Wformat-security -Wunreachable-code -Wmissing-noreturn -Wsign-compare \
+-Wno-endif-labels -Wstrict-prototypes -Wmissing-prototypes \
+-Wold-style-definition -fno-delete-null-pointer-checks -fwrapv -std=c99")
+set(CMAKE_C_FLAGS_DEBUG "-g -O0 -DDEBUG")
+set(CMAKE_C_FLAGS_RELEASE "-O3 -fPIE -fstack-protector -D_FORTIFY_SOURCE=2")
+set(CMAKE_EXE_LINKER_FLAGS "-fPIE -z noexecstack -z relro -z now -pthread")
+set(CMAKE_EXE_LINKER_FLAGS_DEBUG "-g")
+# -fno-strict-overflow is not supported by clang
+if(CMAKE_COMPILER_IS_GNUCC)
+  string(APPEND CMAKE_C_FLAGS " -fno-strict-overflow")
+endif()
+
diff --git a/perf/cmake/windows.cmake b/perf/cmake/windows.cmake
new file mode 100644
index 00000000..d48e9cfa
--- /dev/null
+++ b/perf/cmake/windows.cmake
@@ -0,0 +1,47 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice, this
+#   list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright notice,
+#   this list of conditions and the following disclaimer in the documentation
+#   and/or other materials provided with the distribution.
+# * Neither the name of Intel Corporation nor the names of its contributors may
+#   be used to endorse or promote products derived from this software without
+#   specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# ##############################################################################
+# Performance application CMake Windows config
+# ##############################################################################
+
+set(WINDOWS 1)
+set(IPSEC_MB_LIB libIPSec_MB)
+
+# set NASM flags
+set(CMAKE_ASM_NASM_FLAGS "-Werror -fwin64 -Xvc -DWIN_ABI")
+
+if(WINRING0_DIR)
+  string(APPEND EXTRA_CFLAGS " /DWIN_MSR -I ${WINRING0_DIR}")
+endif()
+
+# set C compiler flags
+set(CMAKE_C_FLAGS
+    "/nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc /std:c11 ${EXTRA_CFLAGS}"
+)
+set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
+set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
+set(CMAKE_EXE_LINKER_FLAGS_DEBUG "/debug")
+
-- 
GitLab


From 3c45f4c5905c5f3737406de4f9eb59d90d479039 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 18 Jan 2023 10:01:38 +0000
Subject: [PATCH 162/332] lib: update missing combinations for register casting

---
 lib/include/reg_sizes.inc | 514 +++++++++++++++++++++-----------------
 1 file changed, 290 insertions(+), 224 deletions(-)

diff --git a/lib/include/reg_sizes.inc b/lib/include/reg_sizes.inc
index 92bbe0ea..25629871 100644
--- a/lib/include/reg_sizes.inc
+++ b/lib/include/reg_sizes.inc
@@ -58,236 +58,302 @@
 %define rbpw	bp
 %define rbpb	bpl
 
-%define zmm0x xmm0
-%define zmm1x xmm1
-%define zmm2x xmm2
-%define zmm3x xmm3
-%define zmm4x xmm4
-%define zmm5x xmm5
-%define zmm6x xmm6
-%define zmm7x xmm7
-%define zmm8x xmm8
-%define zmm9x xmm9
-%define zmm10x xmm10
-%define zmm11x xmm11
-%define zmm12x xmm12
-%define zmm13x xmm13
-%define zmm14x xmm14
-%define zmm15x xmm15
-%define zmm16x xmm16
-%define zmm17x xmm17
-%define zmm18x xmm18
-%define zmm19x xmm19
-%define zmm20x xmm20
-%define zmm21x xmm21
-%define zmm22x xmm22
-%define zmm23x xmm23
-%define zmm24x xmm24
-%define zmm25x xmm25
-%define zmm26x xmm26
-%define zmm27x xmm27
-%define zmm28x xmm28
-%define zmm29x xmm29
-%define zmm30x xmm30
-%define zmm31x xmm31
+%xdefine zmm0x xmm0
+%xdefine zmm1x xmm1
+%xdefine zmm2x xmm2
+%xdefine zmm3x xmm3
+%xdefine zmm4x xmm4
+%xdefine zmm5x xmm5
+%xdefine zmm6x xmm6
+%xdefine zmm7x xmm7
+%xdefine zmm8x xmm8
+%xdefine zmm9x xmm9
+%xdefine zmm10x xmm10
+%xdefine zmm11x xmm11
+%xdefine zmm12x xmm12
+%xdefine zmm13x xmm13
+%xdefine zmm14x xmm14
+%xdefine zmm15x xmm15
+%xdefine zmm16x xmm16
+%xdefine zmm17x xmm17
+%xdefine zmm18x xmm18
+%xdefine zmm19x xmm19
+%xdefine zmm20x xmm20
+%xdefine zmm21x xmm21
+%xdefine zmm22x xmm22
+%xdefine zmm23x xmm23
+%xdefine zmm24x xmm24
+%xdefine zmm25x xmm25
+%xdefine zmm26x xmm26
+%xdefine zmm27x xmm27
+%xdefine zmm28x xmm28
+%xdefine zmm29x xmm29
+%xdefine zmm30x xmm30
+%xdefine zmm31x xmm31
 
-%define ymm0x xmm0
-%define ymm1x xmm1
-%define ymm2x xmm2
-%define ymm3x xmm3
-%define ymm4x xmm4
-%define ymm5x xmm5
-%define ymm6x xmm6
-%define ymm7x xmm7
-%define ymm8x xmm8
-%define ymm9x xmm9
-%define ymm10x xmm10
-%define ymm11x xmm11
-%define ymm12x xmm12
-%define ymm13x xmm13
-%define ymm14x xmm14
-%define ymm15x xmm15
-%define ymm16x xmm16
-%define ymm17x xmm17
-%define ymm18x xmm18
-%define ymm19x xmm19
-%define ymm20x xmm20
-%define ymm21x xmm21
-%define ymm22x xmm22
-%define ymm23x xmm23
-%define ymm24x xmm24
-%define ymm25x xmm25
-%define ymm26x xmm26
-%define ymm27x xmm27
-%define ymm28x xmm28
-%define ymm29x xmm29
-%define ymm30x xmm30
-%define ymm31x xmm31
+%xdefine ymm0x xmm0
+%xdefine ymm1x xmm1
+%xdefine ymm2x xmm2
+%xdefine ymm3x xmm3
+%xdefine ymm4x xmm4
+%xdefine ymm5x xmm5
+%xdefine ymm6x xmm6
+%xdefine ymm7x xmm7
+%xdefine ymm8x xmm8
+%xdefine ymm9x xmm9
+%xdefine ymm10x xmm10
+%xdefine ymm11x xmm11
+%xdefine ymm12x xmm12
+%xdefine ymm13x xmm13
+%xdefine ymm14x xmm14
+%xdefine ymm15x xmm15
+%xdefine ymm16x xmm16
+%xdefine ymm17x xmm17
+%xdefine ymm18x xmm18
+%xdefine ymm19x xmm19
+%xdefine ymm20x xmm20
+%xdefine ymm21x xmm21
+%xdefine ymm22x xmm22
+%xdefine ymm23x xmm23
+%xdefine ymm24x xmm24
+%xdefine ymm25x xmm25
+%xdefine ymm26x xmm26
+%xdefine ymm27x xmm27
+%xdefine ymm28x xmm28
+%xdefine ymm29x xmm29
+%xdefine ymm30x xmm30
+%xdefine ymm31x xmm31
 
-%define xmm0x xmm0
-%define xmm1x xmm1
-%define xmm2x xmm2
-%define xmm3x xmm3
-%define xmm4x xmm4
-%define xmm5x xmm5
-%define xmm6x xmm6
-%define xmm7x xmm7
-%define xmm8x xmm8
-%define xmm9x xmm9
-%define xmm10x xmm10
-%define xmm11x xmm11
-%define xmm12x xmm12
-%define xmm13x xmm13
-%define xmm14x xmm14
-%define xmm15x xmm15
-%define xmm16x xmm16
-%define xmm17x xmm17
-%define xmm18x xmm18
-%define xmm19x xmm19
-%define xmm20x xmm20
-%define xmm21x xmm21
-%define xmm22x xmm22
-%define xmm23x xmm23
-%define xmm24x xmm24
-%define xmm25x xmm25
-%define xmm26x xmm26
-%define xmm27x xmm27
-%define xmm28x xmm28
-%define xmm29x xmm29
-%define xmm30x xmm30
-%define xmm31x xmm31
+%xdefine xmm0x xmm0
+%xdefine xmm1x xmm1
+%xdefine xmm2x xmm2
+%xdefine xmm3x xmm3
+%xdefine xmm4x xmm4
+%xdefine xmm5x xmm5
+%xdefine xmm6x xmm6
+%xdefine xmm7x xmm7
+%xdefine xmm8x xmm8
+%xdefine xmm9x xmm9
+%xdefine xmm10x xmm10
+%xdefine xmm11x xmm11
+%xdefine xmm12x xmm12
+%xdefine xmm13x xmm13
+%xdefine xmm14x xmm14
+%xdefine xmm15x xmm15
+%xdefine xmm16x xmm16
+%xdefine xmm17x xmm17
+%xdefine xmm18x xmm18
+%xdefine xmm19x xmm19
+%xdefine xmm20x xmm20
+%xdefine xmm21x xmm21
+%xdefine xmm22x xmm22
+%xdefine xmm23x xmm23
+%xdefine xmm24x xmm24
+%xdefine xmm25x xmm25
+%xdefine xmm26x xmm26
+%xdefine xmm27x xmm27
+%xdefine xmm28x xmm28
+%xdefine xmm29x xmm29
+%xdefine xmm30x xmm30
+%xdefine xmm31x xmm31
 
-%define zmm0y ymm0
-%define zmm1y ymm1
-%define zmm2y ymm2
-%define zmm3y ymm3
-%define zmm4y ymm4
-%define zmm5y ymm5
-%define zmm6y ymm6
-%define zmm7y ymm7
-%define zmm8y ymm8
-%define zmm9y ymm9
-%define zmm10y ymm10
-%define zmm11y ymm11
-%define zmm12y ymm12
-%define zmm13y ymm13
-%define zmm14y ymm14
-%define zmm15y ymm15
-%define zmm16y ymm16
-%define zmm17y ymm17
-%define zmm18y ymm18
-%define zmm19y ymm19
-%define zmm20y ymm20
-%define zmm21y ymm21
-%define zmm22y ymm22
-%define zmm23y ymm23
-%define zmm24y ymm24
-%define zmm25y ymm25
-%define zmm26y ymm26
-%define zmm27y ymm27
-%define zmm28y ymm28
-%define zmm29y ymm29
-%define zmm30y ymm30
-%define zmm31y ymm31
+%xdefine zmm0y ymm0
+%xdefine zmm1y ymm1
+%xdefine zmm2y ymm2
+%xdefine zmm3y ymm3
+%xdefine zmm4y ymm4
+%xdefine zmm5y ymm5
+%xdefine zmm6y ymm6
+%xdefine zmm7y ymm7
+%xdefine zmm8y ymm8
+%xdefine zmm9y ymm9
+%xdefine zmm10y ymm10
+%xdefine zmm11y ymm11
+%xdefine zmm12y ymm12
+%xdefine zmm13y ymm13
+%xdefine zmm14y ymm14
+%xdefine zmm15y ymm15
+%xdefine zmm16y ymm16
+%xdefine zmm17y ymm17
+%xdefine zmm18y ymm18
+%xdefine zmm19y ymm19
+%xdefine zmm20y ymm20
+%xdefine zmm21y ymm21
+%xdefine zmm22y ymm22
+%xdefine zmm23y ymm23
+%xdefine zmm24y ymm24
+%xdefine zmm25y ymm25
+%xdefine zmm26y ymm26
+%xdefine zmm27y ymm27
+%xdefine zmm28y ymm28
+%xdefine zmm29y ymm29
+%xdefine zmm30y ymm30
+%xdefine zmm31y ymm31
 
-%define xmm0y ymm0
-%define xmm1y ymm1
-%define xmm2y ymm2
-%define xmm3y ymm3
-%define xmm4y ymm4
-%define xmm5y ymm5
-%define xmm6y ymm6
-%define xmm7y ymm7
-%define xmm8y ymm8
-%define xmm9y ymm9
-%define xmm10y ymm10
-%define xmm11y ymm11
-%define xmm12y ymm12
-%define xmm13y ymm13
-%define xmm14y ymm14
-%define xmm15y ymm15
-%define xmm16y ymm16
-%define xmm17y ymm17
-%define xmm18y ymm18
-%define xmm19y ymm19
-%define xmm20y ymm20
-%define xmm21y ymm21
-%define xmm22y ymm22
-%define xmm23y ymm23
-%define xmm24y ymm24
-%define xmm25y ymm25
-%define xmm26y ymm26
-%define xmm27y ymm27
-%define xmm28y ymm28
-%define xmm29y ymm29
-%define xmm30y ymm30
-%define xmm31y ymm31
+%xdefine ymm0y ymm0
+%xdefine ymm1y ymm1
+%xdefine ymm2y ymm2
+%xdefine ymm3y ymm3
+%xdefine ymm4y ymm4
+%xdefine ymm5y ymm5
+%xdefine ymm6y ymm6
+%xdefine ymm7y ymm7
+%xdefine ymm8y ymm8
+%xdefine ymm9y ymm9
+%xdefine ymm10y ymm10
+%xdefine ymm11y ymm11
+%xdefine ymm12y ymm12
+%xdefine ymm13y ymm13
+%xdefine ymm14y ymm14
+%xdefine ymm15y ymm15
+%xdefine ymm16y ymm16
+%xdefine ymm17y ymm17
+%xdefine ymm18y ymm18
+%xdefine ymm19y ymm19
+%xdefine ymm20y ymm20
+%xdefine ymm21y ymm21
+%xdefine ymm22y ymm22
+%xdefine ymm23y ymm23
+%xdefine ymm24y ymm24
+%xdefine ymm25y ymm25
+%xdefine ymm26y ymm26
+%xdefine ymm27y ymm27
+%xdefine ymm28y ymm28
+%xdefine ymm29y ymm29
+%xdefine ymm30y ymm30
+%xdefine ymm31y ymm31
 
-%define xmm0z zmm0
-%define xmm1z zmm1
-%define xmm2z zmm2
-%define xmm3z zmm3
-%define xmm4z zmm4
-%define xmm5z zmm5
-%define xmm6z zmm6
-%define xmm7z zmm7
-%define xmm8z zmm8
-%define xmm9z zmm9
-%define xmm10z zmm10
-%define xmm11z zmm11
-%define xmm12z zmm12
-%define xmm13z zmm13
-%define xmm14z zmm14
-%define xmm15z zmm15
-%define xmm16z zmm16
-%define xmm17z zmm17
-%define xmm18z zmm18
-%define xmm19z zmm19
-%define xmm20z zmm20
-%define xmm21z zmm21
-%define xmm22z zmm22
-%define xmm23z zmm23
-%define xmm24z zmm24
-%define xmm25z zmm25
-%define xmm26z zmm26
-%define xmm27z zmm27
-%define xmm28z zmm28
-%define xmm29z zmm29
-%define xmm30z zmm30
-%define xmm31z zmm31
+%xdefine xmm0y ymm0
+%xdefine xmm1y ymm1
+%xdefine xmm2y ymm2
+%xdefine xmm3y ymm3
+%xdefine xmm4y ymm4
+%xdefine xmm5y ymm5
+%xdefine xmm6y ymm6
+%xdefine xmm7y ymm7
+%xdefine xmm8y ymm8
+%xdefine xmm9y ymm9
+%xdefine xmm10y ymm10
+%xdefine xmm11y ymm11
+%xdefine xmm12y ymm12
+%xdefine xmm13y ymm13
+%xdefine xmm14y ymm14
+%xdefine xmm15y ymm15
+%xdefine xmm16y ymm16
+%xdefine xmm17y ymm17
+%xdefine xmm18y ymm18
+%xdefine xmm19y ymm19
+%xdefine xmm20y ymm20
+%xdefine xmm21y ymm21
+%xdefine xmm22y ymm22
+%xdefine xmm23y ymm23
+%xdefine xmm24y ymm24
+%xdefine xmm25y ymm25
+%xdefine xmm26y ymm26
+%xdefine xmm27y ymm27
+%xdefine xmm28y ymm28
+%xdefine xmm29y ymm29
+%xdefine xmm30y ymm30
+%xdefine xmm31y ymm31
 
-%define ymm0z zmm0
-%define ymm1z zmm1
-%define ymm2z zmm2
-%define ymm3z zmm3
-%define ymm4z zmm4
-%define ymm5z zmm5
-%define ymm6z zmm6
-%define ymm7z zmm7
-%define ymm8z zmm8
-%define ymm9z zmm9
-%define ymm10z zmm10
-%define ymm11z zmm11
-%define ymm12z zmm12
-%define ymm13z zmm13
-%define ymm14z zmm14
-%define ymm15z zmm15
-%define ymm16z zmm16
-%define ymm17z zmm17
-%define ymm18z zmm18
-%define ymm19z zmm19
-%define ymm20z zmm20
-%define ymm21z zmm21
-%define ymm22z zmm22
-%define ymm23z zmm23
-%define ymm24z zmm24
-%define ymm25z zmm25
-%define ymm26z zmm26
-%define ymm27z zmm27
-%define ymm28z zmm28
-%define ymm29z zmm29
-%define ymm30z zmm30
-%define ymm31z zmm31
+%xdefine xmm0z zmm0
+%xdefine xmm1z zmm1
+%xdefine xmm2z zmm2
+%xdefine xmm3z zmm3
+%xdefine xmm4z zmm4
+%xdefine xmm5z zmm5
+%xdefine xmm6z zmm6
+%xdefine xmm7z zmm7
+%xdefine xmm8z zmm8
+%xdefine xmm9z zmm9
+%xdefine xmm10z zmm10
+%xdefine xmm11z zmm11
+%xdefine xmm12z zmm12
+%xdefine xmm13z zmm13
+%xdefine xmm14z zmm14
+%xdefine xmm15z zmm15
+%xdefine xmm16z zmm16
+%xdefine xmm17z zmm17
+%xdefine xmm18z zmm18
+%xdefine xmm19z zmm19
+%xdefine xmm20z zmm20
+%xdefine xmm21z zmm21
+%xdefine xmm22z zmm22
+%xdefine xmm23z zmm23
+%xdefine xmm24z zmm24
+%xdefine xmm25z zmm25
+%xdefine xmm26z zmm26
+%xdefine xmm27z zmm27
+%xdefine xmm28z zmm28
+%xdefine xmm29z zmm29
+%xdefine xmm30z zmm30
+%xdefine xmm31z zmm31
+
+%xdefine ymm0z zmm0
+%xdefine ymm1z zmm1
+%xdefine ymm2z zmm2
+%xdefine ymm3z zmm3
+%xdefine ymm4z zmm4
+%xdefine ymm5z zmm5
+%xdefine ymm6z zmm6
+%xdefine ymm7z zmm7
+%xdefine ymm8z zmm8
+%xdefine ymm9z zmm9
+%xdefine ymm10z zmm10
+%xdefine ymm11z zmm11
+%xdefine ymm12z zmm12
+%xdefine ymm13z zmm13
+%xdefine ymm14z zmm14
+%xdefine ymm15z zmm15
+%xdefine ymm16z zmm16
+%xdefine ymm17z zmm17
+%xdefine ymm18z zmm18
+%xdefine ymm19z zmm19
+%xdefine ymm20z zmm20
+%xdefine ymm21z zmm21
+%xdefine ymm22z zmm22
+%xdefine ymm23z zmm23
+%xdefine ymm24z zmm24
+%xdefine ymm25z zmm25
+%xdefine ymm26z zmm26
+%xdefine ymm27z zmm27
+%xdefine ymm28z zmm28
+%xdefine ymm29z zmm29
+%xdefine ymm30z zmm30
+%xdefine ymm31z zmm31
+
+%xdefine zmm0z zmm0
+%xdefine zmm1z zmm1
+%xdefine zmm2z zmm2
+%xdefine zmm3z zmm3
+%xdefine zmm4z zmm4
+%xdefine zmm5z zmm5
+%xdefine zmm6z zmm6
+%xdefine zmm7z zmm7
+%xdefine zmm8z zmm8
+%xdefine zmm9z zmm9
+%xdefine zmm10z zmm10
+%xdefine zmm11z zmm11
+%xdefine zmm12z zmm12
+%xdefine zmm13z zmm13
+%xdefine zmm14z zmm14
+%xdefine zmm15z zmm15
+%xdefine zmm16z zmm16
+%xdefine zmm17z zmm17
+%xdefine zmm18z zmm18
+%xdefine zmm19z zmm19
+%xdefine zmm20z zmm20
+%xdefine zmm21z zmm21
+%xdefine zmm22z zmm22
+%xdefine zmm23z zmm23
+%xdefine zmm24z zmm24
+%xdefine zmm25z zmm25
+%xdefine zmm26z zmm26
+%xdefine zmm27z zmm27
+%xdefine zmm28z zmm28
+%xdefine zmm29z zmm29
+%xdefine zmm30z zmm30
+%xdefine zmm31z zmm31
 
 %define DWORD(reg) reg %+ d
 %define WORD(reg)  reg %+ w
-- 
GitLab


From 089bd3925c7505ae3251070ce795570149eec260 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 18 Jan 2023 10:08:52 +0000
Subject: [PATCH 163/332] avx512: [gcm] double the space for precomputed hash
 keys

---
 lib/include/gcm_keys_vaes_avx512.inc | 51 ++++++++++++++++++++++++++++
 lib/intel-ipsec-mb.h                 |  2 +-
 2 files changed, 52 insertions(+), 1 deletion(-)

diff --git a/lib/include/gcm_keys_vaes_avx512.inc b/lib/include/gcm_keys_vaes_avx512.inc
index 4db9b089..5ee02b3e 100644
--- a/lib/include/gcm_keys_vaes_avx512.inc
+++ b/lib/include/gcm_keys_vaes_avx512.inc
@@ -93,4 +93,55 @@
 %define HashKey_1       (16*62)   ; HashKey <<1 mod poly
 %define HashKey         (16*62)   ; HashKey <<1 mod poly
 
+%define HKeyGap (16*48)
+;;
+%define HashKeyK_48      (16*15 + 16*48)   ; HashKey^48 <<1 mod poly
+%define HashKeyK_47      (16*16 + 16*48)   ; HashKey^47 <<1 mod poly
+%define HashKeyK_46      (16*17 + 16*48)   ; HashKey^46 <<1 mod poly
+%define HashKeyK_45      (16*18 + 16*48)   ; HashKey^45 <<1 mod poly
+%define HashKeyK_44      (16*19 + 16*48)   ; HashKey^44 <<1 mod poly
+%define HashKeyK_43      (16*20 + 16*48)   ; HashKey^43 <<1 mod poly
+%define HashKeyK_42      (16*21 + 16*48)   ; HashKey^42 <<1 mod poly
+%define HashKeyK_41      (16*22 + 16*48)   ; HashKey^41 <<1 mod poly
+%define HashKeyK_40      (16*23 + 16*48)   ; HashKey^40 <<1 mod poly
+%define HashKeyK_39      (16*24 + 16*48)   ; HashKey^39 <<1 mod poly
+%define HashKeyK_38      (16*25 + 16*48)   ; HashKey^38 <<1 mod poly
+%define HashKeyK_37      (16*26 + 16*48)   ; HashKey^37 <<1 mod poly
+%define HashKeyK_36      (16*27 + 16*48)   ; HashKey^36 <<1 mod poly
+%define HashKeyK_35      (16*28 + 16*48)   ; HashKey^35 <<1 mod poly
+%define HashKeyK_34      (16*29 + 16*48)   ; HashKey^34 <<1 mod poly
+%define HashKeyK_33      (16*30 + 16*48)   ; HashKey^33 <<1 mod poly
+%define HashKeyK_32      (16*31 + 16*48)   ; HashKey^32 <<1 mod poly
+%define HashKeyK_31      (16*32 + 16*48)   ; HashKey^31 <<1 mod poly
+%define HashKeyK_30      (16*33 + 16*48)   ; HashKey^30 <<1 mod poly
+%define HashKeyK_29      (16*34 + 16*48)   ; HashKey^29 <<1 mod poly
+%define HashKeyK_28      (16*35 + 16*48)   ; HashKey^28 <<1 mod poly
+%define HashKeyK_27      (16*36 + 16*48)   ; HashKey^27 <<1 mod poly
+%define HashKeyK_26      (16*37 + 16*48)   ; HashKey^26 <<1 mod poly
+%define HashKeyK_25      (16*38 + 16*48)   ; HashKey^25 <<1 mod poly
+%define HashKeyK_24      (16*39 + 16*48)   ; HashKey^24 <<1 mod poly
+%define HashKeyK_23      (16*40 + 16*48)   ; HashKey^23 <<1 mod poly
+%define HashKeyK_22      (16*41 + 16*48)   ; HashKey^22 <<1 mod poly
+%define HashKeyK_21      (16*42 + 16*48)   ; HashKey^21 <<1 mod poly
+%define HashKeyK_20      (16*43 + 16*48)   ; HashKey^20 <<1 mod poly
+%define HashKeyK_19      (16*44 + 16*48)   ; HashKey^19 <<1 mod poly
+%define HashKeyK_18      (16*45 + 16*48)   ; HashKey^18 <<1 mod poly
+%define HashKeyK_17      (16*46 + 16*48)   ; HashKey^17 <<1 mod poly
+%define HashKeyK_16      (16*47 + 16*48)   ; HashKey^16 <<1 mod poly
+%define HashKeyK_15      (16*48 + 16*48)   ; HashKey^15 <<1 mod poly
+%define HashKeyK_14      (16*49 + 16*48)   ; HashKey^14 <<1 mod poly
+%define HashKeyK_13      (16*50 + 16*48)   ; HashKey^13 <<1 mod poly
+%define HashKeyK_12      (16*51 + 16*48)   ; HashKey^12 <<1 mod poly
+%define HashKeyK_11      (16*52 + 16*48)   ; HashKey^11 <<1 mod poly
+%define HashKeyK_10      (16*53 + 16*48)   ; HashKey^10 <<1 mod poly
+%define HashKeyK_9       (16*54 + 16*48)   ; HashKey^9 <<1 mod poly
+%define HashKeyK_8       (16*55 + 16*48)   ; HashKey^8 <<1 mod poly
+%define HashKeyK_7       (16*56 + 16*48)   ; HashKey^7 <<1 mod poly
+%define HashKeyK_6       (16*57 + 16*48)   ; HashKey^6 <<1 mod poly
+%define HashKeyK_5       (16*58 + 16*48)   ; HashKey^5 <<1 mod poly
+%define HashKeyK_4       (16*59 + 16*48)   ; HashKey^4 <<1 mod poly
+%define HashKeyK_3       (16*60 + 16*48)   ; HashKey^3 <<1 mod poly
+%define HashKeyK_2       (16*61 + 16*48)   ; HashKey^2 <<1 mod poly
+%define HashKeyK_1       (16*62 + 16*48)   ; HashKey <<1 mod poly
+%define HashKeyK         (16*62 + 16*48)   ; HashKey <<1 mod poly
 %endif ; GCM_KEYS_VAES_AVX512_INCLUDED
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 81225fd8..b6f5c625 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -779,7 +779,7 @@ struct gcm_key_data {
                          * (HashKey<<1 mod poly), (HashKey^2<<1 mod poly), ...,
                          * (Hashkey^48<<1 mod poly)
                          */
-                        uint8_t shifted_hkey[IMB_GCM_ENC_KEY_LEN * 48];
+                        uint8_t shifted_hkey[IMB_GCM_ENC_KEY_LEN * 48 * 2];
                 } vaes_avx512;
         } ghash_keys;
 }
-- 
GitLab


From 556cb7384df0192acd6829e3df9483b212d53d6b Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 18 Jan 2023 10:21:02 +0000
Subject: [PATCH 164/332] avx512: [gcm] added computation of new 'K' hash keys

---
 lib/avx512_t2/gcm_vaes_avx512.inc | 29 +++++++++++++++++++++++++++++
 lib/include/gcm_defines.inc       |  8 ++++++--
 2 files changed, 35 insertions(+), 2 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index f8b6a6af..43237dfe 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -682,6 +682,12 @@
         vmovdqu64       [%%GDATA + HashKey_4], %%T5
         vinserti64x2    %%ZT7, %%T5, 0
 
+        ;; calculate HashKeyX = HashKey x POLY
+        vpclmulqdq      %%ZT1, %%ZT7, [rel POLY], 0x10
+        vpshufd         %%ZT2, %%ZT7, 01001110b   
+        vpxorq          %%ZT1, %%ZT1, %%ZT2  
+        vmovdqu64       [%%GDATA + HashKeyK_4], %%ZT1
+
         ;; switch to 4x128-bit computations now
         vshufi64x2      %%ZT5, %%ZT5, %%ZT5, 0x00       ;; broadcast HashKey^4 across all ZT5
         vmovdqa64       %%ZT8, %%ZT7                    ;; save HashKey^4 to HashKey^1 in ZT8
@@ -689,6 +695,14 @@
         ;; calculate HashKey^5<<1 mod poly, HashKey^6<<1 mod poly, ... HashKey^8<<1 mod poly
         GHASH_MUL       %%ZT7, %%ZT5, %%ZT1, %%ZT3, %%ZT4, %%ZT6, %%ZT2
         vmovdqu64       [%%GDATA + HashKey_8], %%ZT7    ;; HashKey^8 to HashKey^5 in ZT7 now
+        
+        ;; calculate HashKeyX = HashKey x POLY
+        vpclmulqdq      %%ZT1, %%ZT7, [rel POLY], 0x10
+        vpshufd         %%ZT2, %%ZT7, 01001110b   
+        vpxorq          %%ZT1, %%ZT1, %%ZT2  
+        vmovdqu64       [%%GDATA + HashKeyK_8], %%ZT1
+
+        
         vshufi64x2      %%ZT5, %%ZT7, %%ZT7, 0x00       ;; broadcast HashKey^8 across all ZT5
 
         ;; calculate HashKey^9<<1 mod poly, HashKey^10<<1 mod poly, ... HashKey^48<<1 mod poly
@@ -698,15 +712,30 @@
         ;; compute HashKey^(4 + n), HashKey^(3 + n), ... HashKey^(1 + n)
         GHASH_MUL       %%ZT8, %%ZT5, %%ZT1, %%ZT3, %%ZT4, %%ZT6, %%ZT2
         vmovdqu64       [%%GDATA + HashKey_ %+ i], %%ZT8
+
+        ;; calculate HashKeyX = HashKey x POLY
+        vpclmulqdq      %%ZT1, %%ZT8, [rel POLY], 0x10
+        vpshufd         %%ZT2, %%ZT8, 01001110b   
+        vpxorq          %%ZT1, %%ZT1, %%ZT2  
+        vmovdqu64       [%%GDATA + HashKeyK_ %+ i], %%ZT1
+
 %assign i (i + 4)
 
         ;; compute HashKey^(8 + n), HashKey^(7 + n), ... HashKey^(5 + n)
         GHASH_MUL       %%ZT7, %%ZT5, %%ZT1, %%ZT3, %%ZT4, %%ZT6, %%ZT2
         vmovdqu64       [%%GDATA + HashKey_ %+ i], %%ZT7
+
+        ;; calculate HashKeyX = HashKey x POLY
+        vpclmulqdq      %%ZT1, %%ZT7, [rel POLY], 0x10
+        vpshufd         %%ZT2, %%ZT7, 01001110b   
+        vpxorq          %%ZT1, %%ZT1, %%ZT2  
+        vmovdqu64       [%%GDATA + HashKeyK_ %+ i], %%ZT1
+
 %assign i (i + 4)
 %endrep
 %endmacro
 
+
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; CALC_AAD_HASH: Calculates the hash of the data which will not be encrypted.
 ; Input: The input data (A_IN), that data's length (A_LEN), and the hash key (HASH_KEY).
diff --git a/lib/include/gcm_defines.inc b/lib/include/gcm_defines.inc
index 7c6f659a..56be5fa0 100644
--- a/lib/include/gcm_defines.inc
+++ b/lib/include/gcm_defines.inc
@@ -37,8 +37,12 @@
 mksection .rodata
 default rel
 
-align 16
-POLY:   dq     0x0000000000000001, 0xC200000000000000
+align 64
+POLY:
+        dq     0x0000000000000001, 0xC200000000000000
+        dq     0x0000000000000001, 0xC200000000000000
+        dq     0x0000000000000001, 0xC200000000000000
+        dq     0x0000000000000001, 0xC200000000000000
 
 align 64
 POLY2:
-- 
GitLab


From 10f8d2452c1bf20f487462aa0dd40b693d2327af Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 18 Jan 2023 10:36:17 +0000
Subject: [PATCH 165/332] avx512: [gcm] apply new multiplication and reduction
 method in performance critical sections

---
 lib/avx512_t2/gcm_vaes_avx512.inc | 976 ++++++++++++++----------------
 1 file changed, 440 insertions(+), 536 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 43237dfe..ca35a173 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -237,25 +237,25 @@
 %define %%TYPE  %1      ; [in] ghash type: start (xor hash), mid, end (same as mid; no reduction),
                         ;      end_reduce (end with reduction), start_reduce
 %define %%GH    %2      ; [in/out] ZMM ghash sum: high 128-bits
-%define %%GM    %3      ; [in/out] ZMM ghash sum: middle 128-bits
-%define %%GL    %4      ; [in/out] ZMM ghash sum: low 128-bits
-%define %%INPTR %5      ; [in] data input pointer
-%define %%INOFF %6      ; [in] data input offset
-%define %%INDIS %7      ; [in] data input displacement
-%define %%HKPTR %8      ; [in] hash key pointer
-%define %%HKOFF %9      ; [in] hash key offset
-%define %%HKDIS %10     ; [in] hash key displacement
-%define %%HASH  %11     ; [in/out] ZMM hash value in/out
-%define %%ZTMP0 %12     ; [clobbered] temporary ZMM
-%define %%ZTMP1 %13     ; [clobbered] temporary ZMM
-%define %%ZTMP2 %14     ; [clobbered] temporary ZMM
-%define %%ZTMP3 %15     ; [clobbered] temporary ZMM
-%define %%ZTMP4 %16     ; [clobbered] temporary ZMM
-%define %%ZTMP5 %17     ; [clobbered] temporary ZMM
-%define %%ZTMP6 %18     ; [clobbered] temporary ZMM
-%define %%ZTMP7 %19     ; [clobbered] temporary ZMM
-%define %%ZTMP8 %20     ; [clobbered] temporary ZMM
-%define %%ZTMP9 %21     ; [clobbered] temporary ZMM
+%define %%GL    %3      ; [in/out] ZMM ghash sum: low 128-bits
+%define %%INPTR %4      ; [in] data input pointer
+%define %%INOFF %5      ; [in] data input offset
+%define %%INDIS %6      ; [in] data input displacement
+%define %%HKPTR %7      ; [in] hash key pointer
+%define %%HKOFF %8      ; [in] hash key offset
+%define %%HKDIS %9      ; [in] hash key displacement
+%define %%HASH  %10     ; [in/out] ZMM hash value in/out
+%define %%ZTMP0 %11     ; [clobbered] temporary ZMM
+%define %%ZTMP1 %12     ; [clobbered] temporary ZMM
+%define %%ZTMP2 %13     ; [clobbered] temporary ZMM
+%define %%ZTMP3 %14     ; [clobbered] temporary ZMM
+%define %%ZTMP4 %15     ; [clobbered] temporary ZMM
+%define %%ZTMP5 %16     ; [clobbered] temporary ZMM
+%define %%ZTMP6 %17     ; [clobbered] temporary ZMM
+%define %%ZTMP7 %18     ; [clobbered] temporary ZMM
+%define %%ZTMP8 %19     ; [clobbered] temporary ZMM
+%define %%ZTMP9 %20     ; [clobbered] temporary ZMM
+%define %%ZTMPA %21     ; [clobbered] temporary ZMM
 %define %%SHUFM %22     ; [in] ZMM with shuffle mask - provided only when input data needs shuffling
 
 %assign start_ghash 0
@@ -286,10 +286,11 @@
         vpxorq          %%ZTMP9, %%ZTMP9, %%HASH
 %endif
         vmovdqu64       %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS]
-        vpclmulqdq      %%ZTMP0, %%ZTMP9, %%ZTMP8, 0x11     ; T0H = a1*b1
-        vpclmulqdq      %%ZTMP1, %%ZTMP9, %%ZTMP8, 0x00     ; T0L = a0*b0
-        vpclmulqdq      %%ZTMP2, %%ZTMP9, %%ZTMP8, 0x01     ; T0M1 = a1*b0
-        vpclmulqdq      %%ZTMP3, %%ZTMP9, %%ZTMP8, 0x10     ; T0M2 = a0*b1
+        vmovdqu64       %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap]
+        vpclmulqdq      %%ZTMP0, %%ZTMP9, %%ZTMPA, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%ZTMP1, %%ZTMP9, %%ZTMPA, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%ZTMP2, %%ZTMP9, %%ZTMP8, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%ZTMP3, %%ZTMP9, %%ZTMP8, 0x11 ; THH = MH*HH
         ;; ghash blocks 4-7
 %if %0 == 22
         vmovdqu64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 64]
@@ -298,21 +299,18 @@
         vmovdqa64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 64]
 %endif
         vmovdqu64       %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS + 64]
-        vpclmulqdq      %%ZTMP4, %%ZTMP9, %%ZTMP8, 0x11     ; T1H = a1*b1
-        vpclmulqdq      %%ZTMP5, %%ZTMP9, %%ZTMP8, 0x00     ; T1L = a0*b0
-        vpclmulqdq      %%ZTMP6, %%ZTMP9, %%ZTMP8, 0x01     ; T1M1 = a1*b0
-        vpclmulqdq      %%ZTMP7, %%ZTMP9, %%ZTMP8, 0x10     ; T1M2 = a0*b1
+        vmovdqu64       %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap + 64]
+        vpclmulqdq      %%ZTMP4, %%ZTMP9, %%ZTMPA, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%ZTMP5, %%ZTMP9, %%ZTMPA, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%ZTMP6, %%ZTMP9, %%ZTMP8, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%ZTMP7, %%ZTMP9, %%ZTMP8, 0x11 ; THH = MH*HH
         ;; update sums
 %if start_ghash != 0
-        vpxorq          %%GM, %%ZTMP2, %%ZTMP6              ; GM = T0M1 + T1M1
-        vpxorq          %%GH, %%ZTMP0, %%ZTMP4              ; GH = T0H + T1H
-        vpxorq          %%GL, %%ZTMP1, %%ZTMP5              ; GL = T0L + T1L
-        vpternlogq      %%GM, %%ZTMP3, %%ZTMP7, 0x96        ; GM = T0M2 + T1M1
+        vpxorq          %%GL, %%ZTMP0, %%ZTMP2              ; T2 = THL + TLL
+        vpxorq          %%GH, %%ZTMP1, %%ZTMP3              ; T1 = THH + TLH
 %else ;; mid, end, end_reduce
-        vpternlogq      %%GM, %%ZTMP2, %%ZTMP6, 0x96        ; GM += T0M1 + T1M1
-        vpternlogq      %%GH, %%ZTMP0, %%ZTMP4, 0x96        ; GH += T0H + T1H
-        vpternlogq      %%GL, %%ZTMP1, %%ZTMP5, 0x96        ; GL += T0L + T1L
-        vpternlogq      %%GM, %%ZTMP3, %%ZTMP7, 0x96        ; GM += T0M2 + T1M1
+        vpternlogq      %%GL, %%ZTMP0, %%ZTMP2, 0x96        ; T2 = THL + TLL
+        vpternlogq      %%GH, %%ZTMP1, %%ZTMP3, 0x96        ; T1 = THH + TLH
 %endif
         ;; ghash blocks 8-11
 %if %0 == 22
@@ -322,10 +320,14 @@
         vmovdqa64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 128]
 %endif
         vmovdqu64       %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS + 128]
-        vpclmulqdq      %%ZTMP0, %%ZTMP9, %%ZTMP8, 0x11     ; T0H = a1*b1
-        vpclmulqdq      %%ZTMP1, %%ZTMP9, %%ZTMP8, 0x00     ; T0L = a0*b0
-        vpclmulqdq      %%ZTMP2, %%ZTMP9, %%ZTMP8, 0x01     ; T0M1 = a1*b0
-        vpclmulqdq      %%ZTMP3, %%ZTMP9, %%ZTMP8, 0x10     ; T0M2 = a0*b1
+        vmovdqu64       %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap + 128]
+        vpclmulqdq      %%ZTMP0, %%ZTMP9, %%ZTMPA, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%ZTMP1, %%ZTMP9, %%ZTMPA, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%ZTMP2, %%ZTMP9, %%ZTMP8, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%ZTMP3, %%ZTMP9, %%ZTMP8, 0x11 ; THH = MH*HH
+        ;; update sums
+        vpternlogq      %%GL, %%ZTMP6, %%ZTMP4, 0x96        ; T2 = THL + TLL
+        vpternlogq      %%GH, %%ZTMP7, %%ZTMP5, 0x96        ; T1 = THH + TLH
         ;; ghash blocks 12-15
 %if %0 == 22
         vmovdqu64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 192]
@@ -334,31 +336,23 @@
         vmovdqa64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 192]
 %endif
         vmovdqu64       %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS + 192]
-        vpclmulqdq      %%ZTMP4, %%ZTMP9, %%ZTMP8, 0x11     ; T1H = a1*b1
-        vpclmulqdq      %%ZTMP5, %%ZTMP9, %%ZTMP8, 0x00     ; T1L = a0*b0
-        vpclmulqdq      %%ZTMP6, %%ZTMP9, %%ZTMP8, 0x01     ; T1M1 = a1*b0
-        vpclmulqdq      %%ZTMP7, %%ZTMP9, %%ZTMP8, 0x10     ; T1M2 = a0*b1
+        vmovdqu64       %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap + 192]
+        vpclmulqdq      %%ZTMP4, %%ZTMP9, %%ZTMPA, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%ZTMP5, %%ZTMP9, %%ZTMPA, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%ZTMP6, %%ZTMP9, %%ZTMP8, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%ZTMP7, %%ZTMP9, %%ZTMP8, 0x11 ; THH = MH*HH
         ;; update sums
-        vpternlogq      %%GM, %%ZTMP2, %%ZTMP6, 0x96        ; GM += T0M1 + T1M1
-        vpternlogq      %%GH, %%ZTMP0, %%ZTMP4, 0x96        ; GH += T0H + T1H
-        vpternlogq      %%GL, %%ZTMP1, %%ZTMP5, 0x96        ; GL += T0L + T1L
-        vpternlogq      %%GM, %%ZTMP3, %%ZTMP7, 0x96        ; GM += T0M2 + T1M1
+        vpternlogq      %%GL, %%ZTMP0, %%ZTMP2, 0x96        ; T2 = THL + TLL
+        vpternlogq      %%GH, %%ZTMP1, %%ZTMP3, 0x96        ; T1 = THH + TLH
+        vpternlogq      %%GL, %%ZTMP6, %%ZTMP4, 0x96        ; T2 = THL + TLL
+        vpternlogq      %%GH, %%ZTMP7, %%ZTMP5, 0x96        ; T1 = THH + TLH
 
 %if do_reduction != 0
-        ;; integrate GM into GH and GL
-        vpsrldq         %%ZTMP0, %%GM, 8
-        vpslldq         %%ZTMP1, %%GM, 8
-        vpxorq          %%GH, %%GH, %%ZTMP0
-        vpxorq          %%GL, %%GL, %%ZTMP1
-
-        ;; add GH and GL 128-bit words horizontally
-        VHPXORI4x128    %%GH, %%ZTMP0
-        VHPXORI4x128    %%GL, %%ZTMP1
-
-        ;; reduction
-        vmovdqa64       XWORD(%%ZTMP2), [rel POLY2]
-        VCLMUL_REDUCE   XWORD(%%HASH), XWORD(%%ZTMP2), \
-                        XWORD(%%GH), XWORD(%%GL), XWORD(%%ZTMP0), XWORD(%%ZTMP1)
+        ;; new reduction
+        vpclmulqdq      %%HASH, %%GL, [rel POLY], 0x10
+        vpshufd         %%ZTMP0, %%GL, 01001110b
+        vpternlogq      %%HASH, %%GH, %%ZTMP0, 0x96
+        VHPXORI4x128    %%HASH, %%ZTMP0
 %endif
 %endmacro
 
@@ -369,112 +363,141 @@
 ;;; - it doesn't load the data and it assumed it is already loaded and
 ;;;   shuffled
 ;;; - single_call scenario only
-%macro  GHASH_1_TO_16 17-20
+%macro  GHASH_1_TO_16 18-20
 %define %%KP            %1      ; [in] pointer to expanded keys
 %define %%GHASH         %2      ; [out] ghash output
-%define %%T0H           %3      ; [clobbered] temporary ZMM
-%define %%T0L           %4      ; [clobbered] temporary ZMM
-%define %%T0M1          %5      ; [clobbered] temporary ZMM
-%define %%T0M2          %6      ; [clobbered] temporary ZMM
-%define %%T1H           %7      ; [clobbered] temporary ZMM
-%define %%T1L           %8      ; [clobbered] temporary ZMM
-%define %%T1M1          %9      ; [clobbered] temporary ZMM
-%define %%T1M2          %10     ; [clobbered] temporary ZMM
-%define %%HK            %11     ; [clobbered] temporary ZMM
-%define %%AAD_HASH_IN   %12     ; [in] input hash value
-%define %%CIPHER_IN0    %13     ; [in] ZMM with cipher text blocks 0-3
-%define %%CIPHER_IN1    %14     ; [in] ZMM with cipher text blocks 4-7
-%define %%CIPHER_IN2    %15     ; [in] ZMM with cipher text blocks 8-11
-%define %%CIPHER_IN3    %16     ; [in] ZMM with cipher text blocks 12-15
-%define %%NUM_BLOCKS    %17     ; [in] numerical value, number of blocks
-%define %%GH            %18     ; [in] ZMM with hi product part
-%define %%GM            %19     ; [in] ZMM with mid product part
+%define %%THH1          %3      ; [clobbered] temporary ZMM
+%define %%THL1          %4      ; [clobbered] temporary ZMM
+%define %%TLH1          %5      ; [clobbered] temporary ZMM
+%define %%TLL1          %6      ; [clobbered] temporary ZMM
+%define %%THH2          %7      ; [clobbered] temporary ZMM
+%define %%THL2          %8      ; [clobbered] temporary ZMM
+%define %%TLH2          %9      ; [clobbered] temporary ZMM
+%define %%TLL2          %10     ; [clobbered] temporary ZMM
+%define %%HK1           %11     ; [clobbered] temporary ZMM
+%define %%HK2           %12     ; [clobbered] temporary ZMM
+%define %%AAD_HASH_IN   %13     ; [in] input hash value
+%define %%CIPHER_IN0    %14     ; [in] ZMM with cipher text blocks 0-3
+%define %%CIPHER_IN1    %15     ; [in] ZMM with cipher text blocks 4-7
+%define %%CIPHER_IN2    %16     ; [in] ZMM with cipher text blocks 8-11
+%define %%CIPHER_IN3    %17     ; [in] ZMM with cipher text blocks 12-15
+%define %%NUM_BLOCKS    %18     ; [in] numerical value, number of blocks
+%define %%GH            %19     ; [in] ZMM with hi product part
 %define %%GL            %20     ; [in] ZMM with lo product part
 
 %assign hashk           HashKey_ %+ %%NUM_BLOCKS
 
-%if %0 == 17
+%if %0 == 18
         vpxorq          %%CIPHER_IN0, %%CIPHER_IN0, %%AAD_HASH_IN
 %endif
 
 %if %%NUM_BLOCKS == 16
-
-        vmovdqu64       %%HK, [%%KP + hashk]
-        vpclmulqdq      %%T0H,  %%CIPHER_IN0, %%HK, 0x11  ; H = a1*b1
-        vpclmulqdq      %%T0L,  %%CIPHER_IN0, %%HK, 0x00  ; L = a0*b0
-        vpclmulqdq      %%T0M1, %%CIPHER_IN0, %%HK, 0x01  ; M1 = a1*b0
-        vpclmulqdq      %%T0M2, %%CIPHER_IN0, %%HK, 0x10  ; M2 = a0*b1
-        vmovdqu64       %%HK, [%%KP + hashk + (1*64)]
-        vpclmulqdq      %%T1H,  %%CIPHER_IN1, %%HK, 0x11  ; H = a1*b1
-        vpclmulqdq      %%T1L,  %%CIPHER_IN1, %%HK, 0x00  ; L = a0*b0
-        vpclmulqdq      %%T1M1, %%CIPHER_IN1, %%HK, 0x01  ; M1 = a1*b0
-        vpclmulqdq      %%T1M2, %%CIPHER_IN1, %%HK, 0x10  ; M2 = a0*b1
-        vmovdqu64       %%HK, [%%KP + hashk + (2*64)]
-        vpclmulqdq      %%CIPHER_IN0,  %%CIPHER_IN2, %%HK, 0x11  ; H = a1*b1
-        vpclmulqdq      %%CIPHER_IN1,  %%CIPHER_IN2, %%HK, 0x00  ; L = a0*b0
-        vpternlogq      %%T0H, %%CIPHER_IN0, %%T1H, 0x96
-        vpternlogq      %%T0L, %%CIPHER_IN1, %%T1L, 0x96
-        vpclmulqdq      %%CIPHER_IN0, %%CIPHER_IN2, %%HK, 0x01  ; M1 = a1*b0
-        vpclmulqdq      %%CIPHER_IN1, %%CIPHER_IN2, %%HK, 0x10  ; M2 = a0*b1
-        vpternlogq      %%T0M1, %%CIPHER_IN0, %%T1M1, 0x96
-        vpternlogq      %%T0M2, %%CIPHER_IN1, %%T1M2, 0x96
-        vmovdqu64       %%HK, [%%KP + hashk + (3*64)]
-        vpclmulqdq      %%T1H,  %%CIPHER_IN3, %%HK, 0x11  ; H = a1*b1
-        vpclmulqdq      %%T1L,  %%CIPHER_IN3, %%HK, 0x00  ; L = a0*b0
-        vpclmulqdq      %%T1M1, %%CIPHER_IN3, %%HK, 0x01  ; M1 = a1*b0
-        vpclmulqdq      %%T1M2, %%CIPHER_IN3, %%HK, 0x10  ; M2 = a0*b1
-        vpxorq          %%T1H, %%T0H, %%T1H
-        vpxorq          %%T1L, %%T0L, %%T1L
-        vpxorq          %%T1M1, %%T0M1, %%T1M1
-        vpxorq          %%T1M2, %%T0M2, %%T1M2
+        vmovdqu64       %%HK1, [%%KP + hashk]
+        vmovdqu64       %%HK2, [%%KP + hashk + HKeyGap]
+        vpclmulqdq      %%TLL1, %%CIPHER_IN0, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%TLH1, %%CIPHER_IN0, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%THL1, %%CIPHER_IN0, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%THH1, %%CIPHER_IN0, %%HK1, 0x11 ; THH = MH*HH
+
+        vmovdqu64       %%HK1, [%%KP + hashk + (1*64)]
+        vmovdqu64       %%HK2, [%%KP + hashk + (1*64) + HKeyGap]
+        vpclmulqdq      %%TLL2, %%CIPHER_IN1, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%TLH2, %%CIPHER_IN1, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%THL2, %%CIPHER_IN1, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%THH2, %%CIPHER_IN1, %%HK1, 0x11 ; THH = MH*HH
+
+        vmovdqu64       %%HK1, [%%KP + hashk + (2*64)]
+        vmovdqu64       %%HK2, [%%KP + hashk + (2*64) + HKeyGap]
+        vpclmulqdq      %%CIPHER_IN0, %%CIPHER_IN2, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%CIPHER_IN1, %%CIPHER_IN2, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%HK2, %%CIPHER_IN2, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%HK1, %%CIPHER_IN2, %%HK1, 0x11 ; THH = MH*HH
+
+        ;; add sums so far
+        vpternlogq      %%TLL1, %%TLL2, %%CIPHER_IN0, 0x96
+        vpternlogq      %%TLH1, %%TLH2, %%CIPHER_IN1, 0x96
+        vpternlogq      %%THL1, %%THL2, %%HK2, 0x96
+        vpternlogq      %%THH1, %%THH2, %%HK1, 0x96
+
+        ;; the last multiply
+        vmovdqu64       %%HK1, [%%KP + hashk + (3*64)]
+        vmovdqu64       %%HK2, [%%KP + hashk + (3*64) + HKeyGap]
+        vpclmulqdq      %%TLL2, %%CIPHER_IN3, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%TLH2, %%CIPHER_IN3, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%THL2, %%CIPHER_IN3, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%THH2, %%CIPHER_IN3, %%HK1, 0x11 ; THH = MH*HH
+
+        ;; get all sums into THH1:TLL1
+        vpxorq          %%TLL1, %%TLL1, %%THL1
+        vpxorq          %%THH1, %%THH1, %%TLH1
+        vpternlogq      %%TLL1, %%TLL2, %%THL2, 0x96
+        vpternlogq      %%THH1, %%THH2, %%TLH2, 0x96
 
 %elif %%NUM_BLOCKS >= 12
 
-        vmovdqu64       %%HK, [%%KP + hashk]
-        vpclmulqdq      %%T0H,  %%CIPHER_IN0, %%HK, 0x11  ; H = a1*b1
-        vpclmulqdq      %%T0L,  %%CIPHER_IN0, %%HK, 0x00  ; L = a0*b0
-        vpclmulqdq      %%T0M1, %%CIPHER_IN0, %%HK, 0x01  ; M1 = a1*b0
-        vpclmulqdq      %%T0M2, %%CIPHER_IN0, %%HK, 0x10  ; M2 = a0*b1
-        vmovdqu64       %%HK, [%%KP + hashk + (1*64)]
-        vpclmulqdq      %%T1H,  %%CIPHER_IN1, %%HK, 0x11  ; H = a1*b1
-        vpclmulqdq      %%T1L,  %%CIPHER_IN1, %%HK, 0x00  ; L = a0*b0
-        vpclmulqdq      %%T1M1, %%CIPHER_IN1, %%HK, 0x01  ; M1 = a1*b0
-        vpclmulqdq      %%T1M2, %%CIPHER_IN1, %%HK, 0x10  ; M2 = a0*b1
-        vmovdqu64       %%HK, [%%KP + hashk + (2*64)]
-        vpclmulqdq      %%CIPHER_IN0,  %%CIPHER_IN2, %%HK, 0x11  ; H = a1*b1
-        vpclmulqdq      %%CIPHER_IN1,  %%CIPHER_IN2, %%HK, 0x00  ; L = a0*b0
-        vpternlogq      %%T1H, %%CIPHER_IN0, %%T0H, 0x96
-        vpternlogq      %%T1L, %%CIPHER_IN1, %%T0L, 0x96
-        vpclmulqdq      %%CIPHER_IN0, %%CIPHER_IN2, %%HK, 0x01  ; M1 = a1*b0
-        vpclmulqdq      %%CIPHER_IN1, %%CIPHER_IN2, %%HK, 0x10  ; M2 = a0*b1
-        vpternlogq      %%T1M1, %%CIPHER_IN0, %%T0M1, 0x96
-        vpternlogq      %%T1M2, %%CIPHER_IN1, %%T0M2, 0x96
+        vmovdqu64       %%HK1, [%%KP + hashk]
+        vmovdqu64       %%HK2, [%%KP + hashk + HKeyGap]
+        vpclmulqdq      %%TLL1, %%CIPHER_IN0, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%TLH1, %%CIPHER_IN0, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%THL1, %%CIPHER_IN0, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%THH1, %%CIPHER_IN0, %%HK1, 0x11 ; THH = MH*HH
+
+        vmovdqu64       %%HK1, [%%KP + hashk + (1*64)]
+        vmovdqu64       %%HK2, [%%KP + hashk + (1*64) + HKeyGap]
+        vpclmulqdq      %%TLL2, %%CIPHER_IN1, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%TLH2, %%CIPHER_IN1, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%THL2, %%CIPHER_IN1, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%THH2, %%CIPHER_IN1, %%HK1, 0x11 ; THH = MH*HH
+
+        vmovdqu64       %%HK1, [%%KP + hashk + (2*64)]
+        vmovdqu64       %%HK2, [%%KP + hashk + (2*64) + HKeyGap]
+        vpclmulqdq      %%CIPHER_IN0, %%CIPHER_IN2, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%CIPHER_IN1, %%CIPHER_IN2, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%HK2, %%CIPHER_IN2, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%HK1, %%CIPHER_IN2, %%HK1, 0x11 ; THH = MH*HH
+
+        ;; add sums into THH1:TLL1
+        vpternlogq      %%TLL1, %%TLL2, %%CIPHER_IN0, 0x96
+        vpternlogq      %%TLH1, %%TLH2, %%CIPHER_IN1, 0x96
+        vpternlogq      %%THL1, %%THL2, %%HK2, 0x96
+        vpternlogq      %%THH1, %%THH2, %%HK1, 0x96
+        vpxorq          %%TLL1, %%TLL1, %%THL1
+        vpxorq          %%THH1, %%THH1, %%TLH1
 
 %elif %%NUM_BLOCKS >= 8
 
-        vmovdqu64       %%HK, [%%KP + hashk]
-        vpclmulqdq      %%T0H,  %%CIPHER_IN0, %%HK, 0x11  ; H = a1*b1
-        vpclmulqdq      %%T0L,  %%CIPHER_IN0, %%HK, 0x00  ; L = a0*b0
-        vpclmulqdq      %%T0M1, %%CIPHER_IN0, %%HK, 0x01  ; M1 = a1*b0
-        vpclmulqdq      %%T0M2, %%CIPHER_IN0, %%HK, 0x10  ; M2 = a0*b1
-        vmovdqu64       %%HK, [%%KP + hashk + (1*64)]
-        vpclmulqdq      %%T1H,  %%CIPHER_IN1, %%HK, 0x11  ; H = a1*b1
-        vpclmulqdq      %%T1L,  %%CIPHER_IN1, %%HK, 0x00  ; L = a0*b0
-        vpclmulqdq      %%T1M1, %%CIPHER_IN1, %%HK, 0x01  ; M1 = a1*b0
-        vpclmulqdq      %%T1M2, %%CIPHER_IN1, %%HK, 0x10  ; M2 = a0*b1
-        vpxorq          %%T1H, %%T0H, %%T1H
-        vpxorq          %%T1L, %%T0L, %%T1L
-        vpxorq          %%T1M1, %%T0M1, %%T1M1
-        vpxorq          %%T1M2, %%T0M2, %%T1M2
+        vmovdqu64       %%HK1, [%%KP + hashk]
+        vmovdqu64       %%HK2, [%%KP + hashk + HKeyGap]
+        vpclmulqdq      %%TLL1, %%CIPHER_IN0, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%TLH1, %%CIPHER_IN0, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%THL1, %%CIPHER_IN0, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%THH1, %%CIPHER_IN0, %%HK1, 0x11 ; THH = MH*HH
+
+        vmovdqu64       %%HK1, [%%KP + hashk + (1*64)]
+        vmovdqu64       %%HK2, [%%KP + hashk + (1*64) + HKeyGap]
+        vpclmulqdq      %%TLL2, %%CIPHER_IN1, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%TLH2, %%CIPHER_IN1, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%THL2, %%CIPHER_IN1, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%THH2, %%CIPHER_IN1, %%HK1, 0x11 ; THH = MH*HH
+
+        ;; add sums into THH1:TLL1
+        vpxorq          %%TLL1, %%TLL1, %%THL1
+        vpxorq          %%THH1, %%THH1, %%TLH1
+        vpternlogq      %%TLL1, %%TLL2, %%THL2, 0x96
+        vpternlogq      %%THH1, %%THH2, %%TLH2, 0x96
 
 %elif %%NUM_BLOCKS >= 4
 
-        vmovdqu64       %%HK, [%%KP + hashk]
-        vpclmulqdq      %%T1H,  %%CIPHER_IN0, %%HK, 0x11  ; H = a1*b1
-        vpclmulqdq      %%T1L,  %%CIPHER_IN0, %%HK, 0x00  ; L = a0*b0
-        vpclmulqdq      %%T1M1, %%CIPHER_IN0, %%HK, 0x01  ; M1 = a1*b0
-        vpclmulqdq      %%T1M2, %%CIPHER_IN0, %%HK, 0x10  ; M2 = a0*b1
+        vmovdqu64       %%HK1, [%%KP + hashk]
+        vmovdqu64       %%HK2, [%%KP + hashk + HKeyGap]
+        vpclmulqdq      %%TLL1, %%CIPHER_IN0, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%TLH1, %%CIPHER_IN0, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%THL1, %%CIPHER_IN0, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%THH1, %%CIPHER_IN0, %%HK1, 0x11 ; THH = MH*HH
 
+        ;; add sums into THH1:TLL1
+        vpxorq          %%TLL1, %%TLL1, %%THL1
+        vpxorq          %%THH1, %%THH1, %%TLH1
 %endif
 
         ;; T1H/L/M1/M2 - hold current product sums (provided %%NUM_BLOCKS >= 4)
@@ -492,100 +515,70 @@
 %xdefine %%REG_IN %%CIPHER_IN %+ reg_idx
 
 %if blocks_left == 1
-        vmovdqu64       XWORD(%%HK), [%%KP + hashk]
-        vpclmulqdq      XWORD(%%T0M1), XWORD(%%REG_IN), XWORD(%%HK), 0x01     ; M1 = a1*b0
-        vpclmulqdq      XWORD(%%T0M2), XWORD(%%REG_IN), XWORD(%%HK), 0x10     ; M2 = a0*b1
-        vpclmulqdq      XWORD(%%T0H), XWORD(%%REG_IN), XWORD(%%HK), 0x11      ; H = a1*b1
-        vpclmulqdq      XWORD(%%T0L), XWORD(%%REG_IN), XWORD(%%HK), 0x00      ; L = a0*b0
+        vmovdqu64       XWORD(%%HK1), [%%KP + hashk]
+        vmovdqu64       XWORD(%%HK2), [%%KP + hashk + HKeyGap]
+        vpclmulqdq      XWORD(%%TLL2), XWORD(%%REG_IN), XWORD(%%HK2), 0x00 ; TLL = ML*KL
+        vpclmulqdq      XWORD(%%TLH2), XWORD(%%REG_IN), XWORD(%%HK2), 0x10 ; TLH = ML*KH
+        vpclmulqdq      XWORD(%%THL2), XWORD(%%REG_IN), XWORD(%%HK1), 0x01 ; THL = MH*HL
+        vpclmulqdq      XWORD(%%THH2), XWORD(%%REG_IN), XWORD(%%HK1), 0x11 ; THH = MH*HH
 %elif blocks_left == 2
-        vmovdqu64       YWORD(%%HK), [%%KP + hashk]
-        vpclmulqdq      YWORD(%%T0M1), YWORD(%%REG_IN), YWORD(%%HK), 0x01     ; M1 = a1*b0
-        vpclmulqdq      YWORD(%%T0M2), YWORD(%%REG_IN), YWORD(%%HK), 0x10     ; M2 = a0*b1
-        vpclmulqdq      YWORD(%%T0H), YWORD(%%REG_IN), YWORD(%%HK), 0x11      ; H = a1*b1
-        vpclmulqdq      YWORD(%%T0L), YWORD(%%REG_IN), YWORD(%%HK), 0x00      ; L = a0*b0
+        vmovdqu64       YWORD(%%HK1), [%%KP + hashk]
+        vmovdqu64       YWORD(%%HK2), [%%KP + hashk + HKeyGap]
+        vpclmulqdq      YWORD(%%TLL2), YWORD(%%REG_IN), YWORD(%%HK2), 0x00 ; TLL = ML*KL
+        vpclmulqdq      YWORD(%%TLH2), YWORD(%%REG_IN), YWORD(%%HK2), 0x10 ; TLH = ML*KH
+        vpclmulqdq      YWORD(%%THL2), YWORD(%%REG_IN), YWORD(%%HK1), 0x01 ; THL = MH*HL
+        vpclmulqdq      YWORD(%%THH2), YWORD(%%REG_IN), YWORD(%%HK1), 0x11 ; THH = MH*HH
 %else ; blocks_left == 3
-        vmovdqu64       YWORD(%%HK), [%%KP + hashk]
-        vinserti64x2    %%HK, [%%KP + hashk + 32], 2
-        vpclmulqdq      %%T0M1, %%REG_IN, %%HK, 0x01     ; M1 = a1*b0
-        vpclmulqdq      %%T0M2, %%REG_IN, %%HK, 0x10     ; M2 = a0*b1
-        vpclmulqdq      %%T0H, %%REG_IN, %%HK, 0x11      ; H = a1*b1
-        vpclmulqdq      %%T0L, %%REG_IN, %%HK, 0x00      ; L = a0*b0
+        vmovdqu64       YWORD(%%HK1), [%%KP + hashk]
+        vmovdqu64       YWORD(%%HK2), [%%KP + hashk + HKeyGap]
+        vinserti64x2    %%HK1, [%%KP + hashk + 32], 2
+        vinserti64x2    %%HK2, [%%KP + hashk + HKeyGap + 32], 2
+        vpclmulqdq      %%TLL2, %%REG_IN, %%HK2, 0x00 ; TLL = ML*KL
+        vpclmulqdq      %%TLH2, %%REG_IN, %%HK2, 0x10 ; TLH = ML*KH
+        vpclmulqdq      %%THL2, %%REG_IN, %%HK1, 0x01 ; THL = MH*HL
+        vpclmulqdq      %%THH2, %%REG_IN, %%HK1, 0x11 ; THH = MH*HH
 %endif ; blocks_left
 
-%undef %%REG_IN
-
-%if %0 == 20
-        ;; *** GH/GM/GL passed as arguments
-%if %%NUM_BLOCKS >= 4
-        ;; add ghash product sums from the first 4, 8 or 12 blocks
-        vpxorq          %%T0M1, %%T0M1, %%T1M1
-        vpternlogq      %%T0M2, %%GM, %%T1M2, 0x96
-        vpternlogq      %%T0H, %%GH, %%T1H, 0x96
-        vpternlogq      %%T0L, %%GL, %%T1L, 0x96
-%else
-        vpxorq          %%T0M1, %%T0M1, %%GM
-        vpxorq          %%T0H, %%T0H, %%GH
-        vpxorq          %%T0L, %%T0L, %%GL
-%endif ;; %%NUM_BLOCKS >= 4
-%else
-        ;; *** GH/GM/GL NOT passed as arguments
-%if %%NUM_BLOCKS >= 4
-        ;; add ghash product sums from the first 4, 8 or 12 blocks
-        vpxorq          %%T0M1, %%T0M1, %%T1M1
-        vpxorq          %%T0M2, %%T0M2, %%T1M2
-        vpxorq          %%T0H, %%T0H, %%T1H
-        vpxorq          %%T0L, %%T0L, %%T1L
-%endif ;; %%NUM_BLOCKS >= 4
-%endif ;; %0 == 20
-
-        ;; integrate TM into TH and TL
-        vpxorq          %%T0M1, %%T0M1, %%T0M2
-        vpsrldq         %%T1M1, %%T0M1, 8
-        vpslldq         %%T1M2, %%T0M1, 8
-        vpxorq          %%T0H, %%T0H, %%T1M1
-        vpxorq          %%T0L, %%T0L, %%T1M2
+        ;; add sums into THH1:TLL1
+%if %%NUM_BLOCKS > 4
+        vpternlogq      %%TLL1, %%TLL2, %%THL2, 0x96
+        vpternlogq      %%THH1, %%THH2, %%TLH2, 0x96
 %else
-        ;; =====================================================
-        ;; number of blocks is 4, 8, 12 or 16
-        ;; T1H/L/M1/M2 include product sums not T0H/L/M1/M2
-%if %0 == 20
-        ;; *** GH/GM/GL passed as arguments
-        vpxorq          %%T1M1, %%T1M1, %%GM
-        vpxorq          %%T1H, %%T1H, %%GH
-        vpxorq          %%T1L, %%T1L, %%GL
-%endif
-        ;; integrate TM into TH and TL
-        vpxorq          %%T1M1, %%T1M1, %%T1M2
-        vpsrldq         %%T0M1, %%T1M1, 8
-        vpslldq         %%T0M2, %%T1M1, 8
-        vpxorq          %%T0H, %%T1H, %%T0M1
-        vpxorq          %%T0L, %%T1L, %%T0M2
+        vpxorq          %%TLL1, %%TLL2, %%THL2
+        vpxorq          %%THH1, %%THH2, %%TLH2
+%endif
+
+%undef %%REG_IN
 %endif ; blocks_left > 0
 
-        ;; add TH and TL 128-bit words horizontally
 %if %0 == 20
-        ;; *** GH/GM/GL passed as arguments
-        ;; always do horizontal xor on 4 blocks
-        VHPXORI4x128    %%T0H, %%T1M1
-        VHPXORI4x128    %%T0L, %%T1M2
+        ;; *** GH/GL passed as arguments
+        vpxorq          %%TLL1, %%TLL1, %%GL
+        vpxorq          %%THH1, %%THH1, %%GH
+        ;; new reduction
+        vpclmulqdq      ZWORD(%%GHASH), %%TLL1, [rel POLY], 0x10
+        vpshufd         %%TLH1, %%TLL1, 01001110b
+        vpternlogq      ZWORD(%%GHASH), %%THH1, %%TLH1, 0x96
+        VHPXORI4x128    ZWORD(%%GHASH), %%TLH1
 %else
-        ;; *** GH/GM/GL NOT passed as arguments
-        ;; - figure out size of horizontal xor
+        ;; new reduction
 %if %%NUM_BLOCKS == 1
-        ;; do nothing
+        vpclmulqdq      XWORD(%%GHASH), XWORD(%%TLL1), [rel POLY], 0x10
+        vpshufd         XWORD(%%TLH1),  XWORD(%%TLL1), 01001110b
+        vpternlogq      XWORD(%%GHASH), XWORD(%%THH1), XWORD(%%TLH1), 0x96
 %elif %%NUM_BLOCKS == 2
-        VHPXORI2x128    %%T0H, %%T1M1
-        VHPXORI2x128    %%T0L, %%T1M2
+        vpclmulqdq      YWORD(%%GHASH), YWORD(%%TLL1), [rel POLY], 0x10
+        vpshufd         YWORD(%%TLH1),  YWORD(%%TLL1), 01001110b
+        vpternlogq      YWORD(%%GHASH), YWORD(%%THH1), YWORD(%%TLH1), 0x96
+        VHPXORI2x128    YWORD(%%GHASH), YWORD(%%TLH1)
 %else
-        VHPXORI4x128    %%T0H, %%T1M1
-        VHPXORI4x128    %%T0L, %%T1M2
-%endif
+        vpclmulqdq      ZWORD(%%GHASH), %%TLL1, [rel POLY], 0x10
+        vpshufd         %%TLH1, %%TLL1, 01001110b
+        vpternlogq      ZWORD(%%GHASH), %%THH1, %%TLH1, 0x96
+        VHPXORI4x128    ZWORD(%%GHASH), %%TLH1
 %endif
+%endif ;; GH/GL passed as arguments
 
-        ;; reduction
-        vmovdqa64       XWORD(%%HK), [rel POLY2]
-        VCLMUL_REDUCE   XWORD(%%GHASH), XWORD(%%HK), \
-                        XWORD(%%T0H), XWORD(%%T0L), XWORD(%%T0M1), XWORD(%%T0M2)
 %endmacro
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -783,23 +776,23 @@
         cmp             %%T2, (48*16)
         jb              %%_exit_AAD_loop48x16
 
-        GHASH_16        start, %%ZT5, %%ZT6, %%ZT7, \
+        GHASH_16        start, %%ZT5, %%ZT6, \
                         %%T1,  (0*64), 0, \
                         %%GDATA_KEY, HashKey_48, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%SHFMSK
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
-        GHASH_16        mid, %%ZT5, %%ZT6, %%ZT7, \
+        GHASH_16        mid, %%ZT5, %%ZT6, \
                         %%T1,  (4*64), 0, \
                         %%GDATA_KEY, HashKey_32, 0, NO_HASH_IN_OUT, \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%SHFMSK
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
-        GHASH_16        end_reduce, %%ZT5, %%ZT6, %%ZT7, \
+        GHASH_16        end_reduce, %%ZT5, %%ZT6, \
                         %%T1,  (8*64), 0, \
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%SHFMSK
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
         sub             %%T2, (12*64)
         je              %%_CALC_AAD_done
@@ -823,34 +816,34 @@
         add             %%T3, HashKey_1 + 16
 
         ; Get next 16 blocks
-        GHASH_16        start, %%ZT5, %%ZT6, %%ZT7, \
+        GHASH_16        start, %%ZT5, %%ZT6, \
                         %%T1,  (0*64), 0, \
                         %%GDATA_KEY, %%T3, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%SHFMSK
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
-        GHASH_16        mid, %%ZT5, %%ZT6, %%ZT7, \
+        GHASH_16        mid, %%ZT5, %%ZT6, \
                         %%T1,  (4*64), 0, \
                         %%GDATA_KEY, {%%T3 + 16*16}, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%SHFMSK
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
         sub             %%T2, (32*16)
         add             %%T1, (32*16)
         jmp             %%_less_than_16x16_remain
 
 %%_equal_32x16:
-        GHASH_16        start, %%ZT5, %%ZT6, %%ZT7, \
+        GHASH_16        start, %%ZT5, %%ZT6, \
                         %%T1,  (0*64), 0, \
                         %%GDATA_KEY, HashKey_32, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%SHFMSK
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
-        GHASH_16        end_reduce, %%ZT5, %%ZT6, %%ZT7, \
+        GHASH_16        end_reduce, %%ZT5, %%ZT6, \
                         %%T1,  (4*64), 0, \
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%SHFMSK
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
         jmp             %%_CALC_AAD_done
 
 %%_less_than_32x16:
@@ -860,26 +853,26 @@
         neg             %%T3
         add             %%T3, HashKey_1 + 16
 
-        GHASH_16        start, %%ZT5, %%ZT6, %%ZT7, \
+        GHASH_16        start, %%ZT5, %%ZT6, \
                         %%T1,  (0*64), 0, \
                         %%GDATA_KEY, %%T3, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%SHFMSK
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
         sub             %%T2, (16*16)
         add             %%T1, (16*16)
         jmp             %%_less_than_16x16_remain
 
 %%_equal_16x16:
-        GHASH_16        start_reduce, %%ZT5, %%ZT6, %%ZT7, \
+        GHASH_16        start_reduce, %%ZT5, %%ZT6, \
                         %%T1,  (0*64), 0, \
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%SHFMSK
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
         jmp             %%_CALC_AAD_done
 
         ; Less than 16x16 bytes remaining
 %%_less_than_16x16_remain:
-        ;; ZT5 (H), ZT6 (M), ZT7 (L) contain ghash sums
+        ;; ZT5 (H), ZT6 (L) contain ghash sums
         ;; prep mask source address
         lea             %%T3, [rel byte64_len_to_mask_table]
         lea             %%T3, [%%T3 + %%T2*8]
@@ -946,9 +939,9 @@
 
         GHASH_1_TO_16 %%GDATA_KEY, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
-                        %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
+                        %%ZT9, %%ZT10, %%ZT11, %%ZT12, %%ZT7, \
                         ZWORD(%%AAD_HASH), %%ZT14, %%ZT15, %%ZT16, %%ZT17, I, \
-                        %%ZT5, %%ZT6, %%ZT7
+                        %%ZT5, %%ZT6
         jmp             %%_CALC_AAD_done
 
 %assign I (I - 1)
@@ -1030,7 +1023,7 @@
 
         GHASH_1_TO_16 %%GDATA_KEY, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT5, %%ZT6, %%ZT7, %%ZT8, \
-                        %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
+                        %%ZT9, %%ZT10, %%ZT11, %%ZT12, %%ZT13, \
                         ZWORD(%%AAD_HASH), %%ZT1, %%ZT2, %%ZT3, %%ZT4, I
 %if I > 1
         ;; fall through to CALC_AAD_done in 1 block case
@@ -1351,7 +1344,7 @@
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;; Computes GHASH on 1 to 16 blocks
-%macro INITIAL_BLOCKS_PARTIAL_GHASH 22-25
+%macro INITIAL_BLOCKS_PARTIAL_GHASH 23-25
 %define %%GDATA_KEY             %1  ; [in] key pointer
 %define %%GDATA_CTX             %2  ; [in] context pointer
 %define %%LENGTH                %3  ; [in/clobbered] length in bytes
@@ -1374,8 +1367,8 @@
 %define %%ZT6                   %20 ; [clobbered] ZMM temporary
 %define %%ZT7                   %21 ; [clobbered] ZMM temporary
 %define %%ZT8                   %22 ; [clobbered] ZMM temporary
-%define %%GH                    %23 ; [in] ZMM with hi product part
-%define %%GM                    %24 ; [in] ZMM with mid prodcut part
+%define %%ZT9                   %23 ; [clobbered] ZMM temporary
+%define %%GH                    %24 ; [in] ZMM with hi product part
 %define %%GL                    %25 ; [in] ZMM with lo product part
 
 %ifidn %%INSTANCE_TYPE, single_call
@@ -1384,18 +1377,18 @@
         ;;; - hash all data including partial block
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%if %0 == 22
+%if %0 == 23
         ;; start GHASH compute
         GHASH_1_TO_16 %%GDATA_KEY, %%HASH_IN_OUT, \
                         %%ZT0, %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
-                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, ZWORD(%%HASH_IN_OUT), \
+                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, %%ZT9, ZWORD(%%HASH_IN_OUT), \
                         %%DAT0, %%DAT1, %%DAT2, %%DAT3, %%NUM_BLOCKS
 %elif %0 == 25
         ;; continue GHASH compute
         GHASH_1_TO_16 %%GDATA_KEY, %%HASH_IN_OUT, \
                         %%ZT0, %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
-                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, ZWORD(%%HASH_IN_OUT), \
-                        %%DAT0, %%DAT1, %%DAT2, %%DAT3, %%NUM_BLOCKS, %%GH, %%GM, %%GL
+                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, %%ZT9, ZWORD(%%HASH_IN_OUT), \
+                        %%DAT0, %%DAT1, %%DAT2, %%DAT3, %%NUM_BLOCKS, %%GH, %%GL
 %endif
 
 %else
@@ -1424,18 +1417,18 @@
         mov     qword [%%GDATA_CTX + PBlockLen], 0
 
         ;; Hash all of the data
-%if %0 == 22
+%if %0 == 23
         ;; start GHASH compute
         GHASH_1_TO_16 %%GDATA_KEY, %%HASH_IN_OUT, \
                         %%ZT0, %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
-                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, ZWORD(%%HASH_IN_OUT), \
+                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, %%ZT9, ZWORD(%%HASH_IN_OUT), \
                         %%DAT0, %%DAT1, %%DAT2, %%DAT3, %%NUM_BLOCKS
 %elif %0 == 25
         ;; continue GHASH compute
         GHASH_1_TO_16 %%GDATA_KEY, %%HASH_IN_OUT, \
                         %%ZT0, %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
-                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, ZWORD(%%HASH_IN_OUT), \
-                        %%DAT0, %%DAT1, %%DAT2, %%DAT3, %%NUM_BLOCKS, %%GH, %%GM, %%GL
+                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, %%ZT9, ZWORD(%%HASH_IN_OUT), \
+                        %%DAT0, %%DAT1, %%DAT2, %%DAT3, %%NUM_BLOCKS, %%GH, %%GL
 %endif
         jmp             %%_small_initial_compute_done
 %endif                          ; %if %%NUM_BLOCKS < 16
@@ -1460,38 +1453,28 @@
 %if (%%NUM_BLOCKS > last_block_to_hash)
 
         ;; ZT12-ZT20 - temporary registers
-%if %0 == 22
+%if %0 == 23
         ;; start GHASH compute
         GHASH_1_TO_16 %%GDATA_KEY, %%HASH_IN_OUT, \
                         %%ZT0, %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
-                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, ZWORD(%%HASH_IN_OUT), \
+                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, %%ZT9, ZWORD(%%HASH_IN_OUT), \
                         %%DAT0, %%DAT1, %%DAT2, %%DAT3, k
 %elif %0 == 25
         ;; continue GHASH compute
         GHASH_1_TO_16 %%GDATA_KEY, %%HASH_IN_OUT, \
                         %%ZT0, %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
-                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, ZWORD(%%HASH_IN_OUT), \
-                        %%DAT0, %%DAT1, %%DAT2, %%DAT3, k, %%GH, %%GM, %%GL
+                        %%ZT5, %%ZT6, %%ZT7, %%ZT8, %%ZT9, ZWORD(%%HASH_IN_OUT), \
+                        %%DAT0, %%DAT1, %%DAT2, %%DAT3, k, %%GH, %%GL
 %endif
         ;; just fall through no jmp needed
 %else
 
 %if %0 == 25
         ;; Reduction is required in this case.
-        ;; Integrate GM into GH and GL.
-        vpsrldq         %%ZT0, %%GM, 8
-        vpslldq         %%ZT1, %%GM, 8
-        vpxorq          %%GH, %%GH, %%ZT0
-        vpxorq          %%GL, %%GL, %%ZT1
-
-        ;; Add GH and GL 128-bit words horizontally
-        VHPXORI4x128    %%GH, %%ZT0
-        VHPXORI4x128    %%GL, %%ZT1
-
-        ;; 256-bit to 128-bit reduction
-        vmovdqa64       XWORD(%%ZT0), [rel POLY2]
-        VCLMUL_REDUCE   XWORD(%%HASH_IN_OUT), XWORD(%%ZT0), \
-                        XWORD(%%GH), XWORD(%%GL), XWORD(%%ZT1), XWORD(%%ZT2)
+        vpclmulqdq      ZWORD(%%HASH_IN_OUT), %%GL, [rel POLY], 0x10
+        vpshufd         %%ZT0, %%GL, 01001110b
+        vpternlogq      ZWORD(%%HASH_IN_OUT), %%ZT0, %%GH, 0x96
+        VHPXORI4x128    ZWORD(%%HASH_IN_OUT), %%ZT0
 %endif
         ;; Record that a reduction is not needed -
         ;; In this case no hashes are computed because there
@@ -1545,7 +1528,7 @@
 ;;;
 ;;; num_initial_blocks is expected to include the partial final block
 ;;; in the count.
-%macro INITIAL_BLOCKS_PARTIAL 30
+%macro INITIAL_BLOCKS_PARTIAL 31
 %define %%GDATA_KEY             %1  ; [in] key pointer
 %define %%GDATA_CTX             %2  ; [in] context pointer
 %define %%CIPH_PLAIN_OUT        %3  ; [in] text output pointer
@@ -1572,10 +1555,11 @@
 %define %%ZT2                   %24 ; [clobbered] ZMM temporary
 %define %%ZT3                   %25 ; [clobbered] ZMM temporary
 %define %%ZT4                   %26 ; [clobbered] ZMM temporary
-%define %%IA0                   %27 ; [clobbered] GP temporary
-%define %%IA1                   %28 ; [clobbered] GP temporary
-%define %%MASKREG               %29 ; [clobbered] mask register
-%define %%SHUFMASK              %30 ; [clobbered] ZMM for BE/LE shuffle mask
+%define %%ZT5                   %27 ; [clobbered] ZMM temporary
+%define %%IA0                   %28 ; [clobbered] GP temporary
+%define %%IA1                   %29 ; [clobbered] GP temporary
+%define %%MASKREG               %30 ; [clobbered] mask register
+%define %%SHUFMASK              %31 ; [clobbered] ZMM for BE/LE shuffle mask
 
         INITIAL_BLOCKS_PARTIAL_CIPHER \
                         %%GDATA_KEY, %%GDATA_CTX, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, \
@@ -1591,7 +1575,7 @@
                         %%INSTANCE_TYPE, %%DAT0, %%DAT1, %%DAT2, %%DAT3, \
                         XWORD(%%LAST_CIPHER_BLK), XWORD(%%LAST_GHASH_BLK), \
                         %%CTR0, %%CTR1, %%CTR2, %%CTR3, %%ZT0, %%ZT1, \
-                        %%ZT2, %%ZT3, %%ZT4
+                        %%ZT2, %%ZT3, %%ZT4, %%ZT5
 
 %endmacro                       ; INITIAL_BLOCKS_PARTIAL
 
@@ -1615,18 +1599,18 @@
 %define %%B04_07                %13 ; [clobbered] temporary ZMM
 %define %%B08_11                %14 ; [clobbered] temporary ZMM
 %define %%B12_15                %15 ; [clobbered] temporary ZMM
-%define %%GH1H_UNUSED           %16 ; [clobbered] temporary ZMM
-%define %%GH1L                  %17 ; [clobbered] temporary ZMM
-%define %%GH1M                  %18 ; [clobbered] temporary ZMM
-%define %%GH1T                  %19 ; [clobbered] temporary ZMM
-%define %%GH2H                  %20 ; [clobbered] temporary ZMM
-%define %%GH2L                  %21 ; [clobbered] temporary ZMM
-%define %%GH2M                  %22 ; [clobbered] temporary ZMM
-%define %%GH2T                  %23 ; [clobbered] temporary ZMM
-%define %%GH3H                  %24 ; [clobbered] temporary ZMM
-%define %%GH3L                  %25 ; [clobbered] temporary ZMM
-%define %%GH3M                  %26 ; [clobbered] temporary ZMM
-%define %%GH3T                  %27 ; [clobbered] temporary ZMM
+%define %%GHKEY3                %16 ; [clobbered] temporary ZMM
+%define %%THL1                  %17 ; [clobbered] temporary ZMM
+%define %%TLH1                  %18 ; [clobbered] temporary ZMM
+%define %%TLL1                  %19 ; [clobbered] temporary ZMM
+%define %%THH2                  %20 ; [clobbered] temporary ZMM
+%define %%THL2                  %21 ; [clobbered] temporary ZMM
+%define %%TLH2                  %22 ; [clobbered] temporary ZMM
+%define %%TLL2                  %23 ; [clobbered] temporary ZMM
+%define %%THH3                  %24 ; [clobbered] temporary ZMM
+%define %%THL3                  %25 ; [clobbered] temporary ZMM
+%define %%TLH3                  %26 ; [clobbered] temporary ZMM
+%define %%TLL3                  %27 ; [clobbered] temporary ZMM
 %define %%AESKEY1               %28 ; [clobbered] temporary ZMM
 %define %%AESKEY2               %29 ; [clobbered] temporary ZMM
 %define %%GHKEY1                %30 ; [clobbered] temporary ZMM
@@ -1634,12 +1618,12 @@
 %define %%GHDAT1                %32 ; [clobbered] temporary ZMM
 %define %%GHDAT2                %33 ; [clobbered] temporary ZMM
 %define %%ZT01                  %34 ; [clobbered] temporary ZMM
-%define %%ADDBE_4x4             %35 ; [in] ZMM with 4x128bits 4 in big-endian
-%define %%ADDBE_1234            %36 ; [in] ZMM with 4x128bits 1, 2, 3 and 4 in big-endian
-%define %%GHASH_TYPE            %37 ; [in] "start", "start_reduce", "mid", "end_reduce"
-%define %%TO_REDUCE_L           %38 ; [in] ZMM for low 4x128-bit GHASH sum
-%define %%TO_REDUCE_H           %39 ; [in] ZMM for hi 4x128-bit GHASH sum
-%define %%TO_REDUCE_M           %40 ; [in] ZMM for medium 4x128-bit GHASH sum
+%define %%GHKEY4                %35 ; [clobbered] temporary ZMM
+%define %%ADDBE_4x4             %36 ; [in] ZMM with 4x128bits 4 in big-endian
+%define %%ADDBE_1234            %37 ; [in] ZMM with 4x128bits 1, 2, 3 and 4 in big-endian
+%define %%GHASH_TYPE            %38 ; [in] "start", "start_reduce", "mid", "end_reduce"
+%define %%TO_REDUCE_L           %39 ; [in] ZMM for low 4x128-bit GHASH sum
+%define %%TO_REDUCE_H           %40 ; [in] ZMM for hi 4x128-bit GHASH sum
 %define %%ENC_DEC               %41 ; [in] cipher direction
 %define %%HASH_IN_OUT           %42 ; [in/out] XMM ghash in/out value
 %define %%IA0                   %43 ; [clobbered] GP temporary
@@ -1648,20 +1632,18 @@
 %define %%NUM_BLOCKS            %46 ; [in] numerical value with number of blocks to be encrypted/ghashed (1 to 16)
 %define %%INSTANCE_TYPE         %47 ; [in] multi_call or single_call
 
-%xdefine %%GH1H %%HASH_IN_OUT   ; this is to avoid additional move in do_reduction case
+%xdefine %%THH1 %%HASH_IN_OUT   ; this is to avoid additional move in do_reduction case
 
-%define %%LAST_GHASH_BLK  %%GH1L
-%define %%LAST_CIPHER_BLK %%GH1T
+%define %%LAST_GHASH_BLK  %%THL1
+%define %%LAST_CIPHER_BLK %%TLH1
 
-%define %%RED_POLY %%GH2T
-%define %%RED_P1   %%GH2L
-%define %%RED_T1   %%GH2H
-%define %%RED_T2   %%GH2M
+%define %%RED_T1   %%THH2
+%define %%RED_T2   %%TLL2
 
-%define %%DATA1 %%GH3H
-%define %%DATA2 %%GH3L
-%define %%DATA3 %%GH3M
-%define %%DATA4 %%GH3T
+%define %%DATA1 %%THH3
+%define %%DATA2 %%THL3
+%define %%DATA3 %%TLH3
+%define %%DATA4 %%TLL3
 
 ;; do reduction after the 16 blocks ?
 %assign do_reduction 0
@@ -1738,6 +1720,7 @@
         vmovdqa64       %%GHDAT1, [rsp + %%GHASHIN_BLK_OFFSET + (0*64)]
 %endif
         vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (0*64)]
+        vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (0*64) + HKeyGap]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; save counter for the next round
@@ -1758,7 +1741,8 @@
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; pre-load constants
         vbroadcastf64x2 %%AESKEY2, [%%GDATA + (16 * 1)]
-        vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (1*64)]
+        vmovdqu64       %%GHKEY3, [%%GDATA + %%HASHKEY_OFFSET + (1*64)]
+        vmovdqu64       %%GHKEY4, [%%GDATA + %%HASHKEY_OFFSET + (1*64) + HKeyGap]
         vmovdqa64       %%GHDAT2, [rsp + %%GHASHIN_BLK_OFFSET + (1*64)]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -1775,12 +1759,13 @@
 
         ;;==================================================
         ;; GHASH 4 blocks (15 to 12)
-        vpclmulqdq      %%GH1H, %%GHDAT1, %%GHKEY1, 0x11     ; a1*b1
-        vpclmulqdq      %%GH1L, %%GHDAT1, %%GHKEY1, 0x00     ; a0*b0
-        vpclmulqdq      %%GH1M, %%GHDAT1, %%GHKEY1, 0x01     ; a1*b0
-        vpclmulqdq      %%GH1T, %%GHDAT1, %%GHKEY1, 0x10     ; a0*b1
+        vpclmulqdq      %%TLL1, %%GHDAT1, %%GHKEY2, 0x00     ; TLL = ML*KL
+        vpclmulqdq      %%TLH1, %%GHDAT1, %%GHKEY2, 0x10     ; TLH = ML*KH
+        vpclmulqdq      %%THL1, %%GHDAT1, %%GHKEY1, 0x01     ; THL = MH*HL
+        vpclmulqdq      %%THH1, %%GHDAT1, %%GHKEY1, 0x11     ; THH = MH*HH
 
         vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (2*64)]
+        vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (2*64) + HKeyGap]
         vmovdqa64       %%GHDAT1, [rsp + %%GHASHIN_BLK_OFFSET + (2*64)]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -1793,12 +1778,13 @@
 
         ;; =================================================
         ;; GHASH 4 blocks (11 to 8)
-        vpclmulqdq      %%GH2M, %%GHDAT2, %%GHKEY2, 0x10     ; a0*b1
-        vpclmulqdq      %%GH2T, %%GHDAT2, %%GHKEY2, 0x01     ; a1*b0
-        vpclmulqdq      %%GH2H, %%GHDAT2, %%GHKEY2, 0x11     ; a1*b1
-        vpclmulqdq      %%GH2L, %%GHDAT2, %%GHKEY2, 0x00     ; a0*b0
+        vpclmulqdq      %%TLL2, %%GHDAT2, %%GHKEY4, 0x00     ; TLL = ML*KL
+        vpclmulqdq      %%TLH2, %%GHDAT2, %%GHKEY4, 0x10     ; TLH = ML*KH
+        vpclmulqdq      %%THL2, %%GHDAT2, %%GHKEY3, 0x01     ; THL = MH*HL
+        vpclmulqdq      %%THH2, %%GHDAT2, %%GHKEY3, 0x11     ; THH = MH*HH
 
-        vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (3*64)]
+        vmovdqu64       %%GHKEY3, [%%GDATA + %%HASHKEY_OFFSET + (3*64)]
+        vmovdqu64       %%GHKEY4, [%%GDATA + %%HASHKEY_OFFSET + (3*64) + HKeyGap]
         vmovdqa64       %%GHDAT2, [rsp + %%GHASHIN_BLK_OFFSET + (3*64)]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -1811,10 +1797,10 @@
 
         ;; =================================================
         ;; GHASH 4 blocks (7 to 4)
-        vpclmulqdq      %%GH3M, %%GHDAT1, %%GHKEY1, 0x10     ; a0*b1
-        vpclmulqdq      %%GH3T, %%GHDAT1, %%GHKEY1, 0x01     ; a1*b0
-        vpclmulqdq      %%GH3H, %%GHDAT1, %%GHKEY1, 0x11     ; a1*b1
-        vpclmulqdq      %%GH3L, %%GHDAT1, %%GHKEY1, 0x00     ; a0*b0
+        vpclmulqdq      %%TLL3, %%GHDAT1, %%GHKEY2, 0x00     ; TLL = ML*KL
+        vpclmulqdq      %%TLH3, %%GHDAT1, %%GHKEY2, 0x10     ; TLH = ML*KH
+        vpclmulqdq      %%THL3, %%GHDAT1, %%GHKEY1, 0x01     ; THL = MH*HL
+        vpclmulqdq      %%THH3, %%GHDAT1, %%GHKEY1, 0x11     ; THH = MH*HH
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES rounds 3
@@ -1826,10 +1812,10 @@
 
         ;; =================================================
         ;; Gather (XOR) GHASH for 12 blocks
-        vpternlogq      %%GH1H, %%GH2H, %%GH3H, 0x96
-        vpternlogq      %%GH1L, %%GH2L, %%GH3L, 0x96
-        vpternlogq      %%GH1T, %%GH2T, %%GH3T, 0x96
-        vpternlogq      %%GH1M, %%GH2M, %%GH3M, 0x96
+        vpternlogq      %%TLL1, %%TLL2, %%TLL3, 0x96
+        vpternlogq      %%TLH1, %%TLH2, %%TLH3, 0x96
+        vpternlogq      %%THL1, %%THL2, %%THL3, 0x96
+        vpternlogq      %%THH1, %%THH2, %%THH3, 0x96
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES rounds 4
@@ -1854,10 +1840,10 @@
 
         ;; =================================================
         ;; GHASH 4 blocks (3 to 0)
-        vpclmulqdq      %%GH2M, %%GHDAT2, %%GHKEY2, 0x10     ; a0*b1
-        vpclmulqdq      %%GH2T, %%GHDAT2, %%GHKEY2, 0x01     ; a1*b0
-        vpclmulqdq      %%GH2H, %%GHDAT2, %%GHKEY2, 0x11     ; a1*b1
-        vpclmulqdq      %%GH2L, %%GHDAT2, %%GHKEY2, 0x00     ; a0*b0
+        vpclmulqdq      %%TLL2, %%GHDAT2, %%GHKEY4, 0x00     ; TLL = ML*KL
+        vpclmulqdq      %%TLH2, %%GHDAT2, %%GHKEY4, 0x10     ; TLH = ML*KH
+        vpclmulqdq      %%THL2, %%GHDAT2, %%GHKEY3, 0x01     ; THL = MH*HL
+        vpclmulqdq      %%THH2, %%GHDAT2, %%GHKEY3, 0x11     ; THH = MH*HH
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES round 6
@@ -1868,31 +1854,18 @@
         vbroadcastf64x2 %%AESKEY1, [%%GDATA + (16 * 8)]
 
         ;; =================================================
-        ;; gather GHASH in GH1L (low), GH1H (high), GH1M (mid)
-        ;; - add GH2[MTLH] to GH1[MTLH]
-        vpternlogq      %%GH1M, %%GH1T, %%GH2T, 0x96
-%if do_reduction != 0
-
+        ;; gather GHASH sums into TO_REDUCE_[HL]
 %if is_start != 0
-        vpxorq          %%GH1M, %%GH1M, %%GH2M
+        vpxorq          %%TO_REDUCE_L, %%TLL2, %%THL2
+        vpxorq          %%TO_REDUCE_H, %%THH2, %%TLH2
+        vpternlogq      %%TO_REDUCE_L, %%TLL1, %%THL1, 0x96
+        vpternlogq      %%TO_REDUCE_H, %%THH1, %%TLH1, 0x96
 %else
-        vpternlogq      %%GH1H, %%TO_REDUCE_H, %%GH2H, 0x96
-        vpternlogq      %%GH1L, %%TO_REDUCE_L, %%GH2L, 0x96
-        vpternlogq      %%GH1M, %%TO_REDUCE_M, %%GH2M, 0x96
-%endif
-
-%else
-        ;; Update H/M/L hash sums if not carrying reduction
-%if is_start != 0
-        vpxorq          %%TO_REDUCE_H, %%GH1H, %%GH2H
-        vpxorq          %%TO_REDUCE_L, %%GH1L, %%GH2L
-        vpxorq          %%TO_REDUCE_M, %%GH1M, %%GH2M
-%else
-        vpternlogq      %%TO_REDUCE_H, %%GH1H, %%GH2H, 0x96
-        vpternlogq      %%TO_REDUCE_L, %%GH1L, %%GH2L, 0x96
-        vpternlogq      %%TO_REDUCE_M, %%GH1M, %%GH2M, 0x96
-%endif
-
+        ;; not the first round so sums need to be updated
+        vpternlogq      %%TO_REDUCE_L, %%TLL2, %%THL2, 0x96
+        vpternlogq      %%TO_REDUCE_H, %%THH2, %%TLH2, 0x96
+        vpternlogq      %%TO_REDUCE_L, %%TLL1, %%THL1, 0x96
+        vpternlogq      %%TO_REDUCE_H, %%THH1, %%TLH1, 0x96
 %endif
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -1904,13 +1877,11 @@
         vbroadcastf64x2 %%AESKEY2, [%%GDATA + (16 * 9)]
 
         ;; =================================================
-        ;; prepare mid sum for adding to high & low
-        ;; load polynomial constant for reduction
+        ;; new reduction (result in THH1)
 %if do_reduction != 0
-        vpsrldq         %%GH2M, %%GH1M, 8
-        vpslldq         %%GH1M, %%GH1M, 8
-
-        vmovdqa64       XWORD(%%RED_POLY), [rel POLY2]
+        vpclmulqdq      %%THH1, %%TO_REDUCE_L, [rel POLY], 0x10
+        vpshufd         %%THL1, %%TO_REDUCE_L, 01001110b
+        vpternlogq      %%THH1, %%THL1, %%TO_REDUCE_H, 0x96
 %endif
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES round 8
@@ -1921,15 +1892,9 @@
         vbroadcastf64x2 %%AESKEY1, [%%GDATA + (16 * 10)]
 
         ;; =================================================
-        ;; Add mid product to high and low
+        ;; horizontal xor of 4 reduced hashes
 %if do_reduction != 0
-%if is_start != 0
-        vpternlogq      %%GH1H, %%GH2H, %%GH2M, 0x96    ; TH = TH1 + TH2 + TM>>64
-        vpternlogq      %%GH1L, %%GH2L, %%GH1M, 0x96    ; TL = TL1 + TL2 + TM<<64
-%else
-        vpxorq          %%GH1H, %%GH1H, %%GH2M          ; TH = TH1 + TM>>64
-        vpxorq          %%GH1L, %%GH1L, %%GH1M          ; TL = TL1 + TM<<64
-%endif
+        VHPXORI4x128    %%THH1, %%TLL1
 %endif
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES round 9
@@ -1938,23 +1903,10 @@
                         %%B00_03, %%B04_07, %%B08_11, %%B12_15, \
                         %%AESKEY2, %%AESKEY2, %%AESKEY2, %%AESKEY2
 
-        ;; =================================================
-        ;; horizontal xor of low and high 4x128
-%if do_reduction != 0
-        VHPXORI4x128    %%GH1H, %%GH2H
-        VHPXORI4x128    %%GH1L, %%GH2L
-%endif
-
 %if (NROUNDS >= 11)
         vbroadcastf64x2 %%AESKEY2, [%%GDATA + (16 * 11)]
 %endif
-        ;; =================================================
-        ;; first phase of reduction
-%if do_reduction != 0
-        vpclmulqdq      XWORD(%%RED_P1), XWORD(%%RED_POLY), XWORD(%%GH1L), 0x01
-        vpslldq         XWORD(%%RED_P1), XWORD(%%RED_P1), 8             ; shift-L 2 DWs
-        vpxorq          XWORD(%%RED_P1), XWORD(%%GH1L), XWORD(%%RED_P1) ; first phase of the reduct
-%endif
+
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES rounds up to 11 (AES192) or 13 (AES256)
         ;; AES128 is done
@@ -1985,17 +1937,6 @@
 %endif ; GCM256 / NROUNDS = 13 (15 including the first and the last)
 %endif ; GCM192 / NROUNDS = 11 (13 including the first and the last)
 
-        ;; =================================================
-        ;; second phase of the reduction
-%if do_reduction != 0
-        vpclmulqdq      XWORD(%%RED_T1), XWORD(%%RED_POLY), XWORD(%%RED_P1), 0x00
-        vpsrldq         XWORD(%%RED_T1), XWORD(%%RED_T1), 4 ; shift-R 1-DW to obtain 2-DWs shift-R
-
-        vpclmulqdq      XWORD(%%RED_T2), XWORD(%%RED_POLY), XWORD(%%RED_P1), 0x10
-        vpslldq         XWORD(%%RED_T2), XWORD(%%RED_T2), 4 ; shift-L 1-DW for result without shifts
-        ;; GH1H = GH1H + RED_T1 + RED_T2
-        vpternlogq      XWORD(%%GH1H), XWORD(%%RED_T2), XWORD(%%RED_T1), 0x96
-%endif
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; the last AES round
         ZMM_OPCODE3_DSTR_SRC1R_SRC2R_BLOCKS_0_16 %%NUM_BLOCKS, vaesenclast, \
@@ -2081,7 +2022,7 @@
 %endif
 
 %if do_reduction != 0
-        ;; GH1H holds reduced hash value
+        ;; THH1 holds reduced hash value
         ;; - normally do "vmovdqa64 XWORD(%%HASH_IN_OUT), XWORD(%%GH1H)"
         ;; - register rename trick obsoletes the above move
 %endif
@@ -2089,7 +2030,7 @@
         ;; =================================================
         ;; GHASH last N blocks
         ;; - current hash value in HASH_IN_OUT or
-        ;;   product parts in TO_REDUCE_H/M/L
+        ;;   product parts in TO_REDUCE_H/L
         ;; - DATA1-DATA4 include blocks for GHASH
 
 %if do_reduction == 0
@@ -2099,8 +2040,8 @@
                         %%INSTANCE_TYPE, %%DATA1, %%DATA2, %%DATA3, %%DATA4, \
                         XWORD(%%LAST_CIPHER_BLK), XWORD(%%LAST_GHASH_BLK), \
                         %%B00_03, %%B04_07, %%B08_11, %%B12_15, %%GHDAT1, %%GHDAT2, \
-                        %%AESKEY1, %%AESKEY2, %%GHKEY1, \
-                        %%TO_REDUCE_H, %%TO_REDUCE_M, %%TO_REDUCE_L
+                        %%AESKEY1, %%AESKEY2, %%GHKEY1, %%GHKEY2, \
+                        %%TO_REDUCE_H, %%TO_REDUCE_L
 %else
         INITIAL_BLOCKS_PARTIAL_GHASH \
                         %%GDATA, %%GCTX, %%LENGTH, \
@@ -2108,7 +2049,7 @@
                         %%INSTANCE_TYPE, %%DATA1, %%DATA2, %%DATA3, %%DATA4, \
                         XWORD(%%LAST_CIPHER_BLK), XWORD(%%LAST_GHASH_BLK), \
                         %%B00_03, %%B04_07, %%B08_11, %%B12_15, %%GHDAT1, %%GHDAT2, \
-                        %%AESKEY1, %%AESKEY2, %%GHKEY1
+                        %%AESKEY1, %%AESKEY2, %%GHKEY1, %%GHKEY2
 %endif
 %endmacro
 
@@ -2151,12 +2092,12 @@
 %define %%ZT20                  %32 ; [clobbered] temporary ZMM
 %define %%ZT21                  %33 ; [clobbered] temporary ZMM
 %define %%ZT22                  %34 ; [clobbered] temporary ZMM
-%define %%ADDBE_4x4             %35 ; [in] ZMM with 4x128bits 4 in big-endian
-%define %%ADDBE_1234            %36 ; [in] ZMM with 4x128bits 1, 2, 3 and 4 in big-endian
-%define %%GHASH_TYPE            %37 ; [in] "start", "start_reduce", "mid", "end_reduce"
-%define %%TO_REDUCE_L           %38 ; [in] ZMM for low 4x128-bit GHASH sum
-%define %%TO_REDUCE_H           %39 ; [in] ZMM for hi 4x128-bit GHASH sum
-%define %%TO_REDUCE_M           %40 ; [in] ZMM for medium 4x128-bit GHASH sum
+%define %%ZT23                  %35 ; [clobbered] temporary ZMM
+%define %%ADDBE_4x4             %36 ; [in] ZMM with 4x128bits 4 in big-endian
+%define %%ADDBE_1234            %37 ; [in] ZMM with 4x128bits 1, 2, 3 and 4 in big-endian
+%define %%GHASH_TYPE            %38 ; [in] "start", "start_reduce", "mid", "end_reduce"
+%define %%TO_REDUCE_L           %39 ; [in] ZMM for low 4x128-bit GHASH sum
+%define %%TO_REDUCE_H           %40 ; [in] ZMM for hi 4x128-bit GHASH sum
 %define %%ENC_DEC               %41 ; [in] cipher direction
 %define %%HASH_IN_OUT           %42 ; [in/out] XMM ghash in/out value
 %define %%IA0                   %43 ; [clobbered] GP temporary
@@ -2220,9 +2161,9 @@
                 %%HASHKEY_OFFSET, %%GHASHIN_BLK_OFFSET, %%SHFMSK, \
                 %%ZT00, %%ZT01, %%ZT02, %%ZT03, %%ZT04, %%ZT05, %%ZT06, %%ZT07, \
                 %%ZT08, %%ZT09, %%ZT10, %%ZT11, %%ZT12, %%ZT13, %%ZT14, %%ZT15, \
-                %%ZT16, %%ZT17, %%ZT18, %%ZT19, %%ZT20, %%ZT21, %%ZT22, \
+                %%ZT16, %%ZT17, %%ZT18, %%ZT19, %%ZT20, %%ZT21, %%ZT22, %%ZT23, \
                 %%ADDBE_4x4, %%ADDBE_1234, %%GHASH_TYPE, \
-                %%TO_REDUCE_L, %%TO_REDUCE_H, %%TO_REDUCE_M, \
+                %%TO_REDUCE_L, %%TO_REDUCE_H, \
                 %%ENC_DEC, %%HASH_IN_OUT, %%IA0, %%IA1, %%MASKREG, \
                 num_blocks, %%INSTANCE_TYPE
 
@@ -2241,9 +2182,10 @@
 %xdefine %%GHASH_TYPE start_reduce
 %endif
 
-        GHASH_16        %%GHASH_TYPE, %%TO_REDUCE_H, %%TO_REDUCE_M, %%TO_REDUCE_L, \
+        GHASH_16        %%GHASH_TYPE, %%TO_REDUCE_H, %%TO_REDUCE_L, \
                         rsp, %%GHASHIN_BLK_OFFSET, 0, %%GDATA, %%HASHKEY_OFFSET, 0, %%HASH_IN_OUT, \
-                        %%ZT00, %%ZT01, %%ZT02, %%ZT03, %%ZT04, %%ZT05, %%ZT06, %%ZT07, %%ZT08, %%ZT09
+                        %%ZT00, %%ZT01, %%ZT02, %%ZT03, %%ZT04, %%ZT05, %%ZT06, %%ZT07, \
+                        %%ZT08, %%ZT09, %%ZT23
 
 %%_last_blocks_done:
 
@@ -2255,7 +2197,7 @@
 ;;; - encrypts 16 blocks at a time
 ;;; - ghash the 16 previously encrypted ciphertext blocks
 ;;; - no partial block or multi_call handling here
-%macro  GHASH_16_ENCRYPT_16_PARALLEL 42
+%macro  GHASH_16_ENCRYPT_16_PARALLEL 41
 %define %%GDATA                 %1  ; [in] key pointer
 %define %%CIPH_PLAIN_OUT        %2  ; [in] pointer to output buffer
 %define %%PLAIN_CIPH_IN         %3  ; [in] pointer to input buffer
@@ -2293,36 +2235,30 @@
 %define %%ADDBE_1234            %35 ; [in] ZMM with 4x128bits 1, 2, 3 and 4 in big-endian
 %define %%TO_REDUCE_L           %36 ; [in/out] ZMM for low 4x128-bit GHASH sum
 %define %%TO_REDUCE_H           %37 ; [in/out] ZMM for hi 4x128-bit GHASH sum
-%define %%TO_REDUCE_M           %38 ; [in/out] ZMM for medium 4x128-bit GHASH sum
-%define %%DO_REDUCTION          %39 ; [in] "no_reduction", "final_reduction", "first_time"
-%define %%ENC_DEC               %40 ; [in] cipher direction
-%define %%DATA_DISPL            %41 ; [in] fixed numerical data displacement/offset
-%define %%GHASH_IN              %42 ; [in] current GHASH value or "no_ghash_in"
+%define %%DO_REDUCTION          %38 ; [in] "no_reduction", "final_reduction", "first_time"
+%define %%ENC_DEC               %39 ; [in] cipher direction
+%define %%DATA_DISPL            %40 ; [in] fixed numerical data displacement/offset
+%define %%GHASH_IN              %41 ; [in] current GHASH value or "no_ghash_in"
 
 %define %%B00_03 %%ZT1
 %define %%B04_07 %%ZT2
 %define %%B08_11 %%ZT3
 %define %%B12_15 %%ZT4
 
-%define %%GH1H  %%ZT5 ; @note: do not change this mapping
-%define %%GH1L  %%ZT6
-%define %%GH1M  %%ZT7
-%define %%GH1T  %%ZT8
+%define %%THH1  %%ZT5 ; @note: do not change this mapping
+%define %%THL1  %%ZT6
+%define %%TLH1  %%ZT7
+%define %%TLL1  %%ZT8
 
-%define %%GH2H  %%ZT9
-%define %%GH2L  %%ZT10
-%define %%GH2M  %%ZT11
-%define %%GH2T  %%ZT12
+%define %%THH2  %%ZT9
+%define %%THL2  %%ZT10
+%define %%TLH2  %%ZT11
+%define %%TLL2  %%ZT12
 
-%define %%RED_POLY %%GH2T
-%define %%RED_P1   %%GH2L
-%define %%RED_T1   %%GH2H
-%define %%RED_T2   %%GH2M
-
-%define %%GH3H  %%ZT13
-%define %%GH3L  %%ZT14
-%define %%GH3M  %%ZT15
-%define %%GH3T  %%ZT16
+%define %%THH3  %%ZT13
+%define %%THL3  %%ZT14
+%define %%TLH3  %%ZT15
+%define %%TLL3  %%ZT16
 
 %define %%DATA1 %%ZT13
 %define %%DATA2 %%ZT14
@@ -2369,6 +2305,7 @@
         vmovdqa64       %%GHDAT1, [rsp + %%GHASHIN_BLK_OFFSET + (0*64)]
 %endif
         vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (0*64)]
+        vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (0*64) + HKeyGap]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; save counter for the next round
@@ -2379,7 +2316,6 @@
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; pre-load constants
         vbroadcastf64x2 %%AESKEY2, [%%GDATA + (16 * 1)]
-        vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (1*64)]
         vmovdqa64       %%GHDAT2, [rsp + %%GHASHIN_BLK_OFFSET + (1*64)]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2396,12 +2332,13 @@
 
         ;;==================================================
         ;; GHASH 4 blocks (15 to 12)
-        vpclmulqdq      %%GH1H, %%GHDAT1, %%GHKEY1, 0x11     ; a1*b1
-        vpclmulqdq      %%GH1L, %%GHDAT1, %%GHKEY1, 0x00     ; a0*b0
-        vpclmulqdq      %%GH1M, %%GHDAT1, %%GHKEY1, 0x01     ; a1*b0
-        vpclmulqdq      %%GH1T, %%GHDAT1, %%GHKEY1, 0x10     ; a0*b1
+        vpclmulqdq      %%TLL1, %%GHDAT1, %%GHKEY2, 0x00     ; TLL = ML*KL
+        vpclmulqdq      %%TLH1, %%GHDAT1, %%GHKEY2, 0x10     ; TLH = ML*KH
+        vpclmulqdq      %%THL1, %%GHDAT1, %%GHKEY1, 0x01     ; THL = MH*HL
+        vpclmulqdq      %%THH1, %%GHDAT1, %%GHKEY1, 0x11     ; THH = MH*HH
 
-        vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (2*64)]
+        vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (1*64)]
+        vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (1*64) + HKeyGap]
         vmovdqa64       %%GHDAT1, [rsp + %%GHASHIN_BLK_OFFSET + (2*64)]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2414,12 +2351,13 @@
 
         ;; =================================================
         ;; GHASH 4 blocks (11 to 8)
-        vpclmulqdq      %%GH2M, %%GHDAT2, %%GHKEY2, 0x10     ; a0*b1
-        vpclmulqdq      %%GH2T, %%GHDAT2, %%GHKEY2, 0x01     ; a1*b0
-        vpclmulqdq      %%GH2H, %%GHDAT2, %%GHKEY2, 0x11     ; a1*b1
-        vpclmulqdq      %%GH2L, %%GHDAT2, %%GHKEY2, 0x00     ; a0*b0
+        vpclmulqdq      %%TLL2, %%GHDAT2, %%GHKEY2, 0x00     ; TLL = ML*KL
+        vpclmulqdq      %%TLH2, %%GHDAT2, %%GHKEY2, 0x10     ; TLH = ML*KH
+        vpclmulqdq      %%THL2, %%GHDAT2, %%GHKEY1, 0x01     ; THL = MH*HL
+        vpclmulqdq      %%THH2, %%GHDAT2, %%GHKEY1, 0x11     ; THH = MH*HH
 
-        vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (3*64)]
+        vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (2*64)]
+        vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (2*64) + HKeyGap]
         vmovdqa64       %%GHDAT2, [rsp + %%GHASHIN_BLK_OFFSET + (3*64)]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2432,10 +2370,13 @@
 
         ;; =================================================
         ;; GHASH 4 blocks (7 to 4)
-        vpclmulqdq      %%GH3M, %%GHDAT1, %%GHKEY1, 0x10     ; a0*b1
-        vpclmulqdq      %%GH3T, %%GHDAT1, %%GHKEY1, 0x01     ; a1*b0
-        vpclmulqdq      %%GH3H, %%GHDAT1, %%GHKEY1, 0x11     ; a1*b1
-        vpclmulqdq      %%GH3L, %%GHDAT1, %%GHKEY1, 0x00     ; a0*b0
+        vpclmulqdq      %%TLL3, %%GHDAT1, %%GHKEY2, 0x00     ; TLL = ML*KL
+        vpclmulqdq      %%TLH3, %%GHDAT1, %%GHKEY2, 0x10     ; TLH = ML*KH
+        vpclmulqdq      %%THL3, %%GHDAT1, %%GHKEY1, 0x01     ; THL = MH*HL
+        vpclmulqdq      %%THH3, %%GHDAT1, %%GHKEY1, 0x11     ; THH = MH*HH
+
+        vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (3*64)]
+        vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (3*64) + HKeyGap]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES rounds 3
@@ -2447,10 +2388,10 @@
 
         ;; =================================================
         ;; Gather (XOR) GHASH for 12 blocks
-        vpternlogq      %%GH1H, %%GH2H, %%GH3H, 0x96
-        vpternlogq      %%GH1L, %%GH2L, %%GH3L, 0x96
-        vpternlogq      %%GH1T, %%GH2T, %%GH3T, 0x96
-        vpternlogq      %%GH1M, %%GH2M, %%GH3M, 0x96
+        vpternlogq      %%TLL1, %%TLL2, %%TLL3, 0x96
+        vpternlogq      %%TLH1, %%TLH2, %%TLH3, 0x96
+        vpternlogq      %%THL1, %%THL2, %%THL3, 0x96
+        vpternlogq      %%THH1, %%THH2, %%THH3, 0x96
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES rounds 4
@@ -2477,10 +2418,10 @@
 
         ;; =================================================
         ;; GHASH 4 blocks (3 to 0)
-        vpclmulqdq      %%GH2M, %%GHDAT2, %%GHKEY2, 0x10     ; a0*b1
-        vpclmulqdq      %%GH2T, %%GHDAT2, %%GHKEY2, 0x01     ; a1*b0
-        vpclmulqdq      %%GH2H, %%GHDAT2, %%GHKEY2, 0x11     ; a1*b1
-        vpclmulqdq      %%GH2L, %%GHDAT2, %%GHKEY2, 0x00     ; a0*b0
+        vpclmulqdq      %%TLL2, %%GHDAT2, %%GHKEY2, 0x00     ; TLL = ML*KL
+        vpclmulqdq      %%TLH2, %%GHDAT2, %%GHKEY2, 0x10     ; TLH = ML*KH
+        vpclmulqdq      %%THL2, %%GHDAT2, %%GHKEY1, 0x01     ; THL = MH*HL
+        vpclmulqdq      %%THH2, %%GHDAT2, %%GHKEY1, 0x11     ; THH = MH*HH
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES round 6
@@ -2493,27 +2434,16 @@
         ;; =================================================
         ;; gather GHASH in GH1L (low) and GH1H (high)
 %ifidn %%DO_REDUCTION, first_time
-        vpternlogq      %%GH1M, %%GH1T, %%GH2T, 0x96        ; TM
-        vpxorq          %%TO_REDUCE_M, %%GH1M, %%GH2M       ; TM
-        vpxorq          %%TO_REDUCE_H, %%GH1H, %%GH2H       ; TH
-        vpxorq          %%TO_REDUCE_L, %%GH1L, %%GH2L       ; TL
-%endif
-%ifidn %%DO_REDUCTION, no_reduction
-        vpternlogq      %%GH1M, %%GH1T, %%GH2T, 0x96        ; TM
-        vpternlogq      %%TO_REDUCE_M, %%GH1M, %%GH2M, 0x96 ; TM
-        vpternlogq      %%TO_REDUCE_H, %%GH1H, %%GH2H, 0x96 ; TH
-        vpternlogq      %%TO_REDUCE_L, %%GH1L, %%GH2L, 0x96 ; TL
-%endif
-%ifidn %%DO_REDUCTION, final_reduction
-        ;; phase 1: add mid products together
-        ;; also load polynomial constant for reduction
-        vpternlogq      %%GH1M, %%GH1T, %%GH2T, 0x96 ; TM
-        vpternlogq      %%GH1M, %%TO_REDUCE_M, %%GH2M, 0x96
-
-        vpsrldq         %%GH2M, %%GH1M, 8
-        vpslldq         %%GH1M, %%GH1M, 8
-
-        vmovdqa64       XWORD(%%RED_POLY), [rel POLY2]
+        vpxorq          %%TO_REDUCE_L, %%TLL2, %%THL2
+        vpxorq          %%TO_REDUCE_H, %%THH2, %%TLH2
+        vpternlogq      %%TO_REDUCE_L, %%TLL1, %%THL1, 0x96
+        vpternlogq      %%TO_REDUCE_H, %%THH1, %%TLH1, 0x96
+%else
+        ;; not the first round so sums need to be updated
+        vpternlogq      %%TO_REDUCE_L, %%TLL2, %%THL2, 0x96
+        vpternlogq      %%TO_REDUCE_H, %%THH2, %%TLH2, 0x96
+        vpternlogq      %%TO_REDUCE_L, %%TLL1, %%THL1, 0x96
+        vpternlogq      %%TO_REDUCE_H, %%THH1, %%TLH1, 0x96
 %endif
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2525,12 +2455,11 @@
         vbroadcastf64x2 %%AESKEY2, [%%GDATA + (16 * 9)]
 
         ;; =================================================
-        ;; Add mid product to high and low
+        ;; new reduction
 %ifidn %%DO_REDUCTION, final_reduction
-        vpternlogq      %%GH1H, %%GH2H, %%GH2M, 0x96    ; TH = TH1 + TH2 + TM>>64
-        vpxorq          %%GH1H, %%TO_REDUCE_H
-        vpternlogq      %%GH1L, %%GH2L, %%GH1M, 0x96    ; TL = TL1 + TL2 + TM<<64
-        vpxorq          %%GH1L, %%TO_REDUCE_L
+        vpclmulqdq      %%THH1, %%TO_REDUCE_L, [rel POLY], 0x10
+        vpshufd         %%TO_REDUCE_L, %%TO_REDUCE_L, 01001110b
+        vpternlogq      %%THH1, %%TO_REDUCE_H, %%TO_REDUCE_L, 0x96
 %endif
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2541,13 +2470,6 @@
         vaesenc         %%B12_15, %%B12_15, %%AESKEY1
         vbroadcastf64x2 %%AESKEY1, [%%GDATA + (16 * 10)]
 
-        ;; =================================================
-        ;; horizontal xor of low and high 4x128
-%ifidn %%DO_REDUCTION, final_reduction
-        VHPXORI4x128    %%GH1H, %%GH2H
-        VHPXORI4x128    %%GH1L, %%GH2L
-%endif
-
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES round 9
         vaesenc         %%B00_03, %%B00_03, %%AESKEY2
@@ -2557,13 +2479,6 @@
 %if (NROUNDS >= 11)
         vbroadcastf64x2 %%AESKEY2, [%%GDATA + (16 * 11)]
 %endif
-        ;; =================================================
-        ;; first phase of reduction
-%ifidn %%DO_REDUCTION, final_reduction
-        vpclmulqdq      XWORD(%%RED_P1), XWORD(%%RED_POLY), XWORD(%%GH1L), 0x01
-        vpslldq         XWORD(%%RED_P1), XWORD(%%RED_P1), 8             ; shift-L 2 DWs
-        vpxorq          XWORD(%%RED_P1), XWORD(%%GH1L), XWORD(%%RED_P1) ; first phase of the reduct
-%endif
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES rounds up to 11 (AES192) or 13 (AES256)
@@ -2596,15 +2511,9 @@
 %endif ; GCM192 / NROUNDS = 11 (13 including the first and the last)
 
         ;; =================================================
-        ;; second phase of the reduction
+        ;; horizontal xor of 4 reduced hashes
 %ifidn %%DO_REDUCTION, final_reduction
-        vpclmulqdq      XWORD(%%RED_T1), XWORD(%%RED_POLY), XWORD(%%RED_P1), 0x00
-        vpsrldq         XWORD(%%RED_T1), XWORD(%%RED_T1), 4 ; shift-R 1-DW to obtain 2-DWs shift-R
-
-        vpclmulqdq      XWORD(%%RED_T2), XWORD(%%RED_POLY), XWORD(%%RED_P1), 0x10
-        vpslldq         XWORD(%%RED_T2), XWORD(%%RED_T2), 4 ; shift-L 1-DW for result without shifts
-        ;; GH1H = GH1H x RED_T1 x RED_T2
-        vpternlogq      XWORD(%%GH1H), XWORD(%%RED_T2), XWORD(%%RED_T1), 0x96
+        VHPXORI4x128    %%THH1, %%TLL1
 %endif
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2651,7 +2560,7 @@
 
 %ifidn %%DO_REDUCTION, final_reduction
         ;; =================================================
-        ;; Return GHASH value  through %%GH1H
+        ;; Return GHASH value  through %%GH1H / %THH1
 %endif
 
 %endmacro                       ; GHASH_16_ENCRYPT_16_PARALLEL
@@ -2997,7 +2906,7 @@
                 %%CTR, %%HASH_IN_OUT, %%ENC_DEC, %%INSTANCE_TYPE, \
                 %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, \
                 %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, \
-                %%ZTMP10, %%ZTMP11, %%ZTMP12, %%ZTMP13, %%ZTMP14, \
+                %%ZTMP10, %%ZTMP11, %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15, \
                 %%IA0, %%IA1, %%MASKREG, %%SHUFMASK
 %if num_blocks != 16
         jmp     %%_small_initial_blocks_encrypted
@@ -3072,10 +2981,11 @@
 %define %%ZTMP20                zmm8
 %define %%ZTMP21                zmm22
 %define %%ZTMP22                zmm23
+%define %%ZTMP23                zmm26
 
 %define %%GH                    zmm24
 %define %%GL                    zmm25
-%define %%GM                    zmm26
+
 %define %%SHUF_MASK             zmm29
 
 ;;; Unused in the small packet path
@@ -3234,8 +3144,7 @@
                 %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, \
-                %%GL, %%GH, %%GM, \
+                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
                 first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz
 
         ;; ==== AES-CTR + GHASH - 16 blocks, no reduction
@@ -3252,8 +3161,7 @@
                 %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, \
-                %%GL, %%GH, %%GM, \
+                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
                 no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in
 
         ;; ==== AES-CTR + GHASH - 16 blocks, reduction
@@ -3270,12 +3178,11 @@
                 %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, \
-                %%GL, %%GH, %%GM, \
+                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
                 final_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in
 
         ;; === xor cipher block 0 with GHASH (ZT4)
-        vmovdqa64       %%AAD_HASHz, %%ZTMP4
+        vmovdqa64       %%AAD_HASHx, XWORD(%%ZTMP4)
 
         add             %%DATA_OFFSET, (big_loop_nblocks * 16)
         sub             %%LENGTH, (big_loop_nblocks * 16)
@@ -3307,8 +3214,8 @@
         sub             DWORD(%%HASHK_PTR), DWORD(%%IA0)
 
         ;; ==== GHASH 32 blocks and follow with reduction
-        GHASH_16        start, %%GH, %%GM, %%GL, rsp, STACK_LOCAL_OFFSET, (0 * 16), %%GDATA_KEY, %%HASHK_PTR, 0, %%AAD_HASHz, \
-                        %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9
+        GHASH_16        start, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (0 * 16), %%GDATA_KEY, %%HASHK_PTR, 0, %%AAD_HASHz, \
+                        %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
 
         ;; ==== GHASH 1 x 16 blocks with reduction + cipher and ghash on the reminder
 %assign ghashin_offset (STACK_LOCAL_OFFSET + (16 * 16))
@@ -3321,8 +3228,8 @@
                 %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, \
                 %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP10, %%ZTMP11, %%ZTMP12, %%ZTMP13, \
                 %%ZTMP14, %%ZTMP15, %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, %%ZTMP20, \
-                %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, mid, %%GL, %%GH, %%GM, \
+                %%ZTMP21, %%ZTMP22, %%ZTMP23, \
+                %%ADDBE_4x4, %%ADDBE_1234, mid, %%GL, %%GH, \
                 %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
 
 %ifidn %%INSTANCE_TYPE, multi_call
@@ -3352,8 +3259,7 @@
                 %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, \
-                %%GL, %%GH, %%GM, \
+                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
                 first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz
 
         ;; ==== AES-CTR + GHASH - 16 blocks, no reduction
@@ -3370,13 +3276,12 @@
                 %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, \
-                %%GL, %%GH, %%GM, \
+                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
                 no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in
 
         ;; ==== GHASH 16 blocks with reduction
-        GHASH_16        end_reduce, %%GH, %%GM, %%GL, rsp, STACK_LOCAL_OFFSET, (32 * 16), %%GDATA_KEY, HashKey_16, 0, %%AAD_HASHz, \
-                        %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9
+        GHASH_16        end_reduce, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (32 * 16), %%GDATA_KEY, HashKey_16, 0, %%AAD_HASHz, \
+                        %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
 
         ;; ==== GHASH 1 x 16 blocks with reduction + cipher and ghash on the reminder
 %assign ghashin_offset (STACK_LOCAL_OFFSET + (0 * 16))
@@ -3401,8 +3306,8 @@
                 %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, \
                 %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP10, %%ZTMP11, %%ZTMP12, %%ZTMP13, \
                 %%ZTMP14, %%ZTMP15, %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, %%ZTMP20, \
-                %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, start, %%GL, %%GH, %%GM, \
+                %%ZTMP21, %%ZTMP22, %%ZTMP23, \
+                %%ADDBE_4x4, %%ADDBE_1234, start, %%GL, %%GH, \
                 %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
 
 %ifidn %%INSTANCE_TYPE, multi_call
@@ -3431,13 +3336,12 @@
                 %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, \
-                %%GL, %%GH, %%GM, \
+                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
                 first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz
 
         ;; ==== GHASH 1 x 16 blocks
-        GHASH_16        mid, %%GH, %%GM, %%GL, rsp, STACK_LOCAL_OFFSET, (16 * 16), %%GDATA_KEY, HashKey_32, 0, no_hash_input, \
-                        %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9
+        GHASH_16        mid, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (16 * 16), %%GDATA_KEY, HashKey_32, 0, no_hash_input, \
+                        %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
 
         ;; ==== GHASH 1 x 16 blocks with reduction + cipher and ghash on the reminder
 %assign ghashin_offset (STACK_LOCAL_OFFSET + (32 * 16))
@@ -3452,8 +3356,8 @@
                 %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, \
                 %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP10, %%ZTMP11, %%ZTMP12, %%ZTMP13, \
                 %%ZTMP14, %%ZTMP15, %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, %%ZTMP20, \
-                %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, end_reduce, %%GL, %%GH, %%GM, \
+                %%ZTMP21, %%ZTMP22, %%ZTMP23, \
+                %%ADDBE_4x4, %%ADDBE_1234, end_reduce, %%GL, %%GH, \
                 %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
 
 %ifidn %%INSTANCE_TYPE, multi_call
@@ -3486,8 +3390,8 @@
                 %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, \
                 %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP10, %%ZTMP11, %%ZTMP12, %%ZTMP13, \
                 %%ZTMP14, %%ZTMP15, %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, %%ZTMP20, \
-                %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, start, %%GL, %%GH, %%GM, \
+                %%ZTMP21, %%ZTMP22, %%ZTMP23, \
+                %%ADDBE_4x4, %%ADDBE_1234, start, %%GL, %%GH, \
                 %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
 
 %ifidn %%INSTANCE_TYPE, multi_call
-- 
GitLab


From a943d58464d90b68348c5dfd57118a6317a86576 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 18 Jan 2023 10:47:14 +0000
Subject: [PATCH 166/332] avx512: [gcm] remove obsolete macro VCLMUL_REDUCE

---
 lib/avx512_t2/gcm_vaes_avx512.inc | 29 -----------------------------
 1 file changed, 29 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index ca35a173..212e01d5 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -197,35 +197,6 @@
         vpxorq          XWORD(%%REG), XWORD(%%REG), XWORD(%%TMP)
 %endmacro               ; VHPXORI2x128
 
-;;; ===========================================================================
-;;; ===========================================================================
-;;; AVX512 reduction macro
-%macro VCLMUL_REDUCE 6
-%define %%OUT   %1      ; [out] zmm/ymm/xmm: result (must not be %%TMP1 or %%HI128)
-%define %%POLY  %2      ; [in] zmm/ymm/xmm: polynomial
-%define %%HI128 %3      ; [in] zmm/ymm/xmm: high 128b of hash to reduce
-%define %%LO128 %4      ; [in] zmm/ymm/xmm: low 128b of hash to reduce
-%define %%TMP0  %5      ; [in] zmm/ymm/xmm: temporary register
-%define %%TMP1  %6      ; [in] zmm/ymm/xmm: temporary register
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;; first phase of the reduction
-        vpclmulqdq      %%TMP0, %%POLY, %%LO128, 0x01
-        vpslldq         %%TMP0, %%TMP0, 8       ; shift-L 2 DWs
-        vpxorq          %%TMP0, %%LO128, %%TMP0 ; first phase of the reduction complete
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;; second phase of the reduction
-        vpclmulqdq      %%TMP1, %%POLY, %%TMP0, 0x00
-        vpsrldq         %%TMP1, %%TMP1, 4       ; shift-R only 1-DW to obtain 2-DWs shift-R
-
-        vpclmulqdq      %%OUT, %%POLY, %%TMP0, 0x10
-        vpslldq         %%OUT, %%OUT, 4         ; shift-L 1-DW to obtain result with no shifts
-
-        vpternlogq      %%OUT, %%TMP1, %%HI128, 0x96    ; OUT/GHASH = OUT xor TMP1 xor HI128
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%endmacro
-
 ;;; ===========================================================================
 ;;; ===========================================================================
 ;;; schoolbook multiply of 16 blocks (8 x 16 bytes)
-- 
GitLab


From a157807b6ce3f63192f22d9b3b73e74a1c1e0a34 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 18 Jan 2023 12:09:38 +0000
Subject: [PATCH 167/332] avx512: [gcm] add new GHASH_MUL2 macro with improved
 reduction

---
 lib/avx512_t2/gcm_vaes_avx512.inc | 101 ++++++++++++++++++++++++------
 1 file changed, 83 insertions(+), 18 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 212e01d5..b3875f5a 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -603,6 +603,66 @@
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %endmacro
 
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;; GHASH_MUL2 MACRO to implement: Data*HashKey mod (128,127,126,121,0)
+;;; Input: A and B (128-bits each, bit-reflected)
+;;; Output: C = A*B*x mod poly, (i.e. >>1 )
+;;; To compute GH = GH*HashKey mod poly, give two constants:
+;;;   HK = HashKey<<1 mod poly as input
+;;;   KK = SWAP_H_L( HK_L * POLY) + HK
+;;;   POLY = 0xC2 << 56
+;;;
+;;; Realize four multiplications first, to achieve partially reduced product
+;;;   TLL = GH_L * KK_L
+;;;   TLH = GH_L * KK_H
+;;;   THL = GH_H * HK_L
+;;;   THH = GH_H * HK_H
+;;;
+;;; Accumulate results into 2 registers, with corresponding weights
+;;;   T1 = THH + TLH
+;;;   T2 = THL + TLL
+;;;
+;;; Begin reduction
+;;;    ----------
+;;;    |   T1   |
+;;;    ---------------
+;;;         |   T2   |
+;;;         ----------
+;;;
+;;;   T3 = SWAP_H_L(T2)
+;;;   T5 = T2_L * POLY
+;;;   GH = T1 + T5 + T3
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+%macro  GHASH_MUL2  7
+%define %%GH  %1        ;; [in/out] xmm with multiply operand(s) (128-bits)
+%define %%HK  %2        ;; [in] xmm with hash key value(s) (128-bits)
+%define %%KK  %3        ;; [in] xmm with hash key K value(s) (128-bits)
+%define %%TLL %4        ;; [clobbered] xmm
+%define %%TLH %5        ;; [clobbered] xmm
+%define %%THL %6        ;; [clobbered] xmm
+%define %%THH %7        ;; [clobbered] xmm
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vpclmulqdq      %%TLL, %%GH, %%KK, 0x00     ; TLL = GH_L * KK_L
+        vpclmulqdq      %%TLH, %%GH, %%KK, 0x10     ; TLH = GH_L * KK_H
+        vpclmulqdq      %%THL, %%GH, %%HK, 0x01     ; THL = GH_H * HK_L
+        vpclmulqdq      %%THH, %%GH, %%HK, 0x11     ; THH = GH_H * HK_H
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ; add products
+        vpxorq          %%TLL, %%TLL, %%THL
+        vpxorq          %%THH, %%THH, %%TLH
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ; new reduction
+        vpclmulqdq      %%GH, %%TLL, [rel POLY], 0x10
+        vpshufd         %%TLH, %%TLL, 01001110b
+        vpternlogq      %%GH, %%THH, %%TLH, 0x96
+
+        ; @note: it can support YMM or ZMM but horizontal XOR would be required here
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+%endmacro
+
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;; In PRECOMPUTE, the commands filling Hashkey_i_k are not required for avx512
 ;;; functions, but are kept to allow users to switch cpu architectures between calls
@@ -1069,6 +1129,7 @@
         ;; XTMP1 = my_ctx_data.partial_block_enc_key
         vmovdqu64       %%XTMP1, [%%GDATA_CTX + PBlockEncKey]
         vmovdqu64       %%XTMP2, [%%GDATA_KEY + HashKey]
+        vmovdqu64       %%XTMP9, [%%GDATA_KEY + HashKey + HKeyGap]
 
         ;; adjust the shuffle mask pointer to be able to shift right %%LENGTH bytes
         ;; (16 - %%LENGTH) is the number of bytes in plaintext mod 16)
@@ -1114,7 +1175,7 @@
         jl              %%_partial_incomplete
 
         ;; GHASH computation for the last <16 Byte block
-        GHASH_MUL       %%AAD_HASH, %%XTMP2, %%XTMP5, %%XTMP6, %%XTMP7, %%XTMP8, %%XTMP9
+        GHASH_MUL2      %%AAD_HASH, %%XTMP2, %%XTMP9, %%XTMP5, %%XTMP6, %%XTMP7, %%XTMP8
 
         mov             qword [%%GDATA_CTX + PBlockLen], 0
 
@@ -2554,7 +2615,7 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;; Save register content for the caller
 %macro FUNC_SAVE 0
-        ;; Required for Update/GMC_ENC
+        ;; Required for Update/GCM_ENC
         ;the number of pushes must equal STACK_OFFSET
         mov     rax, rsp
 
@@ -2613,7 +2674,7 @@
         vmovdqu xmm6, [rsp + STACK_XMM_OFFSET + 0*16]
 %endif
 
-        ;; Required for Update/GMC_ENC
+        ;; Required for Update/GCM_ENC
         mov     rbp, [rsp + STACK_GP_OFFSET + 5*8]
         mov     rbx, [rsp + STACK_GP_OFFSET + 6*8]
 %ifidn __OUTPUT_FORMAT__, win64
@@ -2676,7 +2737,8 @@
         vpxorq          %%J0, XWORD(%%ZT2), %%J0
 
         vmovdqu64       XWORD(%%ZT0), [%%KEY + HashKey_1]
-        GHASH_MUL       %%J0, XWORD(%%ZT0), XWORD(%%ZT1), XWORD(%%ZT2), XWORD(%%ZT3), XWORD(%%ZT4), XWORD(%%ZT5)
+        vmovdqu64       XWORD(%%ZT5), [%%KEY + HashKey_1 + HKeyGap]
+        GHASH_MUL2      %%J0, XWORD(%%ZT0),  XWORD(%%ZT5), XWORD(%%ZT1), XWORD(%%ZT2), XWORD(%%ZT3), XWORD(%%ZT4)
 
         vpshufb         %%J0, [rel SHUF_MASK] ; perform a 16Byte swap
 %endmacro
@@ -2747,11 +2809,12 @@
         mov             %%GPR1, %%A_IN
         vmovdqu8        XWORD(%%AAD_HASH){%%MASKREG}{z}, [%%GPR1]
         vmovdqu8        XWORD(%%ZT0), [%%GDATA_KEY + HashKey_1]
+        vmovdqu8        XWORD(%%ZT5), [%%GDATA_KEY + HashKey_1 + HKeyGap]
         vpshufb         XWORD(%%AAD_HASH), [rel SHUF_MASK]
 
         ;; GHASH 12 bytes of AAD
-        GHASH_MUL       XWORD(%%AAD_HASH), XWORD(%%ZT0), \
-                        XWORD(%%ZT1), XWORD(%%ZT2), XWORD(%%ZT3), XWORD(%%ZT4), XWORD(%%ZT5)
+        GHASH_MUL2      XWORD(%%AAD_HASH), XWORD(%%ZT0), XWORD(%%ZT5), \
+                        XWORD(%%ZT1), XWORD(%%ZT2), XWORD(%%ZT3), XWORD(%%ZT4)
 
         jmp             %%_aad_compute_done
 
@@ -3415,15 +3478,15 @@
 %define %%CTR_CHECK     %7      ; [in/out] GPR with counter overflow check
 %define %%ADDBE_4x4     %8      ; [in] ZMM 4x128bits with value 4 (big endian)
 %define %%ADDBE_1234    %9      ; [in] ZMM 4x128bits with values 1, 2, 3 & 4 (big endian)
-%define %%T0            %10     ; [clobered] temporary ZMM register
-%define %%T1            %11     ; [clobered] temporary ZMM register
-%define %%T2            %12     ; [clobered] temporary ZMM register
-%define %%T3            %13     ; [clobered] temporary ZMM register
-%define %%T4            %14     ; [clobered] temporary ZMM register
-%define %%T5            %15     ; [clobered] temporary ZMM register
-%define %%T6            %16     ; [clobered] temporary ZMM register
-%define %%T7            %17     ; [clobered] temporary ZMM register
-%define %%T8            %18     ; [clobered] temporary ZMM register
+%define %%T0            %10     ; [clobbered] temporary ZMM register
+%define %%T1            %11     ; [clobbered] temporary ZMM register
+%define %%T2            %12     ; [clobbered] temporary ZMM register
+%define %%T3            %13     ; [clobbered] temporary ZMM register
+%define %%T4            %14     ; [clobbered] temporary ZMM register
+%define %%T5            %15     ; [clobbered] temporary ZMM register
+%define %%T6            %16     ; [clobbered] temporary ZMM register
+%define %%T7            %17     ; [clobbered] temporary ZMM register
+%define %%T8            %18     ; [clobbered] temporary ZMM register
 %define %%SHUF_MASK     %19     ; [in] ZMM with BE/LE shuffle mask
 %define %%ENC_DEC       %20     ; [in] ENC (encrypt) or DEC (decrypt) selector
 %define %%BLK_OFFSET    %21     ; [in] stack frame offset to ciphered blocks
@@ -3550,6 +3613,7 @@
         ;; @note: xmm14 is hardcoded for hash input in singe_call case
 
         vmovdqu         xmm13, [%%GDATA_KEY + HashKey]
+        vmovdqu         xmm6, [%%GDATA_KEY + HashKey + HKeyGap]
         ;; Start AES as early as possible
         vmovdqu         xmm9, [%%GDATA_CTX + OrigIV]    ; xmm9 = Y0
         ENCRYPT_SINGLE_BLOCK %%GDATA_KEY, xmm9  ; E(K, Y0)
@@ -3566,7 +3630,7 @@
         je              %%_partial_done
 
         ;; GHASH computation for the last <16 Byte block
-        GHASH_MUL       xmm14, xmm13, xmm0, xmm10, xmm11, xmm5, xmm6
+        GHASH_MUL2      xmm14, xmm13, xmm6, xmm0, xmm10, xmm11, xmm5
 
 %%_partial_done:
 %endif
@@ -3575,7 +3639,7 @@
         vpsllq          xmm15, xmm15, 3                         ; convert bytes into bits
 
         vpxor           xmm14, xmm15
-        GHASH_MUL       xmm14, xmm13, xmm0, xmm10, xmm11, xmm5, xmm6
+        GHASH_MUL2      xmm14, xmm13, xmm6, xmm0, xmm10, xmm11, xmm5
         vpshufb         xmm14, [rel SHUF_MASK]         ; perform a 16Byte swap
 
         vpxor           xmm9, xmm9, xmm14
@@ -3671,6 +3735,7 @@
                                                 %%IA0, %%IA1, %%MASKREG
 
         vmovdqu64       %%XTMP2, [%%GDATA_KEY + HashKey]
+        vmovdqu64       %%XTMP9, [%%GDATA_KEY + HashKey + HKeyGap]
 
         ;; adjust the shuffle mask pointer to be able to shift right %%LENGTH bytes
         ;; (16 - %%LENGTH) is the number of bytes in plaintext mod 16)
@@ -3697,7 +3762,7 @@
         jl              %%_partial_incomplete
 
         ;; GHASH computation for the last <16 Byte block
-        GHASH_MUL       %%AAD_HASH, %%XTMP2, %%XTMP5, %%XTMP6, %%XTMP7, %%XTMP8, %%XTMP9
+        GHASH_MUL2      %%AAD_HASH, %%XTMP2, %%XTMP9, %%XTMP5, %%XTMP6, %%XTMP7, %%XTMP8
 
         mov             qword [%%GDATA_CTX + PBlockLen], 0
 
-- 
GitLab


From c7254128db29eca4f33978544a0cbb9e5702faaf Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 20 Jan 2023 09:25:22 +0000
Subject: [PATCH 168/332] avx512: [gcm] added hash limb operation type to
 GHASH_16 and CALC_AAD_HASH macros

---
 lib/avx512_t2/gcm_vaes_avx512.inc | 144 +++++++++++++++++++++---------
 1 file changed, 104 insertions(+), 40 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index b3875f5a..00b3ded8 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -204,33 +204,45 @@
 ;;;   %%INPTR address is 64 byte aligned
 ;;; - there is an option to pass ready blocks through ZMM registers too.
 ;;;   4 extra parameters need to passed in such case and 21st argument can be empty
-%macro GHASH_16 21-22
+%macro GHASH_16 22-23
 %define %%TYPE  %1      ; [in] ghash type: start (xor hash), mid, end (same as mid; no reduction),
-                        ;      end_reduce (end with reduction), start_reduce
-%define %%GH    %2      ; [in/out] ZMM ghash sum: high 128-bits
-%define %%GL    %3      ; [in/out] ZMM ghash sum: low 128-bits
-%define %%INPTR %4      ; [in] data input pointer
-%define %%INOFF %5      ; [in] data input offset
-%define %%INDIS %6      ; [in] data input displacement
-%define %%HKPTR %7      ; [in] hash key pointer
-%define %%HKOFF %8      ; [in] hash key offset
-%define %%HKDIS %9      ; [in] hash key displacement
-%define %%HASH  %10     ; [in/out] ZMM hash value in/out
-%define %%ZTMP0 %11     ; [clobbered] temporary ZMM
-%define %%ZTMP1 %12     ; [clobbered] temporary ZMM
-%define %%ZTMP2 %13     ; [clobbered] temporary ZMM
-%define %%ZTMP3 %14     ; [clobbered] temporary ZMM
-%define %%ZTMP4 %15     ; [clobbered] temporary ZMM
-%define %%ZTMP5 %16     ; [clobbered] temporary ZMM
-%define %%ZTMP6 %17     ; [clobbered] temporary ZMM
-%define %%ZTMP7 %18     ; [clobbered] temporary ZMM
-%define %%ZTMP8 %19     ; [clobbered] temporary ZMM
-%define %%ZTMP9 %20     ; [clobbered] temporary ZMM
-%define %%ZTMPA %21     ; [clobbered] temporary ZMM
-%define %%SHUFM %22     ; [in] ZMM with shuffle mask - provided only when input data needs shuffling
+                        ;      end_reduce (end with reduction), start_reduce, end_reduce_no_hxor
+%define %%LOADT %2      ; [in] hash key load type: hk_load or hk_bcast
+%define %%GH    %3      ; [in/out] ZMM ghash sum: high 128-bits
+%define %%GL    %4      ; [in/out] ZMM ghash sum: low 128-bits
+%define %%INPTR %5      ; [in] data input pointer
+%define %%INOFF %6      ; [in] data input offset
+%define %%INDIS %7      ; [in] data input displacement
+%define %%HKPTR %8      ; [in] hash key pointer
+%define %%HKOFF %9      ; [in] hash key offset
+%define %%HKDIS %10     ; [in] hash key displacement
+%define %%HASH  %11     ; [in/out] ZMM hash value in/out
+%define %%ZTMP0 %12     ; [clobbered] temporary ZMM
+%define %%ZTMP1 %13     ; [clobbered] temporary ZMM
+%define %%ZTMP2 %14     ; [clobbered] temporary ZMM
+%define %%ZTMP3 %15     ; [clobbered] temporary ZMM
+%define %%ZTMP4 %16     ; [clobbered] temporary ZMM
+%define %%ZTMP5 %17     ; [clobbered] temporary ZMM
+%define %%ZTMP6 %18     ; [clobbered] temporary ZMM
+%define %%ZTMP7 %19     ; [clobbered] temporary ZMM
+%define %%ZTMP8 %20     ; [clobbered] temporary ZMM
+%define %%ZTMP9 %21     ; [clobbered] temporary ZMM
+%define %%ZTMPA %22     ; [clobbered] temporary ZMM
+%define %%SHUFM %23     ; [in] ZMM with shuffle mask - provided only when input data needs shuffling
 
 %assign start_ghash 0
 %assign do_reduction 0
+%assign uload_and_shuffle 0
+%assign hk_broadcast 0
+%assign do_hxor 1
+
+%if %0 == 23
+%assign uload_and_shuffle 1
+%endif
+
+%ifidn %%LOADT, hk_bcast
+%assign hk_broadcast 1
+%endif
 
 %ifidn %%TYPE, start
 %assign start_ghash 1
@@ -245,8 +257,12 @@
 %assign do_reduction 1
 %endif
 
+%ifidn %%TYPE, end_reduce_no_hxor
+%assign do_reduction 1
+%assign do_hxor 0
+%endif
         ;; ghash blocks 0-3
-%if %0 == 22
+%if uload_and_shuffle != 0
         vmovdqu64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS]
         vpshufb         %%ZTMP9, %%ZTMP9, %%SHUFM
 %else
@@ -256,21 +272,31 @@
 %if start_ghash != 0
         vpxorq          %%ZTMP9, %%ZTMP9, %%HASH
 %endif
+%if hk_broadcast != 0
+        vbroadcastf64x2 %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS]
+        vbroadcastf64x2 %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap]
+%else
         vmovdqu64       %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS]
         vmovdqu64       %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap]
+%endif
         vpclmulqdq      %%ZTMP0, %%ZTMP9, %%ZTMPA, 0x00 ; TLL = ML*KL
         vpclmulqdq      %%ZTMP1, %%ZTMP9, %%ZTMPA, 0x10 ; TLH = ML*KH
         vpclmulqdq      %%ZTMP2, %%ZTMP9, %%ZTMP8, 0x01 ; THL = MH*HL
         vpclmulqdq      %%ZTMP3, %%ZTMP9, %%ZTMP8, 0x11 ; THH = MH*HH
         ;; ghash blocks 4-7
-%if %0 == 22
+%if uload_and_shuffle != 0
         vmovdqu64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 64]
         vpshufb         %%ZTMP9, %%ZTMP9, %%SHUFM
 %else
         vmovdqa64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 64]
 %endif
+%if hk_broadcast != 0
+        vbroadcastf64x2 %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS + 64]
+        vbroadcastf64x2 %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap + 64]
+%else
         vmovdqu64       %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS + 64]
         vmovdqu64       %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap + 64]
+%endif
         vpclmulqdq      %%ZTMP4, %%ZTMP9, %%ZTMPA, 0x00 ; TLL = ML*KL
         vpclmulqdq      %%ZTMP5, %%ZTMP9, %%ZTMPA, 0x10 ; TLH = ML*KH
         vpclmulqdq      %%ZTMP6, %%ZTMP9, %%ZTMP8, 0x01 ; THL = MH*HL
@@ -284,14 +310,19 @@
         vpternlogq      %%GH, %%ZTMP1, %%ZTMP3, 0x96        ; T1 = THH + TLH
 %endif
         ;; ghash blocks 8-11
-%if %0 == 22
+%if uload_and_shuffle != 0
         vmovdqu64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 128]
         vpshufb         %%ZTMP9, %%ZTMP9, %%SHUFM
 %else
         vmovdqa64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 128]
 %endif
+%if hk_broadcast != 0
+        vbroadcastf64x2 %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS + 128]
+        vbroadcastf64x2 %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap + 128]
+%else
         vmovdqu64       %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS + 128]
         vmovdqu64       %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap + 128]
+%endif
         vpclmulqdq      %%ZTMP0, %%ZTMP9, %%ZTMPA, 0x00 ; TLL = ML*KL
         vpclmulqdq      %%ZTMP1, %%ZTMP9, %%ZTMPA, 0x10 ; TLH = ML*KH
         vpclmulqdq      %%ZTMP2, %%ZTMP9, %%ZTMP8, 0x01 ; THL = MH*HL
@@ -300,14 +331,19 @@
         vpternlogq      %%GL, %%ZTMP6, %%ZTMP4, 0x96        ; T2 = THL + TLL
         vpternlogq      %%GH, %%ZTMP7, %%ZTMP5, 0x96        ; T1 = THH + TLH
         ;; ghash blocks 12-15
-%if %0 == 22
+%if uload_and_shuffle != 0
         vmovdqu64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 192]
         vpshufb         %%ZTMP9, %%ZTMP9, %%SHUFM
 %else
         vmovdqa64       %%ZTMP9, [%%INPTR + %%INOFF + %%INDIS + 192]
 %endif
+%if hk_broadcast != 0
+        vbroadcastf64x2 %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS + 192]
+        vbroadcastf64x2 %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap + 192]
+%else
         vmovdqu64       %%ZTMP8, [%%HKPTR + %%HKOFF + %%HKDIS + 192]
         vmovdqu64       %%ZTMPA, [%%HKPTR + %%HKOFF + %%HKDIS + HKeyGap + 192]
+%endif
         vpclmulqdq      %%ZTMP4, %%ZTMP9, %%ZTMPA, 0x00 ; TLL = ML*KL
         vpclmulqdq      %%ZTMP5, %%ZTMP9, %%ZTMPA, 0x10 ; TLH = ML*KH
         vpclmulqdq      %%ZTMP6, %%ZTMP9, %%ZTMP8, 0x01 ; THL = MH*HL
@@ -323,8 +359,10 @@
         vpclmulqdq      %%HASH, %%GL, [rel POLY], 0x10
         vpshufd         %%ZTMP0, %%GL, 01001110b
         vpternlogq      %%HASH, %%GH, %%ZTMP0, 0x96
+%if do_hxor != 0
         VHPXORI4x128    %%HASH, %%ZTMP0
 %endif
+%endif
 %endmacro
 
 ;;; ===========================================================================
@@ -803,23 +841,49 @@
 
         vmovdqa64       %%SHFMSK, [rel SHUF_MASK]
 
+%%_get_AAD_loop2x48x16:
+        cmp             %%T2, (2*48*16)
+        jb              %%_get_AAD_loop48x16
+
+        GHASH_16        start, hk_bcast, %%ZT5, %%ZT6, \
+                        %%T1,  (0*64), 0, \
+                        %%GDATA_KEY, HashKey_48, 0, ZWORD(%%AAD_HASH), \
+                        %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
+
+        GHASH_16        mid, hk_bcast, %%ZT5, %%ZT6, \
+                        %%T1,  (4*64), 0, \
+                        %%GDATA_KEY, HashKey_32, 0, NO_HASH_IN_OUT, \
+                        %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
+
+        GHASH_16        end_reduce_no_hxor, hk_bcast, %%ZT5, %%ZT6, \
+                        %%T1,  (8*64), 0, \
+                        %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
+                        %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
+                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
+
+        add             %%T1, (48*16)
+        sub             %%T2, (48*16)
+        jmp             %%_get_AAD_loop2x48x16
+
 %%_get_AAD_loop48x16:
         cmp             %%T2, (48*16)
         jb              %%_exit_AAD_loop48x16
 
-        GHASH_16        start, %%ZT5, %%ZT6, \
+        GHASH_16        start, hk_load, %%ZT5, %%ZT6, \
                         %%T1,  (0*64), 0, \
                         %%GDATA_KEY, HashKey_48, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
-        GHASH_16        mid, %%ZT5, %%ZT6, \
+        GHASH_16        mid, hk_load, %%ZT5, %%ZT6, \
                         %%T1,  (4*64), 0, \
                         %%GDATA_KEY, HashKey_32, 0, NO_HASH_IN_OUT, \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
-        GHASH_16        end_reduce, %%ZT5, %%ZT6, \
+        GHASH_16        end_reduce, hk_load, %%ZT5, %%ZT6, \
                         %%T1,  (8*64), 0, \
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
@@ -847,13 +911,13 @@
         add             %%T3, HashKey_1 + 16
 
         ; Get next 16 blocks
-        GHASH_16        start, %%ZT5, %%ZT6, \
+        GHASH_16        start, hk_load, %%ZT5, %%ZT6, \
                         %%T1,  (0*64), 0, \
                         %%GDATA_KEY, %%T3, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
-        GHASH_16        mid, %%ZT5, %%ZT6, \
+        GHASH_16        mid, hk_load, %%ZT5, %%ZT6, \
                         %%T1,  (4*64), 0, \
                         %%GDATA_KEY, {%%T3 + 16*16}, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
@@ -864,13 +928,13 @@
         jmp             %%_less_than_16x16_remain
 
 %%_equal_32x16:
-        GHASH_16        start, %%ZT5, %%ZT6, \
+        GHASH_16        start, hk_load, %%ZT5, %%ZT6, \
                         %%T1,  (0*64), 0, \
                         %%GDATA_KEY, HashKey_32, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
-        GHASH_16        end_reduce, %%ZT5, %%ZT6, \
+        GHASH_16        end_reduce, hk_load, %%ZT5, %%ZT6, \
                         %%T1,  (4*64), 0, \
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
@@ -884,7 +948,7 @@
         neg             %%T3
         add             %%T3, HashKey_1 + 16
 
-        GHASH_16        start, %%ZT5, %%ZT6, \
+        GHASH_16        start, hk_load, %%ZT5, %%ZT6, \
                         %%T1,  (0*64), 0, \
                         %%GDATA_KEY, %%T3, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
@@ -894,7 +958,7 @@
         jmp             %%_less_than_16x16_remain
 
 %%_equal_16x16:
-        GHASH_16        start_reduce, %%ZT5, %%ZT6, \
+        GHASH_16        start_reduce, hk_load, %%ZT5, %%ZT6, \
                         %%T1,  (0*64), 0, \
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
@@ -2214,7 +2278,7 @@
 %xdefine %%GHASH_TYPE start_reduce
 %endif
 
-        GHASH_16        %%GHASH_TYPE, %%TO_REDUCE_H, %%TO_REDUCE_L, \
+        GHASH_16        %%GHASH_TYPE, hk_load, %%TO_REDUCE_H, %%TO_REDUCE_L, \
                         rsp, %%GHASHIN_BLK_OFFSET, 0, %%GDATA, %%HASHKEY_OFFSET, 0, %%HASH_IN_OUT, \
                         %%ZT00, %%ZT01, %%ZT02, %%ZT03, %%ZT04, %%ZT05, %%ZT06, %%ZT07, \
                         %%ZT08, %%ZT09, %%ZT23
@@ -3248,7 +3312,7 @@
         sub             DWORD(%%HASHK_PTR), DWORD(%%IA0)
 
         ;; ==== GHASH 32 blocks and follow with reduction
-        GHASH_16        start, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (0 * 16), %%GDATA_KEY, %%HASHK_PTR, 0, %%AAD_HASHz, \
+        GHASH_16        start, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (0 * 16), %%GDATA_KEY, %%HASHK_PTR, 0, %%AAD_HASHz, \
                         %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
 
         ;; ==== GHASH 1 x 16 blocks with reduction + cipher and ghash on the reminder
@@ -3314,7 +3378,7 @@
                 no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in
 
         ;; ==== GHASH 16 blocks with reduction
-        GHASH_16        end_reduce, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (32 * 16), %%GDATA_KEY, HashKey_16, 0, %%AAD_HASHz, \
+        GHASH_16        end_reduce, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (32 * 16), %%GDATA_KEY, HashKey_16, 0, %%AAD_HASHz, \
                         %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
 
         ;; ==== GHASH 1 x 16 blocks with reduction + cipher and ghash on the reminder
@@ -3374,7 +3438,7 @@
                 first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz
 
         ;; ==== GHASH 1 x 16 blocks
-        GHASH_16        mid, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (16 * 16), %%GDATA_KEY, HashKey_32, 0, no_hash_input, \
+        GHASH_16        mid, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (16 * 16), %%GDATA_KEY, HashKey_32, 0, no_hash_input, \
                         %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
 
         ;; ==== GHASH 1 x 16 blocks with reduction + cipher and ghash on the reminder
-- 
GitLab


From fa7d1b4c148d3925540d3ddcd9029392d5a1da1c Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 20 Jan 2023 10:34:22 +0000
Subject: [PATCH 169/332] avx512: [gcm] GHASH_16_ENCRYPT_16_PARALLEL extended
 to support hash limb operation

---
 lib/avx512_t2/gcm_vaes_avx512.inc | 84 +++++++++++++++++++++++--------
 1 file changed, 64 insertions(+), 20 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 00b3ded8..274a1aa9 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -2119,7 +2119,7 @@
 
 %if do_reduction != 0
         ;; THH1 holds reduced hash value
-        ;; - normally do "vmovdqa64 XWORD(%%HASH_IN_OUT), XWORD(%%GH1H)"
+        ;; - normally do "vmovdqa64 XWORD(%%HASH_IN_OUT), XWORD(%%THH1)"
         ;; - register rename trick obsoletes the above move
 %endif
 
@@ -2293,7 +2293,7 @@
 ;;; - encrypts 16 blocks at a time
 ;;; - ghash the 16 previously encrypted ciphertext blocks
 ;;; - no partial block or multi_call handling here
-%macro  GHASH_16_ENCRYPT_16_PARALLEL 41
+%macro  GHASH_16_ENCRYPT_16_PARALLEL 42
 %define %%GDATA                 %1  ; [in] key pointer
 %define %%CIPH_PLAIN_OUT        %2  ; [in] pointer to output buffer
 %define %%PLAIN_CIPH_IN         %3  ; [in] pointer to input buffer
@@ -2331,10 +2331,12 @@
 %define %%ADDBE_1234            %35 ; [in] ZMM with 4x128bits 1, 2, 3 and 4 in big-endian
 %define %%TO_REDUCE_L           %36 ; [in/out] ZMM for low 4x128-bit GHASH sum
 %define %%TO_REDUCE_H           %37 ; [in/out] ZMM for hi 4x128-bit GHASH sum
-%define %%DO_REDUCTION          %38 ; [in] "no_reduction", "final_reduction", "first_time"
+%define %%DO_REDUCTION          %38 ; [in] "no_reduction", "final_reduction", "first_time" or
+                                    ; "final_reduction_no_hxor"
 %define %%ENC_DEC               %39 ; [in] cipher direction
 %define %%DATA_DISPL            %40 ; [in] fixed numerical data displacement/offset
 %define %%GHASH_IN              %41 ; [in] current GHASH value or "no_ghash_in"
+%define %%HK_LOAD_TYPE          %42 ; [in] hash key load type: hk_load or hk_bcast
 
 %define %%B00_03 %%ZT1
 %define %%B04_07 %%ZT2
@@ -2369,6 +2371,28 @@
 %define %%GHDAT1  %%ZT21
 %define %%GHDAT2  %%ZT22
 
+%assign hk_broadcast 0          ; normal load
+%assign do_hash_reduction 0     ; no reduction
+%assign do_hash_hxor 0          ; no hxor on reduced hash
+%assign is_hash_start 0         ; continue with hash
+
+%ifidn %%HK_LOAD_TYPE, hk_bcast
+%assign hk_broadcast 1
+%endif
+
+%ifidn %%DO_REDUCTION, final_reduction
+%assign do_hash_reduction 1
+%assign do_hash_hxor 1
+%endif
+
+%ifidn %%DO_REDUCTION, final_reduction_no_hxor
+%assign do_hash_reduction 1
+%endif
+
+%ifidn %%DO_REDUCTION, first_time
+%assign is_hash_start 1
+%endif
+
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; prepare counter blocks
 
@@ -2400,8 +2424,13 @@
 %else
         vmovdqa64       %%GHDAT1, [rsp + %%GHASHIN_BLK_OFFSET + (0*64)]
 %endif
+%if hk_broadcast != 0
+        vbroadcastf64x2 %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (0*64)]
+        vbroadcastf64x2 %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (0*64) + HKeyGap]
+%else
         vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (0*64)]
         vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (0*64) + HKeyGap]
+%endif
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; save counter for the next round
@@ -2433,8 +2462,13 @@
         vpclmulqdq      %%THL1, %%GHDAT1, %%GHKEY1, 0x01     ; THL = MH*HL
         vpclmulqdq      %%THH1, %%GHDAT1, %%GHKEY1, 0x11     ; THH = MH*HH
 
+%if hk_broadcast != 0
+        vbroadcastf64x2 %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (1*64)]
+        vbroadcastf64x2 %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (1*64) + HKeyGap]
+%else
         vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (1*64)]
         vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (1*64) + HKeyGap]
+%endif
         vmovdqa64       %%GHDAT1, [rsp + %%GHASHIN_BLK_OFFSET + (2*64)]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2452,8 +2486,13 @@
         vpclmulqdq      %%THL2, %%GHDAT2, %%GHKEY1, 0x01     ; THL = MH*HL
         vpclmulqdq      %%THH2, %%GHDAT2, %%GHKEY1, 0x11     ; THH = MH*HH
 
+%if hk_broadcast != 0
+        vbroadcastf64x2 %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (2*64)]
+        vbroadcastf64x2 %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (2*64) + HKeyGap]
+%else
         vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (2*64)]
         vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (2*64) + HKeyGap]
+%endif
         vmovdqa64       %%GHDAT2, [rsp + %%GHASHIN_BLK_OFFSET + (3*64)]
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2471,8 +2510,13 @@
         vpclmulqdq      %%THL3, %%GHDAT1, %%GHKEY1, 0x01     ; THL = MH*HL
         vpclmulqdq      %%THH3, %%GHDAT1, %%GHKEY1, 0x11     ; THH = MH*HH
 
+%if hk_broadcast != 0
+        vbroadcastf64x2 %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (3*64)]
+        vbroadcastf64x2 %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (3*64) + HKeyGap]
+%else
         vmovdqu64       %%GHKEY1, [%%GDATA + %%HASHKEY_OFFSET + (3*64)]
         vmovdqu64       %%GHKEY2, [%%GDATA + %%HASHKEY_OFFSET + (3*64) + HKeyGap]
+%endif
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES rounds 3
@@ -2528,8 +2572,8 @@
         vbroadcastf64x2 %%AESKEY1, [%%GDATA + (16 * 8)]
 
         ;; =================================================
-        ;; gather GHASH in GH1L (low) and GH1H (high)
-%ifidn %%DO_REDUCTION, first_time
+        ;; gather GHASH in TO_REDUCE_H/L
+%if is_hash_start != 0
         vpxorq          %%TO_REDUCE_L, %%TLL2, %%THL2
         vpxorq          %%TO_REDUCE_H, %%THH2, %%TLH2
         vpternlogq      %%TO_REDUCE_L, %%TLL1, %%THL1, 0x96
@@ -2552,7 +2596,7 @@
 
         ;; =================================================
         ;; new reduction
-%ifidn %%DO_REDUCTION, final_reduction
+%if do_hash_reduction != 0
         vpclmulqdq      %%THH1, %%TO_REDUCE_L, [rel POLY], 0x10
         vpshufd         %%TO_REDUCE_L, %%TO_REDUCE_L, 01001110b
         vpternlogq      %%THH1, %%TO_REDUCE_H, %%TO_REDUCE_L, 0x96
@@ -2566,6 +2610,12 @@
         vaesenc         %%B12_15, %%B12_15, %%AESKEY1
         vbroadcastf64x2 %%AESKEY1, [%%GDATA + (16 * 10)]
 
+        ;; =================================================
+        ;; horizontal xor of 4 reduced hashes
+%if do_hash_hxor != 0
+        VHPXORI4x128    %%THH1, %%TLL1
+%endif
+
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; AES round 9
         vaesenc         %%B00_03, %%B00_03, %%AESKEY2
@@ -2606,12 +2656,6 @@
 %endif ; GCM256 / NROUNDS = 13 (15 including the first and the last)
 %endif ; GCM192 / NROUNDS = 11 (13 including the first and the last)
 
-        ;; =================================================
-        ;; horizontal xor of 4 reduced hashes
-%ifidn %%DO_REDUCTION, final_reduction
-        VHPXORI4x128    %%THH1, %%TLL1
-%endif
-
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; the last AES round
         vaesenclast     %%B00_03, %%B00_03, %%AESKEY1
@@ -2654,9 +2698,9 @@
         vmovdqa64       [rsp + %%AESOUT_BLK_OFFSET + (2*64)], %%B08_11
         vmovdqa64       [rsp + %%AESOUT_BLK_OFFSET + (3*64)], %%B12_15
 
-%ifidn %%DO_REDUCTION, final_reduction
+%if do_hash_reduction != 0
         ;; =================================================
-        ;; Return GHASH value  through %%GH1H / %THH1
+        ;; Return GHASH value  through %THH1
 %endif
 
 %endmacro                       ; GHASH_16_ENCRYPT_16_PARALLEL
@@ -3243,7 +3287,7 @@
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz
+                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_load
 
         ;; ==== AES-CTR + GHASH - 16 blocks, no reduction
 %assign aesout_offset (STACK_LOCAL_OFFSET + (0 * 16))
@@ -3260,7 +3304,7 @@
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in
+                no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in, hk_load
 
         ;; ==== AES-CTR + GHASH - 16 blocks, reduction
 %assign aesout_offset (STACK_LOCAL_OFFSET + (16 * 16))
@@ -3277,7 +3321,7 @@
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                final_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in
+                final_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in, hk_load
 
         ;; === xor cipher block 0 with GHASH (ZT4)
         vmovdqa64       %%AAD_HASHx, XWORD(%%ZTMP4)
@@ -3358,7 +3402,7 @@
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz
+                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_load
 
         ;; ==== AES-CTR + GHASH - 16 blocks, no reduction
 %assign aesout_offset (STACK_LOCAL_OFFSET + (0 * 16))
@@ -3375,7 +3419,7 @@
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in
+                no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in, hk_load
 
         ;; ==== GHASH 16 blocks with reduction
         GHASH_16        end_reduce, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (32 * 16), %%GDATA_KEY, HashKey_16, 0, %%AAD_HASHz, \
@@ -3435,7 +3479,7 @@
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz
+                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_load
 
         ;; ==== GHASH 1 x 16 blocks
         GHASH_16        mid, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (16 * 16), %%GDATA_KEY, HashKey_32, 0, no_hash_input, \
-- 
GitLab


From abd348aa85c29ed9b25bc0835897ff9ccf2838b3 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 20 Jan 2023 12:40:28 +0000
Subject: [PATCH 170/332] avx512: [gcm] apply limb hash approach in the by 48
 loop

---
 lib/avx512_t2/gcm_vaes_avx512.inc | 66 ++++++++++++++++++++++++++++++-
 1 file changed, 64 insertions(+), 2 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 274a1aa9..44f7d246 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -3271,6 +3271,68 @@
         ;; ====
         ;; ==== AES-CTR + GHASH - 48 blocks loop
         ;; ====
+%%_encrypt_very_big_nblocks:
+        cmp             %%LENGTH, (2* big_loop_nblocks * 16)
+        jb              %%_encrypt_big_nblocks
+
+        ;; ==== AES-CTR + GHASH - 16 blocks, start
+%assign aesout_offset (STACK_LOCAL_OFFSET + (32 * 16))
+%assign data_in_out_offset (0 * 16)
+%assign ghashin_offset (STACK_LOCAL_OFFSET + (0 * 16))
+
+        GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
+                %%CTR_BLOCKz, %%CTR_CHECK, \
+                HashKey_48, aesout_offset, ghashin_offset, %%SHUF_MASK, \
+                %%ZTMP0,  %%ZTMP1,  %%ZTMP2,  %%ZTMP3, \
+                %%ZTMP4,  %%ZTMP5,  %%ZTMP6,  %%ZTMP7, \
+                %%ZTMP8,  %%ZTMP9,  %%ZTMP10, %%ZTMP11,\
+                %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
+                %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
+                %%ZTMP20, %%ZTMP21, %%ZTMP22, \
+                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
+                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_bcast
+
+        ;; ==== AES-CTR + GHASH - 16 blocks, no reduction
+%assign aesout_offset (STACK_LOCAL_OFFSET + (0 * 16))
+%assign data_in_out_offset (16 * 16)
+%assign ghashin_offset (STACK_LOCAL_OFFSET + (16 * 16))
+
+        GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
+                %%CTR_BLOCKz, %%CTR_CHECK, \
+                HashKey_32, aesout_offset, ghashin_offset, %%SHUF_MASK, \
+                %%ZTMP0,  %%ZTMP1,  %%ZTMP2,  %%ZTMP3, \
+                %%ZTMP4,  %%ZTMP5,  %%ZTMP6,  %%ZTMP7, \
+                %%ZTMP8,  %%ZTMP9,  %%ZTMP10, %%ZTMP11,\
+                %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
+                %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
+                %%ZTMP20, %%ZTMP21, %%ZTMP22, \
+                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
+                no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in, hk_bcast
+
+        ;; ==== AES-CTR + GHASH - 16 blocks, reduction
+%assign aesout_offset (STACK_LOCAL_OFFSET + (16 * 16))
+%assign data_in_out_offset (32 * 16)
+%assign ghashin_offset (STACK_LOCAL_OFFSET + (32 * 16))
+
+        GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
+                %%CTR_BLOCKz, %%CTR_CHECK, \
+                HashKey_16, aesout_offset, ghashin_offset, %%SHUF_MASK, \
+                %%ZTMP0,  %%ZTMP1,  %%ZTMP2,  %%ZTMP3, \
+                %%ZTMP4,  %%ZTMP5,  %%ZTMP6,  %%ZTMP7, \
+                %%ZTMP8,  %%ZTMP9,  %%ZTMP10, %%ZTMP11,\
+                %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
+                %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
+                %%ZTMP20, %%ZTMP21, %%ZTMP22, \
+                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
+                final_reduction_no_hxor, %%ENC_DEC, data_in_out_offset, no_ghash_in, hk_bcast
+
+        ;; === xor cipher block 0 with GHASH (ZT4)
+        vmovdqa64       %%AAD_HASHz, %%ZTMP4
+
+        add             %%DATA_OFFSET, (big_loop_nblocks * 16)
+        sub             %%LENGTH, (big_loop_nblocks * 16)
+        jmp             %%_encrypt_very_big_nblocks
+
 %%_encrypt_big_nblocks:
         ;; ==== AES-CTR + GHASH - 16 blocks, start
 %assign aesout_offset (STACK_LOCAL_OFFSET + (32 * 16))
@@ -3328,8 +3390,8 @@
 
         add             %%DATA_OFFSET, (big_loop_nblocks * 16)
         sub             %%LENGTH, (big_loop_nblocks * 16)
-        cmp             %%LENGTH, (big_loop_nblocks * 16)
-        jae             %%_encrypt_big_nblocks
+;        cmp             %%LENGTH, (big_loop_nblocks * 16)
+;        jae             %%_encrypt_big_nblocks
 
 %%_no_more_big_nblocks:
 
-- 
GitLab


From c619fc94cbeff54aeb9bd2a4fa8fe0dad59cc621 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 31 Jan 2023 15:55:00 +0000
Subject: [PATCH 171/332] avx512: [gcm] keep 48 hash keys but do reduction
 every 32 blocks with 32 blocks cipher lead

---
 lib/avx512_t2/gcm_vaes_avx512.inc | 213 ++++++------------------------
 1 file changed, 37 insertions(+), 176 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 44f7d246..7e5d504e 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -150,6 +150,15 @@
 %define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _256_ %+ vaes_avx512
 %endif
 
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;; Pipeline parameters
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;; reduction every 32 or 16 blocks
+%define big_loop_nblocks        32
+;; cipher lead (depth) is 32 blocks
+%define big_loop_depth          32
+
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;; Stack frame definition
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -160,7 +169,7 @@
         %define XMM_STORAGE     0
         %define GP_STORAGE      (8*8)   ; space for 7 GP registers + 1 for alignment
 %endif
-%define LOCAL_STORAGE           (48*16) ; space for up to 48 AES blocks
+%define LOCAL_STORAGE           (big_loop_nblocks*16) ; space for cipher text blocks for GHASH
 
 ;;; sequence is (bottom-up): GP, XMM, local
 %define STACK_GP_OFFSET         0
@@ -3136,11 +3145,6 @@
 
 %define %%MASKREG               k1
 
-;; reduction every 48 blocks, depth 32 blocks
-;; @note 48 blocks is the maximum capacity of the stack frame
-%assign big_loop_nblocks        48
-%assign big_loop_depth          32
-
 ;;; Macro flow depending on packet size
 ;;; - LENGTH <= 16 blocks
 ;;;   - cipher followed by hashing (reduction)
@@ -3269,34 +3273,17 @@
         jb              %%_no_more_big_nblocks
 
         ;; ====
-        ;; ==== AES-CTR + GHASH - 48 blocks loop
+        ;; ==== AES-CTR + GHASH - big loop with that uses GHASH limbs (no horizontal XOR applied)
         ;; ====
-%%_encrypt_very_big_nblocks:
-        cmp             %%LENGTH, (2* big_loop_nblocks * 16)
+%%_encrypt_big_nblocks_no_hxor:
+        cmp             %%LENGTH, (2 * big_loop_nblocks * 16)
         jb              %%_encrypt_big_nblocks
 
         ;; ==== AES-CTR + GHASH - 16 blocks, start
-%assign aesout_offset (STACK_LOCAL_OFFSET + (32 * 16))
+%assign aesout_offset (STACK_LOCAL_OFFSET + (0 * 16))
 %assign data_in_out_offset (0 * 16)
 %assign ghashin_offset (STACK_LOCAL_OFFSET + (0 * 16))
 
-        GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
-                %%CTR_BLOCKz, %%CTR_CHECK, \
-                HashKey_48, aesout_offset, ghashin_offset, %%SHUF_MASK, \
-                %%ZTMP0,  %%ZTMP1,  %%ZTMP2,  %%ZTMP3, \
-                %%ZTMP4,  %%ZTMP5,  %%ZTMP6,  %%ZTMP7, \
-                %%ZTMP8,  %%ZTMP9,  %%ZTMP10, %%ZTMP11,\
-                %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
-                %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
-                %%ZTMP20, %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_bcast
-
-        ;; ==== AES-CTR + GHASH - 16 blocks, no reduction
-%assign aesout_offset (STACK_LOCAL_OFFSET + (0 * 16))
-%assign data_in_out_offset (16 * 16)
-%assign ghashin_offset (STACK_LOCAL_OFFSET + (16 * 16))
-
         GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
                 %%CTR_BLOCKz, %%CTR_CHECK, \
                 HashKey_32, aesout_offset, ghashin_offset, %%SHUF_MASK, \
@@ -3307,12 +3294,12 @@
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in, hk_bcast
+                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_bcast
 
         ;; ==== AES-CTR + GHASH - 16 blocks, reduction
 %assign aesout_offset (STACK_LOCAL_OFFSET + (16 * 16))
-%assign data_in_out_offset (32 * 16)
-%assign ghashin_offset (STACK_LOCAL_OFFSET + (32 * 16))
+%assign data_in_out_offset (16 * 16)
+%assign ghashin_offset (STACK_LOCAL_OFFSET + (16 * 16))
 
         GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
                 %%CTR_BLOCKz, %%CTR_CHECK, \
@@ -3331,31 +3318,18 @@
 
         add             %%DATA_OFFSET, (big_loop_nblocks * 16)
         sub             %%LENGTH, (big_loop_nblocks * 16)
-        jmp             %%_encrypt_very_big_nblocks
+        jmp             %%_encrypt_big_nblocks_no_hxor
 
+        ;; ====
+        ;; ==== AES-CTR + GHASH - code idential to big loop but here normal GHASH is applied
+        ;; ====                 - this corrects GHASH limb values if exiting the loop above
+        ;; ====
 %%_encrypt_big_nblocks:
         ;; ==== AES-CTR + GHASH - 16 blocks, start
-%assign aesout_offset (STACK_LOCAL_OFFSET + (32 * 16))
+%assign aesout_offset (STACK_LOCAL_OFFSET + (0 * 16))
 %assign data_in_out_offset (0 * 16)
 %assign ghashin_offset (STACK_LOCAL_OFFSET + (0 * 16))
 
-        GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
-                %%CTR_BLOCKz, %%CTR_CHECK, \
-                HashKey_48, aesout_offset, ghashin_offset, %%SHUF_MASK, \
-                %%ZTMP0,  %%ZTMP1,  %%ZTMP2,  %%ZTMP3, \
-                %%ZTMP4,  %%ZTMP5,  %%ZTMP6,  %%ZTMP7, \
-                %%ZTMP8,  %%ZTMP9,  %%ZTMP10, %%ZTMP11,\
-                %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
-                %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
-                %%ZTMP20, %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_load
-
-        ;; ==== AES-CTR + GHASH - 16 blocks, no reduction
-%assign aesout_offset (STACK_LOCAL_OFFSET + (0 * 16))
-%assign data_in_out_offset (16 * 16)
-%assign ghashin_offset (STACK_LOCAL_OFFSET + (16 * 16))
-
         GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
                 %%CTR_BLOCKz, %%CTR_CHECK, \
                 HashKey_32, aesout_offset, ghashin_offset, %%SHUF_MASK, \
@@ -3366,12 +3340,12 @@
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in, hk_load
+                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_load
 
         ;; ==== AES-CTR + GHASH - 16 blocks, reduction
 %assign aesout_offset (STACK_LOCAL_OFFSET + (16 * 16))
-%assign data_in_out_offset (32 * 16)
-%assign ghashin_offset (STACK_LOCAL_OFFSET + (32 * 16))
+%assign data_in_out_offset (16 * 16)
+%assign ghashin_offset (STACK_LOCAL_OFFSET + (16 * 16))
 
         GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
                 %%CTR_BLOCKz, %%CTR_CHECK, \
@@ -3390,14 +3364,10 @@
 
         add             %%DATA_OFFSET, (big_loop_nblocks * 16)
         sub             %%LENGTH, (big_loop_nblocks * 16)
-;        cmp             %%LENGTH, (big_loop_nblocks * 16)
-;        jae             %%_encrypt_big_nblocks
 
+        ;; fall through
 %%_no_more_big_nblocks:
 
-        cmp             %%LENGTH, (32 * 16)
-        jae             %%_encrypt_32_blocks
-
         cmp             %%LENGTH, (16 * 16)
         jae             %%_encrypt_16_blocks
 
@@ -3406,112 +3376,23 @@
         ;; ==== GHASH 1 x 16 blocks
         ;; ==== GHASH 1 x 16 blocks (reduction) & encrypt N blocks
         ;; ====      then GHASH N blocks
-%%_encrypt_0_blocks_ghash_32:
-        ;; calculate offset to the right hash key
-%ifidn %%INSTANCE_TYPE, multi_call
-        mov             DWORD(%%IA0), DWORD(%%LENGTH)
-%else
-        lea             DWORD(%%IA0), [DWORD(%%LENGTH) + 15]
-%endif
-        and             DWORD(%%IA0), ~15
-        mov             DWORD(%%HASHK_PTR), HashKey_32
-        sub             DWORD(%%HASHK_PTR), DWORD(%%IA0)
-
+%%_encrypt_N_ghash_32_and_N_blocks:
         ;; ==== GHASH 32 blocks and follow with reduction
-        GHASH_16        start, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (0 * 16), %%GDATA_KEY, %%HASHK_PTR, 0, %%AAD_HASHz, \
+        GHASH_16        start, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (0 * 16), %%GDATA_KEY, HashKey_32, 0, %%AAD_HASHz, \
                         %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
 
         ;; ==== GHASH 1 x 16 blocks with reduction + cipher and ghash on the reminder
 %assign ghashin_offset (STACK_LOCAL_OFFSET + (16 * 16))
-        add             DWORD(%%HASHK_PTR), (16 * 16)
 
         GCM_ENC_DEC_LAST \
                 %%GDATA_KEY, %%GDATA_CTX, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, \
                 %%DATA_OFFSET, %%LENGTH, %%CTR_BLOCKz, %%CTR_CHECK, \
-                %%HASHK_PTR, ghashin_offset, %%SHUF_MASK, \
-                %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, \
-                %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP10, %%ZTMP11, %%ZTMP12, %%ZTMP13, \
-                %%ZTMP14, %%ZTMP15, %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, %%ZTMP20, \
-                %%ZTMP21, %%ZTMP22, %%ZTMP23, \
-                %%ADDBE_4x4, %%ADDBE_1234, mid, %%GL, %%GH, \
-                %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
-
-%ifidn %%INSTANCE_TYPE, multi_call
-        vpshufb         %%CTR_BLOCKx, %%CTR_BLOCKx, XWORD(%%SHUF_MASK)
-%endif
-        jmp             %%_ghash_done
-
-        ;; =====================================================
-        ;; =====================================================
-        ;; ==== GHASH & encrypt 1 x 16 blocks
-        ;; ==== GHASH & encrypt 1 x 16 blocks
-        ;; ==== GHASH 1 x 16 blocks (reduction)
-        ;; ==== GHASH 1 x 16 blocks (reduction) & encrypt N blocks
-        ;; ====      then GHASH N blocks
-%%_encrypt_32_blocks:
-        ;; ==== AES-CTR + GHASH - 16 blocks, start
-%assign aesout_offset (STACK_LOCAL_OFFSET + (32 * 16))
-%assign ghashin_offset (STACK_LOCAL_OFFSET + (0 * 16))
-%assign data_in_out_offset (0 * 16)
-
-        GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
-                %%CTR_BLOCKz, %%CTR_CHECK, \
-                HashKey_48, aesout_offset, ghashin_offset, %%SHUF_MASK, \
-                %%ZTMP0,  %%ZTMP1,  %%ZTMP2,  %%ZTMP3, \
-                %%ZTMP4,  %%ZTMP5,  %%ZTMP6,  %%ZTMP7, \
-                %%ZTMP8,  %%ZTMP9,  %%ZTMP10, %%ZTMP11,\
-                %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
-                %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
-                %%ZTMP20, %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_load
-
-        ;; ==== AES-CTR + GHASH - 16 blocks, no reduction
-%assign aesout_offset (STACK_LOCAL_OFFSET + (0 * 16))
-%assign ghashin_offset (STACK_LOCAL_OFFSET + (16 * 16))
-%assign data_in_out_offset (16 * 16)
-
-        GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
-                %%CTR_BLOCKz, %%CTR_CHECK, \
-                HashKey_32, aesout_offset, ghashin_offset, %%SHUF_MASK, \
-                %%ZTMP0,  %%ZTMP1,  %%ZTMP2,  %%ZTMP3, \
-                %%ZTMP4,  %%ZTMP5,  %%ZTMP6,  %%ZTMP7, \
-                %%ZTMP8,  %%ZTMP9,  %%ZTMP10, %%ZTMP11,\
-                %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15,\
-                %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
-                %%ZTMP20, %%ZTMP21, %%ZTMP22, \
-                %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
-                no_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in, hk_load
-
-        ;; ==== GHASH 16 blocks with reduction
-        GHASH_16        end_reduce, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (32 * 16), %%GDATA_KEY, HashKey_16, 0, %%AAD_HASHz, \
-                        %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
-
-        ;; ==== GHASH 1 x 16 blocks with reduction + cipher and ghash on the reminder
-%assign ghashin_offset (STACK_LOCAL_OFFSET + (0 * 16))
-
-        sub             %%LENGTH, (32 * 16)
-        add             %%DATA_OFFSET, (32 * 16)
-
-        ;; calculate offset to the right hash key
-%ifidn %%INSTANCE_TYPE, multi_call
-        mov             DWORD(%%IA0), DWORD(%%LENGTH)
-%else
-        lea             DWORD(%%IA0), [DWORD(%%LENGTH) + 15]
-%endif
-        and             DWORD(%%IA0), ~15
-        mov             DWORD(%%HASHK_PTR), HashKey_16
-        sub             DWORD(%%HASHK_PTR), DWORD(%%IA0)
-
-        GCM_ENC_DEC_LAST \
-                %%GDATA_KEY, %%GDATA_CTX, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, \
-                %%DATA_OFFSET, %%LENGTH, %%CTR_BLOCKz, %%CTR_CHECK, \
-                %%HASHK_PTR, ghashin_offset, %%SHUF_MASK, \
+                HashKey_16, ghashin_offset, %%SHUF_MASK, \
                 %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, \
                 %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP10, %%ZTMP11, %%ZTMP12, %%ZTMP13, \
                 %%ZTMP14, %%ZTMP15, %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, %%ZTMP20, \
                 %%ZTMP21, %%ZTMP22, %%ZTMP23, \
-                %%ADDBE_4x4, %%ADDBE_1234, start, %%GL, %%GH, \
+                %%ADDBE_4x4, %%ADDBE_1234, end_reduce, %%GL, %%GH, \
                 %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
 
 %ifidn %%INSTANCE_TYPE, multi_call
@@ -3521,19 +3402,19 @@
 
         ;; =====================================================
         ;; =====================================================
-        ;; ==== GHASH & encrypt 16 blocks (done before)
+        ;; ==== GHASH & encrypt 16 blocks
         ;; ==== GHASH 1 x 16 blocks
         ;; ==== GHASH 1 x 16 blocks (reduction) & encrypt N blocks
         ;; ====      then GHASH N blocks
 %%_encrypt_16_blocks:
         ;; ==== AES-CTR + GHASH - 16 blocks, start
-%assign aesout_offset (STACK_LOCAL_OFFSET + (32 * 16))
+%assign aesout_offset (STACK_LOCAL_OFFSET + (0 * 16))
 %assign ghashin_offset (STACK_LOCAL_OFFSET + (0 * 16))
 %assign data_in_out_offset (0 * 16)
 
         GHASH_16_ENCRYPT_16_PARALLEL  %%GDATA_KEY, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, %%DATA_OFFSET, \
                 %%CTR_BLOCKz, %%CTR_CHECK, \
-                HashKey_48, aesout_offset, ghashin_offset, %%SHUF_MASK, \
+                HashKey_32, aesout_offset, ghashin_offset, %%SHUF_MASK, \
                 %%ZTMP0,  %%ZTMP1,  %%ZTMP2,  %%ZTMP3, \
                 %%ZTMP4,  %%ZTMP5,  %%ZTMP6,  %%ZTMP7, \
                 %%ZTMP8,  %%ZTMP9,  %%ZTMP10, %%ZTMP11,\
@@ -3544,31 +3425,11 @@
                 first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_load
 
         ;; ==== GHASH 1 x 16 blocks
-        GHASH_16        mid, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (16 * 16), %%GDATA_KEY, HashKey_32, 0, no_hash_input, \
+        GHASH_16        end_reduce, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (16 * 16), %%GDATA_KEY, HashKey_16, 0, %%AAD_HASHz, \
                         %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
 
-        ;; ==== GHASH 1 x 16 blocks with reduction + cipher and ghash on the reminder
-%assign ghashin_offset (STACK_LOCAL_OFFSET + (32 * 16))
-
-        sub             %%LENGTH, (16 * 16)
-        add             %%DATA_OFFSET, (16 * 16)
-
-        GCM_ENC_DEC_LAST \
-                %%GDATA_KEY, %%GDATA_CTX, %%CIPH_PLAIN_OUT, %%PLAIN_CIPH_IN, \
-                %%DATA_OFFSET, %%LENGTH, %%CTR_BLOCKz, %%CTR_CHECK, \
-                HashKey_16, ghashin_offset, %%SHUF_MASK, \
-                %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, \
-                %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP10, %%ZTMP11, %%ZTMP12, %%ZTMP13, \
-                %%ZTMP14, %%ZTMP15, %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, %%ZTMP20, \
-                %%ZTMP21, %%ZTMP22, %%ZTMP23, \
-                %%ADDBE_4x4, %%ADDBE_1234, end_reduce, %%GL, %%GH, \
-                %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
-
-%ifidn %%INSTANCE_TYPE, multi_call
-        vpshufb         %%CTR_BLOCKx, %%CTR_BLOCKx, XWORD(%%SHUF_MASK)
-%endif
-        jmp             %%_ghash_done
-
+        ;; fall through here: handling of the rest is identical in both cases
+        
 %%_message_below_32_blocks:
         ;; 32 > number of blocks > 16
 
-- 
GitLab


From d23fffff8e233d708e3a6c89f349bcef321ed7ac Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 3 Feb 2023 23:18:13 +0000
Subject: [PATCH 172/332] avx512: [ghash] change to do reduction every 32
 blocks vs 48 original

---
 lib/avx512_t2/gcm_vaes_avx512.inc | 92 +++++++------------------------
 1 file changed, 20 insertions(+), 72 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 7e5d504e..bdbdd840 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -850,105 +850,53 @@
 
         vmovdqa64       %%SHFMSK, [rel SHUF_MASK]
 
-%%_get_AAD_loop2x48x16:
-        cmp             %%T2, (2*48*16)
-        jb              %%_get_AAD_loop48x16
+%%_get_AAD_loop2x32x16:
+        cmp             %%T2, (2*32*16)
+        jb              %%_get_AAD_loop32x16
 
         GHASH_16        start, hk_bcast, %%ZT5, %%ZT6, \
-                        %%T1,  (0*64), 0, \
-                        %%GDATA_KEY, HashKey_48, 0, ZWORD(%%AAD_HASH), \
-                        %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
-
-        GHASH_16        mid, hk_bcast, %%ZT5, %%ZT6, \
-                        %%T1,  (4*64), 0, \
-                        %%GDATA_KEY, HashKey_32, 0, NO_HASH_IN_OUT, \
+                        %%T1,  (0*16*16), 0, \
+                        %%GDATA_KEY, HashKey_32, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
         GHASH_16        end_reduce_no_hxor, hk_bcast, %%ZT5, %%ZT6, \
-                        %%T1,  (8*64), 0, \
+                        %%T1,  (1*16*16), 0, \
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
-        add             %%T1, (48*16)
-        sub             %%T2, (48*16)
-        jmp             %%_get_AAD_loop2x48x16
+        add             %%T1, (32*16)
+        sub             %%T2, (32*16)
+        jmp             %%_get_AAD_loop2x32x16
 
-%%_get_AAD_loop48x16:
-        cmp             %%T2, (48*16)
-        jb              %%_exit_AAD_loop48x16
+%%_get_AAD_loop32x16:
+        cmp             %%T2, (32*16)
+        jb              %%_exit_AAD_loop32x16
 
         GHASH_16        start, hk_load, %%ZT5, %%ZT6, \
-                        %%T1,  (0*64), 0, \
-                        %%GDATA_KEY, HashKey_48, 0, ZWORD(%%AAD_HASH), \
-                        %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
-
-        GHASH_16        mid, hk_load, %%ZT5, %%ZT6, \
-                        %%T1,  (4*64), 0, \
-                        %%GDATA_KEY, HashKey_32, 0, NO_HASH_IN_OUT, \
+                        %%T1,  (0*16*16), 0, \
+                        %%GDATA_KEY, HashKey_32, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
         GHASH_16        end_reduce, hk_load, %%ZT5, %%ZT6, \
-                        %%T1,  (8*64), 0, \
+                        %%T1,  (1*16*16), 0, \
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
 
-        sub             %%T2, (12*64)
+        sub             %%T2, (32*16)
         je              %%_CALC_AAD_done
 
-        add             %%T1, (12*64)
-        jmp             %%_get_AAD_loop48x16
+        add             %%T1, (32*16)
+        jmp             %%_get_AAD_loop32x16
 
-%%_exit_AAD_loop48x16:
-        ; Less than 48x16 bytes remaining
+%%_exit_AAD_loop32x16:
+        ; Less than 32x16 bytes remaining
         cmp             %%T2, (16*16)
         jb              %%_less_than_16x16
         je              %%_equal_16x16
-        cmp             %%T2, (32*16)
-        jb              %%_less_than_32x16
-        je              %%_equal_32x16
-
-        ;; calculate offset to hash key to start with
-        lea             %%T3, [%%T2 + 15]
-        and             %%T3, ~15
-        neg             %%T3
-        add             %%T3, HashKey_1 + 16
-
-        ; Get next 16 blocks
-        GHASH_16        start, hk_load, %%ZT5, %%ZT6, \
-                        %%T1,  (0*64), 0, \
-                        %%GDATA_KEY, %%T3, 0, ZWORD(%%AAD_HASH), \
-                        %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
-
-        GHASH_16        mid, hk_load, %%ZT5, %%ZT6, \
-                        %%T1,  (4*64), 0, \
-                        %%GDATA_KEY, {%%T3 + 16*16}, 0, ZWORD(%%AAD_HASH), \
-                        %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
-
-        sub             %%T2, (32*16)
-        add             %%T1, (32*16)
-        jmp             %%_less_than_16x16_remain
-
-%%_equal_32x16:
-        GHASH_16        start, hk_load, %%ZT5, %%ZT6, \
-                        %%T1,  (0*64), 0, \
-                        %%GDATA_KEY, HashKey_32, 0, ZWORD(%%AAD_HASH), \
-                        %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
-
-        GHASH_16        end_reduce, hk_load, %%ZT5, %%ZT6, \
-                        %%T1,  (4*64), 0, \
-                        %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
-                        %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
-        jmp             %%_CALC_AAD_done
 
 %%_less_than_32x16:
         ;; calculate offset to hash key to start with
-- 
GitLab


From b6631fe35b59b1bb7665be9b1f33d244e26a8fa5 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 7 Feb 2023 11:33:39 +0000
Subject: [PATCH 173/332] avx512: [gcm] reduce number of GHASH keys from 48 to
 32

- initialize 32 hash key powers and their products with POLY
- reduce number of hash key storage from 48 to 32
---
 lib/avx512_t2/gcm_vaes_avx512.inc    |  14 +-
 lib/include/gcm_keys_vaes_avx512.inc | 185 +++++++++++----------------
 lib/intel-ipsec-mb.h                 |  10 +-
 3 files changed, 87 insertions(+), 122 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index bdbdd840..b4462e5c 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -753,7 +753,7 @@
         vmovdqu64       [%%GDATA + HashKey_4], %%T5
         vinserti64x2    %%ZT7, %%T5, 0
 
-        ;; calculate HashKeyX = HashKey x POLY
+        ;; calculate HashKeyK = HashKey x POLY
         vpclmulqdq      %%ZT1, %%ZT7, [rel POLY], 0x10
         vpshufd         %%ZT2, %%ZT7, 01001110b   
         vpxorq          %%ZT1, %%ZT1, %%ZT2  
@@ -766,25 +766,24 @@
         ;; calculate HashKey^5<<1 mod poly, HashKey^6<<1 mod poly, ... HashKey^8<<1 mod poly
         GHASH_MUL       %%ZT7, %%ZT5, %%ZT1, %%ZT3, %%ZT4, %%ZT6, %%ZT2
         vmovdqu64       [%%GDATA + HashKey_8], %%ZT7    ;; HashKey^8 to HashKey^5 in ZT7 now
-        
+
         ;; calculate HashKeyX = HashKey x POLY
         vpclmulqdq      %%ZT1, %%ZT7, [rel POLY], 0x10
         vpshufd         %%ZT2, %%ZT7, 01001110b   
         vpxorq          %%ZT1, %%ZT1, %%ZT2  
         vmovdqu64       [%%GDATA + HashKeyK_8], %%ZT1
 
-        
         vshufi64x2      %%ZT5, %%ZT7, %%ZT7, 0x00       ;; broadcast HashKey^8 across all ZT5
 
         ;; calculate HashKey^9<<1 mod poly, HashKey^10<<1 mod poly, ... HashKey^48<<1 mod poly
         ;; use HashKey^8 as multiplier against ZT8 and ZT7 - this allows deeper ooo execution
 %assign i 12
-%rep ((48 - 8) / 8)
+%rep ((big_loop_nblocks - 8) / 8)
         ;; compute HashKey^(4 + n), HashKey^(3 + n), ... HashKey^(1 + n)
         GHASH_MUL       %%ZT8, %%ZT5, %%ZT1, %%ZT3, %%ZT4, %%ZT6, %%ZT2
         vmovdqu64       [%%GDATA + HashKey_ %+ i], %%ZT8
 
-        ;; calculate HashKeyX = HashKey x POLY
+        ;; calculate HashKeyK = HashKey x POLY
         vpclmulqdq      %%ZT1, %%ZT8, [rel POLY], 0x10
         vpshufd         %%ZT2, %%ZT8, 01001110b   
         vpxorq          %%ZT1, %%ZT1, %%ZT2  
@@ -796,7 +795,7 @@
         GHASH_MUL       %%ZT7, %%ZT5, %%ZT1, %%ZT3, %%ZT4, %%ZT6, %%ZT2
         vmovdqu64       [%%GDATA + HashKey_ %+ i], %%ZT7
 
-        ;; calculate HashKeyX = HashKey x POLY
+        ;; calculate HashKeyK = HashKey x POLY
         vpclmulqdq      %%ZT1, %%ZT7, [rel POLY], 0x10
         vpshufd         %%ZT2, %%ZT7, 01001110b   
         vpxorq          %%ZT1, %%ZT1, %%ZT2  
@@ -806,7 +805,6 @@
 %endrep
 %endmacro
 
-
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; CALC_AAD_HASH: Calculates the hash of the data which will not be encrypted.
 ; Input: The input data (A_IN), that data's length (A_LEN), and the hash key (HASH_KEY).
@@ -3269,7 +3267,7 @@
         jmp             %%_encrypt_big_nblocks_no_hxor
 
         ;; ====
-        ;; ==== AES-CTR + GHASH - code idential to big loop but here normal GHASH is applied
+        ;; ==== AES-CTR + GHASH - code identical to big loop but here normal GHASH is applied
         ;; ====                 - this corrects GHASH limb values if exiting the loop above
         ;; ====
 %%_encrypt_big_nblocks:
diff --git a/lib/include/gcm_keys_vaes_avx512.inc b/lib/include/gcm_keys_vaes_avx512.inc
index 5ee02b3e..740333d7 100644
--- a/lib/include/gcm_keys_vaes_avx512.inc
+++ b/lib/include/gcm_keys_vaes_avx512.inc
@@ -28,120 +28,81 @@
 %ifndef GCM_KEYS_VAES_AVX512_INCLUDED
 %define GCM_KEYS_VAES_AVX512_INCLUDED
 
-;; Define the fields of gcm_key_data struct:
-;; uint8_t expanded_keys[GCM_ENC_KEY_LEN * GCM_KEY_SETS];
-;; uint8_t shifted_hkey_9_128[GCM_ENC_KEY_LEN * (128 - 8)];
-;; uint8_t shifted_hkey_8[GCM_ENC_KEY_LEN]; // HashKey^8 <<1 mod poly
-;; uint8_t shifted_hkey_7[GCM_ENC_KEY_LEN]; // HashKey^7 <<1 mod poly
-;; uint8_t shifted_hkey_6[GCM_ENC_KEY_LEN]; // HashKey^6 <<1 mod poly
-;; uint8_t shifted_hkey_5[GCM_ENC_KEY_LEN]; // HashKey^5 <<1 mod poly
-;; uint8_t shifted_hkey_4[GCM_ENC_KEY_LEN]; // HashKey^4 <<1 mod poly
-;; uint8_t shifted_hkey_3[GCM_ENC_KEY_LEN]; // HashKey^3 <<1 mod poly
-;; uint8_t shifted_hkey_2[GCM_ENC_KEY_LEN]; // HashKey^2 <<1 mod poly
-;; uint8_t shifted_hkey_1[GCM_ENC_KEY_LEN]; // HashKey   <<1 mod poly
+;; First 15 128-bit words are reserved for AES round keys
+%xdefine HKeyStart (16 * 15)
 
 ;;
-;; Key structure holds up to 48 ghash keys
+;; Key structure holds up to 32 ghash keys
 ;;
-%define HashKey_48      (16*15)   ; HashKey^48 <<1 mod poly
-%define HashKey_47      (16*16)   ; HashKey^47 <<1 mod poly
-%define HashKey_46      (16*17)   ; HashKey^46 <<1 mod poly
-%define HashKey_45      (16*18)   ; HashKey^45 <<1 mod poly
-%define HashKey_44      (16*19)   ; HashKey^44 <<1 mod poly
-%define HashKey_43      (16*20)   ; HashKey^43 <<1 mod poly
-%define HashKey_42      (16*21)   ; HashKey^42 <<1 mod poly
-%define HashKey_41      (16*22)   ; HashKey^41 <<1 mod poly
-%define HashKey_40      (16*23)   ; HashKey^40 <<1 mod poly
-%define HashKey_39      (16*24)   ; HashKey^39 <<1 mod poly
-%define HashKey_38      (16*25)   ; HashKey^38 <<1 mod poly
-%define HashKey_37      (16*26)   ; HashKey^37 <<1 mod poly
-%define HashKey_36      (16*27)   ; HashKey^36 <<1 mod poly
-%define HashKey_35      (16*28)   ; HashKey^35 <<1 mod poly
-%define HashKey_34      (16*29)   ; HashKey^34 <<1 mod poly
-%define HashKey_33      (16*30)   ; HashKey^33 <<1 mod poly
-%define HashKey_32      (16*31)   ; HashKey^32 <<1 mod poly
-%define HashKey_31      (16*32)   ; HashKey^31 <<1 mod poly
-%define HashKey_30      (16*33)   ; HashKey^30 <<1 mod poly
-%define HashKey_29      (16*34)   ; HashKey^29 <<1 mod poly
-%define HashKey_28      (16*35)   ; HashKey^28 <<1 mod poly
-%define HashKey_27      (16*36)   ; HashKey^27 <<1 mod poly
-%define HashKey_26      (16*37)   ; HashKey^26 <<1 mod poly
-%define HashKey_25      (16*38)   ; HashKey^25 <<1 mod poly
-%define HashKey_24      (16*39)   ; HashKey^24 <<1 mod poly
-%define HashKey_23      (16*40)   ; HashKey^23 <<1 mod poly
-%define HashKey_22      (16*41)   ; HashKey^22 <<1 mod poly
-%define HashKey_21      (16*42)   ; HashKey^21 <<1 mod poly
-%define HashKey_20      (16*43)   ; HashKey^20 <<1 mod poly
-%define HashKey_19      (16*44)   ; HashKey^19 <<1 mod poly
-%define HashKey_18      (16*45)   ; HashKey^18 <<1 mod poly
-%define HashKey_17      (16*46)   ; HashKey^17 <<1 mod poly
-%define HashKey_16      (16*47)   ; HashKey^16 <<1 mod poly
-%define HashKey_15      (16*48)   ; HashKey^15 <<1 mod poly
-%define HashKey_14      (16*49)   ; HashKey^14 <<1 mod poly
-%define HashKey_13      (16*50)   ; HashKey^13 <<1 mod poly
-%define HashKey_12      (16*51)   ; HashKey^12 <<1 mod poly
-%define HashKey_11      (16*52)   ; HashKey^11 <<1 mod poly
-%define HashKey_10      (16*53)   ; HashKey^10 <<1 mod poly
-%define HashKey_9       (16*54)   ; HashKey^9 <<1 mod poly
-%define HashKey_8       (16*55)   ; HashKey^8 <<1 mod poly
-%define HashKey_7       (16*56)   ; HashKey^7 <<1 mod poly
-%define HashKey_6       (16*57)   ; HashKey^6 <<1 mod poly
-%define HashKey_5       (16*58)   ; HashKey^5 <<1 mod poly
-%define HashKey_4       (16*59)   ; HashKey^4 <<1 mod poly
-%define HashKey_3       (16*60)   ; HashKey^3 <<1 mod poly
-%define HashKey_2       (16*61)   ; HashKey^2 <<1 mod poly
-%define HashKey_1       (16*62)   ; HashKey <<1 mod poly
-%define HashKey         (16*62)   ; HashKey <<1 mod poly
+%xdefine HashKey_32     ((16 * 0) + HKeyStart)  ; HashKey^32 <<1 mod poly
+%xdefine HashKey_31     ((16 * 1) + HKeyStart)  ; HashKey^31 <<1 mod poly
+%xdefine HashKey_30     ((16 * 2) + HKeyStart)  ; HashKey^30 <<1 mod poly
+%xdefine HashKey_29     ((16 * 3) + HKeyStart)  ; HashKey^29 <<1 mod poly
+%xdefine HashKey_28     ((16 * 4) + HKeyStart)  ; HashKey^28 <<1 mod poly
+%xdefine HashKey_27     ((16 * 5) + HKeyStart)  ; HashKey^27 <<1 mod poly
+%xdefine HashKey_26     ((16 * 6) + HKeyStart)  ; HashKey^26 <<1 mod poly
+%xdefine HashKey_25     ((16 * 7) + HKeyStart)  ; HashKey^25 <<1 mod poly
+%xdefine HashKey_24     ((16 * 8) + HKeyStart)  ; HashKey^24 <<1 mod poly
+%xdefine HashKey_23     ((16 * 9) + HKeyStart)  ; HashKey^23 <<1 mod poly
+%xdefine HashKey_22     ((16 * 10) + HKeyStart) ; HashKey^22 <<1 mod poly
+%xdefine HashKey_21     ((16 * 11) + HKeyStart) ; HashKey^21 <<1 mod poly
+%xdefine HashKey_20     ((16 * 12) + HKeyStart) ; HashKey^20 <<1 mod poly
+%xdefine HashKey_19     ((16 * 13) + HKeyStart) ; HashKey^19 <<1 mod poly
+%xdefine HashKey_18     ((16 * 14) + HKeyStart) ; HashKey^18 <<1 mod poly
+%xdefine HashKey_17     ((16 * 15) + HKeyStart) ; HashKey^17 <<1 mod poly
+%xdefine HashKey_16     ((16 * 16) + HKeyStart) ; HashKey^16 <<1 mod poly
+%xdefine HashKey_15     ((16 * 17) + HKeyStart) ; HashKey^15 <<1 mod poly
+%xdefine HashKey_14     ((16 * 18) + HKeyStart) ; HashKey^14 <<1 mod poly
+%xdefine HashKey_13     ((16 * 19) + HKeyStart) ; HashKey^13 <<1 mod poly
+%xdefine HashKey_12     ((16 * 20) + HKeyStart) ; HashKey^12 <<1 mod poly
+%xdefine HashKey_11     ((16 * 21) + HKeyStart) ; HashKey^11 <<1 mod poly
+%xdefine HashKey_10     ((16 * 22) + HKeyStart) ; HashKey^10 <<1 mod poly
+%xdefine HashKey_9      ((16 * 23) + HKeyStart) ; HashKey^9 <<1 mod poly
+%xdefine HashKey_8      ((16 * 24) + HKeyStart) ; HashKey^8 <<1 mod poly
+%xdefine HashKey_7      ((16 * 25) + HKeyStart) ; HashKey^7 <<1 mod poly
+%xdefine HashKey_6      ((16 * 26) + HKeyStart) ; HashKey^6 <<1 mod poly
+%xdefine HashKey_5      ((16 * 27) + HKeyStart) ; HashKey^5 <<1 mod poly
+%xdefine HashKey_4      ((16 * 28) + HKeyStart) ; HashKey^4 <<1 mod poly
+%xdefine HashKey_3      ((16 * 29) + HKeyStart) ; HashKey^3 <<1 mod poly
+%xdefine HashKey_2      ((16 * 30) + HKeyStart) ; HashKey^2 <<1 mod poly
+%xdefine HashKey_1      ((16 * 31) + HKeyStart) ; HashKey <<1 mod poly
+%xdefine HashKey        ((16 * 31) + HKeyStart) ; HashKey <<1 mod poly
+
+%xdefine HKeyGap (16 * 32)
+;; (HashKey^n mode POLY) x POLY constants
+
+%xdefine HashKeyK_32    (HashKey_32 + HKeyGap) ; (HashKey^32 <<1 mod poly) x POLY
+%xdefine HashKeyK_31    (HashKey_31 + HKeyGap) ; (HashKey^31 <<1 mod poly) x POLY
+%xdefine HashKeyK_30    (HashKey_30 + HKeyGap) ; (HashKey^30 <<1 mod poly) x POLY
+%xdefine HashKeyK_29    (HashKey_29 + HKeyGap) ; (HashKey^29 <<1 mod poly) x POLY
+%xdefine HashKeyK_28    (HashKey_28 + HKeyGap) ; (HashKey^28 <<1 mod poly) x POLY
+%xdefine HashKeyK_27    (HashKey_27 + HKeyGap) ; (HashKey^27 <<1 mod poly) x POLY
+%xdefine HashKeyK_26    (HashKey_26 + HKeyGap) ; (HashKey^26 <<1 mod poly) x POLY
+%xdefine HashKeyK_25    (HashKey_25 + HKeyGap) ; (HashKey^25 <<1 mod poly) x POLY
+%xdefine HashKeyK_24    (HashKey_24 + HKeyGap) ; (HashKey^24 <<1 mod poly) x POLY
+%xdefine HashKeyK_23    (HashKey_23 + HKeyGap) ; (HashKey^23 <<1 mod poly) x POLY
+%xdefine HashKeyK_22    (HashKey_22 + HKeyGap) ; (HashKey^22 <<1 mod poly) x POLY
+%xdefine HashKeyK_21    (HashKey_21 + HKeyGap) ; (HashKey^21 <<1 mod poly) x POLY
+%xdefine HashKeyK_20    (HashKey_20 + HKeyGap) ; (HashKey^20 <<1 mod poly) x POLY
+%xdefine HashKeyK_19    (HashKey_19 + HKeyGap) ; (HashKey^19 <<1 mod poly) x POLY
+%xdefine HashKeyK_18    (HashKey_18 + HKeyGap) ; (HashKey^18 <<1 mod poly) x POLY
+%xdefine HashKeyK_17    (HashKey_17 + HKeyGap) ; (HashKey^17 <<1 mod poly) x POLY
+%xdefine HashKeyK_16    (HashKey_16 + HKeyGap) ; (HashKey^16 <<1 mod poly) x POLY
+%xdefine HashKeyK_15    (HashKey_15 + HKeyGap) ; (HashKey^15 <<1 mod poly) x POLY
+%xdefine HashKeyK_14    (HashKey_14 + HKeyGap) ; (HashKey^14 <<1 mod poly) x POLY
+%xdefine HashKeyK_13    (HashKey_13 + HKeyGap) ; (HashKey^13 <<1 mod poly) x POLY
+%xdefine HashKeyK_12    (HashKey_12 + HKeyGap) ; (HashKey^12 <<1 mod poly) x POLY
+%xdefine HashKeyK_11    (HashKey_11 + HKeyGap) ; (HashKey^11 <<1 mod poly) x POLY
+%xdefine HashKeyK_10    (HashKey_10 + HKeyGap) ; (HashKey^10 <<1 mod poly) x POLY
+%xdefine HashKeyK_9     (HashKey_9 + HKeyGap)  ; (HashKey^9 <<1 mod poly) x POLY
+%xdefine HashKeyK_8     (HashKey_8 + HKeyGap)  ; (HashKey^8 <<1 mod poly) x POLY
+%xdefine HashKeyK_7     (HashKey_7 + HKeyGap)  ; (HashKey^7 <<1 mod poly) x POLY
+%xdefine HashKeyK_6     (HashKey_6 + HKeyGap)  ; (HashKey^6 <<1 mod poly) x POLY
+%xdefine HashKeyK_5     (HashKey_5 + HKeyGap)  ; (HashKey^5 <<1 mod poly) x POLY
+%xdefine HashKeyK_4     (HashKey_4 + HKeyGap)  ; (HashKey^4 <<1 mod poly) x POLY
+%xdefine HashKeyK_3     (HashKey_3 + HKeyGap)  ; (HashKey^3 <<1 mod poly) x POLY
+%xdefine HashKeyK_2     (HashKey_2 + HKeyGap)  ; (HashKey^2 <<1 mod poly) x POLY
+%xdefine HashKeyK_1     (HashKey_1 + HKeyGap)  ; (HashKey <<1 mod poly) x POLY
+%xdefine HashKeyK       (HashKey + HKeyGap)    ; (HashKey <<1 mod poly) x POLY
 
-%define HKeyGap (16*48)
-;;
-%define HashKeyK_48      (16*15 + 16*48)   ; HashKey^48 <<1 mod poly
-%define HashKeyK_47      (16*16 + 16*48)   ; HashKey^47 <<1 mod poly
-%define HashKeyK_46      (16*17 + 16*48)   ; HashKey^46 <<1 mod poly
-%define HashKeyK_45      (16*18 + 16*48)   ; HashKey^45 <<1 mod poly
-%define HashKeyK_44      (16*19 + 16*48)   ; HashKey^44 <<1 mod poly
-%define HashKeyK_43      (16*20 + 16*48)   ; HashKey^43 <<1 mod poly
-%define HashKeyK_42      (16*21 + 16*48)   ; HashKey^42 <<1 mod poly
-%define HashKeyK_41      (16*22 + 16*48)   ; HashKey^41 <<1 mod poly
-%define HashKeyK_40      (16*23 + 16*48)   ; HashKey^40 <<1 mod poly
-%define HashKeyK_39      (16*24 + 16*48)   ; HashKey^39 <<1 mod poly
-%define HashKeyK_38      (16*25 + 16*48)   ; HashKey^38 <<1 mod poly
-%define HashKeyK_37      (16*26 + 16*48)   ; HashKey^37 <<1 mod poly
-%define HashKeyK_36      (16*27 + 16*48)   ; HashKey^36 <<1 mod poly
-%define HashKeyK_35      (16*28 + 16*48)   ; HashKey^35 <<1 mod poly
-%define HashKeyK_34      (16*29 + 16*48)   ; HashKey^34 <<1 mod poly
-%define HashKeyK_33      (16*30 + 16*48)   ; HashKey^33 <<1 mod poly
-%define HashKeyK_32      (16*31 + 16*48)   ; HashKey^32 <<1 mod poly
-%define HashKeyK_31      (16*32 + 16*48)   ; HashKey^31 <<1 mod poly
-%define HashKeyK_30      (16*33 + 16*48)   ; HashKey^30 <<1 mod poly
-%define HashKeyK_29      (16*34 + 16*48)   ; HashKey^29 <<1 mod poly
-%define HashKeyK_28      (16*35 + 16*48)   ; HashKey^28 <<1 mod poly
-%define HashKeyK_27      (16*36 + 16*48)   ; HashKey^27 <<1 mod poly
-%define HashKeyK_26      (16*37 + 16*48)   ; HashKey^26 <<1 mod poly
-%define HashKeyK_25      (16*38 + 16*48)   ; HashKey^25 <<1 mod poly
-%define HashKeyK_24      (16*39 + 16*48)   ; HashKey^24 <<1 mod poly
-%define HashKeyK_23      (16*40 + 16*48)   ; HashKey^23 <<1 mod poly
-%define HashKeyK_22      (16*41 + 16*48)   ; HashKey^22 <<1 mod poly
-%define HashKeyK_21      (16*42 + 16*48)   ; HashKey^21 <<1 mod poly
-%define HashKeyK_20      (16*43 + 16*48)   ; HashKey^20 <<1 mod poly
-%define HashKeyK_19      (16*44 + 16*48)   ; HashKey^19 <<1 mod poly
-%define HashKeyK_18      (16*45 + 16*48)   ; HashKey^18 <<1 mod poly
-%define HashKeyK_17      (16*46 + 16*48)   ; HashKey^17 <<1 mod poly
-%define HashKeyK_16      (16*47 + 16*48)   ; HashKey^16 <<1 mod poly
-%define HashKeyK_15      (16*48 + 16*48)   ; HashKey^15 <<1 mod poly
-%define HashKeyK_14      (16*49 + 16*48)   ; HashKey^14 <<1 mod poly
-%define HashKeyK_13      (16*50 + 16*48)   ; HashKey^13 <<1 mod poly
-%define HashKeyK_12      (16*51 + 16*48)   ; HashKey^12 <<1 mod poly
-%define HashKeyK_11      (16*52 + 16*48)   ; HashKey^11 <<1 mod poly
-%define HashKeyK_10      (16*53 + 16*48)   ; HashKey^10 <<1 mod poly
-%define HashKeyK_9       (16*54 + 16*48)   ; HashKey^9 <<1 mod poly
-%define HashKeyK_8       (16*55 + 16*48)   ; HashKey^8 <<1 mod poly
-%define HashKeyK_7       (16*56 + 16*48)   ; HashKey^7 <<1 mod poly
-%define HashKeyK_6       (16*57 + 16*48)   ; HashKey^6 <<1 mod poly
-%define HashKeyK_5       (16*58 + 16*48)   ; HashKey^5 <<1 mod poly
-%define HashKeyK_4       (16*59 + 16*48)   ; HashKey^4 <<1 mod poly
-%define HashKeyK_3       (16*60 + 16*48)   ; HashKey^3 <<1 mod poly
-%define HashKeyK_2       (16*61 + 16*48)   ; HashKey^2 <<1 mod poly
-%define HashKeyK_1       (16*62 + 16*48)   ; HashKey <<1 mod poly
-%define HashKeyK         (16*62 + 16*48)   ; HashKey <<1 mod poly
 %endif ; GCM_KEYS_VAES_AVX512_INCLUDED
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index b6f5c625..5ee4cc22 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -776,10 +776,16 @@ struct gcm_key_data {
                 } avx2_avx512;
                 struct {
                         /**
+                         * Start with:
                          * (HashKey<<1 mod poly), (HashKey^2<<1 mod poly), ...,
-                         * (Hashkey^48<<1 mod poly)
+                         * (Hashkey^32<<1 mod poly)
+                         *
+                         * Followed by:
+                         * (HashKey<<1 mod poly) x POLY,
+                         * (HashKey^2<<1 mod poly) x POLY, ...,
+                         * (Hashkey^32<<1 mod poly) x POLY
                          */
-                        uint8_t shifted_hkey[IMB_GCM_ENC_KEY_LEN * 48 * 2];
+                        uint8_t shifted_hkey[IMB_GCM_ENC_KEY_LEN * 32 * 2];
                 } vaes_avx512;
         } ghash_keys;
 }
-- 
GitLab


From 38c72daf0f88032ab0a97d001c6f2ac0194bb86f Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 10 Mar 2023 13:48:04 +0000
Subject: [PATCH 174/332] avx512: [gcm] remove by48 from AES-GCM modules

---
 lib/Makefile                                   |  6 +++---
 ...x512.asm => aes128_gcm_api_vaes_avx512.asm} |  0
 ....asm => aes128_gcm_sgl_api_vaes_avx512.asm} |  0
 ...512.asm => aes128_gmac_api_vaes_avx512.asm} |  0
 ...x512.asm => aes192_gcm_api_vaes_avx512.asm} |  0
 ....asm => aes192_gcm_sgl_api_vaes_avx512.asm} |  0
 ...512.asm => aes192_gmac_api_vaes_avx512.asm} |  0
 ...x512.asm => aes256_gcm_api_vaes_avx512.asm} |  0
 ....asm => aes256_gcm_sgl_api_vaes_avx512.asm} |  0
 ...512.asm => aes256_gmac_api_vaes_avx512.asm} |  0
 lib/win_x64.mak                                | 18 +++++++++---------
 11 files changed, 12 insertions(+), 12 deletions(-)
 rename lib/avx512_t2/{aes128_gcm_by48_api_vaes_avx512.asm => aes128_gcm_api_vaes_avx512.asm} (100%)
 rename lib/avx512_t2/{aes128_gcm_by48_sgl_api_vaes_avx512.asm => aes128_gcm_sgl_api_vaes_avx512.asm} (100%)
 rename lib/avx512_t2/{aes128_gmac_by48_api_vaes_avx512.asm => aes128_gmac_api_vaes_avx512.asm} (100%)
 rename lib/avx512_t2/{aes192_gcm_by48_api_vaes_avx512.asm => aes192_gcm_api_vaes_avx512.asm} (100%)
 rename lib/avx512_t2/{aes192_gcm_by48_sgl_api_vaes_avx512.asm => aes192_gcm_sgl_api_vaes_avx512.asm} (100%)
 rename lib/avx512_t2/{aes192_gmac_by48_api_vaes_avx512.asm => aes192_gmac_api_vaes_avx512.asm} (100%)
 rename lib/avx512_t2/{aes256_gcm_by48_api_vaes_avx512.asm => aes256_gcm_api_vaes_avx512.asm} (100%)
 rename lib/avx512_t2/{aes256_gcm_by48_sgl_api_vaes_avx512.asm => aes256_gcm_sgl_api_vaes_avx512.asm} (100%)
 rename lib/avx512_t2/{aes256_gmac_by48_api_vaes_avx512.asm => aes256_gmac_api_vaes_avx512.asm} (100%)

diff --git a/lib/Makefile b/lib/Makefile
index 53b70f9e..375b5c1d 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -714,9 +714,9 @@ asm_avx2_gcm_objs := \
 	aes128_gcm_by8_avx2.o aes192_gcm_by8_avx2.o aes256_gcm_by8_avx2.o
 
 asm_avx512_gcm_objs := \
-	aes128_gcm_by48_api_vaes_avx512.o aes192_gcm_by48_api_vaes_avx512.o aes256_gcm_by48_api_vaes_avx512.o \
-	aes128_gcm_by48_sgl_api_vaes_avx512.o aes192_gcm_by48_sgl_api_vaes_avx512.o aes256_gcm_by48_sgl_api_vaes_avx512.o \
-	aes128_gmac_by48_api_vaes_avx512.o aes192_gmac_by48_api_vaes_avx512.o aes256_gmac_by48_api_vaes_avx512.o \
+	aes128_gcm_api_vaes_avx512.o aes192_gcm_api_vaes_avx512.o aes256_gcm_api_vaes_avx512.o \
+	aes128_gcm_sgl_api_vaes_avx512.o aes192_gcm_sgl_api_vaes_avx512.o aes256_gcm_sgl_api_vaes_avx512.o \
+	aes128_gmac_api_vaes_avx512.o aes192_gmac_api_vaes_avx512.o aes256_gmac_api_vaes_avx512.o \
 	aes128_gcm_by8_avx512.o aes192_gcm_by8_avx512.o aes256_gcm_by8_avx512.o
 
 #
diff --git a/lib/avx512_t2/aes128_gcm_by48_api_vaes_avx512.asm b/lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm
similarity index 100%
rename from lib/avx512_t2/aes128_gcm_by48_api_vaes_avx512.asm
rename to lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm
diff --git a/lib/avx512_t2/aes128_gcm_by48_sgl_api_vaes_avx512.asm b/lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm
similarity index 100%
rename from lib/avx512_t2/aes128_gcm_by48_sgl_api_vaes_avx512.asm
rename to lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm
diff --git a/lib/avx512_t2/aes128_gmac_by48_api_vaes_avx512.asm b/lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm
similarity index 100%
rename from lib/avx512_t2/aes128_gmac_by48_api_vaes_avx512.asm
rename to lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm
diff --git a/lib/avx512_t2/aes192_gcm_by48_api_vaes_avx512.asm b/lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm
similarity index 100%
rename from lib/avx512_t2/aes192_gcm_by48_api_vaes_avx512.asm
rename to lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm
diff --git a/lib/avx512_t2/aes192_gcm_by48_sgl_api_vaes_avx512.asm b/lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm
similarity index 100%
rename from lib/avx512_t2/aes192_gcm_by48_sgl_api_vaes_avx512.asm
rename to lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm
diff --git a/lib/avx512_t2/aes192_gmac_by48_api_vaes_avx512.asm b/lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm
similarity index 100%
rename from lib/avx512_t2/aes192_gmac_by48_api_vaes_avx512.asm
rename to lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm
diff --git a/lib/avx512_t2/aes256_gcm_by48_api_vaes_avx512.asm b/lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm
similarity index 100%
rename from lib/avx512_t2/aes256_gcm_by48_api_vaes_avx512.asm
rename to lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm
diff --git a/lib/avx512_t2/aes256_gcm_by48_sgl_api_vaes_avx512.asm b/lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm
similarity index 100%
rename from lib/avx512_t2/aes256_gcm_by48_sgl_api_vaes_avx512.asm
rename to lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm
diff --git a/lib/avx512_t2/aes256_gmac_by48_api_vaes_avx512.asm b/lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm
similarity index 100%
rename from lib/avx512_t2/aes256_gmac_by48_api_vaes_avx512.asm
rename to lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 6a923a7e..aa74a81a 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -547,21 +547,21 @@ gcm_objs = \
 	$(OBJ_DIR)\aes128_gcm_by8_avx.obj \
 	$(OBJ_DIR)\aes128_gcm_by8_avx2.obj \
 	$(OBJ_DIR)\aes128_gcm_by8_avx512.obj \
-	$(OBJ_DIR)\aes128_gcm_by48_api_vaes_avx512.obj \
-	$(OBJ_DIR)\aes128_gcm_by48_sgl_api_vaes_avx512.obj \
-	$(OBJ_DIR)\aes128_gmac_by48_api_vaes_avx512.obj \
+	$(OBJ_DIR)\aes128_gcm_api_vaes_avx512.obj \
+	$(OBJ_DIR)\aes128_gcm_sgl_api_vaes_avx512.obj \
+	$(OBJ_DIR)\aes128_gmac_api_vaes_avx512.obj \
 	$(OBJ_DIR)\aes192_gcm_by8_avx.obj \
 	$(OBJ_DIR)\aes192_gcm_by8_avx2.obj \
 	$(OBJ_DIR)\aes192_gcm_by8_avx512.obj \
-	$(OBJ_DIR)\aes192_gcm_by48_api_vaes_avx512.obj \
-	$(OBJ_DIR)\aes192_gcm_by48_sgl_api_vaes_avx512.obj \
-	$(OBJ_DIR)\aes192_gmac_by48_api_vaes_avx512.obj \
+	$(OBJ_DIR)\aes192_gcm_api_vaes_avx512.obj \
+	$(OBJ_DIR)\aes192_gcm_sgl_api_vaes_avx512.obj \
+	$(OBJ_DIR)\aes192_gmac_api_vaes_avx512.obj \
 	$(OBJ_DIR)\aes256_gcm_by8_avx.obj \
 	$(OBJ_DIR)\aes256_gcm_by8_avx2.obj \
 	$(OBJ_DIR)\aes256_gcm_by8_avx512.obj \
-	$(OBJ_DIR)\aes256_gcm_by48_api_vaes_avx512.obj \
-	$(OBJ_DIR)\aes256_gcm_by48_sgl_api_vaes_avx512.obj \
-	$(OBJ_DIR)\aes256_gmac_by48_api_vaes_avx512.obj \
+	$(OBJ_DIR)\aes256_gcm_api_vaes_avx512.obj \
+	$(OBJ_DIR)\aes256_gcm_sgl_api_vaes_avx512.obj \
+	$(OBJ_DIR)\aes256_gmac_api_vaes_avx512.obj \
 	$(OBJ_DIR)\gcm128_api_by8_sse.obj \
 	$(OBJ_DIR)\gcm128_sgl_api_by8_sse.obj \
 	$(OBJ_DIR)\gcm128_gmac_api_by8_sse.obj \
-- 
GitLab


From e2dd83b31ff6daadf8ad0374994d4fafa8835e50 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 10 Mar 2023 14:12:48 +0000
Subject: [PATCH 175/332] doc: [gcm] update about avx512-type2 aes-gcm
 implementation

---
 README.md | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/README.md b/README.md
index a6c7110b..f38d50ef 100644
--- a/README.md
+++ b/README.md
@@ -65,9 +65,9 @@ Table 1. List of supported cipher algorithms and their implementations.
 | Encryption     +-----------------------------------------------------|
 |                | x86_64 | SSE    | AVX    | AVX2   | AVX512 | VAES(5)|
 |----------------+--------+--------+--------+--------+--------+--------|
-| AES128-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |
-| AES192-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |
-| AES256-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |
+| AES128-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
+| AES192-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
+| AES256-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
 | AES128-CCM     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |
 | AES256-CCM     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |
 | AES128-CBC     | N      | Y(1)   | Y(3)   | N      | N      | Y(6)   |
@@ -138,9 +138,9 @@ Table 2. List of supported integrity algorithms and their implementations.
 | SHA2-256          | N      | Y(2)x4 | Y   x4 | Y   x8 | Y  x16 | N      |
 | SHA2-384          | N      | Y   x2 | Y   x2 | Y   x4 | Y   x8 | N      |
 | SHA2-512          | N      | Y   x2 | Y   x2 | Y   x4 | Y   x8 | N      |
-| AES128-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |
-| AES192-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |
-| AES256-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |
+| AES128-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
+| AES192-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
+| AES256-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
 | NULL              | Y      | N      | N      | N      | N      | N      |
 | AES128-CCM        | N      | Y(5)x4 | Y   x8 | N      | N      | Y x16  |
 | AES256-CCM        | N      | Y(5)x4 | Y   x8 | N      | N      | Y x16  |
@@ -154,8 +154,8 @@ Table 2. List of supported integrity algorithms and their implementations.
 | HEC               | N      | Y      | Y      | N      | N      | N      |
 | POLY1305          | Y      | N      | N      | Y(9)   | Y      | Y      |
 | POLY1305 AEAD     | Y      | N      | N      | Y(9)   | Y      | Y      |
-| SNOW-V AEAD       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |
-| GHASH             | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |
+| SNOW-V AEAD       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
+| GHASH             | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
 | CRC(6)            | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |
 | PON-CRC-BIP(7)    | N      | Y      | Y      | N      | N      | Y      |
 +-------------------------------------------------------------------------+
-- 
GitLab


From cbb13b24630f7f3b43e8ee759223e21d3d453cc7 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 23 Mar 2023 09:11:28 +0000
Subject: [PATCH 176/332] lib: add dev option to disable self-tests

---
 lib/x86_64/self_test.c | 12 ++++++++----
 1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/lib/x86_64/self_test.c b/lib/x86_64/self_test.c
index 0a0c563e..490fed36 100644
--- a/lib/x86_64/self_test.c
+++ b/lib/x86_64/self_test.c
@@ -32,6 +32,8 @@
 #include "intel-ipsec-mb.h"
 #include "arch_x86_64.h"
 
+#ifndef NO_SELF_TEST_DEV
+
 static int process_job(IMB_MGR *p_mgr)
 {
         IMB_JOB *job = IMB_SUBMIT_JOB(p_mgr);
@@ -1495,6 +1497,8 @@ static int self_test_aead(IMB_MGR *p_mgr)
         return 1;
 }
 
+#endif /* NO_SELF_TEST_DEV */
+
 /*
  * =============================================================================
  * SELF-TEST INTERNAL API
@@ -1505,6 +1509,10 @@ IMB_DLL_LOCAL int self_test(IMB_MGR *p_mgr)
 {
         int ret = 1;
 
+#ifdef NO_SELF_TEST_DEV
+        p_mgr->features &= ~(IMB_FEATURE_SELF_TEST |
+                             IMB_FEATURE_SELF_TEST_PASS);
+#else
         p_mgr->features |= IMB_FEATURE_SELF_TEST;
         p_mgr->features &= ~IMB_FEATURE_SELF_TEST_PASS;
 
@@ -1520,10 +1528,6 @@ IMB_DLL_LOCAL int self_test(IMB_MGR *p_mgr)
         if (ret)
                 p_mgr->features |= IMB_FEATURE_SELF_TEST_PASS;
 
-#ifdef NO_SELF_TEST_DEV
-        p_mgr->features &= ~(IMB_FEATURE_SELF_TEST |
-                             IMB_FEATURE_SELF_TEST_PASS);
-        ret = 1;
 #endif
 
         return ret;
-- 
GitLab


From 2bb181376e987e16ddff90eba566c47ad677f80a Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 27 Mar 2023 11:37:09 +0100
Subject: [PATCH 177/332] cmake: remove compiler dependency generation flag

---
 lib/cmake/unix.cmake  | 3 ---
 test/cmake/unix.cmake | 3 ---
 2 files changed, 6 deletions(-)

diff --git a/lib/cmake/unix.cmake b/lib/cmake/unix.cmake
index 39374fdb..3aa78757 100644
--- a/lib/cmake/unix.cmake
+++ b/lib/cmake/unix.cmake
@@ -48,9 +48,6 @@ set(CMAKE_C_FLAGS
 -Wsign-compare -Wno-endif-labels -Wstrict-prototypes \
 -Wmissing-prototypes -Wold-style-definition \
 -fno-delete-null-pointer-checks -fwrapv -std=c99")
-if(${CMAKE_SYSTEM_NAME} MATCHES "Linux")
-    string(APPEND CMAKE_C_FLAGS " -MMD")
-endif()
 set(CMAKE_C_FLAGS_DEBUG "-g -DDEBUG -O0")
 set(CMAKE_C_FLAGS_RELEASE "-fstack-protector -D_FORTIFY_SOURCE=2 -O3")
 set(CMAKE_SHARED_LINKER_FLAGS "-Wl,-z,noexecstack -Wl,-z,relro -Wl,-z,now -lc")
diff --git a/test/cmake/unix.cmake b/test/cmake/unix.cmake
index 6820de29..cab15839 100644
--- a/test/cmake/unix.cmake
+++ b/test/cmake/unix.cmake
@@ -43,9 +43,6 @@ set(CMAKE_C_FLAGS
 -Wformat-security -Wunreachable-code -Wmissing-noreturn -Wsign-compare \
 -Wno-endif-labels -Wstrict-prototypes -Wmissing-prototypes \
 -Wold-style-definition -fno-delete-null-pointer-checks -fwrapv -std=c99")
-if(${CMAKE_SYSTEM_NAME} MATCHES "Linux")
-    string(APPEND CMAKE_C_FLAGS " -MMD")
-endif()
 set(CMAKE_C_FLAGS_DEBUG "-O0 -DDEBUG -g")
 set(CMAKE_C_FLAGS_RELEASE "-O3")
 set(CMAKE_EXE_LINKER_FLAGS "-fPIE -z noexecstack -z relro -z now")
-- 
GitLab


From 7a52f6c83805cfeb8f808a61792640d92cb8b86a Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 7 Feb 2023 20:34:59 +0000
Subject: [PATCH 178/332] avx512: [gcm] no GP register needs to be cleared with
 SAFE_DATA option

---
 lib/avx512_t2/gcm_vaes_avx512.inc | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index b4462e5c..5cef0f44 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -2718,7 +2718,6 @@
 %macro FUNC_RESTORE 0
 
 %ifdef SAFE_DATA
-        clear_scratch_gps_asm
         clear_scratch_zmms_asm
 %else
         vzeroupper
-- 
GitLab


From 347415a03bcb9fc3fbd93102295f86ac1fd093f0 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 21 Feb 2023 09:48:55 +0000
Subject: [PATCH 179/332] lib: added macro for clearing selected registers
 using EVEX opcodes

---
 lib/include/clear_regs.inc | 33 +++++++++++++++++++++++++++++++++
 1 file changed, 33 insertions(+)

diff --git a/lib/include/clear_regs.inc b/lib/include/clear_regs.inc
index 2dc8dcaa..af1337f7 100644
--- a/lib/include/clear_regs.inc
+++ b/lib/include/clear_regs.inc
@@ -63,6 +63,39 @@
 %endrep
 %endmacro
 
+;
+; This macro clears any ZMM registers passed on
+;
+%macro clear_zmms_avx512 1-32
+
+%assign num_reg %0
+%assign num_xors 3
+
+; clear up to 3 registers with vpxorq
+%if num_reg < 3
+%assign num_xors num_reg
+%endif
+
+; save 1st register for later
+%xdefine %%SAVE_XMM XWORD(%1)
+
+%rep num_xors
+        vpxorq          XWORD(%1), XWORD(%1), XWORD(%1)
+%rotate 1
+%endrep
+
+; clear the rest of the registers with move from the 1st register
+%assign num_reg (num_reg - num_xors)
+
+%rep num_reg
+        vmovdqa64       XWORD(%1), %%SAVE_XMM
+%rotate 1
+%endrep
+
+%undef %%SAVE_XMM
+
+%endmacro
+
 ;
 ; This macro clears scratch GP registers
 ; for Windows or Linux
-- 
GitLab


From 663124d3b28bf4e988d911a9a1b59ba0d6787588 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 7 Feb 2023 21:06:45 +0000
Subject: [PATCH 180/332] avx512: [gcm] optimized SAFE_DATA selection for
 AVX512 type2 implementation

- marked registers that may contain sensitive data with '**'
  - added comments about the registers with the code flow
- added more granular SAFE_DATA sections to clear sensitive data with
  minimum performance impact
- removed clearing GP registers from FUNC_RESTORE for SAFE_DATA
- optimized SIMD register clearing in specific API's
- using clear register macro in GCM, GMAC and GHASH API's
---
 lib/avx512_t2/gcm_api_vaes_avx512.inc      |  21 ++-
 lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc |  41 +++--
 lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc  |  20 ++-
 lib/avx512_t2/gcm_vaes_avx512.inc          | 197 +++++++++++++--------
 4 files changed, 191 insertions(+), 88 deletions(-)

diff --git a/lib/avx512_t2/gcm_api_vaes_avx512.inc b/lib/avx512_t2/gcm_api_vaes_avx512.inc
index db26dbcf..c8b94050 100644
--- a/lib/avx512_t2/gcm_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_api_vaes_avx512.inc
@@ -30,6 +30,7 @@
 %include "avx512_t2/gcm_vaes_avx512.inc"
 %include "include/error.inc"
 %include "include/os.inc"
+%include "include/clear_regs.inc"
 
 %ifndef GCM_API_VAES_AVX512_INC
 %define GCM_API_VAES_AVX512_INC
@@ -80,6 +81,10 @@ FN_NAME(precomp,_):
 
         PRECOMPUTE arg1, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm7, xmm8
 
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8
+%endif
+
         FUNC_RESTORE
 exit_precomp:
 
@@ -179,6 +184,9 @@ skip_aad_check_enc:
                 zmm12, zmm13, zmm15, zmm16, zmm17, zmm18, zmm19, zmm20, single_call
         GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC, single_call
         GCM_COMPLETE arg1, arg2, arg9, arg10, single_call, k1, r10, r11, r12
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm6
+%endif
 
 exit_enc:
         FUNC_RESTORE
@@ -313,7 +321,9 @@ skip_aad_check_dec:
                 zmm12, zmm13, zmm15, zmm16, zmm17, zmm18, zmm19, zmm20, single_call
         GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
         GCM_COMPLETE arg1, arg2, arg9, arg10, single_call, k1, r10, r11, r12
-
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm6
+%endif
 exit_dec:
         FUNC_RESTORE
         ret
@@ -465,7 +475,10 @@ iv_len_12_enc_IV:
 skip_iv_len_12_enc_IV:
         GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC, single_call
         GCM_COMPLETE arg1, arg2, arg10, arg11, single_call, k1, r10, r11, r12
-
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm1, xmm4, xmm6, xmm7, xmm8, xmm12, xmm13, xmm14, \
+                          xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm26, xmm30, xmm31
+%endif
 exit_enc_IV:
         FUNC_RESTORE
         ret
@@ -620,6 +633,10 @@ skip_iv_len_12_dec_IV:
         GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
         GCM_COMPLETE arg1, arg2, arg10, arg11, single_call, k1, r10, r11, r12
 
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm1, xmm4, xmm6, xmm7, xmm8, xmm12, xmm13, xmm14, \
+                          xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm26, xmm30, xmm31
+%endif
 exit_dec_IV:
         FUNC_RESTORE
         ret
diff --git a/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc b/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
index 8ca8df8d..39083173 100644
--- a/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
@@ -29,6 +29,7 @@
 
 %include "avx512_t2/gcm_vaes_avx512.inc"
 %include "include/error.inc"
+%include "include/clear_regs.inc"
 
 %ifndef GCM_GMAC_API_VAES_AVX512_INC
 %define GCM_GMAC_API_VAES_AVX512_INC
@@ -79,7 +80,9 @@ ghash_pre_vaes_avx512:
         vmovdqu  [arg2 + HashKey], xmm6                 ; store HashKey<<1 mod poly
 
         PRECOMPUTE arg2, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm7, xmm8
-
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8
+%endif
         FUNC_RESTORE
 exit_ghash_pre:
 
@@ -141,16 +144,19 @@ ghash_vaes_avx512:
 
         ;; copy tag to xmm0
         vmovdqu	xmm0, [arg4]
-        vpshufb xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
+        vpshufb xmm0, xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
 
         CALC_AAD_HASH arg2, arg3, xmm0, arg1, zmm1, zmm2, zmm3, zmm4, zmm5, \
                       zmm6, zmm7, zmm8, zmm9, zmm10, zmm11, zmm12, zmm13, \
                       zmm15, zmm16, zmm17, zmm18, zmm19, r10, r11, r12, k1
+        ;; **zmm2, zmm3, zmm4 and zmm5 may contain clear text
+        ;; **zmm13, zmm15, zmm18 and zmm8 may contain authentication key
 
-        vpshufb xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
-
+        vpshufb xmm0, xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
         simd_store_avx arg4, xmm0, arg5, r12, rax
-
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm0, xmm2, xmm3, xmm4, xmm5, xmm13, xmm15, xmm8, xmm18
+%endif
 exit_ghash:
         FUNC_RESTORE
         ret
@@ -227,9 +233,10 @@ GMAC_FN_NAME(update):
 	vmovdqu64	xmm8, [arg2 + AadHash]
 
 	PARTIAL_BLOCK_GMAC arg1, arg2, arg3, arg4, r11, xmm8, r10, r12, rax, \
-                           zmm0, zmm1, zmm2, zmm3, zmm4, zmm5, zmm6, zmm7, \
-                           zmm9, zmm10, k1
-
+                           zmm0, zmm1, zmm2, zmm3, zmm4, zmm5, zmm6, zmm7, k1
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm0
+%endif
         ; CALC_AAD_HASH needs to deal with multiple of 16 bytes
         sub     arg4, r11
         add     arg3, r11
@@ -246,6 +253,12 @@ GMAC_FN_NAME(update):
                       zmm16, zmm17, zmm18, zmm19, zmm20, r10, r11, r12, k1
 	vmovdqu64	[arg2 + AadHash], xmm8	; ctx_data.aad hash = aad_hash
 
+        ;; **zmm2, zmm3, zmm4 and zmm5 may contain clear text
+        ;; **zmm19 may contain authentication key
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm2, xmm3, xmm4, xmm5, xmm18, xmm19
+%endif
+
 no_full_blocks:
         add     arg3, arg4 ; Point at partial block
 
@@ -256,13 +269,15 @@ no_full_blocks:
         ; Save next partial block
         mov	[arg2 + PBlockLen], arg4
         READ_SMALL_DATA_INPUT_AVX512 xmm1, arg3, arg4, r11, k1
-        vpshufb xmm1, [rel SHUF_MASK]
-        vpxorq   xmm8, xmm1
+        vpshufb xmm1, xmm1, [rel SHUF_MASK]
+        vpxorq  xmm8, xmm8, xmm1
         vmovdqu64 [arg2 + AadHash], xmm8
-
+%ifdef SAFE_DATA
+        ;; **xmm1 may contain some clear text
+        clear_zmms_avx512 xmm1
+%endif
 exit_gmac_update:
-	FUNC_RESTORE
-
+        FUNC_RESTORE
 	ret
 
 %ifdef SAFE_PARAM
diff --git a/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc b/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
index ab19ebfc..d376e326 100644
--- a/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
@@ -30,6 +30,7 @@
 %include "avx512_t2/gcm_vaes_avx512.inc"
 %include "include/error.inc"
 %include "include/os.inc"
+%include "include/clear_regs.inc"
 
 %ifndef GCM_SGL_API_VAES_AVX512_INC
 %define GCM_SGL_API_VAES_AVX512_INC
@@ -256,6 +257,9 @@ FN_NAME(enc,_update_):
         jz      error_update_enc
 %endif
         GCM_ENC_DEC arg1, arg2, arg3, arg4, arg5, ENC, multi_call
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm6
+%endif
 
 exit_update_enc:
         FUNC_RESTORE
@@ -339,7 +343,9 @@ FN_NAME(dec,_update_):
 %endif
 
         GCM_ENC_DEC arg1, arg2, arg3, arg4, arg5, DEC, multi_call
-
+%ifdef SAFE_DATA
+        clear_zmms_avx512 xmm6
+%endif
 exit_update_dec:
         FUNC_RESTORE
         ret
@@ -413,9 +419,11 @@ FN_NAME(enc,_finalize_):
 
         FUNC_SAVE
         GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call, k1, r10, r11, r12
-
+%ifdef SAFE_DATA
+        ;; **xmm5, xmm6, xmm11, xmm13, xmm14 and xmm16 may contain sensitive data
+        clear_zmms_avx512 xmm5, xmm6, xmm11, xmm13, xmm14, xmm16
+%endif
         FUNC_RESTORE
-
 exit_enc_fin:
         ret
 
@@ -483,8 +491,12 @@ FN_NAME(dec,_finalize_):
         FUNC_SAVE
         GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call, k1, r10, r11, r12
 
-        FUNC_RESTORE
+%ifdef SAFE_DATA
+        ;; **xmm5, xmm6, xmm11, xmm13, xmm14 and xmm16 may contain sensitive data
+        clear_zmms_avx512 xmm5, xmm6, xmm11, xmm13, xmm14, xmm16
+%endif
 
+        FUNC_RESTORE
 exit_dec_fin:
         ret
 
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 5cef0f44..adf750d3 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -234,9 +234,9 @@
 %define %%ZTMP5 %17     ; [clobbered] temporary ZMM
 %define %%ZTMP6 %18     ; [clobbered] temporary ZMM
 %define %%ZTMP7 %19     ; [clobbered] temporary ZMM
-%define %%ZTMP8 %20     ; [clobbered] temporary ZMM
-%define %%ZTMP9 %21     ; [clobbered] temporary ZMM
-%define %%ZTMPA %22     ; [clobbered] temporary ZMM
+%define %%ZTMP8 %20     ; [clobbered**] temporary ZMM
+%define %%ZTMP9 %21     ; [clobbered**] temporary ZMM
+%define %%ZTMPA %22     ; [clobbered**] temporary ZMM
 %define %%SHUFM %23     ; [in] ZMM with shuffle mask - provided only when input data needs shuffling
 
 %assign start_ghash 0
@@ -363,6 +363,7 @@
         vpternlogq      %%GL, %%ZTMP6, %%ZTMP4, 0x96        ; T2 = THL + TLL
         vpternlogq      %%GH, %%ZTMP7, %%ZTMP5, 0x96        ; T1 = THH + TLH
 
+        ;; **ZTMP8 and ZTMPA include hash keys
 %if do_reduction != 0
         ;; new reduction
         vpclmulqdq      %%HASH, %%GL, [rel POLY], 0x10
@@ -395,10 +396,10 @@
 %define %%HK1           %11     ; [clobbered] temporary ZMM
 %define %%HK2           %12     ; [clobbered] temporary ZMM
 %define %%AAD_HASH_IN   %13     ; [in] input hash value
-%define %%CIPHER_IN0    %14     ; [in] ZMM with cipher text blocks 0-3
-%define %%CIPHER_IN1    %15     ; [in] ZMM with cipher text blocks 4-7
-%define %%CIPHER_IN2    %16     ; [in] ZMM with cipher text blocks 8-11
-%define %%CIPHER_IN3    %17     ; [in] ZMM with cipher text blocks 12-15
+%define %%CIPHER_IN0    %14     ; [in**] ZMM with cipher text blocks 0-3
+%define %%CIPHER_IN1    %15     ; [in**] ZMM with cipher text blocks 4-7
+%define %%CIPHER_IN2    %16     ; [in**] ZMM with cipher text blocks 8-11
+%define %%CIPHER_IN3    %17     ; [in**] ZMM with cipher text blocks 12-15
 %define %%NUM_BLOCKS    %18     ; [in] numerical value, number of blocks
 %define %%GH            %19     ; [in] ZMM with hi product part
 %define %%GL            %20     ; [in] ZMM with lo product part
@@ -717,14 +718,14 @@
 %macro  PRECOMPUTE 10
 %define %%GDATA %1      ;; [in/out] GPR, pointer to GCM key data structure, content updated
 %define %%HK    %2      ;; [in] xmm, hash key
-%define %%T1    %3      ;; [clobbered] xmm
-%define %%T2    %4      ;; [clobbered] xmm
+%define %%T1    %3      ;; [clobbered**] xmm
+%define %%T2    %4      ;; [clobbered**] xmm
 %define %%T3    %5      ;; [clobbered] xmm
 %define %%T4    %6      ;; [clobbered] xmm
-%define %%T5    %7      ;; [clobbered] xmm
+%define %%T5    %7      ;; [clobbered**] xmm
 %define %%T6    %8      ;; [clobbered] xmm
-%define %%T7    %9      ;; [clobbered] xmm
-%define %%T8    %10     ;; [clobbered] xmm
+%define %%T7    %9      ;; [clobbered**] xmm
+%define %%T8    %10     ;; [clobbered**] xmm
 
 %xdefine %%ZT1 ZWORD(%%T1)
 %xdefine %%ZT2 ZWORD(%%T2)
@@ -752,16 +753,19 @@
         GHASH_MUL       %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2
         vmovdqu64       [%%GDATA + HashKey_4], %%T5
         vinserti64x2    %%ZT7, %%T5, 0
+        ;; **ZT5 amd ZT7 to be cleared (hash key)
 
         ;; calculate HashKeyK = HashKey x POLY
         vpclmulqdq      %%ZT1, %%ZT7, [rel POLY], 0x10
         vpshufd         %%ZT2, %%ZT7, 01001110b   
         vpxorq          %%ZT1, %%ZT1, %%ZT2  
         vmovdqu64       [%%GDATA + HashKeyK_4], %%ZT1
+        ;; **ZT1 amd ZT2 to be cleared (hash key)
 
         ;; switch to 4x128-bit computations now
         vshufi64x2      %%ZT5, %%ZT5, %%ZT5, 0x00       ;; broadcast HashKey^4 across all ZT5
         vmovdqa64       %%ZT8, %%ZT7                    ;; save HashKey^4 to HashKey^1 in ZT8
+        ;; **ZT8 to be cleared (hash key)
 
         ;; calculate HashKey^5<<1 mod poly, HashKey^6<<1 mod poly, ... HashKey^8<<1 mod poly
         GHASH_MUL       %%ZT7, %%ZT5, %%ZT1, %%ZT3, %%ZT4, %%ZT6, %%ZT2
@@ -816,10 +820,10 @@
 %define %%AAD_HASH      %3      ; [in/out] xmm ghash value
 %define %%GDATA_KEY     %4      ; [in] pointer to keys
 %define %%ZT0           %5      ; [clobbered] ZMM register
-%define %%ZT1           %6      ; [clobbered] ZMM register
-%define %%ZT2           %7      ; [clobbered] ZMM register
-%define %%ZT3           %8      ; [clobbered] ZMM register
-%define %%ZT4           %9      ; [clobbered] ZMM register
+%define %%ZT1           %6      ; [clobbered**] ZMM register
+%define %%ZT2           %7      ; [clobbered**] ZMM register
+%define %%ZT3           %8      ; [clobbered**] ZMM register
+%define %%ZT4           %9      ; [clobbered**] ZMM register
 %define %%ZT5           %10     ; [clobbered] ZMM register
 %define %%ZT6           %11     ; [clobbered] ZMM register
 %define %%ZT7           %12     ; [clobbered] ZMM register
@@ -863,7 +867,7 @@
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
-
+        ;; **ZT1 can potentially include clear text, ZT16 & ZT17 hash key
         add             %%T1, (32*16)
         sub             %%T2, (32*16)
         jmp             %%_get_AAD_loop2x32x16
@@ -883,7 +887,7 @@
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
-
+        ;; **ZT1 can potentially include clear text, ZT16 & ZT17 hash key
         sub             %%T2, (32*16)
         je              %%_CALC_AAD_done
 
@@ -908,6 +912,7 @@
                         %%GDATA_KEY, %%T3, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
+        ;; **ZT1 can potentially include clear text, ZT16 & ZT17 hash key
         sub             %%T2, (16*16)
         add             %%T1, (16*16)
         jmp             %%_less_than_16x16_remain
@@ -918,6 +923,7 @@
                         %%GDATA_KEY, HashKey_16, 0, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT8, %%ZT9, %%ZT10, %%ZT11, %%ZT12, \
                         %%ZT14, %%ZT15, %%ZT16, %%ZT1, %%ZT7, %%SHFMSK
+        ;; **ZT1 can potentially include clear text, ZT16 & ZT17 hash key
         jmp             %%_CALC_AAD_done
 
         ; Less than 16x16 bytes remaining
@@ -979,19 +985,21 @@
 
         ZMM_LOAD_MASKED_BLOCKS_0_16 \
                         I, %%T1, 0, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT17, %%MASKREG
+                        %%ZT1, %%ZT2, %%ZT3, %%ZT4, %%MASKREG
 
         ZMM_OPCODE3_DSTR_SRC1R_SRC2R_BLOCKS_0_16 \
                         I, vpshufb, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT17, \
-                        %%ZT14, %%ZT15, %%ZT16, %%ZT17, \
+                        %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
+                        %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
                         %%SHFMSK, %%SHFMSK, %%SHFMSK, %%SHFMSK
+        ;; **ZT1, ZT2, ZT3, ZT4 contain clear text
 
         GHASH_1_TO_16 %%GDATA_KEY, ZWORD(%%AAD_HASH), \
-                        %%ZT0, %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
+                        %%ZT0, %%ZT14, %%ZT15, %%ZT16, %%ZT17, \
                         %%ZT9, %%ZT10, %%ZT11, %%ZT12, %%ZT7, \
-                        ZWORD(%%AAD_HASH), %%ZT14, %%ZT15, %%ZT16, %%ZT17, I, \
+                        ZWORD(%%AAD_HASH), %%ZT1, %%ZT2, %%ZT3, %%ZT4, I, \
                         %%ZT5, %%ZT6
+        ;; **ZT16 and ZT17 may not get cleared above when number of blocks is below 4
         jmp             %%_CALC_AAD_done
 
 %assign I (I - 1)
@@ -1070,6 +1078,7 @@
                         %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
                         %%ZT1, %%ZT2, %%ZT3, %%ZT4, \
                         %%SHFMSK, %%SHFMSK, %%SHFMSK, %%SHFMSK
+        ;; **ZT1, ZT2, ZT3, ZT4 contain clear text
 
         GHASH_1_TO_16 %%GDATA_KEY, ZWORD(%%AAD_HASH), \
                         %%ZT0, %%ZT5, %%ZT6, %%ZT7, %%ZT8, \
@@ -1110,7 +1119,7 @@
 %define %%GPTMP1                %10 ; [clobbered] GP temporary register
 %define %%GPTMP2                %11 ; [clobbered] GP temporary register
 %define %%ZTMP0                 %12 ; [clobbered] ZMM temporary register
-%define %%ZTMP1                 %13 ; [clobbered] ZMM temporary register
+%define %%ZTMP1                 %13 ; [clobbered**] ZMM temporary register
 %define %%ZTMP2                 %14 ; [clobbered] ZMM temporary register
 %define %%ZTMP3                 %15 ; [clobbered] ZMM temporary register
 %define %%ZTMP4                 %16 ; [clobbered] ZMM temporary register
@@ -1144,6 +1153,7 @@
 
         READ_SMALL_DATA_INPUT_LEN_BT16_AVX512 %%XTMP0, %%PLAIN_CIPH_IN, %%PLAIN_CIPH_LEN, \
                                               %%IA0, %%IA2, %%MASKREG
+        ;; **XTMP0 includes plain text
 
         ;; XTMP1 = my_ctx_data.partial_block_enc_key
         vmovdqu64       %%XTMP1, [%%GDATA_CTX + PBlockEncKey]
@@ -1160,8 +1170,10 @@
 %ifidn  %%ENC_DEC, DEC
         ;;  keep copy of cipher text in %%XTMP4
         vmovdqa64       %%XTMP4, %%XTMP0
+        ;; **XTMP4 includes cipher text (not sensitive)
 %endif
         vpxorq          %%XTMP1, %%XTMP0      ; Ciphertext XOR E(K, Yn)
+        ;; **XTMP1 may contain clear text (decrypt direction)
 
         ;; Set %%IA1 to be the amount of data left in CIPH_PLAIN_IN after filling the block
         ;; Determine if partial block is not being filled and shift mask accordingly
@@ -1178,6 +1190,7 @@
         ;; get the appropriate mask to mask out bottom %%LENGTH bytes of %%XTMP1
         ;; - mask out bottom %%LENGTH bytes of %%XTMP1
         vmovdqu64       %%XTMP0, [%%IA0 + ALL_F - SHIFT_MASK]
+        ;; **XTMP0 (potentially clear text) gets cleared with a shift mask
         vpand           %%XTMP1, %%XTMP0
 
 %ifidn  %%ENC_DEC, DEC
@@ -1250,11 +1263,11 @@
 %define %%DAT3                  %14 ; [out] ZMM with cipher text shuffled for GHASH
 %define %%LAST_CIPHER_BLK       %15 ; [out] XMM to put ciphered counter block partially xor'ed with text
 %define %%LAST_GHASH_BLK        %16 ; [out] XMM to put last cipher text block shuffled for GHASH
-%define %%CTR0                  %17 ; [clobbered] ZMM temporary
-%define %%CTR1                  %18 ; [clobbered] ZMM temporary
-%define %%CTR2                  %19 ; [clobbered] ZMM temporary
-%define %%CTR3                  %20 ; [clobbered] ZMM temporary
-%define %%ZT1                   %21 ; [clobbered] ZMM temporary
+%define %%CTR0                  %17 ; [clobbered**] ZMM temporary
+%define %%CTR1                  %18 ; [clobbered**] ZMM temporary
+%define %%CTR2                  %19 ; [clobbered**] ZMM temporary
+%define %%CTR3                  %20 ; [clobbered**] ZMM temporary
+%define %%ZT1                   %21 ; [clobbered**] ZMM temporary
 %define %%IA0                   %22 ; [clobbered] GP temporary
 %define %%IA1                   %23 ; [clobbered] GP temporary
 %define %%MASKREG               %24 ; [clobbered] mask register
@@ -1331,6 +1344,7 @@
                         %%NUM_BLOCKS, NROUNDS
 %assign j (j + 1)
 %endrep
+        ;; **DAT0, DAT1, DAT2, DAT3 may contain clear text
 
 %ifidn %%INSTANCE_TYPE, multi_call
         ;; retrieve the last cipher counter block (partially XOR'ed with text)
@@ -1348,6 +1362,7 @@
         ;; write cipher/plain text back to output and
         ZMM_STORE_MASKED_BLOCKS_0_16 %%NUM_BLOCKS, %%CIPH_PLAIN_OUT, %%DATA_OFFSET, \
                         %%CTR0, %%CTR1, %%CTR2, %%CTR3, %%MASKREG
+        ;; **CTR0, CTR1, CTR2, CTR3 may contain clear text
 
         ;; zero bytes outside the mask before hashing
 %if %%NUM_BLOCKS <= 4
@@ -1377,6 +1392,7 @@
                         %%CTR0, %%CTR1, %%CTR2, %%CTR3, \
                         %%SHUFMASK, %%SHUFMASK, %%SHUFMASK, %%SHUFMASK
 %endif                          ; Encrypt
+        ;; **DAT0, DAT1, DAT2, DAT3 overwritten with shuffled cipher text
 
 %ifidn %%INSTANCE_TYPE, multi_call
         ;; Extract the last block for partials and multi_call cases
@@ -1441,6 +1457,7 @@
                         %%ZT5, %%ZT6, %%ZT7, %%ZT8, %%ZT9, ZWORD(%%HASH_IN_OUT), \
                         %%DAT0, %%DAT1, %%DAT2, %%DAT3, %%NUM_BLOCKS, %%GH, %%GL
 %endif
+        ;; **DAT0, DAT1, DAT2, DAT3 are OK here - they contain shuffled cipher text
 
 %else
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -1484,6 +1501,8 @@
         jmp             %%_small_initial_compute_done
 %endif                          ; %if %%NUM_BLOCKS < 16
 
+        ;; **DAT0, DAT1, DAT2, DAT3 are OK here - they contain shuffled cipher text
+
 %%_small_initial_partial_block:
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -1517,6 +1536,7 @@
                         %%ZT5, %%ZT6, %%ZT7, %%ZT8, %%ZT9, ZWORD(%%HASH_IN_OUT), \
                         %%DAT0, %%DAT1, %%DAT2, %%DAT3, k, %%GH, %%GL
 %endif
+        ;; **DAT0, DAT1, DAT2, DAT3 are OK here - they contain shuffled cipher text
         ;; just fall through no jmp needed
 %else
 
@@ -1592,16 +1612,16 @@
 %define %%ENC_DEC               %10 ; [in] cipher direction (ENC/DEC)
 %define %%INSTANCE_TYPE         %11 ; [in] multi_call or single_call
 %define %%CTR0                  %12 ; [clobbered] ZMM temporary
-%define %%CTR1                  %13 ; [clobbered] ZMM temporary
-%define %%CTR2                  %14 ; [clobbered] ZMM temporary
-%define %%CTR3                  %15 ; [clobbered] ZMM temporary
+%define %%CTR1                  %13 ; [clobbered**] ZMM temporary
+%define %%CTR2                  %14 ; [clobbered**] ZMM temporary
+%define %%CTR3                  %15 ; [clobbered**] ZMM temporary
 %define %%DAT0                  %16 ; [clobbered] ZMM temporary
 %define %%DAT1                  %17 ; [clobbered] ZMM temporary
 %define %%DAT2                  %18 ; [clobbered] ZMM temporary
 %define %%DAT3                  %19 ; [clobbered] ZMM temporary
 %define %%LAST_CIPHER_BLK       %20 ; [clobbered] ZMM temporary
 %define %%LAST_GHASH_BLK        %21 ; [clobbered] ZMM temporary
-%define %%ZT0                   %22 ; [clobbered] ZMM temporary
+%define %%ZT0                   %22 ; [clobbered**] ZMM temporary
 %define %%ZT1                   %23 ; [clobbered] ZMM temporary
 %define %%ZT2                   %24 ; [clobbered] ZMM temporary
 %define %%ZT3                   %25 ; [clobbered] ZMM temporary
@@ -1619,7 +1639,7 @@
                         XWORD(%%LAST_CIPHER_BLK), XWORD(%%LAST_GHASH_BLK), \
                         %%CTR0, %%CTR1, %%CTR2, %%CTR3, %%ZT0, \
                         %%IA0, %%IA1, %%MASKREG, %%SHUFMASK
-
+        ;; **CTR0, CTR1, CTR2, CTR3, %%ZT0 may contain sensitive data
         INITIAL_BLOCKS_PARTIAL_GHASH \
                         %%GDATA_KEY, %%GDATA_CTX, %%LENGTH, \
                         %%NUM_BLOCKS, %%HASH_IN_OUT, %%ENC_DEC, \
@@ -1627,6 +1647,8 @@
                         XWORD(%%LAST_CIPHER_BLK), XWORD(%%LAST_GHASH_BLK), \
                         %%CTR0, %%CTR1, %%CTR2, %%CTR3, %%ZT0, %%ZT1, \
                         %%ZT2, %%ZT3, %%ZT4, %%ZT5
+        ;; **CTR1 may not get cleared (message below 4 blocks) and it may still contain sensitive data
+        ;; **CTR1, CTR2, CTR3 may not get cleared (message below 16 bytes & SGL) and may still contain sensitive data
 
 %endmacro                       ; INITIAL_BLOCKS_PARTIAL
 
@@ -1647,7 +1669,7 @@
 %define %%GHASHIN_BLK_OFFSET    %10 ; [in] numerical offset for GHASH blocks in
 %define %%SHFMSK                %11 ; [in] ZMM with byte swap mask for pshufb
 %define %%B00_03                %12 ; [clobbered] temporary ZMM
-%define %%B04_07                %13 ; [clobbered] temporary ZMM
+%define %%B04_07                %13 ; [clobbered**] temporary ZMM
 %define %%B08_11                %14 ; [clobbered] temporary ZMM
 %define %%B12_15                %15 ; [clobbered] temporary ZMM
 %define %%GHKEY3                %16 ; [clobbered] temporary ZMM
@@ -1662,8 +1684,8 @@
 %define %%THL3                  %25 ; [clobbered] temporary ZMM
 %define %%TLH3                  %26 ; [clobbered] temporary ZMM
 %define %%TLL3                  %27 ; [clobbered] temporary ZMM
-%define %%AESKEY1               %28 ; [clobbered] temporary ZMM
-%define %%AESKEY2               %29 ; [clobbered] temporary ZMM
+%define %%AESKEY1               %28 ; [clobbered**] temporary ZMM
+%define %%AESKEY2               %29 ; [clobbered**] temporary ZMM
 %define %%GHKEY1                %30 ; [clobbered] temporary ZMM
 %define %%GHKEY2                %31 ; [clobbered] temporary ZMM
 %define %%GHDAT1                %32 ; [clobbered] temporary ZMM
@@ -2001,6 +2023,7 @@
                         %%B00_03, %%B04_07, %%B08_11, %%B12_15, \
                         %%B00_03, %%B04_07, %%B08_11, %%B12_15, \
                         %%DATA1, %%DATA2, %%DATA3, %%DATA4
+        ;; **B00_03, B04_07, B08_11, B12_15 may contain plain text
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; retrieve the last cipher counter block (partially XOR'ed with text)
@@ -2084,6 +2107,8 @@
         ;;   product parts in TO_REDUCE_H/L
         ;; - DATA1-DATA4 include blocks for GHASH
 
+        ;; **AESKEY1 and AESKEY2 contain AES round keys
+
 %if do_reduction == 0
         INITIAL_BLOCKS_PARTIAL_GHASH \
                         %%GDATA, %%GCTX, %%LENGTH, \
@@ -2102,6 +2127,16 @@
                         %%B00_03, %%B04_07, %%B08_11, %%B12_15, %%GHDAT1, %%GHDAT2, \
                         %%AESKEY1, %%AESKEY2, %%GHKEY1, %%GHKEY2
 %endif
+        ;; **B04_07 may not get cleared (message below 4 blocks) and it may still contain sensitive data
+
+        ;; if number of blocks is 4 then AESKEY1 and AESKEY2 do not get cleared in the macro above
+%ifdef SAFE_DATA
+%if %%NUM_BLOCKS == 4
+        vpxorq          %%AESKEY1, %%AESKEY1, %%AESKEY1
+        vpxorq          %%AESKEY2, %%AESKEY2, %%AESKEY2
+%endif
+%endif
+
 %endmacro
 
 ;;; ===========================================================================
@@ -2121,7 +2156,7 @@
 %define %%GHASHIN_BLK_OFFSET    %10 ; [in] numerical offset for GHASH blocks in
 %define %%SHFMSK                %11 ; [in] ZMM with byte swap mask for pshufb
 %define %%ZT00                  %12 ; [clobbered] temporary ZMM
-%define %%ZT01                  %13 ; [clobbered] temporary ZMM
+%define %%ZT01                  %13 ; [clobbered**] temporary ZMM
 %define %%ZT02                  %14 ; [clobbered] temporary ZMM
 %define %%ZT03                  %15 ; [clobbered] temporary ZMM
 %define %%ZT04                  %16 ; [clobbered] temporary ZMM
@@ -2217,7 +2252,7 @@
                 %%TO_REDUCE_L, %%TO_REDUCE_H, \
                 %%ENC_DEC, %%HASH_IN_OUT, %%IA0, %%IA1, %%MASKREG, \
                 num_blocks, %%INSTANCE_TYPE
-
+        ;; **ZT01 may contain sensitive data
         jmp     %%_last_blocks_done
 %assign num_blocks (num_blocks + 1)
 %endrep
@@ -2235,9 +2270,9 @@
 
         GHASH_16        %%GHASH_TYPE, hk_load, %%TO_REDUCE_H, %%TO_REDUCE_L, \
                         rsp, %%GHASHIN_BLK_OFFSET, 0, %%GDATA, %%HASHKEY_OFFSET, 0, %%HASH_IN_OUT, \
-                        %%ZT00, %%ZT01, %%ZT02, %%ZT03, %%ZT04, %%ZT05, %%ZT06, %%ZT07, \
-                        %%ZT08, %%ZT09, %%ZT23
-
+                        %%ZT00, %%ZT09, %%ZT02, %%ZT03, %%ZT04, %%ZT05, %%ZT06, %%ZT07, \
+                        %%ZT08, %%ZT01, %%ZT23
+        ;; **ZT01 may include sensitive data
 %%_last_blocks_done:
 
 %endmacro
@@ -2275,8 +2310,8 @@
 %define %%ZT14                  %24 ; [clobbered] temporary ZMM (ghash)
 %define %%ZT15                  %25 ; [clobbered] temporary ZMM (ghash)
 %define %%ZT16                  %26 ; [clobbered] temporary ZMM (ghash)
-%define %%ZT17                  %27 ; [clobbered] temporary ZMM (ghash)
-%define %%ZT18                  %28 ; [clobbered] temporary ZMM (ghash)
+%define %%ZT17                  %27 ; [clobbered**] temporary ZMM (ghash)
+%define %%ZT18                  %28 ; [clobbered**] temporary ZMM (ghash)
 %define %%ZT19                  %29 ; [clobbered] temporary ZMM
 %define %%ZT20                  %30 ; [clobbered] temporary ZMM
 %define %%ZT21                  %31 ; [clobbered] temporary ZMM
@@ -2617,6 +2652,7 @@
         vaesenclast     %%B04_07, %%B04_07, %%AESKEY1
         vaesenclast     %%B08_11, %%B08_11, %%AESKEY1
         vaesenclast     %%B12_15, %%B12_15, %%AESKEY1
+        ;; **AESKEY1 and AESKEY2 contain AES round keys
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; XOR against plain/cipher text
@@ -2631,6 +2667,7 @@
         VX512STR        [%%CIPH_PLAIN_OUT + %%DATA_OFFSET + %%DATA_DISPL + (1 * 64)], %%B04_07
         VX512STR        [%%CIPH_PLAIN_OUT + %%DATA_OFFSET + %%DATA_DISPL + (2 * 64)], %%B08_11
         VX512STR        [%%CIPH_PLAIN_OUT + %%DATA_OFFSET + %%DATA_DISPL + (3 * 64)], %%B12_15
+        ;; **B00_03, B04_07, B08_011, B12_B15 may contain sensitive data
 
         ;; =================================================
         ;; shuffle cipher text blocks for GHASH computation
@@ -2645,6 +2682,7 @@
         vpshufb         %%B08_11, %%DATA3, %%SHFMSK
         vpshufb         %%B12_15, %%DATA4, %%SHFMSK
 %endif
+        ;; **B00_03, B04_07, B08_011, B12_B15 overwritten with shuffled cipher text
 
         ;; =================================================
         ;; store shuffled cipher text for ghashing
@@ -2717,11 +2755,7 @@
 ;;; Restore register content for the caller
 %macro FUNC_RESTORE 0
 
-%ifdef SAFE_DATA
-        clear_scratch_zmms_asm
-%else
         vzeroupper
-%endif
 
 %ifidn __OUTPUT_FORMAT__, win64
         vmovdqu xmm15, [rsp + STACK_XMM_OFFSET + 9*16]
@@ -2789,6 +2823,7 @@
                         %%ZT4, %%ZT5, %%ZT6, %%ZT7, %%ZT8, %%ZT9, %%ZT10, %%ZT11, \
                         %%ZT12, %%ZT13,  %%ZT14, %%ZT15, %%ZT16, %%ZT17, \
                         %%T1, %%T2, %%T3, %%MASKREG
+        ;; **ZT1, ZT2, ZT3 may contain sensitive data
 
         ;; Calculate GHASH of last 16-byte block (0 || len(IV)64)
         mov             %%T1, %%IV_LEN
@@ -2801,6 +2836,7 @@
         vmovdqu64       XWORD(%%ZT0), [%%KEY + HashKey_1]
         vmovdqu64       XWORD(%%ZT5), [%%KEY + HashKey_1 + HKeyGap]
         GHASH_MUL2      %%J0, XWORD(%%ZT0),  XWORD(%%ZT5), XWORD(%%ZT1), XWORD(%%ZT2), XWORD(%%ZT3), XWORD(%%ZT4)
+        ;; **ZT1, ZT2, ZT3 overwritten with ghash products
 
         vpshufb         %%J0, [rel SHUF_MASK] ; perform a 16Byte swap
 %endmacro
@@ -2886,6 +2922,7 @@
                         %%ZT0, %%ZT1, %%ZT2, %%ZT3, %%ZT4, %%ZT5, %%ZT6, %%ZT7, %%ZT8, %%ZT9, \
                         %%ZT10, %%ZT11, %%ZT12, %%ZT13,  %%ZT14, %%ZT15, %%ZT16, %%ZT17, \
                         %%GPR1, %%GPR2, %%GPR3, %%MASKREG
+        ;; **ZT1, ZT2, ZT3 may contain AAD but AAD is not considered sensitive
 %%_aad_compute_done:
 
         ;; set up context fields
@@ -2923,16 +2960,16 @@
 %define %%HASH_IN_OUT       %11 ; [in/out] XMM GHASH value
 %define %%INSTANCE_TYPE     %12 ; [in] single or multi call
 %define %%ZTMP0             %13 ; [clobbered] ZMM register
-%define %%ZTMP1             %14 ; [clobbered] ZMM register
-%define %%ZTMP2             %15 ; [clobbered] ZMM register
-%define %%ZTMP3             %16 ; [clobbered] ZMM register
+%define %%ZTMP1             %14 ; [clobbered**] ZMM register
+%define %%ZTMP2             %15 ; [clobbered**] ZMM register
+%define %%ZTMP3             %16 ; [clobbered**] ZMM register
 %define %%ZTMP4             %17 ; [clobbered] ZMM register
 %define %%ZTMP5             %18 ; [clobbered] ZMM register
 %define %%ZTMP6             %19 ; [clobbered] ZMM register
 %define %%ZTMP7             %20 ; [clobbered] ZMM register
 %define %%ZTMP8             %21 ; [clobbered] ZMM register
 %define %%ZTMP9             %22 ; [clobbered] ZMM register
-%define %%ZTMP10            %23 ; [clobbered] ZMM register
+%define %%ZTMP10            %23 ; [clobbered**] ZMM register
 %define %%ZTMP11            %24 ; [clobbered] ZMM register
 %define %%ZTMP12            %25 ; [clobbered] ZMM register
 %define %%ZTMP13            %26 ; [clobbered] ZMM register
@@ -3004,6 +3041,7 @@
                 %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, \
                 %%ZTMP10, %%ZTMP11, %%ZTMP12, %%ZTMP13, %%ZTMP14, %%ZTMP15, \
                 %%IA0, %%IA1, %%MASKREG, %%SHUFMASK
+        ;; **ZTMP1, ZTMP2, ZTMP3, ZTMP10 may contain sensitive data
 %if num_blocks != 16
         jmp     %%_small_initial_blocks_encrypted
 %endif
@@ -3054,9 +3092,9 @@
 %define %%AAD_HASHx             xmm14 ; hardcoded in GCM_COMPLETE
 
 %define %%ZTMP0                 zmm0
-%define %%ZTMP1                 zmm3
-%define %%ZTMP2                 zmm4
-%define %%ZTMP3                 zmm5
+%define %%ZTMP1                 zmm3    ; **sensitive
+%define %%ZTMP2                 zmm4    ; **sensitive (small data)
+%define %%ZTMP3                 zmm5    ; **sensitive (small data)
 %define %%ZTMP4                 zmm6
 %define %%ZTMP5                 zmm7
 %define %%ZTMP6                 zmm10
@@ -3143,6 +3181,7 @@
                 %%PLAIN_CIPH_LEN, %%DATA_OFFSET, %%AAD_HASHx, %%ENC_DEC, \
                 %%IA0, %%IA1, %%IA2, %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, \
                 %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%MASKREG
+        ;; **ZTMP1 may contain sensitive data
 %else
         xor             %%DATA_OFFSET, %%DATA_OFFSET
 %endif
@@ -3258,6 +3297,7 @@
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
                 final_reduction_no_hxor, %%ENC_DEC, data_in_out_offset, no_ghash_in, hk_bcast
 
+        ;; **ZTMP16 and ZTMP17 contain AES round keys
         ;; === xor cipher block 0 with GHASH (ZT4)
         vmovdqa64       %%AAD_HASHz, %%ZTMP4
 
@@ -3304,6 +3344,8 @@
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
                 final_reduction, %%ENC_DEC, data_in_out_offset, no_ghash_in, hk_load
 
+        ;; **ZTMP16 and ZTMP17 contain AES round keys
+
         ;; === xor cipher block 0 with GHASH (ZT4)
         vmovdqa64       %%AAD_HASHx, XWORD(%%ZTMP4)
 
@@ -3325,6 +3367,7 @@
         ;; ==== GHASH 32 blocks and follow with reduction
         GHASH_16        start, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (0 * 16), %%GDATA_KEY, HashKey_32, 0, %%AAD_HASHz, \
                         %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
+        ;; **ZTMP9 may include sensitive data
 
         ;; ==== GHASH 1 x 16 blocks with reduction + cipher and ghash on the reminder
 %assign ghashin_offset (STACK_LOCAL_OFFSET + (16 * 16))
@@ -3339,6 +3382,8 @@
                 %%ZTMP21, %%ZTMP22, %%ZTMP23, \
                 %%ADDBE_4x4, %%ADDBE_1234, end_reduce, %%GL, %%GH, \
                 %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
+        ;; **ZTMP9 clobbered but ZTMP1 may include sensitive data
+        ;; **ZTMP16 and ZTMP17 clobbered or cleared above
 
 %ifidn %%INSTANCE_TYPE, multi_call
         vpshufb         %%CTR_BLOCKx, %%CTR_BLOCKx, XWORD(%%SHUF_MASK)
@@ -3369,9 +3414,12 @@
                 %%ADDBE_4x4, %%ADDBE_1234, %%GL, %%GH, \
                 first_time, %%ENC_DEC, data_in_out_offset, %%AAD_HASHz, hk_load
 
+        ;; **ZTMP16 and ZTMP17 contain AES round keys
+
         ;; ==== GHASH 1 x 16 blocks
         GHASH_16        end_reduce, hk_load, %%GH, %%GL, rsp, STACK_LOCAL_OFFSET, (16 * 16), %%GDATA_KEY, HashKey_16, 0, %%AAD_HASHz, \
                         %%ZTMP0, %%ZTMP1, %%ZTMP2, %%ZTMP3, %%ZTMP4, %%ZTMP5, %%ZTMP6, %%ZTMP7, %%ZTMP8, %%ZTMP9, %%ZTMP23
+        ;; **ZTMP9 may include sensitive data
 
         ;; fall through here: handling of the rest is identical in both cases
         
@@ -3403,6 +3451,8 @@
                 %%ZTMP21, %%ZTMP22, %%ZTMP23, \
                 %%ADDBE_4x4, %%ADDBE_1234, start, %%GL, %%GH, \
                 %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
+        ;; **ZTMP9 clobbered but ZTMP1 may include sensitive data
+        ;; **ZTMP16 and ZTMP17 clobbered or cleared above
 
 %ifidn %%INSTANCE_TYPE, multi_call
         vpshufb         %%CTR_BLOCKx, %%CTR_BLOCKx, XWORD(%%SHUF_MASK)
@@ -3428,10 +3478,18 @@
                 %%ZTMP16, %%ZTMP17, %%ZTMP18, %%ZTMP19, \
                 %%ZTMP20, %%ZTMP21, %%ZTMP22, \
                 %%IA0, %%IA3, %%MASKREG, %%SHUF_MASK
-
+        ;; **ZTMP1, ZTMP2, ZTMP3, ZTMP10 may include sensitive data
+%ifdef SAFE_DATA
+       vpxorq   %%ZTMP2, %%ZTMP2, %%ZTMP2
+       vpxorq   %%ZTMP3, %%ZTMP3, %%ZTMP3
+       vpxorq   %%ZTMP10, %%ZTMP10, %%ZTMP10
+%endif
         ;; fall through to exit
 
 %%_ghash_done:
+%ifdef SAFE_DATA
+       vpxorq   %%ZTMP1, %%ZTMP1, %%ZTMP1
+%endif
 %ifidn %%INSTANCE_TYPE, multi_call
         ;; save the last counter block
         vmovdqu64       [%%GDATA_CTX + CurCount], %%CTR_BLOCKx
@@ -3555,6 +3613,7 @@
         vpshufb         %%B08_11, %%B08_11, %%SHUF_MASK
         vpshufb         %%B12_15, %%B12_15, %%SHUF_MASK
 %endif
+        ;; **B00_03, B04_07, B08_11, B12_15 overwritten with shuffled cipher text
 
 %ifnidn %%GHASH, no_ghash
         ;; === xor cipher block 0 with GHASH for the next GHASH round
@@ -3590,6 +3649,8 @@
 
         vmovdqu         xmm13, [%%GDATA_KEY + HashKey]
         vmovdqu         xmm6, [%%GDATA_KEY + HashKey + HKeyGap]
+        ;; **xmm13 and xmm6 contain authentication key
+
         ;; Start AES as early as possible
         vmovdqu         xmm9, [%%GDATA_CTX + OrigIV]    ; xmm9 = Y0
         ENCRYPT_SINGLE_BLOCK %%GDATA_KEY, xmm9  ; E(K, Y0)
@@ -3651,7 +3712,7 @@
 
 %ifdef SAFE_DATA
         ;; Clear sensitive data from context structure
-        vpxor           xmm0, xmm0
+        vpxor           xmm0, xmm0, xmm0
         vmovdqu         [%%GDATA_CTX + AadHash], xmm0
 %ifidn %%INSTANCE_TYPE, multi_call
         vmovdqu         [%%GDATA_CTX + PBlockEncKey], xmm0
@@ -3666,7 +3727,7 @@
 ;;; Output:
 ;;; Updated AAD_HASH, DATA_OFFSET and GDATA_CTX
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro PARTIAL_BLOCK_GMAC 20
+%macro PARTIAL_BLOCK_GMAC 18
 %define %%GDATA_KEY             %1  ; [in] Key pointer
 %define %%GDATA_CTX             %2  ; [in] context pointer
 %define %%PLAIN_IN              %3  ; [in] input buffer
@@ -3684,9 +3745,7 @@
 %define %%ZTMP5                 %15 ; [clobbered] ZMM temporary register
 %define %%ZTMP6                 %16 ; [clobbered] ZMM temporary register
 %define %%ZTMP7                 %17 ; [clobbered] ZMM temporary register
-%define %%ZTMP8                 %18 ; [clobbered] ZMM temporary register
-%define %%ZTMP9                 %19 ; [clobbered] ZMM temporary register
-%define %%MASKREG               %20 ; [clobbered] mask temporary register
+%define %%MASKREG               %18 ; [clobbered] mask temporary register
 
 %define %%XTMP0 XWORD(%%ZTMP0)
 %define %%XTMP1 XWORD(%%ZTMP1)
@@ -3696,8 +3755,6 @@
 %define %%XTMP5 XWORD(%%ZTMP5)
 %define %%XTMP6 XWORD(%%ZTMP6)
 %define %%XTMP7 XWORD(%%ZTMP7)
-%define %%XTMP8 XWORD(%%ZTMP8)
-%define %%XTMP9 XWORD(%%ZTMP9)
 
 %define %%LENGTH        %%GPTMP0
 %define %%IA0           %%GPTMP1
@@ -3711,7 +3768,7 @@
                                                 %%IA0, %%IA1, %%MASKREG
 
         vmovdqu64       %%XTMP2, [%%GDATA_KEY + HashKey]
-        vmovdqu64       %%XTMP9, [%%GDATA_KEY + HashKey + HKeyGap]
+        vmovdqu64       %%XTMP7, [%%GDATA_KEY + HashKey + HKeyGap]
 
         ;; adjust the shuffle mask pointer to be able to shift right %%LENGTH bytes
         ;; (16 - %%LENGTH) is the number of bytes in plaintext mod 16)
@@ -3730,15 +3787,17 @@
         ;; - mask out bottom %%LENGTH bytes of %%XTMP1
         vmovdqu64       %%XTMP0, [%%IA0 + ALL_F - SHIFT_MASK]
 
-        vpand           %%XTMP4, %%XTMP0
-        vpshufb         %%XTMP4, [rel SHUF_MASK]
-        vpshufb         %%XTMP4, %%XTMP3
-        vpxorq          %%AAD_HASH, %%XTMP4
+        vpand           %%XTMP4, %%XTMP4, %%XTMP0
+        vpshufb         %%XTMP4, %%XTMP4, [rel SHUF_MASK]
+        vpshufb         %%XTMP4, %%XTMP4, %%XTMP3
+        vpxorq          %%AAD_HASH, %%AAD_HASH, %%XTMP4
+        ;; **XTMP4 contains plain text
         cmp             %%IA1, 0
         jl              %%_partial_incomplete
 
         ;; GHASH computation for the last <16 Byte block
-        GHASH_MUL2      %%AAD_HASH, %%XTMP2, %%XTMP9, %%XTMP5, %%XTMP6, %%XTMP7, %%XTMP8
+        GHASH_MUL2      %%AAD_HASH, %%XTMP2, %%XTMP7, %%XTMP3, %%XTMP4, %%XTMP5, %%XTMP6
+        ;; **XTMP4 clobbered with temporary compute data
 
         mov             qword [%%GDATA_CTX + PBlockLen], 0
 
-- 
GitLab


From 90e4172d1405e459e733fc70029229f4fe3b2359 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 21 Feb 2023 16:43:37 +0000
Subject: [PATCH 181/332] avx512: [gcm] use smaller stack frame for API's that
 don't need to store cipher text blocks

---
 lib/avx512_t2/gcm_api_vaes_avx512.inc      |  2 +-
 lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc |  6 +++---
 lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc  |  8 ++++----
 lib/avx512_t2/gcm_vaes_avx512.inc          | 22 +++++++++++++++++-----
 4 files changed, 25 insertions(+), 13 deletions(-)

diff --git a/lib/avx512_t2/gcm_api_vaes_avx512.inc b/lib/avx512_t2/gcm_api_vaes_avx512.inc
index c8b94050..7d455651 100644
--- a/lib/avx512_t2/gcm_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_api_vaes_avx512.inc
@@ -57,7 +57,7 @@ FN_NAME(precomp,_):
         jz      error_precomp
 %endif
 
-        FUNC_SAVE
+        FUNC_SAVE small_frame
 
         vpxor   xmm6, xmm6
         ENCRYPT_SINGLE_BLOCK    arg1, xmm6              ; xmm6 = HashKey
diff --git a/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc b/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
index 39083173..4ab8d71f 100644
--- a/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
@@ -59,7 +59,7 @@ ghash_pre_vaes_avx512:
         jz      error_ghash_pre
 %endif
 
-        FUNC_SAVE
+        FUNC_SAVE small_frame
 
         vmovdqu xmm6, [arg1]
         vpshufb  xmm6, [rel SHUF_MASK]
@@ -115,7 +115,7 @@ error_ghash_pre:
 MKGLOBAL(ghash_vaes_avx512,function,)
 ghash_vaes_avx512:
         endbranch64
-        FUNC_SAVE
+        FUNC_SAVE small_frame
 
 %ifdef SAFE_PARAM
         ;; Reset imb_errno
@@ -201,7 +201,7 @@ error_ghash:
 MKGLOBAL(GMAC_FN_NAME(update),function,)
 GMAC_FN_NAME(update):
         endbranch64
-	FUNC_SAVE
+	FUNC_SAVE small_frame
 
 %ifdef SAFE_PARAM
         ;; Reset imb_errno
diff --git a/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc b/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
index d376e326..53f05e07 100644
--- a/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
@@ -49,7 +49,7 @@ default rel
 MKGLOBAL(FN_NAME(init,_),function,)
 FN_NAME(init,_):
         endbranch64
-        FUNC_SAVE
+        FUNC_SAVE small_frame
 
 %ifdef SAFE_PARAM
         ;; Reset imb_errno
@@ -127,7 +127,7 @@ skip_aad_check_error_init:
 MKGLOBAL(FN_NAME(init_var_iv,_),function,)
 FN_NAME(init_var_iv,_):
         endbranch64
-        FUNC_SAVE
+        FUNC_SAVE small_frame
 
 %ifdef SAFE_PARAM
         ;; Reset imb_errno
@@ -417,7 +417,7 @@ FN_NAME(enc,_finalize_):
         ja      error_enc_fin
 %endif
 
-        FUNC_SAVE
+        FUNC_SAVE small_frame
         GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call, k1, r10, r11, r12
 %ifdef SAFE_DATA
         ;; **xmm5, xmm6, xmm11, xmm13, xmm14 and xmm16 may contain sensitive data
@@ -488,7 +488,7 @@ FN_NAME(dec,_finalize_):
         ja      error_dec_fin
 %endif
 
-        FUNC_SAVE
+        FUNC_SAVE small_frame
         GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call, k1, r10, r11, r12
 
 %ifdef SAFE_DATA
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index adf750d3..466d718f 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -176,6 +176,7 @@
 %define STACK_XMM_OFFSET        (STACK_GP_OFFSET + GP_STORAGE)
 %define STACK_LOCAL_OFFSET      (STACK_XMM_OFFSET + XMM_STORAGE)
 %define STACK_FRAME_SIZE        (STACK_LOCAL_OFFSET + LOCAL_STORAGE)
+%define STACK_FRAME_SIZE_SMALL  (STACK_LOCAL_OFFSET)
 
 ;; for compatibility with stack argument definitions in gcm_defines.inc
 %define STACK_OFFSET 0
@@ -2715,20 +2716,31 @@
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;; Save register content for the caller
-%macro FUNC_SAVE 0
-        ;; Required for Update/GCM_ENC
-        ;the number of pushes must equal STACK_OFFSET
+%macro FUNC_SAVE 0-1
+
+%assign use_big_frame 1
+
+%if %0 > 0
+%ifidni %1, small_frame
+%assign use_big_frame 0
+%endif
+%endif
+        ;; Required for Update/GMC_ENC
         mov     rax, rsp
 
+%if use_big_frame > 0
         sub     rsp, STACK_FRAME_SIZE
+%else
+        sub     rsp, STACK_FRAME_SIZE_SMALL
+%endif
         and     rsp, ~63
 
         mov     [rsp + STACK_GP_OFFSET + 0*8], r12
         mov     [rsp + STACK_GP_OFFSET + 1*8], r13
         mov     [rsp + STACK_GP_OFFSET + 2*8], r14
         mov     [rsp + STACK_GP_OFFSET + 3*8], r15
-        mov     [rsp + STACK_GP_OFFSET + 4*8], rax ; stack
-        mov     r14, rax                               ; r14 is used to retrieve stack args
+        mov     [rsp + STACK_GP_OFFSET + 4*8], rax      ; stack
+        mov     r14, rax                                ; r14 is used to retrieve stack args
         mov     [rsp + STACK_GP_OFFSET + 5*8], rbp
         mov     [rsp + STACK_GP_OFFSET + 6*8], rbx
 %ifidn __OUTPUT_FORMAT__, win64
-- 
GitLab


From fe778cd49d81fe58784718c97b53a2ad9218162d Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 29 Mar 2023 15:15:11 +0100
Subject: [PATCH 182/332] perf: rename performance application

---
 .gitignore              | 2 +-
 Makefile                | 2 +-
 perf/CMakeLists.txt     | 2 +-
 perf/Makefile           | 2 +-
 perf/README             | 4 ++--
 perf/ipsec_diff_tool.py | 2 +-
 perf/ipsec_perf.c       | 2 +-
 perf/ipsec_perf_tool.py | 4 ++--
 perf/win_x64.mak        | 2 +-
 9 files changed, 11 insertions(+), 11 deletions(-)

diff --git a/.gitignore b/.gitignore
index 793b42e7..366f3cdd 100644
--- a/.gitignore
+++ b/.gitignore
@@ -10,7 +10,7 @@
 *.d
 *.dep
 *~
-ipsec_perf*
+imb-perf*
 imb-kat*
 imb-xvalid*
 imb-fuzz-*
diff --git a/Makefile b/Makefile
index 3060bc07..54be948f 100644
--- a/Makefile
+++ b/Makefile
@@ -74,7 +74,7 @@ CS_IGNORE_WORDS ?= iinclude,struc,fo,ue,od,ba,padd
 .PHONY: spellcheck
 spellcheck:
 	$(CODESPELL) -d -L $(CS_IGNORE_WORDS) \
-	-S "*.obj,*.o,*.a,*.so,*.lib,*~,*.so,*.so.*,*.d,ipsec_perf" \
+	-S "*.obj,*.o,*.a,*.so,*.lib,*~,*.so,*.so.*,*.d,imb-perf" \
 	-S "imb-kat,imb-xvalid" \
 	./lib ./perf ./test README.md SECURITY.md CONTRIBUTING \
 	Makefile win_x64.mak ReleaseNotes.txt LICENSE $(CS_EXTRA_OPTS)
diff --git a/perf/CMakeLists.txt b/perf/CMakeLists.txt
index e5879d8f..c73889c4 100644
--- a/perf/CMakeLists.txt
+++ b/perf/CMakeLists.txt
@@ -34,7 +34,7 @@ endif()
 ########################################
 # set app and library names
 ########################################
-set(PERF_APP ipsec_perf)
+set(PERF_APP imb-perf)
 set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../lib)
 
 ########################################
diff --git a/perf/Makefile b/perf/Makefile
index e396e97a..911375f6 100644
--- a/perf/Makefile
+++ b/perf/Makefile
@@ -23,7 +23,7 @@
 # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-EXE=ipsec_perf
+EXE=imb-perf
 INSTPATH ?= /usr/include/intel-ipsec-mb.h
 LIB_DIR ?= ../lib
 NASM ?= nasm
diff --git a/perf/README b/perf/README
index 289517ae..e3095fca 100644
--- a/perf/README
+++ b/perf/README
@@ -58,10 +58,10 @@ Usage
 =====
 
 You can simply check list of arguments by typing:
-	./ipsec_perf -h
+	./imb-perf -h
 
 Usage example:
-	./ipsec_perf -c --no-avx512 --no-gcm -o 24
+	./imb-perf -c --no-avx512 --no-gcm -o 24
 
 Later you can pass output to ipsec_diff_tool.py for data
 analysis:
diff --git a/perf/ipsec_diff_tool.py b/perf/ipsec_diff_tool.py
index d21b049f..9c973907 100755
--- a/perf/ipsec_diff_tool.py
+++ b/perf/ipsec_diff_tool.py
@@ -327,7 +327,7 @@ class DiffTool(object):
         print("\t-c - takes packet size as argument and then it will calculate cycle cost")
         print("\t-t - takes packet size and clock speed as arguments and then it will calculate throughput in Mbps")
         print("\t-s - calculates the slope and intercept")
-        print("\tfile_a, file_b - text files containing output from ipsec_perf tool")
+        print("\tfile_a, file_b - text files containing output from imb-perf tool")
         print("\ttol - tolerance [%], must be >= 0, default 5\n")
         print("Examples:")
         print("\tdefault no arguments prints slope and intercept")
diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index db7c6e9b..6394c4f2 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -3448,7 +3448,7 @@ exit_failure:
 
 static void usage(void)
 {
-        fprintf(stderr, "Usage: ipsec_perf <ALGORITHM> [ARGS]\n"
+        fprintf(stderr, "Usage: imb-perf <ALGORITHM> [ARGS]\n"
                 "\nALGORITHM can be one or more of:\n"
                 "--cipher-algo: Select cipher algorithm to run on the custom test\n"
                 "--hash-algo: Select hash algorithm to run on the custom test\n"
diff --git a/perf/ipsec_perf_tool.py b/perf/ipsec_perf_tool.py
index 34d4f60d..a7b578cd 100755
--- a/perf/ipsec_perf_tool.py
+++ b/perf/ipsec_perf_tool.py
@@ -258,9 +258,9 @@ def init_global_vars():
 
     # detect OS and select app name
     if platform.system() == 'Windows':
-        PERF_APP = 'ipsec_perf.exe'
+        PERF_APP = 'imb-perf.exe'
     else:
-        PERF_APP = 'ipsec_perf'
+        PERF_APP = 'imb-perf'
 
 
 def get_info():
diff --git a/perf/win_x64.mak b/perf/win_x64.mak
index 6e8eb009..bff4f40d 100644
--- a/perf/win_x64.mak
+++ b/perf/win_x64.mak
@@ -25,7 +25,7 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 #
 
-APP = ipsec_perf
+APP = imb-perf
 INSTNAME = intel-ipsec-mb
 
 !if !defined(PREFIX)
-- 
GitLab


From 8a00e011800a579b13e2b0b16ec978adf786171c Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 29 Mar 2023 15:46:12 +0100
Subject: [PATCH 183/332] perf: copy perf scripts to cmake binary directory

---
 perf/CMakeLists.txt      |  8 ++++++--
 perf/cmake/unix.cmake    |  5 +++++
 perf/cmake/windows.cmake | 14 ++++++++++++++
 3 files changed, 25 insertions(+), 2 deletions(-)

diff --git a/perf/CMakeLists.txt b/perf/CMakeLists.txt
index c73889c4..d3a1d676 100644
--- a/perf/CMakeLists.txt
+++ b/perf/CMakeLists.txt
@@ -49,6 +49,11 @@ set(PERF_APP_SRC_FILES_ASM
   ${CMAKE_CURRENT_SOURCE_DIR}/misc.asm
 )
 
+########################################
+# add target
+########################################
+add_executable(${PERF_APP} ${PERF_APP_SRC_FILES} ${PERF_APP_SRC_FILES_ASM})
+
 ########################################
 # setup NASM
 ########################################
@@ -69,12 +74,11 @@ else()
 endif()
 
 ########################################
-# add targets
+# extra target properties
 ########################################
 include_directories(${CMAKE_CURRENT_SOURCE_DIR} ${LIB_DIR})
 link_directories(${LIB_DIR})
 
-add_executable(${PERF_APP} ${PERF_APP_SRC_FILES} ${PERF_APP_SRC_FILES_ASM})
 target_link_libraries(${PERF_APP} PRIVATE ${IPSEC_MB_LIB})
 target_compile_definitions(${PERF_APP} PRIVATE ${APP_DEFINES})
 
diff --git a/perf/cmake/unix.cmake b/perf/cmake/unix.cmake
index aa5cc18a..aff7ec7c 100644
--- a/perf/cmake/unix.cmake
+++ b/perf/cmake/unix.cmake
@@ -52,3 +52,8 @@ if(CMAKE_COMPILER_IS_GNUCC)
   string(APPEND CMAKE_C_FLAGS " -fno-strict-overflow")
 endif()
 
+# copy perf scripts to binary directory
+configure_file(${CMAKE_CURRENT_SOURCE_DIR}/ipsec_diff_tool.py
+               ${CMAKE_CURRENT_BINARY_DIR} COPYONLY)
+configure_file(${CMAKE_CURRENT_SOURCE_DIR}/ipsec_perf_tool.py
+               ${CMAKE_CURRENT_BINARY_DIR} COPYONLY)
diff --git a/perf/cmake/windows.cmake b/perf/cmake/windows.cmake
index d48e9cfa..d4ad0df0 100644
--- a/perf/cmake/windows.cmake
+++ b/perf/cmake/windows.cmake
@@ -45,3 +45,17 @@ set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
 set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
 set(CMAKE_EXE_LINKER_FLAGS_DEBUG "/debug")
 
+# copy perf scripts to binary directory
+add_custom_command(
+  TARGET ${PERF_APP}
+  POST_BUILD
+  COMMAND
+    ${CMAKE_COMMAND} -E copy "${CMAKE_CURRENT_SOURCE_DIR}/ipsec_diff_tool.py"
+    $<TARGET_FILE_DIR:${PERF_APP}>)
+add_custom_command(
+  TARGET ${PERF_APP}
+  POST_BUILD
+  COMMAND
+    ${CMAKE_COMMAND} -E copy "${CMAKE_CURRENT_SOURCE_DIR}/ipsec_perf_tool.py"
+    $<TARGET_FILE_DIR:${PERF_APP}>)
+
-- 
GitLab


From da572bc4221ed6776fcf18f5bc4691688ee541b2 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 29 Mar 2023 15:47:19 +0100
Subject: [PATCH 184/332] perf: update perf tool script default offset

The imb-perf application has been updated with better defaults
so the perf tool no longer needs to select a default offset.
---
 perf/ipsec_perf_tool.py | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/perf/ipsec_perf_tool.py b/perf/ipsec_perf_tool.py
index a7b578cd..27bb3713 100755
--- a/perf/ipsec_perf_tool.py
+++ b/perf/ipsec_perf_tool.py
@@ -359,7 +359,6 @@ def parse_args():
     global QUIET
     cores = None
     directions = ['encrypt', 'decrypt']
-    offset = 24
     alg_types = ['cipher-only', 'hash-only', 'aead-only', 'cipher-hash-all']
 
     parser = argparse.ArgumentParser(formatter_class=argparse.RawTextHelpFormatter,
@@ -374,8 +373,8 @@ def parse_args():
                         help="list/range of cores e.g. 2-8 or 3,4,5")
     parser.add_argument("-d", "--direction", default=None,
                         choices=directions, help="Cipher direction")
-    parser.add_argument("-o", "--offset", default=offset, type=int,
-                        help="offset for the SHA size increment, default is 24")
+    parser.add_argument("-o", "--offset", default=None, type=int,
+                        help="offset for the SHA size increment")
     parser.add_argument("-t", "--alg-type", default=None, action='append', choices=alg_types,
                         help="algorithm types to test")
     parser.add_argument("-s", "--job-size", default=None,
-- 
GitLab


From f77a17da0e8e8191048d67ffabd779d0b8d3e199 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 27 Feb 2023 21:13:34 +0000
Subject: [PATCH 185/332] lib: [JOB] enable cipher submit & flush to get
 specialized

---
 lib/include/job_api_docsis.h |  12 +-
 lib/include/job_api_gcm.h    |   8 +-
 lib/include/mb_mgr_job_api.h | 219 +++++++++++++++++++----------------
 3 files changed, 128 insertions(+), 111 deletions(-)

diff --git a/lib/include/job_api_docsis.h b/lib/include/job_api_docsis.h
index 5df40d1f..c3202bd3 100644
--- a/lib/include/job_api_docsis.h
+++ b/lib/include/job_api_docsis.h
@@ -33,9 +33,9 @@
 
 __forceinline
 IMB_JOB *
-submit_docsis_enc_job(IMB_MGR *state, IMB_JOB *job)
+submit_docsis_enc_job(IMB_MGR *state, IMB_JOB *job, const uint64_t key_sz)
 {
-        if (16 == job->key_len_in_bytes) {
+        if (16 == key_sz) {
                 if (job->hash_alg == IMB_AUTH_DOCSIS_CRC32) {
                         MB_MGR_DOCSIS_AES_OOO *p_ooo =
                                 state->docsis128_crc32_sec_ooo;
@@ -64,9 +64,9 @@ submit_docsis_enc_job(IMB_MGR *state, IMB_JOB *job)
 
 __forceinline
 IMB_JOB *
-flush_docsis_enc_job(IMB_MGR *state, IMB_JOB *job)
+flush_docsis_enc_job(IMB_MGR *state, IMB_JOB *job, const uint64_t key_sz)
 {
-        if (16 == job->key_len_in_bytes) {
+        if (16 == key_sz) {
                 if (job->hash_alg == IMB_AUTH_DOCSIS_CRC32) {
                         MB_MGR_DOCSIS_AES_OOO *p_ooo =
                                 state->docsis128_crc32_sec_ooo;
@@ -95,9 +95,9 @@ flush_docsis_enc_job(IMB_MGR *state, IMB_JOB *job)
 
 __forceinline
 IMB_JOB *
-submit_docsis_dec_job(IMB_MGR *state, IMB_JOB *job)
+submit_docsis_dec_job(IMB_MGR *state, IMB_JOB *job, const uint64_t key_sz)
 {
-        if (16 == job->key_len_in_bytes) {
+        if (16 == key_sz) {
                 if (job->hash_alg == IMB_AUTH_DOCSIS_CRC32) {
                         MB_MGR_DOCSIS_AES_OOO *p_ooo =
                                 state->docsis128_crc32_sec_ooo;
diff --git a/lib/include/job_api_gcm.h b/lib/include/job_api_gcm.h
index 6190ce7c..f510aa0b 100644
--- a/lib/include/job_api_gcm.h
+++ b/lib/include/job_api_gcm.h
@@ -32,9 +32,9 @@
 
 __forceinline
 IMB_JOB *
-submit_gcm_sgl_enc(IMB_MGR *state, IMB_JOB *job)
+submit_gcm_sgl_enc(IMB_MGR *state, IMB_JOB *job, const uint64_t key_sz)
 {
-        switch (job->key_len_in_bytes) {
+        switch (key_sz) {
         case IMB_KEY_128_BYTES:
                 if (job->sgl_state == IMB_SGL_INIT)
                         IMB_AES128_GCM_INIT_VAR_IV(state, job->enc_keys,
@@ -162,9 +162,9 @@ submit_gcm_sgl_enc(IMB_MGR *state, IMB_JOB *job)
 
 __forceinline
 IMB_JOB *
-submit_gcm_sgl_dec(IMB_MGR *state, IMB_JOB *job)
+submit_gcm_sgl_dec(IMB_MGR *state, IMB_JOB *job, const uint64_t key_sz)
 {
-        switch (job->key_len_in_bytes) {
+        switch (key_sz) {
         case IMB_KEY_128_BYTES:
                 if (job->sgl_state == IMB_SGL_INIT)
                         IMB_AES128_GCM_INIT_VAR_IV(state, job->enc_keys,
diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index 513e190a..5ac93a77 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -225,12 +225,13 @@ __forceinline IMB_JOB *SUBMIT_JOB_AES_GCM_DEC(IMB_MGR *state, IMB_JOB *job)
         return job;
 }
 
-__forceinline IMB_JOB *SUBMIT_JOB_AES_GCM_ENC(IMB_MGR *state, IMB_JOB *job)
+__forceinline IMB_JOB *SUBMIT_JOB_AES_GCM_ENC(IMB_MGR *state, IMB_JOB *job,
+                                              const uint64_t key_sz)
 {
         DECLARE_ALIGNED(struct gcm_context_data ctx, 16);
         (void) state;
 
-        if (16 == job->key_len_in_bytes) {
+        if (16 == key_sz) {
                 AES_GCM_ENC_IV_128(job->enc_keys,
                                    &ctx, job->dst,
                                    job->src +
@@ -241,7 +242,7 @@ __forceinline IMB_JOB *SUBMIT_JOB_AES_GCM_ENC(IMB_MGR *state, IMB_JOB *job)
                                    job->u.GCM.aad_len_in_bytes,
                                    job->auth_tag_output,
                                    job->auth_tag_output_len_in_bytes);
-        } else if (24 == job->key_len_in_bytes) {
+        } else if (24 == key_sz) {
                 AES_GCM_ENC_IV_192(job->enc_keys,
                                    &ctx, job->dst,
                                    job->src +
@@ -271,9 +272,10 @@ __forceinline IMB_JOB *SUBMIT_JOB_AES_GCM_ENC(IMB_MGR *state, IMB_JOB *job)
 /* ========================================================================= */
 /* AES-CTR */
 /* ========================================================================= */
-__forceinline IMB_JOB *SUBMIT_JOB_AES_CTR(IMB_JOB *job)
+__forceinline IMB_JOB *SUBMIT_JOB_AES_CTR(IMB_JOB *job,
+                                          const uint64_t key_sz)
 {
-        if (IMB_KEY_128_BYTES == job->key_len_in_bytes) {
+        if (IMB_KEY_128_BYTES == key_sz) {
 #ifdef SUBMIT_JOB_AES_CTR_128
                 SUBMIT_JOB_AES_CTR_128(job);
 #else
@@ -284,7 +286,7 @@ __forceinline IMB_JOB *SUBMIT_JOB_AES_CTR(IMB_JOB *job)
                             job->msg_len_to_cipher_in_bytes,
                             job->iv_len_in_bytes);
 #endif
-        } else if (IMB_KEY_192_BYTES == job->key_len_in_bytes) {
+        } else if (IMB_KEY_192_BYTES == key_sz) {
 #ifdef SUBMIT_JOB_AES_CTR_192
                 SUBMIT_JOB_AES_CTR_192(job);
 #else
@@ -312,9 +314,10 @@ __forceinline IMB_JOB *SUBMIT_JOB_AES_CTR(IMB_JOB *job)
         return job;
 }
 
-__forceinline IMB_JOB *SUBMIT_JOB_AES_CTR_BIT(IMB_JOB *job)
+__forceinline IMB_JOB *SUBMIT_JOB_AES_CTR_BIT(IMB_JOB *job,
+                                              const uint64_t key_sz)
 {
-        if (IMB_KEY_128_BYTES == job->key_len_in_bytes) {
+        if (IMB_KEY_128_BYTES == key_sz) {
 #ifdef SUBMIT_JOB_AES_CTR_128_BIT
                 SUBMIT_JOB_AES_CTR_128_BIT(job);
 #else
@@ -326,7 +329,7 @@ __forceinline IMB_JOB *SUBMIT_JOB_AES_CTR_BIT(IMB_JOB *job)
                                 job->msg_len_to_cipher_in_bits,
                                 job->iv_len_in_bytes);
 #endif
-        } else if (IMB_KEY_192_BYTES == job->key_len_in_bytes) {
+        } else if (IMB_KEY_192_BYTES == key_sz) {
 #ifdef SUBMIT_JOB_AES_CTR_192_BIT
                 SUBMIT_JOB_AES_CTR_192_BIT(job);
 #else
@@ -405,18 +408,20 @@ __forceinline IMB_JOB *FLUSH_JOB_CUSTOM_HASH(IMB_JOB *job)
 /* ========================================================================= */
 /* Cipher submit & flush functions */
 /* ========================================================================= */
-__forceinline IMB_JOB *SUBMIT_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
+__forceinline IMB_JOB *SUBMIT_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job,
+                                             const IMB_CIPHER_MODE cipher_mode,
+                                             const uint64_t key_sz)
 {
-        if (IMB_CIPHER_GCM == job->cipher_mode) {
-                return SUBMIT_JOB_AES_GCM_ENC(state, job);
-        } else if (IMB_CIPHER_GCM_SGL == job->cipher_mode) {
-                return submit_gcm_sgl_enc(state, job);
-        } else if (IMB_CIPHER_CBC == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        if (IMB_CIPHER_GCM == cipher_mode) {
+                return SUBMIT_JOB_AES_GCM_ENC(state, job, key_sz);
+        } else if (IMB_CIPHER_GCM_SGL == cipher_mode) {
+                return submit_gcm_sgl_enc(state, job, key_sz);
+        } else if (IMB_CIPHER_CBC == cipher_mode) {
+                if (16 == key_sz) {
                         MB_MGR_AES_OOO *aes128_ooo = state->aes128_ooo;
 
                         return SUBMIT_JOB_AES_CBC_128_ENC(aes128_ooo, job);
-                } else if (24 == job->key_len_in_bytes) {
+                } else if (24 == key_sz) {
                         MB_MGR_AES_OOO *aes192_ooo = state->aes192_ooo;
 
                         return SUBMIT_JOB_AES_CBC_192_ENC(aes192_ooo, job);
@@ -425,28 +430,28 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
 
                         return SUBMIT_JOB_AES_CBC_256_ENC(aes256_ooo, job);
                 }
-        } else if (IMB_CIPHER_CNTR == job->cipher_mode) {
-                return SUBMIT_JOB_AES_CTR(job);
-        } else if (IMB_CIPHER_CNTR_BITLEN == job->cipher_mode) {
-                return SUBMIT_JOB_AES_CTR_BIT(job);
-        } else if (IMB_CIPHER_ECB == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        } else if (IMB_CIPHER_CNTR == cipher_mode) {
+                return SUBMIT_JOB_AES_CTR(job, key_sz);
+        } else if (IMB_CIPHER_CNTR_BITLEN == cipher_mode) {
+                return SUBMIT_JOB_AES_CTR_BIT(job, key_sz);
+        } else if (IMB_CIPHER_ECB == cipher_mode) {
+                if (16 == key_sz) {
                         return SUBMIT_JOB_AES_ECB_128_ENC(job);
-                } else if (24 == job->key_len_in_bytes) {
+                } else if (24 == key_sz) {
                         return SUBMIT_JOB_AES_ECB_192_ENC(job);
                 } else { /* assume 32 */
                         return SUBMIT_JOB_AES_ECB_256_ENC(job);
                 }
-        } else if (IMB_CIPHER_DOCSIS_SEC_BPI == job->cipher_mode) {
-                return submit_docsis_enc_job(state, job);
-        } else if (IMB_CIPHER_PON_AES_CNTR == job->cipher_mode) {
+        } else if (IMB_CIPHER_DOCSIS_SEC_BPI == cipher_mode) {
+                return submit_docsis_enc_job(state, job, key_sz);
+        } else if (IMB_CIPHER_PON_AES_CNTR == cipher_mode) {
                 if (job->msg_len_to_cipher_in_bytes == 0)
                         return SUBMIT_JOB_PON_ENC_NO_CTR(job);
                 else
                         return SUBMIT_JOB_PON_ENC(job);
-        } else if (IMB_CIPHER_CUSTOM == job->cipher_mode) {
+        } else if (IMB_CIPHER_CUSTOM == cipher_mode) {
                 return SUBMIT_JOB_CUSTOM_CIPHER(job);
-        } else if (IMB_CIPHER_DES == job->cipher_mode) {
+        } else if (IMB_CIPHER_DES == cipher_mode) {
 #ifdef SUBMIT_JOB_DES_CBC_ENC
                 MB_MGR_DES_OOO *des_enc_ooo = state->des_enc_ooo;
 
@@ -454,13 +459,13 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
 #else
                 return DES_CBC_ENC(job);
 #endif /* SUBMIT_JOB_DES_CBC_ENC */
-        } else if (IMB_CIPHER_CHACHA20 == job->cipher_mode) {
+        } else if (IMB_CIPHER_CHACHA20 == cipher_mode) {
                 return SUBMIT_JOB_CHACHA20_ENC_DEC(job);
-        } else if (IMB_CIPHER_CHACHA20_POLY1305 == job->cipher_mode) {
+        } else if (IMB_CIPHER_CHACHA20_POLY1305 == cipher_mode) {
                 return SUBMIT_JOB_CHACHA20_POLY1305(state, job);
-        } else if (IMB_CIPHER_CHACHA20_POLY1305_SGL == job->cipher_mode) {
+        } else if (IMB_CIPHER_CHACHA20_POLY1305_SGL == cipher_mode) {
                 return SUBMIT_JOB_CHACHA20_POLY1305_SGL(state, job);
-        } else if (IMB_CIPHER_DOCSIS_DES == job->cipher_mode) {
+        } else if (IMB_CIPHER_DOCSIS_DES == cipher_mode) {
 #ifdef SUBMIT_JOB_DOCSIS_DES_ENC
                 MB_MGR_DES_OOO *docsis_des_enc_ooo = state->docsis_des_enc_ooo;
 
@@ -469,7 +474,7 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
 #else
                 return DOCSIS_DES_ENC(job);
 #endif /* SUBMIT_JOB_DOCSIS_DES_ENC */
-        } else if (IMB_CIPHER_DES3 == job->cipher_mode) {
+        } else if (IMB_CIPHER_DES3 == cipher_mode) {
 #ifdef SUBMIT_JOB_3DES_CBC_ENC
                 MB_MGR_DES_OOO *des3_enc_ooo = state->des3_enc_ooo;
 
@@ -477,14 +482,14 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
 #else
                 return DES3_CBC_ENC(job);
 #endif
-        } else if (IMB_CIPHER_CCM == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        } else if (IMB_CIPHER_CCM == cipher_mode) {
+                if (16 == key_sz) {
                         return AES_CNTR_CCM_128(job);
                 } else { /* assume 32 */
                         return AES_CNTR_CCM_256(job);
                 }
-        } else if (IMB_CIPHER_ZUC_EEA3 == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        } else if (IMB_CIPHER_ZUC_EEA3 == cipher_mode) {
+                if (16 == key_sz) {
                         MB_MGR_ZUC_OOO *zuc_eea3_ooo = state->zuc_eea3_ooo;
 
                         return SUBMIT_JOB_ZUC_EEA3(zuc_eea3_ooo, job);
@@ -494,21 +499,21 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
 
                         return SUBMIT_JOB_ZUC256_EEA3(zuc256_eea3_ooo, job);
                 }
-        } else if (IMB_CIPHER_SNOW3G_UEA2_BITLEN == job->cipher_mode) {
+        } else if (IMB_CIPHER_SNOW3G_UEA2_BITLEN == cipher_mode) {
 #ifdef SUBMIT_JOB_SNOW3G_UEA2
                 return SUBMIT_JOB_SNOW3G_UEA2(state, job);
 #else
                 return def_submit_snow3g_uea2_job(state, job);
 #endif
-        } else if (IMB_CIPHER_KASUMI_UEA1_BITLEN == job->cipher_mode) {
+        } else if (IMB_CIPHER_KASUMI_UEA1_BITLEN == cipher_mode) {
                 return submit_kasumi_uea1_job(state, job);
-        } else if (IMB_CIPHER_CBCS_1_9 == job->cipher_mode) {
+        } else if (IMB_CIPHER_CBCS_1_9 == cipher_mode) {
                 MB_MGR_AES_OOO *aes128_cbcs_ooo = state->aes128_cbcs_ooo;
 
                 return SUBMIT_JOB_AES128_CBCS_1_9_ENC(aes128_cbcs_ooo, job);
-        } else if (IMB_CIPHER_SNOW_V == job->cipher_mode) {
+        } else if (IMB_CIPHER_SNOW_V == cipher_mode) {
                 return SUBMIT_JOB_SNOW_V(job);
-        } else if (IMB_CIPHER_SNOW_V_AEAD == job->cipher_mode) {
+        } else if (IMB_CIPHER_SNOW_V_AEAD == cipher_mode) {
                 return submit_snow_v_aead_job(state, job);
         } else { /* assume IMB_CIPHER_NULL */
                 job->status |= IMB_STATUS_COMPLETED_CIPHER;
@@ -516,14 +521,16 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
         }
 }
 
-__forceinline IMB_JOB *FLUSH_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
+__forceinline IMB_JOB *FLUSH_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job,
+                                            const IMB_CIPHER_MODE cipher_mode,
+                                            const uint64_t key_sz)
 {
-        if (IMB_CIPHER_CBC == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        if (IMB_CIPHER_CBC == cipher_mode) {
+                if (16 == key_sz) {
                         MB_MGR_AES_OOO *aes128_ooo = state->aes128_ooo;
 
                         return FLUSH_JOB_AES_CBC_128_ENC(aes128_ooo);
-                } else if (24 == job->key_len_in_bytes) {
+                } else if (24 == key_sz) {
                         MB_MGR_AES_OOO *aes192_ooo = state->aes192_ooo;
 
                         return FLUSH_JOB_AES_CBC_192_ENC(aes192_ooo);
@@ -532,30 +539,30 @@ __forceinline IMB_JOB *FLUSH_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
 
                         return FLUSH_JOB_AES_CBC_256_ENC(aes256_ooo);
                 }
-        } else if (IMB_CIPHER_DOCSIS_SEC_BPI == job->cipher_mode) {
-                return flush_docsis_enc_job(state, job);
+        } else if (IMB_CIPHER_DOCSIS_SEC_BPI == cipher_mode) {
+                return flush_docsis_enc_job(state, job, key_sz);
 #ifdef FLUSH_JOB_DES_CBC_ENC
-        } else if (IMB_CIPHER_DES == job->cipher_mode) {
+        } else if (IMB_CIPHER_DES == cipher_mode) {
                 MB_MGR_DES_OOO *des_enc_ooo = state->des_enc_ooo;
 
                 return FLUSH_JOB_DES_CBC_ENC(des_enc_ooo);
 #endif /* FLUSH_JOB_DES_CBC_ENC */
 #ifdef FLUSH_JOB_3DES_CBC_ENC
-        } else if (IMB_CIPHER_DES3 == job->cipher_mode) {
+        } else if (IMB_CIPHER_DES3 == cipher_mode) {
                 MB_MGR_DES_OOO *des3_enc_ooo = state->des3_enc_ooo;
 
                 return FLUSH_JOB_3DES_CBC_ENC(des3_enc_ooo);
 #endif /* FLUSH_JOB_3DES_CBC_ENC */
 #ifdef FLUSH_JOB_DOCSIS_DES_ENC
-        } else if (IMB_CIPHER_DOCSIS_DES == job->cipher_mode) {
+        } else if (IMB_CIPHER_DOCSIS_DES == cipher_mode) {
                 MB_MGR_DES_OOO *docsis_des_enc_ooo = state->docsis_des_enc_ooo;
 
                 return FLUSH_JOB_DOCSIS_DES_ENC(docsis_des_enc_ooo);
 #endif /* FLUSH_JOB_DOCSIS_DES_ENC */
-        } else if (IMB_CIPHER_CUSTOM == job->cipher_mode) {
+        } else if (IMB_CIPHER_CUSTOM == cipher_mode) {
                 return FLUSH_JOB_CUSTOM_CIPHER(job);
-        } else if (IMB_CIPHER_ZUC_EEA3 == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        } else if (IMB_CIPHER_ZUC_EEA3 == cipher_mode) {
+                if (16 == key_sz) {
                         MB_MGR_ZUC_OOO *zuc_eea3_ooo = state->zuc_eea3_ooo;
 
                         return FLUSH_JOB_ZUC_EEA3(zuc_eea3_ooo);
@@ -565,12 +572,12 @@ __forceinline IMB_JOB *FLUSH_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
 
                         return FLUSH_JOB_ZUC256_EEA3(zuc256_eea3_ooo);
                 }
-        } else if (IMB_CIPHER_CBCS_1_9 == job->cipher_mode) {
+        } else if (IMB_CIPHER_CBCS_1_9 == cipher_mode) {
                 MB_MGR_AES_OOO *aes128_cbcs_ooo = state->aes128_cbcs_ooo;
 
                 return FLUSH_JOB_AES128_CBCS_1_9_ENC(aes128_cbcs_ooo);
 #ifdef FLUSH_JOB_SNOW3G_UEA2
-        } else if (IMB_CIPHER_SNOW3G_UEA2_BITLEN == job->cipher_mode) {
+        } else if (IMB_CIPHER_SNOW3G_UEA2_BITLEN == cipher_mode) {
                 return FLUSH_JOB_SNOW3G_UEA2(state);
 #endif
         /**
@@ -582,40 +589,42 @@ __forceinline IMB_JOB *FLUSH_JOB_CIPHER_ENC(IMB_MGR *state, IMB_JOB *job)
         }
 }
 
-__forceinline IMB_JOB *SUBMIT_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job)
+__forceinline IMB_JOB *SUBMIT_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job,
+                                             const IMB_CIPHER_MODE cipher_mode,
+                                             const uint64_t key_sz)
 {
-        if (IMB_CIPHER_GCM == job->cipher_mode) {
+        if (IMB_CIPHER_GCM == cipher_mode) {
                 return SUBMIT_JOB_AES_GCM_DEC(state, job);
-        } else if (IMB_CIPHER_GCM_SGL == job->cipher_mode) {
-                return submit_gcm_sgl_dec(state, job);
-        } else if (IMB_CIPHER_CBC == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        } else if (IMB_CIPHER_GCM_SGL == cipher_mode) {
+                return submit_gcm_sgl_dec(state, job, key_sz);
+        } else if (IMB_CIPHER_CBC == cipher_mode) {
+                if (16 == key_sz) {
                         return SUBMIT_JOB_AES_CBC_128_DEC(job);
-                } else if (24 == job->key_len_in_bytes) {
+                } else if (24 == key_sz) {
                         return SUBMIT_JOB_AES_CBC_192_DEC(job);
                 } else { /* assume 32 */
                         return SUBMIT_JOB_AES_CBC_256_DEC(job);
                 }
-        } else if (IMB_CIPHER_CNTR == job->cipher_mode) {
-                return SUBMIT_JOB_AES_CTR(job);
-        } else if (IMB_CIPHER_CNTR_BITLEN == job->cipher_mode) {
-                return SUBMIT_JOB_AES_CTR_BIT(job);
-        } else if (IMB_CIPHER_ECB == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        } else if (IMB_CIPHER_CNTR == cipher_mode) {
+                return SUBMIT_JOB_AES_CTR(job, key_sz);
+        } else if (IMB_CIPHER_CNTR_BITLEN == cipher_mode) {
+                return SUBMIT_JOB_AES_CTR_BIT(job, key_sz);
+        } else if (IMB_CIPHER_ECB == cipher_mode) {
+                if (16 == key_sz) {
                         return SUBMIT_JOB_AES_ECB_128_DEC(job);
-                } else if (24 == job->key_len_in_bytes) {
+                } else if (24 == key_sz) {
                         return SUBMIT_JOB_AES_ECB_192_DEC(job);
                 } else { /* assume 32 */
                         return SUBMIT_JOB_AES_ECB_256_DEC(job);
                 }
-        } else if (IMB_CIPHER_DOCSIS_SEC_BPI == job->cipher_mode) {
-                return submit_docsis_dec_job(state, job);
-        } else if (IMB_CIPHER_PON_AES_CNTR == job->cipher_mode) {
+        } else if (IMB_CIPHER_DOCSIS_SEC_BPI == cipher_mode) {
+                return submit_docsis_dec_job(state, job, key_sz);
+        } else if (IMB_CIPHER_PON_AES_CNTR == cipher_mode) {
                 if (job->msg_len_to_cipher_in_bytes == 0)
                         return SUBMIT_JOB_PON_DEC_NO_CTR(job);
                 else
                         return SUBMIT_JOB_PON_DEC(job);
-        } else if (IMB_CIPHER_DES == job->cipher_mode) {
+        } else if (IMB_CIPHER_DES == cipher_mode) {
 #ifdef SUBMIT_JOB_DES_CBC_DEC
                 MB_MGR_DES_OOO *des_dec_ooo = state->des_dec_ooo;
 
@@ -624,13 +633,13 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job)
                 (void) state;
                 return DES_CBC_DEC(job);
 #endif /* SUBMIT_JOB_DES_CBC_DEC */
-        } else if (IMB_CIPHER_CHACHA20 == job->cipher_mode) {
+        } else if (IMB_CIPHER_CHACHA20 == cipher_mode) {
                 return SUBMIT_JOB_CHACHA20_ENC_DEC(job);
-        } else if (IMB_CIPHER_CHACHA20_POLY1305 == job->cipher_mode) {
+        } else if (IMB_CIPHER_CHACHA20_POLY1305 == cipher_mode) {
                 return SUBMIT_JOB_CHACHA20_POLY1305(state, job);
-        } else if (IMB_CIPHER_CHACHA20_POLY1305_SGL == job->cipher_mode) {
+        } else if (IMB_CIPHER_CHACHA20_POLY1305_SGL == cipher_mode) {
                 return SUBMIT_JOB_CHACHA20_POLY1305_SGL(state, job);
-        } else if (IMB_CIPHER_DOCSIS_DES == job->cipher_mode) {
+        } else if (IMB_CIPHER_DOCSIS_DES == cipher_mode) {
 #ifdef SUBMIT_JOB_DOCSIS_DES_DEC
                 MB_MGR_DES_OOO *docsis_des_dec_ooo = state->docsis_des_dec_ooo;
 
@@ -639,7 +648,7 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job)
 #else
                 return DOCSIS_DES_DEC(job);
 #endif /* SUBMIT_JOB_DOCSIS_DES_DEC */
-        } else if (IMB_CIPHER_DES3 == job->cipher_mode) {
+        } else if (IMB_CIPHER_DES3 == cipher_mode) {
 #ifdef SUBMIT_JOB_3DES_CBC_DEC
                 MB_MGR_DES_OOO *des3_dec_ooo = state->des3_dec_ooo;
 
@@ -647,16 +656,16 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job)
 #else
                 return DES3_CBC_DEC(job);
 #endif
-        } else if (IMB_CIPHER_CUSTOM == job->cipher_mode) {
+        } else if (IMB_CIPHER_CUSTOM == cipher_mode) {
                 return SUBMIT_JOB_CUSTOM_CIPHER(job);
-        } else if (IMB_CIPHER_CCM == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        } else if (IMB_CIPHER_CCM == cipher_mode) {
+                if (16 == key_sz) {
                         return AES_CNTR_CCM_128(job);
                 } else { /* assume 32 */
                         return AES_CNTR_CCM_256(job);
                 }
-        } else if (IMB_CIPHER_ZUC_EEA3 == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        } else if (IMB_CIPHER_ZUC_EEA3 == cipher_mode) {
+                if (16 == key_sz) {
                         MB_MGR_ZUC_OOO *zuc_eea3_ooo = state->zuc_eea3_ooo;
 
                         return SUBMIT_JOB_ZUC_EEA3(zuc_eea3_ooo, job);
@@ -666,19 +675,19 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job)
 
                         return SUBMIT_JOB_ZUC256_EEA3(zuc256_eea3_ooo, job);
                 }
-        } else if (IMB_CIPHER_SNOW3G_UEA2_BITLEN == job->cipher_mode) {
+        } else if (IMB_CIPHER_SNOW3G_UEA2_BITLEN == cipher_mode) {
 #ifdef SUBMIT_JOB_SNOW3G_UEA2
                 return SUBMIT_JOB_SNOW3G_UEA2(state, job);
 #else
                 return def_submit_snow3g_uea2_job(state, job);
 #endif
-        } else if (IMB_CIPHER_KASUMI_UEA1_BITLEN == job->cipher_mode) {
+        } else if (IMB_CIPHER_KASUMI_UEA1_BITLEN == cipher_mode) {
                 return submit_kasumi_uea1_job(state, job);
-        } else if (IMB_CIPHER_CBCS_1_9 == job->cipher_mode) {
+        } else if (IMB_CIPHER_CBCS_1_9 == cipher_mode) {
                 return SUBMIT_JOB_AES128_CBCS_1_9_DEC(job);
-        } else if (IMB_CIPHER_SNOW_V == job->cipher_mode) {
+        } else if (IMB_CIPHER_SNOW_V == cipher_mode) {
                 return SUBMIT_JOB_SNOW_V(job);
-        } else if (IMB_CIPHER_SNOW_V_AEAD == job->cipher_mode) {
+        } else if (IMB_CIPHER_SNOW_V_AEAD == cipher_mode) {
                 return submit_snow_v_aead_job(state, job);
         } else {
                 /* assume IMB_CIPHER_NULL */
@@ -687,15 +696,19 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job)
         }
 }
 
-__forceinline IMB_JOB *FLUSH_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job)
+__forceinline IMB_JOB *FLUSH_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job,
+                                            const IMB_CIPHER_MODE cipher_mode,
+                                            const uint64_t key_sz)
 {
+        (void) job;
+
 #ifdef FLUSH_JOB_SNOW3G_UEA2
-        if (IMB_CIPHER_SNOW3G_UEA2_BITLEN == job->cipher_mode)
+        if (IMB_CIPHER_SNOW3G_UEA2_BITLEN == cipher_mode)
                 return FLUSH_JOB_SNOW3G_UEA2(state);
 #endif
 
 #ifdef FLUSH_JOB_DES_CBC_DEC
-        if (IMB_CIPHER_DES == job->cipher_mode) {
+        if (IMB_CIPHER_DES == cipher_mode) {
                 MB_MGR_DES_OOO *des_dec_ooo = state->des_dec_ooo;
 
                 return FLUSH_JOB_DES_CBC_DEC(des_dec_ooo);
@@ -703,7 +716,7 @@ __forceinline IMB_JOB *FLUSH_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job)
 #endif /* FLUSH_JOB_DES_CBC_DEC */
 
 #ifdef FLUSH_JOB_3DES_CBC_DEC
-        if (IMB_CIPHER_DES3 == job->cipher_mode) {
+        if (IMB_CIPHER_DES3 == cipher_mode) {
                 MB_MGR_DES_OOO *des3_dec_ooo = state->des3_dec_ooo;
 
                 return FLUSH_JOB_3DES_CBC_DEC(des3_dec_ooo);
@@ -712,15 +725,15 @@ __forceinline IMB_JOB *FLUSH_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job)
 
 #ifdef FLUSH_JOB_DOCSIS_DES_DEC
 
-        if (IMB_CIPHER_DOCSIS_DES == job->cipher_mode) {
+        if (IMB_CIPHER_DOCSIS_DES == cipher_mode) {
                 MB_MGR_DES_OOO *docsis_des_dec_ooo = state->docsis_des_dec_ooo;
 
                 return FLUSH_JOB_DOCSIS_DES_DEC(docsis_des_dec_ooo);
         }
 #endif /* FLUSH_JOB_DOCSIS_DES_DEC */
 
-        if (IMB_CIPHER_ZUC_EEA3 == job->cipher_mode) {
-                if (16 == job->key_len_in_bytes) {
+        if (IMB_CIPHER_ZUC_EEA3 == cipher_mode) {
+                if (16 == key_sz) {
                         MB_MGR_ZUC_OOO *zuc_eea3_ooo = state->zuc_eea3_ooo;
 
                         return FLUSH_JOB_ZUC_EEA3(zuc_eea3_ooo);
@@ -1006,9 +1019,11 @@ __forceinline
 IMB_JOB *SUBMIT_JOB_CIPHER(IMB_MGR *state, IMB_JOB *job)
 {
 	if (job->cipher_direction == IMB_DIR_ENCRYPT)
-		job = SUBMIT_JOB_CIPHER_ENC(state, job);
+		job = SUBMIT_JOB_CIPHER_ENC(state, job, job->cipher_mode,
+                                            job->key_len_in_bytes);
 	else
-		job = SUBMIT_JOB_CIPHER_DEC(state, job);
+		job = SUBMIT_JOB_CIPHER_DEC(state, job, job->cipher_mode,
+                                            job->key_len_in_bytes);
 
 	return job;
 }
@@ -1017,9 +1032,11 @@ __forceinline
 IMB_JOB *FLUSH_JOB_CIPHER(IMB_MGR *state, IMB_JOB *job)
 {
 	if (job->cipher_direction == IMB_DIR_ENCRYPT)
-		job = FLUSH_JOB_CIPHER_ENC(state, job);
+		job = FLUSH_JOB_CIPHER_ENC(state, job, job->cipher_mode,
+                                           job->key_len_in_bytes);
 	else
-		job = FLUSH_JOB_CIPHER_DEC(state, job);
+		job = FLUSH_JOB_CIPHER_DEC(state, job, job->cipher_mode,
+                                           job->key_len_in_bytes);
 
 	return job;
 }
-- 
GitLab


From 238729659653b42e0a1037034dd5f31f1c538aae Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 1 Mar 2023 16:04:49 +0000
Subject: [PATCH 186/332] lib: add 64-bit key enum

---
 lib/intel-ipsec-mb.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 5ee4cc22..b041e54a 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -459,6 +459,7 @@ typedef enum {
 } IMB_CHAIN_ORDER;
 
 typedef enum {
+        IMB_KEY_64_BYTES = 8,
         IMB_KEY_128_BYTES = 16,
         IMB_KEY_192_BYTES = 24,
         IMB_KEY_256_BYTES = 32
-- 
GitLab


From f73aa5e6432fa9082341b270ab5deab5b9a17af8 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 1 Mar 2023 16:05:35 +0000
Subject: [PATCH 187/332] lib: [JOB] optimize cipher job submit code path

---
 lib/include/mb_mgr_job_api.h | 835 ++++++++++++++++++++++++++++++++++-
 1 file changed, 828 insertions(+), 7 deletions(-)

diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index 5ac93a77..8fa8a9db 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -748,6 +748,824 @@ __forceinline IMB_JOB *FLUSH_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job,
         return NULL;
 }
 
+/* ========================================================================= */
+/* Generate specialized submit cipher functions and create a table */
+/* ========================================================================= */
+
+/* ========================= */
+/* ======== DECRYPT ======== */
+/* ========================= */
+
+/* AES-CBC */
+static IMB_JOB *submit_cipher_dec_aes_cbc_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CBC,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_cbc_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CBC,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_cbc_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CBC,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* AES-CTR */
+static IMB_JOB *submit_cipher_dec_aes_ctr_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_ctr_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_ctr_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* NULL */
+static IMB_JOB *submit_cipher_dec_null(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_NULL,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* AES DOCSIS */
+static IMB_JOB *submit_cipher_dec_aes_docsis_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_DOCSIS_SEC_BPI,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_docsis_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_DOCSIS_SEC_BPI,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* AES-GCM */
+static IMB_JOB *submit_cipher_dec_aes_gcm_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_gcm_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_gcm_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* CUSTOM */
+static IMB_JOB *submit_cipher_dec_custom(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CUSTOM,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* DES */
+static IMB_JOB *submit_cipher_dec_des_cbc_64(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_DES,
+                                     IMB_KEY_64_BYTES);
+}
+
+/* DES DOCSIS */
+static IMB_JOB *submit_cipher_dec_des_docsis_64(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_DOCSIS_DES,
+                                     IMB_KEY_64_BYTES);
+}
+
+/* AES-CCM */
+static IMB_JOB *submit_cipher_dec_aes_ccm_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CCM,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_ccm_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CCM,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* 3DES */
+static IMB_JOB *submit_cipher_dec_des3_cbc_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_DES3,
+                                     IMB_KEY_192_BYTES);
+}
+
+/* PON AES-CTR */
+static IMB_JOB *submit_cipher_dec_aes_ctr_pon_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_PON_AES_CNTR,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* AES-ECB */
+static IMB_JOB *submit_cipher_dec_aes_ecb_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_ECB,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_ecb_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_ECB,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_ecb_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_ECB,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* AES-CTR BITS */
+static IMB_JOB *submit_cipher_dec_aes_ctr_128_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_ctr_192_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_ctr_256_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* ZUC EEA3 */
+static IMB_JOB *submit_cipher_dec_zuc_eea3_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_ZUC_EEA3,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_zuc_eea3_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_ZUC_EEA3,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* SNOW3G UEA2 */
+static IMB_JOB *submit_cipher_dec_snow3g_uea2_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_SNOW3G_UEA2_BITLEN,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* KASUMI F8 UEA1 */
+static IMB_JOB *submit_cipher_dec_kasumi_uea1_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_KASUMI_UEA1_BITLEN,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* AES-CBCS-1-9 */
+static IMB_JOB *submit_cipher_dec_aes_cbcs_1_9(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CBCS_1_9,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* CHACHA20 */
+static IMB_JOB *submit_cipher_dec_chacha20(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CHACHA20,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* CHACHA20-POLY1305 */
+static IMB_JOB *
+submit_cipher_dec_chacha20_poly1305(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CHACHA20_POLY1305,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* CHACHA20-POLY1305 SGL */
+static IMB_JOB *
+submit_cipher_dec_chacha20_poly1305_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job,
+                                     IMB_CIPHER_CHACHA20_POLY1305_SGL,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* SNOW-V */
+static IMB_JOB *submit_cipher_dec_snow_v(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_SNOW_V,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* SNOW-V AEAD */
+static IMB_JOB *submit_cipher_dec_snow_v_aead(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_SNOW_V_AEAD,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* AES-GCM SGL */
+static IMB_JOB *submit_cipher_dec_aes_gcm_128_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM_SGL,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_gcm_192_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM_SGL,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_dec_aes_gcm_256_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM_SGL,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* ========================= */
+/* ======== ENCRYPT ======== */
+/* ========================= */
+
+/* AES-CBC */
+static IMB_JOB *submit_cipher_enc_aes_cbc_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CBC,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_cbc_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CBC,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_cbc_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CBC,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* AES-CTR */
+static IMB_JOB *submit_cipher_enc_aes_ctr_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_ctr_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_ctr_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* NULL */
+static IMB_JOB *submit_cipher_enc_null(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_NULL,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* AES DOCSIS */
+static IMB_JOB *submit_cipher_enc_aes_docsis_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_DOCSIS_SEC_BPI,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_docsis_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_DOCSIS_SEC_BPI,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* AES-GCM */
+static IMB_JOB *submit_cipher_enc_aes_gcm_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_gcm_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_gcm_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* CUSTOM */
+static IMB_JOB *submit_cipher_enc_custom(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CUSTOM,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* DES */
+static IMB_JOB *submit_cipher_enc_des_cbc_64(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_DES,
+                                     IMB_KEY_64_BYTES);
+}
+
+/* DES DOCSIS */
+static IMB_JOB *submit_cipher_enc_des_docsis_64(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_DOCSIS_DES,
+                                     IMB_KEY_64_BYTES);
+}
+
+/* AES-CCM */
+static IMB_JOB *submit_cipher_enc_aes_ccm_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CCM,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_ccm_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CCM,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* 3DES */
+static IMB_JOB *submit_cipher_enc_des3_cbc_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_DES3,
+                                     IMB_KEY_192_BYTES);
+}
+
+/* PON AES-CTR */
+static IMB_JOB *submit_cipher_enc_aes_ctr_pon_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_PON_AES_CNTR,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* AES-ECB */
+static IMB_JOB *submit_cipher_enc_aes_ecb_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_ECB,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_ecb_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_ECB,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_ecb_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_ECB,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* AES-CTR BITS */
+static IMB_JOB *submit_cipher_enc_aes_ctr_128_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_ctr_192_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_ctr_256_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* ZUC EEA3 */
+static IMB_JOB *submit_cipher_enc_zuc_eea3_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_ZUC_EEA3,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_zuc_eea3_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_ZUC_EEA3,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* SNOW3G UEA2 */
+static IMB_JOB *submit_cipher_enc_snow3g_uea2_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_SNOW3G_UEA2_BITLEN,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* KASUMI F8 UEA1 */
+static IMB_JOB *submit_cipher_enc_kasumi_uea1_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_KASUMI_UEA1_BITLEN,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* AES-CBCS-1-9 */
+static IMB_JOB *submit_cipher_enc_aes_cbcs_1_9(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CBCS_1_9,
+                                     IMB_KEY_128_BYTES);
+}
+
+/* CHACHA20 */
+static IMB_JOB *submit_cipher_enc_chacha20(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CHACHA20,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* CHACHA20-POLY1305 */
+static IMB_JOB *
+submit_cipher_enc_chacha20_poly1305(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CHACHA20_POLY1305,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* CHACHA20-POLY1305 SGL */
+static IMB_JOB *
+submit_cipher_enc_chacha20_poly1305_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job,
+                                     IMB_CIPHER_CHACHA20_POLY1305_SGL,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* SNOW-V */
+static IMB_JOB *submit_cipher_enc_snow_v(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_SNOW_V,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* SNOW-V AEAD */
+static IMB_JOB *submit_cipher_enc_snow_v_aead(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_SNOW_V_AEAD,
+                                     IMB_KEY_256_BYTES);
+}
+
+/* AES-GCM SGL */
+static IMB_JOB *submit_cipher_enc_aes_gcm_128_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM_SGL,
+                                     IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_gcm_192_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM_SGL,
+                                     IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *submit_cipher_enc_aes_gcm_256_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM_SGL,
+                                     IMB_KEY_256_BYTES);
+}
+
+/*
+ * Four entries per algorithm (different key sizes),
+ * algorithms in the same order IMB_CIPHER_MODE
+ *     index 0 - key size from 0 to 64-bits
+ *     index 1 - key size from 65 to 128-bits
+ *     index 2 - key size from 129 to 192-bits
+ *     index 3 - key size from 193 to 256-bits
+ */
+typedef IMB_JOB *(*submit_cipher_fn_t)(IMB_MGR *, IMB_JOB *);
+
+#define ENCRYPT_DECRYPT_GAP 32
+
+/* static const IMB_JOB *(*tab_submit_cipher[])(IMB_MGR *, IMB_JOB *) = { */
+static const submit_cipher_fn_t tab_submit_cipher[] = {
+        /* ========================= */
+        /* === DECRYPT DIRECTION === */
+        /* ========================= */
+
+        /* [0] keep empty - enums start from value 1 */
+        NULL, NULL, NULL, NULL,
+        /* [1] AES-CBC */
+        submit_cipher_dec_null,
+        submit_cipher_dec_aes_cbc_128,
+        submit_cipher_dec_aes_cbc_192,
+        submit_cipher_dec_aes_cbc_256,
+        /* [2] AES-CBC */
+        submit_cipher_dec_null,
+        submit_cipher_dec_aes_ctr_128,
+        submit_cipher_dec_aes_ctr_192,
+        submit_cipher_dec_aes_ctr_256,
+        /* [3] NULL */
+        submit_cipher_dec_null,
+        submit_cipher_dec_null,
+        submit_cipher_dec_null,
+        submit_cipher_dec_null,
+        /* [4] DOCSIS SEC BPI */
+        submit_cipher_dec_null,
+        submit_cipher_dec_aes_docsis_128,
+        submit_cipher_dec_null,
+        submit_cipher_dec_aes_docsis_256,
+        /* [5] AES-GCM */
+        submit_cipher_dec_null,
+        submit_cipher_dec_aes_gcm_128,
+        submit_cipher_dec_aes_gcm_192,
+        submit_cipher_dec_aes_gcm_256,
+        /* [6] CUSTOM */
+        submit_cipher_dec_custom,
+        submit_cipher_dec_custom,
+        submit_cipher_dec_custom,
+        submit_cipher_dec_custom,
+        /* [7] DES */
+        submit_cipher_dec_des_cbc_64,
+        submit_cipher_dec_des_cbc_64,
+        submit_cipher_dec_des_cbc_64,
+        submit_cipher_dec_des_cbc_64,
+        /* [8] DOCSIS DES */
+        submit_cipher_dec_des_docsis_64,
+        submit_cipher_dec_des_docsis_64,
+        submit_cipher_dec_des_docsis_64,
+        submit_cipher_dec_des_docsis_64,
+        /* [9] AES-CCM */
+        submit_cipher_dec_null,
+        submit_cipher_dec_aes_ccm_128,
+        submit_cipher_dec_null,
+        submit_cipher_dec_aes_ccm_256,
+        /* [10] 3DES */
+        submit_cipher_dec_des3_cbc_192,
+        submit_cipher_dec_des3_cbc_192,
+        submit_cipher_dec_des3_cbc_192,
+        submit_cipher_dec_des3_cbc_192,
+        /* [11] PON AES-CTR */
+        submit_cipher_dec_aes_ctr_pon_128,
+        submit_cipher_dec_aes_ctr_pon_128,
+        submit_cipher_dec_aes_ctr_pon_128,
+        submit_cipher_dec_aes_ctr_pon_128,
+        /* [12] AES-ECB */
+        submit_cipher_dec_null,
+        submit_cipher_dec_aes_ecb_128,
+        submit_cipher_dec_aes_ecb_192,
+        submit_cipher_dec_aes_ecb_256,
+        /* [13] AES-CTR BITLEN */
+        submit_cipher_dec_null,
+        submit_cipher_dec_aes_ctr_128_bit,
+        submit_cipher_dec_aes_ctr_192_bit,
+        submit_cipher_dec_aes_ctr_256_bit,
+        /* [14] ZUC EEA3 */
+        submit_cipher_dec_null,
+        submit_cipher_dec_zuc_eea3_128,
+        submit_cipher_dec_null,
+        submit_cipher_dec_zuc_eea3_256,
+        /* [15] SNOW3G UEA2 */
+        submit_cipher_dec_snow3g_uea2_bit,
+        submit_cipher_dec_snow3g_uea2_bit,
+        submit_cipher_dec_snow3g_uea2_bit,
+        submit_cipher_dec_snow3g_uea2_bit,
+        /* [16] KASUMI F8 UEA1 */
+        submit_cipher_dec_kasumi_uea1_bit,
+        submit_cipher_dec_kasumi_uea1_bit,
+        submit_cipher_dec_kasumi_uea1_bit,
+        submit_cipher_dec_kasumi_uea1_bit,
+        /* [17] AES-CBCS-1-9 */
+        submit_cipher_dec_aes_cbcs_1_9,
+        submit_cipher_dec_aes_cbcs_1_9,
+        submit_cipher_dec_aes_cbcs_1_9,
+        submit_cipher_dec_aes_cbcs_1_9,
+        /* [18] CHACHA20 */
+        submit_cipher_dec_chacha20,
+        submit_cipher_dec_chacha20,
+        submit_cipher_dec_chacha20,
+        submit_cipher_dec_chacha20,
+        /* [19] CHACHA20-POLY1305 */
+        submit_cipher_dec_chacha20_poly1305,
+        submit_cipher_dec_chacha20_poly1305,
+        submit_cipher_dec_chacha20_poly1305,
+        submit_cipher_dec_chacha20_poly1305,
+        /* [20] CHACHA20-POLY1305 SGL */
+        submit_cipher_dec_chacha20_poly1305_sgl,
+        submit_cipher_dec_chacha20_poly1305_sgl,
+        submit_cipher_dec_chacha20_poly1305_sgl,
+        submit_cipher_dec_chacha20_poly1305_sgl,
+        /* [21] SNOW-V */
+        submit_cipher_dec_snow_v,
+        submit_cipher_dec_snow_v,
+        submit_cipher_dec_snow_v,
+        submit_cipher_dec_snow_v,
+        /* [22] SNOW-V AEAD */
+        submit_cipher_dec_snow_v_aead,
+        submit_cipher_dec_snow_v_aead,
+        submit_cipher_dec_snow_v_aead,
+        submit_cipher_dec_snow_v_aead,
+        /* [23] AES-GCM SGL */
+        submit_cipher_dec_null,
+        submit_cipher_dec_aes_gcm_128_sgl,
+        submit_cipher_dec_aes_gcm_192_sgl,
+        submit_cipher_dec_aes_gcm_256_sgl,
+
+        /* add new cipher decrypt here */
+
+        /* [24] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [25] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [26] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [27] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [28] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [29] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [30] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [31] NULL */
+        NULL, NULL, NULL, NULL,
+
+        /* ========================= */
+        /* === ENCRYPT DIRECTION === */
+        /* ========================= */
+
+        /* [0] keep empty - enums start from value 1 */
+        NULL, NULL, NULL, NULL,
+        /* [1] AES-CBC */
+        submit_cipher_enc_null,
+        submit_cipher_enc_aes_cbc_128,
+        submit_cipher_enc_aes_cbc_192,
+        submit_cipher_enc_aes_cbc_256,
+        /* [2] AES-CBC */
+        submit_cipher_enc_null,
+        submit_cipher_enc_aes_ctr_128,
+        submit_cipher_enc_aes_ctr_192,
+        submit_cipher_enc_aes_ctr_256,
+        /* [3] NULL */
+        submit_cipher_enc_null,
+        submit_cipher_enc_null,
+        submit_cipher_enc_null,
+        submit_cipher_enc_null,
+        /* [4] DOCSIS SEC BPI */
+        submit_cipher_enc_null,
+        submit_cipher_enc_aes_docsis_128,
+        submit_cipher_enc_null,
+        submit_cipher_enc_aes_docsis_256,
+        /* [5] AES-GCM */
+        submit_cipher_enc_null,
+        submit_cipher_enc_aes_gcm_128,
+        submit_cipher_enc_aes_gcm_192,
+        submit_cipher_enc_aes_gcm_256,
+        /* [6] CUSTOM */
+        submit_cipher_enc_custom,
+        submit_cipher_enc_custom,
+        submit_cipher_enc_custom,
+        submit_cipher_enc_custom,
+        /* [7] DES */
+        submit_cipher_enc_des_cbc_64,
+        submit_cipher_enc_des_cbc_64,
+        submit_cipher_enc_des_cbc_64,
+        submit_cipher_enc_des_cbc_64,
+        /* [8] DOCSIS DES */
+        submit_cipher_enc_des_docsis_64,
+        submit_cipher_enc_des_docsis_64,
+        submit_cipher_enc_des_docsis_64,
+        submit_cipher_enc_des_docsis_64,
+        /* [9] AES-CCM */
+        submit_cipher_enc_null,
+        submit_cipher_enc_aes_ccm_128,
+        submit_cipher_enc_null,
+        submit_cipher_enc_aes_ccm_256,
+        /* [10] 3DES */
+        submit_cipher_enc_des3_cbc_192,
+        submit_cipher_enc_des3_cbc_192,
+        submit_cipher_enc_des3_cbc_192,
+        submit_cipher_enc_des3_cbc_192,
+        /* [11] PON AES-CTR */
+        submit_cipher_enc_aes_ctr_pon_128,
+        submit_cipher_enc_aes_ctr_pon_128,
+        submit_cipher_enc_aes_ctr_pon_128,
+        submit_cipher_enc_aes_ctr_pon_128,
+        /* [12] AES-ECB */
+        submit_cipher_enc_null,
+        submit_cipher_enc_aes_ecb_128,
+        submit_cipher_enc_aes_ecb_192,
+        submit_cipher_enc_aes_ecb_256,
+        /* [13] AES-CTR BITLEN */
+        submit_cipher_enc_null,
+        submit_cipher_enc_aes_ctr_128_bit,
+        submit_cipher_enc_aes_ctr_192_bit,
+        submit_cipher_enc_aes_ctr_256_bit,
+        /* [14] ZUC EEA3 */
+        submit_cipher_enc_null,
+        submit_cipher_enc_zuc_eea3_128,
+        submit_cipher_enc_null,
+        submit_cipher_enc_zuc_eea3_256,
+        /* [15] SNOW3G UEA2 */
+        submit_cipher_enc_snow3g_uea2_bit,
+        submit_cipher_enc_snow3g_uea2_bit,
+        submit_cipher_enc_snow3g_uea2_bit,
+        submit_cipher_enc_snow3g_uea2_bit,
+        /* [16] KASUMI F8 UEA1 */
+        submit_cipher_enc_kasumi_uea1_bit,
+        submit_cipher_enc_kasumi_uea1_bit,
+        submit_cipher_enc_kasumi_uea1_bit,
+        submit_cipher_enc_kasumi_uea1_bit,
+        /* [17] AES-CBCS-1-9 */
+        submit_cipher_enc_aes_cbcs_1_9,
+        submit_cipher_enc_aes_cbcs_1_9,
+        submit_cipher_enc_aes_cbcs_1_9,
+        submit_cipher_enc_aes_cbcs_1_9,
+        /* [18] CHACHA20 */
+        submit_cipher_enc_chacha20,
+        submit_cipher_enc_chacha20,
+        submit_cipher_enc_chacha20,
+        submit_cipher_enc_chacha20,
+        /* [19] CHACHA20-POLY1305 */
+        submit_cipher_enc_chacha20_poly1305,
+        submit_cipher_enc_chacha20_poly1305,
+        submit_cipher_enc_chacha20_poly1305,
+        submit_cipher_enc_chacha20_poly1305,
+        /* [20] CHACHA20-POLY1305 SGL */
+        submit_cipher_enc_chacha20_poly1305_sgl,
+        submit_cipher_enc_chacha20_poly1305_sgl,
+        submit_cipher_enc_chacha20_poly1305_sgl,
+        submit_cipher_enc_chacha20_poly1305_sgl,
+        /* [21] SNOW-V */
+        submit_cipher_enc_snow_v,
+        submit_cipher_enc_snow_v,
+        submit_cipher_enc_snow_v,
+        submit_cipher_enc_snow_v,
+        /* [22] SNOW-V AEAD */
+        submit_cipher_enc_snow_v_aead,
+        submit_cipher_enc_snow_v_aead,
+        submit_cipher_enc_snow_v_aead,
+        submit_cipher_enc_snow_v_aead,
+        /* [23] AES-GCM SGL */
+        submit_cipher_enc_null,
+        submit_cipher_enc_aes_gcm_128_sgl,
+        submit_cipher_enc_aes_gcm_192_sgl,
+        submit_cipher_enc_aes_gcm_256_sgl,
+
+        /* add new cipher encrypt here */
+
+        /* [24] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [25] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [26] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [27] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [28] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [29] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [30] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [31] NULL */
+        NULL, NULL, NULL, NULL,
+
+};
+
 /* ========================================================================= */
 /* Hash submit & flush functions */
 /* ========================================================================= */
@@ -1018,14 +1836,17 @@ FLUSH_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
 __forceinline
 IMB_JOB *SUBMIT_JOB_CIPHER(IMB_MGR *state, IMB_JOB *job)
 {
-	if (job->cipher_direction == IMB_DIR_ENCRYPT)
-		job = SUBMIT_JOB_CIPHER_ENC(state, job, job->cipher_mode,
-                                            job->key_len_in_bytes);
-	else
-		job = SUBMIT_JOB_CIPHER_DEC(state, job, job->cipher_mode,
-                                            job->key_len_in_bytes);
+        const unsigned idx =
+                /* cipher_mode x 4, four key sizes per cipher mode */
+                (job->cipher_mode << 2) +
+                /* map key_len_in_bytes into 0, 1, 2 & 3 index values */
+                (((job->key_len_in_bytes - 1) >> 3) & 3) +
+                 /* encrypt_direction_bit x (ENCRYPT_DECRYPT_GAP x 4) */
+                ((job->cipher_direction & IMB_DIR_ENCRYPT) << 7);
 
-	return job;
+        IMB_ASSERT(ENCRYPT_DECRYPT_GAP < IMB_CIPHER_NUM);
+
+        return tab_submit_cipher[idx](state, job);
 }
 
 __forceinline
-- 
GitLab


From 8d4aa825f397dfd5af553aa671074717447cd22a Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 2 Mar 2023 12:20:43 +0000
Subject: [PATCH 188/332] lib: [JOB] optimize cipher job flush code path

---
 lib/include/mb_mgr_job_api.h | 848 ++++++++++++++++++++++++++++++++++-
 1 file changed, 831 insertions(+), 17 deletions(-)

diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index 8fa8a9db..8b34df3f 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -1276,12 +1276,11 @@ static IMB_JOB *submit_cipher_enc_aes_gcm_256_sgl(IMB_MGR *state, IMB_JOB *job)
  *     index 2 - key size from 129 to 192-bits
  *     index 3 - key size from 193 to 256-bits
  */
-typedef IMB_JOB *(*submit_cipher_fn_t)(IMB_MGR *, IMB_JOB *);
+typedef IMB_JOB *(*submit_flush_cipher_fn_t)(IMB_MGR *, IMB_JOB *);
 
 #define ENCRYPT_DECRYPT_GAP 32
 
-/* static const IMB_JOB *(*tab_submit_cipher[])(IMB_MGR *, IMB_JOB *) = { */
-static const submit_cipher_fn_t tab_submit_cipher[] = {
+static const submit_flush_cipher_fn_t tab_submit_cipher[] = {
         /* ========================= */
         /* === DECRYPT DIRECTION === */
         /* ========================= */
@@ -1566,6 +1565,819 @@ static const submit_cipher_fn_t tab_submit_cipher[] = {
 
 };
 
+/* ========================================================================= */
+/* Generate specialized flush cipher functions and create a table */
+/* ========================================================================= */
+
+/* ========================= */
+/* ======== DECRYPT ======== */
+/* ========================= */
+
+/* AES-CBC */
+static IMB_JOB *flush_cipher_dec_aes_cbc_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CBC,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_cbc_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CBC,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_cbc_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CBC,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* AES-CTR */
+static IMB_JOB *flush_cipher_dec_aes_ctr_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_ctr_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_ctr_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* NULL */
+static IMB_JOB *flush_cipher_dec_null(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_NULL,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* AES DOCSIS */
+static IMB_JOB *flush_cipher_dec_aes_docsis_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_DOCSIS_SEC_BPI,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_docsis_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_DOCSIS_SEC_BPI,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* AES-GCM */
+static IMB_JOB *flush_cipher_dec_aes_gcm_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_gcm_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_gcm_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* CUSTOM */
+static IMB_JOB *flush_cipher_dec_custom(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CUSTOM,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* DES */
+static IMB_JOB *flush_cipher_dec_des_cbc_64(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_DES,
+                                    IMB_KEY_64_BYTES);
+}
+
+/* DES DOCSIS */
+static IMB_JOB *flush_cipher_dec_des_docsis_64(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_DOCSIS_DES,
+                                    IMB_KEY_64_BYTES);
+}
+
+/* AES-CCM */
+static IMB_JOB *flush_cipher_dec_aes_ccm_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CCM,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_ccm_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CCM,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* 3DES */
+static IMB_JOB *flush_cipher_dec_des3_cbc_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_DES3,
+                                    IMB_KEY_192_BYTES);
+}
+
+/* PON AES-CTR */
+static IMB_JOB *flush_cipher_dec_aes_ctr_pon_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_PON_AES_CNTR,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* AES-ECB */
+static IMB_JOB *flush_cipher_dec_aes_ecb_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_ECB,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_ecb_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_ECB,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_ecb_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_ECB,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* AES-CTR BITS */
+static IMB_JOB *flush_cipher_dec_aes_ctr_128_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_ctr_192_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_ctr_256_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* ZUC EEA3 */
+static IMB_JOB *flush_cipher_dec_zuc_eea3_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_ZUC_EEA3,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_zuc_eea3_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_ZUC_EEA3,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* SNOW3G UEA2 */
+static IMB_JOB *flush_cipher_dec_snow3g_uea2_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_SNOW3G_UEA2_BITLEN,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* KASUMI F8 UEA1 */
+static IMB_JOB *flush_cipher_dec_kasumi_uea1_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_KASUMI_UEA1_BITLEN,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* AES-CBCS-1-9 */
+static IMB_JOB *flush_cipher_dec_aes_cbcs_1_9(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CBCS_1_9,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* CHACHA20 */
+static IMB_JOB *flush_cipher_dec_chacha20(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CHACHA20,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* CHACHA20-POLY1305 */
+static IMB_JOB *
+flush_cipher_dec_chacha20_poly1305(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_CHACHA20_POLY1305,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* CHACHA20-POLY1305 SGL */
+static IMB_JOB *
+flush_cipher_dec_chacha20_poly1305_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job,
+                                    IMB_CIPHER_CHACHA20_POLY1305_SGL,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* SNOW-V */
+static IMB_JOB *flush_cipher_dec_snow_v(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_SNOW_V,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* SNOW-V AEAD */
+static IMB_JOB *flush_cipher_dec_snow_v_aead(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_SNOW_V_AEAD,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* AES-GCM SGL */
+static IMB_JOB *flush_cipher_dec_aes_gcm_128_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM_SGL,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_gcm_192_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM_SGL,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_dec_aes_gcm_256_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM_SGL,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* ========================= */
+/* ======== ENCRYPT ======== */
+/* ========================= */
+
+/* AES-CBC */
+static IMB_JOB *flush_cipher_enc_aes_cbc_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CBC,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_cbc_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CBC,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_cbc_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CBC,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* AES-CTR */
+static IMB_JOB *flush_cipher_enc_aes_ctr_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_ctr_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_ctr_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* NULL */
+static IMB_JOB *flush_cipher_enc_null(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_NULL,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* AES DOCSIS */
+static IMB_JOB *flush_cipher_enc_aes_docsis_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_DOCSIS_SEC_BPI,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_docsis_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_DOCSIS_SEC_BPI,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* AES-GCM */
+static IMB_JOB *flush_cipher_enc_aes_gcm_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_gcm_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_gcm_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* CUSTOM */
+static IMB_JOB *flush_cipher_enc_custom(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CUSTOM,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* DES */
+static IMB_JOB *flush_cipher_enc_des_cbc_64(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_DES,
+                                    IMB_KEY_64_BYTES);
+}
+
+/* DES DOCSIS */
+static IMB_JOB *flush_cipher_enc_des_docsis_64(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_DOCSIS_DES,
+                                    IMB_KEY_64_BYTES);
+}
+
+/* AES-CCM */
+static IMB_JOB *flush_cipher_enc_aes_ccm_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CCM,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_ccm_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CCM,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* 3DES */
+static IMB_JOB *flush_cipher_enc_des3_cbc_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_DES3,
+                                    IMB_KEY_192_BYTES);
+}
+
+/* PON AES-CTR */
+static IMB_JOB *flush_cipher_enc_aes_ctr_pon_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_PON_AES_CNTR,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* AES-ECB */
+static IMB_JOB *flush_cipher_enc_aes_ecb_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_ECB,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_ecb_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_ECB,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_ecb_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_ECB,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* AES-CTR BITS */
+static IMB_JOB *flush_cipher_enc_aes_ctr_128_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_ctr_192_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_ctr_256_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CNTR_BITLEN,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* ZUC EEA3 */
+static IMB_JOB *flush_cipher_enc_zuc_eea3_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_ZUC_EEA3,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_zuc_eea3_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_ZUC_EEA3,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* SNOW3G UEA2 */
+static IMB_JOB *flush_cipher_enc_snow3g_uea2_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_SNOW3G_UEA2_BITLEN,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* KASUMI F8 UEA1 */
+static IMB_JOB *flush_cipher_enc_kasumi_uea1_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_KASUMI_UEA1_BITLEN,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* AES-CBCS-1-9 */
+static IMB_JOB *flush_cipher_enc_aes_cbcs_1_9(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CBCS_1_9,
+                                    IMB_KEY_128_BYTES);
+}
+
+/* CHACHA20 */
+static IMB_JOB *flush_cipher_enc_chacha20(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CHACHA20,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* CHACHA20-POLY1305 */
+static IMB_JOB *
+flush_cipher_enc_chacha20_poly1305(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_CHACHA20_POLY1305,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* CHACHA20-POLY1305 SGL */
+static IMB_JOB *
+flush_cipher_enc_chacha20_poly1305_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job,
+                                    IMB_CIPHER_CHACHA20_POLY1305_SGL,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* SNOW-V */
+static IMB_JOB *flush_cipher_enc_snow_v(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_SNOW_V,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* SNOW-V AEAD */
+static IMB_JOB *flush_cipher_enc_snow_v_aead(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_SNOW_V_AEAD,
+                                    IMB_KEY_256_BYTES);
+}
+
+/* AES-GCM SGL */
+static IMB_JOB *flush_cipher_enc_aes_gcm_128_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM_SGL,
+                                    IMB_KEY_128_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_gcm_192_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM_SGL,
+                                    IMB_KEY_192_BYTES);
+}
+
+static IMB_JOB *flush_cipher_enc_aes_gcm_256_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM_SGL,
+                                    IMB_KEY_256_BYTES);
+}
+
+/*
+ * Four entries per algorithm (different key sizes),
+ * algorithms in the same order IMB_CIPHER_MODE
+ *     index 0 - key size from 0 to 64-bits
+ *     index 1 - key size from 65 to 128-bits
+ *     index 2 - key size from 129 to 192-bits
+ *     index 3 - key size from 193 to 256-bits
+ */
+static const submit_flush_cipher_fn_t tab_flush_cipher[] = {
+        /* ========================= */
+        /* === DECRYPT DIRECTION === */
+        /* ========================= */
+
+        /* [0] keep empty - enums start from value 1 */
+        NULL, NULL, NULL, NULL,
+        /* [1] AES-CBC */
+        flush_cipher_dec_null,
+        flush_cipher_dec_aes_cbc_128,
+        flush_cipher_dec_aes_cbc_192,
+        flush_cipher_dec_aes_cbc_256,
+        /* [2] AES-CBC */
+        flush_cipher_dec_null,
+        flush_cipher_dec_aes_ctr_128,
+        flush_cipher_dec_aes_ctr_192,
+        flush_cipher_dec_aes_ctr_256,
+        /* [3] NULL */
+        flush_cipher_dec_null,
+        flush_cipher_dec_null,
+        flush_cipher_dec_null,
+        flush_cipher_dec_null,
+        /* [4] DOCSIS SEC BPI */
+        flush_cipher_dec_null,
+        flush_cipher_dec_aes_docsis_128,
+        flush_cipher_dec_null,
+        flush_cipher_dec_aes_docsis_256,
+        /* [5] AES-GCM */
+        flush_cipher_dec_null,
+        flush_cipher_dec_aes_gcm_128,
+        flush_cipher_dec_aes_gcm_192,
+        flush_cipher_dec_aes_gcm_256,
+        /* [6] CUSTOM */
+        flush_cipher_dec_custom,
+        flush_cipher_dec_custom,
+        flush_cipher_dec_custom,
+        flush_cipher_dec_custom,
+        /* [7] DES */
+        flush_cipher_dec_des_cbc_64,
+        flush_cipher_dec_des_cbc_64,
+        flush_cipher_dec_des_cbc_64,
+        flush_cipher_dec_des_cbc_64,
+        /* [8] DOCSIS DES */
+        flush_cipher_dec_des_docsis_64,
+        flush_cipher_dec_des_docsis_64,
+        flush_cipher_dec_des_docsis_64,
+        flush_cipher_dec_des_docsis_64,
+        /* [9] AES-CCM */
+        flush_cipher_dec_null,
+        flush_cipher_dec_aes_ccm_128,
+        flush_cipher_dec_null,
+        flush_cipher_dec_aes_ccm_256,
+        /* [10] 3DES */
+        flush_cipher_dec_des3_cbc_192,
+        flush_cipher_dec_des3_cbc_192,
+        flush_cipher_dec_des3_cbc_192,
+        flush_cipher_dec_des3_cbc_192,
+        /* [11] PON AES-CTR */
+        flush_cipher_dec_aes_ctr_pon_128,
+        flush_cipher_dec_aes_ctr_pon_128,
+        flush_cipher_dec_aes_ctr_pon_128,
+        flush_cipher_dec_aes_ctr_pon_128,
+        /* [12] AES-ECB */
+        flush_cipher_dec_null,
+        flush_cipher_dec_aes_ecb_128,
+        flush_cipher_dec_aes_ecb_192,
+        flush_cipher_dec_aes_ecb_256,
+        /* [13] AES-CTR BITLEN */
+        flush_cipher_dec_null,
+        flush_cipher_dec_aes_ctr_128_bit,
+        flush_cipher_dec_aes_ctr_192_bit,
+        flush_cipher_dec_aes_ctr_256_bit,
+        /* [14] ZUC EEA3 */
+        flush_cipher_dec_null,
+        flush_cipher_dec_zuc_eea3_128,
+        flush_cipher_dec_null,
+        flush_cipher_dec_zuc_eea3_256,
+        /* [15] SNOW3G UEA2 */
+        flush_cipher_dec_snow3g_uea2_bit,
+        flush_cipher_dec_snow3g_uea2_bit,
+        flush_cipher_dec_snow3g_uea2_bit,
+        flush_cipher_dec_snow3g_uea2_bit,
+        /* [16] KASUMI F8 UEA1 */
+        flush_cipher_dec_kasumi_uea1_bit,
+        flush_cipher_dec_kasumi_uea1_bit,
+        flush_cipher_dec_kasumi_uea1_bit,
+        flush_cipher_dec_kasumi_uea1_bit,
+        /* [17] AES-CBCS-1-9 */
+        flush_cipher_dec_aes_cbcs_1_9,
+        flush_cipher_dec_aes_cbcs_1_9,
+        flush_cipher_dec_aes_cbcs_1_9,
+        flush_cipher_dec_aes_cbcs_1_9,
+        /* [18] CHACHA20 */
+        flush_cipher_dec_chacha20,
+        flush_cipher_dec_chacha20,
+        flush_cipher_dec_chacha20,
+        flush_cipher_dec_chacha20,
+        /* [19] CHACHA20-POLY1305 */
+        flush_cipher_dec_chacha20_poly1305,
+        flush_cipher_dec_chacha20_poly1305,
+        flush_cipher_dec_chacha20_poly1305,
+        flush_cipher_dec_chacha20_poly1305,
+        /* [20] CHACHA20-POLY1305 SGL */
+        flush_cipher_dec_chacha20_poly1305_sgl,
+        flush_cipher_dec_chacha20_poly1305_sgl,
+        flush_cipher_dec_chacha20_poly1305_sgl,
+        flush_cipher_dec_chacha20_poly1305_sgl,
+        /* [21] SNOW-V */
+        flush_cipher_dec_snow_v,
+        flush_cipher_dec_snow_v,
+        flush_cipher_dec_snow_v,
+        flush_cipher_dec_snow_v,
+        /* [22] SNOW-V AEAD */
+        flush_cipher_dec_snow_v_aead,
+        flush_cipher_dec_snow_v_aead,
+        flush_cipher_dec_snow_v_aead,
+        flush_cipher_dec_snow_v_aead,
+        /* [23] AES-GCM SGL */
+        flush_cipher_dec_null,
+        flush_cipher_dec_aes_gcm_128_sgl,
+        flush_cipher_dec_aes_gcm_192_sgl,
+        flush_cipher_dec_aes_gcm_256_sgl,
+
+        /* add new cipher decrypt here */
+
+        /* [24] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [25] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [26] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [27] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [28] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [29] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [30] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [31] NULL */
+        NULL, NULL, NULL, NULL,
+
+        /* ========================= */
+        /* === ENCRYPT DIRECTION === */
+        /* ========================= */
+
+        /* [0] keep empty - enums start from value 1 */
+        NULL, NULL, NULL, NULL,
+        /* [1] AES-CBC */
+        flush_cipher_enc_null,
+        flush_cipher_enc_aes_cbc_128,
+        flush_cipher_enc_aes_cbc_192,
+        flush_cipher_enc_aes_cbc_256,
+        /* [2] AES-CBC */
+        flush_cipher_enc_null,
+        flush_cipher_enc_aes_ctr_128,
+        flush_cipher_enc_aes_ctr_192,
+        flush_cipher_enc_aes_ctr_256,
+        /* [3] NULL */
+        flush_cipher_enc_null,
+        flush_cipher_enc_null,
+        flush_cipher_enc_null,
+        flush_cipher_enc_null,
+        /* [4] DOCSIS SEC BPI */
+        flush_cipher_enc_null,
+        flush_cipher_enc_aes_docsis_128,
+        flush_cipher_enc_null,
+        flush_cipher_enc_aes_docsis_256,
+        /* [5] AES-GCM */
+        flush_cipher_enc_null,
+        flush_cipher_enc_aes_gcm_128,
+        flush_cipher_enc_aes_gcm_192,
+        flush_cipher_enc_aes_gcm_256,
+        /* [6] CUSTOM */
+        flush_cipher_enc_custom,
+        flush_cipher_enc_custom,
+        flush_cipher_enc_custom,
+        flush_cipher_enc_custom,
+        /* [7] DES */
+        flush_cipher_enc_des_cbc_64,
+        flush_cipher_enc_des_cbc_64,
+        flush_cipher_enc_des_cbc_64,
+        flush_cipher_enc_des_cbc_64,
+        /* [8] DOCSIS DES */
+        flush_cipher_enc_des_docsis_64,
+        flush_cipher_enc_des_docsis_64,
+        flush_cipher_enc_des_docsis_64,
+        flush_cipher_enc_des_docsis_64,
+        /* [9] AES-CCM */
+        flush_cipher_enc_null,
+        flush_cipher_enc_aes_ccm_128,
+        flush_cipher_enc_null,
+        flush_cipher_enc_aes_ccm_256,
+        /* [10] 3DES */
+        flush_cipher_enc_des3_cbc_192,
+        flush_cipher_enc_des3_cbc_192,
+        flush_cipher_enc_des3_cbc_192,
+        flush_cipher_enc_des3_cbc_192,
+        /* [11] PON AES-CTR */
+        flush_cipher_enc_aes_ctr_pon_128,
+        flush_cipher_enc_aes_ctr_pon_128,
+        flush_cipher_enc_aes_ctr_pon_128,
+        flush_cipher_enc_aes_ctr_pon_128,
+        /* [12] AES-ECB */
+        flush_cipher_enc_null,
+        flush_cipher_enc_aes_ecb_128,
+        flush_cipher_enc_aes_ecb_192,
+        flush_cipher_enc_aes_ecb_256,
+        /* [13] AES-CTR BITLEN */
+        flush_cipher_enc_null,
+        flush_cipher_enc_aes_ctr_128_bit,
+        flush_cipher_enc_aes_ctr_192_bit,
+        flush_cipher_enc_aes_ctr_256_bit,
+        /* [14] ZUC EEA3 */
+        flush_cipher_enc_null,
+        flush_cipher_enc_zuc_eea3_128,
+        flush_cipher_enc_null,
+        flush_cipher_enc_zuc_eea3_256,
+        /* [15] SNOW3G UEA2 */
+        flush_cipher_enc_snow3g_uea2_bit,
+        flush_cipher_enc_snow3g_uea2_bit,
+        flush_cipher_enc_snow3g_uea2_bit,
+        flush_cipher_enc_snow3g_uea2_bit,
+        /* [16] KASUMI F8 UEA1 */
+        flush_cipher_enc_kasumi_uea1_bit,
+        flush_cipher_enc_kasumi_uea1_bit,
+        flush_cipher_enc_kasumi_uea1_bit,
+        flush_cipher_enc_kasumi_uea1_bit,
+        /* [17] AES-CBCS-1-9 */
+        flush_cipher_enc_aes_cbcs_1_9,
+        flush_cipher_enc_aes_cbcs_1_9,
+        flush_cipher_enc_aes_cbcs_1_9,
+        flush_cipher_enc_aes_cbcs_1_9,
+        /* [18] CHACHA20 */
+        flush_cipher_enc_chacha20,
+        flush_cipher_enc_chacha20,
+        flush_cipher_enc_chacha20,
+        flush_cipher_enc_chacha20,
+        /* [19] CHACHA20-POLY1305 */
+        flush_cipher_enc_chacha20_poly1305,
+        flush_cipher_enc_chacha20_poly1305,
+        flush_cipher_enc_chacha20_poly1305,
+        flush_cipher_enc_chacha20_poly1305,
+        /* [20] CHACHA20-POLY1305 SGL */
+        flush_cipher_enc_chacha20_poly1305_sgl,
+        flush_cipher_enc_chacha20_poly1305_sgl,
+        flush_cipher_enc_chacha20_poly1305_sgl,
+        flush_cipher_enc_chacha20_poly1305_sgl,
+        /* [21] SNOW-V */
+        flush_cipher_enc_snow_v,
+        flush_cipher_enc_snow_v,
+        flush_cipher_enc_snow_v,
+        flush_cipher_enc_snow_v,
+        /* [22] SNOW-V AEAD */
+        flush_cipher_enc_snow_v_aead,
+        flush_cipher_enc_snow_v_aead,
+        flush_cipher_enc_snow_v_aead,
+        flush_cipher_enc_snow_v_aead,
+        /* [23] AES-GCM SGL */
+        flush_cipher_enc_null,
+        flush_cipher_enc_aes_gcm_128_sgl,
+        flush_cipher_enc_aes_gcm_192_sgl,
+        flush_cipher_enc_aes_gcm_256_sgl,
+
+        /* add new cipher encrypt here */
+
+        /* [24] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [25] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [26] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [27] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [28] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [29] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [30] NULL */
+        NULL, NULL, NULL, NULL,
+        /* [31] NULL */
+        NULL, NULL, NULL, NULL,
+
+};
+
 /* ========================================================================= */
 /* Hash submit & flush functions */
 /* ========================================================================= */
@@ -1833,17 +2645,24 @@ FLUSH_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
 /* Job submit & flush functions */
 /* ========================================================================= */
 
-__forceinline
-IMB_JOB *SUBMIT_JOB_CIPHER(IMB_MGR *state, IMB_JOB *job)
+__forceinline unsigned calc_cipher_tab_index(const IMB_JOB *job)
 {
-        const unsigned idx =
-                /* cipher_mode x 4, four key sizes per cipher mode */
-                (job->cipher_mode << 2) +
-                /* map key_len_in_bytes into 0, 1, 2 & 3 index values */
+        /*
+         * - cipher_mode x 4, four key sizes per cipher mode
+         * - map key_len_in_bytes into 0, 1, 2 & 3 index values
+         * - encrypt_direction_bit x (ENCRYPT_DECRYPT_GAP x 4)
+         */
+        return (job->cipher_mode << 2) +
                 (((job->key_len_in_bytes - 1) >> 3) & 3) +
-                 /* encrypt_direction_bit x (ENCRYPT_DECRYPT_GAP x 4) */
                 ((job->cipher_direction & IMB_DIR_ENCRYPT) << 7);
 
+}
+
+__forceinline
+IMB_JOB *SUBMIT_JOB_CIPHER(IMB_MGR *state, IMB_JOB *job)
+{
+        const unsigned idx = calc_cipher_tab_index(job);
+
         IMB_ASSERT(ENCRYPT_DECRYPT_GAP < IMB_CIPHER_NUM);
 
         return tab_submit_cipher[idx](state, job);
@@ -1852,14 +2671,9 @@ IMB_JOB *SUBMIT_JOB_CIPHER(IMB_MGR *state, IMB_JOB *job)
 __forceinline
 IMB_JOB *FLUSH_JOB_CIPHER(IMB_MGR *state, IMB_JOB *job)
 {
-	if (job->cipher_direction == IMB_DIR_ENCRYPT)
-		job = FLUSH_JOB_CIPHER_ENC(state, job, job->cipher_mode,
-                                           job->key_len_in_bytes);
-	else
-		job = FLUSH_JOB_CIPHER_DEC(state, job, job->cipher_mode,
-                                           job->key_len_in_bytes);
+        const unsigned idx = calc_cipher_tab_index(job);
 
-	return job;
+        return tab_flush_cipher[idx](state, job);
 }
 
 /* submit a half-completed job, based on the status */
-- 
GitLab


From 078e157d2e6afb5d29bd6c950bbcbc30deb6fa91 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 2 Mar 2023 13:31:47 +0000
Subject: [PATCH 189/332] lib: [JOB] change hash submit and flush functions to
 allow function specialization

---
 lib/include/mb_mgr_job_api.h | 23 ++++++++++++++++++-----
 1 file changed, 18 insertions(+), 5 deletions(-)

diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index 8b34df3f..338a9198 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -2384,7 +2384,7 @@ static const submit_flush_cipher_fn_t tab_flush_cipher[] = {
 
 __forceinline
 IMB_JOB *
-SUBMIT_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
+SUBMIT_JOB_HASH_EX(IMB_MGR *state, IMB_JOB *job, const IMB_HASH_ALG hash_alg)
 {
         MB_MGR_HMAC_SHA_1_OOO *hmac_sha_1_ooo = state->hmac_sha_1_ooo;
         MB_MGR_HMAC_SHA_256_OOO *hmac_sha_224_ooo = state->hmac_sha_224_ooo;
@@ -2408,8 +2408,7 @@ SUBMIT_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
         MB_MGR_SNOW3G_OOO *snow3g_uia2_ooo = state->snow3g_uia2_ooo;
 #endif
 
-
-        switch (job->hash_alg) {
+        switch (hash_alg) {
         case IMB_AUTH_HMAC_SHA_1:
                 return SUBMIT_JOB_HMAC(hmac_sha_1_ooo, job);
         case IMB_AUTH_HMAC_SHA_224:
@@ -2560,7 +2559,7 @@ SUBMIT_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
 
 __forceinline
 IMB_JOB *
-FLUSH_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
+FLUSH_JOB_HASH_EX(IMB_MGR *state, IMB_JOB *job, const IMB_HASH_ALG hash_alg)
 {
         MB_MGR_HMAC_SHA_1_OOO *hmac_sha_1_ooo = state->hmac_sha_1_ooo;
         MB_MGR_HMAC_SHA_256_OOO *hmac_sha_224_ooo = state->hmac_sha_224_ooo;
@@ -2584,7 +2583,7 @@ FLUSH_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
         MB_MGR_SNOW3G_OOO *snow3g_uia2_ooo = state->snow3g_uia2_ooo;
 #endif
 
-        switch (job->hash_alg) {
+        switch (hash_alg) {
         case IMB_AUTH_HMAC_SHA_1:
                 return FLUSH_JOB_HMAC(hmac_sha_1_ooo);
         case IMB_AUTH_HMAC_SHA_224:
@@ -2641,6 +2640,20 @@ FLUSH_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
         }
 }
 
+__forceinline
+IMB_JOB *
+SUBMIT_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, job->hash_alg);
+}
+
+__forceinline
+IMB_JOB *
+FLUSH_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, job->hash_alg);
+}
+
 /* ========================================================================= */
 /* Job submit & flush functions */
 /* ========================================================================= */
-- 
GitLab


From e9542f746d0ea5c69356a4800c95a19613eeb8de Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 2 Mar 2023 15:06:29 +0000
Subject: [PATCH 190/332] lib: [JOB] optimize hash job submit code path

---
 lib/include/mb_mgr_job_api.h | 343 ++++++++++++++++++++++++++++++++++-
 1 file changed, 335 insertions(+), 8 deletions(-)

diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index 338a9198..f00b5642 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -2640,16 +2640,344 @@ FLUSH_JOB_HASH_EX(IMB_MGR *state, IMB_JOB *job, const IMB_HASH_ALG hash_alg)
         }
 }
 
-__forceinline
-IMB_JOB *
-SUBMIT_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
+/* ========================================================================= */
+/* Generate specialized hash submit functions and create a table */
+/* ========================================================================= */
+
+static IMB_JOB *submit_hash_hmac_sha1(IMB_MGR *state, IMB_JOB *job)
 {
-        return SUBMIT_JOB_HASH_EX(state, job, job->hash_alg);
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_HMAC_SHA_1);
 }
 
-__forceinline
-IMB_JOB *
-FLUSH_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
+static IMB_JOB *submit_hash_hmac_sha224(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_HMAC_SHA_224);
+}
+
+static IMB_JOB *submit_hash_hmac_sha256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_HMAC_SHA_256);
+}
+
+static IMB_JOB *submit_hash_hmac_sha384(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_HMAC_SHA_384);
+}
+
+static IMB_JOB *submit_hash_hmac_sha512(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_HMAC_SHA_512);
+}
+
+static IMB_JOB *submit_hash_aes_xcbc(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_AES_XCBC);
+}
+
+static IMB_JOB *submit_hash_hmac_md5(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_MD5);
+}
+
+static IMB_JOB *submit_hash_null(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_NULL);
+}
+
+static IMB_JOB *submit_hash_aes_gmac(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_AES_GMAC);
+}
+
+static IMB_JOB *submit_hash_custom(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CUSTOM);
+}
+
+static IMB_JOB *submit_hash_aes_ccm(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_AES_CCM);
+}
+
+static IMB_JOB *submit_hash_aes_cmac(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_AES_CMAC);
+}
+
+static IMB_JOB *submit_hash_sha1(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_SHA_1);
+}
+
+static IMB_JOB *submit_hash_sha224(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_SHA_224);
+}
+
+static IMB_JOB *submit_hash_sha256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_SHA_256);
+}
+
+static IMB_JOB *submit_hash_sha384(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_SHA_384);
+}
+
+static IMB_JOB *submit_hash_sha512(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_SHA_512);
+}
+
+static IMB_JOB *submit_hash_aes_cmac_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_AES_CMAC_BITLEN);
+}
+
+static IMB_JOB *submit_hash_pon_crc_bip(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_PON_CRC_BIP);
+}
+
+static IMB_JOB *submit_hash_zuc_eia3_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_ZUC_EIA3_BITLEN);
+}
+
+static IMB_JOB *submit_hash_docsis_crc32(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_DOCSIS_CRC32);
+}
+
+static IMB_JOB *submit_hash_snow3g_uia2_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_SNOW3G_UIA2_BITLEN);
+}
+
+static IMB_JOB *submit_hash_kasumi_uia1(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_KASUMI_UIA1);
+}
+
+static IMB_JOB *submit_hash_aes_gmac_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_AES_GMAC_128);
+}
+
+static IMB_JOB *submit_hash_aes_gmac_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_AES_GMAC_192);
+}
+
+static IMB_JOB *submit_hash_aes_gmac_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_AES_GMAC_256);
+}
+
+static IMB_JOB *submit_hash_aes_cmac_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_AES_CMAC_256);
+}
+
+static IMB_JOB *submit_hash_poly1305(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_POLY1305);
+}
+
+static IMB_JOB *submit_hash_chacha20_poly1305(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CHACHA20_POLY1305);
+}
+
+static IMB_JOB *submit_hash_chacha20_poly1305_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CHACHA20_POLY1305_SGL);
+}
+
+static IMB_JOB *submit_hash_zuc256_eia3_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_ZUC256_EIA3_BITLEN);
+}
+
+static IMB_JOB *submit_hash_snow_v_aead(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_SNOW_V_AEAD);
+}
+
+static IMB_JOB *submit_hash_gcm_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_GCM_SGL);
+}
+
+static IMB_JOB *submit_hash_crc32_ethernet_fcs(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC32_ETHERNET_FCS);
+}
+
+static IMB_JOB *submit_hash_crc32_sctp(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC32_SCTP);
+}
+
+static IMB_JOB *submit_hash_crc32_wimax_ofdma(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC32_WIMAX_OFDMA_DATA);
+}
+
+static IMB_JOB *submit_hash_crc24_lte_a(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC24_LTE_A);
+}
+
+static IMB_JOB *submit_hash_crc24_lte_b(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC24_LTE_B);
+}
+
+static IMB_JOB *submit_hash_crc16_x25(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC16_X25);
+}
+
+static IMB_JOB *submit_hash_crc16_fp_data(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC16_FP_DATA);
+}
+
+static IMB_JOB *submit_hash_crc11_fp_header(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC11_FP_HEADER);
+}
+
+static IMB_JOB *submit_hash_crc10_iuup_data(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC10_IUUP_DATA);
+}
+
+static IMB_JOB *submit_hash_crc8_wimax_odma(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC8_WIMAX_OFDMA_HCS);
+}
+
+static IMB_JOB *submit_hash_crc7_fp_header(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC7_FP_HEADER);
+}
+
+static IMB_JOB *submit_hash_crc6_iuup_header(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_CRC6_IUUP_HEADER);
+}
+
+static IMB_JOB *submit_hash_ghash(IMB_MGR *state, IMB_JOB *job)
+{
+        return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_GHASH);
+}
+
+static const submit_flush_cipher_fn_t tab_submit_hash[] = {
+        /* [0] invalid entry */
+        NULL,
+        /* [1] HMAC-SHA1 */
+        submit_hash_hmac_sha1,
+        /* [2] HMAC-SHA224 */
+        submit_hash_hmac_sha224,
+        /* [3] HMAC-SHA256 */
+        submit_hash_hmac_sha256,
+        /* [4] HMAC-SHA384 */
+        submit_hash_hmac_sha384,
+        /* [5] HMAC-SHA512 */
+        submit_hash_hmac_sha512,
+        /* [6] AES-XCBC */
+        submit_hash_aes_xcbc,
+        /* [7] HMAC-MD5 */
+        submit_hash_hmac_md5,
+        /* [8] NULL */
+        submit_hash_null,
+        /* [9] AES-GMAC */
+        submit_hash_aes_gmac,
+        /* [10] CUSTOM */
+        submit_hash_custom,
+        /* [11] AES-CCM */
+        submit_hash_aes_ccm,
+        /* [12] AES-CMAC */
+        submit_hash_aes_cmac,
+        /* [13] SHA1 */
+        submit_hash_sha1,
+        /* [14] SHA224 */
+        submit_hash_sha224,
+        /* [15] SHA256 */
+        submit_hash_sha256,
+        /* [16] SHA384 */
+        submit_hash_sha384,
+        /* [17] SHA512 */
+        submit_hash_sha512,
+        /* [18] AES-CMAC BIT */
+        submit_hash_aes_cmac_bit,
+        /* [19] PON CRC BIP */
+        submit_hash_pon_crc_bip,
+        /* [20] ZUC EIA3 BIT */
+        submit_hash_zuc_eia3_bit,
+        /* [21] DOCSIS CRC32 */
+        submit_hash_docsis_crc32,
+        /* [22] SNOW3G UIA2 BIT */
+        submit_hash_snow3g_uia2_bit,
+        /* [23] KASUMI UIA1 */
+        submit_hash_kasumi_uia1,
+        /* [24] AES-GMAC-128 */
+        submit_hash_aes_gmac_128,
+        /* [25] AES-GMAC-192 */
+        submit_hash_aes_gmac_192,
+        /* [26] AES-GMAC-256 */
+        submit_hash_aes_gmac_256,
+        /* [27] AES-CMAC-256 */
+        submit_hash_aes_cmac_256,
+        /* [28] POLY1305 */
+        submit_hash_poly1305,
+        /* [29] CHACHA20-POLY1305 */
+        submit_hash_chacha20_poly1305,
+        /* [30] CHACHA20-POLY1305 SGL */
+        submit_hash_chacha20_poly1305_sgl,
+        /* [31] ZUC256 EIA3 */
+        submit_hash_zuc256_eia3_bit,
+        /* [32] SNOW-V AEAD */
+        submit_hash_snow_v_aead,
+        /* [33] GCM SGL */
+        submit_hash_gcm_sgl,
+        /* [34] CRC32 ETHERNET FCS */
+        submit_hash_crc32_ethernet_fcs,
+        /* [35] CRC32 SCTP */
+        submit_hash_crc32_sctp,
+        /* [36] CRC32 WIMAX OFDMA DATA */
+        submit_hash_crc32_wimax_ofdma,
+        /* [37] CRC24 LTE A */
+        submit_hash_crc24_lte_a,
+        /* [38] CRC24 LTE B */
+        submit_hash_crc24_lte_b,
+        /* [39] CRC16 X25 */
+        submit_hash_crc16_x25,
+        /* [40] CRC16 FP DATA */
+        submit_hash_crc16_fp_data,
+        /* [41] CRC11 FP HEADER */
+        submit_hash_crc11_fp_header,
+        /* [42] CRC10 IUUP DATA */
+        submit_hash_crc10_iuup_data,
+        /* [43] CRC8 WIMAX OFDMA HCS */
+        submit_hash_crc8_wimax_odma,
+        /* [44] CRC7 FP HEADER */
+        submit_hash_crc7_fp_header,
+        /* [45] CRC6 IUUP HEADER */
+        submit_hash_crc6_iuup_header,
+        /* [46] GHASH */
+        submit_hash_ghash,
+        /* add new hash algorithms here */
+};
+
+__forceinline IMB_JOB *SUBMIT_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
+{
+        return tab_submit_hash[job->hash_alg](state, job);
+}
+
+__forceinline IMB_JOB *FLUSH_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
 {
         return FLUSH_JOB_HASH_EX(state, job, job->hash_alg);
 }
@@ -2668,7 +2996,6 @@ __forceinline unsigned calc_cipher_tab_index(const IMB_JOB *job)
         return (job->cipher_mode << 2) +
                 (((job->key_len_in_bytes - 1) >> 3) & 3) +
                 ((job->cipher_direction & IMB_DIR_ENCRYPT) << 7);
-
 }
 
 __forceinline
-- 
GitLab


From 11056f87fd8c5d9b1e4f54868fce4d627cc1a71c Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 2 Mar 2023 15:29:26 +0000
Subject: [PATCH 191/332] lib: [JOB] optimize hash job flush code path

---
 lib/include/mb_mgr_job_api.h | 344 ++++++++++++++++++++++++++++++++++-
 1 file changed, 338 insertions(+), 6 deletions(-)

diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index f00b5642..d97ff51b 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -1276,11 +1276,11 @@ static IMB_JOB *submit_cipher_enc_aes_gcm_256_sgl(IMB_MGR *state, IMB_JOB *job)
  *     index 2 - key size from 129 to 192-bits
  *     index 3 - key size from 193 to 256-bits
  */
-typedef IMB_JOB *(*submit_flush_cipher_fn_t)(IMB_MGR *, IMB_JOB *);
+typedef IMB_JOB *(*submit_flush_fn_t)(IMB_MGR *, IMB_JOB *);
 
 #define ENCRYPT_DECRYPT_GAP 32
 
-static const submit_flush_cipher_fn_t tab_submit_cipher[] = {
+static const submit_flush_fn_t tab_submit_cipher[] = {
         /* ========================= */
         /* === DECRYPT DIRECTION === */
         /* ========================= */
@@ -2093,7 +2093,7 @@ static IMB_JOB *flush_cipher_enc_aes_gcm_256_sgl(IMB_MGR *state, IMB_JOB *job)
  *     index 2 - key size from 129 to 192-bits
  *     index 3 - key size from 193 to 256-bits
  */
-static const submit_flush_cipher_fn_t tab_flush_cipher[] = {
+static const submit_flush_fn_t tab_flush_cipher[] = {
         /* ========================= */
         /* === DECRYPT DIRECTION === */
         /* ========================= */
@@ -2874,7 +2874,7 @@ static IMB_JOB *submit_hash_ghash(IMB_MGR *state, IMB_JOB *job)
         return SUBMIT_JOB_HASH_EX(state, job, IMB_AUTH_GHASH);
 }
 
-static const submit_flush_cipher_fn_t tab_submit_hash[] = {
+static const submit_flush_fn_t tab_submit_hash[] = {
         /* [0] invalid entry */
         NULL,
         /* [1] HMAC-SHA1 */
@@ -2972,6 +2972,338 @@ static const submit_flush_cipher_fn_t tab_submit_hash[] = {
         /* add new hash algorithms here */
 };
 
+/* ========================================================================= */
+/* Generate specialized hash flush functions and create a table */
+/* ========================================================================= */
+
+static IMB_JOB *flush_hash_hmac_sha1(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_HMAC_SHA_1);
+}
+
+static IMB_JOB *flush_hash_hmac_sha224(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_HMAC_SHA_224);
+}
+
+static IMB_JOB *flush_hash_hmac_sha256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_HMAC_SHA_256);
+}
+
+static IMB_JOB *flush_hash_hmac_sha384(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_HMAC_SHA_384);
+}
+
+static IMB_JOB *flush_hash_hmac_sha512(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_HMAC_SHA_512);
+}
+
+static IMB_JOB *flush_hash_aes_xcbc(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_AES_XCBC);
+}
+
+static IMB_JOB *flush_hash_hmac_md5(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_MD5);
+}
+
+static IMB_JOB *flush_hash_null(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_NULL);
+}
+
+static IMB_JOB *flush_hash_aes_gmac(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_AES_GMAC);
+}
+
+static IMB_JOB *flush_hash_custom(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CUSTOM);
+}
+
+static IMB_JOB *flush_hash_aes_ccm(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_AES_CCM);
+}
+
+static IMB_JOB *flush_hash_aes_cmac(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_AES_CMAC);
+}
+
+static IMB_JOB *flush_hash_sha1(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_SHA_1);
+}
+
+static IMB_JOB *flush_hash_sha224(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_SHA_224);
+}
+
+static IMB_JOB *flush_hash_sha256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_SHA_256);
+}
+
+static IMB_JOB *flush_hash_sha384(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_SHA_384);
+}
+
+static IMB_JOB *flush_hash_sha512(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_SHA_512);
+}
+
+static IMB_JOB *flush_hash_aes_cmac_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_AES_CMAC_BITLEN);
+}
+
+static IMB_JOB *flush_hash_pon_crc_bip(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_PON_CRC_BIP);
+}
+
+static IMB_JOB *flush_hash_zuc_eia3_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_ZUC_EIA3_BITLEN);
+}
+
+static IMB_JOB *flush_hash_docsis_crc32(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_DOCSIS_CRC32);
+}
+
+static IMB_JOB *flush_hash_snow3g_uia2_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_SNOW3G_UIA2_BITLEN);
+}
+
+static IMB_JOB *flush_hash_kasumi_uia1(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_KASUMI_UIA1);
+}
+
+static IMB_JOB *flush_hash_aes_gmac_128(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_AES_GMAC_128);
+}
+
+static IMB_JOB *flush_hash_aes_gmac_192(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_AES_GMAC_192);
+}
+
+static IMB_JOB *flush_hash_aes_gmac_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_AES_GMAC_256);
+}
+
+static IMB_JOB *flush_hash_aes_cmac_256(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_AES_CMAC_256);
+}
+
+static IMB_JOB *flush_hash_poly1305(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_POLY1305);
+}
+
+static IMB_JOB *flush_hash_chacha20_poly1305(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CHACHA20_POLY1305);
+}
+
+static IMB_JOB *flush_hash_chacha20_poly1305_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CHACHA20_POLY1305_SGL);
+}
+
+static IMB_JOB *flush_hash_zuc256_eia3_bit(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_ZUC256_EIA3_BITLEN);
+}
+
+static IMB_JOB *flush_hash_snow_v_aead(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_SNOW_V_AEAD);
+}
+
+static IMB_JOB *flush_hash_gcm_sgl(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_GCM_SGL);
+}
+
+static IMB_JOB *flush_hash_crc32_ethernet_fcs(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC32_ETHERNET_FCS);
+}
+
+static IMB_JOB *flush_hash_crc32_sctp(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC32_SCTP);
+}
+
+static IMB_JOB *flush_hash_crc32_wimax_ofdma(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC32_WIMAX_OFDMA_DATA);
+}
+
+static IMB_JOB *flush_hash_crc24_lte_a(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC24_LTE_A);
+}
+
+static IMB_JOB *flush_hash_crc24_lte_b(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC24_LTE_B);
+}
+
+static IMB_JOB *flush_hash_crc16_x25(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC16_X25);
+}
+
+static IMB_JOB *flush_hash_crc16_fp_data(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC16_FP_DATA);
+}
+
+static IMB_JOB *flush_hash_crc11_fp_header(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC11_FP_HEADER);
+}
+
+static IMB_JOB *flush_hash_crc10_iuup_data(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC10_IUUP_DATA);
+}
+
+static IMB_JOB *flush_hash_crc8_wimax_odma(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC8_WIMAX_OFDMA_HCS);
+}
+
+static IMB_JOB *flush_hash_crc7_fp_header(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC7_FP_HEADER);
+}
+
+static IMB_JOB *flush_hash_crc6_iuup_header(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_CRC6_IUUP_HEADER);
+}
+
+static IMB_JOB *flush_hash_ghash(IMB_MGR *state, IMB_JOB *job)
+{
+        return FLUSH_JOB_HASH_EX(state, job, IMB_AUTH_GHASH);
+}
+
+static const submit_flush_fn_t tab_flush_hash[] = {
+        /* [0] invalid entry */
+        NULL,
+        /* [1] HMAC-SHA1 */
+        flush_hash_hmac_sha1,
+        /* [2] HMAC-SHA224 */
+        flush_hash_hmac_sha224,
+        /* [3] HMAC-SHA256 */
+        flush_hash_hmac_sha256,
+        /* [4] HMAC-SHA384 */
+        flush_hash_hmac_sha384,
+        /* [5] HMAC-SHA512 */
+        flush_hash_hmac_sha512,
+        /* [6] AES-XCBC */
+        flush_hash_aes_xcbc,
+        /* [7] HMAC-MD5 */
+        flush_hash_hmac_md5,
+        /* [8] NULL */
+        flush_hash_null,
+        /* [9] AES-GMAC */
+        flush_hash_aes_gmac,
+        /* [10] CUSTOM */
+        flush_hash_custom,
+        /* [11] AES-CCM */
+        flush_hash_aes_ccm,
+        /* [12] AES-CMAC */
+        flush_hash_aes_cmac,
+        /* [13] SHA1 */
+        flush_hash_sha1,
+        /* [14] SHA224 */
+        flush_hash_sha224,
+        /* [15] SHA256 */
+        flush_hash_sha256,
+        /* [16] SHA384 */
+        flush_hash_sha384,
+        /* [17] SHA512 */
+        flush_hash_sha512,
+        /* [18] AES-CMAC BIT */
+        flush_hash_aes_cmac_bit,
+        /* [19] PON CRC BIP */
+        flush_hash_pon_crc_bip,
+        /* [20] ZUC EIA3 BIT */
+        flush_hash_zuc_eia3_bit,
+        /* [21] DOCSIS CRC32 */
+        flush_hash_docsis_crc32,
+        /* [22] SNOW3G UIA2 BIT */
+        flush_hash_snow3g_uia2_bit,
+        /* [23] KASUMI UIA1 */
+        flush_hash_kasumi_uia1,
+        /* [24] AES-GMAC-128 */
+        flush_hash_aes_gmac_128,
+        /* [25] AES-GMAC-192 */
+        flush_hash_aes_gmac_192,
+        /* [26] AES-GMAC-256 */
+        flush_hash_aes_gmac_256,
+        /* [27] AES-CMAC-256 */
+        flush_hash_aes_cmac_256,
+        /* [28] POLY1305 */
+        flush_hash_poly1305,
+        /* [29] CHACHA20-POLY1305 */
+        flush_hash_chacha20_poly1305,
+        /* [30] CHACHA20-POLY1305 SGL */
+        flush_hash_chacha20_poly1305_sgl,
+        /* [31] ZUC256 EIA3 */
+        flush_hash_zuc256_eia3_bit,
+        /* [32] SNOW-V AEAD */
+        flush_hash_snow_v_aead,
+        /* [33] GCM SGL */
+        flush_hash_gcm_sgl,
+        /* [34] CRC32 ETHERNET FCS */
+        flush_hash_crc32_ethernet_fcs,
+        /* [35] CRC32 SCTP */
+        flush_hash_crc32_sctp,
+        /* [36] CRC32 WIMAX OFDMA DATA */
+        flush_hash_crc32_wimax_ofdma,
+        /* [37] CRC24 LTE A */
+        flush_hash_crc24_lte_a,
+        /* [38] CRC24 LTE B */
+        flush_hash_crc24_lte_b,
+        /* [39] CRC16 X25 */
+        flush_hash_crc16_x25,
+        /* [40] CRC16 FP DATA */
+        flush_hash_crc16_fp_data,
+        /* [41] CRC11 FP HEADER */
+        flush_hash_crc11_fp_header,
+        /* [42] CRC10 IUUP DATA */
+        flush_hash_crc10_iuup_data,
+        /* [43] CRC8 WIMAX OFDMA HCS */
+        flush_hash_crc8_wimax_odma,
+        /* [44] CRC7 FP HEADER */
+        flush_hash_crc7_fp_header,
+        /* [45] CRC6 IUUP HEADER */
+        flush_hash_crc6_iuup_header,
+        /* [46] GHASH */
+        flush_hash_ghash,
+        /* add new hash algorithms here */
+};
+
 __forceinline IMB_JOB *SUBMIT_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
 {
         return tab_submit_hash[job->hash_alg](state, job);
@@ -2979,7 +3311,7 @@ __forceinline IMB_JOB *SUBMIT_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
 
 __forceinline IMB_JOB *FLUSH_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
 {
-        return FLUSH_JOB_HASH_EX(state, job, job->hash_alg);
+        return tab_flush_hash[job->hash_alg](state, job);
 }
 
 /* ========================================================================= */
@@ -3003,7 +3335,7 @@ IMB_JOB *SUBMIT_JOB_CIPHER(IMB_MGR *state, IMB_JOB *job)
 {
         const unsigned idx = calc_cipher_tab_index(job);
 
-        IMB_ASSERT(ENCRYPT_DECRYPT_GAP < IMB_CIPHER_NUM);
+        IMB_ASSERT(ENCRYPT_DECRYPT_GAP >= IMB_CIPHER_NUM);
 
         return tab_submit_cipher[idx](state, job);
 }
-- 
GitLab


From 41b2d2f7935f4ad00e69cdd0223084d4b0118dc5 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 7 Mar 2023 19:49:42 +0000
Subject: [PATCH 192/332] lib: [job] add key size argument to AES-GCM submit in
 decrypt direction

---
 lib/include/mb_mgr_job_api.h | 9 +++++----
 1 file changed, 5 insertions(+), 4 deletions(-)

diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index d97ff51b..a83aaae4 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -181,12 +181,13 @@ __forceinline IMB_JOB * SUBMIT_JOB_AES128_CBCS_1_9_DEC(IMB_JOB *job)
 /* ========================================================================= */
 /* AES-GCM */
 /* ========================================================================= */
-__forceinline IMB_JOB *SUBMIT_JOB_AES_GCM_DEC(IMB_MGR *state, IMB_JOB *job)
+__forceinline IMB_JOB *SUBMIT_JOB_AES_GCM_DEC(IMB_MGR *state, IMB_JOB *job,
+                                              const uint64_t key_sz)
 {
         DECLARE_ALIGNED(struct gcm_context_data ctx, 16);
         (void) state;
 
-        if (16 == job->key_len_in_bytes) {
+        if (16 == key_sz) {
                 AES_GCM_DEC_IV_128(job->dec_keys,
                                    &ctx, job->dst,
                                    job->src +
@@ -197,7 +198,7 @@ __forceinline IMB_JOB *SUBMIT_JOB_AES_GCM_DEC(IMB_MGR *state, IMB_JOB *job)
                                    job->u.GCM.aad_len_in_bytes,
                                    job->auth_tag_output,
                                    job->auth_tag_output_len_in_bytes);
-        } else if (24 == job->key_len_in_bytes) {
+        } else if (24 == key_sz) {
                 AES_GCM_DEC_IV_192(job->dec_keys,
                                    &ctx, job->dst,
                                    job->src +
@@ -594,7 +595,7 @@ __forceinline IMB_JOB *SUBMIT_JOB_CIPHER_DEC(IMB_MGR *state, IMB_JOB *job,
                                              const uint64_t key_sz)
 {
         if (IMB_CIPHER_GCM == cipher_mode) {
-                return SUBMIT_JOB_AES_GCM_DEC(state, job);
+                return SUBMIT_JOB_AES_GCM_DEC(state, job, key_sz);
         } else if (IMB_CIPHER_GCM_SGL == cipher_mode) {
                 return submit_gcm_sgl_dec(state, job, key_sz);
         } else if (IMB_CIPHER_CBC == cipher_mode) {
-- 
GitLab


From a250739695a6b9a1cfd70d7cbddf06a00440fc6d Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 7 Mar 2023 19:52:48 +0000
Subject: [PATCH 193/332] lib: [job] prioritize AES-GCM in job submit

---
 lib/include/mb_mgr_job_api.h | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index a83aaae4..75787993 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -3366,6 +3366,9 @@ IMB_JOB *RESUBMIT_JOB(IMB_MGR *state, IMB_JOB *job)
 __forceinline
 IMB_JOB *submit_new_job(IMB_MGR *state, IMB_JOB *job)
 {
+        if (job->cipher_mode == IMB_CIPHER_GCM)
+                return SUBMIT_JOB_CIPHER(state, job);
+
 	if (job->chain_order == IMB_ORDER_CIPHER_HASH)
 		job = SUBMIT_JOB_CIPHER(state, job);
 	else
-- 
GitLab


From 446933a668e0fc136dd8f9be461b7e27019248fc Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 10 Mar 2023 12:08:42 +0000
Subject: [PATCH 194/332] lib: [burst] add imb_set_cipher_suite_id() for use
 with async burst API

---
 lib/Makefile                     |  3 +-
 lib/avx2_t1/mb_mgr_avx2_t1.c     |  2 +
 lib/avx2_t2/mb_mgr_avx2_t2.c     |  2 +
 lib/avx2_t3/mb_mgr_avx2_t3.c     |  2 +
 lib/avx512_t1/mb_mgr_avx512_t1.c |  3 +-
 lib/avx512_t2/mb_mgr_avx512_t2.c |  2 +
 lib/avx_t1/mb_mgr_avx_t1.c       |  2 +
 lib/avx_t2/mb_mgr_avx_t2.c       |  5 +-
 lib/include/arch_avx2_type1.h    |  2 +
 lib/include/arch_avx2_type2.h    |  3 ++
 lib/include/arch_avx2_type3.h    |  5 +-
 lib/include/arch_avx512_type1.h  |  3 +-
 lib/include/arch_avx512_type2.h  |  2 +-
 lib/include/arch_avx_type1.h     |  2 +
 lib/include/arch_avx_type2.h     | 37 +++++++++++++
 lib/include/arch_sse_type1.h     |  2 +
 lib/include/arch_sse_type2.h     |  2 +
 lib/include/arch_sse_type3.h     |  2 +
 lib/include/error.inc            |  3 +-
 lib/include/mb_mgr_job_api.h     | 91 ++++++++++++++++++++++++++++++++
 lib/intel-ipsec-mb.h             | 18 +++++++
 lib/libIPSec_MB.def              |  1 +
 lib/sse_t1/mb_mgr_sse_t1.c       |  2 +
 lib/sse_t2/mb_mgr_sse_t2.c       |  2 +
 lib/sse_t3/mb_mgr_sse_t3.c       |  2 +
 lib/win_x64.mak                  |  3 +-
 lib/x86_64/cipher_suite_id.c     | 45 ++++++++++++++++
 lib/x86_64/error.c               |  5 +-
 28 files changed, 244 insertions(+), 9 deletions(-)
 create mode 100644 lib/include/arch_avx_type2.h
 create mode 100644 lib/x86_64/cipher_suite_id.c

diff --git a/lib/Makefile b/lib/Makefile
index 375b5c1d..74eee926 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -314,7 +314,8 @@ c_lib_objs := \
 	self_test.o \
 	quic_aes_gcm.o \
 	quic_hp_aes_ecb.o \
-	hmac_ipad_opad.o
+	hmac_ipad_opad.o \
+	cipher_suite_id.o
 
 ifeq ($(AESNI_EMU), y)
 c_lib_objs := $(c_lib_objs) \
diff --git a/lib/avx2_t1/mb_mgr_avx2_t1.c b/lib/avx2_t1/mb_mgr_avx2_t1.c
index c16e2e98..dc034284 100644
--- a/lib/avx2_t1/mb_mgr_avx2_t1.c
+++ b/lib/avx2_t1/mb_mgr_avx2_t1.c
@@ -72,6 +72,7 @@
 #define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_avx2_t1
 #define SUBMIT_HASH_BURST submit_hash_burst_avx2_t1
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_avx2_t1
+#define SET_SUITE_ID_FN   set_suite_id_avx2_t1
 
 /* Hash */
 #define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_AVX2
@@ -360,6 +361,7 @@ init_mb_mgr_avx2_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
         state->submit_hash_burst   = SUBMIT_HASH_BURST;
         state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+        state->set_suite_id        = SET_SUITE_ID_FN;
 
         state->keyexp_128          = aes_keyexp_128_avx2;
         state->keyexp_192          = aes_keyexp_192_avx2;
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index 63fcb6a2..d72509d5 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -73,6 +73,7 @@
 #define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_avx2_t2
 #define SUBMIT_HASH_BURST submit_hash_burst_avx2_t2
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_avx2_t2
+#define SET_SUITE_ID_FN   set_suite_id_avx2_t2
 
 /* Hash */
 #define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_AVX2
@@ -360,6 +361,7 @@ init_mb_mgr_avx2_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
         state->submit_hash_burst   = SUBMIT_HASH_BURST;
         state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+        state->set_suite_id        = SET_SUITE_ID_FN;
 
         state->keyexp_128          = aes_keyexp_128_avx2;
         state->keyexp_192          = aes_keyexp_192_avx2;
diff --git a/lib/avx2_t3/mb_mgr_avx2_t3.c b/lib/avx2_t3/mb_mgr_avx2_t3.c
index 8af8e995..b53f252d 100644
--- a/lib/avx2_t3/mb_mgr_avx2_t3.c
+++ b/lib/avx2_t3/mb_mgr_avx2_t3.c
@@ -74,6 +74,7 @@
 #define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_avx2_t3
 #define SUBMIT_HASH_BURST submit_hash_burst_avx2_t3
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_avx2_t3
+#define SET_SUITE_ID_FN   set_suite_id_avx2_t3
 
 /* Hash */
 #define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_AVX2
@@ -361,6 +362,7 @@ init_mb_mgr_avx2_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
         state->submit_hash_burst   = SUBMIT_HASH_BURST;
         state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+        state->set_suite_id        = SET_SUITE_ID_FN;
 
         state->keyexp_128          = aes_keyexp_128_avx2;
         state->keyexp_192          = aes_keyexp_192_avx2;
diff --git a/lib/avx512_t1/mb_mgr_avx512_t1.c b/lib/avx512_t1/mb_mgr_avx512_t1.c
index 5d82aa6d..86a40954 100644
--- a/lib/avx512_t1/mb_mgr_avx512_t1.c
+++ b/lib/avx512_t1/mb_mgr_avx512_t1.c
@@ -74,7 +74,7 @@
 #define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_avx512_t1
 #define SUBMIT_HASH_BURST submit_hash_burst_avx512_t1
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_avx512_t1
-
+#define SET_SUITE_ID_FN   set_suite_id_avx512_t1
 
 /* Hash */
 #define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_AVX512
@@ -465,6 +465,7 @@ init_mb_mgr_avx512_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
         state->submit_hash_burst   = SUBMIT_HASH_BURST;
         state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+        state->set_suite_id        = SET_SUITE_ID_FN;
 
         state->keyexp_128          = aes_keyexp_128_avx512;
         state->keyexp_192          = aes_keyexp_192_avx512;
diff --git a/lib/avx512_t2/mb_mgr_avx512_t2.c b/lib/avx512_t2/mb_mgr_avx512_t2.c
index ce53f0e9..82e7d93c 100644
--- a/lib/avx512_t2/mb_mgr_avx512_t2.c
+++ b/lib/avx512_t2/mb_mgr_avx512_t2.c
@@ -79,6 +79,7 @@
 #define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_avx512_t2
 #define SUBMIT_HASH_BURST submit_hash_burst_avx512_t2
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_avx512_t2
+#define SET_SUITE_ID_FN   set_suite_id_avx512_t2
 
 /* Hash */
 #define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_AVX512_T2
@@ -470,6 +471,7 @@ init_mb_mgr_avx512_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
         state->submit_hash_burst   = SUBMIT_HASH_BURST;
         state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+        state->set_suite_id        = SET_SUITE_ID_FN;
 
         state->keyexp_128          = aes_keyexp_128_avx512;
         state->keyexp_192          = aes_keyexp_192_avx512;
diff --git a/lib/avx_t1/mb_mgr_avx_t1.c b/lib/avx_t1/mb_mgr_avx_t1.c
index c4489899..bcd71c21 100644
--- a/lib/avx_t1/mb_mgr_avx_t1.c
+++ b/lib/avx_t1/mb_mgr_avx_t1.c
@@ -66,6 +66,7 @@
 #define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_avx_t1
 #define SUBMIT_HASH_BURST submit_hash_burst_avx_t1
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_avx_t1
+#define SET_SUITE_ID_FN   set_suite_id_avx_t1
 
 /* Hash */
 #define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_AVX
@@ -358,6 +359,7 @@ init_mb_mgr_avx_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
         state->submit_hash_burst   = SUBMIT_HASH_BURST;
         state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+        state->set_suite_id        = SET_SUITE_ID_FN;
 
         state->keyexp_128          = aes_keyexp_128_avx;
         state->keyexp_192          = aes_keyexp_192_avx;
diff --git a/lib/avx_t2/mb_mgr_avx_t2.c b/lib/avx_t2/mb_mgr_avx_t2.c
index 3f1d03fe..a7847297 100644
--- a/lib/avx_t2/mb_mgr_avx_t2.c
+++ b/lib/avx_t2/mb_mgr_avx_t2.c
@@ -48,6 +48,7 @@
 #include "include/arch_sse_type1.h" /* snow3g */
 #include "include/arch_sse_type2.h" /* shani */
 #include "include/arch_avx_type1.h"
+#include "include/arch_avx_type2.h"
 
 #include "include/ooo_mgr_reset.h"
 
@@ -69,6 +70,7 @@
 #define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_avx_t2
 #define SUBMIT_HASH_BURST submit_hash_burst_avx_t2
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_avx_t2
+#define SET_SUITE_ID_FN   set_suite_id_avx_t2
 
 /* Hash */
 #define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_AVX_T2
@@ -328,7 +330,7 @@ IMB_DLL_LOCAL void
 init_mb_mgr_avx_t2_internal(IMB_MGR *state, const int reset_mgrs)
 {
         /* Check if CPU flags needed for AVX interface are present */
-        if ((state->features & IMB_CPUFLAGS_AVX) != IMB_CPUFLAGS_AVX) {
+        if ((state->features & IMB_CPUFLAGS_AVX_T2) != IMB_CPUFLAGS_AVX_T2) {
                 imb_set_errno(state, IMB_ERR_MISSING_CPUFLAGS_INIT_MGR);
                 return;
         }
@@ -359,6 +361,7 @@ init_mb_mgr_avx_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
         state->submit_hash_burst   = SUBMIT_HASH_BURST;
         state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+        state->set_suite_id        = SET_SUITE_ID_FN;
 
         state->keyexp_128          = aes_keyexp_128_avx;
         state->keyexp_192          = aes_keyexp_192_avx;
diff --git a/lib/include/arch_avx2_type1.h b/lib/include/arch_avx2_type1.h
index c72a189a..a7cb5512 100644
--- a/lib/include/arch_avx2_type1.h
+++ b/lib/include/arch_avx2_type1.h
@@ -120,4 +120,6 @@ IMB_JOB *submit_job_hmac_md5_avx2(MB_MGR_HMAC_MD5_OOO *state,
                                   IMB_JOB *job);
 IMB_JOB *flush_job_hmac_md5_avx2(MB_MGR_HMAC_MD5_OOO *state);
 
+IMB_DLL_EXPORT void set_suite_id_avx2_t1(IMB_MGR *state, IMB_JOB *job);
+
 #endif /* IMB_ASM_AVX2_T1_H */
diff --git a/lib/include/arch_avx2_type2.h b/lib/include/arch_avx2_type2.h
index cd7f9761..f4177bf5 100644
--- a/lib/include/arch_avx2_type2.h
+++ b/lib/include/arch_avx2_type2.h
@@ -67,4 +67,7 @@ IMB_JOB *submit_job_zuc256_eia3_gfni_avx2(MB_MGR_ZUC_OOO *state,
                                      const uint64_t tag_sz);
 IMB_JOB *flush_job_zuc256_eia3_gfni_avx2(MB_MGR_ZUC_OOO *state,
                                     const uint64_t tag_sz);
+
+IMB_DLL_EXPORT void set_suite_id_avx2_t2(IMB_MGR *state, IMB_JOB *job);
+
 #endif /* IMB_ASM_AVX2_T2_H */
diff --git a/lib/include/arch_avx2_type3.h b/lib/include/arch_avx2_type3.h
index 3c2bf674..3ff22251 100644
--- a/lib/include/arch_avx2_type3.h
+++ b/lib/include/arch_avx2_type3.h
@@ -34,4 +34,7 @@
 #include "ipsec_ooo_mgr.h"
 
 void poly1305_mac_fma_avx2(IMB_JOB *job);
-#endif /* IMB_ASM_AVX2_T2_H */
+
+IMB_DLL_EXPORT void set_suite_id_avx2_t3(IMB_MGR *state, IMB_JOB *job);
+
+#endif /* IMB_ASM_AVX2_T3_H */
diff --git a/lib/include/arch_avx512_type1.h b/lib/include/arch_avx512_type1.h
index 8e07eae9..e92d0689 100644
--- a/lib/include/arch_avx512_type1.h
+++ b/lib/include/arch_avx512_type1.h
@@ -164,6 +164,7 @@ IMB_DLL_EXPORT void aes_cfb_256_one_avx512(void *out, const void *in,
                                            const void *iv, const void *keys,
                                            uint64_t len);
 
-#endif /* IMB_ASM_AVX512_T1_H */
+IMB_DLL_EXPORT void set_suite_id_avx512_t1(IMB_MGR *state, IMB_JOB *job);
 
+#endif /* IMB_ASM_AVX512_T1_H */
 
diff --git a/lib/include/arch_avx512_type2.h b/lib/include/arch_avx512_type2.h
index 5e0303a7..c389d964 100644
--- a/lib/include/arch_avx512_type2.h
+++ b/lib/include/arch_avx512_type2.h
@@ -205,6 +205,6 @@ submit_job_aes_docsis256_enc_crc32_vaes_avx512(MB_MGR_DOCSIS_AES_OOO *state,
 IMB_JOB *
 flush_job_aes_docsis256_enc_crc32_vaes_avx512(MB_MGR_DOCSIS_AES_OOO *state);
 
+IMB_DLL_EXPORT void set_suite_id_avx512_t2(IMB_MGR *state, IMB_JOB *job);
 
 #endif /* IMB_ASM_AVX512_T2_H */
-
diff --git a/lib/include/arch_avx_type1.h b/lib/include/arch_avx_type1.h
index 97c8f7de..fa426709 100644
--- a/lib/include/arch_avx_type1.h
+++ b/lib/include/arch_avx_type1.h
@@ -257,4 +257,6 @@ void call_sha1_mult_avx_from_c(SHA1_ARGS *args, uint32_t size_in_blocks);
 void call_sha_256_mult_avx_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 void call_sha512_x2_avx_from_c(SHA512_ARGS *args, uint64_t size_in_blocks);
 
+IMB_DLL_EXPORT void set_suite_id_avx_t1(IMB_MGR *state, IMB_JOB *job);
+
 #endif /* IMB_ASM_AVX_T1_H */
diff --git a/lib/include/arch_avx_type2.h b/lib/include/arch_avx_type2.h
new file mode 100644
index 00000000..dc7a69f5
--- /dev/null
+++ b/lib/include/arch_avx_type2.h
@@ -0,0 +1,37 @@
+/*******************************************************************************
+  Copyright (c) 2023, Intel Corporation
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions are met:
+
+      * Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+      * Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+      * Neither the name of Intel Corporation nor the names of its contributors
+        may be used to endorse or promote products derived from this software
+        without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/* AVX TYPE1 + SHANI + GFNI */
+
+#ifndef IMB_ASM_AVX_T2_H
+#define IMB_ASM_AVX_T2_H
+
+#include "intel-ipsec-mb.h"
+
+IMB_DLL_EXPORT void set_suite_id_avx_t2(IMB_MGR *state, IMB_JOB *job);
+
+#endif /* IMB_ASM_AVX_T2_H */
diff --git a/lib/include/arch_sse_type1.h b/lib/include/arch_sse_type1.h
index db94b666..37573861 100644
--- a/lib/include/arch_sse_type1.h
+++ b/lib/include/arch_sse_type1.h
@@ -262,4 +262,6 @@ IMB_JOB *submit_job_snow3g_uia2_sse(MB_MGR_SNOW3G_OOO *state,
                                     IMB_JOB *job);
 IMB_JOB *flush_job_snow3g_uia2_sse(MB_MGR_SNOW3G_OOO *state);
 
+IMB_DLL_EXPORT void set_suite_id_sse_t1(IMB_MGR *state, IMB_JOB *job);
+
 #endif /* IMB_ARCH_SSE_TYPE1_H */
diff --git a/lib/include/arch_sse_type2.h b/lib/include/arch_sse_type2.h
index fcdf8f51..aecca65d 100644
--- a/lib/include/arch_sse_type2.h
+++ b/lib/include/arch_sse_type2.h
@@ -64,4 +64,6 @@ IMB_JOB *submit_job_sha256_ni_sse(MB_MGR_SHA_256_OOO *state, IMB_JOB *job);
 
 IMB_JOB *flush_job_sha256_ni_sse(MB_MGR_SHA_256_OOO *state, IMB_JOB *job);
 
+IMB_DLL_EXPORT void set_suite_id_sse_t2(IMB_MGR *state, IMB_JOB *job);
+
 #endif /* IMB_ARCH_SSE_TYPE2_H */
diff --git a/lib/include/arch_sse_type3.h b/lib/include/arch_sse_type3.h
index 41e1ef5e..5becd98d 100644
--- a/lib/include/arch_sse_type3.h
+++ b/lib/include/arch_sse_type3.h
@@ -112,4 +112,6 @@ IMB_JOB *submit_job_zuc256_eia3_gfni_sse(MB_MGR_ZUC_OOO *state,
 IMB_JOB *flush_job_zuc256_eia3_gfni_sse(MB_MGR_ZUC_OOO *state,
                                         const uint64_t tag_sz);
 
+IMB_DLL_EXPORT void set_suite_id_sse_t3(IMB_MGR *state, IMB_JOB *job);
+
 #endif /* IMB_ASM_SSE_T3_H */
diff --git a/lib/include/error.inc b/lib/include/error.inc
index fb29b4ca..ae0ec181 100644
--- a/lib/include/error.inc
+++ b/lib/include/error.inc
@@ -98,7 +98,8 @@ SET_ERRNO_TYPES \
     IMB_ERR_NULL_BURST, \
     IMB_ERR_BURST_SIZE, \
     IMB_ERR_BURST_OOO, \
-    IMB_ERR_SELFTEST
+    IMB_ERR_SELFTEST, \
+    IMB_ERR_BURST_SUITE_ID
 
 ;; Reset global imb_errno to 0
 %macro IMB_ERR_CHECK_RESET 0
diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index 75787993..884a109c 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -3322,6 +3322,7 @@ __forceinline IMB_JOB *FLUSH_JOB_HASH(IMB_MGR *state, IMB_JOB *job)
 __forceinline unsigned calc_cipher_tab_index(const IMB_JOB *job)
 {
         /*
+         * See include/mb_mgr_job_api.h for cipher table organization
          * - cipher_mode x 4, four key sizes per cipher mode
          * - map key_len_in_bytes into 0, 1, 2 & 3 index values
          * - encrypt_direction_bit x (ENCRYPT_DECRYPT_GAP x 4)
@@ -3535,6 +3536,96 @@ FLUSH_JOB(IMB_MGR *state)
         return job;
 }
 
+/* ========================================================================= */
+/* Async burst job submit & flush functions */
+/* ========================================================================= */
+
+__forceinline void set_cipher_suite_id(IMB_JOB *job, void **id)
+{
+        const unsigned c_idx = calc_cipher_tab_index(job);
+        const unsigned h_idx = (unsigned) job->hash_alg;
+
+        id[0] = (void *) tab_submit_cipher[c_idx];
+        id[1] = (void *) tab_submit_hash[h_idx];
+        id[2] = (void *) tab_flush_cipher[c_idx];
+        id[3] = (void *) tab_flush_hash[h_idx];
+}
+
+#define CALL_SUBMIT_CIPHER(s, j) ((submit_flush_fn_t) (j)->suite_id[0])(s, j)
+#define CALL_FLUSH_CIPHER(s, j) ((submit_flush_fn_t) (j)->suite_id[2])(s, j)
+#define CALL_SUBMIT_HASH(s, j) ((submit_flush_fn_t) (j)->suite_id[1])(s, j)
+#define CALL_FLUSH_HASH(s, j) ((submit_flush_fn_t) (j)->suite_id[3])(s, j)
+
+IMB_DLL_EXPORT void SET_SUITE_ID_FN(IMB_MGR *state, IMB_JOB *job)
+{
+        (void) state;
+        set_cipher_suite_id(job, job->suite_id);
+}
+
+__forceinline
+IMB_JOB *RESUBMIT_BURST_JOB(IMB_MGR *state, IMB_JOB *job)
+{
+        while (job != NULL && job->status < IMB_STATUS_COMPLETED) {
+                if (job->status == IMB_STATUS_COMPLETED_AUTH)
+                        job = CALL_SUBMIT_CIPHER(state, job);
+                else /* assumed job->status = IMB_STATUS_COMPLETED_CIPHER */
+                        job = CALL_SUBMIT_HASH(state, job);
+        }
+
+	return job;
+}
+
+__forceinline
+IMB_JOB *submit_new_burst_job(IMB_MGR *state, IMB_JOB *job)
+{
+        if (job->cipher_mode == IMB_CIPHER_GCM)
+                return CALL_SUBMIT_CIPHER(state, job);
+
+	if (job->chain_order == IMB_ORDER_CIPHER_HASH)
+		job = CALL_SUBMIT_CIPHER(state, job);
+	else
+		job = CALL_SUBMIT_HASH(state, job);
+
+        job = RESUBMIT_BURST_JOB(state, job);
+	return job;
+}
+
+__forceinline
+uint32_t complete_burst_job(IMB_MGR *state, IMB_JOB *job)
+{
+        uint32_t completed_jobs = 0;
+
+        /**
+         * complete as many jobs as necessary
+         * until specified 'job' has completed
+         */
+        if (job->chain_order == IMB_ORDER_CIPHER_HASH) {
+                /* while() loop optimized for cipher_hash order */
+                while (job->status < IMB_STATUS_COMPLETED) {
+                        IMB_JOB *tmp = CALL_FLUSH_CIPHER(state, job);
+
+                        if (tmp == NULL)
+                                tmp = CALL_FLUSH_HASH(state, job);
+
+                        (void) RESUBMIT_BURST_JOB(state, tmp);
+                        completed_jobs++;
+                }
+        } else {
+                /* while() loop optimized for hash_cipher order */
+                while (job->status < IMB_STATUS_COMPLETED) {
+                        IMB_JOB *tmp = CALL_FLUSH_HASH(state, job);
+
+                        if (tmp == NULL)
+                                tmp = CALL_FLUSH_CIPHER(state, job);
+
+                        (void) RESUBMIT_BURST_JOB(state, tmp);
+                        completed_jobs++;
+                }
+        }
+
+        return completed_jobs;
+}
+
 /* ========================================================================= */
 /* ========================================================================= */
 
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index b041e54a..c189e0ba 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -243,6 +243,7 @@ typedef enum {
         IMB_ERR_BURST_SIZE,
         IMB_ERR_BURST_OOO,
         IMB_ERR_SELFTEST,
+        IMB_ERR_BURST_SUITE_ID,
         /* add new error types above this comment */
         IMB_ERR_MAX       /* don't move this one */
 } IMB_ERR;
@@ -659,6 +660,8 @@ typedef struct IMB_JOB {
                         /**< Pointer to next IV (last ciphertext block) */
                 } CBCS; /**< CBCS specific fields */
         } cipher_fields; /**< Cipher algorithm-specific fields */
+
+        void *suite_id[4]; /**< see imb_set_cipher_suite_id() */
 } IMB_JOB;
 
 
@@ -1236,6 +1239,8 @@ typedef struct IMB_MGR {
         aes_ecb_quic_t aes_ecb_192_quic;
         aes_ecb_quic_t aes_ecb_256_quic;
 
+        void (*set_suite_id)(struct IMB_MGR *, IMB_JOB *);
+
         /* in-order scheduler fields */
         int              earliest_job; /**< byte offset, -1 if none */
         int              next_job;     /**< byte offset */
@@ -4183,6 +4188,19 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
                     const uint64_t num_packets,
                     const IMB_KEY_SIZE_BYTES key_size);
 
+/**
+ * @brief Sets up ID structure for selected cipher suite in
+ *        provided \a job structure
+ *
+ * This is for use ONLY in BURST API to speed up dispatch process.
+ *
+ * @param [in]     state   pointer to IMB_MGR
+ * @param [in/out] job     pointer to prepared JOB structure
+ *
+ */
+IMB_DLL_EXPORT void
+imb_set_cipher_suite_id(IMB_MGR *state, IMB_JOB *job);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index 33866563..7d651d69 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -701,3 +701,4 @@ EXPORTS
     imb_quic_aes_gcm				@675
     imb_quic_hp_aes_ecb				@676
     imb_hmac_ipad_opad                          @677
+    imb_set_cipher_suite_id                     @678
diff --git a/lib/sse_t1/mb_mgr_sse_t1.c b/lib/sse_t1/mb_mgr_sse_t1.c
index 22a8d4f5..a92539da 100644
--- a/lib/sse_t1/mb_mgr_sse_t1.c
+++ b/lib/sse_t1/mb_mgr_sse_t1.c
@@ -70,6 +70,7 @@
 #define SUBMIT_HASH_BURST submit_hash_burst_sse_t1
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_sse_t1
 
+#define SET_SUITE_ID_FN   set_suite_id_sse_t1
 
 /* Hash */
 #define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_SSE
@@ -366,6 +367,7 @@ init_mb_mgr_sse_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
         state->submit_hash_burst   = SUBMIT_HASH_BURST;
         state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+        state->set_suite_id        = SET_SUITE_ID_FN;
 
         state->keyexp_128          = aes_keyexp_128_sse;
         state->keyexp_192          = aes_keyexp_192_sse;
diff --git a/lib/sse_t2/mb_mgr_sse_t2.c b/lib/sse_t2/mb_mgr_sse_t2.c
index 2dce8f76..6dd3b5df 100644
--- a/lib/sse_t2/mb_mgr_sse_t2.c
+++ b/lib/sse_t2/mb_mgr_sse_t2.c
@@ -70,6 +70,7 @@
 #define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_sse_t2
 #define SUBMIT_HASH_BURST submit_hash_burst_sse_t2
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_sse_t2
+#define SET_SUITE_ID_FN   set_suite_id_sse_t2
 
 /* Hash */
 #define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_SSE_T2
@@ -364,6 +365,7 @@ init_mb_mgr_sse_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
         state->submit_hash_burst   = SUBMIT_HASH_BURST;
         state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+        state->set_suite_id        = SET_SUITE_ID_FN;
 
         state->keyexp_128          = aes_keyexp_128_sse;
         state->keyexp_192          = aes_keyexp_192_sse;
diff --git a/lib/sse_t3/mb_mgr_sse_t3.c b/lib/sse_t3/mb_mgr_sse_t3.c
index 34684975..16326fe2 100644
--- a/lib/sse_t3/mb_mgr_sse_t3.c
+++ b/lib/sse_t3/mb_mgr_sse_t3.c
@@ -71,6 +71,7 @@
 #define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_sse_t3
 #define SUBMIT_HASH_BURST submit_hash_burst_sse_t3
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_sse_t3
+#define SET_SUITE_ID_FN   set_suite_id_sse_t3
 
 /* Hash */
 #define SUBMIT_JOB_HASH    SUBMIT_JOB_HASH_SSE_T3
@@ -365,6 +366,7 @@ init_mb_mgr_sse_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->submit_cipher_burst_nocheck = SUBMIT_CIPHER_BURST_NOCHECK;
         state->submit_hash_burst   = SUBMIT_HASH_BURST;
         state->submit_hash_burst_nocheck = SUBMIT_HASH_BURST_NOCHECK;
+        state->set_suite_id        = SET_SUITE_ID_FN;
 
         state->keyexp_128          = aes_keyexp_128_sse;
         state->keyexp_192          = aes_keyexp_192_sse;
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index aa74a81a..bc975ff1 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -358,7 +358,8 @@ lib_objs1 = \
 	$(OBJ_DIR)\self_test.obj \
 	$(OBJ_DIR)\quic_aes_gcm.obj \
 	$(OBJ_DIR)\quic_hp_aes_ecb.obj \
-	$(OBJ_DIR)\hmac_ipad_opad.obj
+	$(OBJ_DIR)\hmac_ipad_opad.obj \
+	$(OBJ_DIR)\cipher_suite_id.obj
 
 lib_objs2 = \
 	$(OBJ_DIR)\mb_mgr_aes192_cbc_enc_flush_avx.obj \
diff --git a/lib/x86_64/cipher_suite_id.c b/lib/x86_64/cipher_suite_id.c
new file mode 100644
index 00000000..9b3e5a08
--- /dev/null
+++ b/lib/x86_64/cipher_suite_id.c
@@ -0,0 +1,45 @@
+/*******************************************************************************
+  Copyright (c) 2023, Intel Corporation
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions are met:
+
+      * Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+      * Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+      * Neither the name of Intel Corporation nor the names of its contributors
+        may be used to endorse or promote products derived from this software
+        without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include "intel-ipsec-mb.h"
+#include "include/error.h"
+
+IMB_DLL_EXPORT void imb_set_cipher_suite_id(IMB_MGR *state, IMB_JOB *job)
+{
+#ifdef SAFE_PARAM
+        if (state == NULL) {
+                imb_set_errno(NULL, IMB_ERR_NULL_MBMGR);
+                return;
+        }
+        if (job == NULL) {
+                imb_set_errno(state, IMB_ERR_NULL_JOB);
+                return;
+        }
+#endif
+
+        state->set_suite_id(state, job);
+}
diff --git a/lib/x86_64/error.c b/lib/x86_64/error.c
index 69b25c59..ccec6ad3 100644
--- a/lib/x86_64/error.c
+++ b/lib/x86_64/error.c
@@ -92,7 +92,8 @@ IMB_DLL_LOCAL const int imb_errno_types[] = {
         IMB_ERR_NULL_BURST,
         IMB_ERR_BURST_SIZE,
         IMB_ERR_BURST_OOO,
-        IMB_ERR_SELFTEST
+        IMB_ERR_SELFTEST,
+        IMB_ERR_BURST_SUITE_ID
 };
 
 int imb_get_errno(IMB_MGR *mb_mgr)
@@ -225,6 +226,8 @@ imb_get_strerror(int errnum)
                 return "Burst jobs out of order";
         case IMB_ERR_SELFTEST:
                 return "Self-test failed";
+        case IMB_ERR_BURST_SUITE_ID:
+                return "Invalid cipher suite ID (async burst API)";
         default:
                 return strerror(errnum);
         }
-- 
GitLab


From 571455b41799de9758b0f34ea3446e179e54518e Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 10 Mar 2023 12:10:16 +0000
Subject: [PATCH 195/332] lib: [burst] use suite ID field for processing async
 bursts

---
 lib/include/mb_mgr_burst_async.h       | 17 ++++++++++--
 lib/intel-ipsec-mb.h                   | 19 +++++++++++--
 perf/ipsec_perf.c                      |  2 ++
 test/kat-app/aes_test.c                |  2 ++
 test/kat-app/api_test.c                | 37 +++++++++++++++++++++++++-
 test/kat-app/chacha20_poly1305_test.c  |  2 ++
 test/kat-app/ctr_test.c                |  1 +
 test/kat-app/gcm_test.c                |  2 ++
 test/kat-app/hmac_sha1_test.c          |  1 +
 test/kat-app/hmac_sha256_sha512_test.c |  1 +
 10 files changed, 79 insertions(+), 5 deletions(-)

diff --git a/lib/include/mb_mgr_burst_async.h b/lib/include/mb_mgr_burst_async.h
index 66937645..ee936007 100644
--- a/lib/include/mb_mgr_burst_async.h
+++ b/lib/include/mb_mgr_burst_async.h
@@ -156,6 +156,19 @@ submit_burst_and_check(IMB_MGR *state, const uint32_t n_jobs,
                                            jobs[i]->key_len_in_bytes)) {
                                 goto return_invalid_job;
                         }
+
+                        /* validate job->suite_id */
+                        void *t[4];
+
+                        set_cipher_suite_id(jobs[i], t);
+
+                        if(jobs[i]->suite_id[0] != t[0] ||
+                           jobs[i]->suite_id[1] != t[1] ||
+                           jobs[i]->suite_id[2] != t[2] ||
+                           jobs[i]->suite_id[3] != t[3]) {
+                                imb_set_errno(state, IMB_ERR_BURST_SUITE_ID);
+                                goto return_invalid_job;
+                        }
                 }
         }
 
@@ -166,7 +179,7 @@ submit_burst_and_check(IMB_MGR *state, const uint32_t n_jobs,
         /* submit all jobs */
         for (i = 0; i < n_jobs; i++) {
                 jobs[i]->status = IMB_STATUS_BEING_PROCESSED;
-                submit_new_job(state, jobs[i]);
+                submit_new_burst_job(state, jobs[i]);
         }
         ADV_N_JOBS(&state->next_job, n_jobs);
 
@@ -253,7 +266,7 @@ FLUSH_BURST(IMB_MGR *state, const uint32_t max_jobs, IMB_JOB **jobs)
                 IMB_JOB *job = JOBS(state, state->earliest_job);
 
                 if (job->status < IMB_STATUS_COMPLETED)
-                        complete_job(state, job);
+                        complete_burst_job(state, job);
 
                 jobs[n_ret_jobs++] = job;
                 ADV_JOBS(&state->earliest_job);
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index c189e0ba..3580d4fb 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -1665,12 +1665,16 @@ IMB_DLL_EXPORT void init_mb_mgr_auto(IMB_MGR *state, IMB_ARCH *arch);
         ((_mgr)->get_next_burst((_mgr), (_n_jobs), (_jobs)))
 
 /**
- * Submit multiple jobs to be processed after validating.
+ * @brief Submit multiple jobs to be processed after validating.
+ *
+ * Prior to submission, \a _jobs need to be initialized with correct
+ * crypto job parameters and followed with a call to imb_set_cipher_suite_id().
  *
  * @param [in,out] _mgr         Pointer to initialized IMB_MGR structure
  * @param [in] _n_jobs          Number of jobs to submit for processing
  * @param [in,out] _jobs        In:  List of pointers to jobs for submission
  *                              Out: List of pointers to completed jobs
+ * @see imb_set_cipher_suite_id()
  *
  * @return Number of completed jobs or zero on error.
  *         If zero, imb_get_errno() can be used to check for potential
@@ -1680,12 +1684,16 @@ IMB_DLL_EXPORT void init_mb_mgr_auto(IMB_MGR *state, IMB_ARCH *arch);
         ((_mgr)->submit_burst((_mgr), (_n_jobs), (_jobs)))
 
 /**
- * Submit multiple jobs to be processed without validating.
+ * @brief Submit multiple jobs to be processed without validating.
+ *
+ * Prior to submission \a _jobs need to be initialized with correct
+ * crypto job parameters and followed with call to imb_set_cipher_suite_id().
  *
  * @param [in,out] _mgr         Pointer to initialized IMB_MGR structure
  * @param [in] _n_jobs          Number of jobs to submit for processing
  * @param [in,out] _jobs        In:  List of pointers to jobs for submission
  *                              Out: List of pointers to completed jobs
+ * @see imb_set_cipher_suite_id()
  *
  * @return Number of completed jobs or zero on error
  */
@@ -4193,6 +4201,13 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
  *        provided \a job structure
  *
  * This is for use ONLY in BURST API to speed up dispatch process.
+ * For given set of parameters: cipher type, cipher key size,
+ * cipher direction and authentication type, suite_id field be the same.
+ * In connection oriented applications, template filled-in job structure
+ * can be cached within connection structure and reused in submit operations.
+ *
+ * @see IMB_SUBMIT_BURST()
+ * @see IMB_SUBMIT_BURST_NOCHECK()
  *
  * @param [in]     state   pointer to IMB_MGR
  * @param [in/out] job     pointer to prepared JOB structure
diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index 6394c4f2..78e545f9 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -2299,6 +2299,8 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                 uint32_t num_jobs = num_iter;
                 IMB_JOB *jobs[IMB_MAX_BURST_SIZE] = {NULL};
 
+                imb_set_cipher_suite_id(mb_mgr, &job_template);
+
                 while (num_jobs && timebox_on) {
                         uint32_t n = (num_jobs / burst_size) ?
                                 burst_size : num_jobs;
diff --git a/test/kat-app/aes_test.c b/test/kat-app/aes_test.c
index 3df62246..275ccdc4 100644
--- a/test/kat-app/aes_test.c
+++ b/test/kat-app/aes_test.c
@@ -2144,6 +2144,8 @@ test_aes_many_burst(struct IMB_MGR *mb_mgr,
                 job->msg_len_to_cipher_in_bytes = text_len;
                 job->user_data = targets[i];
                 job->user_data2 = (void *)((uint64_t)i);
+
+                imb_set_cipher_suite_id(mb_mgr, job);
         }
 
         completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
diff --git a/test/kat-app/api_test.c b/test/kat-app/api_test.c
index 0d1c4479..3a0259d8 100644
--- a/test/kat-app/api_test.c
+++ b/test/kat-app/api_test.c
@@ -780,6 +780,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                 job = jobs[i];
                 fill_in_job(job, IMB_CIPHER_CBC, IMB_DIR_ENCRYPT, IMB_AUTH_NULL,
                             IMB_ORDER_CIPHER_HASH, NULL, NULL);
+                imb_set_cipher_suite_id(mb_mgr, job);
         }
 
         /* set invalid job order */
@@ -812,6 +813,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                 job = jobs[i];
                 fill_in_job(job, IMB_CIPHER_CBC, IMB_DIR_ENCRYPT, IMB_AUTH_NULL,
                             IMB_ORDER_CIPHER_HASH, NULL, NULL);
+                imb_set_cipher_suite_id(mb_mgr, job);
         }
 
         /* set a single invalid field */
@@ -978,7 +980,8 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                 /*
                                  * Skip hash algorithms belonging to AEAD
                                  * algorithms, as the test is for authentication
-                                 * only algorithms */
+                                 * only algorithms
+                                 */
                                 if (check_aead(hash, cipher))
                                         continue;
 
@@ -991,6 +994,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_SRC))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_AUTH_SRC_NULL,
@@ -1029,6 +1033,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_AUTH))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_AUTH_AUTH_TAG_OUTPUT_NULL,
@@ -1066,6 +1071,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        TEST_AUTH_TAG_OUTPUT_LEN_ZERO,
                                                        IMB_ERR_JOB_AUTH_TAG_LEN))
                                         return 1;
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_AUTH_TAG_OUTPUT_LEN_ZERO,
@@ -1150,6 +1156,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_AUTH_LEN))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_AUTH_MSG_LEN_GT_MAX,
@@ -1205,6 +1212,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_AUTH_LEN))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_AUTH_MSG_LEN_ZERO,
@@ -1248,6 +1256,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_IV_LEN))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_IV_LEN,
                                                              IMB_ERR_JOB_IV_LEN))
@@ -1294,6 +1303,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        err_ipad))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_NULL_HMAC_IPAD,
                                                              err_ipad))
@@ -1312,6 +1322,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        err_opad))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_NULL_HMAC_OPAD,
                                                              err_opad))
@@ -1339,6 +1350,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_NULL_XCBC_K1_EXP))
                                 return 1;
 
+                        imb_set_cipher_suite_id(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_AUTH_NULL_XCBC_K1_EXP,
                                                      IMB_ERR_JOB_NULL_XCBC_K1_EXP))
@@ -1354,6 +1366,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_NULL_XCBC_K2))
                                 return 1;
 
+                        imb_set_cipher_suite_id(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_AUTH_NULL_XCBC_K2,
                                                      IMB_ERR_JOB_NULL_XCBC_K2))
@@ -1368,6 +1381,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                TEST_AUTH_NULL_XCBC_K3,
                                                IMB_ERR_JOB_NULL_XCBC_K3))
                                 return 1;
+                        imb_set_cipher_suite_id(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_AUTH_NULL_XCBC_K3,
                                                      IMB_ERR_JOB_NULL_XCBC_K3))
@@ -1394,6 +1408,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_NULL_AUTH_KEY))
                                 return 1;
 
+                        imb_set_cipher_suite_id(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_AUTH_NULL_GHASH_KEY,
                                                      IMB_ERR_JOB_NULL_AUTH_KEY))
@@ -1409,6 +1424,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_NULL_GHASH_INIT_TAG))
                                 return 1;
 
+                        imb_set_cipher_suite_id(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_AUTH_NULL_GHASH_INIT_TAG,
                                                      IMB_ERR_JOB_NULL_GHASH_INIT_TAG))
@@ -1436,6 +1452,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_AUTH_KEY))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_NULL_GMAC_KEY,
                                                              IMB_ERR_JOB_NULL_AUTH_KEY))
@@ -1451,6 +1468,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_IV))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_NULL_GMAC_IV,
                                                              IMB_ERR_JOB_NULL_IV))
@@ -1466,6 +1484,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_IV_LEN))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_GMAC_IV_LEN,
                                                              IMB_ERR_JOB_IV_LEN))
@@ -1530,6 +1549,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_SRC))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_SRC_NULL,
@@ -1565,6 +1585,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_DST))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_DST_NULL,
@@ -1604,6 +1625,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_IV))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_IV_NULL,
@@ -1643,6 +1665,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_CIPH_DIR))
                                 return 1;
 
+                        imb_set_cipher_suite_id(mb_mgr, &template_job);
                         if (!is_submit_burst_invalid(mb_mgr, &template_job,
                                                      TEST_CIPH_DIR,
                                                      IMB_ERR_JOB_CIPH_DIR))
@@ -1680,6 +1703,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_KEY))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_ENC_KEY_NULL,
@@ -1721,6 +1745,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_KEY))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_DEC_KEY_NULL,
@@ -1741,6 +1766,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_KEY))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_DEC_KEY_NULL,
@@ -1754,6 +1780,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_KEY))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_DEC_KEY_NULL,
@@ -1767,6 +1794,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_KEY))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_DEC_KEY_NULL,
@@ -1825,6 +1853,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                                IMB_ERR_JOB_CIPH_LEN))
                                                 return 1;
 
+                                        imb_set_cipher_suite_id(mb_mgr, job);
                                         if (!is_submit_burst_invalid(mb_mgr,
                                                                      job,
                                                                      TEST_CIPH_MSG_LEN_ZERO,
@@ -1909,6 +1938,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_CIPH_LEN))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_CIPH_MSG_LEN_GT_MAX,
                                                              IMB_ERR_JOB_CIPH_LEN))
@@ -2047,6 +2077,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_IV_LEN))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_CIPH_IV_LEN,
                                                              IMB_ERR_JOB_IV_LEN))
@@ -2085,6 +2116,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_NULL_NEXT_IV))
                                 return 1;
 
+                        imb_set_cipher_suite_id(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_CIPH_NEXT_IV_NULL,
                                                      IMB_ERR_JOB_NULL_NEXT_IV))
@@ -2146,6 +2178,8 @@ test_job_invalid_misc_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_PON_PLI))
                                 return 1;
 
+                        imb_set_cipher_suite_id(mb_mgr, &template_job);
+
                         if (!is_submit_burst_invalid(mb_mgr, &template_job,
                                                      TEST_INVALID_PON_PLI,
                                                      IMB_ERR_JOB_PON_PLI))
@@ -2196,6 +2230,7 @@ test_job_invalid_misc_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_CIPH_LEN))
                                         return 1;
 
+                                imb_set_cipher_suite_id(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_CIPH_MSG_LEN_GT_MAX,
                                                              IMB_ERR_JOB_CIPH_LEN))
diff --git a/test/kat-app/chacha20_poly1305_test.c b/test/kat-app/chacha20_poly1305_test.c
index 9ceb282c..9f9339f3 100644
--- a/test/kat-app/chacha20_poly1305_test.c
+++ b/test/kat-app/chacha20_poly1305_test.c
@@ -502,6 +502,8 @@ test_aead(struct IMB_MGR *mb_mgr,
                 job->auth_tag_output_len_in_bytes = 16;
 
                 job->user_data = auths[i];
+
+                imb_set_cipher_suite_id(mb_mgr, job);
         }
 
         uint32_t completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
diff --git a/test/kat-app/ctr_test.c b/test/kat-app/ctr_test.c
index fd171d91..18737fda 100644
--- a/test/kat-app/ctr_test.c
+++ b/test/kat-app/ctr_test.c
@@ -1509,6 +1509,7 @@ test_ctr_burst(struct IMB_MGR *mb_mgr,
                 job->hash_alg = IMB_AUTH_NULL;
                 job->user_data = targets[i];
                 job->user_data2 = (void *)((uint64_t)i);
+                imb_set_cipher_suite_id(mb_mgr, job);
         }
 
         completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
diff --git a/test/kat-app/gcm_test.c b/test/kat-app/gcm_test.c
index 8475c2a0..6da9ef91 100644
--- a/test/kat-app/gcm_test.c
+++ b/test/kat-app/gcm_test.c
@@ -1747,6 +1747,8 @@ aes_gcm_burst(IMB_MGR *mb_mgr,
                         job->hash_alg = IMB_AUTH_GCM_SGL;
                 } else
                         job->hash_alg = IMB_AUTH_AES_GMAC;
+
+                imb_set_cipher_suite_id(mb_mgr, job);
         }
 
         const uint32_t completed_jobs =
diff --git a/test/kat-app/hmac_sha1_test.c b/test/kat-app/hmac_sha1_test.c
index 1f179d95..93766112 100644
--- a/test/kat-app/hmac_sha1_test.c
+++ b/test/kat-app/hmac_sha1_test.c
@@ -515,6 +515,7 @@ test_hmac_sha1_burst(struct IMB_MGR *mb_mgr,
 
                 job->user_data = auths[i];
 
+                imb_set_cipher_suite_id(mb_mgr, job);
         }
 
         completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
diff --git a/test/kat-app/hmac_sha256_sha512_test.c b/test/kat-app/hmac_sha256_sha512_test.c
index 4f057e41..af42e875 100644
--- a/test/kat-app/hmac_sha256_sha512_test.c
+++ b/test/kat-app/hmac_sha256_sha512_test.c
@@ -1089,6 +1089,7 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
 
                 job->user_data = auths[i];
 
+                imb_set_cipher_suite_id(mb_mgr, job);
         }
 
         completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
-- 
GitLab


From 76cce5d2c645a452e18acfe80fda875ed8b31c00 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 14 Mar 2023 16:58:43 +0000
Subject: [PATCH 196/332] test: [xvalid] improve out of order job return error
 messages

---
 test/xvalid-app/ipsec_xvalid.c | 30 +++++++++++++++++++++---------
 1 file changed, 21 insertions(+), 9 deletions(-)

diff --git a/test/xvalid-app/ipsec_xvalid.c b/test/xvalid-app/ipsec_xvalid.c
index c57524be..63cf496b 100644
--- a/test/xvalid-app/ipsec_xvalid.c
+++ b/test/xvalid-app/ipsec_xvalid.c
@@ -900,7 +900,7 @@ fill_job(IMB_JOB *job, const struct params_s *params,
          const uint32_t buf_size, const uint8_t tag_size,
          IMB_CIPHER_DIRECTION cipher_dir,
          struct cipher_auth_keys *keys, uint8_t *cipher_iv,
-         uint8_t *auth_iv, unsigned index, uint8_t *next_iv)
+         uint8_t *auth_iv, const unsigned index, uint8_t *next_iv)
 {
         static const void *ks_ptr[3];
         uint32_t *k1_expanded = keys->k1_expanded;
@@ -1916,7 +1916,7 @@ do_test(IMB_MGR *enc_mb_mgr, const IMB_ARCH enc_arch,
                               (unsigned) params->cipher_mode);
 
                 if (job) {
-                        unsigned idx = (unsigned)((uintptr_t) job->user_data);
+                        const unsigned idx = (unsigned)((uintptr_t) job->user_data);
 
                         if (job->status != IMB_STATUS_COMPLETED) {
                                 int errc = imb_get_errno(enc_mb_mgr);
@@ -1929,7 +1929,10 @@ do_test(IMB_MGR *enc_mb_mgr, const IMB_ARCH enc_arch,
                                 goto exit;
                         }
                         if (idx != num_processed_jobs) {
-                                fprintf(stderr, "job returned out of order\n");
+                                fprintf(stderr,
+                                        "enc-submit job returned out of order, "
+                                        "received %u, expected %u\n",
+                                        idx, num_processed_jobs);
                                 goto exit;
                         }
                         num_processed_jobs++;
@@ -1954,7 +1957,7 @@ do_test(IMB_MGR *enc_mb_mgr, const IMB_ARCH enc_arch,
                               (unsigned) params->cipher_mode);
 
                 while (job != NULL) {
-                        unsigned idx = (unsigned)((uintptr_t) job->user_data);
+                        const unsigned idx = (unsigned)((uintptr_t) job->user_data);
 
                         if (job->status != IMB_STATUS_COMPLETED) {
                                 int errc = imb_get_errno(enc_mb_mgr);
@@ -1967,7 +1970,10 @@ do_test(IMB_MGR *enc_mb_mgr, const IMB_ARCH enc_arch,
                                 goto exit;
                         }
                         if (idx != num_processed_jobs) {
-                                fprintf(stderr, "job returned out of order\n");
+                                fprintf(stderr,
+                                        "enc-flush job returned out of order, "
+                                        "received %u, expected %u\n",
+                                        idx, num_processed_jobs);
                                 goto exit;
                         }
                         num_processed_jobs++;
@@ -2042,7 +2048,7 @@ do_test(IMB_MGR *enc_mb_mgr, const IMB_ARCH enc_arch,
                               (unsigned) params->cipher_mode);
 
                 if (job != NULL) {
-                        unsigned idx = (unsigned)((uintptr_t) job->user_data);
+                        const unsigned idx = (unsigned)((uintptr_t) job->user_data);
 
                         if (job->status != IMB_STATUS_COMPLETED) {
                                 int errc = imb_get_errno(dec_mb_mgr);
@@ -2056,7 +2062,10 @@ do_test(IMB_MGR *enc_mb_mgr, const IMB_ARCH enc_arch,
                         }
 
                         if (idx != num_processed_jobs) {
-                                fprintf(stderr, "job returned out of order\n");
+                                fprintf(stderr,
+                                        "dec-submit job returned out of order, "
+                                        "received %u, expected %u\n",
+                                        idx, num_processed_jobs);
                                 goto exit;
                         }
                         num_processed_jobs++;
@@ -2071,7 +2080,7 @@ do_test(IMB_MGR *enc_mb_mgr, const IMB_ARCH enc_arch,
                               (unsigned) params->cipher_mode);
 
                 while (job != NULL) {
-                        unsigned idx = (unsigned)((uintptr_t) job->user_data);
+                        const unsigned idx = (unsigned)((uintptr_t) job->user_data);
 
                         if (job->status != IMB_STATUS_COMPLETED) {
                                 int errc = imb_get_errno(enc_mb_mgr);
@@ -2084,7 +2093,10 @@ do_test(IMB_MGR *enc_mb_mgr, const IMB_ARCH enc_arch,
                                 goto exit;
                         }
                         if (idx != num_processed_jobs) {
-                                fprintf(stderr, "job returned out of order\n");
+                                fprintf(stderr,
+                                        "dec-flush job returned out of order, "
+                                        "received %u, expected %u\n",
+                                        idx, num_processed_jobs);
                                 goto exit;
                         }
                         num_processed_jobs++;
-- 
GitLab


From 2eb82234b70ac78c8bd3800b3693e8218443ea14 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 14 Mar 2023 16:59:46 +0000
Subject: [PATCH 197/332] avx512: [zuc-eia3] create stack space for arguments
 before calling ZUC_ROUND64B on Windows

Setting argument 5 for the call was overwriting stack space used for preserving/restoring register r14.
---
 lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
index 38ddb485..0e21b2fb 100644
--- a/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_zuc_submit_flush_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
@@ -331,7 +331,7 @@ mksection .text
 
 %%return_submit_eea3:
 %ifdef SAFE_DATA
-        clear_all_zmms_asm
+        clear_scratch_zmms_asm
 %else
         vzeroupper
 %endif
@@ -554,7 +554,7 @@ mksection .text
 %endif
 
 %ifdef SAFE_DATA
-        clear_all_zmms_asm
+        clear_scratch_zmms_asm
 %else
         vzeroupper
 %endif
@@ -701,6 +701,8 @@ FLUSH_JOB_ZUC256_EEA3:
 
         call    ZUC_KEYGEN_16
 
+        RESERVE_STACK_SPACE 5
+
         ; Digest 64 bytes of data
         lea     arg1, [%%OOO + _zuc_args_digest]
         lea     arg2, [%%OOO + _zuc_args_KS]
@@ -710,6 +712,8 @@ FLUSH_JOB_ZUC256_EEA3:
 
         call    ZUC_ROUND64B
 
+        RESTORE_STACK_SPACE 5
+
         sub     %%REMAIN_BITS, 64*8
         jmp     %%_exit
 
@@ -989,7 +993,7 @@ FLUSH_JOB_ZUC256_EEA3:
 
 %%return_submit_eia3:
 %ifdef SAFE_DATA
-        clear_all_zmms_asm
+        clear_scratch_zmms_asm
 %else
         vzeroupper
 %endif
@@ -1190,13 +1194,12 @@ FLUSH_JOB_ZUC256_EEA3:
 %endif
 
 %ifdef SAFE_DATA
-        clear_all_zmms_asm
+        clear_scratch_zmms_asm
 %else
         vzeroupper
 %endif
 
 %%return_flush_eia3:
-
         mov     rbx, [rsp + _gpr_save + 8*0]
         mov     rbp, [rsp + _gpr_save + 8*1]
         mov     r12, [rsp + _gpr_save + 8*2]
-- 
GitLab


From c6721326c949e1ef8a7918e5b78effd999922d62 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 14 Mar 2023 17:12:02 +0000
Subject: [PATCH 198/332] sse: [snow-v] save and restore xmm6-xmm15 on Windows

---
 lib/sse_t1/snow_v_sse.asm | 74 +++++++++++++++++++++++++++++++--------
 1 file changed, 60 insertions(+), 14 deletions(-)

diff --git a/lib/sse_t1/snow_v_sse.asm b/lib/sse_t1/snow_v_sse.asm
index 15b7073b..a1caf3f4 100644
--- a/lib/sse_t1/snow_v_sse.asm
+++ b/lib/sse_t1/snow_v_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
@@ -84,6 +84,12 @@ dq 0x6d6f6854676E694a
 
 %define job     arg1
 
+;; stack frame for saving registers (windows only)
+struc STACK
+_xmm_save:      resq    10 * 2  ; space for 10 xmm registers
+_rsp_save:      resq    1       ; space for rsp pointer
+endstruc
+
 mksection .text
 
 ;; Registers usage
@@ -249,22 +255,62 @@ mksection .text
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
+%macro FUNC_START 0
+%ifidn __OUTPUT_FORMAT__, win64
+        ; xmm6:xmm15 need to be maintained for Windows
+        mov     rax, rsp
+        sub     rsp, STACK_size
+        and     rsp, -16
+        mov     [rsp + _rsp_save], rax
+        movdqa  [rsp + _xmm_save + 0*16], xmm6
+        movdqa  [rsp + _xmm_save + 1*16], xmm7
+        movdqa  [rsp + _xmm_save + 2*16], xmm8
+        movdqa  [rsp + _xmm_save + 3*16], xmm9
+        movdqa  [rsp + _xmm_save + 4*16], xmm10
+        movdqa  [rsp + _xmm_save + 5*16], xmm11
+        movdqa  [rsp + _xmm_save + 6*16], xmm12
+        movdqa  [rsp + _xmm_save + 7*16], xmm13
+        movdqa  [rsp + _xmm_save + 8*16], xmm14
+        movdqa  [rsp + _xmm_save + 9*16], xmm15
+%endif
+%endmacro
+
+%macro FUNC_END 0
+%ifidn __OUTPUT_FORMAT__, win64
+        movdqa  xmm6, [rsp + _xmm_save + 0*16]
+        movdqa  xmm7, [rsp + _xmm_save + 1*16]
+        movdqa  xmm8, [rsp + _xmm_save + 2*16]
+        movdqa  xmm9, [rsp + _xmm_save + 3*16]
+        movdqa  xmm10, [rsp + _xmm_save + 4*16]
+        movdqa  xmm11, [rsp + _xmm_save + 5*16]
+        movdqa  xmm12, [rsp + _xmm_save + 6*16]
+        movdqa  xmm13, [rsp + _xmm_save + 7*16]
+        movdqa  xmm14, [rsp + _xmm_save + 8*16]
+        movdqa  xmm15, [rsp + _xmm_save + 9*16]
+        mov     rsp, [rsp + _rsp_save]
+%endif
+%endmacro
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
 MKGLOBAL(SNOW_V_AEAD_INIT,function,)
 SNOW_V_AEAD_INIT:
-      endbranch64
-      ;; use offset to indicate AEAD mode
-      mov DWORD(offset), 1
-      movdqa LFSR_B_LDQ, [rel aead_lsfr_b_lo]
-      jmp snow_v_common_init
+        endbranch64
+        FUNC_START
+        ;; use offset to indicate AEAD mode
+        mov     DWORD(offset), 1
+        movdqa  LFSR_B_LDQ, [rel aead_lsfr_b_lo]
+        jmp     snow_v_common_init
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 MKGLOBAL(SNOW_V,function,)
 SNOW_V:
-      endbranch64
-      ;; use offset to indicate AEAD mode
-      xor DWORD(offset), DWORD(offset)
-      pxor LFSR_B_LDQ, LFSR_B_LDQ
+        endbranch64
+        FUNC_START
+        ;; use offset to indicate AEAD mode
+        xor     DWORD(offset), DWORD(offset)
+        pxor    LFSR_B_LDQ, LFSR_B_LDQ
 
 snow_v_common_init:
 
@@ -389,9 +435,9 @@ no_partial_block_left:
       clear_scratch_xmms_sse_asm
 %endif
 
-      mov   rax, job
-      or    dword [rax + _status], IMB_STATUS_COMPLETED_CIPHER
-
-ret
+        mov   rax, job
+        or    dword [rax + _status], IMB_STATUS_COMPLETED_CIPHER
+        FUNC_END
+        ret
 
 mksection stack-noexec
-- 
GitLab


From f4dab45f07e22fc0138c979e5c727b7b50690e62 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 14 Mar 2023 17:12:37 +0000
Subject: [PATCH 199/332] sse: [snow-v] fix indentation from 6 to 8 characters

---
 lib/sse_t1/snow_v_sse.asm | 328 +++++++++++++++++++-------------------
 1 file changed, 164 insertions(+), 164 deletions(-)

diff --git a/lib/sse_t1/snow_v_sse.asm b/lib/sse_t1/snow_v_sse.asm
index a1caf3f4..d4118430 100644
--- a/lib/sse_t1/snow_v_sse.asm
+++ b/lib/sse_t1/snow_v_sse.asm
@@ -75,11 +75,11 @@ dq 0x20646b4578656c41
 dq 0x6d6f6854676E694a
 
 %ifdef LINUX
-      %define arg1      rdi
-      %define offset    rcx
+        %define arg1      rdi
+        %define offset    rcx
 %else
-      %define arg1      rcx
-      %define offset    r8
+        %define arg1      rcx
+        %define offset    r8
 %endif
 
 %define job     arg1
@@ -99,20 +99,20 @@ mksection .text
 ;; xmm8, xmm9, xmm10, xmm11 : LFSR_A, LFSR_B
 ;; xmm13, xmm14, xmm15      : constants gA, gB, inv_gA
 
-%define gA       xmm13
-%define gB       xmm14
-%define inv_gA   xmm15
+%define gA      xmm13
+%define gB      xmm14
+%define inv_gA  xmm15
 
-%define FSM_R1         xmm5
-%define FSM_R2         xmm6
-%define FSM_R3         xmm7
+%define FSM_R1  xmm5
+%define FSM_R2  xmm6
+%define FSM_R3  xmm7
 
-%define LFSR_A_LDQ     xmm8   ;; LSFR A: (a7, ..., a0)
-%define LFSR_A_HDQ     xmm9   ;; LSFR A: (a15, ..., a8)
-%define LFSR_B_LDQ     xmm10  ;; LSFR B: (b7, ..., b0)
-%define LFSR_B_HDQ     xmm11  ;; LSFR B: (b15, ..., b8)
+%define LFSR_A_LDQ      xmm8   ;; LSFR A: (a7, ..., a0)
+%define LFSR_A_HDQ      xmm9   ;; LSFR A: (a15, ..., a8)
+%define LFSR_B_LDQ      xmm10  ;; LSFR B: (b7, ..., b0)
+%define LFSR_B_HDQ      xmm11  ;; LSFR B: (b15, ..., b8)
 
-%define temp4          xmm12
+%define temp4   xmm12
 
 ;; =============================================================================
 ;; =============================================================================
@@ -126,9 +126,9 @@ mksection .text
 %define %%FSM_R1      %3  ;; [in]  128 bit FSM: R1
 %define %%FSM_R2      %4  ;; [in]  128 bit FSM: R2
 
-      movdqa %%KEYSTREAM, %%LFSR_B_HDQ
-      paddd  %%KEYSTREAM, %%FSM_R1
-      pxor   %%KEYSTREAM, %%FSM_R2
+        movdqa  %%KEYSTREAM, %%LFSR_B_HDQ
+        paddd   %%KEYSTREAM, %%FSM_R1
+        pxor    %%KEYSTREAM, %%FSM_R2
 
 %endmacro ;; SNOW_V_KEYSTREAM
 
@@ -148,17 +148,17 @@ mksection .text
                           ;; containing copy of LFSR_A_LDQ (a7, ..., a0)
 %define %%TEMP1       %5  ;; [clobbered] 128 bit register
 
-      pxor   %%T2, %%FSM_R3         ;; T2 = R3 XOR LSFR_A [0:7]
-      paddd  %%T2, %%FSM_R2         ;; T2 += R2
-      pshufb %%T2, [rel sigma]      ;; T2 = sigma(T2)
+        pxor    %%T2, %%FSM_R3         ;; T2 = R3 XOR LSFR_A [0:7]
+        paddd   %%T2, %%FSM_R2         ;; T2 += R2
+        pshufb  %%T2, [rel sigma]      ;; T2 = sigma(T2)
 
-      movdqa %%FSM_R3, %%FSM_R2     ;; R3 = R2
-      movdqa %%FSM_R2, %%FSM_R1     ;; R2 = R1
-      pxor   %%TEMP1, %%TEMP1       ;; TEMP1 = 0
+        movdqa  %%FSM_R3, %%FSM_R2     ;; R3 = R2
+        movdqa  %%FSM_R2, %%FSM_R1     ;; R2 = R1
+        pxor    %%TEMP1, %%TEMP1       ;; TEMP1 = 0
 
-      movdqa %%FSM_R1, %%T2         ;; R1 = sigma(T2)
-      aesenc %%FSM_R3, %%TEMP1      ;; R3 = AESR(R2) (encryption round key C1 = 0)
-      aesenc %%FSM_R2, %%TEMP1      ;; R2 = AESR(R1) (encryption round key C2 = 0)
+        movdqa  %%FSM_R1, %%T2         ;; R1 = sigma(T2)
+        aesenc  %%FSM_R3, %%TEMP1      ;; R3 = AESR(R2) (encryption round key C1 = 0)
+        aesenc  %%FSM_R2, %%TEMP1      ;; R2 = AESR(R1) (encryption round key C2 = 0)
 
 %endmacro ;; SNOW_V_FSM_UPDATE
 
@@ -197,59 +197,59 @@ mksection .text
 ;;                else:            (x >> 1)
 ;;              = (x >> 1) xor signw(inv_gA, x << 15)
 
-      ;; calculate mulx_A = (alpha*a7, ..., alpha*a0)
-      movdqa %%TEMP1, %%LFSR_A_LDQ
-      psraw  %%TEMP1, 15             ;; 16-bit mask with sign bits preserved
-      pand   %%TEMP1, %%gA
-      movdqa %%TEMP2, %%LFSR_A_LDQ
-      psllw  %%TEMP2, 1
-      pxor   %%TEMP2, %%TEMP1        ;; TEMP2 = mulx_A
-
-      ;; calculate invx_A = (alpha^-1*a15, ..., alpha^-1*a8)
-      movdqa %%TEMP1, %%LFSR_A_HDQ
-      psllw  %%TEMP1, 15
-      movdqa %%T2, %%inv_gA
-      psignw %%T2, %%TEMP1           ;; negate bits in inv_gA depending on LFSR_A_HDQ << 15
-      movdqa %%TEMP1, %%LFSR_A_HDQ
-      psrlw  %%TEMP1, 1
-      pxor   %%TEMP1, %%T2           ;; TEMP1 = invx_A
-
-      movdqa %%T2, %%LFSR_A_HDQ      ;; make copy of LFSR_A_HDQ
-
-      ;; LFSR_A_HDQ = mulx_A XOR invx_A XOR (b7, ..., b0) XOR (a8, ..., a1)
-      pxor    %%TEMP1, %%TEMP2               ;; TEMP1 = invx_A xor mulx_A
-      palignr %%LFSR_A_HDQ, %%LFSR_A_LDQ, 2  ;; T2 = (tmpa_8, ..., tmpa_1)
-      pxor    %%LFSR_A_HDQ, %%LFSR_B_LDQ
-      pxor    %%LFSR_A_HDQ, %%TEMP1
-
-      ;; calculate mulx_B
-      movdqa   %%TEMP1, %%LFSR_B_LDQ
-      psraw    %%TEMP1, 15
-      pand     %%TEMP1, %%gB
-      movdqa   %%TEMP2, %%LFSR_B_LDQ
-      psllw    %%TEMP2, 1
-      pxor     %%TEMP1, %%TEMP2
-
-      ;; T1 = mulx_B XOR (a7, ..., a0) XOR (b10, ..., b3)
-      pxor     %%TEMP1, %%LFSR_A_LDQ
-      palignr  %%T1, %%LFSR_B_LDQ, 6    ;; (b10, ..., b3)
-      pxor     %%T1, %%TEMP1
-
-      ;; calculate invx_B
-      movdqa   %%TEMP1, %%LFSR_B_HDQ
-      psllw    %%TEMP1, 15
-      movdqa   %%TEMP2, [rel beta_inv]
-      psignw   %%TEMP2, %%TEMP1
-      movdqa   %%TEMP1, %%LFSR_B_HDQ
-      psrlw    %%TEMP1, 1
-      pxor     %%TEMP1, %%TEMP2
-
-      ;; LFSR_B_HDQ = mulx_B XOR invx_B XOR (a7, ..., a0) XOR (b10, ..., b3)
-      pxor     %%T1, %%TEMP1
-
-      movdqa %%LFSR_B_LDQ, %%LFSR_B_HDQ   ;; LFSR_B_LDQ = LFSR_B_HDQ
-      movdqa %%LFSR_A_LDQ, %%T2           ;; LFSR_A_LDQ = LFSR_A_HDQ
-      movdqa %%LFSR_B_HDQ, %%T1
+        ;; calculate mulx_A = (alpha*a7, ..., alpha*a0)
+        movdqa  %%TEMP1, %%LFSR_A_LDQ
+        psraw   %%TEMP1, 15             ;; 16-bit mask with sign bits preserved
+        pand    %%TEMP1, %%gA
+        movdqa  %%TEMP2, %%LFSR_A_LDQ
+        psllw   %%TEMP2, 1
+        pxor    %%TEMP2, %%TEMP1        ;; TEMP2 = mulx_A
+
+        ;; calculate invx_A = (alpha^-1*a15, ..., alpha^-1*a8)
+        movdqa  %%TEMP1, %%LFSR_A_HDQ
+        psllw   %%TEMP1, 15
+        movdqa  %%T2, %%inv_gA
+        psignw  %%T2, %%TEMP1           ;; negate bits in inv_gA depending on LFSR_A_HDQ << 15
+        movdqa  %%TEMP1, %%LFSR_A_HDQ
+        psrlw   %%TEMP1, 1
+        pxor    %%TEMP1, %%T2           ;; TEMP1 = invx_A
+
+        movdqa  %%T2, %%LFSR_A_HDQ      ;; make copy of LFSR_A_HDQ
+
+        ;; LFSR_A_HDQ = mulx_A XOR invx_A XOR (b7, ..., b0) XOR (a8, ..., a1)
+        pxor    %%TEMP1, %%TEMP2               ;; TEMP1 = invx_A xor mulx_A
+        palignr %%LFSR_A_HDQ, %%LFSR_A_LDQ, 2  ;; T2 = (tmpa_8, ..., tmpa_1)
+        pxor    %%LFSR_A_HDQ, %%LFSR_B_LDQ
+        pxor    %%LFSR_A_HDQ, %%TEMP1
+
+        ;; calculate mulx_B
+        movdqa  %%TEMP1, %%LFSR_B_LDQ
+        psraw   %%TEMP1, 15
+        pand    %%TEMP1, %%gB
+        movdqa  %%TEMP2, %%LFSR_B_LDQ
+        psllw   %%TEMP2, 1
+        pxor    %%TEMP1, %%TEMP2
+
+        ;; T1 = mulx_B XOR (a7, ..., a0) XOR (b10, ..., b3)
+        pxor    %%TEMP1, %%LFSR_A_LDQ
+        palignr %%T1, %%LFSR_B_LDQ, 6    ;; (b10, ..., b3)
+        pxor    %%T1, %%TEMP1
+
+        ;; calculate invx_B
+        movdqa  %%TEMP1, %%LFSR_B_HDQ
+        psllw   %%TEMP1, 15
+        movdqa  %%TEMP2, [rel beta_inv]
+        psignw  %%TEMP2, %%TEMP1
+        movdqa  %%TEMP1, %%LFSR_B_HDQ
+        psrlw   %%TEMP1, 1
+        pxor    %%TEMP1, %%TEMP2
+
+        ;; LFSR_B_HDQ = mulx_B XOR invx_B XOR (a7, ..., a0) XOR (b10, ..., b3)
+        pxor     %%T1, %%TEMP1
+
+        movdqa  %%LFSR_B_LDQ, %%LFSR_B_HDQ   ;; LFSR_B_LDQ = LFSR_B_HDQ
+        movdqa  %%LFSR_A_LDQ, %%T2           ;; LFSR_A_LDQ = LFSR_A_HDQ
+        movdqa  %%LFSR_B_HDQ, %%T1
 
 %endmacro ;; SNOW_V_LFSR_UPDATE
 
@@ -314,125 +314,125 @@ SNOW_V:
 
 snow_v_common_init:
 
-      ;; Init LSFR
-      mov rax, [job + _enc_keys]
-      movdqu   LFSR_A_HDQ, [rax]
-      movdqu   LFSR_B_HDQ, [rax + 16]
-      mov rax, [job + _iv]
-      movdqu   LFSR_A_LDQ, [rax]
+        ;; Init LSFR
+        mov     rax, [job + _enc_keys]
+        movdqu  LFSR_A_HDQ, [rax]
+        movdqu  LFSR_B_HDQ, [rax + 16]
+        mov     rax, [job + _iv]
+        movdqu  LFSR_A_LDQ, [rax]
 
-      ;; Init FSM: R1 = R2 = R3 = 0
-      pxor FSM_R1, FSM_R1
-      pxor FSM_R2, FSM_R2
-      pxor FSM_R3, FSM_R3
+        ;; Init FSM: R1 = R2 = R3 = 0
+        pxor    FSM_R1, FSM_R1
+        pxor    FSM_R2, FSM_R2
+        pxor    FSM_R3, FSM_R3
 
-      movdqa gA, [rel alpha]
-      movdqa gB, [rel beta]
-      movdqa inv_gA, [rel alpha_inv]
+        movdqa  gA, [rel alpha]
+        movdqa  gB, [rel beta]
+        movdqa  inv_gA, [rel alpha_inv]
 
-      movdqa xmm0, LFSR_B_HDQ ;; init T1 for LSFR update
-      movdqa xmm1, LFSR_A_LDQ ;; init T2 for FSM update
+        movdqa  xmm0, LFSR_B_HDQ ;; init T1 for LSFR update
+        movdqa  xmm1, LFSR_A_LDQ ;; init T2 for FSM update
 
-      mov eax, 15
+        mov     eax, 15
 
  init_fsm_lfsr_loop:
 
-      SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
-      SNOW_V_FSM_UPDATE FSM_R1, FSM_R2, FSM_R3, xmm1, xmm2
-      SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ, LFSR_B_LDQ, LFSR_B_HDQ, \
+        SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
+        SNOW_V_FSM_UPDATE FSM_R1, FSM_R2, FSM_R3, xmm1, xmm2
+        SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ, LFSR_B_LDQ, LFSR_B_HDQ, \
                          xmm0, xmm1, xmm2, xmm3, gA, gB, inv_gA
-      pxor LFSR_A_HDQ, xmm4
-      dec eax
-      jnz init_fsm_lfsr_loop
+        pxor    LFSR_A_HDQ, xmm4
+        dec     eax
+        jnz     init_fsm_lfsr_loop
 
-      mov rax, [job + _enc_keys]
-      movdqu temp4, [rax]
-      pxor FSM_R1, temp4
+        mov     rax, [job + _enc_keys]
+        movdqu  temp4, [rax]
+        pxor    FSM_R1, temp4
 
-      SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
-      SNOW_V_FSM_UPDATE FSM_R1, FSM_R2, FSM_R3, xmm1, xmm2
-      SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
+        SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
+        SNOW_V_FSM_UPDATE FSM_R1, FSM_R2, FSM_R3, xmm1, xmm2
+        SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
                          xmm0, xmm1, xmm2, xmm3, gA, gB, inv_gA
-      pxor LFSR_A_HDQ, xmm4
-      movdqu temp4, [rax + 16]
-      pxor FSM_R1, temp4
+        pxor    LFSR_A_HDQ, xmm4
+        movdqu  temp4, [rax + 16]
+        pxor    FSM_R1, temp4
 
-      ;; At this point FSM and LSFR are initialized
+        ;; At this point FSM and LSFR are initialized
 
-      or DWORD(offset), DWORD(offset)
-      jz no_aead
+        or      DWORD(offset), DWORD(offset)
+        jz      no_aead
 
-      ;; in AEAD mode hkey = keystream_0 and endpad = keystream_1
-      mov r11, [job + _snow_v_reserved]
-      ;; generate hkey
-      SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
-      movdqu [r11], xmm4
+        ;; in AEAD mode hkey = keystream_0 and endpad = keystream_1
+        mov     r11, [job + _snow_v_reserved]
+        ;; generate hkey
+        SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
+        movdqu  [r11], xmm4
 
-      ;; generate endpad
-      SNOW_V_FSM_UPDATE FSM_R1, FSM_R2, FSM_R3, xmm1, xmm2
-      SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
+        ;; generate endpad
+        SNOW_V_FSM_UPDATE FSM_R1, FSM_R2, FSM_R3, xmm1, xmm2
+        SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
                          xmm0, xmm1, xmm2, xmm3, gA, gB, inv_gA
-      SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
+        SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
 
-      SNOW_V_FSM_UPDATE FSM_R1, FSM_R2, FSM_R3, xmm1, xmm2
-      SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
+        SNOW_V_FSM_UPDATE FSM_R1, FSM_R2, FSM_R3, xmm1, xmm2
+        SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
                          xmm0, xmm1, xmm2, xmm3, gA, gB, inv_gA
 
-      mov offset, [r11 + 24]
-      movdqu [r11 + 16], xmm4
-      or offset, offset
-      ;; if last 8 bytes endpad are not 0 skip encrypt/decrypt operation
-      ;; option used to calculate auth tag for decrypt and not overwrite
-      ;; cipher by plain when the same src/dst pointer is used
-      jnz no_partial_block_left
+        mov offset, [r11 + 24]
+        movdqu [r11 + 16], xmm4
+        or offset, offset
+        ;; if last 8 bytes endpad are not 0 skip encrypt/decrypt operation
+        ;; option used to calculate auth tag for decrypt and not overwrite
+        ;; cipher by plain when the same src/dst pointer is used
+        jnz no_partial_block_left
 
 no_aead:
 
-      ;; Process input
-      mov r10, [job + _src]
-      add r10, [job + _cipher_start_src_offset_in_bytes]
-      mov r11, [job + _dst]
-      mov rax, [job + _msg_len_to_cipher_in_bytes]
-      xor offset, offset
-      ;; deal with partial block less than 16b outside main loop
-      and rax, 0xfffffffffffffff0
-      jz final_bytes
+        ;; Process input
+        mov r10, [job + _src]
+        add r10, [job + _cipher_start_src_offset_in_bytes]
+        mov r11, [job + _dst]
+        mov rax, [job + _msg_len_to_cipher_in_bytes]
+        xor offset, offset
+        ;; deal with partial block less than 16b outside main loop
+        and rax, 0xfffffffffffffff0
+        jz final_bytes
 
 encrypt_loop:
 
-      movdqu temp4, [r10 + offset]
+        movdqu temp4, [r10 + offset]
 
-      SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
+        SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
 
-      SNOW_V_FSM_UPDATE FSM_R1, FSM_R2, FSM_R3, xmm1, xmm2
+        SNOW_V_FSM_UPDATE FSM_R1, FSM_R2, FSM_R3, xmm1, xmm2
 
-      SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
+        SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
                          xmm0, xmm1, xmm2, xmm3, gA, gB, inv_gA
 
-      pxor   temp4, xmm4
-      movdqu [r11 + offset], temp4
-      add    offset, 16
-      sub    rax, 16
-      jnz    encrypt_loop
+        pxor   temp4, xmm4
+        movdqu [r11 + offset], temp4
+        add    offset, 16
+        sub    rax, 16
+        jnz    encrypt_loop
 
 final_bytes:
-      mov rax, [job + _msg_len_to_cipher_in_bytes]
-      and rax, 0xf
-      jz no_partial_block_left
-
-      ;; load partial block into XMM register
-      add    r10, offset
-      simd_load_sse_15_1 temp4, r10, rax
-      SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
-      pxor   temp4, xmm4
-      add    r11, offset
-      ;; use r10 and offset as temp [clobbered]
-      simd_store_sse_15 r11, temp4, rax, r10, offset
+        mov rax, [job + _msg_len_to_cipher_in_bytes]
+        and rax, 0xf
+        jz no_partial_block_left
+
+        ;; load partial block into XMM register
+        add    r10, offset
+        simd_load_sse_15_1 temp4, r10, rax
+        SNOW_V_KEYSTREAM xmm4, LFSR_B_HDQ, FSM_R1, FSM_R2
+        pxor   temp4, xmm4
+        add    r11, offset
+        ;; use r10 and offset as temp [clobbered]
+        simd_store_sse_15 r11, temp4, rax, r10, offset
 
 no_partial_block_left:
-      ;; Clear registers and return data
+        ;; Clear registers and return data
 %ifdef SAFE_DATA
-      clear_scratch_xmms_sse_asm
+        clear_scratch_xmms_sse_asm
 %endif
 
         mov   rax, job
-- 
GitLab


From ba6b45de810d36382ca14884a6a2ceb5639a999a Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 14 Mar 2023 17:17:35 +0000
Subject: [PATCH 200/332] avx: [snow-v] save and restore xmm6-xmm15 on Windows

---
 lib/avx_t1/snow_v_avx.asm | 378 +++++++++++++++++++++-----------------
 1 file changed, 212 insertions(+), 166 deletions(-)

diff --git a/lib/avx_t1/snow_v_avx.asm b/lib/avx_t1/snow_v_avx.asm
index 0fc556a3..8286da04 100644
--- a/lib/avx_t1/snow_v_avx.asm
+++ b/lib/avx_t1/snow_v_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
@@ -75,14 +75,20 @@ dq 0x20646b4578656c41
 dq 0x6d6f6854676E694a
 
 %ifdef LINUX
-      %define arg1      rdi
-      %define offset    rcx
+        %define arg1    rdi
+        %define offset  rcx
 %else
-      %define arg1      rcx
-      %define offset    r8
+        %define arg1    rcx
+        %define offset  r8
 %endif
 
-%define job             arg1
+%define job     arg1
+
+;; stack frame for saving registers (windows only)
+struc STACK
+_xmm_save:      resq    10 * 2  ; space for 10 xmm registers
+_rsp_save:      resq    1       ; space for rsp pointer
+endstruc
 
 mksection .text
 
@@ -121,13 +127,13 @@ mksection .text
 %macro SNOW_V_KEYSTREAM 4
 
 ;; all input is expected to be xmm registers
-%define %%KEYSTREAM   %1  ;; [out]  128 bit keystream
-%define %%LFSR_B_HDQ  %2  ;; [in]  128 bit LFSR_B_HDQ (b15, ..., b8)
-%define %%FSM_R1      %3  ;; [in]  128 bit FSM: R1
-%define %%FSM_R2      %4  ;; [in]  128 bit FSM: R2
+%define %%KEYSTREAM     %1  ;; [out]  128 bit keystream
+%define %%LFSR_B_HDQ    %2  ;; [in]  128 bit LFSR_B_HDQ (b15, ..., b8)
+%define %%FSM_R1        %3  ;; [in]  128 bit FSM: R1
+%define %%FSM_R2        %4  ;; [in]  128 bit FSM: R2
 
-      vpaddd      %%KEYSTREAM, %%LFSR_B_HDQ, %%FSM_R1
-      vpxor       %%KEYSTREAM, %%KEYSTREAM, %%FSM_R2
+        vpaddd  %%KEYSTREAM, %%LFSR_B_HDQ, %%FSM_R1
+        vpxor   %%KEYSTREAM, %%KEYSTREAM, %%FSM_R2
 
 %endmacro ;; SNOW_V_KEYSTREAM
 
@@ -147,14 +153,14 @@ mksection .text
 %define %%TEMP1         %5  ;; [clobbered] 128 bit register
 %define %%TEMP2         %6  ;; [clobbered] 128 bit register
 
-      vpxor       %%TEMP2, %%LFSR_A_LDQ, %%FSM_R3   ;; TEMP2 = R3 XOR LSFR_A [0:7]
-      vpaddd      %%TEMP2, %%TEMP2, %%FSM_R2        ;; TEMP2 += R2
+        vpxor   %%TEMP2, %%LFSR_A_LDQ, %%FSM_R3   ;; TEMP2 = R3 XOR LSFR_A [0:7]
+        vpaddd  %%TEMP2, %%TEMP2, %%FSM_R2        ;; TEMP2 += R2
 
-      vpxor       %%TEMP1, %%TEMP1, %%TEMP1         ;; TEMP1 = 0
+        vpxor   %%TEMP1, %%TEMP1, %%TEMP1         ;; TEMP1 = 0
 
-      vaesenc     %%FSM_R3, %%FSM_R2, %%TEMP1      ;; R3 = AESR(R2) (encryption round key C1 = 0)
-      vaesenc     %%FSM_R2, %%FSM_R1, %%TEMP1      ;; R2 = AESR(R1) (encryption round key C2 = 0)
-      vpshufb     %%FSM_R1, %%TEMP2, [rel sigma]   ;; R1 = sigma(TEMP2)
+        vaesenc %%FSM_R3, %%FSM_R2, %%TEMP1      ;; R3 = AESR(R2) (encryption round key C1 = 0)
+        vaesenc %%FSM_R2, %%FSM_R1, %%TEMP1      ;; R2 = AESR(R1) (encryption round key C2 = 0)
+        vpshufb %%FSM_R1, %%TEMP2, [rel sigma]   ;; R1 = sigma(TEMP2)
 
 %endmacro ;; SNOW_V_FSM_UPDATE
 
@@ -192,193 +198,233 @@ mksection .text
 ;;                else:            (x >> 1)
 ;;              = (x >> 1) xor signw(inv_gA, x << 15)
 
-      ;; calculate mulx_A = (alpha*a7, ..., alpha*a0)
-      vpsraw      %%TEMP1, %%LFSR_A_LDQ, 15  ;; 16-bit mask with sign bits preserved
-      vpand       %%TEMP1, %%TEMP1, %%gA
-      vpsllw      %%TEMP2, %%LFSR_A_LDQ, 1
-      vpxor       %%TEMP2, %%TEMP2, %%TEMP1   ;; TEMP2 = mulx_A
-
-      ;; calculate invx_A = (alpha^-1*a15, ..., alpha^-1*a8)
-      vpsllw      %%TEMP1, %%LFSR_A_HDQ, 15
-      vpsignw     %%TEMP1, %%inv_gA, %%TEMP1    ;; negate bits in inv_gA depending on LFSR_A_HDQ << 15
-      vpxor       %%TEMP2, %%TEMP1, %%TEMP2
-      vpsrlw      %%TEMP1, %%LFSR_A_HDQ, 1
-      vpxor       %%TEMP1, %%TEMP1, %%TEMP2  ;; TEMP1 = invx_A xor mulx_A
-
-      ;; LFSR_A_HDQ = mulx_A XOR invx_A XOR (b7, ..., b0) XOR (a8, ..., a1)
-      vpalignr    %%TEMP2, %%LFSR_A_HDQ, %%LFSR_A_LDQ, 2  ;; T2 = (tmpa_8, ..., tmpa_1)
-      vpxor       %%TEMP2, %%TEMP2, %%LFSR_B_LDQ
-      vpxor       %%T2, %%TEMP2, %%TEMP1
-
-      ;; calculate mulx_B
-      vpsraw      %%TEMP1, %%LFSR_B_LDQ, 15
-      vpand       %%TEMP1, %%TEMP1, %%gB
-      vpsllw      %%TEMP2, %%LFSR_B_LDQ, 1
-      vpxor       %%TEMP1, %%TEMP1, %%TEMP2
-
-      ;; T2 = mulx_B XOR (a7, ..., a0) XOR (b10, ..., b3)
-      vpxor       %%TEMP1, %%TEMP1, %%LFSR_A_LDQ
-      vmovdqa     %%LFSR_A_LDQ, %%LFSR_A_HDQ           ;; LFSR_A_LDQ = LFSR_A_HDQ
-      vmovdqa     %%LFSR_A_HDQ, %%T2
-
-      vpalignr    %%TEMP2, %%LFSR_B_HDQ, %%LFSR_B_LDQ, 6    ;; (b10, ..., b3)
-      vmovdqa     %%LFSR_B_LDQ, %%LFSR_B_HDQ                 ;; LFSR_B_LDQ = LFSR_B_HDQ
-      vpxor       %%TEMP2, %%TEMP2, %%TEMP1
-
-      ;; calculate invx_B
-      vpsllw      %%TEMP1, %%LFSR_B_HDQ, 15
-      vpsrlw      %%LFSR_B_HDQ, %%LFSR_B_HDQ, 1
-      vpsignw     %%TEMP1,inv_gB, %%TEMP1
-
-      ;; LFSR_B_HDQ = mulx_B XOR invx_B XOR (a7, ..., a0) XOR (b10, ..., b3)
-      vpxor       %%LFSR_B_HDQ, %%LFSR_B_HDQ, %%TEMP1
-      vpxor       %%LFSR_B_HDQ, %%LFSR_B_HDQ, %%TEMP2
+        ;; calculate mulx_A = (alpha*a7, ..., alpha*a0)
+        vpsraw          %%TEMP1, %%LFSR_A_LDQ, 15  ;; 16-bit mask with sign bits preserved
+        vpand           %%TEMP1, %%TEMP1, %%gA
+        vpsllw          %%TEMP2, %%LFSR_A_LDQ, 1
+        vpxor           %%TEMP2, %%TEMP2, %%TEMP1   ;; TEMP2 = mulx_A
+
+        ;; calculate invx_A = (alpha^-1*a15, ..., alpha^-1*a8)
+        vpsllw          %%TEMP1, %%LFSR_A_HDQ, 15
+        vpsignw         %%TEMP1, %%inv_gA, %%TEMP1    ;; negate bits in inv_gA depending on LFSR_A_HDQ << 15
+        vpxor           %%TEMP2, %%TEMP1, %%TEMP2
+        vpsrlw          %%TEMP1, %%LFSR_A_HDQ, 1
+        vpxor           %%TEMP1, %%TEMP1, %%TEMP2  ;; TEMP1 = invx_A xor mulx_A
+
+        ;; LFSR_A_HDQ = mulx_A XOR invx_A XOR (b7, ..., b0) XOR (a8, ..., a1)
+        vpalignr        %%TEMP2, %%LFSR_A_HDQ, %%LFSR_A_LDQ, 2  ;; T2 = (tmpa_8, ..., tmpa_1)
+        vpxor           %%TEMP2, %%TEMP2, %%LFSR_B_LDQ
+        vpxor           %%T2, %%TEMP2, %%TEMP1
+
+        ;; calculate mulx_B
+        vpsraw          %%TEMP1, %%LFSR_B_LDQ, 15
+        vpand           %%TEMP1, %%TEMP1, %%gB
+        vpsllw          %%TEMP2, %%LFSR_B_LDQ, 1
+        vpxor           %%TEMP1, %%TEMP1, %%TEMP2
+
+        ;; T2 = mulx_B XOR (a7, ..., a0) XOR (b10, ..., b3)
+        vpxor           %%TEMP1, %%TEMP1, %%LFSR_A_LDQ
+        vmovdqa         %%LFSR_A_LDQ, %%LFSR_A_HDQ           ;; LFSR_A_LDQ = LFSR_A_HDQ
+        vmovdqa         %%LFSR_A_HDQ, %%T2
+
+        vpalignr        %%TEMP2, %%LFSR_B_HDQ, %%LFSR_B_LDQ, 6    ;; (b10, ..., b3)
+        vmovdqa         %%LFSR_B_LDQ, %%LFSR_B_HDQ                 ;; LFSR_B_LDQ = LFSR_B_HDQ
+        vpxor           %%TEMP2, %%TEMP2, %%TEMP1
+
+        ;; calculate invx_B
+        vpsllw          %%TEMP1, %%LFSR_B_HDQ, 15
+        vpsrlw          %%LFSR_B_HDQ, %%LFSR_B_HDQ, 1
+        vpsignw         %%TEMP1,inv_gB, %%TEMP1
+
+        ;; LFSR_B_HDQ = mulx_B XOR invx_B XOR (a7, ..., a0) XOR (b10, ..., b3)
+        vpxor           %%LFSR_B_HDQ, %%LFSR_B_HDQ, %%TEMP1
+        vpxor           %%LFSR_B_HDQ, %%LFSR_B_HDQ, %%TEMP2
 
 %endmacro ;; SNOW_V_LFSR_UPDATE
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
+%macro FUNC_START 0
+%ifidn __OUTPUT_FORMAT__, win64
+        ; xmm6:xmm15 need to be maintained for Windows
+        mov             rax, rsp
+        sub             rsp, STACK_size
+        and             rsp, -16
+        mov             [rsp + _rsp_save], rax
+        vmovdqa         [rsp + _xmm_save + 0*16], xmm6
+        vmovdqa         [rsp + _xmm_save + 1*16], xmm7
+        vmovdqa         [rsp + _xmm_save + 2*16], xmm8
+        vmovdqa         [rsp + _xmm_save + 3*16], xmm9
+        vmovdqa         [rsp + _xmm_save + 4*16], xmm10
+        vmovdqa         [rsp + _xmm_save + 5*16], xmm11
+        vmovdqa         [rsp + _xmm_save + 6*16], xmm12
+        vmovdqa         [rsp + _xmm_save + 7*16], xmm13
+        vmovdqa         [rsp + _xmm_save + 8*16], xmm14
+        vmovdqa         [rsp + _xmm_save + 9*16], xmm15
+%endif
+%endmacro
+
+%macro FUNC_END 0
+%ifidn __OUTPUT_FORMAT__, win64
+        vmovdqa         xmm6, [rsp + _xmm_save + 0*16]
+        vmovdqa         xmm7, [rsp + _xmm_save + 1*16]
+        vmovdqa         xmm8, [rsp + _xmm_save + 2*16]
+        vmovdqa         xmm9, [rsp + _xmm_save + 3*16]
+        vmovdqa         xmm10, [rsp + _xmm_save + 4*16]
+        vmovdqa         xmm11, [rsp + _xmm_save + 5*16]
+        vmovdqa         xmm12, [rsp + _xmm_save + 6*16]
+        vmovdqa         xmm13, [rsp + _xmm_save + 7*16]
+        vmovdqa         xmm14, [rsp + _xmm_save + 8*16]
+        vmovdqa         xmm15, [rsp + _xmm_save + 9*16]
+        mov             rsp, [rsp + _rsp_save]
+%endif
+%endmacro
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
 MKGLOBAL(SNOW_V_AEAD_INIT,function,)
 SNOW_V_AEAD_INIT:
       endbranch64
+      FUNC_START
       ;; use offset to indicate AEAD mode
-      mov         DWORD(offset), 1
-      vmovdqa     LFSR_B_LDQ, [rel aead_lsfr_b_lo]
-      jmp         snow_v_common_init
+      mov               DWORD(offset), 1
+      vmovdqa           LFSR_B_LDQ, [rel aead_lsfr_b_lo]
+      jmp               snow_v_common_init
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 MKGLOBAL(SNOW_V,function,)
 SNOW_V:
-      endbranch64
-      ;; use offset to indicate AEAD mode
-      xor         DWORD(offset), DWORD(offset)
-      vpxor       LFSR_B_LDQ, LFSR_B_LDQ, LFSR_B_LDQ
+        endbranch64
+        FUNC_START
+        ;; use offset to indicate AEAD mode
+        xor             DWORD(offset), DWORD(offset)
+        vpxor           LFSR_B_LDQ, LFSR_B_LDQ, LFSR_B_LDQ
 
 snow_v_common_init:
 
-      ;; Init LSFR
-      mov         rax, [job + _enc_keys]
-      vmovdqu     LFSR_A_HDQ, [rax]
-      vmovdqu     LFSR_B_HDQ, [rax + 16]
-      mov         rax, [job + _iv]
-      vmovdqu     LFSR_A_LDQ, [rax]
+        ;; Init LSFR
+        mov             rax, [job + _enc_keys]
+        vmovdqu         LFSR_A_HDQ, [rax]
+        vmovdqu         LFSR_B_HDQ, [rax + 16]
+        mov             rax, [job + _iv]
+        vmovdqu         LFSR_A_LDQ, [rax]
 
-      ;; Init FSM: R1 = R2 = R3 = 0
-      vpxor       FSM_R1, FSM_R1, FSM_R1
-      vpxor       FSM_R2, FSM_R2, FSM_R2
-      vpxor       FSM_R3, FSM_R3, FSM_R3
+        ;; Init FSM: R1 = R2 = R3 = 0
+        vpxor           FSM_R1, FSM_R1, FSM_R1
+        vpxor           FSM_R2, FSM_R2, FSM_R2
+        vpxor           FSM_R3, FSM_R3, FSM_R3
 
-      vmovdqa     gA, [rel alpha]
-      vmovdqa     gB, [rel beta]
-      vmovdqa     inv_gA, [rel alpha_inv]
-      vmovdqa     inv_gB, [rel beta_inv]
+        vmovdqa         gA, [rel alpha]
+        vmovdqa         gB, [rel beta]
+        vmovdqa         inv_gA, [rel alpha_inv]
+        vmovdqa         inv_gB, [rel beta_inv]
 
-      mov   eax, 15
+        mov             eax, 15
 
 init_fsm_lfsr_loop:
 
-      SNOW_V_KEYSTREAM   KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
-      SNOW_V_FSM_UPDATE  FSM_R1, FSM_R2, FSM_R3, LFSR_A_LDQ, temp1, temp2
-      SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ, LFSR_B_LDQ, LFSR_B_HDQ, \
-                         inv_gB, temp1, temp2, temp3, gA, gB, inv_gA
-      vpxor LFSR_A_HDQ, LFSR_A_HDQ, KEYSTREAM
-      dec         eax
-      jnz         init_fsm_lfsr_loop
-
-      mov         rax, [job + _enc_keys]
-      vmovdqu     temp4, [rax]
-      vpxor       FSM_R1, FSM_R1, temp4
-
-      SNOW_V_KEYSTREAM   KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
-      SNOW_V_FSM_UPDATE  FSM_R1, FSM_R2, FSM_R3, LFSR_A_LDQ, temp1, temp2
-      SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
-                         inv_gB, temp1, temp2, temp3, gA, gB, inv_gA
-      vpxor       LFSR_A_HDQ, LFSR_A_HDQ, KEYSTREAM
-      vmovdqu     temp4, [rax + 16]
-      vpxor       FSM_R1, FSM_R1, temp4
-
-      ;; At this point FSM and LSFR are initialized
-
-      or          DWORD(offset), DWORD(offset)
-      jz          no_aead
-
-      ;; in AEAD mode hkey = keystream_0 and endpad = keystream_1
-      mov         r11,    [job + _snow_v_reserved]
-
-      ;; generate hkey
-      SNOW_V_KEYSTREAM KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
-      vmovdqu     [r11], KEYSTREAM
-
-      ;; generate endpad
-      SNOW_V_FSM_UPDATE  FSM_R1, FSM_R2, FSM_R3, LFSR_A_LDQ, temp1, temp2
-      SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
-                         inv_gB, temp1, temp2, temp3, gA, gB, inv_gA
-      SNOW_V_KEYSTREAM   KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
-
-      SNOW_V_FSM_UPDATE  FSM_R1, FSM_R2, FSM_R3, LFSR_A_LDQ, temp1, temp2
-      SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
-                         inv_gB, temp1, temp2, temp3, gA, gB, inv_gA
-
-      mov         offset, [r11 + 24]
-      vmovdqu     [r11 + 16], KEYSTREAM
-      or          offset, offset
-      ;; if last 8 bytes endpad are not 0 skip encrypt/decrypt operation
-      ;; option used to calculate auth tag for decrypt and not overwrite
-      ;; cipher by plain when the same src/dst pointer is used
-      jnz         no_partial_block_left
+        SNOW_V_KEYSTREAM   KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
+        SNOW_V_FSM_UPDATE  FSM_R1, FSM_R2, FSM_R3, LFSR_A_LDQ, temp1, temp2
+        SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ, LFSR_B_LDQ, LFSR_B_HDQ, \
+                           inv_gB, temp1, temp2, temp3, gA, gB, inv_gA
+        vpxor           LFSR_A_HDQ, LFSR_A_HDQ, KEYSTREAM
+        dec             eax
+        jnz             init_fsm_lfsr_loop
+
+        mov             rax, [job + _enc_keys]
+        vmovdqu         temp4, [rax]
+        vpxor           FSM_R1, FSM_R1, temp4
+
+        SNOW_V_KEYSTREAM   KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
+        SNOW_V_FSM_UPDATE  FSM_R1, FSM_R2, FSM_R3, LFSR_A_LDQ, temp1, temp2
+        SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
+                           inv_gB, temp1, temp2, temp3, gA, gB, inv_gA
+        vpxor           LFSR_A_HDQ, LFSR_A_HDQ, KEYSTREAM
+        vmovdqu         temp4, [rax + 16]
+        vpxor           FSM_R1, FSM_R1, temp4
+
+        ;; At this point FSM and LSFR are initialized
+
+        or              DWORD(offset), DWORD(offset)
+        jz              no_aead
+
+        ;; in AEAD mode hkey = keystream_0 and endpad = keystream_1
+        mov             r11, [job + _snow_v_reserved]
+
+        ;; generate hkey
+        SNOW_V_KEYSTREAM KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
+        vmovdqu         [r11], KEYSTREAM
+
+        ;; generate endpad
+        SNOW_V_FSM_UPDATE  FSM_R1, FSM_R2, FSM_R3, LFSR_A_LDQ, temp1, temp2
+        SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
+                           inv_gB, temp1, temp2, temp3, gA, gB, inv_gA
+        SNOW_V_KEYSTREAM   KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
+
+        SNOW_V_FSM_UPDATE  FSM_R1, FSM_R2, FSM_R3, LFSR_A_LDQ, temp1, temp2
+        SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ,LFSR_B_LDQ, LFSR_B_HDQ, \
+                           inv_gB, temp1, temp2, temp3, gA, gB, inv_gA
+
+        mov             offset, [r11 + 24]
+        vmovdqu         [r11 + 16], KEYSTREAM
+        or              offset, offset
+        ;; if last 8 bytes endpad are not 0 skip encrypt/decrypt operation
+        ;; option used to calculate auth tag for decrypt and not overwrite
+        ;; cipher by plain when the same src/dst pointer is used
+        jnz             no_partial_block_left
 
 no_aead:
 
-      ;; Process input
-      mov         r10, [job + _src]
-      add         r10, [job + _cipher_start_src_offset_in_bytes]
-      mov         r11, [job + _dst]
-      mov         rax, [job + _msg_len_to_cipher_in_bytes]
-      xor         offset, offset
-      ;; deal with partial block less than 16b outside main loop
-      and         rax, 0xfffffffffffffff0
-      jz          final_bytes
+        ;; Process input
+        mov             r10, [job + _src]
+        add             r10, [job + _cipher_start_src_offset_in_bytes]
+        mov             r11, [job + _dst]
+        mov             rax, [job + _msg_len_to_cipher_in_bytes]
+        xor             offset, offset
+        ;; deal with partial block less than 16b outside main loop
+        and             rax, 0xfffffffffffffff0
+        jz              final_bytes
 
 encrypt_loop:
 
-      vmovdqu     temp4, [r10 + offset]
+        vmovdqu         temp4, [r10 + offset]
 
-      SNOW_V_KEYSTREAM   KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
-      SNOW_V_FSM_UPDATE  FSM_R1, FSM_R2, FSM_R3, LFSR_A_LDQ, temp1, temp2
-      SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ, LFSR_B_LDQ, LFSR_B_HDQ, \
-                         inv_gB, temp1, temp2, temp3, gA, gB, inv_gA
+        SNOW_V_KEYSTREAM   KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
+        SNOW_V_FSM_UPDATE  FSM_R1, FSM_R2, FSM_R3, LFSR_A_LDQ, temp1, temp2
+        SNOW_V_LFSR_UPDATE LFSR_A_LDQ, LFSR_A_HDQ, LFSR_B_LDQ, LFSR_B_HDQ, \
+                           inv_gB, temp1, temp2, temp3, gA, gB, inv_gA
 
-      vpxor       temp4, temp4, KEYSTREAM
-      vmovdqu     [r11 + offset], temp4
-      add         offset, 16
-      sub         rax, 16
-      jnz         encrypt_loop
+        vpxor           temp4, temp4, KEYSTREAM
+        vmovdqu         [r11 + offset], temp4
+        add             offset, 16
+        sub             rax, 16
+        jnz             encrypt_loop
 
 final_bytes:
-      mov         rax, [job + _msg_len_to_cipher_in_bytes]
-      and         rax, 0xf
-      jz          no_partial_block_left
+        mov             rax, [job + _msg_len_to_cipher_in_bytes]
+        and             rax, 0xf
+        jz              no_partial_block_left
 
-      ;; load partial block into XMM register
-      add         r10, offset
-      simd_load_avx_15_1 temp4, r10, rax
-      SNOW_V_KEYSTREAM KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
-      vpxor       temp4, temp4, KEYSTREAM
-      add         r11, offset
+        ;; load partial block into XMM register
+        add             r10, offset
+        simd_load_avx_15_1 temp4, r10, rax
+        SNOW_V_KEYSTREAM KEYSTREAM, LFSR_B_HDQ, FSM_R1, FSM_R2
+        vpxor           temp4, temp4, KEYSTREAM
+        add             r11, offset
 
-      ;; use r10 and offset as temp [clobbered]
-      simd_store_avx_15 r11, temp4, rax, r10, offset
+        ;; use r10 and offset as temp [clobbered]
+        simd_store_avx_15 r11, temp4, rax, r10, offset
 
 no_partial_block_left:
-      ;; Clear registers and return data
+        ;; Clear registers and return data
 %ifdef SAFE_DATA
-      clear_scratch_xmms_avx_asm
+        clear_scratch_xmms_avx_asm
 %endif
 
-      mov         rax, job
-      or          dword [rax + _status], IMB_STATUS_COMPLETED_CIPHER
-
-      ret
+        mov             rax, job
+        or              dword [rax + _status], IMB_STATUS_COMPLETED_CIPHER
+        FUNC_END
+        ret
 
 mksection stack-noexec
-- 
GitLab


From ecaa8d648768919bf8a940cfc421a2ab3376ec04 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 24 Mar 2023 19:55:47 +0000
Subject: [PATCH 201/332] test: [burst api] added test for incorrect suite_id

---
 test/kat-app/api_test.c | 37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/test/kat-app/api_test.c b/test/kat-app/api_test.c
index 3a0259d8..747b85d2 100644
--- a/test/kat-app/api_test.c
+++ b/test/kat-app/api_test.c
@@ -911,6 +911,43 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                 return 1;
         }
         print_progress();
+
+        /* ======== test 8 : invalid suite_id */
+
+        while (IMB_GET_NEXT_BURST(mb_mgr, n_jobs, jobs) < n_jobs)
+                IMB_FLUSH_BURST(mb_mgr, n_jobs, jobs);
+
+        /* fill in valid jobs */
+        for (i = 0; i < n_jobs; i++) {
+                job = jobs[i];
+                fill_in_job(job, IMB_CIPHER_CBC, IMB_DIR_ENCRYPT, IMB_AUTH_NULL,
+                            IMB_ORDER_CIPHER_HASH, NULL, NULL);
+
+                if (i == (n_jobs - 1))
+                        memset(job->suite_id, 0, sizeof(job->suite_id)); /* bad suite_id */
+                else
+                        imb_set_cipher_suite_id(mb_mgr, job);
+        }
+
+        completed_jobs = IMB_SUBMIT_BURST(mb_mgr, n_jobs, jobs);
+        if (completed_jobs != 0) {
+                printf("%s: test %d, unexpected number of completed "
+                       "jobs\n", __func__, TEST_INVALID_BURST);
+                return 1;
+        }
+        print_progress();
+
+        err = imb_get_errno(mb_mgr);
+        if (err != IMB_ERR_BURST_SUITE_ID) {
+                printf("%s: test %d, unexpected error: %s\n",
+                       __func__, TEST_INVALID_BURST,
+                       imb_get_strerror(err));
+                return 1;
+        }
+        print_progress();
+
+        /* ======== end */
+
         if (!quiet_mode)
                 printf("\n");
 
-- 
GitLab


From 756cecb647b2b987a62624f9e39caa0ec96a46a8 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 30 Mar 2023 16:52:52 +0100
Subject: [PATCH 202/332] Update documentation for CMake support

---
 README.md        | 65 ++++++++++++++++++++++++++++++++++++++++++++++++
 ReleaseNotes.txt |  3 +++
 2 files changed, 68 insertions(+)

diff --git a/README.md b/README.md
index f38d50ef..b3ae69b9 100644
--- a/README.md
+++ b/README.md
@@ -443,6 +443,71 @@ Build with debugging information:
 For more build options and their explanation run:   
 `> gmake help`
 
+Building with CMake (experimental)
+-------------------
+
+Minimum CMake version:
+- 3.16
+
+Create build directory:
+```
+mkdir build
+cd build
+```
+
+### Unix Makefiles (Linux and FreeBSD)
+
+Shared library (default):
+```
+cmake ..
+cmake --build . --parallel
+```
+
+Static library:
+```
+cmake -DBUILD_SHARED_LIBS=OFF ..
+cmake --build . --parallel
+```
+
+Debug build:
+```
+cmake -DCMAKE_BUILD_TYPE=Debug ..
+cmake --build . --parallel
+```
+
+### Windows MSVS (x64 only)
+
+Shared library with debugging information (default for MSVS)
+```
+cmake -Ax64 ..
+cmake --build .
+```
+
+Release build:
+```
+cmake -Ax64 ..
+cmake --build . --config Release
+```
+
+Static library:
+```
+cmake -Ax64 -DBUILD_SHARED_LIBS=OFF ..
+cmake --build . --config Release
+```
+
+###  Ninja (Linux, FreeBSD and Windows):
+```
+cmake -G Ninja ..
+cmake --build .
+```
+
+Library and applications can be found in:
+```
+build/lib
+build/test
+build/perf
+```
+
 7\. Security Considerations & Options for Increased Security
 ============================================================
 
diff --git a/ReleaseNotes.txt b/ReleaseNotes.txt
index 65b555ce..95593301 100644
--- a/ReleaseNotes.txt
+++ b/ReleaseNotes.txt
@@ -4,6 +4,9 @@ Release Notes for Intel(R) Multi-Buffer Crypto for IPsec Library
 Unreleased
 ==========
 
+General
+- Experimental CMake support for Linux, FreeBSD and Windows added
+
 Library
 - POLY1305 AVX2 with AVX-IFMA instructions added.
 
-- 
GitLab


From adb465d3ff57b50237a50d8e4ed91cfb3b676e24 Mon Sep 17 00:00:00 2001
From: Stephen Mcintyre <stephen.mcintyre@intel.com>
Date: Mon, 3 Apr 2023 15:01:55 +0100
Subject: [PATCH 203/332] lib: [noaesni] define set suite in no aesni

---
 lib/include/arch_noaesni.h         | 2 ++
 lib/no-aesni/mb_mgr_sse_no_aesni.c | 3 +++
 2 files changed, 5 insertions(+)

diff --git a/lib/include/arch_noaesni.h b/lib/include/arch_noaesni.h
index 8d965096..6ae999e0 100644
--- a/lib/include/arch_noaesni.h
+++ b/lib/include/arch_noaesni.h
@@ -193,6 +193,8 @@ uint32_t
 ethernet_fcs_sse_no_aesni_local(const void *msg, const uint64_t len,
                                 const void *tag_ouput);
 
+IMB_DLL_EXPORT void set_suite_id_sse_no_aesni(IMB_MGR *state, IMB_JOB *job);
+
 #endif /* IMB_ARCH_NOAESNI_H */
 
 
diff --git a/lib/no-aesni/mb_mgr_sse_no_aesni.c b/lib/no-aesni/mb_mgr_sse_no_aesni.c
index 04c72271..3fbfc248 100644
--- a/lib/no-aesni/mb_mgr_sse_no_aesni.c
+++ b/lib/no-aesni/mb_mgr_sse_no_aesni.c
@@ -166,6 +166,7 @@
 #define SUBMIT_CIPHER_BURST_NOCHECK submit_cipher_burst_nocheck_sse_no_aesni
 #define SUBMIT_HASH_BURST submit_hash_burst_sse_no_aesni
 #define SUBMIT_HASH_BURST_NOCHECK submit_hash_burst_nocheck_sse_no_aesni
+#define SET_SUITE_ID_FN   set_suite_id_sse_no_aesni
 
 #define SUBMIT_JOB_AES128_DEC submit_job_aes128_dec_sse_no_aesni
 #define SUBMIT_JOB_AES192_DEC submit_job_aes192_dec_sse_no_aesni
@@ -470,6 +471,8 @@ init_mb_mgr_sse_no_aesni_internal(IMB_MGR *state, const int reset_mgrs)
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse_no_aesni;
         state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse_no_aesni;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse_no_aesni;
+
+        state->set_suite_id        = SET_SUITE_ID_FN;
 }
 
 void
-- 
GitLab


From 7b31d7116afa972afd8400631399d0f0bfe81086 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 3 Apr 2023 12:31:14 +0100
Subject: [PATCH 204/332] lib: [build] improve tool check and version reporting
 in Linux Makefile

- do not check tool version when running 'style' and 'clean' targets
- use 'info' command for tool version reporting (instead of 'warn')
- report NASM and CC tool names and versions
---
 lib/Makefile | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/lib/Makefile b/lib/Makefile
index 74eee926..2994affc 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -51,6 +51,11 @@ YASM ?= yasm
 NASM ?= nasm
 
 CC ?= gcc
+
+# skip version detection with clean or style target
+ifneq ($(MAKECMDGOALS),clean)
+ifneq ($(MAKECMDGOALS),style)
+
 # MINGW should be non-zero value if detected
 MINGW ?= $(shell $(CC) -dM -E - < /dev/null | grep -i mingw | wc -l | sed 's/^ *//')
 
@@ -75,9 +80,11 @@ NASM_MINOR_VER = $(shell echo $(NASM_VERSION) | cut -d "." -f 2 | cut -c 1-2)
 NASM_VER = $(shell expr $(NASM_MAJOR_VER) $(MULT) 100 + $(NASM_MINOR_VER) )
 
 NASM_GE_REQ = $(shell [ $(NASM_VER) -ge $(NASM_MIN_REQ) ] && echo true)
+
+$(info NASM '$(NASM)' version: $(NASM_VERSION))
+
 ifneq ($(NASM_GE_REQ),true)
-$(warning "NASM version found: $(NASM_VERSION)")
-$(error "Minimum required: $(NASM_MAJOR_REQ).$(NASM_MINOR_REQ)")
+$(error "Minimum required NASM version: $(NASM_MAJOR_REQ).$(NASM_MINOR_REQ)")
 endif # NASM_GE_REQ
 endif # NASM_VERSION
 
@@ -89,8 +96,7 @@ NASM_MIN_IFMA_REQ = $(shell expr $(NASM_MAJOR_AVX_IFMA) $(MULT) 100 + $(NASM_MIN
 
 NASM_IFMA_GE_REQ = $(shell [ $(NASM_VER) -ge $(NASM_MIN_IFMA_REQ) ] && echo true)
 ifneq ($(NASM_IFMA_GE_REQ),true)
-$(warning "NASM version found: $(NASM_VERSION)")
-$(warning "AVX-IFMA not supported. Minimum required: $(NASM_MAJOR_AVX_IFMA).$(NASM_MINOR_AVX_IFMA)")
+$(warning Minimum required NASM version for AVX-IFMA: $(NASM_MAJOR_AVX_IFMA).$(NASM_MINOR_AVX_IFMA). AVX-IFMA code not compiled - update NASM.)
 AVX_IFMA := n
 endif # NASM_AVX_IFMA_GET_REQ
 
@@ -205,6 +211,7 @@ OPT_NOAESNI := -msse4.2 -mno-aes -mno-pclmul
 ifeq ($(CC),$(filter $(CC),gcc cc))
 GCC_VERSION = $(shell $(CC) -dumpversion | cut -d. -f1)
 GCC_GE_V5 = $(shell [ $(GCC_VERSION) -ge 5 ] && echo true)
+$(info CC '$(CC)' version: $(GCC_VERSION))
 ifeq ($(GCC_GE_V5),true)
 OPT_SSE := -march=nehalem -maes -mpclmul
 OPT_AVX := -march=sandybridge -maes -mpclmul
@@ -218,6 +225,7 @@ endif
 ifeq ($(CC),$(filter $(CC),clang))
 CLANG_VERSION = $(shell $(CC) --version | head -n 1 | cut -d ' ' -f 3)
 CLANG_GE_V381 = $(shell test "$(CLANG_VERSION)" \> "3.8.0" && echo true)
+$(info CLANG '$(CC)' version: $(CLANG_VERSION))
 ifeq ($(CLANG_GE_V381),true)
 OPT_SSE := -march=nehalem -maes -mpclmul
 OPT_AVX := -march=sandybridge -maes -mpclmul
@@ -250,6 +258,9 @@ LDFLAGS += -fcf-protection=full
 endif
 endif
 
+endif # style target
+endif # clean target
+
 # warning messages
 SAFE_PARAM_MSG1="SAFE_PARAM option not set."
 SAFE_PARAM_MSG2="Input parameters will not be checked."
-- 
GitLab


From d1c14dfc787211f173f2bda7d91f1c6cecd5dac9 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 4 Apr 2023 10:20:29 +0100
Subject: [PATCH 205/332] test: [kat] remove invalid IV size tests for AES-ECB

---
 test/kat-app/api_test.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/test/kat-app/api_test.c b/test/kat-app/api_test.c
index 747b85d2..75c96a17 100644
--- a/test/kat-app/api_test.c
+++ b/test/kat-app/api_test.c
@@ -341,7 +341,6 @@ fill_in_job(struct IMB_JOB *job,
                 break;
         case IMB_CIPHER_ECB:
                 job->key_len_in_bytes = UINT64_C(16);
-                job->iv_len_in_bytes = 0;
                 break;
         case IMB_CIPHER_ZUC_EEA3:
                 job->key_len_in_bytes = UINT64_C(16);
@@ -2011,9 +2010,6 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                 /* CCM IV must be 13 to 7 bytes */
                 { IMB_CIPHER_CCM, 6 },
                 { IMB_CIPHER_CCM, 14 },
-                /* ECB IV must be 0 bytes */
-                { IMB_CIPHER_ECB, 1 },
-                { IMB_CIPHER_ECB, -1 },
                 /* CNTR IV must be 12 or 16 bytes */
                 { IMB_CIPHER_CNTR, 11 },
                 { IMB_CIPHER_CNTR, 14 },
-- 
GitLab


From e6c7b4a394d34bb501cd098dc417141cb7a441e7 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 4 Apr 2023 10:14:45 +0100
Subject: [PATCH 206/332] lib: [job] remove obsolete IV size check for AES-ECB

---
 lib/include/mb_mgr_job_check.h | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/lib/include/mb_mgr_job_check.h b/lib/include/mb_mgr_job_check.h
index c9d49443..2416118b 100644
--- a/lib/include/mb_mgr_job_check.h
+++ b/lib/include/mb_mgr_job_check.h
@@ -246,10 +246,6 @@ is_job_invalid(IMB_MGR *state, const IMB_JOB *job,
                         imb_set_errno(state, IMB_ERR_JOB_CIPH_LEN);
                         return 1;
                 }
-                if (job->iv_len_in_bytes != UINT64_C(0)) {
-                        imb_set_errno(state, IMB_ERR_JOB_IV_LEN);
-                        return 1;
-                }
                 break;
         case IMB_CIPHER_CNTR:
         case IMB_CIPHER_CNTR_BITLEN:
-- 
GitLab


From 78f7fc0339e831c23495b0b2c02af75d856ee5d5 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 3 Apr 2023 13:47:37 +0100
Subject: [PATCH 207/332] test: [acvp] add aes-ecb support

---
 test/acvp-app/acvp_app_main.c | 86 +++++++++++++++++++++++++++++++++++
 1 file changed, 86 insertions(+)

diff --git a/test/acvp-app/acvp_app_main.c b/test/acvp-app/acvp_app_main.c
index 0bc812ca..44bbfbe8 100644
--- a/test/acvp-app/acvp_app_main.c
+++ b/test/acvp-app/acvp_app_main.c
@@ -140,6 +140,88 @@ static int aes_cbc_handler(ACVP_TEST_CASE *test_case)
         return EXIT_SUCCESS;
 }
 
+static int aes_ecb_handler(ACVP_TEST_CASE *test_case)
+{
+        ACVP_SYM_CIPHER_TC *tc;
+        IMB_JOB *job = NULL;
+        DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
+        DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
+
+        if (test_case == NULL)
+                return EXIT_FAILURE;
+
+        tc = test_case->tc.symmetric;
+
+        if (tc->direction != ACVP_SYM_CIPH_DIR_ENCRYPT &&
+            tc->direction != ACVP_SYM_CIPH_DIR_DECRYPT) {
+                fprintf(stderr, "Unsupported direction\n");
+                return EXIT_FAILURE;
+        }
+
+        switch (tc->key_len) {
+        case 128:
+                IMB_AES_KEYEXP_128(mb_mgr, tc->key, enc_keys, dec_keys);
+                break;
+        case 192:
+                IMB_AES_KEYEXP_192(mb_mgr, tc->key, enc_keys, dec_keys);
+                break;
+        case 256:
+                IMB_AES_KEYEXP_256(mb_mgr, tc->key, enc_keys, dec_keys);
+                break;
+        default:
+                fprintf(stderr, "Unsupported AES key length\n");
+                return EXIT_FAILURE;
+        }
+
+        job = IMB_GET_NEXT_JOB(mb_mgr);
+        job->key_len_in_bytes = tc->key_len >> 3;
+        job->cipher_mode = IMB_CIPHER_ECB;
+        job->hash_alg = IMB_AUTH_NULL;
+        job->cipher_start_src_offset_in_bytes = 0;
+        job->enc_keys = enc_keys;
+        job->dec_keys = dec_keys;
+
+        if (tc->direction == ACVP_SYM_CIPH_DIR_ENCRYPT) {
+                job->cipher_direction = IMB_DIR_ENCRYPT;
+                job->chain_order = IMB_ORDER_CIPHER_HASH;
+                job->src = tc->pt;
+                job->dst = tc->ct;
+                job->msg_len_to_cipher_in_bytes = tc->pt_len;
+                tc->ct_len = tc->pt_len;
+
+                job = IMB_SUBMIT_JOB(mb_mgr);
+                if (job == NULL)
+                        job = IMB_FLUSH_JOB(mb_mgr);
+                if (job->status != IMB_STATUS_COMPLETED) {
+                        const int err = imb_get_errno(mb_mgr);
+                        const char *err_str = imb_get_strerror(err);
+
+                        fprintf(stderr, "Invalid encrypt job: %s\n", err_str);
+                        return EXIT_FAILURE;
+                }
+        } else /* DECRYPT */ {
+                job->cipher_direction = IMB_DIR_DECRYPT;
+                job->chain_order = IMB_ORDER_HASH_CIPHER;
+                job->src = tc->ct;
+                job->dst = tc->pt;
+                job->msg_len_to_cipher_in_bytes = tc->ct_len;
+                tc->pt_len = tc->ct_len;
+
+                job = IMB_SUBMIT_JOB(mb_mgr);
+                if (job == NULL)
+                        job = IMB_FLUSH_JOB(mb_mgr);
+                if (job->status != IMB_STATUS_COMPLETED) {
+                        const int err = imb_get_errno(mb_mgr);
+                        const char *err_str = imb_get_strerror(err);
+
+                        fprintf(stderr, "Invalid decrypt job: %s\n", err_str);
+                        return EXIT_FAILURE;
+                }
+        }
+
+        return EXIT_SUCCESS;
+}
+
 static int aes_gcm_handler(ACVP_TEST_CASE *test_case)
 {
         ACVP_SYM_CIPHER_TC *tc;
@@ -1274,6 +1356,10 @@ int main(int argc, char **argv)
                                        &aes_cbc_handler) != ACVP_SUCCESS)
                 goto exit;
 
+        if (acvp_cap_sym_cipher_enable(ctx, ACVP_AES_ECB,
+                                       &aes_ecb_handler) != ACVP_SUCCESS)
+                goto exit;
+
         if (acvp_cap_sym_cipher_enable(ctx, ACVP_AES_CTR,
                                        &aes_ctr_handler) != ACVP_SUCCESS)
                 goto exit;
-- 
GitLab


From dd999c2e8db6341d9525bef4284ce6f2848a8e49 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 5 Apr 2023 14:29:10 +0100
Subject: [PATCH 208/332] avx512: [gcm] clear extra registers which may contain
 sensitive data

Co-authored-by: Stephen Mcintyre <stephen.mcintyre@intel.com>
---
 lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc |  4 ++--
 lib/avx512_t2/gcm_vaes_avx512.inc          | 10 ++++++++--
 2 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc b/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
index 4ab8d71f..40299db2 100644
--- a/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
@@ -273,8 +273,8 @@ no_full_blocks:
         vpxorq  xmm8, xmm8, xmm1
         vmovdqu64 [arg2 + AadHash], xmm8
 %ifdef SAFE_DATA
-        ;; **xmm1 may contain some clear text
-        clear_zmms_avx512 xmm1
+        ;; **xmm1 and xmm8 may contain some clear text
+        clear_zmms_avx512 xmm1, xmm8
 %endif
 exit_gmac_update:
         FUNC_RESTORE
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 466d718f..54424712 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -3396,7 +3396,10 @@
                 %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
         ;; **ZTMP9 clobbered but ZTMP1 may include sensitive data
         ;; **ZTMP16 and ZTMP17 clobbered or cleared above
-
+        ;; **ZTMP21 may include part of cipher key
+%ifdef SAFE_DATA
+       vpxorq   %%ZTMP21, %%ZTMP21, %%ZTMP21
+%endif
 %ifidn %%INSTANCE_TYPE, multi_call
         vpshufb         %%CTR_BLOCKx, %%CTR_BLOCKx, XWORD(%%SHUF_MASK)
 %endif
@@ -3465,7 +3468,10 @@
                 %%ENC_DEC, %%AAD_HASHz, %%IA0, %%IA5, %%MASKREG, %%INSTANCE_TYPE
         ;; **ZTMP9 clobbered but ZTMP1 may include sensitive data
         ;; **ZTMP16 and ZTMP17 clobbered or cleared above
-
+        ;; **ZTMP21 may include part of cipher key
+%ifdef SAFE_DATA
+       vpxorq   %%ZTMP21, %%ZTMP21, %%ZTMP21
+%endif
 %ifidn %%INSTANCE_TYPE, multi_call
         vpshufb         %%CTR_BLOCKx, %%CTR_BLOCKx, XWORD(%%SHUF_MASK)
 %endif
-- 
GitLab


From 9a053ab2d6bbbf31beea985635175f216f36220d Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Fri, 31 Mar 2023 14:49:04 +0100
Subject: [PATCH 209/332] test: [HMAC_SHA1] unifying test vectors

---
 test/{wycheproof-app => include}/aead_test.h |   0
 test/{wycheproof-app => include}/mac_test.h  |   0
 test/kat-app/CMakeLists.txt                  |   1 +
 test/kat-app/Makefile                        |   3 +-
 test/kat-app/hmac_sha1.json.c                | 121 +++++++
 test/kat-app/hmac_sha1_test.c                | 359 +++----------------
 test/kat-app/win_x64.mak                     |   2 +-
 7 files changed, 175 insertions(+), 311 deletions(-)
 rename test/{wycheproof-app => include}/aead_test.h (100%)
 rename test/{wycheproof-app => include}/mac_test.h (100%)
 create mode 100644 test/kat-app/hmac_sha1.json.c

diff --git a/test/wycheproof-app/aead_test.h b/test/include/aead_test.h
similarity index 100%
rename from test/wycheproof-app/aead_test.h
rename to test/include/aead_test.h
diff --git a/test/wycheproof-app/mac_test.h b/test/include/mac_test.h
similarity index 100%
rename from test/wycheproof-app/mac_test.h
rename to test/include/mac_test.h
diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 53e23796..7aaf94a5 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -74,6 +74,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/snow_v_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/quic_ecb_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha1.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
 )
 
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index ed879e17..1cab26b8 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -37,7 +37,8 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	ecb_test.c zuc_test.c kasumi_test.c snow3g_test.c direct_api_test.c clear_mem_test.c \
 	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
-	../common/utils.c
+	hmac_sha1.json.c \
+	../common/utils.c 
 OBJECTS := $(SOURCES:%.c=%.o)
 
 # targets come here
diff --git a/test/kat-app/hmac_sha1.json.c b/test/kat-app/hmac_sha1.json.c
new file mode 100644
index 00000000..2d757355
--- /dev/null
+++ b/test/kat-app/hmac_sha1.json.c
@@ -0,0 +1,121 @@
+/*****************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************/
+
+#include "mac_test.h"
+
+const struct mac_test hmac_sha1_test_kat_json[] = {
+        /*
+         * Test vectors from https://tools.ietf.org/html/rfc2202
+         */
+        { 20, 20, 1,
+          "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b"
+          "\x0b\x0b\x0b",
+          "\x48\x69\x20\x54\x68\x65\x72\x65",
+          "\xb6\x17\x31\x86\x55\x05\x72\x64\xe2\x8b\xc0\xb6\xfb\x37\x8c\x8e\xf1"
+          "\x46\xbe\x00",
+          1, 64, NULL, 0 },
+        { 4, 20, 2, "\x4a\x65\x66\x65",
+          "\x77\x68\x61\x74\x20\x64\x6F\x20\x79\x61\x20\x77\x61\x6E\x74\x20\x66"
+          "\x6F\x72\x20\x6E\x6F\x74\x68\x69\x6E\x67\x3F",
+          "\xef\xfc\xdf\x6a\xe5\xeb\x2f\xa2\xd2\x74\x16\xd5\xf1\x84\xdf\x9c\x25"
+          "\x9a\x7c\x79",
+          1, 224, NULL, 0 },
+        { 20, 20, 3,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa",
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
+          "\x12\x5d\x73\x42\xb9\xac\x11\xcd\x91\xa3\x9a\xf4\x8a\xa1\x7b\x4f\x63"
+          "\xf1\x75\xd3",
+          1, 400, NULL, 0 },
+        { 25, 20, 4,
+          "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11"
+          "\x12\x13\x14\x15\x16\x17\x18\x19",
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
+          "\x4c\x90\x07\xf4\x02\x62\x50\xc6\xbc\x84\x14\xf9\xbf\x50\xc8\x6c\x2d"
+          "\x72\x35\xda",
+          1, 400, NULL, 0 },
+        { 20, 20, 5,
+          "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c"
+          "\x0c\x0c\x0c",
+          "\x54\x65\x73\x74\x20\x57\x69\x74\x68\x20\x54\x72\x75\x6e\x63\x61\x74"
+          "\x69\x6f\x6e",
+          "\x4c\x1a\x03\x42\x4b\x55\xe0\x7f\xe7\xf2\x7b\xe1\xd5\x8b\xb9\x32\x4a"
+          "\x9a\x5a\x04",
+          1, 160, NULL, 0 },
+        { 20, 12, 6,
+          "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c"
+          "\x0c\x0c\x0c",
+          "\x54\x65\x73\x74\x20\x57\x69\x74\x68\x20\x54\x72\x75\x6e\x63\x61\x74"
+          "\x69\x6f\x6e",
+          "\x4c\x1a\x03\x42\x4b\x55\xe0\x7f\xe7\xf2\x7b\xe1",
+          1, 160, NULL, 0 },
+        { 80, 20, 7,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa",
+          "\x54\x65\x73\x74\x20\x55\x73\x69\x6e\x67\x20\x4c\x61\x72\x67\x65\x72"
+          "\x20\x54\x68\x61\x6e\x20\x42\x6c\x6f\x63\x6b\x2d\x53\x69\x7a\x65\x20"
+          "\x4b\x65\x79\x20\x2d\x20\x48\x61\x73\x68\x20\x4b\x65\x79\x20\x46\x69"
+          "\x72\x73\x74",
+          "\xaa\x4a\xe5\xe1\x52\x72\xd0\x0e\x95\x70\x56\x37\xce\x8a\x3b\x55\xed"
+          "\x40\x21\x12",
+          1, 432, NULL, 0 },
+        { 80, 20, 8,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa",
+          "\x54\x65\x73\x74\x20\x55\x73\x69\x6e\x67\x20\x4c\x61\x72\x67\x65\x72"
+          "\x20\x54\x68\x61\x6e\x20\x42\x6c\x6f\x63\x6b\x2d\x53\x69\x7a\x65\x20"
+          "\x4b\x65\x79\x20\x61\x6e\x64\x20\x4c\x61\x72\x67\x65\x72\x20\x54\x68"
+          "\x61\x6e\x20\x4f\x6e\x65\x20\x42\x6c\x6f\x63\x6b\x2d\x53\x69\x7a\x65"
+          "\x20\x44\x61\x74\x61",
+          "\xe8\xe9\x9d\x0f\x45\x23\x7d\x78\x6d\x6b\xba\xa7\x96\x5c\x78\x08\xbb"
+          "\xff\x1a\x91",
+          1, 584, NULL, 0 },
+        /*
+         * Test vector from
+         * https://csrc.nist.gov/csrc/media/publications/fips/198/
+         * archive/2002-03-06/documents/fips-198a.pdf
+         */
+        { 49, 12, 9,
+          "\x70\x71\x72\x73\x74\x75\x76\x77\x78\x79\x7a\x7b\x7c\x7d\x7e\x7f\x80"
+          "\x81\x82\x83\x84\x85\x86\x87\x88\x89\x8a\x8b\x8c\x8d\x8e\x8f\x90\x91"
+          "\x92\x93\x94\x95\x96\x97\x98\x99\x9a\x9b\x9c\x9d\x9e\x9f\xa0",
+          "\x53\x61\x6d\x70\x6c\x65\x20\x23\x34",
+          "\x9e\xa8\x86\xef\xe2\x68\xdb\xec\xce\x42\x0c\x75", 1, 72, NULL, 0 },
+        { 0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0 }
+};
diff --git a/test/kat-app/hmac_sha1_test.c b/test/kat-app/hmac_sha1_test.c
index 93766112..60d77e07 100644
--- a/test/kat-app/hmac_sha1_test.c
+++ b/test/kat-app/hmac_sha1_test.c
@@ -33,278 +33,16 @@
 #include <intel-ipsec-mb.h>
 #include "gcm_ctr_vectors_test.h"
 #include "utils.h"
+#include "mac_test.h"
 
 int hmac_sha1_test(struct IMB_MGR *mb_mgr);
 
 #define DIGEST96_SIZE 12
 #define MAX_BURST_JOBS 32
 
-/*
- * Test vectors from https://tools.ietf.org/html/rfc2202
- */
-
-/*
- * test_case =     1
- * key =           0x0b0b0b0b0b0b0b0b0b0b0b0b0b0b0b0b0b0b0b0b
- * key_len =       20
- * data =          "Hi There"
- * data_len =      8
- * digest =        0xb617318655057264e28bc0b6fb378c8ef146be00
- */
-#define test_case1  "1"
-#define key_len1    20
-#define data_len1   8
-#define digest_len1 IMB_SHA1_DIGEST_SIZE_IN_BYTES
-static const uint8_t key1[key_len1] = {
-        0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
-        0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
-        0x0b, 0x0b, 0x0b, 0x0b
-};
-static const char data1[] = "Hi There";
-static const uint8_t digest1[digest_len1] = {
-        0xb6, 0x17, 0x31, 0x86, 0x55, 0x05, 0x72, 0x64,
-        0xe2, 0x8b, 0xc0, 0xb6, 0xfb, 0x37, 0x8c, 0x8e,
-        0xf1, 0x46, 0xbe, 0x00
-};
-
-/*
- * test_case =     2
- * key =           "Jefe"
- * key_len =       4
- * data =          "what do ya want for nothing?"
- * data_len =      28
- * digest =        0xeffcdf6ae5eb2fa2d27416d5f184df9c259a7c79
- */
-#define test_case2  "2"
-#define key_len2    4
-#define data_len2   28
-#define digest_len2 IMB_SHA1_DIGEST_SIZE_IN_BYTES
-static const char key2[] = "Jefe";
-static const char data2[] = "what do ya want for nothing?";
-static const uint8_t digest2[digest_len2] = {
-        0xef, 0xfc, 0xdf, 0x6a, 0xe5, 0xeb, 0x2f, 0xa2,
-        0xd2, 0x74, 0x16, 0xd5, 0xf1, 0x84, 0xdf, 0x9c,
-        0x25, 0x9a, 0x7c, 0x79
-};
-
-/*
- * test_case =     3
- * key =           0xaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- * key_len =       20
- * data =          0xdd repeated 50 times
- * data_len =      50
- * digest =        0x125d7342b9ac11cd91a39af48aa17b4f63f175d3
- */
-#define test_case3  "3"
-#define key_len3    20
-#define data_len3   50
-#define digest_len3 IMB_SHA1_DIGEST_SIZE_IN_BYTES
-static const uint8_t key3[key_len3] = {
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa
-};
-static const uint8_t data3[data_len3] = {
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd
-};
-static const uint8_t digest3[digest_len3] = {
-        0x12, 0x5d, 0x73, 0x42, 0xb9, 0xac, 0x11, 0xcd,
-        0x91, 0xa3, 0x9a, 0xf4, 0x8a, 0xa1, 0x7b, 0x4f,
-        0x63, 0xf1, 0x75, 0xd3
-};
-
-/*
- * test_case =     4
- * key =           0x0102030405060708090a0b0c0d0e0f10111213141516171819
- * key_len =       25
- * data =          0xcd repeated 50 times
- * data_len =      50
- * digest =        0x4c9007f4026250c6bc8414f9bf50c86c2d7235da
- */
-#define test_case4  "4"
-#define key_len4    25
-#define data_len4   50
-#define digest_len4 IMB_SHA1_DIGEST_SIZE_IN_BYTES
-static const uint8_t key4[key_len4] = {
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10,
-        0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
-        0x19
-};
-static const uint8_t data4[data_len4] = {
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd
-};
-static const uint8_t digest4[digest_len4] = {
-        0x4c, 0x90, 0x07, 0xf4, 0x02, 0x62, 0x50, 0xc6,
-        0xbc, 0x84, 0x14, 0xf9, 0xbf, 0x50, 0xc8, 0x6c,
-        0x2d, 0x72, 0x35, 0xda
-};
-
-/*
- * test_case =     5
- * key =           0x0c0c0c0c0c0c0c0c0c0c0c0c0c0c0c0c0c0c0c0c
- * key_len =       20
- * data =          "Test With Truncation"
- * data_len =      20
- * digest =        0x4c1a03424b55e07fe7f27be1d58bb9324a9a5a04
- * digest-96 =     0x4c1a03424b55e07fe7f27be1
- */
-#define test_case5  "5"
-#define key_len5    20
-#define data_len5   20
-#define digest_len5 IMB_SHA1_DIGEST_SIZE_IN_BYTES
-static const uint8_t key5[key_len5] = {
-        0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
-        0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
-        0x0c, 0x0c, 0x0c, 0x0c
-};
-static const char data5[] = "Test With Truncation";
-static const uint8_t digest5[digest_len5] = {
-        0x4c, 0x1a, 0x03, 0x42, 0x4b, 0x55, 0xe0, 0x7f,
-        0xe7, 0xf2, 0x7b, 0xe1, 0xd5, 0x8b, 0xb9, 0x32,
-        0x4a, 0x9a, 0x5a, 0x04
-};
-
-#define test_case5_96  "5-96"
-#define key_len5_96    key_len5
-#define data_len5_96   data_len5
-#define digest_len5_96 DIGEST96_SIZE
-#define key5_96 key5
-#define data5_96 data5
-static const uint8_t digest5_96[digest_len5_96] = {
-        0x4c, 0x1a, 0x03, 0x42, 0x4b, 0x55, 0xe0, 0x7f,
-        0xe7, 0xf2, 0x7b, 0xe1
-};
-
-/*
- * test_case =     6
- * key =           0xaa repeated 80 times
- * key_len =       80
- * data =          "Test Using Larger Than Block-Size Key - Hash Key First"
- * data_len =      54
- * digest =        0xaa4ae5e15272d00e95705637ce8a3b55ed402112
- */
-#define test_case6  "6"
-#define key_len6    80
-#define data_len6   54
-#define digest_len6 IMB_SHA1_DIGEST_SIZE_IN_BYTES
-static const uint8_t key6[key_len6] = {
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-};
-static const char data6[] =
-        "Test Using Larger Than Block-Size Key - Hash Key First";
-static const uint8_t digest6[digest_len6] = {
-        0xaa, 0x4a, 0xe5, 0xe1, 0x52, 0x72, 0xd0, 0x0e,
-        0x95, 0x70, 0x56, 0x37, 0xce, 0x8a, 0x3b, 0x55,
-        0xed, 0x40, 0x21, 0x12
-};
-
-/*
- * test_case =     7
- * key =           0xaa repeated 80 times
- * key_len =       80
- * data =          "Test Using Larger Than Block-Size Key and Larger
- *         Than One Block-Size Data"
- * data_len =      73
- * digest =        0xe8e99d0f45237d786d6bbaa7965c7808bbff1a91
- */
-#define test_case7  "7"
-#define key_len7    80
-#define data_len7   73
-#define digest_len7 IMB_SHA1_DIGEST_SIZE_IN_BYTES
-static const uint8_t key7[key_len7] = {
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-};
-static const char data7[] =
-        "Test Using Larger Than Block-Size Key and "
-        "Larger Than One Block-Size Data";
-static const uint8_t digest7[digest_len7] = {
-        0xe8, 0xe9, 0x9d, 0x0f, 0x45, 0x23, 0x7d, 0x78,
-        0x6d, 0x6b, 0xba, 0xa7, 0x96, 0x5c, 0x78, 0x08,
-        0xbb, 0xff, 0x1a, 0x91
-};
-
-/*
- * Test vector from https://csrc.nist.gov/csrc/media/publications/fips/198/
- * archive/2002-03-06/documents/fips-198a.pdf
- */
-#define test_case8  "8"
-#define key_len8    49
-#define data_len8   9
-#define digest_len8 DIGEST96_SIZE
-static const uint8_t key8[key_len8] = {
-        0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
-        0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f,
-        0x80, 0x81, 0x82, 0x83, 0x84, 0x85, 0x86, 0x87,
-        0x88, 0x89, 0x8a, 0x8b, 0x8c, 0x8d, 0x8e, 0x8f,
-        0x90, 0x91, 0x92, 0x93, 0x94, 0x95, 0x96, 0x97,
-        0x98, 0x99, 0x9a, 0x9b, 0x9c, 0x9d, 0x9e, 0x9f,
-        0xa0
-};
-static const char data8[] = "Sample #4";
-static const uint8_t digest8[digest_len8] = {
-        0x9e, 0xa8, 0x86, 0xef, 0xe2, 0x68, 0xdb, 0xec,
-        0xce, 0x42, 0x0c, 0x75
-};
-
-#define HMAC_SHA1_TEST_VEC(num)                                         \
-        { test_case##num,                                               \
-                        (const uint8_t *) key##num, key_len##num,       \
-                        (const uint8_t *) data##num, data_len##num,     \
-                        (const uint8_t *) digest##num, digest_len##num }
-
-static const struct hmac_sha1_rfc2202_vector {
-        const char *test_case;
-        const uint8_t *key;
-        uint32_t key_len;
-        const uint8_t *data;
-        size_t data_len;
-        const uint8_t *digest;
-        size_t digest_len;
-} hmac_sha1_vectors[] = {
-        HMAC_SHA1_TEST_VEC(1),
-        HMAC_SHA1_TEST_VEC(2),
-        HMAC_SHA1_TEST_VEC(3),
-        HMAC_SHA1_TEST_VEC(4),
-        HMAC_SHA1_TEST_VEC(5),
-        HMAC_SHA1_TEST_VEC(5_96),
-        HMAC_SHA1_TEST_VEC(6),
-        HMAC_SHA1_TEST_VEC(7),
-        HMAC_SHA1_TEST_VEC(8)
-};
-
+extern const struct mac_test hmac_sha1_test_kat_json[];
 static int
-hmac_sha1_job_ok(const struct hmac_sha1_rfc2202_vector *vec,
+hmac_sha1_job_ok(const struct mac_test *vec,
                  const struct IMB_JOB *job,
                  const uint8_t *auth,
                  const uint8_t *padding,
@@ -316,11 +54,11 @@ hmac_sha1_job_ok(const struct hmac_sha1_rfc2202_vector *vec,
         }
 
         /* hash checks */
-        if (memcmp(padding, &auth[sizeof_padding + vec->digest_len],
+        if (memcmp(padding, &auth[sizeof_padding + vec->tagSize],
                    sizeof_padding)) {
                 printf("hash overwrite tail\n");
                 hexdump(stderr, "Target",
-                        &auth[sizeof_padding + vec->digest_len],
+                        &auth[sizeof_padding + vec->tagSize],
                         sizeof_padding);
                 return 0;
         }
@@ -331,13 +69,13 @@ hmac_sha1_job_ok(const struct hmac_sha1_rfc2202_vector *vec,
                 return 0;
         }
 
-        if (memcmp(vec->digest, &auth[sizeof_padding],
-                   vec->digest_len)) {
+        if (memcmp(vec->tag, &auth[sizeof_padding],
+                   vec->tagSize)) {
                 printf("hash mismatched\n");
                 hexdump(stderr, "Received", &auth[sizeof_padding],
-                        vec->digest_len);
-                hexdump(stderr, "Expected", vec->digest,
-                        vec->digest_len);
+                        vec->tagSize);
+                hexdump(stderr, "Expected", vec->tag,
+                        vec->tagSize);
                 return 0;
         }
         return 1;
@@ -345,7 +83,7 @@ hmac_sha1_job_ok(const struct hmac_sha1_rfc2202_vector *vec,
 
 static int
 test_hmac_sha1(struct IMB_MGR *mb_mgr,
-               const struct hmac_sha1_rfc2202_vector *vec,
+               const struct mac_test *vec,
                const uint32_t num_jobs)
 {
         struct IMB_JOB *job;
@@ -366,7 +104,7 @@ test_hmac_sha1(struct IMB_MGR *mb_mgr,
 
         for (i = 0; i < num_jobs; i++) {
                 const size_t alloc_len =
-                        vec->digest_len + (sizeof(padding) * 2);
+                        vec->tagSize + (sizeof(padding) * 2);
 
                 auths[i] = malloc(alloc_len);
                 if (auths[i] == NULL) {
@@ -377,7 +115,7 @@ test_hmac_sha1(struct IMB_MGR *mb_mgr,
         }
 
         imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_1,
-                           vec->key, vec->key_len, ipad_hash, opad_hash);
+                           vec->key, vec->keySize, ipad_hash, opad_hash);
 
         for (i = 0; i < num_jobs; i++) {
                 job = IMB_GET_NEXT_JOB(mb_mgr);
@@ -388,14 +126,14 @@ test_hmac_sha1(struct IMB_MGR *mb_mgr,
                 job->dst = NULL;
                 job->key_len_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = vec->digest_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize;
                 job->iv = NULL;
                 job->iv_len_in_bytes = 0;
-                job->src = vec->data;
+                job->src = (const void *) vec->msg;
                 job->cipher_start_src_offset_in_bytes = 0;
                 job->msg_len_to_cipher_in_bytes = 0;
                 job->hash_start_src_offset_in_bytes = 0;
-                job->msg_len_to_hash_in_bytes = vec->data_len;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->u.HMAC._hashed_auth_key_xor_ipad = ipad_hash;
                 job->u.HMAC._hashed_auth_key_xor_opad = opad_hash;
                 job->cipher_mode = IMB_CIPHER_NULL;
@@ -453,7 +191,7 @@ test_hmac_sha1(struct IMB_MGR *mb_mgr,
 
 static int
 test_hmac_sha1_burst(struct IMB_MGR *mb_mgr,
-                     const struct hmac_sha1_rfc2202_vector *vec,
+                     const struct mac_test *vec,
                      const uint32_t num_jobs)
 {
         struct IMB_JOB *job, *jobs[MAX_BURST_JOBS] = {NULL};
@@ -475,7 +213,7 @@ test_hmac_sha1_burst(struct IMB_MGR *mb_mgr,
 
         for (i = 0; i < num_jobs; i++) {
                 const size_t alloc_len =
-                        vec->digest_len + (sizeof(padding) * 2);
+                        vec->tagSize + (sizeof(padding) * 2);
 
                 auths[i] = malloc(alloc_len);
                 if (auths[i] == NULL) {
@@ -486,7 +224,7 @@ test_hmac_sha1_burst(struct IMB_MGR *mb_mgr,
         }
 
         imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_1,
-                           vec->key, vec->key_len, ipad_hash, opad_hash);
+                           vec->key, vec->keySize, ipad_hash, opad_hash);
 
         while (IMB_GET_NEXT_BURST(mb_mgr, num_jobs, jobs) < num_jobs)
                 IMB_FLUSH_BURST(mb_mgr, num_jobs, jobs);
@@ -500,14 +238,14 @@ test_hmac_sha1_burst(struct IMB_MGR *mb_mgr,
                 job->dst = NULL;
                 job->key_len_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = vec->digest_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize;
                 job->iv = NULL;
                 job->iv_len_in_bytes = 0;
-                job->src = vec->data;
+                job->src = (const void *) vec->msg;
                 job->cipher_start_src_offset_in_bytes = 0;
                 job->msg_len_to_cipher_in_bytes = 0;
                 job->hash_start_src_offset_in_bytes = 0;
-                job->msg_len_to_hash_in_bytes = vec->data_len;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->u.HMAC._hashed_auth_key_xor_ipad = ipad_hash;
                 job->u.HMAC._hashed_auth_key_xor_opad = opad_hash;
                 job->cipher_mode = IMB_CIPHER_NULL;
@@ -570,7 +308,7 @@ check_burst_jobs:
 
 static int
 test_hmac_sha1_hash_burst(struct IMB_MGR *mb_mgr,
-                          const struct hmac_sha1_rfc2202_vector *vec,
+                          const struct mac_test *vec,
                           const uint32_t num_jobs)
 {
         struct IMB_JOB *job, jobs[MAX_BURST_JOBS] = {0};
@@ -592,7 +330,7 @@ test_hmac_sha1_hash_burst(struct IMB_MGR *mb_mgr,
 
         for (i = 0; i < num_jobs; i++) {
                 const size_t alloc_len =
-                        vec->digest_len + (sizeof(padding) * 2);
+                        vec->tagSize + (sizeof(padding) * 2);
 
                 auths[i] = malloc(alloc_len);
                 if (auths[i] == NULL) {
@@ -603,7 +341,7 @@ test_hmac_sha1_hash_burst(struct IMB_MGR *mb_mgr,
         }
 
         imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_HMAC_SHA_1,
-                           vec->key, vec->key_len, ipad_hash, opad_hash);
+                           vec->key, vec->keySize, ipad_hash, opad_hash);
 
         for (i = 0; i < num_jobs; i++) {
                 job = &jobs[i];
@@ -614,14 +352,14 @@ test_hmac_sha1_hash_burst(struct IMB_MGR *mb_mgr,
                 job->dst = NULL;
                 job->key_len_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = vec->digest_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize;
                 job->iv = NULL;
                 job->iv_len_in_bytes = 0;
-                job->src = vec->data;
+                job->src = (const void *) vec->msg;
                 job->cipher_start_src_offset_in_bytes = 0;
                 job->msg_len_to_cipher_in_bytes = 0;
                 job->hash_start_src_offset_in_bytes = 0;
-                job->msg_len_to_hash_in_bytes = vec->data_len;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->u.HMAC._hashed_auth_key_xor_ipad = ipad_hash;
                 job->u.HMAC._hashed_auth_key_xor_opad = opad_hash;
                 job->cipher_mode = IMB_CIPHER_NULL;
@@ -685,47 +423,50 @@ test_hmac_sha1_std_vectors(struct IMB_MGR *mb_mgr,
                            const uint32_t num_jobs,
                            struct test_suite_context *ts)
 {
-	const int vectors_cnt = DIM(hmac_sha1_vectors);
-	int vect;
-
+        const struct mac_test *v = hmac_sha1_test_kat_json;
+	int vectors_cnt;
+        /* Calculate vectors_cnt */
+        for (vectors_cnt = 0; v->msg != NULL; vectors_cnt++, v++)
+                ;
+        v -= vectors_cnt;
 	printf("HMAC-SHA1 standard test vectors (N jobs = %u):\n", num_jobs);
-	for (vect = 1; vect <= vectors_cnt; vect++) {
-                const int idx = vect - 1;
-
+	while (v->msg != NULL) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("[%d/%d] RFC2202 Test Case %s key_len:%d "
-                               "data_len:%d digest_len:%d\n",
-                               vect, vectors_cnt,
-                               hmac_sha1_vectors[idx].test_case,
-                               (int) hmac_sha1_vectors[idx].key_len,
-                               (int) hmac_sha1_vectors[idx].data_len,
-                               (int) hmac_sha1_vectors[idx].digest_len);
+                        printf("[%lu/%lu] RFC2202 Test Case %lu keySize:%lu "
+                               "msgSize:%lu tagSize:%lu\n",
+                               v->tcId, vectors_cnt,
+                               v->tcId,
+                               v->keySize,
+                               v->msgSize / 8,
+                               v->tagSize);
 #else
                         printf(".");
 #endif
                 }
 
-                if (test_hmac_sha1(mb_mgr, &hmac_sha1_vectors[idx], num_jobs)) {
-                        printf("error #%d\n", vect);
+                if (test_hmac_sha1(mb_mgr, v, num_jobs)) {
+                        printf("error #%lu\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
                 }
-                if (test_hmac_sha1_burst(mb_mgr, &hmac_sha1_vectors[idx],
+                if (test_hmac_sha1_burst(mb_mgr, v,
                                          num_jobs)) {
-                        printf("error #%d - burst API\n", vect);
+                        printf("error #%lu - burst API\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
                 }
-                if (test_hmac_sha1_hash_burst(mb_mgr, &hmac_sha1_vectors[idx],
+                if (test_hmac_sha1_hash_burst(mb_mgr, v,
                                               num_jobs)) {
-                        printf("error #%d - hash-only burst API\n", vect);
+                        printf("error #%lu - hash-only burst API\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
                 }
+
+                v++;
 	}
         if (!quiet_mode)
                 printf("\n");
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index 596039b0..56240e4a 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
-- 
GitLab


From 45ccdb169beee563c3bf535d19a5c117cea7fdfb Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 5 Apr 2023 13:09:16 +0100
Subject: [PATCH 210/332] lib: [build] improve clean target to always remove
 all build files

---
 lib/Makefile | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/lib/Makefile b/lib/Makefile
index 2994affc..bef57767 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -52,6 +52,9 @@ NASM ?= nasm
 
 CC ?= gcc
 
+OBJ_DIR ?= obj
+LIB_DIR ?= .
+
 # skip version detection with clean or style target
 ifneq ($(MAKECMDGOALS),clean)
 ifneq ($(MAKECMDGOALS),style)
@@ -100,9 +103,6 @@ $(warning Minimum required NASM version for AVX-IFMA: $(NASM_MAJOR_AVX_IFMA).$(N
 AVX_IFMA := n
 endif # NASM_AVX_IFMA_GET_REQ
 
-OBJ_DIR ?= obj
-LIB_DIR ?= .
-
 INCLUDE_DIRS := include . no-aesni
 INCLUDES := $(foreach i,$(INCLUDE_DIRS),-I $i)
 
@@ -1045,10 +1045,9 @@ TAGS:
 
 .PHONY: clean
 clean:
-	rm -Rf $(target_obj_files)
-	rm -Rf $(dep_target_files)
-	rm -f $(LIB_DIR)/$(LIB)_lnk.def
-	rm -f $(LIB_DIR)/$(LIB).a $(LIB_DIR)/$(LIB).so* $(LIB_DIR)/$(LIB).dll
+	-rm -Rf $(OBJ_DIR)
+	-rm -f $(LIB_DIR)/$(LIB)_lnk.def
+	-rm -f $(LIB_DIR)/$(LIB).a $(LIB_DIR)/$(LIB).so* $(LIB_DIR)/$(LIB).dll
 
 .PHONY: doxy
 doxy:
-- 
GitLab


From b86f90aef85403b1a9ebeed0c91180badd7f14d3 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 5 Apr 2023 13:47:09 +0100
Subject: [PATCH 211/332] build: [perf] clean dependency files and remove
 reference to library internal include directory

---
 perf/Makefile | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/perf/Makefile b/perf/Makefile
index 911375f6..b7980e03 100644
--- a/perf/Makefile
+++ b/perf/Makefile
@@ -1,4 +1,4 @@
-# Copyright (c) 2017-2022, Intel Corporation
+# Copyright (c) 2017-2023, Intel Corporation
 # 
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
@@ -74,7 +74,7 @@ ifeq ("$(shell test -e $(INSTPATH) && echo -n yes)","yes")
 CFLAGS +=
 else
 # library not installed
-CFLAGS +=  -I../lib/include -I../lib
+CFLAGS += -I../lib
 LDFLAGS += -L$(LIB_DIR)
 endif
 
@@ -93,6 +93,7 @@ endif
 SOURCES := ipsec_perf.c msr.c
 ASM_SOURCES := misc.asm
 OBJECTS := $(SOURCES:%.c=%.o) $(ASM_SOURCES:%.asm=%.o)
+DEPFILES := $(OBJECTS:%.o=%.d)
 
 CHECKPATCH ?= checkpatch.pl
 CPPCHECK ?= cppcheck
@@ -112,11 +113,10 @@ all: $(EXE)
 $(EXE): $(OBJECTS)
 	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
 
-ipsec_perf.o: $(SOURCES)
-
 .PHONY: clean
 clean:
 	-rm -f $(OBJECTS)
+	-rm -f $(DEPFILES)
 	-rm -f $(EXE)
 
 SOURCES_STYLE := $(foreach infile,$(SOURCES),-f $(infile))
-- 
GitLab


From d61889460988be638c800f1a5d5d958031d8c804 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 5 Apr 2023 13:48:12 +0100
Subject: [PATCH 212/332] build: [test] put object binary of shared utils
 module into local directory

---
 test/acvp-app/Makefile   | 5 ++++-
 test/kat-app/Makefile    | 8 +++++---
 test/xvalid-app/Makefile | 7 +++++--
 3 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/test/acvp-app/Makefile b/test/acvp-app/Makefile
index be3e5629..90d1c102 100644
--- a/test/acvp-app/Makefile
+++ b/test/acvp-app/Makefile
@@ -38,7 +38,7 @@ ACVP_LDFLAGS = -L$(ACVP_LIB) $(LDFLAGS)
 ACVP_LDLIBS = -lacvp $(LDLIBS)
 
 # acvp_app modules
-ACVP_SOURCES := acvp_app_main.c ../common/utils.c
+ACVP_SOURCES := acvp_app_main.c utils.o
 
 # targets come here
 all: $(APP)
@@ -50,6 +50,9 @@ else
 	@echo "No libacvp header found at $(ACVP_HDR), $(APP) is not built"
 endif
 
+utils.o: ../common/utils.c
+	$(CC) -c $(CFLAGS) $< -o $@
+
 .PHONY: clean
 clean:
 	-rm -f $(DEP_FILES) $(APP)
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index 1cab26b8..7cc8e042 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -37,9 +37,8 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	ecb_test.c zuc_test.c kasumi_test.c snow3g_test.c direct_api_test.c clear_mem_test.c \
 	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
-	hmac_sha1.json.c \
-	../common/utils.c 
-OBJECTS := $(SOURCES:%.c=%.o)
+	hmac_sha1.json.c
+OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
 # targets come here
 all: $(APP)
@@ -47,6 +46,9 @@ all: $(APP)
 $(APP): $(OBJECTS)
 	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
 
+utils.o: ../common/utils.c
+	$(CC) -c $(CFLAGS) $< -o $@
+
 .PHONY: clean
 clean:
 	-rm -f $(OBJECTS) $(APP) $(DEP_FILES)
diff --git a/test/xvalid-app/Makefile b/test/xvalid-app/Makefile
index 7eed05ff..0a852b96 100644
--- a/test/xvalid-app/Makefile
+++ b/test/xvalid-app/Makefile
@@ -32,8 +32,8 @@ include ../common/common.mk
 
 # imb-xvalid modules
 ASM := misc.asm
-SOURCES := ipsec_xvalid.c ../common/utils.c
-OBJECTS := $(SOURCES:%.c=%.o) $(ASM:%.asm=%.o)
+SOURCES := ipsec_xvalid.c
+OBJECTS := $(SOURCES:%.c=%.o) $(ASM:%.asm=%.o) utils.o
 
 # rule for compiling assembly code with producing dependencies
 %.o:%.asm
@@ -53,6 +53,9 @@ all: $(APP)
 $(APP): $(OBJECTS)
 	$(CC) $(LDFLAGS) $^ $(LDLIBS) -o $@
 
+utils.o: ../common/utils.c
+	$(CC) -c $(CFLAGS) $< -o $@
+
 .PHONY: clean
 clean:
 	-rm -f $(DEP_FILES) $(OBJECTS) $(APP) $(ASM_OBJECTS)
-- 
GitLab


From 519a5c360556fb0138d4f2116e7e34a3cdba6cd4 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 5 Apr 2023 15:49:53 +0100
Subject: [PATCH 213/332] cmake: add version to library SO name

---
 CMakeLists.txt     | 9 ++++++++-
 lib/CMakeLists.txt | 6 ++++++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index bcfb61c6..c48e95d3 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -28,8 +28,15 @@ set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Set default build to release")
 set(CMAKE_C_FLAGS_RELEASE "" CACHE STRING "Clear default release build C Compiler Flags" FORCE)
 set(CMAKE_C_FLAGS_DEBUG "" CACHE STRING "Clear default debug build C Compiler Flags" FORCE)
 
+# get version from public header file
+set(IMB_HDR "${CMAKE_CURRENT_SOURCE_DIR}/lib/intel-ipsec-mb.h")
+file(STRINGS ${IMB_HDR} VER_STR REGEX "^.*IMB_VERSION_STR.*$")
+string(REGEX MATCH "[0-9]+.[0-9]+.[0-9]+" IPSEC_MB_VERSION ${VER_STR})
+message(STATUS "Project Version: ${IPSEC_MB_VERSION}")
+
 cmake_minimum_required(VERSION 3.16)
-project(intel-ipsec-mb VERSION 1.3.0 DESCRIPTION "Intel(R) IPSec Multi-Buffer library")
+project(intel-ipsec-mb VERSION ${IPSEC_MB_VERSION}
+    DESCRIPTION "Intel(R) IPsec Multi-Buffer library")
 
 # flag to force full project build
 set(FULL_PROJECT_BUILD TRUE)
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index 7334ccf8..f32cc021 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -219,6 +219,12 @@ set(CAN_USE_ASSEMBLER 1)
 ########################################
 # add library target
 ########################################
+string(REPLACE "." ";" VERSION_LIST ${IPSEC_MB_VERSION})
+list(GET VERSION_LIST 0 SO_MAJOR_VER)
+
 add_library(${LIB} ${SRC_FILES_ASM} ${SRC_FILES_C} ${SRC_DEF_FILE})
+set_target_properties(${LIB} PROPERTIES
+  VERSION ${IPSEC_MB_VERSION}
+  SOVERSION ${SO_MAJOR_VER})
 target_include_directories(${LIB} PRIVATE ${DIR_CURRENT} ${DIR_INCLUDE} ${DIR_NO_AESNI})
 
-- 
GitLab


From 7f0ec41461593b2e17e89b46b908148092cd5b92 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 5 Apr 2023 16:42:27 +0000
Subject: [PATCH 214/332] cmake: add library installation support

---
 lib/CMakeLists.txt      | 34 ++++++++++++++--------------------
 lib/cmake/unix.cmake    | 22 ++++++++++++++++++++++
 lib/cmake/windows.cmake | 25 +++++++++++++++++++++++++
 3 files changed, 61 insertions(+), 20 deletions(-)

diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index f32cc021..d4cc2b7e 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -191,7 +191,18 @@ if(AVX_IFMA)
   list(APPEND LIB_DEFINES AVX_IFMA)
 endif()
 
+########################################
+# setup NASM
+########################################
+enable_language(ASM_NASM)
+if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
+  message(FATAL_ERROR "Can't find assembler")
+endif()
+set(CAN_USE_ASSEMBLER 1)
+
+########################################
 # add OS specific options
+########################################
 if(CMAKE_HOST_UNIX)
   include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/unix.cmake)
 else()
@@ -207,24 +218,7 @@ foreach(FILE ${SRC_FILES_C})
     COMPILE_DEFINITIONS "${LIB_DEFINES}")
 endforeach()
 
-########################################
-# setup NASM
-########################################
-enable_language(ASM_NASM)
-if(NOT CMAKE_ASM_NASM_COMPILER_LOADED)
-  message(FATAL_ERROR "Can't find assembler")
-endif()
-set(CAN_USE_ASSEMBLER 1)
-
-########################################
-# add library target
-########################################
-string(REPLACE "." ";" VERSION_LIST ${IPSEC_MB_VERSION})
-list(GET VERSION_LIST 0 SO_MAJOR_VER)
-
-add_library(${LIB} ${SRC_FILES_ASM} ${SRC_FILES_C} ${SRC_DEF_FILE})
-set_target_properties(${LIB} PROPERTIES
-  VERSION ${IPSEC_MB_VERSION}
-  SOVERSION ${SO_MAJOR_VER})
-target_include_directories(${LIB} PRIVATE ${DIR_CURRENT} ${DIR_INCLUDE} ${DIR_NO_AESNI})
+# add include directories
+target_include_directories(${LIB} PRIVATE
+  ${DIR_CURRENT} ${DIR_INCLUDE} ${DIR_NO_AESNI})
 
diff --git a/lib/cmake/unix.cmake b/lib/cmake/unix.cmake
index 3aa78757..efa9d42b 100644
--- a/lib/cmake/unix.cmake
+++ b/lib/cmake/unix.cmake
@@ -84,3 +84,25 @@ if(AESNI_EMU)
     "-march=nehalem -mno-pclmul")
 endif()
 
+########################################
+# add library target
+########################################
+
+add_library(${LIB} ${SRC_FILES_ASM} ${SRC_FILES_C})
+
+# set library SO version
+string(REPLACE "." ";" VERSION_LIST ${IPSEC_MB_VERSION})
+list(GET VERSION_LIST 0 SO_MAJOR_VER)
+set_target_properties(${LIB} PROPERTIES
+  VERSION ${IPSEC_MB_VERSION}
+  SOVERSION ${SO_MAJOR_VER})
+
+# set install rules
+set(CMAKE_INSTALL_PREFIX "/usr"
+  CACHE STRING "Set default installation directory" FORCE)
+install(TARGETS ${LIB} DESTINATION lib)
+install(FILES ${IMB_HDR} DESTINATION include)
+install(FILES ${CMAKE_CURRENT_SOURCE_DIR}/libipsec-mb.7
+              ${CMAKE_CURRENT_SOURCE_DIR}/libipsec-mb-dev.7
+              DESTINATION man/man7)
+
diff --git a/lib/cmake/windows.cmake b/lib/cmake/windows.cmake
index 02065bea..6bd58995 100644
--- a/lib/cmake/windows.cmake
+++ b/lib/cmake/windows.cmake
@@ -83,6 +83,31 @@ else()
   set(GEN_DEF_FILE_CMD "findstr /v ${STR_FILTER} ${LIB}.def > ${SRC_DEF_FILE}")
 endif()
 
+########################################
+# add library target
+########################################
+
+add_library(${LIB} ${SRC_FILES_ASM} ${SRC_FILES_C} ${SRC_DEF_FILE})
+
+# set install rules
+set(CMAKE_INSTALL_PREFIX "c:/Program Files"
+  CACHE STRING "Set default installation directory" FORCE)
+install(TARGETS ${LIB}
+  DESTINATION ${CMAKE_INSTALL_PREFIX}/${CMAKE_PROJECT_NAME})
+install(FILES
+  ${IMB_HDR}
+  ${SRC_DEF_FILE}
+  DESTINATION ${CMAKE_INSTALL_PREFIX}/${CMAKE_PROJECT_NAME})
+if(BUILD_SHARED_LIBS)
+  install(FILES
+    $<TARGET_FILE_DIR:${LIB}>/${LIB}.exp
+    $<TARGET_FILE_DIR:${LIB}>/${LIB}.pdb
+    DESTINATION ${CMAKE_INSTALL_PREFIX}/${CMAKE_PROJECT_NAME})
+  install(FILES
+    $<TARGET_FILE_DIR:${LIB}>/${LIB}.dll
+    DESTINATION $ENV{WINDIR}/system32)
+endif()
+
 execute_process(
   COMMAND cmd /C ${GEN_DEF_FILE_CMD}
   WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
-- 
GitLab


From 3a91c4d7c7e59aab1deab503cb94a61a998926e7 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 6 Apr 2023 13:56:09 +0100
Subject: [PATCH 215/332] cmake: use full version string for library SO name

---
 CMakeLists.txt       | 5 +++--
 lib/cmake/unix.cmake | 2 +-
 2 files changed, 4 insertions(+), 3 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index c48e95d3..c7820c61 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -31,8 +31,9 @@ set(CMAKE_C_FLAGS_DEBUG "" CACHE STRING "Clear default debug build C Compiler Fl
 # get version from public header file
 set(IMB_HDR "${CMAKE_CURRENT_SOURCE_DIR}/lib/intel-ipsec-mb.h")
 file(STRINGS ${IMB_HDR} VER_STR REGEX "^.*IMB_VERSION_STR.*$")
-string(REGEX MATCH "[0-9]+.[0-9]+.[0-9]+" IPSEC_MB_VERSION ${VER_STR})
-message(STATUS "Project Version: ${IPSEC_MB_VERSION}")
+string(REGEX MATCH "[0-9]+.[0-9]+.[0-9]+(-[a-z]+)?" IPSEC_MB_VERSION_FULL ${VER_STR})
+string(REGEX MATCH "[0-9]+.[0-9]+.[0-9]+" IPSEC_MB_VERSION ${IPSEC_MB_VERSION_FULL})
+message(STATUS "Project Version: ${IPSEC_MB_VERSION_FULL}")
 
 cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb VERSION ${IPSEC_MB_VERSION}
diff --git a/lib/cmake/unix.cmake b/lib/cmake/unix.cmake
index efa9d42b..6e171101 100644
--- a/lib/cmake/unix.cmake
+++ b/lib/cmake/unix.cmake
@@ -94,7 +94,7 @@ add_library(${LIB} ${SRC_FILES_ASM} ${SRC_FILES_C})
 string(REPLACE "." ";" VERSION_LIST ${IPSEC_MB_VERSION})
 list(GET VERSION_LIST 0 SO_MAJOR_VER)
 set_target_properties(${LIB} PROPERTIES
-  VERSION ${IPSEC_MB_VERSION}
+  VERSION ${IPSEC_MB_VERSION_FULL}
   SOVERSION ${SO_MAJOR_VER})
 
 # set install rules
-- 
GitLab


From 8b842af8b2e35df71a430702fe754d5176912f71 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 6 Apr 2023 14:41:27 +0100
Subject: [PATCH 216/332] cmake: add custom uninstall target

---
 CMakeLists.txt               | 11 +++++++++
 lib/cmake/uninstall.cmake.in | 47 ++++++++++++++++++++++++++++++++++++
 2 files changed, 58 insertions(+)
 create mode 100644 lib/cmake/uninstall.cmake.in

diff --git a/CMakeLists.txt b/CMakeLists.txt
index c7820c61..87be342a 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -1,4 +1,5 @@
 # Copyright (c) 2022, Intel Corporation
+# Copyright 2000-2023 Kitware, Inc. and Contributors
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
@@ -56,3 +57,13 @@ add_subdirectory(perf)
 
 # build test applications
 add_subdirectory(test)
+
+# add custom target to uninstall library
+configure_file(
+    "${CMAKE_CURRENT_SOURCE_DIR}/lib/cmake/uninstall.cmake.in"
+    "${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake"
+    IMMEDIATE @ONLY)
+
+add_custom_target(uninstall
+    COMMAND ${CMAKE_COMMAND} -P ${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake)
+
diff --git a/lib/cmake/uninstall.cmake.in b/lib/cmake/uninstall.cmake.in
new file mode 100644
index 00000000..7e2ca54c
--- /dev/null
+++ b/lib/cmake/uninstall.cmake.in
@@ -0,0 +1,47 @@
+# Copyright (c) 2023, Intel Corporation
+# Copyright 2000-2023 Kitware, Inc. and Contributors
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+if(NOT EXISTS "@CMAKE_BINARY_DIR@/install_manifest.txt")
+  message(FATAL_ERROR "No install manifest found!")
+endif()
+
+file(READ "@CMAKE_BINARY_DIR@/install_manifest.txt" installed_files)
+string(REPLACE "\n" ";" installed_files "${installed_files}")
+foreach(install_file ${installed_files})
+  message(STATUS "Removing ${install_file}")
+  if(IS_SYMLINK "${install_file}" OR EXISTS "${install_file}")
+    exec_program(
+      "@CMAKE_COMMAND@" ARGS
+      "-E remove \"${install_file}\""
+      RETURN_VALUE retval
+      OUTPUT_VARIABLE out)
+    if(NOT "${retval}" STREQUAL 0)
+      message(FATAL_ERROR "Error removing ${install_file}")
+    endif()
+  else()
+    message(STATUS "${install_file} does not exist.")
+  endif()
+endforeach()
-- 
GitLab


From 2617d78cbe6223ac4765487afa624a4cdedbe405 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 6 Apr 2023 16:03:20 +0100
Subject: [PATCH 217/332] cmake: update README with install instructions

---
 README.md | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/README.md b/README.md
index b3ae69b9..06b1a16d 100644
--- a/README.md
+++ b/README.md
@@ -655,6 +655,37 @@ If there is no need to run ldconfig at install stage please use NOLDCONFIG=y opt
 If library was compiled as an archive (not a default option) then install it using SHARED=n option:   
 `> sudo gmake install SHARED=n`
 
+Installing with CMake (experimental)
+-------------------
+
+### Unix (Linux and FreeBSD)
+
+First compile the library and then install:   
+```
+cmake --build .
+sudo cmake --install .
+```
+
+To uninstall the library run:   
+`sudo cmake --build . --target uninstall`
+
+If you want to change install location then define PREFIX:   
+`sudo cmake --install . --prefix=<path>`
+
+### Windows (x64 only)
+
+First compile the library and then install from a command prompt in administrator mode:   
+```
+cmake --build . --config Release
+cmake --install . --config Release
+```
+
+To uninstall the library run:   
+`cmake --build . --target uninstall`
+
+If you want to change install location then define PREFIX (default C:\Program Files):   
+`cmake --install . --config Release --prefix=<path>`
+
 9\. Backwards compatibility
 ===========================
 
-- 
GitLab


From d388d05da55d82b18aa1d1bb0eb592e1c44436da Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 5 Apr 2023 12:53:27 +0100
Subject: [PATCH 218/332] lib: add atomic increment function

---
 lib/Makefile              |  1 +
 lib/include/arch_x86_64.h | 11 +++++++
 lib/win_x64.mak           |  1 +
 lib/x86_64/atomic.asm     | 61 +++++++++++++++++++++++++++++++++++++++
 4 files changed, 74 insertions(+)
 create mode 100644 lib/x86_64/atomic.asm

diff --git a/lib/Makefile b/lib/Makefile
index bef57767..9cd75155 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -360,6 +360,7 @@ asm_generic_lib_objs := \
 	poly1305.o \
 	chacha20_poly1305.o \
 	mbcpuid.o \
+	atomic.o
 
 #
 # List of ASM modules (no-aesni directory)
diff --git a/lib/include/arch_x86_64.h b/lib/include/arch_x86_64.h
index 5fecfdb6..e4bdce20 100644
--- a/lib/include/arch_x86_64.h
+++ b/lib/include/arch_x86_64.h
@@ -132,4 +132,15 @@ void docsis_des_dec_basic(const void *input, void *output, const int size,
  */
 IMB_DLL_LOCAL int self_test(IMB_MGR *p_mgr);
 
+/**
+ * @brief Atomic 64-bit counter increment
+ *
+ * This implements counter post increment.
+ *
+ * @param counter pointer to a 64-bit counter
+ *
+ * @return Counter value prior to increment
+ */
+IMB_DLL_LOCAL uint64_t atomic_uint64_inc(uint64_t *counter);
+
 #endif /* IMB_ARCH_X86_64_H */
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index bc975ff1..63751483 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -220,6 +220,7 @@ lib_objs1 = \
 	$(OBJ_DIR)\md5_x8x2_avx2.obj \
 	$(OBJ_DIR)\save_xmms.obj \
 	$(OBJ_DIR)\mbcpuid.obj \
+	$(OBJ_DIR)\atomic.obj \
 	$(OBJ_DIR)\clear_regs_mem_fns.obj \
 	$(OBJ_DIR)\sha1_x4_avx.obj \
 	$(OBJ_DIR)\sha1_x4_sse.obj \
diff --git a/lib/x86_64/atomic.asm b/lib/x86_64/atomic.asm
new file mode 100644
index 00000000..af6a191c
--- /dev/null
+++ b/lib/x86_64/atomic.asm
@@ -0,0 +1,61 @@
+;;
+;; Copyright (c) 2023, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+
+;; function to wrap cpuid opcode across OS versions
+%include "include/os.inc"
+%include "include/reg_sizes.inc"
+
+%ifdef LINUX
+%define arg1		rdi
+%define arg2	        rsi
+%define arg3            rdx
+%else
+%define arg1		rcx
+%define arg2	        rdx
+%define arg3            r8
+%endif
+
+mksection .text
+
+;;
+;; Post-increment atomic 64-bit increment
+;;
+;; Parameters:
+;;    [in] counter - pointer to a 64-bit counter
+;;
+;; uint64_t atomic_uint64_inc(uint64_t *counter)
+
+MKGLOBAL(atomic_uint64_inc,function,internal)
+atomic_uint64_inc:
+        mov             rax, [arg1]
+atomic_uint64_loop:
+        lea             r11, [rax + 1]
+        lock cmpxchg    [arg1], r11             ;; compare counter against RAX, if not changed then store R11 in to counter
+        jnz             atomic_uint64_loop      ;; if counter changed between load and cmpxchg then load counter into RAX & try again
+        ret                                     ;; return current counter value through RAX
+
+mksection stack-noexec
-- 
GitLab


From 4ba11f3e82710ff769d305b320dc4c406645ea27 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 4 Apr 2023 11:50:09 +0100
Subject: [PATCH 219/332] lib: [JOB] replaced imb_set_cipher_suite_id() with
 imb_set_session()

Session ID field has been added to the JOB structure:
- 32-bit field to uniquely identify a session and optimize
  application JOB structure set up for crypto operation for
  BURST and JOB API use
- atomic 64-bit counter used to produce different ID for every call
  with the same session parameters

Session ID calculation has been added to existing imb_cipher_suite_id() function and
the function has been consequently renamed to imb_set_session()
---
 lib/intel-ipsec-mb.h                   | 48 +++++++++++++-----
 lib/libIPSec_MB.def                    |  2 +-
 lib/x86_64/cipher_suite_id.c           | 39 +++++++++++++--
 perf/ipsec_perf.c                      | 27 ++++++----
 test/kat-app/aes_test.c                |  2 +-
 test/kat-app/api_test.c                | 68 +++++++++++++-------------
 test/kat-app/chacha20_poly1305_test.c  |  2 +-
 test/kat-app/ctr_test.c                |  2 +-
 test/kat-app/gcm_test.c                |  2 +-
 test/kat-app/hmac_sha1_test.c          |  2 +-
 test/kat-app/hmac_sha256_sha512_test.c |  2 +-
 11 files changed, 129 insertions(+), 67 deletions(-)

diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 3580d4fb..30398d54 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2012-2022, Intel Corporation
+  Copyright (c) 2012-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
@@ -661,7 +661,8 @@ typedef struct IMB_JOB {
                 } CBCS; /**< CBCS specific fields */
         } cipher_fields; /**< Cipher algorithm-specific fields */
 
-        void *suite_id[4]; /**< see imb_set_cipher_suite_id() */
+        void *suite_id[4]; /**< see imb_set_session() */
+        uint32_t session_id;  /**< see imb_set_session() */
 } IMB_JOB;
 
 
@@ -1668,13 +1669,13 @@ IMB_DLL_EXPORT void init_mb_mgr_auto(IMB_MGR *state, IMB_ARCH *arch);
  * @brief Submit multiple jobs to be processed after validating.
  *
  * Prior to submission, \a _jobs need to be initialized with correct
- * crypto job parameters and followed with a call to imb_set_cipher_suite_id().
+ * crypto job parameters and followed with a call to imb_set_session().
  *
  * @param [in,out] _mgr         Pointer to initialized IMB_MGR structure
  * @param [in] _n_jobs          Number of jobs to submit for processing
  * @param [in,out] _jobs        In:  List of pointers to jobs for submission
  *                              Out: List of pointers to completed jobs
- * @see imb_set_cipher_suite_id()
+ * @see imb_set_session()
  *
  * @return Number of completed jobs or zero on error.
  *         If zero, imb_get_errno() can be used to check for potential
@@ -1687,13 +1688,13 @@ IMB_DLL_EXPORT void init_mb_mgr_auto(IMB_MGR *state, IMB_ARCH *arch);
  * @brief Submit multiple jobs to be processed without validating.
  *
  * Prior to submission \a _jobs need to be initialized with correct
- * crypto job parameters and followed with call to imb_set_cipher_suite_id().
+ * crypto job parameters and followed with call to imb_set_session().
  *
  * @param [in,out] _mgr         Pointer to initialized IMB_MGR structure
  * @param [in] _n_jobs          Number of jobs to submit for processing
  * @param [in,out] _jobs        In:  List of pointers to jobs for submission
  *                              Out: List of pointers to completed jobs
- * @see imb_set_cipher_suite_id()
+ * @see imb_set_session()
  *
  * @return Number of completed jobs or zero on error
  */
@@ -4197,24 +4198,45 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
                     const IMB_KEY_SIZE_BYTES key_size);
 
 /**
- * @brief Sets up ID structure for selected cipher suite in
+ * @brief Sets up suite_id and session_id fields for selected cipher suite in
  *        provided \a job structure
  *
- * This is for use ONLY in BURST API to speed up dispatch process.
- * For given set of parameters: cipher type, cipher key size,
- * cipher direction and authentication type, suite_id field be the same.
- * In connection oriented applications, template filled-in job structure
+ * This is mandatory operation for BURST API as suite_id is used to speed up
+ * job dispatch process.
+ * This operation is optional but helpful for JOB API use case.
+ *
+ * 'session_id' field is for application use to optimize job set up process.
+ * If JOB structure provided by library for a new operation has same session ID
+ * as required for the next operation then only message pointers and sizes
+ * need to be set up by the application. All other session fields are guaranteed
+ * to be unmodified by the library:
+ * - cipher mode
+ * - cipher direction
+ * - hash algorithm
+ * - key size
+ * - encrypt & decrypt key pointers
+ * - suite_id
+ * If allocated JOB structure contains different session ID then
+ * all required session and crypto operation fields need to be set up.
+ *
+ * In connection oriented applications, a template filled-in job structure
  * can be cached within connection structure and reused in submit operations.
  *
+ * For given set of parameters: cipher mode, cipher key size,
+ * cipher direction and authentication mode, suite_id field is the same.
+ *
  * @see IMB_SUBMIT_BURST()
  * @see IMB_SUBMIT_BURST_NOCHECK()
+ * @see IMB_SUBMIT_JOB()
+ * @see IMB_SUBMIT_JOB_NOCHECK()
  *
  * @param [in]     state   pointer to IMB_MGR
  * @param [in/out] job     pointer to prepared JOB structure
  *
+ * @return Session ID value
+ * @retval 0 on error
  */
-IMB_DLL_EXPORT void
-imb_set_cipher_suite_id(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_EXPORT uint32_t imb_set_session(IMB_MGR *state, IMB_JOB *job);
 
 #ifdef __cplusplus
 }
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index 7d651d69..b4b34b1f 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -701,4 +701,4 @@ EXPORTS
     imb_quic_aes_gcm				@675
     imb_quic_hp_aes_ecb				@676
     imb_hmac_ipad_opad                          @677
-    imb_set_cipher_suite_id                     @678
+    imb_set_session                             @678
diff --git a/lib/x86_64/cipher_suite_id.c b/lib/x86_64/cipher_suite_id.c
index 9b3e5a08..38e945d7 100644
--- a/lib/x86_64/cipher_suite_id.c
+++ b/lib/x86_64/cipher_suite_id.c
@@ -27,19 +27,50 @@
 
 #include "intel-ipsec-mb.h"
 #include "include/error.h"
+#include "include/arch_x86_64.h"
 
-IMB_DLL_EXPORT void imb_set_cipher_suite_id(IMB_MGR *state, IMB_JOB *job)
+IMB_DLL_EXPORT uint32_t imb_set_session(IMB_MGR *state, IMB_JOB *job)
 {
+        struct {
+                uint16_t key_len;
+                uint16_t hash_alg;
+                uint16_t cipher_mode;
+                uint16_t cipher_dir;
+                uint64_t counter;
+        } extract;
+        static uint64_t counter = 1;
+
 #ifdef SAFE_PARAM
         if (state == NULL) {
                 imb_set_errno(NULL, IMB_ERR_NULL_MBMGR);
-                return;
+                return 0;
         }
         if (job == NULL) {
                 imb_set_errno(state, IMB_ERR_NULL_JOB);
-                return;
+                return 0;
         }
+        imb_set_errno(state, 0);
 #endif
-
+        /* Fill in suite_id[] structure in \a job */
         state->set_suite_id(state, job);
+
+        /**
+         * Calculate and set session_id in \a job
+         * Set up extract structure:
+         * - collect session specific data
+         * - plus counter value (secures different ID for the same
+         *   cipher suite params)
+         * Session ID is CRC calculated on the extract structure.
+         */
+        extract.key_len = (uint16_t) job->key_len_in_bytes;
+        extract.hash_alg = (uint16_t) job->hash_alg;
+        extract.cipher_mode = (uint16_t) job->cipher_mode ;
+        extract.cipher_dir = (uint16_t) job->cipher_direction;
+        extract.counter = atomic_uint64_inc(&counter);
+
+        const uint32_t id =
+                IMB_CRC32_WIMAX_OFDMA_DATA(state, &extract, sizeof(extract));
+
+        job->session_id = id;
+        return id;
 }
diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index 78e545f9..f8c07c69 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -2299,7 +2299,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                 uint32_t num_jobs = num_iter;
                 IMB_JOB *jobs[IMB_MAX_BURST_SIZE] = {NULL};
 
-                imb_set_cipher_suite_id(mb_mgr, &job_template);
+                imb_set_session(mb_mgr, &job_template);
 
                 while (num_jobs && timebox_on) {
                         uint32_t n = (num_jobs / burst_size) ?
@@ -2311,7 +2311,9 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                         /* set all job params */
                         for (i = 0; i < n; i++) {
                                 job = jobs[i];
-                                *job = job_template;
+
+                                if (job->session_id != job_template.session_id)
+                                        *job = job_template;
 
                                 if (segment_size != 0)
                                         set_sgl_job_fields(job, p_buffer,
@@ -2473,10 +2475,14 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                 }
                 jobs_done = num_iter - num_jobs;
 
-        } else { /* test job api */
+        } else { /* TEST_API_JOB */
+                imb_set_session(mb_mgr, &job_template);
+
                 for (i = 0; (i < num_iter) && timebox_on; i++) {
                         job = IMB_GET_NEXT_JOB(mb_mgr);
-                        *job = job_template;
+
+                        if (job->session_id != job_template.session_id)
+                                *job = job_template;
 
                         if (segment_size != 0)
                                 set_sgl_job_fields(job, p_buffer, p_keys,
@@ -2495,9 +2501,12 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                         while (job) {
 #ifdef DEBUG
                                 if (job->status != IMB_STATUS_COMPLETED) {
+                                        const int err = imb_get_errno(mb_mgr);
+
                                         fprintf(stderr,
-                                                "failed job, status:%d\n",
-                                                job->status);
+                                                "failed job, status:%d, %s\n",
+                                                job->status,
+                                                imb_get_strerror(err));
                                         goto exit;
                                 }
 #endif
@@ -2512,9 +2521,9 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                 const int errc = imb_get_errno(mb_mgr);
 
                                 fprintf(stderr,
-                                        "failed job, status:%d, "
-                                        "error code:%d, %s\n", job->status,
-                                        errc, imb_get_strerror(errc));
+                                        "failed job, status:%d, error:%d, %s\n",
+                                        job->status, errc,
+                                        imb_get_strerror(errc));
                                 goto exit;
                         }
 #else
diff --git a/test/kat-app/aes_test.c b/test/kat-app/aes_test.c
index 275ccdc4..c3074dd4 100644
--- a/test/kat-app/aes_test.c
+++ b/test/kat-app/aes_test.c
@@ -2145,7 +2145,7 @@ test_aes_many_burst(struct IMB_MGR *mb_mgr,
                 job->user_data = targets[i];
                 job->user_data2 = (void *)((uint64_t)i);
 
-                imb_set_cipher_suite_id(mb_mgr, job);
+                imb_set_session(mb_mgr, job);
         }
 
         completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
diff --git a/test/kat-app/api_test.c b/test/kat-app/api_test.c
index 75c96a17..95f7f894 100644
--- a/test/kat-app/api_test.c
+++ b/test/kat-app/api_test.c
@@ -779,7 +779,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                 job = jobs[i];
                 fill_in_job(job, IMB_CIPHER_CBC, IMB_DIR_ENCRYPT, IMB_AUTH_NULL,
                             IMB_ORDER_CIPHER_HASH, NULL, NULL);
-                imb_set_cipher_suite_id(mb_mgr, job);
+                imb_set_session(mb_mgr, job);
         }
 
         /* set invalid job order */
@@ -812,7 +812,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                 job = jobs[i];
                 fill_in_job(job, IMB_CIPHER_CBC, IMB_DIR_ENCRYPT, IMB_AUTH_NULL,
                             IMB_ORDER_CIPHER_HASH, NULL, NULL);
-                imb_set_cipher_suite_id(mb_mgr, job);
+                imb_set_session(mb_mgr, job);
         }
 
         /* set a single invalid field */
@@ -925,7 +925,7 @@ test_burst_api(struct IMB_MGR *mb_mgr)
                 if (i == (n_jobs - 1))
                         memset(job->suite_id, 0, sizeof(job->suite_id)); /* bad suite_id */
                 else
-                        imb_set_cipher_suite_id(mb_mgr, job);
+                        imb_set_session(mb_mgr, job);
         }
 
         completed_jobs = IMB_SUBMIT_BURST(mb_mgr, n_jobs, jobs);
@@ -1030,7 +1030,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_SRC))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_AUTH_SRC_NULL,
@@ -1069,7 +1069,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_AUTH))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_AUTH_AUTH_TAG_OUTPUT_NULL,
@@ -1107,7 +1107,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        TEST_AUTH_TAG_OUTPUT_LEN_ZERO,
                                                        IMB_ERR_JOB_AUTH_TAG_LEN))
                                         return 1;
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_AUTH_TAG_OUTPUT_LEN_ZERO,
@@ -1192,7 +1192,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_AUTH_LEN))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_AUTH_MSG_LEN_GT_MAX,
@@ -1248,7 +1248,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_AUTH_LEN))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_AUTH_MSG_LEN_ZERO,
@@ -1292,7 +1292,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_IV_LEN))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, job);
+                                imb_set_session(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_IV_LEN,
                                                              IMB_ERR_JOB_IV_LEN))
@@ -1339,7 +1339,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        err_ipad))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, job);
+                                imb_set_session(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_NULL_HMAC_IPAD,
                                                              err_ipad))
@@ -1358,7 +1358,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        err_opad))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, job);
+                                imb_set_session(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_NULL_HMAC_OPAD,
                                                              err_opad))
@@ -1386,7 +1386,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_NULL_XCBC_K1_EXP))
                                 return 1;
 
-                        imb_set_cipher_suite_id(mb_mgr, job);
+                        imb_set_session(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_AUTH_NULL_XCBC_K1_EXP,
                                                      IMB_ERR_JOB_NULL_XCBC_K1_EXP))
@@ -1402,7 +1402,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_NULL_XCBC_K2))
                                 return 1;
 
-                        imb_set_cipher_suite_id(mb_mgr, job);
+                        imb_set_session(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_AUTH_NULL_XCBC_K2,
                                                      IMB_ERR_JOB_NULL_XCBC_K2))
@@ -1417,7 +1417,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                TEST_AUTH_NULL_XCBC_K3,
                                                IMB_ERR_JOB_NULL_XCBC_K3))
                                 return 1;
-                        imb_set_cipher_suite_id(mb_mgr, job);
+                        imb_set_session(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_AUTH_NULL_XCBC_K3,
                                                      IMB_ERR_JOB_NULL_XCBC_K3))
@@ -1444,7 +1444,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_NULL_AUTH_KEY))
                                 return 1;
 
-                        imb_set_cipher_suite_id(mb_mgr, job);
+                        imb_set_session(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_AUTH_NULL_GHASH_KEY,
                                                      IMB_ERR_JOB_NULL_AUTH_KEY))
@@ -1460,7 +1460,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_NULL_GHASH_INIT_TAG))
                                 return 1;
 
-                        imb_set_cipher_suite_id(mb_mgr, job);
+                        imb_set_session(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_AUTH_NULL_GHASH_INIT_TAG,
                                                      IMB_ERR_JOB_NULL_GHASH_INIT_TAG))
@@ -1488,7 +1488,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_AUTH_KEY))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, job);
+                                imb_set_session(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_NULL_GMAC_KEY,
                                                              IMB_ERR_JOB_NULL_AUTH_KEY))
@@ -1504,7 +1504,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_IV))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, job);
+                                imb_set_session(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_NULL_GMAC_IV,
                                                              IMB_ERR_JOB_NULL_IV))
@@ -1520,7 +1520,7 @@ test_job_invalid_mac_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_IV_LEN))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, job);
+                                imb_set_session(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_AUTH_GMAC_IV_LEN,
                                                              IMB_ERR_JOB_IV_LEN))
@@ -1585,7 +1585,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_SRC))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_SRC_NULL,
@@ -1621,7 +1621,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_DST))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_DST_NULL,
@@ -1661,7 +1661,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_IV))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_IV_NULL,
@@ -1701,7 +1701,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_CIPH_DIR))
                                 return 1;
 
-                        imb_set_cipher_suite_id(mb_mgr, &template_job);
+                        imb_set_session(mb_mgr, &template_job);
                         if (!is_submit_burst_invalid(mb_mgr, &template_job,
                                                      TEST_CIPH_DIR,
                                                      IMB_ERR_JOB_CIPH_DIR))
@@ -1739,7 +1739,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_KEY))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_ENC_KEY_NULL,
@@ -1781,7 +1781,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_KEY))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_DEC_KEY_NULL,
@@ -1802,7 +1802,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_KEY))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_DEC_KEY_NULL,
@@ -1816,7 +1816,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_KEY))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_DEC_KEY_NULL,
@@ -1830,7 +1830,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_NULL_KEY))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, &template_job);
+                                imb_set_session(mb_mgr, &template_job);
                                 if (!is_submit_burst_invalid(mb_mgr,
                                                              &template_job,
                                                              TEST_CIPH_DEC_KEY_NULL,
@@ -1889,7 +1889,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                                IMB_ERR_JOB_CIPH_LEN))
                                                 return 1;
 
-                                        imb_set_cipher_suite_id(mb_mgr, job);
+                                        imb_set_session(mb_mgr, job);
                                         if (!is_submit_burst_invalid(mb_mgr,
                                                                      job,
                                                                      TEST_CIPH_MSG_LEN_ZERO,
@@ -1974,7 +1974,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_CIPH_LEN))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, job);
+                                imb_set_session(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_CIPH_MSG_LEN_GT_MAX,
                                                              IMB_ERR_JOB_CIPH_LEN))
@@ -2110,7 +2110,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_IV_LEN))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, job);
+                                imb_set_session(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_CIPH_IV_LEN,
                                                              IMB_ERR_JOB_IV_LEN))
@@ -2149,7 +2149,7 @@ test_job_invalid_cipher_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_NULL_NEXT_IV))
                                 return 1;
 
-                        imb_set_cipher_suite_id(mb_mgr, job);
+                        imb_set_session(mb_mgr, job);
                         if (!is_submit_burst_invalid(mb_mgr, job,
                                                      TEST_CIPH_NEXT_IV_NULL,
                                                      IMB_ERR_JOB_NULL_NEXT_IV))
@@ -2211,7 +2211,7 @@ test_job_invalid_misc_args(struct IMB_MGR *mb_mgr)
                                                IMB_ERR_JOB_PON_PLI))
                                 return 1;
 
-                        imb_set_cipher_suite_id(mb_mgr, &template_job);
+                        imb_set_session(mb_mgr, &template_job);
 
                         if (!is_submit_burst_invalid(mb_mgr, &template_job,
                                                      TEST_INVALID_PON_PLI,
@@ -2263,7 +2263,7 @@ test_job_invalid_misc_args(struct IMB_MGR *mb_mgr)
                                                        IMB_ERR_JOB_CIPH_LEN))
                                         return 1;
 
-                                imb_set_cipher_suite_id(mb_mgr, job);
+                                imb_set_session(mb_mgr, job);
                                 if (!is_submit_burst_invalid(mb_mgr, job,
                                                              TEST_CIPH_MSG_LEN_GT_MAX,
                                                              IMB_ERR_JOB_CIPH_LEN))
diff --git a/test/kat-app/chacha20_poly1305_test.c b/test/kat-app/chacha20_poly1305_test.c
index 9f9339f3..518514b2 100644
--- a/test/kat-app/chacha20_poly1305_test.c
+++ b/test/kat-app/chacha20_poly1305_test.c
@@ -503,7 +503,7 @@ test_aead(struct IMB_MGR *mb_mgr,
 
                 job->user_data = auths[i];
 
-                imb_set_cipher_suite_id(mb_mgr, job);
+                imb_set_session(mb_mgr, job);
         }
 
         uint32_t completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
diff --git a/test/kat-app/ctr_test.c b/test/kat-app/ctr_test.c
index 18737fda..00af1a86 100644
--- a/test/kat-app/ctr_test.c
+++ b/test/kat-app/ctr_test.c
@@ -1509,7 +1509,7 @@ test_ctr_burst(struct IMB_MGR *mb_mgr,
                 job->hash_alg = IMB_AUTH_NULL;
                 job->user_data = targets[i];
                 job->user_data2 = (void *)((uint64_t)i);
-                imb_set_cipher_suite_id(mb_mgr, job);
+                imb_set_session(mb_mgr, job);
         }
 
         completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
diff --git a/test/kat-app/gcm_test.c b/test/kat-app/gcm_test.c
index 6da9ef91..bac7e0c9 100644
--- a/test/kat-app/gcm_test.c
+++ b/test/kat-app/gcm_test.c
@@ -1748,7 +1748,7 @@ aes_gcm_burst(IMB_MGR *mb_mgr,
                 } else
                         job->hash_alg = IMB_AUTH_AES_GMAC;
 
-                imb_set_cipher_suite_id(mb_mgr, job);
+                imb_set_session(mb_mgr, job);
         }
 
         const uint32_t completed_jobs =
diff --git a/test/kat-app/hmac_sha1_test.c b/test/kat-app/hmac_sha1_test.c
index 60d77e07..ca2ca0ff 100644
--- a/test/kat-app/hmac_sha1_test.c
+++ b/test/kat-app/hmac_sha1_test.c
@@ -253,7 +253,7 @@ test_hmac_sha1_burst(struct IMB_MGR *mb_mgr,
 
                 job->user_data = auths[i];
 
-                imb_set_cipher_suite_id(mb_mgr, job);
+                imb_set_session(mb_mgr, job);
         }
 
         completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
diff --git a/test/kat-app/hmac_sha256_sha512_test.c b/test/kat-app/hmac_sha256_sha512_test.c
index af42e875..0bef9ee1 100644
--- a/test/kat-app/hmac_sha256_sha512_test.c
+++ b/test/kat-app/hmac_sha256_sha512_test.c
@@ -1089,7 +1089,7 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
 
                 job->user_data = auths[i];
 
-                imb_set_cipher_suite_id(mb_mgr, job);
+                imb_set_session(mb_mgr, job);
         }
 
         completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
-- 
GitLab


From cec4c8663263330db804bc06f729b10488cbab1e Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 6 Apr 2023 17:23:54 +0100
Subject: [PATCH 220/332] test: [kat] add tests for session_id to the burst API
 tests

---
 test/kat-app/api_test.c | 66 +++++++++++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/test/kat-app/api_test.c b/test/kat-app/api_test.c
index 95f7f894..b7cf813f 100644
--- a/test/kat-app/api_test.c
+++ b/test/kat-app/api_test.c
@@ -945,6 +945,72 @@ test_burst_api(struct IMB_MGR *mb_mgr)
         }
         print_progress();
 
+        /* ======== test 9 : session_d */
+
+        while (IMB_GET_NEXT_BURST(mb_mgr, n_jobs, jobs) < n_jobs)
+                IMB_FLUSH_BURST(mb_mgr, n_jobs, jobs);
+
+        /* fill in valid jobs */
+        for (i = 0; i < n_jobs; i++) {
+                job = jobs[i];
+                fill_in_job(job, IMB_CIPHER_CBC, IMB_DIR_ENCRYPT, IMB_AUTH_HMAC_SHA_256,
+                            IMB_ORDER_CIPHER_HASH, NULL, NULL);
+                if (i > 0) {
+                        /*
+                         * Check if each call to session ID for the same cipher suite gives
+                         * different ID.
+                         */
+                        imb_set_session(mb_mgr, job);
+                        if (job->session_id == jobs[i - 1]->session_id) {
+                                printf("%s: test %d, unexpected/duplicate session_id value\n",
+                                       __func__, TEST_INVALID_BURST);
+                                return 1;
+                        }
+                } else {
+                        /* NULL MB MGR pointer */
+                        imb_set_session(NULL, job);
+                        err = imb_get_errno(mb_mgr);
+                        if (err != IMB_ERR_NULL_MBMGR) {
+                                printf("%s: test %d, unexpected error: %s\n",
+                                       __func__, TEST_INVALID_BURST,
+                                       imb_get_strerror(err));
+                                return 1;
+                        }
+                        print_progress();
+
+                        /* NULL JOB pointer */
+                        imb_set_session(mb_mgr, NULL);
+                        err = imb_get_errno(mb_mgr);
+                        if (err != IMB_ERR_NULL_JOB) {
+                                printf("%s: test %d, unexpected error: %s\n",
+                                       __func__, TEST_INVALID_BURST,
+                                       imb_get_strerror(err));
+                                return 1;
+                        }
+                        print_progress();
+
+                        /* correct call at the end */
+                        imb_set_session(mb_mgr, job);
+                        err = imb_get_errno(mb_mgr);
+                        if (err != 0) {
+                                printf("%s: test %d, unexpected error: %s\n",
+                                       __func__, TEST_INVALID_BURST,
+                                       imb_get_strerror(err));
+                                return 1;
+                        }
+                }
+        }
+
+        completed_jobs = IMB_SUBMIT_BURST(mb_mgr, n_jobs, jobs);
+        completed_jobs += IMB_FLUSH_BURST(mb_mgr, n_jobs, jobs);
+        if (completed_jobs != n_jobs) {
+                printf("%s: test %d, unexpected number of completed jobs\n",
+                       __func__, TEST_INVALID_BURST);
+                return 1;
+        }
+        print_progress();
+
+
         /* ======== end */
 
         if (!quiet_mode)
-- 
GitLab


From c981edeb36a04861037231ac291d8c2aa22f6f07 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 12 Apr 2023 10:06:50 +0100
Subject: [PATCH 221/332] lib: [gcm] remove parameter checks for GCM functions
 used with JOB API

---
 lib/avx512_t2/gcm_api_vaes_avx512.inc | 239 +------------------------
 lib/include/gcm_avx512.inc            | 242 +------------------------
 lib/include/gcm_avx_gen2.inc          | 244 +-------------------------
 lib/include/gcm_avx_gen4.inc          | 244 +-------------------------
 lib/sse_t1/gcm_api_sse.inc            | 244 +-------------------------
 5 files changed, 30 insertions(+), 1183 deletions(-)

diff --git a/lib/avx512_t2/gcm_api_vaes_avx512.inc b/lib/avx512_t2/gcm_api_vaes_avx512.inc
index 7d455651..d9c45c5e 100644
--- a/lib/avx512_t2/gcm_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_api_vaes_avx512.inc
@@ -379,6 +379,9 @@ skip_aad_check_error_dec:
 %endif
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
 ;void   aes_gcm_enc_var_iv_128_vaes_avx512 / aes_gcm_enc_var_iv_192_vaes_avx512 /
 ;       aes_gcm_enc_var_iv_256_vaes_avx512
 ;       (const struct gcm_key_data *key_data,
@@ -395,70 +398,7 @@ skip_aad_check_error_dec:
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(FN_NAME(enc_var_iv,_),function,)
 FN_NAME(enc_var_iv,_):
-        endbranch64
         FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc_IV
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_enc_IV
-
-        ;; Check IV len != 0
-        cmp     arg7, 0
-        jz      error_enc_IV
-
-        ;; Check auth_tag != NULL
-        cmp     arg10, 0
-        jz      error_enc_IV
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg11, 0
-        jz      error_enc_IV
-
-        cmp     arg11, 16
-        ja      error_enc_IV
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_enc_IV
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_enc_IV
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_enc_IV
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_enc_IV
-
-skip_in_out_check_enc_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_enc_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg8, 0
-        jz      error_enc_IV
-
-skip_aad_check_enc_IV:
-%endif
         cmp     arg7, 12
         je      iv_len_12_enc_IV
 
@@ -479,63 +419,13 @@ skip_iv_len_12_enc_IV:
         clear_zmms_avx512 xmm1, xmm4, xmm6, xmm7, xmm8, xmm12, xmm13, xmm14, \
                           xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm26, xmm30, xmm31
 %endif
-exit_enc_IV:
         FUNC_RESTORE
         ret
 
-%ifdef SAFE_PARAM
-error_enc_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check IV len != 0
-        IMB_ERR_CHECK_ZERO arg7, rax, IMB_ERR_IV_LEN
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg10, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg11, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg11, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_enc_IV
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_enc_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_error_enc_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg8, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_enc_IV:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc_IV
-%endif
-
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
 ;void   aes_gcm_dec_var_iv_128_vaes_avx512 / aes_gcm_dec_var_iv_192_vaes_avx512 /
 ;       aes_gcm_dec_var_iv_256_vaes_avx512
 ;       (const struct gcm_key_data *key_data,
@@ -552,70 +442,7 @@ skip_aad_check_error_enc_IV:
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(FN_NAME(dec_var_iv,_),function,)
 FN_NAME(dec_var_iv,_):
-        endbranch64
         FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec_IV
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_dec_IV
-
-        ;; Check IV len != 0
-        cmp     arg7, 0
-        jz      error_dec_IV
-
-        ;; Check auth_tag != NULL
-        cmp     arg10, 0
-        jz      error_dec_IV
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg11, 0
-        jz      error_dec_IV
-
-        cmp     arg11, 16
-        ja      error_dec_IV
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_dec_IV
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_dec_IV
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_dec_IV
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_dec_IV
-
-skip_in_out_check_dec_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_dec_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg8, 0
-        jz      error_dec_IV
-
-skip_aad_check_dec_IV:
-%endif
         cmp     arg7, 12
         je      iv_len_12_dec_IV
 
@@ -632,67 +459,13 @@ iv_len_12_dec_IV:
 skip_iv_len_12_dec_IV:
         GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
         GCM_COMPLETE arg1, arg2, arg10, arg11, single_call, k1, r10, r11, r12
-
 %ifdef SAFE_DATA
         clear_zmms_avx512 xmm1, xmm4, xmm6, xmm7, xmm8, xmm12, xmm13, xmm14, \
                           xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm26, xmm30, xmm31
 %endif
-exit_dec_IV:
         FUNC_RESTORE
         ret
 
-%ifdef SAFE_PARAM
-error_dec_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check IV len != 0
-        IMB_ERR_CHECK_ZERO arg7, rax, IMB_ERR_IV_LEN
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg10, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg11, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg11, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_dec_IV
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_dec_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_error_dec_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg8, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_dec_IV:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec_IV
-%endif
-
 mksection stack-noexec
 
 %endif ; GCM_API_VAES_AVX512_INC
diff --git a/lib/include/gcm_avx512.inc b/lib/include/gcm_avx512.inc
index 823ebe19..119301d5 100644
--- a/lib/include/gcm_avx512.inc
+++ b/lib/include/gcm_avx512.inc
@@ -3896,6 +3896,9 @@ skip_aad_check_error_dec:
 %endif
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
 ;void   aes_gcm_enc_var_iv_128_avx512 / aes_gcm_enc_var_iv_192_avx512 /
 ;       aes_gcm_enc_var_iv_256_avx512
 ;       (const struct gcm_key_data *key_data,
@@ -3912,70 +3915,7 @@ skip_aad_check_error_dec:
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(FN_NAME(enc_var_iv,_),function,)
 FN_NAME(enc_var_iv,_):
-        endbranch64
         FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc_IV
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_enc_IV
-
-        ;; Check IV len != 0
-        cmp     arg7, 0
-        jz      error_enc_IV
-
-        ;; Check auth_tag != NULL
-        cmp     arg10, 0
-        jz      error_enc_IV
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg11, 0
-        jz      error_enc_IV
-
-        cmp     arg11, 16
-        ja      error_enc_IV
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_enc_IV
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_enc_IV
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_enc_IV
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_enc_IV
-
-skip_in_out_check_enc_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_enc_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg8, 0
-        jz      error_enc_IV
-
-skip_aad_check_enc_IV:
-%endif
         cmp     arg7, 12
         je      iv_len_12_enc_IV
 
@@ -3987,67 +3927,14 @@ iv_len_12_enc_IV:
 
 skip_iv_len_12_enc_IV:
         GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC, single_call
-
         GCM_COMPLETE arg1, arg2, arg10, arg11, single_call
-
-exit_enc_IV:
         FUNC_RESTORE
-
         ret
 
-%ifdef SAFE_PARAM
-error_enc_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check IV len != 0
-        IMB_ERR_CHECK_ZERO arg7, rax, IMB_ERR_IV_LEN
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg10, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg11, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg11, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_enc_IV
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_enc_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_error_enc_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg8, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_enc_IV:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc_IV
-%endif
-
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
 ;void   aes_gcm_dec_var_iv_128_avx512 / aes_gcm_dec_var_iv_192_avx512 /
 ;       aes_gcm_dec_var_iv_256_avx512
 ;       (const struct gcm_key_data *key_data,
@@ -4064,70 +3951,7 @@ skip_aad_check_error_enc_IV:
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(FN_NAME(dec_var_iv,_),function,)
 FN_NAME(dec_var_iv,_):
-        endbranch64
         FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec_IV
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_dec_IV
-
-        ;; Check IV len != 0
-        cmp     arg7, 0
-        jz      error_dec_IV
-
-        ;; Check auth_tag != NULL
-        cmp     arg10, 0
-        jz      error_dec_IV
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg11, 0
-        jz      error_dec_IV
-
-        cmp     arg11, 16
-        ja      error_dec_IV
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_dec_IV
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_dec_IV
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_dec_IV
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_dec_IV
-
-skip_in_out_check_dec_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_dec_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg8, 0
-        jz      error_dec_IV
-
-skip_aad_check_dec_IV:
-%endif
         cmp     arg7, 12
         je      iv_len_12_dec_IV
 
@@ -4140,63 +3964,9 @@ iv_len_12_dec_IV:
 skip_iv_len_12_dec_IV:
         GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
         GCM_COMPLETE arg1, arg2, arg10, arg11, single_call
-
-exit_dec_IV:
         FUNC_RESTORE
         ret
 
-%ifdef SAFE_PARAM
-error_dec_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check IV len != 0
-        IMB_ERR_CHECK_ZERO arg7, rax, IMB_ERR_IV_LEN
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg10, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg11, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg11, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_dec_IV
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_dec_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_error_dec_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg8, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_dec_IV:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec_IV
-%endif
-
 %ifdef GCM128_MODE
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;void   ghash_avx512
diff --git a/lib/include/gcm_avx_gen2.inc b/lib/include/gcm_avx_gen2.inc
index 14a14fa8..c03f2cb7 100644
--- a/lib/include/gcm_avx_gen2.inc
+++ b/lib/include/gcm_avx_gen2.inc
@@ -2853,6 +2853,9 @@ skip_aad_check_error_dec:
 %endif
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
 ;void   aes_gcm_enc_var_iv_128_avx_gen2 / aes_gcm_enc_var_iv_192_avx_gen2 /
 ;       aes_gcm_enc_var_iv_256_avx_gen2
 ;        const struct gcm_key_data *key_data,
@@ -2869,70 +2872,7 @@ skip_aad_check_error_dec:
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(FN_NAME(enc_var_iv,_),function,)
 FN_NAME(enc_var_iv,_):
-
 	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc_IV
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_enc_IV
-
-        ;; Check IV len != 0
-        cmp     arg7, 0
-        jz      error_enc_IV
-
-        ;; Check auth_tag != NULL
-        cmp     arg10, 0
-        jz      error_enc_IV
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg11, 0
-        jz      error_enc_IV
-
-        cmp     arg11, 16
-        ja      error_enc_IV
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_enc_IV
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_enc_IV
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_enc_IV
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_enc_IV
-
-skip_in_out_check_enc_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_enc_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg8, 0
-        jz      error_enc_IV
-
-skip_aad_check_enc_IV:
-%endif
         cmp     arg7, 12
         je      iv_len_12_enc_IV
 
@@ -2944,67 +2884,14 @@ iv_len_12_enc_IV:
 
 skip_iv_len_12_enc_IV:
 	GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC
-
 	GCM_COMPLETE arg1, arg2, arg10, arg11
-
-exit_enc_IV:
 	FUNC_RESTORE
-
 	ret
 
-%ifdef SAFE_PARAM
-error_enc_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check IV len != 0
-        IMB_ERR_CHECK_ZERO arg7, rax, IMB_ERR_IV_LEN
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg10, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg11, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg11, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_enc_IV
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_enc_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_error_enc_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg8, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_enc_IV:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc_IV
-%endif
-
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
 ;void   aes_gcm_dec_var_iv_128_avx_gen2 / aes_gcm_dec_var_iv_192_avx_gen2 /
 ;       aes_gcm_dec_var_iv_256_avx_gen2
 ;       (const struct gcm_key_data *key_data,
@@ -3021,70 +2908,7 @@ skip_aad_check_error_enc_IV:
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(FN_NAME(dec_var_iv,_),function,)
 FN_NAME(dec_var_iv,_):
-
 	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec_IV
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_dec_IV
-
-        ;; Check IV len != 0
-        cmp     arg7, 0
-        jz      error_dec_IV
-
-        ;; Check auth_tag != NULL
-        cmp     arg10, 0
-        jz      error_dec_IV
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg11, 0
-        jz      error_dec_IV
-
-        cmp     arg11, 16
-        ja      error_dec_IV
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_dec_IV
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_dec_IV
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_dec_IV
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_dec_IV
-
-skip_in_out_check_dec_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_dec_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg8, 0
-        jz      error_dec_IV
-
-skip_aad_check_dec_IV:
-%endif
         cmp     arg7, 12
         je      iv_len_12_dec_IV
 
@@ -3096,66 +2920,10 @@ iv_len_12_dec_IV:
 
 skip_iv_len_12_dec_IV:
 	GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC
-
 	GCM_COMPLETE arg1, arg2, arg10, arg11
-
-exit_dec_IV:
 	FUNC_RESTORE
-
 	ret
 
-%ifdef SAFE_PARAM
-error_dec_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check IV len != 0
-        IMB_ERR_CHECK_ZERO arg7, rax, IMB_ERR_IV_LEN
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg10, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg11, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg11, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_dec_IV
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_dec_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_error_dec_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg8, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_dec_IV:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec_IV
-%endif
-
 %ifdef GCM128_MODE
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;void   ghash_pre_avx_gen2
diff --git a/lib/include/gcm_avx_gen4.inc b/lib/include/gcm_avx_gen4.inc
index 1207c11e..b55ed33f 100644
--- a/lib/include/gcm_avx_gen4.inc
+++ b/lib/include/gcm_avx_gen4.inc
@@ -3974,6 +3974,9 @@ skip_aad_check_error_dec:
 %endif
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
 ;void   aes_gcm_enc_var_iv_128_avx_gen4 / aes_gcm_enc_var_iv_192_avx_gen4 /
 ;       aes_gcm_enc_var_iv_256_avx_gen4
 ;        const struct gcm_key_data *key_data,
@@ -3990,70 +3993,7 @@ skip_aad_check_error_dec:
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(FN_NAME(enc_var_iv,_),function,)
 FN_NAME(enc_var_iv,_):
-        endbranch64
 	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc_IV
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_enc_IV
-
-        ;; Check IV len != 0
-        cmp     arg7, 0
-        jz      error_enc_IV
-
-        ;; Check auth_tag != NULL
-        cmp     arg10, 0
-        jz      error_enc_IV
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg11, 0
-        jz      error_enc_IV
-
-        cmp     arg11, 16
-        ja      error_enc_IV
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_enc_IV
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_enc_IV
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_enc_IV
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_enc_IV
-
-skip_in_out_check_enc_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_enc_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg8, 0
-        jz      error_enc_IV
-
-skip_aad_check_enc_IV:
-%endif
         cmp     arg7, 12
         je      iv_len_12_enc_IV
 
@@ -4065,67 +4005,14 @@ iv_len_12_enc_IV:
 
 skip_iv_len_12_enc_IV:
         GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC, single_call
-
         GCM_COMPLETE arg1, arg2, arg10, arg11, single_call
-
-exit_enc_IV:
 	FUNC_RESTORE
-
 	ret
 
-%ifdef SAFE_PARAM
-error_enc_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check IV len != 0
-        IMB_ERR_CHECK_ZERO arg7, rax, IMB_ERR_IV_LEN
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg10, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg11, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg11, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_enc_IV
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_enc_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_error_enc_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg8, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_enc_IV:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc_IV
-%endif
-
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
 ;void   aes_gcm_dec_var_iv_128_avx_gen4 / aes_gcm_dec_var_iv_192_avx_gen4 /
 ;       aes_gcm_dec_var_iv_256_avx_gen4
 ;        const struct gcm_key_data *key_data,
@@ -4142,70 +4029,7 @@ skip_aad_check_error_enc_IV:
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(FN_NAME(dec_var_iv,_),function,)
 FN_NAME(dec_var_iv,_):
-        endbranch64
 	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec_IV
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_dec_IV
-
-        ;; Check IV len != 0
-        cmp     arg7, 0
-        jz      error_dec_IV
-
-        ;; Check auth_tag != NULL
-        cmp     arg10, 0
-        jz      error_dec_IV
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg11, 0
-        jz      error_dec_IV
-
-        cmp     arg11, 16
-        ja      error_dec_IV
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_dec_IV
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_dec_IV
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_dec_IV
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_dec_IV
-
-skip_in_out_check_dec_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_dec_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg8, 0
-        jz      error_dec_IV
-
-skip_aad_check_dec_IV:
-%endif
         cmp     arg7, 12
         je      iv_len_12_dec_IV
 
@@ -4217,66 +4041,10 @@ iv_len_12_dec_IV:
 
 skip_iv_len_12_dec_IV:
         GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
-
         GCM_COMPLETE arg1, arg2, arg10, arg11, single_call
-
-exit_dec_IV:
 	FUNC_RESTORE
-
 	ret
 
-%ifdef SAFE_PARAM
-error_dec_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check IV len != 0
-        IMB_ERR_CHECK_ZERO arg7, rax, IMB_ERR_IV_LEN
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg10, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg11, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg11, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_dec_IV
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_dec_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_error_dec_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg8, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_dec_IV:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec_IV
-%endif
-
 %ifdef GCM128_MODE
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;void   ghash_avx_gen4
diff --git a/lib/sse_t1/gcm_api_sse.inc b/lib/sse_t1/gcm_api_sse.inc
index 774286eb..6a717bba 100644
--- a/lib/sse_t1/gcm_api_sse.inc
+++ b/lib/sse_t1/gcm_api_sse.inc
@@ -395,6 +395,9 @@ skip_aad_check_error_dec:
 %endif
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
 ;void   aes_gcm_enc_var_iv_128_sse / aes_gcm_enc_var_iv_192_sse /
 ;       aes_gcm_enc_var_iv_256_sse
 ;       (const struct gcm_key_data *key_data,
@@ -411,70 +414,7 @@ skip_aad_check_error_dec:
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(FN_NAME(enc_var_iv,_),function,)
 FN_NAME(enc_var_iv,_):
-
 	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc_IV
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_enc_IV
-
-        ;; Check IV len != 0
-        cmp     arg7, 0
-        jz      error_enc_IV
-
-        ;; Check auth_tag != NULL
-        cmp     arg10, 0
-        jz      error_enc_IV
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg11, 0
-        jz      error_enc_IV
-
-        cmp     arg11, 16
-        ja      error_enc_IV
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_enc_IV
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_enc_IV
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_enc_IV
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_enc_IV
-
-skip_in_out_check_enc_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_enc_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg8, 0
-        jz      error_enc_IV
-
-skip_aad_check_enc_IV:
-%endif
         cmp     arg7, 12
         je      iv_len_12_enc_IV
 
@@ -486,67 +426,14 @@ iv_len_12_enc_IV:
 
 skip_iv_len_12_enc_IV:
 	GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC
-
 	GCM_COMPLETE arg1, arg2, arg10, arg11
-
-exit_enc_IV:
 	FUNC_RESTORE
-
 	ret
 
-%ifdef SAFE_PARAM
-error_enc_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check IV len != 0
-        IMB_ERR_CHECK_ZERO arg7, rax, IMB_ERR_IV_LEN
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg10, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg11, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg11, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_enc_IV
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_enc_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_error_enc_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg8, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_enc_IV:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc_IV
-%endif
-
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
 ;void   aes_gcm_dec_var_iv_128_sse / aes_gcm_dec_var_iv_192_sse /
 ;       aes_gcm_dec_var_iv_256_sse
 ;       (const struct gcm_key_data *key_data,
@@ -563,70 +450,7 @@ skip_aad_check_error_enc_IV:
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(FN_NAME(dec_var_iv,_),function,)
 FN_NAME(dec_var_iv,_):
-
 	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec_IV
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_dec_IV
-
-        ;; Check IV len != 0
-        cmp     arg7, 0
-        jz      error_dec_IV
-
-        ;; Check auth_tag != NULL
-        cmp     arg10, 0
-        jz      error_dec_IV
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg11, 0
-        jz      error_dec_IV
-
-        cmp     arg11, 16
-        ja      error_dec_IV
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_dec_IV
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_dec_IV
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_dec_IV
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_dec_IV
-
-skip_in_out_check_dec_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_dec_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg8, 0
-        jz      error_dec_IV
-
-skip_aad_check_dec_IV:
-%endif
         cmp     arg7, 12
         je      iv_len_12_dec_IV
 
@@ -638,65 +462,9 @@ iv_len_12_dec_IV:
 
 skip_iv_len_12_dec_IV:
 	GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC
-
 	GCM_COMPLETE arg1, arg2, arg10, arg11
-
-exit_dec_IV:
 	FUNC_RESTORE
-
 	ret
 
-%ifdef SAFE_PARAM
-error_dec_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check IV len != 0
-        IMB_ERR_CHECK_ZERO arg7, rax, IMB_ERR_IV_LEN
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg10, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg11, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg11, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_dec_IV
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_dec_IV:
-        ;; Check if aad_len == 0
-        cmp     arg9, 0
-        jz      skip_aad_check_error_dec_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg8, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_dec_IV:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec_IV
-%endif
-
 mksection stack-noexec
 %endif ; GCM_API_SSE_INC
-- 
GitLab


From 05bccb6a598154552b54da11d52d9d221f186d3c Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Fri, 14 Apr 2023 10:37:04 +0100
Subject: [PATCH 222/332] test: [HMAC-SHA1] fix build warning

---
 test/kat-app/hmac_sha1_test.c | 9 ++-------
 1 file changed, 2 insertions(+), 7 deletions(-)

diff --git a/test/kat-app/hmac_sha1_test.c b/test/kat-app/hmac_sha1_test.c
index ca2ca0ff..44bc1dcd 100644
--- a/test/kat-app/hmac_sha1_test.c
+++ b/test/kat-app/hmac_sha1_test.c
@@ -424,18 +424,13 @@ test_hmac_sha1_std_vectors(struct IMB_MGR *mb_mgr,
                            struct test_suite_context *ts)
 {
         const struct mac_test *v = hmac_sha1_test_kat_json;
-	int vectors_cnt;
-        /* Calculate vectors_cnt */
-        for (vectors_cnt = 0; v->msg != NULL; vectors_cnt++, v++)
-                ;
-        v -= vectors_cnt;
+
 	printf("HMAC-SHA1 standard test vectors (N jobs = %u):\n", num_jobs);
 	while (v->msg != NULL) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("[%lu/%lu] RFC2202 Test Case %lu keySize:%lu "
+                        printf("RFC2202 Test Case %lu keySize:%lu "
                                "msgSize:%lu tagSize:%lu\n",
-                               v->tcId, vectors_cnt,
                                v->tcId,
                                v->keySize,
                                v->msgSize / 8,
-- 
GitLab


From 0e71a0b35282d0d2a1cae34f6b636c3c48218a55 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 14 Apr 2023 16:38:35 +0100
Subject: [PATCH 223/332] cmake: add print_help target

---
 CMakeLists.txt     | 32 +++++++++++++++++++++++++++++---
 lib/CMakeLists.txt | 16 ++++++++++++----
 2 files changed, 41 insertions(+), 7 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 87be342a..c426254d 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -25,9 +25,11 @@
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
 # set default CMakeCache.txt values
-set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Set default build to release")
-set(CMAKE_C_FLAGS_RELEASE "" CACHE STRING "Clear default release build C Compiler Flags" FORCE)
-set(CMAKE_C_FLAGS_DEBUG "" CACHE STRING "Clear default debug build C Compiler Flags" FORCE)
+set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Selected build type")
+# clear default release build C Compiler Flags
+set(CMAKE_C_FLAGS_RELEASE "" CACHE STRING "" FORCE)
+# clear default debug build C Compiler Flags
+set(CMAKE_C_FLAGS_DEBUG "" CACHE STRING "" FORCE)
 
 # get version from public header file
 set(IMB_HDR "${CMAKE_CURRENT_SOURCE_DIR}/lib/intel-ipsec-mb.h")
@@ -40,6 +42,9 @@ cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb VERSION ${IPSEC_MB_VERSION}
     DESCRIPTION "Intel(R) IPsec Multi-Buffer library")
 
+# project options list (used by print_help target)
+set(IPSEC_MB_OPTIONS CMAKE_BUILD_TYPE)
+
 # flag to force full project build
 set(FULL_PROJECT_BUILD TRUE)
 
@@ -58,6 +63,10 @@ add_subdirectory(perf)
 # build test applications
 add_subdirectory(test)
 
+#######################################
+# configure custom targets
+#######################################
+
 # add custom target to uninstall library
 configure_file(
     "${CMAKE_CURRENT_SOURCE_DIR}/lib/cmake/uninstall.cmake.in"
@@ -67,3 +76,20 @@ configure_file(
 add_custom_target(uninstall
     COMMAND ${CMAKE_COMMAND} -P ${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake)
 
+# add custom target to print help information
+add_custom_target(
+  print_help
+  COMMAND ${CMAKE_COMMAND} -E echo "Available build options:"
+  VERBATIM
+)
+
+foreach (OPTION ${IPSEC_MB_OPTIONS})
+  get_property(HELP_TEXT CACHE ${OPTION} PROPERTY HELPSTRING)
+  if(HELP_TEXT)
+    add_custom_command(TARGET print_help
+      COMMAND
+      ${CMAKE_COMMAND} -E echo "    ${OPTION}=${${OPTION}} - ${HELP_TEXT}"
+    )
+  endif()
+endforeach()
+
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index d4cc2b7e..bff81911 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -36,15 +36,23 @@ endif()
 # set default library options
 #######################################
 option(AESNI_EMU "AESNI emulation support" OFF)
-option(SAFE_PARAM "Parameter checking" ON)
-option(SAFE_DATA "Clear sensitive data from registers and memory" ON)
-option(SAFE_LOOKUP "Secure table lookups" ON)
-option(SAFE_OPTIONS "Library security features" ON)
+option(SAFE_PARAM "API input parameter checking" ON)
+option(SAFE_DATA "Sensitive data cleared from registers and memory at operation end" ON)
+option(SAFE_LOOKUP "Lookups depending on sensitive data are constant time" ON)
+option(SAFE_OPTIONS "Enable all safe options" ON)
 option(NO_COMPAT_IMB_API_053 "Disable compatibility with v0.53" ON)
 option(BUILD_SHARED_LIBS "Build shared library" ON)
 option(CMAKE_VERBOSE_MAKEFILE "Verbose build output" OFF)
 set(EXTRA_CFLAGS "" CACHE STRING "Extra compiler flags")
 
+# add library options to options list (used by print_help target)
+list(APPEND IPSEC_MB_OPTIONS
+  AESNI_EMU SAFE_PARAM SAFE_DATA SAFE_LOOKUP
+  SAFE_OPTIONS NO_COMPAT_IMB_API_053 BUILD_SHARED_LIBS
+  CMAKE_VERBOSE_MAKEFILE EXTRA_CFLAGS
+)
+set(IPSEC_MB_OPTIONS ${IPSEC_MB_OPTIONS} PARENT_SCOPE)
+
 # disable all SAFE options when SAFE_OPTIONS false
 if(NOT SAFE_OPTIONS)
   message(STATUS "SAFE_OPTIONS disabled")
-- 
GitLab


From 2eb402f0bc8ff03693f38aec9a837c28a8c37838 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 14 Apr 2023 16:51:36 +0100
Subject: [PATCH 224/332] cmake: update docs for print_help target

---
 README.md | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/README.md b/README.md
index 06b1a16d..228d40d5 100644
--- a/README.md
+++ b/README.md
@@ -475,6 +475,11 @@ cmake -DCMAKE_BUILD_TYPE=Debug ..
 cmake --build . --parallel
 ```
 
+For more build options and their explanation run:
+```
+cmake --build . --target print_help
+```
+
 ### Windows MSVS (x64 only)
 
 Shared library with debugging information (default for MSVS)
@@ -495,12 +500,22 @@ cmake -Ax64 -DBUILD_SHARED_LIBS=OFF ..
 cmake --build . --config Release
 ```
 
+For more build options and their explanation run:
+```
+cmake --build . --target print_help
+```
+
 ###  Ninja (Linux, FreeBSD and Windows):
 ```
 cmake -G Ninja ..
 cmake --build .
 ```
 
+For more build options and their explanation run:
+```
+cmake --build . --target print_help
+```
+
 Library and applications can be found in:
 ```
 build/lib
-- 
GitLab


From 39bb99305e1a17d92190010ab632c8f4bf176807 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Tue, 11 Apr 2023 15:38:04 +0100
Subject: [PATCH 225/332] test: [HMAC-SHA224-512] unifying test vectors

---
 test/kat-app/CMakeLists.txt            |   4 +
 test/kat-app/Makefile                  |   3 +-
 test/kat-app/hmac_sha224.json.c        | 120 ++++
 test/kat-app/hmac_sha256.json.c        | 120 ++++
 test/kat-app/hmac_sha256_sha512_test.c | 865 ++-----------------------
 test/kat-app/hmac_sha384.json.c        | 125 ++++
 test/kat-app/hmac_sha512.json.c        | 131 ++++
 test/kat-app/win_x64.mak               |   2 +-
 8 files changed, 569 insertions(+), 801 deletions(-)
 create mode 100644 test/kat-app/hmac_sha224.json.c
 create mode 100644 test/kat-app/hmac_sha256.json.c
 create mode 100644 test/kat-app/hmac_sha384.json.c
 create mode 100644 test/kat-app/hmac_sha512.json.c

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 7aaf94a5..877287e2 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -75,6 +75,10 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/quic_ecb_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha1.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha224.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha256.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha384.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha512.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
 )
 
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index 7cc8e042..beef141b 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -37,7 +37,8 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	ecb_test.c zuc_test.c kasumi_test.c snow3g_test.c direct_api_test.c clear_mem_test.c \
 	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
-	hmac_sha1.json.c
+	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c \
+	hmac_sha512.json.c
 OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
 # targets come here
diff --git a/test/kat-app/hmac_sha224.json.c b/test/kat-app/hmac_sha224.json.c
new file mode 100644
index 00000000..a928651a
--- /dev/null
+++ b/test/kat-app/hmac_sha224.json.c
@@ -0,0 +1,120 @@
+/*****************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************/
+
+/* HMACSHA224, 0.8rc21 */
+#include "mac_test.h"
+const struct mac_test hmac_sha224_test_kat_json[] = {
+        /* Vectors from https://tools.ietf.org/html/rfc4231 */
+        { 20, 28, 1,
+          "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b"
+          "\x0b\x0b\x0b",
+          "\x48\x69\x20\x54\x68\x65\x72\x65",
+          "\x89\x6f\xb1\x12\x8a\xbb\xdf\x19\x68\x32\x10\x7c\xd4\x9d\xf3\x3f\x47"
+          "\xb4\xb1\x16\x99\x12\xba\x4f\x53\x68\x4b\x22",
+          1, 64, NULL, 0 },
+        { 4, 28, 2, "\x4a\x65\x66\x65",
+          "\x77\x68\x61\x74\x20\x64\x6f\x20\x79\x61\x20\x77\x61\x6e\x74\x20\x66"
+          "\x6f\x72\x20\x6e\x6f\x74\x68\x69\x6e\x67\x3f",
+          "\xa3\x0e\x01\x09\x8b\xc6\xdb\xbf\x45\x69\x0f\x3a\x7e\x9e\x6d\x0f\x8b"
+          "\xbe\xa2\xa3\x9e\x61\x48\x00\x8f\xd0\x5e\x44",
+          1, 224, NULL, 0 },
+        { 20, 28, 3,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa",
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
+          "\x7f\xb3\xcb\x35\x88\xc6\xc1\xf6\xff\xa9\x69\x4d\x7d\x6a\xd2\x64\x93"
+          "\x65\xb0\xc1\xf6\x5d\x69\xd1\xec\x83\x33\xea",
+          1, 400, NULL, 0 },
+        { 25, 28, 4,
+          "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11"
+          "\x12\x13\x14\x15\x16\x17\x18\x19",
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
+          "\x6c\x11\x50\x68\x74\x01\x3c\xac\x6a\x2a\xbc\x1b\xb3\x82\x62\x7c\xec"
+          "\x6a\x90\xd8\x6e\xfc\x01\x2d\xe7\xaf\xec\x5a",
+          1, 400, NULL, 0 },
+        { 20, 16, 5,
+          "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c"
+          "\x0c\x0c\x0c",
+          "\x54\x65\x73\x74\x20\x57\x69\x74\x68\x20\x54\x72\x75\x6e\x63\x61\x74"
+          "\x69\x6f\x6e",
+          "\x0e\x2a\xea\x68\xa9\x0c\x8d\x37\xc9\x88\xbc\xdb\x9f\xca\x6f\xa8",
+          1, 160, NULL, 0 },
+        { 131, 28, 6,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+          "\x54\x65\x73\x74\x20\x55\x73\x69\x6e\x67\x20\x4c\x61\x72\x67\x65\x72"
+          "\x20\x54\x68\x61\x6e\x20\x42\x6c\x6f\x63\x6b\x2d\x53\x69\x7a\x65\x20"
+          "\x4b\x65\x79\x20\x2d\x20\x48\x61\x73\x68\x20\x4b\x65\x79\x20\x46\x69"
+          "\x72\x73\x74",
+          "\x95\xe9\xa0\xdb\x96\x20\x95\xad\xae\xbe\x9b\x2d\x6f\x0d\xbc\xe2\xd4"
+          "\x99\xf1\x12\xf2\xd2\xb7\x27\x3f\xa6\x87\x0e",
+          1, 432, NULL, 0 },
+        { 131, 28, 7,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+          "\x54\x68\x69\x73\x20\x69\x73\x20\x61\x20\x74\x65\x73\x74\x20\x75\x73"
+          "\x69\x6e\x67\x20\x61\x20\x6c\x61\x72\x67\x65\x72\x20\x74\x68\x61\x6e"
+          "\x20\x62\x6c\x6f\x63\x6b\x2d\x73\x69\x7a\x65\x20\x6b\x65\x79\x20\x61"
+          "\x6e\x64\x20\x61\x20\x6c\x61\x72\x67\x65\x72\x20\x74\x68\x61\x6e\x20"
+          "\x62\x6c\x6f\x63\x6b\x2d\x73\x69\x7a\x65\x20\x64\x61\x74\x61\x2e\x20"
+          "\x54\x68\x65\x20\x6b\x65\x79\x20\x6e\x65\x65\x64\x73\x20\x74\x6f\x20"
+          "\x62\x65\x20\x68\x61\x73\x68\x65\x64\x20\x62\x65\x66\x6f\x72\x65\x20"
+          "\x62\x65\x69\x6e\x67\x20\x75\x73\x65\x64\x20\x62\x79\x20\x74\x68\x65"
+          "\x20\x48\x4d\x41\x43\x20\x61\x6c\x67\x6f\x72\x69\x74\x68\x6d\x2e",
+          "\x3a\x85\x41\x66\xac\x5d\x9f\x02\x3f\x54\xd5\x17\xd0\xb3\x9d\xbd\x94"
+          "\x67\x70\xdb\x9c\x2b\x95\xc9\xf6\xf5\x65\xd1",
+          1, 1216, NULL, 0 },
+        /* Vectors from https://csrc.nist.gov/csrc/media/projects/ */
+        { 64, 28, 8,
+          "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
+          "\x11\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f\x20\x21"
+          "\x22\x23\x24\x25\x26\x27\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f\x30\x31\x32"
+          "\x33\x34\x35\x36\x37\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f",
+          "\x53\x61\x6d\x70\x6c\x65\x20\x6d\x65\x73\x73\x61\x67\x65\x20\x66\x6f"
+          "\x72\x20\x6b\x65\x79\x6c\x65\x6e\x3d\x62\x6c\x6f\x63\x6b\x6c\x65"
+          "\x6e",
+          "\xc7\x40\x5e\x3a\xe0\x58\xe8\xcd\x30\xb0\x8b\x41\x40\x24\x85\x81\xed"
+          "\x17\x4c\xb3\x4e\x12\x24\xbc\xc1\xef\xc8\x1b",
+          1, 272, NULL, 0 },
+        { 0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0 }
+};
diff --git a/test/kat-app/hmac_sha256.json.c b/test/kat-app/hmac_sha256.json.c
new file mode 100644
index 00000000..1fa1a90a
--- /dev/null
+++ b/test/kat-app/hmac_sha256.json.c
@@ -0,0 +1,120 @@
+/*****************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************/
+
+/* HMACSHA256, 0.8rc21 */
+#include "mac_test.h"
+const struct mac_test hmac_sha256_test_kat_json[] = {
+        /* Vectors from https://tools.ietf.org/html/rfc4231 */
+        { 20, 32, 1,
+          "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b"
+          "\x0b\x0b\x0b",
+          "\x48\x69\x20\x54\x68\x65\x72\x65",
+          "\xb0\x34\x4c\x61\xd8\xdb\x38\x53\x5c\xa8\xaf\xce\xaf\x0b\xf1\x2b\x88"
+          "\x1d\xc2\x00\xc9\x83\x3d\xa7\x26\xe9\x37\x6c\x2e\x32\xcf\xf7",
+          1, 64, NULL, 0 },
+        { 4, 32, 2, "\x4a\x65\x66\x65",
+          "\x77\x68\x61\x74\x20\x64\x6f\x20\x79\x61\x20\x77\x61\x6e\x74\x20\x66"
+          "\x6f\x72\x20\x6e\x6f\x74\x68\x69\x6e\x67\x3f",
+          "\x5b\xdc\xc1\x46\xbf\x60\x75\x4e\x6a\x04\x24\x26\x08\x95\x75\xc7\x5a"
+          "\x00\x3f\x08\x9d\x27\x39\x83\x9d\xec\x58\xb9\x64\xec\x38\x43",
+          1, 224, NULL, 0 },
+        { 20, 32, 3,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa",
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
+          "\x77\x3e\xa9\x1e\x36\x80\x0e\x46\x85\x4d\xb8\xeb\xd0\x91\x81\xa7\x29"
+          "\x59\x09\x8b\x3e\xf8\xc1\x22\xd9\x63\x55\x14\xce\xd5\x65\xfe",
+          1, 400, NULL, 0 },
+        { 25, 32, 4,
+          "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11"
+          "\x12\x13\x14\x15\x16\x17\x18\x19",
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
+          "\x82\x55\x8a\x38\x9a\x44\x3c\x0e\xa4\xcc\x81\x98\x99\xf2\x08\x3a\x85"
+          "\xf0\xfa\xa3\xe5\x78\xf8\x07\x7a\x2e\x3f\xf4\x67\x29\x66\x5b",
+          1, 400, NULL, 0 },
+        { 20, 16, 5,
+          "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c"
+          "\x0c\x0c\x0c",
+          "\x54\x65\x73\x74\x20\x57\x69\x74\x68\x20\x54\x72\x75\x6e\x63\x61\x74"
+          "\x69\x6f\x6e",
+          "\xa3\xb6\x16\x74\x73\x10\x0e\xe0\x6e\x0c\x79\x6c\x29\x55\x55\x2b",
+          1, 160, NULL, 0 },
+        { 131, 32, 6,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+          "\x54\x65\x73\x74\x20\x55\x73\x69\x6e\x67\x20\x4c\x61\x72\x67\x65\x72"
+          "\x20\x54\x68\x61\x6e\x20\x42\x6c\x6f\x63\x6b\x2d\x53\x69\x7a\x65\x20"
+          "\x4b\x65\x79\x20\x2d\x20\x48\x61\x73\x68\x20\x4b\x65\x79\x20\x46\x69"
+          "\x72\x73\x74",
+          "\x60\xe4\x31\x59\x1e\xe0\xb6\x7f\x0d\x8a\x26\xaa\xcb\xf5\xb7\x7f\x8e"
+          "\x0b\xc6\x21\x37\x28\xc5\x14\x05\x46\x04\x0f\x0e\xe3\x7f\x54",
+          1, 432, NULL, 0 },
+        { 131, 32, 7,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+          "\x54\x68\x69\x73\x20\x69\x73\x20\x61\x20\x74\x65\x73\x74\x20\x75\x73"
+          "\x69\x6e\x67\x20\x61\x20\x6c\x61\x72\x67\x65\x72\x20\x74\x68\x61\x6e"
+          "\x20\x62\x6c\x6f\x63\x6b\x2d\x73\x69\x7a\x65\x20\x6b\x65\x79\x20\x61"
+          "\x6e\x64\x20\x61\x20\x6c\x61\x72\x67\x65\x72\x20\x74\x68\x61\x6e\x20"
+          "\x62\x6c\x6f\x63\x6b\x2d\x73\x69\x7a\x65\x20\x64\x61\x74\x61\x2e\x20"
+          "\x54\x68\x65\x20\x6b\x65\x79\x20\x6e\x65\x65\x64\x73\x20\x74\x6f\x20"
+          "\x62\x65\x20\x68\x61\x73\x68\x65\x64\x20\x62\x65\x66\x6f\x72\x65\x20"
+          "\x62\x65\x69\x6e\x67\x20\x75\x73\x65\x64\x20\x62\x79\x20\x74\x68\x65"
+          "\x20\x48\x4d\x41\x43\x20\x61\x6c\x67\x6f\x72\x69\x74\x68\x6d\x2e",
+          "\x9b\x09\xff\xa7\x1b\x94\x2f\xcb\x27\x63\x5f\xbc\xd5\xb0\xe9\x44\xbf"
+          "\xdc\x63\x64\x4f\x07\x13\x93\x8a\x7f\x51\x53\x5c\x3a\x35\xe2",
+          1, 1216, NULL, 0 },
+        /* Vectors from https://csrc.nist.gov/csrc/media/projects/ */
+        { 64, 32, 8,
+          "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
+          "\x11\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f\x20\x21"
+          "\x22\x23\x24\x25\x26\x27\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f\x30\x31\x32"
+          "\x33\x34\x35\x36\x37\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f",
+          "\x53\x61\x6d\x70\x6c\x65\x20\x6d\x65\x73\x73\x61\x67\x65\x20\x66\x6f"
+          "\x72\x20\x6b\x65\x79\x6c\x65\x6e\x3d\x62\x6c\x6f\x63\x6b\x6c\x65"
+          "\x6e",
+          "\x8b\xb9\xa1\xdb\x98\x06\xf2\x0d\xf7\xf7\x7b\x82\x13\x8c\x79\x14\xd1"
+          "\x74\xd5\x9e\x13\xdc\x4d\x01\x69\xc9\x05\x7b\x13\x3e\x1d\x62",
+          1, 272, NULL, 0 },
+        { 0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0 }
+};
diff --git a/test/kat-app/hmac_sha256_sha512_test.c b/test/kat-app/hmac_sha256_sha512_test.c
index 0bef9ee1..52c04cb0 100644
--- a/test/kat-app/hmac_sha256_sha512_test.c
+++ b/test/kat-app/hmac_sha256_sha512_test.c
@@ -33,728 +33,19 @@
 #include <intel-ipsec-mb.h>
 #include "gcm_ctr_vectors_test.h"
 #include "utils.h"
+#include "mac_test.h"
 
 #define max_burst_jobs 32
 
 int hmac_sha256_sha512_test(struct IMB_MGR *mb_mgr);
 
-/*
- * Test vectors from https://tools.ietf.org/html/rfc4231
- */
-
-/*
- * 4.2.  Test Case 1
- *
- *    Key =          0b0b0b0b0b0b0b0b0b0b0b0b0b0b0b0b
- *                   0b0b0b0b                          (20 bytes)
- *    Data =         4869205468657265                  ("Hi There")
- *
- *    HMAC-SHA-224 = 896fb1128abbdf196832107cd49df33f
- *                   47b4b1169912ba4f53684b22
- *    HMAC-SHA-256 = b0344c61d8db38535ca8afceaf0bf12b
- *                   881dc200c9833da726e9376c2e32cff7
- *    HMAC-SHA-384 = afd03944d84895626b0825f4ab46907f
- *                   15f9dadbe4101ec682aa034c7cebc59c
- *                   faea9ea9076ede7f4af152e8b2fa9cb6
- *    HMAC-SHA-512 = 87aa7cdea5ef619d4ff0b4241a1d6cb0
- *                   2379f4e2ce4ec2787ad0b30545e17cde
- *                   daa833b7d6b8a702038b274eaea3f4e4
- *                   be9d914eeb61f1702e696c203a126854
- */
-static const uint8_t key_1[] = {
-        0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
-        0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
-        0x0b, 0x0b, 0x0b, 0x0b
-};
-static const uint8_t data_1[] = {
-        0x48, 0x69, 0x20, 0x54, 0x68, 0x65, 0x72, 0x65
-};
-static const uint8_t hmac_sha_224_1[] = {
-        0x89, 0x6f, 0xb1, 0x12, 0x8a, 0xbb, 0xdf, 0x19,
-        0x68, 0x32, 0x10, 0x7c, 0xd4, 0x9d, 0xf3, 0x3f,
-        0x47, 0xb4, 0xb1, 0x16, 0x99, 0x12, 0xba, 0x4f,
-        0x53, 0x68, 0x4b, 0x22
-};
-static const uint8_t hmac_sha_256_1[] = {
-        0xb0, 0x34, 0x4c, 0x61, 0xd8, 0xdb, 0x38, 0x53,
-        0x5c, 0xa8, 0xaf, 0xce, 0xaf, 0x0b, 0xf1, 0x2b,
-        0x88, 0x1d, 0xc2, 0x00, 0xc9, 0x83, 0x3d, 0xa7,
-        0x26, 0xe9, 0x37, 0x6c, 0x2e, 0x32, 0xcf, 0xf7
-};
-static const uint8_t hmac_sha_384_1[] = {
-        0xaf, 0xd0, 0x39, 0x44, 0xd8, 0x48, 0x95, 0x62,
-        0x6b, 0x08, 0x25, 0xf4, 0xab, 0x46, 0x90, 0x7f,
-        0x15, 0xf9, 0xda, 0xdb, 0xe4, 0x10, 0x1e, 0xc6,
-        0x82, 0xaa, 0x03, 0x4c, 0x7c, 0xeb, 0xc5, 0x9c,
-        0xfa, 0xea, 0x9e, 0xa9, 0x07, 0x6e, 0xde, 0x7f,
-        0x4a, 0xf1, 0x52, 0xe8, 0xb2, 0xfa, 0x9c, 0xb6
-};
-static const uint8_t hmac_sha_512_1[] = {
-        0x87, 0xaa, 0x7c, 0xde, 0xa5, 0xef, 0x61, 0x9d,
-        0x4f, 0xf0, 0xb4, 0x24, 0x1a, 0x1d, 0x6c, 0xb0,
-        0x23, 0x79, 0xf4, 0xe2, 0xce, 0x4e, 0xc2, 0x78,
-        0x7a, 0xd0, 0xb3, 0x05, 0x45, 0xe1, 0x7c, 0xde,
-        0xda, 0xa8, 0x33, 0xb7, 0xd6, 0xb8, 0xa7, 0x02,
-        0x03, 0x8b, 0x27, 0x4e, 0xae, 0xa3, 0xf4, 0xe4,
-        0xbe, 0x9d, 0x91, 0x4e, 0xeb, 0x61, 0xf1, 0x70,
-        0x2e, 0x69, 0x6c, 0x20, 0x3a, 0x12, 0x68, 0x54
-};
-
-/*
- * 4.3.  Test Case 2
- *
- *    Test with a key shorter than the length of the HMAC output.
- *
- *    Key =          4a656665                          ("Jefe")
- *    Data =         7768617420646f2079612077616e7420  ("what do ya want ")
- *                   666f72206e6f7468696e673f          ("for nothing?")
- *
- *    HMAC-SHA-224 = a30e01098bc6dbbf45690f3a7e9e6d0f
- *                   8bbea2a39e6148008fd05e44
- *    HMAC-SHA-256 = 5bdcc146bf60754e6a042426089575c7
- *                   5a003f089d2739839dec58b964ec3843
- *    HMAC-SHA-384 = af45d2e376484031617f78d2b58a6b1b
- *                   9c7ef464f5a01b47e42ec3736322445e
- *                   8e2240ca5e69e2c78b3239ecfab21649
- *    HMAC-SHA-512 = 164b7a7bfcf819e2e395fbe73b56e0a3
- *                   87bd64222e831fd610270cd7ea250554
- *                   9758bf75c05a994a6d034f65f8f0e6fd
- *                   caeab1a34d4a6b4b636e070a38bce737
- */
-static const uint8_t key_2[] = {
-        0x4a, 0x65, 0x66, 0x65
-};
-static const uint8_t data_2[] = {
-        0x77, 0x68, 0x61, 0x74, 0x20, 0x64, 0x6f, 0x20,
-        0x79, 0x61, 0x20, 0x77, 0x61, 0x6e, 0x74, 0x20,
-        0x66, 0x6f, 0x72, 0x20, 0x6e, 0x6f, 0x74, 0x68,
-        0x69, 0x6e, 0x67, 0x3f
-};
-static const uint8_t hmac_sha_224_2[] = {
-        0xa3, 0x0e, 0x01, 0x09, 0x8b, 0xc6, 0xdb, 0xbf,
-        0x45, 0x69, 0x0f, 0x3a, 0x7e, 0x9e, 0x6d, 0x0f,
-        0x8b, 0xbe, 0xa2, 0xa3, 0x9e, 0x61, 0x48, 0x00,
-        0x8f, 0xd0, 0x5e, 0x44
-};
-static const uint8_t hmac_sha_256_2[] = {
-        0x5b, 0xdc, 0xc1, 0x46, 0xbf, 0x60, 0x75, 0x4e,
-        0x6a, 0x04, 0x24, 0x26, 0x08, 0x95, 0x75, 0xc7,
-        0x5a, 0x00, 0x3f, 0x08, 0x9d, 0x27, 0x39, 0x83,
-        0x9d, 0xec, 0x58, 0xb9, 0x64, 0xec, 0x38, 0x43
-};
-static const uint8_t hmac_sha_384_2[] = {
-        0xaf, 0x45, 0xd2, 0xe3, 0x76, 0x48, 0x40, 0x31,
-        0x61, 0x7f, 0x78, 0xd2, 0xb5, 0x8a, 0x6b, 0x1b,
-        0x9c, 0x7e, 0xf4, 0x64, 0xf5, 0xa0, 0x1b, 0x47,
-        0xe4, 0x2e, 0xc3, 0x73, 0x63, 0x22, 0x44, 0x5e,
-        0x8e, 0x22, 0x40, 0xca, 0x5e, 0x69, 0xe2, 0xc7,
-        0x8b, 0x32, 0x39, 0xec, 0xfa, 0xb2, 0x16, 0x49
-};
-static const uint8_t hmac_sha_512_2[] = {
-        0x16, 0x4b, 0x7a, 0x7b, 0xfc, 0xf8, 0x19, 0xe2,
-        0xe3, 0x95, 0xfb, 0xe7, 0x3b, 0x56, 0xe0, 0xa3,
-        0x87, 0xbd, 0x64, 0x22, 0x2e, 0x83, 0x1f, 0xd6,
-        0x10, 0x27, 0x0c, 0xd7, 0xea, 0x25, 0x05, 0x54,
-        0x97, 0x58, 0xbf, 0x75, 0xc0, 0x5a, 0x99, 0x4a,
-        0x6d, 0x03, 0x4f, 0x65, 0xf8, 0xf0, 0xe6, 0xfd,
-        0xca, 0xea, 0xb1, 0xa3, 0x4d, 0x4a, 0x6b, 0x4b,
-        0x63, 0x6e, 0x07, 0x0a, 0x38, 0xbc, 0xe7, 0x37
-};
-
-/*
- * 4.4.  Test Case 3
- *
- *    Test with a combined length of key and data that is larger than 64
- *    bytes (= block-size of SHA-224 and SHA-256).
- *
- *    Key            aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaa                          (20 bytes)
- *    Data =         dddddddddddddddddddddddddddddddd
- *                   dddddddddddddddddddddddddddddddd
- *                   dddddddddddddddddddddddddddddddd
- *                   dddd                              (50 bytes)
- *
- *    HMAC-SHA-224 = 7fb3cb3588c6c1f6ffa9694d7d6ad264
- *                   9365b0c1f65d69d1ec8333ea
- *    HMAC-SHA-256 = 773ea91e36800e46854db8ebd09181a7
- *                   2959098b3ef8c122d9635514ced565fe
- *    HMAC-SHA-384 = 88062608d3e6ad8a0aa2ace014c8a86f
- *                   0aa635d947ac9febe83ef4e55966144b
- *                   2a5ab39dc13814b94e3ab6e101a34f27
- *    HMAC-SHA-512 = fa73b0089d56a284efb0f0756c890be9
- *                   b1b5dbdd8ee81a3655f83e33b2279d39
- *                   bf3e848279a722c806b485a47e67c807
- *                   b946a337bee8942674278859e13292fb
- */
-static const uint8_t key_3[] = {
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa
-};
-static const uint8_t data_3[] = {
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd
-};
-static const uint8_t hmac_sha_224_3[] = {
-        0x7f, 0xb3, 0xcb, 0x35, 0x88, 0xc6, 0xc1, 0xf6,
-        0xff, 0xa9, 0x69, 0x4d, 0x7d, 0x6a, 0xd2, 0x64,
-        0x93, 0x65, 0xb0, 0xc1, 0xf6, 0x5d, 0x69, 0xd1,
-        0xec, 0x83, 0x33, 0xea
-};
-static const uint8_t hmac_sha_256_3[] = {
-        0x77, 0x3e, 0xa9, 0x1e, 0x36, 0x80, 0x0e, 0x46,
-        0x85, 0x4d, 0xb8, 0xeb, 0xd0, 0x91, 0x81, 0xa7,
-        0x29, 0x59, 0x09, 0x8b, 0x3e, 0xf8, 0xc1, 0x22,
-        0xd9, 0x63, 0x55, 0x14, 0xce, 0xd5, 0x65, 0xfe
-};
-static const uint8_t hmac_sha_384_3[] = {
-        0x88, 0x06, 0x26, 0x08, 0xd3, 0xe6, 0xad, 0x8a,
-        0x0a, 0xa2, 0xac, 0xe0, 0x14, 0xc8, 0xa8, 0x6f,
-        0x0a, 0xa6, 0x35, 0xd9, 0x47, 0xac, 0x9f, 0xeb,
-        0xe8, 0x3e, 0xf4, 0xe5, 0x59, 0x66, 0x14, 0x4b,
-        0x2a, 0x5a, 0xb3, 0x9d, 0xc1, 0x38, 0x14, 0xb9,
-        0x4e, 0x3a, 0xb6, 0xe1, 0x01, 0xa3, 0x4f, 0x27
-};
-static const uint8_t hmac_sha_512_3[] = {
-        0xfa, 0x73, 0xb0, 0x08, 0x9d, 0x56, 0xa2, 0x84,
-        0xef, 0xb0, 0xf0, 0x75, 0x6c, 0x89, 0x0b, 0xe9,
-        0xb1, 0xb5, 0xdb, 0xdd, 0x8e, 0xe8, 0x1a, 0x36,
-        0x55, 0xf8, 0x3e, 0x33, 0xb2, 0x27, 0x9d, 0x39,
-        0xbf, 0x3e, 0x84, 0x82, 0x79, 0xa7, 0x22, 0xc8,
-        0x06, 0xb4, 0x85, 0xa4, 0x7e, 0x67, 0xc8, 0x07,
-        0xb9, 0x46, 0xa3, 0x37, 0xbe, 0xe8, 0x94, 0x26,
-        0x74, 0x27, 0x88, 0x59, 0xe1, 0x32, 0x92, 0xfb
-};
-
-/*
- * 4.5.  Test Case 4
- *
- *    Test with a combined length of key and data that is larger than 64
- *    bytes (= block-size of SHA-224 and SHA-256).
- *
- *    Key =          0102030405060708090a0b0c0d0e0f10
- *                   111213141516171819                (25 bytes)
- *    Data =         cdcdcdcdcdcdcdcdcdcdcdcdcdcdcdcd
- *                   cdcdcdcdcdcdcdcdcdcdcdcdcdcdcdcd
- *                   cdcdcdcdcdcdcdcdcdcdcdcdcdcdcdcd
- *                   cdcd                              (50 bytes)
- *
- *    HMAC-SHA-224 = 6c11506874013cac6a2abc1bb382627c
- *                   ec6a90d86efc012de7afec5a
- *    HMAC-SHA-256 = 82558a389a443c0ea4cc819899f2083a
- *                   85f0faa3e578f8077a2e3ff46729665b
- *    HMAC-SHA-384 = 3e8a69b7783c25851933ab6290af6ca7
- *                   7a9981480850009cc5577c6e1f573b4e
- *                   6801dd23c4a7d679ccf8a386c674cffb
- *    HMAC-SHA-512 = b0ba465637458c6990e5a8c5f61d4af7
- *                   e576d97ff94b872de76f8050361ee3db
- *                   a91ca5c11aa25eb4d679275cc5788063
- *                   a5f19741120c4f2de2adebeb10a298dd
- */
-static const uint8_t key_4[] = {
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10,
-        0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
-        0x19
-};
-static const uint8_t data_4[] = {
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd
-};
-static const uint8_t hmac_sha_224_4[] = {
-        0x6c, 0x11, 0x50, 0x68, 0x74, 0x01, 0x3c, 0xac,
-        0x6a, 0x2a, 0xbc, 0x1b, 0xb3, 0x82, 0x62, 0x7c,
-        0xec, 0x6a, 0x90, 0xd8, 0x6e, 0xfc, 0x01, 0x2d,
-        0xe7, 0xaf, 0xec, 0x5a
-};
-static const uint8_t hmac_sha_256_4[] = {
-        0x82, 0x55, 0x8a, 0x38, 0x9a, 0x44, 0x3c, 0x0e,
-        0xa4, 0xcc, 0x81, 0x98, 0x99, 0xf2, 0x08, 0x3a,
-        0x85, 0xf0, 0xfa, 0xa3, 0xe5, 0x78, 0xf8, 0x07,
-        0x7a, 0x2e, 0x3f, 0xf4, 0x67, 0x29, 0x66, 0x5b
-};
-static const uint8_t hmac_sha_384_4[] = {
-        0x3e, 0x8a, 0x69, 0xb7, 0x78, 0x3c, 0x25, 0x85,
-        0x19, 0x33, 0xab, 0x62, 0x90, 0xaf, 0x6c, 0xa7,
-        0x7a, 0x99, 0x81, 0x48, 0x08, 0x50, 0x00, 0x9c,
-        0xc5, 0x57, 0x7c, 0x6e, 0x1f, 0x57, 0x3b, 0x4e,
-        0x68, 0x01, 0xdd, 0x23, 0xc4, 0xa7, 0xd6, 0x79,
-        0xcc, 0xf8, 0xa3, 0x86, 0xc6, 0x74, 0xcf, 0xfb
-};
-static const uint8_t hmac_sha_512_4[] = {
-        0xb0, 0xba, 0x46, 0x56, 0x37, 0x45, 0x8c, 0x69,
-        0x90, 0xe5, 0xa8, 0xc5, 0xf6, 0x1d, 0x4a, 0xf7,
-        0xe5, 0x76, 0xd9, 0x7f, 0xf9, 0x4b, 0x87, 0x2d,
-        0xe7, 0x6f, 0x80, 0x50, 0x36, 0x1e, 0xe3, 0xdb,
-        0xa9, 0x1c, 0xa5, 0xc1, 0x1a, 0xa2, 0x5e, 0xb4,
-        0xd6, 0x79, 0x27, 0x5c, 0xc5, 0x78, 0x80, 0x63,
-        0xa5, 0xf1, 0x97, 0x41, 0x12, 0x0c, 0x4f, 0x2d,
-        0xe2, 0xad, 0xeb, 0xeb, 0x10, 0xa2, 0x98, 0xdd
-};
-
-/*
- *
- * 4.6.  Test Case 5
- *
- *    Test with a truncation of output to 128 bits.
- *
- *    Key =          0c0c0c0c0c0c0c0c0c0c0c0c0c0c0c0c
- *                   0c0c0c0c                          (20 bytes)
- *    Data =         546573742057697468205472756e6361  ("Test With Trunca")
- *                   74696f6e                          ("tion")
- *
- *    HMAC-SHA-224 = 0e2aea68a90c8d37c988bcdb9fca6fa8
- *    HMAC-SHA-256 = a3b6167473100ee06e0c796c2955552b
- *    HMAC-SHA-384 = 3abf34c3503b2a23a46efc619baef897
- *    HMAC-SHA-512 = 415fad6271580a531d4179bc891d87a6
- */
-/* static const uint8_t key_5[] = { */
-/*         0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, */
-/*         0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, */
-/*         0x0c, 0x0c, 0x0c, 0x0c */
-/* }; */
-/* static const uint8_t data_5[] = { */
-/*         0x54, 0x65, 0x73, 0x74, 0x20, 0x57, 0x69, 0x74, */
-/*         0x68, 0x20, 0x54, 0x72, 0x75, 0x6e, 0x63, 0x61, */
-/*         0x74, 0x69, 0x6f, 0x6e */
-/* }; */
-/* static const uint8_t hmac_sha_224_5[] = { */
-/*         0x0e, 0x2a, 0xea, 0x68, 0xa9, 0x0c, 0x8d, 0x37, */
-/*         0xc9, 0x88, 0xbc, 0xdb, 0x9f, 0xca, 0x6f, 0xa8 */
-/* }; */
-/* static const uint8_t hmac_sha_256_5[] = { */
-/*         0xa3, 0xb6, 0x16, 0x74, 0x73, 0x10, 0x0e, 0xe0, */
-/*         0x6e, 0x0c, 0x79, 0x6c, 0x29, 0x55, 0x55, 0x2b */
-/* }; */
-/* static const uint8_t hmac_sha_384_5[] = { */
-/*         0x3a, 0xbf, 0x34, 0xc3, 0x50, 0x3b, 0x2a, 0x23, */
-/*         0xa4, 0x6e, 0xfc, 0x61, 0x9b, 0xae, 0xf8, 0x97 */
-/* }; */
-/* static const uint8_t hmac_sha_512_5[] = { */
-/*         0x41, 0x5f, 0xad, 0x62, 0x71, 0x58, 0x0a, 0x53, */
-/*         0x1d, 0x41, 0x79, 0xbc, 0x89, 0x1d, 0x87, 0xa6 */
-/* }; */
-
-/*
- * 4.7.  Test Case 6
- *
- *    Test with a key larger than 128 bytes (= block-size of SHA-384 and
- *    SHA-512).
- *
- *    Key =          aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaa                            (131 bytes)
- *    Data =         54657374205573696e67204c61726765  ("Test Using Large")
- *                   72205468616e20426c6f636b2d53697a  ("r Than Block-Siz")
- *                   65204b6579202d2048617368204b6579  ("e Key - Hash Key")
- *                   204669727374                      (" First")
- *
- *    HMAC-SHA-224 = 95e9a0db962095adaebe9b2d6f0dbce2
- *                   d499f112f2d2b7273fa6870e
- *    HMAC-SHA-256 = 60e431591ee0b67f0d8a26aacbf5b77f
- *                   8e0bc6213728c5140546040f0ee37f54
- *    HMAC-SHA-384 = 4ece084485813e9088d2c63a041bc5b4
- *                   4f9ef1012a2b588f3cd11f05033ac4c6
- *                   0c2ef6ab4030fe8296248df163f44952
- *    HMAC-SHA-512 = 80b24263c7c1a3ebb71493c1dd7be8b4
- *                   9b46d1f41b4aeec1121b013783f8f352
- *                   6b56d037e05f2598bd0fd2215d6a1e52
- *                   95e64f73f63f0aec8b915a985d786598
- */
-static const uint8_t key_6[] = {
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa
-};
-static const uint8_t data_6[] = {
-        0x54, 0x65, 0x73, 0x74, 0x20, 0x55, 0x73, 0x69,
-        0x6e, 0x67, 0x20, 0x4c, 0x61, 0x72, 0x67, 0x65,
-        0x72, 0x20, 0x54, 0x68, 0x61, 0x6e, 0x20, 0x42,
-        0x6c, 0x6f, 0x63, 0x6b, 0x2d, 0x53, 0x69, 0x7a,
-        0x65, 0x20, 0x4b, 0x65, 0x79, 0x20, 0x2d, 0x20,
-        0x48, 0x61, 0x73, 0x68, 0x20, 0x4b, 0x65, 0x79,
-        0x20, 0x46, 0x69, 0x72, 0x73, 0x74
-};
-static const uint8_t hmac_sha_224_6[] = {
-        0x95, 0xe9, 0xa0, 0xdb, 0x96, 0x20, 0x95, 0xad,
-        0xae, 0xbe, 0x9b, 0x2d, 0x6f, 0x0d, 0xbc, 0xe2,
-        0xd4, 0x99, 0xf1, 0x12, 0xf2, 0xd2, 0xb7, 0x27,
-        0x3f, 0xa6, 0x87, 0x0e
-};
-static const uint8_t hmac_sha_256_6[] = {
-        0x60, 0xe4, 0x31, 0x59, 0x1e, 0xe0, 0xb6, 0x7f,
-        0x0d, 0x8a, 0x26, 0xaa, 0xcb, 0xf5, 0xb7, 0x7f,
-        0x8e, 0x0b, 0xc6, 0x21, 0x37, 0x28, 0xc5, 0x14,
-        0x05, 0x46, 0x04, 0x0f, 0x0e, 0xe3, 0x7f, 0x54
-};
-static const uint8_t hmac_sha_384_6[] = {
-        0x4e, 0xce, 0x08, 0x44, 0x85, 0x81, 0x3e, 0x90,
-        0x88, 0xd2, 0xc6, 0x3a, 0x04, 0x1b, 0xc5, 0xb4,
-        0x4f, 0x9e, 0xf1, 0x01, 0x2a, 0x2b, 0x58, 0x8f,
-        0x3c, 0xd1, 0x1f, 0x05, 0x03, 0x3a, 0xc4, 0xc6,
-        0x0c, 0x2e, 0xf6, 0xab, 0x40, 0x30, 0xfe, 0x82,
-        0x96, 0x24, 0x8d, 0xf1, 0x63, 0xf4, 0x49, 0x52
-};
-static const uint8_t hmac_sha_512_6[] = {
-        0x80, 0xb2, 0x42, 0x63, 0xc7, 0xc1, 0xa3, 0xeb,
-        0xb7, 0x14, 0x93, 0xc1, 0xdd, 0x7b, 0xe8, 0xb4,
-        0x9b, 0x46, 0xd1, 0xf4, 0x1b, 0x4a, 0xee, 0xc1,
-        0x12, 0x1b, 0x01, 0x37, 0x83, 0xf8, 0xf3, 0x52,
-        0x6b, 0x56, 0xd0, 0x37, 0xe0, 0x5f, 0x25, 0x98,
-        0xbd, 0x0f, 0xd2, 0x21, 0x5d, 0x6a, 0x1e, 0x52,
-        0x95, 0xe6, 0x4f, 0x73, 0xf6, 0x3f, 0x0a, 0xec,
-        0x8b, 0x91, 0x5a, 0x98, 0x5d, 0x78, 0x65, 0x98
-};
-
-/*
- * 4.8.  Test Case 7
- *
- *    Test with a key and data that is larger than 128 bytes (= block-size
- *    of SHA-384 and SHA-512).
- *
- *    Key =          aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *                   aaaaaa                            (131 bytes)
- *    Data =         54686973206973206120746573742075  ("This is a test u")
- *                   73696e672061206c6172676572207468  ("sing a larger th")
- *                   616e20626c6f636b2d73697a65206b65  ("an block-size ke")
- *                   7920616e642061206c61726765722074  ("y and a larger t")
- *                   68616e20626c6f636b2d73697a652064  ("han block-size d")
- *                   6174612e20546865206b6579206e6565  ("ata. The key nee")
- *                   647320746f2062652068617368656420  ("ds to be hashed ")
- *                   6265666f7265206265696e6720757365  ("before being use")
- *                   642062792074686520484d414320616c  ("d by the HMAC al")
- *                   676f726974686d2e                  ("gorithm.")
- *
- *    HMAC-SHA-224 = 3a854166ac5d9f023f54d517d0b39dbd
- *                   946770db9c2b95c9f6f565d1
- *    HMAC-SHA-256 = 9b09ffa71b942fcb27635fbcd5b0e944
- *                   bfdc63644f0713938a7f51535c3a35e2
- *    HMAC-SHA-384 = 6617178e941f020d351e2f254e8fd32c
- *                   602420feb0b8fb9adccebb82461e99c5
- *                   a678cc31e799176d3860e6110c46523e
- *    HMAC-SHA-512 = e37b6a775dc87dbaa4dfa9f96e5e3ffd
- *                   debd71f8867289865df5a32d20cdc944
- *                   b6022cac3c4982b10d5eeb55c3e4de15
- *                   134676fb6de0446065c97440fa8c6a58
- */
-static const uint8_t key_7[] = {
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa
-};
-static const uint8_t data_7[] = {
-        0x54, 0x68, 0x69, 0x73, 0x20, 0x69, 0x73, 0x20,
-        0x61, 0x20, 0x74, 0x65, 0x73, 0x74, 0x20, 0x75,
-        0x73, 0x69, 0x6e, 0x67, 0x20, 0x61, 0x20, 0x6c,
-        0x61, 0x72, 0x67, 0x65, 0x72, 0x20, 0x74, 0x68,
-        0x61, 0x6e, 0x20, 0x62, 0x6c, 0x6f, 0x63, 0x6b,
-        0x2d, 0x73, 0x69, 0x7a, 0x65, 0x20, 0x6b, 0x65,
-        0x79, 0x20, 0x61, 0x6e, 0x64, 0x20, 0x61, 0x20,
-        0x6c, 0x61, 0x72, 0x67, 0x65, 0x72, 0x20, 0x74,
-        0x68, 0x61, 0x6e, 0x20, 0x62, 0x6c, 0x6f, 0x63,
-        0x6b, 0x2d, 0x73, 0x69, 0x7a, 0x65, 0x20, 0x64,
-        0x61, 0x74, 0x61, 0x2e, 0x20, 0x54, 0x68, 0x65,
-        0x20, 0x6b, 0x65, 0x79, 0x20, 0x6e, 0x65, 0x65,
-        0x64, 0x73, 0x20, 0x74, 0x6f, 0x20, 0x62, 0x65,
-        0x20, 0x68, 0x61, 0x73, 0x68, 0x65, 0x64, 0x20,
-        0x62, 0x65, 0x66, 0x6f, 0x72, 0x65, 0x20, 0x62,
-        0x65, 0x69, 0x6e, 0x67, 0x20, 0x75, 0x73, 0x65,
-        0x64, 0x20, 0x62, 0x79, 0x20, 0x74, 0x68, 0x65,
-        0x20, 0x48, 0x4d, 0x41, 0x43, 0x20, 0x61, 0x6c,
-        0x67, 0x6f, 0x72, 0x69, 0x74, 0x68, 0x6d, 0x2e
-};
-static const uint8_t hmac_sha_224_7[] = {
-        0x3a, 0x85, 0x41, 0x66, 0xac, 0x5d, 0x9f, 0x02,
-        0x3f, 0x54, 0xd5, 0x17, 0xd0, 0xb3, 0x9d, 0xbd,
-        0x94, 0x67, 0x70, 0xdb, 0x9c, 0x2b, 0x95, 0xc9,
-        0xf6, 0xf5, 0x65, 0xd1
-};
-static const uint8_t hmac_sha_256_7[] = {
-        0x9b, 0x09, 0xff, 0xa7, 0x1b, 0x94, 0x2f, 0xcb,
-        0x27, 0x63, 0x5f, 0xbc, 0xd5, 0xb0, 0xe9, 0x44,
-        0xbf, 0xdc, 0x63, 0x64, 0x4f, 0x07, 0x13, 0x93,
-        0x8a, 0x7f, 0x51, 0x53, 0x5c, 0x3a, 0x35, 0xe2
-};
-static const uint8_t hmac_sha_384_7[] = {
-        0x66, 0x17, 0x17, 0x8e, 0x94, 0x1f, 0x02, 0x0d,
-        0x35, 0x1e, 0x2f, 0x25, 0x4e, 0x8f, 0xd3, 0x2c,
-        0x60, 0x24, 0x20, 0xfe, 0xb0, 0xb8, 0xfb, 0x9a,
-        0xdc, 0xce, 0xbb, 0x82, 0x46, 0x1e, 0x99, 0xc5,
-        0xa6, 0x78, 0xcc, 0x31, 0xe7, 0x99, 0x17, 0x6d,
-        0x38, 0x60, 0xe6, 0x11, 0x0c, 0x46, 0x52, 0x3e
-};
-static const uint8_t hmac_sha_512_7[] = {
-        0xe3, 0x7b, 0x6a, 0x77, 0x5d, 0xc8, 0x7d, 0xba,
-        0xa4, 0xdf, 0xa9, 0xf9, 0x6e, 0x5e, 0x3f, 0xfd,
-        0xde, 0xbd, 0x71, 0xf8, 0x86, 0x72, 0x89, 0x86,
-        0x5d, 0xf5, 0xa3, 0x2d, 0x20, 0xcd, 0xc9, 0x44,
-        0xb6, 0x02, 0x2c, 0xac, 0x3c, 0x49, 0x82, 0xb1,
-        0x0d, 0x5e, 0xeb, 0x55, 0xc3, 0xe4, 0xde, 0x15,
-        0x13, 0x46, 0x76, 0xfb, 0x6d, 0xe0, 0x44, 0x60,
-        0x65, 0xc9, 0x74, 0x40, 0xfa, 0x8c, 0x6a, 0x58
-};
-
-/*
- * Test Case 8
- *
- * Test vector from https://csrc.nist.gov/csrc/media/projects/
- * cryptographic-standards-and-guidelines/documents/examples/hmac_sha224.pdf
- */
-static const uint8_t key_8[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
-        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-        0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
-        0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
-        0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f
-};
-static const uint8_t data_8[] = {
-        0x53, 0x61, 0x6d, 0x70, 0x6c, 0x65, 0x20, 0x6d,
-        0x65, 0x73, 0x73, 0x61, 0x67, 0x65, 0x20, 0x66,
-        0x6f, 0x72, 0x20, 0x6b, 0x65, 0x79, 0x6c, 0x65,
-        0x6e, 0x3d, 0x62, 0x6c, 0x6f, 0x63, 0x6b, 0x6c,
-        0x65, 0x6e
-};
-static const uint8_t hmac_sha_224_8[] = {
-        0xc7, 0x40, 0x5e, 0x3a, 0xe0, 0x58, 0xe8, 0xcd,
-        0x30, 0xb0, 0x8b, 0x41, 0x40, 0x24, 0x85, 0x81,
-        0xed, 0x17, 0x4c, 0xb3, 0x4e, 0x12, 0x24, 0xbc,
-        0xc1, 0xef, 0xc8, 0x1b
-};
-
-/*
- * Test Case 9
- *
- * Test vector from https://csrc.nist.gov/csrc/media/projects/
- * cryptographic-standards-and-guidelines/documents/examples/hmac_sha256.pdf
- */
-static const uint8_t key_9[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
-        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-        0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
-        0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
-        0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f
-};
-static const uint8_t data_9[] = {
-        0x53, 0x61, 0x6d, 0x70, 0x6c, 0x65, 0x20, 0x6d,
-        0x65, 0x73, 0x73, 0x61, 0x67, 0x65, 0x20, 0x66,
-        0x6f, 0x72, 0x20, 0x6b, 0x65, 0x79, 0x6c, 0x65,
-        0x6e, 0x3d, 0x62, 0x6c, 0x6f, 0x63, 0x6b, 0x6c,
-        0x65, 0x6e
-};
-static const uint8_t hmac_sha_256_9[] = {
-        0x8b, 0xb9, 0xa1, 0xdb, 0x98, 0x06, 0xf2, 0x0d,
-        0xf7, 0xf7, 0x7b, 0x82, 0x13, 0x8c, 0x79, 0x14,
-        0xd1, 0x74, 0xd5, 0x9e, 0x13, 0xdc, 0x4d, 0x01,
-        0x69, 0xc9, 0x05, 0x7b, 0x13, 0x3e, 0x1d, 0x62,
-};
-
-/*
- * Test Case 10
- *
- * Test vector from https://csrc.nist.gov/csrc/media/projects/
- * cryptographic-standards-and-guidelines/documents/examples/hmac_sha384.pdf
- */
-static const uint8_t key_10[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
-        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-        0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
-        0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
-        0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-        0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
-        0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
-        0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
-        0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
-        0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
-        0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
-        0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
-        0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f
-};
-static const uint8_t data_10[] = {
-        0x53, 0x61, 0x6d, 0x70, 0x6c, 0x65, 0x20, 0x6d,
-        0x65, 0x73, 0x73, 0x61, 0x67, 0x65, 0x20, 0x66,
-        0x6f, 0x72, 0x20, 0x6b, 0x65, 0x79, 0x6c, 0x65,
-        0x6e, 0x3d, 0x62, 0x6c, 0x6f, 0x63, 0x6b, 0x6c,
-        0x65, 0x6e
-};
-static const uint8_t hmac_sha_384_10[] = {
-        0x63, 0xc5, 0xda, 0xa5, 0xe6, 0x51, 0x84, 0x7c,
-        0xa8, 0x97, 0xc9, 0x58, 0x14, 0xab, 0x83, 0x0b,
-        0xed, 0xed, 0xc7, 0xd2, 0x5e, 0x83, 0xee, 0xf9
-};
-
-/*
- * Test Case 11
- *
- * Test vector from https://csrc.nist.gov/csrc/media/projects/
- * cryptographic-standards-and-guidelines/documents/examples/hmac_sha512.pdf
- */
-static const uint8_t key_11[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
-        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-        0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
-        0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
-        0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-        0x40, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47,
-        0x48, 0x49, 0x4a, 0x4b, 0x4c, 0x4d, 0x4e, 0x4f,
-        0x50, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, 0x57,
-        0x58, 0x59, 0x5a, 0x5b, 0x5c, 0x5d, 0x5e, 0x5f,
-        0x60, 0x61, 0x62, 0x63, 0x64, 0x65, 0x66, 0x67,
-        0x68, 0x69, 0x6a, 0x6b, 0x6c, 0x6d, 0x6e, 0x6f,
-        0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77,
-        0x78, 0x79, 0x7a, 0x7b, 0x7c, 0x7d, 0x7e, 0x7f
-};
-static const uint8_t data_11[] = {
-        0x53, 0x61, 0x6d, 0x70, 0x6c, 0x65, 0x20, 0x6d,
-        0x65, 0x73, 0x73, 0x61, 0x67, 0x65, 0x20, 0x66,
-        0x6f, 0x72, 0x20, 0x6b, 0x65, 0x79, 0x6c, 0x65,
-        0x6e, 0x3d, 0x62, 0x6c, 0x6f, 0x63, 0x6b, 0x6c,
-        0x65, 0x6e
-};
-static const uint8_t hmac_sha_512_11[] = {
-        0xfc, 0x25, 0xe2, 0x40, 0x65, 0x8c, 0xa7, 0x85,
-        0xb7, 0xa8, 0x11, 0xa8, 0xd3, 0xf7, 0xb4, 0xca,
-        0x48, 0xcf, 0xa2, 0x6a, 0x8a, 0x36, 0x6b, 0xf2,
-        0xcd, 0x1f, 0x83, 0x6b, 0x05, 0xfc, 0xb0, 0x24
-};
-
-#define HMAC_SHA256_SHA512_TEST_VEC(num)                                \
-        { num,                                                          \
-                        key_##num, sizeof(key_##num),                   \
-                        data_##num, sizeof(data_##num),                 \
-                        hmac_sha_224_##num, sizeof(hmac_sha_224_##num), \
-                        hmac_sha_256_##num, sizeof(hmac_sha_256_##num), \
-                        hmac_sha_384_##num, sizeof(hmac_sha_384_##num), \
-                        hmac_sha_512_##num, sizeof(hmac_sha_512_##num) }
-
-#define HMAC_SHA224_TEST_VEC(num)                                       \
-        { num,                                                          \
-                        key_##num, sizeof(key_##num),                   \
-                        data_##num, sizeof(data_##num),                 \
-                        hmac_sha_224_##num, sizeof(hmac_sha_224_##num), \
-                        NULL, 0,                                        \
-                        NULL, 0,                                        \
-                        NULL, 0 }
-
-#define HMAC_SHA256_TEST_VEC(num)                                       \
-        { num,                                                          \
-                        key_##num, sizeof(key_##num),                   \
-                        data_##num, sizeof(data_##num),                 \
-                        NULL, 0,                                        \
-                        hmac_sha_256_##num, sizeof(hmac_sha_256_##num), \
-                        NULL, 0,                                        \
-                        NULL, 0 }
-
-#define HMAC_SHA384_TEST_VEC(num)                                       \
-        { num,                                                          \
-                        key_##num, sizeof(key_##num),                   \
-                        data_##num, sizeof(data_##num),                 \
-                        NULL, 0,                                        \
-                        NULL, 0,                                        \
-                        hmac_sha_384_##num, sizeof(hmac_sha_384_##num), \
-                        NULL, 0 }
-
-#define HMAC_SHA512_TEST_VEC(num)                                       \
-        { num,                                                          \
-                        key_##num, sizeof(key_##num),                   \
-                        data_##num, sizeof(data_##num),                 \
-                        NULL, 0,                                        \
-                        NULL, 0,                                        \
-                        NULL, 0,                                        \
-                        hmac_sha_512_##num, sizeof(hmac_sha_512_##num) }
-
-static const struct hmac_rfc4231_vector {
-        int test_case_num;
-        const uint8_t *key;
-        size_t key_len;
-        const uint8_t *data;
-        size_t data_len;
-        const uint8_t *hmac_sha224;
-        size_t hmac_sha224_len;
-        const uint8_t *hmac_sha256;
-        size_t hmac_sha256_len;
-        const uint8_t *hmac_sha384;
-        size_t hmac_sha384_len;
-        const uint8_t *hmac_sha512;
-        size_t hmac_sha512_len;
-} hmac_sha256_sha512_vectors[] = {
-        HMAC_SHA256_SHA512_TEST_VEC(1),
-        HMAC_SHA256_SHA512_TEST_VEC(2),
-        HMAC_SHA256_SHA512_TEST_VEC(3),
-        HMAC_SHA256_SHA512_TEST_VEC(4),
-        /* HMAC_SHA256_SHA512_TEST_VEC(5), */
-        HMAC_SHA256_SHA512_TEST_VEC(6),
-        HMAC_SHA256_SHA512_TEST_VEC(7),
-        HMAC_SHA224_TEST_VEC(8),
-        HMAC_SHA256_TEST_VEC(9),
-        HMAC_SHA384_TEST_VEC(10),
-        HMAC_SHA512_TEST_VEC(11),
-};
+extern const struct mac_test hmac_sha224_test_kat_json[];
+extern const struct mac_test hmac_sha256_test_kat_json[];
+extern const struct mac_test hmac_sha384_test_kat_json[];
+extern const struct mac_test hmac_sha512_test_kat_json[];
 
 static int
-hmac_shax_job_ok(const struct hmac_rfc4231_vector *vec,
+hmac_shax_job_ok(const struct mac_test *vec,
                  const struct IMB_JOB *job,
                  const int sha_type,
                  const uint8_t *auth,
@@ -762,24 +53,13 @@ hmac_shax_job_ok(const struct hmac_rfc4231_vector *vec,
                  const size_t sizeof_padding)
 {
         const uint8_t *p_digest = NULL;
-        size_t digest_len = 0;
 
         switch (sha_type) {
         case 224:
-                p_digest = vec->hmac_sha224;
-                digest_len = vec->hmac_sha224_len;
-                break;
         case 256:
-                p_digest = vec->hmac_sha256;
-                digest_len = vec->hmac_sha256_len;
-                break;
         case 384:
-                p_digest = vec->hmac_sha384;
-                digest_len = vec->hmac_sha384_len;
-                break;
         case 512:
-                p_digest = vec->hmac_sha512;
-                digest_len = vec->hmac_sha512_len;
+                p_digest = (const void *) vec->tag;
                 break;
         default:
                 printf("line:%d wrong SHA type 'SHA-%d' ", __LINE__, sha_type);
@@ -793,11 +73,11 @@ hmac_shax_job_ok(const struct hmac_rfc4231_vector *vec,
         }
 
         /* hash checks */
-        if (memcmp(padding, &auth[sizeof_padding + digest_len],
+        if (memcmp(padding, &auth[sizeof_padding + vec->tagSize],
                    sizeof_padding)) {
                 printf("hash overwrite tail\n");
                 hexdump(stderr, "Target",
-                        &auth[sizeof_padding + digest_len],
+                        &auth[sizeof_padding + vec->tagSize],
                         sizeof_padding);
                 return 0;
         }
@@ -808,10 +88,10 @@ hmac_shax_job_ok(const struct hmac_rfc4231_vector *vec,
                 return 0;
         }
 
-        if (memcmp(p_digest, &auth[sizeof_padding], digest_len)) {
+        if (memcmp(p_digest, &auth[sizeof_padding], vec->tagSize)) {
                 printf("hash mismatched\n");
-                hexdump(stderr, "Received", &auth[sizeof_padding], digest_len);
-                hexdump(stderr, "Expected", p_digest, digest_len);
+                hexdump(stderr, "Received", &auth[sizeof_padding], vec->tagSize);
+                hexdump(stderr, "Expected", p_digest, vec->tagSize);
                 return 0;
         }
         return 1;
@@ -819,7 +99,7 @@ hmac_shax_job_ok(const struct hmac_rfc4231_vector *vec,
 
 static int
 test_hmac_shax(struct IMB_MGR *mb_mgr,
-               const struct hmac_rfc4231_vector *vec,
+               const struct mac_test *vec,
                const uint32_t num_jobs,
                const int sha_type)
 {
@@ -830,7 +110,6 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
         int ret = -1;
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
-        size_t digest_len = 0;
         IMB_HASH_ALG hash_type;
 
         if (auths == NULL) {
@@ -852,20 +131,16 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
 
         switch (sha_type) {
         case 224:
-                digest_len = vec->hmac_sha224_len;
                 hash_type = IMB_AUTH_HMAC_SHA_224;
                 break;
         case 256:
-                digest_len = vec->hmac_sha256_len;
                 hash_type = IMB_AUTH_HMAC_SHA_256;
                 break;
         case 384:
-                digest_len = vec->hmac_sha384_len;
                 hash_type = IMB_AUTH_HMAC_SHA_384;
                 break;
         case 512:
         default:
-                digest_len = vec->hmac_sha512_len;
                 hash_type = IMB_AUTH_HMAC_SHA_512;
                 break;
         }
@@ -875,7 +150,7 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
 
         for (i = 0; i < num_jobs; i++) {
                 const size_t alloc_len =
-                        digest_len + (sizeof(padding) * 2);
+                        vec->tagSize + (sizeof(padding) * 2);
 
                 auths[i] = malloc(alloc_len);
                 if (auths[i] == NULL) {
@@ -885,7 +160,7 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
         imb_hmac_ipad_opad(mb_mgr, hash_type, vec->key,
-                           vec->key_len, ipad_hash, opad_hash);
+                           vec->keySize, ipad_hash, opad_hash);
 
         /* empty the manager */
         while (IMB_FLUSH_JOB(mb_mgr) != NULL)
@@ -900,14 +175,14 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
                 job->dst = NULL;
                 job->key_len_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = digest_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize;
                 job->iv = NULL;
                 job->iv_len_in_bytes = 0;
-                job->src = vec->data;
+                job->src = (const void *) vec->msg;
                 job->cipher_start_src_offset_in_bytes = 0;
                 job->msg_len_to_cipher_in_bytes = 0;
                 job->hash_start_src_offset_in_bytes = 0;
-                job->msg_len_to_hash_in_bytes = vec->data_len;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->u.HMAC._hashed_auth_key_xor_ipad = ipad_hash;
                 job->u.HMAC._hashed_auth_key_xor_opad = opad_hash;
                 job->cipher_mode = IMB_CIPHER_NULL;
@@ -978,7 +253,7 @@ test_hmac_shax(struct IMB_MGR *mb_mgr,
 
 static int
 test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
-                     const struct hmac_rfc4231_vector *vec,
+                     const struct mac_test *vec,
                      const uint32_t num_jobs,
                      const int sha_type)
 {
@@ -989,7 +264,6 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
         int ret = -1, err;
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
-        size_t digest_len = 0;
         IMB_HASH_ALG hash_type;
 
         if (auths == NULL) {
@@ -1011,20 +285,16 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
 
         switch (sha_type) {
         case 224:
-                digest_len = vec->hmac_sha224_len;
                 hash_type = IMB_AUTH_HMAC_SHA_224;
                 break;
         case 256:
-                digest_len = vec->hmac_sha256_len;
                 hash_type = IMB_AUTH_HMAC_SHA_256;
                 break;
         case 384:
-                digest_len = vec->hmac_sha384_len;
                 hash_type = IMB_AUTH_HMAC_SHA_384;
                 break;
         case 512:
         default:
-                digest_len = vec->hmac_sha512_len;
                 hash_type = IMB_AUTH_HMAC_SHA_512;
                 break;
         }
@@ -1034,7 +304,7 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
 
         for (i = 0; i < num_jobs; i++) {
                 const size_t alloc_len =
-                        digest_len + (sizeof(padding) * 2);
+                        vec->tagSize + (sizeof(padding) * 2);
 
                 auths[i] = malloc(alloc_len);
                 if (auths[i] == NULL) {
@@ -1045,7 +315,7 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
         }
 
         imb_hmac_ipad_opad(mb_mgr, hash_type, vec->key,
-                           vec->key_len, ipad_hash, opad_hash);
+                           vec->keySize, ipad_hash, opad_hash);
 
         while (IMB_GET_NEXT_BURST(mb_mgr, num_jobs, jobs) < num_jobs)
                 IMB_FLUSH_BURST(mb_mgr, num_jobs, jobs);
@@ -1059,14 +329,14 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
                 job->dst = NULL;
                 job->key_len_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = digest_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize;
                 job->iv = NULL;
                 job->iv_len_in_bytes = 0;
-                job->src = vec->data;
+                job->src = (const void *) vec->msg;
                 job->cipher_start_src_offset_in_bytes = 0;
                 job->msg_len_to_cipher_in_bytes = 0;
                 job->hash_start_src_offset_in_bytes = 0;
-                job->msg_len_to_hash_in_bytes = vec->data_len;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->u.HMAC._hashed_auth_key_xor_ipad = ipad_hash;
                 job->u.HMAC._hashed_auth_key_xor_opad = opad_hash;
                 job->cipher_mode = IMB_CIPHER_NULL;
@@ -1145,7 +415,7 @@ test_hmac_shax_burst(struct IMB_MGR *mb_mgr,
 
 static int
 test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
-                          const struct hmac_rfc4231_vector *vec,
+                          const struct mac_test *vec,
                           const uint32_t num_jobs,
                           const int sha_type)
 {
@@ -1156,7 +426,6 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
         int ret = -1;
         DECLARE_ALIGNED(uint8_t ipad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
-        size_t digest_len = 0;
         IMB_HASH_ALG hash_type;
 
         if (num_jobs == 0)
@@ -1182,20 +451,16 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
 
         switch (sha_type) {
         case 224:
-                digest_len = vec->hmac_sha224_len;
                 hash_type = IMB_AUTH_HMAC_SHA_224;
                 break;
         case 256:
-                digest_len = vec->hmac_sha256_len;
                 hash_type = IMB_AUTH_HMAC_SHA_256;
                 break;
         case 384:
-                digest_len = vec->hmac_sha384_len;
                 hash_type = IMB_AUTH_HMAC_SHA_384;
                 break;
         case 512:
         default:
-                digest_len = vec->hmac_sha512_len;
                 hash_type = IMB_AUTH_HMAC_SHA_512;
                 break;
         }
@@ -1205,7 +470,7 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
 
         for (i = 0; i < num_jobs; i++) {
                 const size_t alloc_len =
-                        digest_len + (sizeof(padding) * 2);
+                        vec->tagSize + (sizeof(padding) * 2);
 
                 auths[i] = malloc(alloc_len);
                 if (auths[i] == NULL) {
@@ -1216,7 +481,7 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
         }
 
         imb_hmac_ipad_opad(mb_mgr, hash_type, vec->key,
-                           vec->key_len, ipad_hash, opad_hash);
+                           vec->keySize, ipad_hash, opad_hash);
 
         for (i = 0; i < num_jobs; i++) {
                 job = &jobs[i];
@@ -1227,14 +492,14 @@ test_hmac_shax_hash_burst(struct IMB_MGR *mb_mgr,
                 job->dst = NULL;
                 job->key_len_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = digest_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize;
                 job->iv = NULL;
                 job->iv_len_in_bytes = 0;
-                job->src = vec->data;
+                job->src = (const void *) vec->msg;
                 job->cipher_start_src_offset_in_bytes = 0;
                 job->msg_len_to_cipher_in_bytes = 0;
                 job->hash_start_src_offset_in_bytes = 0;
-                job->msg_len_to_hash_in_bytes = vec->data_len;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->u.HMAC._hashed_auth_key_xor_ipad = ipad_hash;
                 job->u.HMAC._hashed_auth_key_xor_opad = opad_hash;
                 job->cipher_mode = IMB_CIPHER_NULL;
@@ -1315,69 +580,71 @@ test_hmac_shax_std_vectors(struct IMB_MGR *mb_mgr,
                            const uint32_t num_jobs,
                            struct test_suite_context *ts)
 {
-	const int vectors_cnt = DIM(hmac_sha256_sha512_vectors);
-	int vect;
+        const struct mac_test *v;
 
+        switch (sha_type) {
+        case 224:
+                v = hmac_sha224_test_kat_json;
+                break;
+        case 256:
+                v =  hmac_sha256_test_kat_json;
+                break;
+        case 384:
+                v = hmac_sha384_test_kat_json;
+                break;
+        default:
+                v = hmac_sha512_test_kat_json;
+                break;
+        }
 	printf("HMAC-SHA%d standard test vectors (N jobs = %u):\n",
                sha_type, num_jobs);
-	for (vect = 1; vect <= vectors_cnt; vect++) {
-                const int idx = vect - 1;
-                const int flag = (sha_type == 224 &&
-                        hmac_sha256_sha512_vectors[idx].hmac_sha224 == NULL) ||
-                        (sha_type == 256 &&
-                         hmac_sha256_sha512_vectors[idx].hmac_sha256 == NULL) ||
-                        (sha_type == 384 &&
-                         hmac_sha256_sha512_vectors[idx].hmac_sha384 == NULL) ||
-                        (sha_type == 512 &&
-                         hmac_sha256_sha512_vectors[idx].hmac_sha512 == NULL);
-
+	while (v->msg != NULL) {
+                v++;
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("[%d/%d] RFC4231 Test Case %d key_len:%d "
-                               "data_len:%d\n",
-                               vect, vectors_cnt,
-                               hmac_sha256_sha512_vectors[idx].test_case_num,
-                               (int) hmac_sha256_sha512_vectors[idx].key_len,
-                               (int) hmac_sha256_sha512_vectors[idx].data_len);
+                        printf("RFC4231 Test Case %lu key_len:%lu "
+                               "data_len:%lu\n",
+                               v->tcId,
+                               v->keySize,
+                               v->msgSize / 8);
 #else
                         printf(".");
 #endif
                 }
+                /* @todo add truncation functionality to hmac_sha224 to hmac_sha 512*/
+                const int flag =
+                        ((sha_type == 224 && v->tagSize != IMB_SHA224_DIGEST_SIZE_IN_BYTES) ||
+                        (sha_type == 256 && v->tagSize != IMB_SHA256_DIGEST_SIZE_IN_BYTES) ||
+                        (sha_type == 384 && v->tagSize != IMB_SHA384_DIGEST_SIZE_IN_BYTES) ||
+                        (sha_type == 512 && v->tagSize != IMB_SHA512_DIGEST_SIZE_IN_BYTES));
 
                 if (flag) {
 #ifdef DEBUG
                         if (!quiet_mode)
-                                printf("Skipped vector %d, "
+                                printf("Skipped vector %lu, "
                                        "N/A for HMAC-SHA%d\n",
-                                       vect, sha_type);
+                                       v->tcId, sha_type);
 #endif
                         continue;
                 }
-
-                if (test_hmac_shax(mb_mgr, &hmac_sha256_sha512_vectors[idx],
-                                   num_jobs, sha_type)) {
-                        printf("error #%d\n", vect);
+                if (test_hmac_shax(mb_mgr, v, num_jobs, sha_type)) {
+                        printf("error #%lu\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
                 }
-                if (test_hmac_shax_burst(mb_mgr,
-                                         &hmac_sha256_sha512_vectors[idx],
-                                         num_jobs, sha_type)) {
-                        printf("error #%d - burst API\n", vect);
+                if (test_hmac_shax_burst(mb_mgr, v, num_jobs, sha_type)) {
+                        printf("error #%lu - burst API\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
                 }
-                if (test_hmac_shax_hash_burst(mb_mgr,
-                                              &hmac_sha256_sha512_vectors[idx],
-                                              num_jobs, sha_type)) {
-                        printf("error #%d - hash-only burst API\n", vect);
+                if (test_hmac_shax_hash_burst(mb_mgr, v, num_jobs, sha_type)) {
+                        printf("error #%lu - hash-only burst API\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
                 }
-
         }
         if (!quiet_mode)
                 printf("\n");
diff --git a/test/kat-app/hmac_sha384.json.c b/test/kat-app/hmac_sha384.json.c
new file mode 100644
index 00000000..eb95f286
--- /dev/null
+++ b/test/kat-app/hmac_sha384.json.c
@@ -0,0 +1,125 @@
+/*****************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************/
+
+/* HMACSHA384, 0.8rc21 */
+#include "mac_test.h"
+const struct mac_test hmac_sha384_test_kat_json[] = {
+        /* Vectors from https://tools.ietf.org/html/rfc4231 */
+        { 20, 48, 1,
+          "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b"
+          "\x0b\x0b\x0b",
+          "\x48\x69\x20\x54\x68\x65\x72\x65",
+          "\xaf\xd0\x39\x44\xd8\x48\x95\x62\x6b\x08\x25\xf4\xab\x46\x90\x7f\x15"
+          "\xf9\xda\xdb\xe4\x10\x1e\xc6\x82\xaa\x03\x4c\x7c\xeb\xc5\x9c\xfa\xea"
+          "\x9e\xa9\x07\x6e\xde\x7f\x4a\xf1\x52\xe8\xb2\xfa\x9c\xb6",
+          1, 64, NULL, 0 },
+        { 4, 48, 2, "\x4a\x65\x66\x65",
+          "\x77\x68\x61\x74\x20\x64\x6f\x20\x79\x61\x20\x77\x61\x6e\x74\x20\x66"
+          "\x6f\x72\x20\x6e\x6f\x74\x68\x69\x6e\x67\x3f",
+          "\xaf\x45\xd2\xe3\x76\x48\x40\x31\x61\x7f\x78\xd2\xb5\x8a\x6b\x1b\x9c"
+          "\x7e\xf4\x64\xf5\xa0\x1b\x47\xe4\x2e\xc3\x73\x63\x22\x44\x5e\x8e\x22"
+          "\x40\xca\x5e\x69\xe2\xc7\x8b\x32\x39\xec\xfa\xb2\x16\x49",
+          1, 224, NULL, 0 },
+        { 20, 48, 3,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa",
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
+          "\x88\x06\x26\x08\xd3\xe6\xad\x8a\x0a\xa2\xac\xe0\x14\xc8\xa8\x6f\x0a"
+          "\xa6\x35\xd9\x47\xac\x9f\xeb\xe8\x3e\xf4\xe5\x59\x66\x14\x4b\x2a\x5a"
+          "\xb3\x9d\xc1\x38\x14\xb9\x4e\x3a\xb6\xe1\x01\xa3\x4f\x27",
+          1, 400, NULL, 0 },
+        { 25, 48, 4,
+          "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11"
+          "\x12\x13\x14\x15\x16\x17\x18\x19",
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
+          "\x3e\x8a\x69\xb7\x78\x3c\x25\x85\x19\x33\xab\x62\x90\xaf\x6c\xa7\x7a"
+          "\x99\x81\x48\x08\x50\x00\x9c\xc5\x57\x7c\x6e\x1f\x57\x3b\x4e\x68\x01"
+          "\xdd\x23\xc4\xa7\xd6\x79\xcc\xf8\xa3\x86\xc6\x74\xcf\xfb",
+          1, 400, NULL, 0 },
+         { 20, 16, 5,
+           "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c"
+           "\x0c\x0c\x0c",
+           "\x3a\xbf\x34\xc3\x50\x3b\x2a\x23\xa4\x6e\xfc\x61\x9b\xae\xf8\x97",
+           "\xa3\xb6\x16\x74\x73\x10\x0e\xe0\x6e\x0c\x79\x6c\x29\x55\x55\x2b",
+           1, 128, NULL, 0 },
+        { 131, 48, 6,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+          "\x54\x65\x73\x74\x20\x55\x73\x69\x6e\x67\x20\x4c\x61\x72\x67\x65\x72"
+          "\x20\x54\x68\x61\x6e\x20\x42\x6c\x6f\x63\x6b\x2d\x53\x69\x7a\x65\x20"
+          "\x4b\x65\x79\x20\x2d\x20\x48\x61\x73\x68\x20\x4b\x65\x79\x20\x46\x69"
+          "\x72\x73\x74",
+          "\x4e\xce\x08\x44\x85\x81\x3e\x90\x88\xd2\xc6\x3a\x04\x1b\xc5\xb4\x4f"
+          "\x9e\xf1\x01\x2a\x2b\x58\x8f\x3c\xd1\x1f\x05\x03\x3a\xc4\xc6\x0c\x2e"
+          "\xf6\xab\x40\x30\xfe\x82\x96\x24\x8d\xf1\x63\xf4\x49\x52",
+          1, 432, NULL, 0 },
+        { 131, 48, 7,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+          "\x54\x68\x69\x73\x20\x69\x73\x20\x61\x20\x74\x65\x73\x74\x20\x75\x73"
+          "\x69\x6e\x67\x20\x61\x20\x6c\x61\x72\x67\x65\x72\x20\x74\x68\x61\x6e"
+          "\x20\x62\x6c\x6f\x63\x6b\x2d\x73\x69\x7a\x65\x20\x6b\x65\x79\x20\x61"
+          "\x6e\x64\x20\x61\x20\x6c\x61\x72\x67\x65\x72\x20\x74\x68\x61\x6e\x20"
+          "\x62\x6c\x6f\x63\x6b\x2d\x73\x69\x7a\x65\x20\x64\x61\x74\x61\x2e\x20"
+          "\x54\x68\x65\x20\x6b\x65\x79\x20\x6e\x65\x65\x64\x73\x20\x74\x6f\x20"
+          "\x62\x65\x20\x68\x61\x73\x68\x65\x64\x20\x62\x65\x66\x6f\x72\x65\x20"
+          "\x62\x65\x69\x6e\x67\x20\x75\x73\x65\x64\x20\x62\x79\x20\x74\x68\x65"
+          "\x20\x48\x4d\x41\x43\x20\x61\x6c\x67\x6f\x72\x69\x74\x68\x6d\x2e",
+          "\x66\x17\x17\x8e\x94\x1f\x02\x0d\x35\x1e\x2f\x25\x4e\x8f\xd3\x2c\x60"
+          "\x24\x20\xfe\xb0\xb8\xfb\x9a\xdc\xce\xbb\x82\x46\x1e\x99\xc5\xa6\x78"
+          "\xcc\x31\xe7\x99\x17\x6d\x38\x60\xe6\x11\x0c\x46\x52\x3e",
+          1, 1216, NULL, 0 },
+        /* Vectors from https://csrc.nist.gov/csrc/media/projects/ */
+        { 64, 24, 8,
+          "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
+          "\x11\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f\x20\x21"
+          "\x22\x23\x24\x25\x26\x27\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f\x30\x31\x32"
+          "\x33\x34\x35\x36\x37\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f",
+          "\x53\x61\x6d\x70\x6c\x65\x20\x6d\x65\x73\x73\x61\x67\x65\x20\x66\x6f"
+          "\x72\x20\x6b\x65\x79\x6c\x65\x6e\x3d\x62\x6c\x6f\x63\x6b\x6c\x65"
+          "\x6e",
+          "\x63\xc5\xda\xa5\xe6\x51\x84\x7c\xa8\x97\xc9\x58\x14\xab\x83\x0b\xed"
+          "\xed\xc7\xd2\x5e\x83\xee\xf9",
+          1, 272, NULL, 0 },
+        { 0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0 }
+};
diff --git a/test/kat-app/hmac_sha512.json.c b/test/kat-app/hmac_sha512.json.c
new file mode 100644
index 00000000..e1722665
--- /dev/null
+++ b/test/kat-app/hmac_sha512.json.c
@@ -0,0 +1,131 @@
+/*****************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************/
+
+/* HMACSHA512, 0.8rc21 */
+#include "mac_test.h"
+const struct mac_test hmac_sha512_test_kat_json[] = {
+        /* Vectors from https://tools.ietf.org/html/rfc4231 */
+        { 20, 64, 1,
+          "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b"
+          "\x0b\x0b\x0b",
+          "\x48\x69\x20\x54\x68\x65\x72\x65",
+          "\x87\xaa\x7c\xde\xa5\xef\x61\x9d\x4f\xf0\xb4\x24\x1a\x1d\x6c\xb0\x23"
+          "\x79\xf4\xe2\xce\x4e\xc2\x78\x7a\xd0\xb3\x05\x45\xe1\x7c\xde\xda\xa8"
+          "\x33\xb7\xd6\xb8\xa7\x02\x03\x8b\x27\x4e\xae\xa3\xf4\xe4\xbe\x9d\x91"
+          "\x4e\xeb\x61\xf1\x70\x2e\x69\x6c\x20\x3a\x12\x68\x54",
+          1, 64, NULL, 0 },
+        { 4, 64, 2, "\x4a\x65\x66\x65",
+          "\x77\x68\x61\x74\x20\x64\x6f\x20\x79\x61\x20\x77\x61\x6e\x74\x20\x66"
+          "\x6f\x72\x20\x6e\x6f\x74\x68\x69\x6e\x67\x3f",
+          "\x16\x4b\x7a\x7b\xfc\xf8\x19\xe2\xe3\x95\xfb\xe7\x3b\x56\xe0\xa3\x87"
+          "\xbd\x64\x22\x2e\x83\x1f\xd6\x10\x27\x0c\xd7\xea\x25\x05\x54\x97\x58"
+          "\xbf\x75\xc0\x5a\x99\x4a\x6d\x03\x4f\x65\xf8\xf0\xe6\xfd\xca\xea\xb1"
+          "\xa3\x4d\x4a\x6b\x4b\x63\x6e\x07\x0a\x38\xbc\xe7\x37",
+          1, 224, NULL, 0 },
+        { 20, 64, 3,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa",
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+          "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
+          "\xfa\x73\xb0\x08\x9d\x56\xa2\x84\xef\xb0\xf0\x75\x6c\x89\x0b\xe9\xb1"
+          "\xb5\xdb\xdd\x8e\xe8\x1a\x36\x55\xf8\x3e\x33\xb2\x27\x9d\x39\xbf\x3e"
+          "\x84\x82\x79\xa7\x22\xc8\x06\xb4\x85\xa4\x7e\x67\xc8\x07\xb9\x46\xa3"
+          "\x37\xbe\xe8\x94\x26\x74\x27\x88\x59\xe1\x32\x92\xfb",
+          1, 400, NULL, 0 },
+        { 25, 64, 4,
+          "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11"
+          "\x12\x13\x14\x15\x16\x17\x18\x19",
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+          "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
+          "\xb0\xba\x46\x56\x37\x45\x8c\x69\x90\xe5\xa8\xc5\xf6\x1d\x4a\xf7\xe5"
+          "\x76\xd9\x7f\xf9\x4b\x87\x2d\xe7\x6f\x80\x50\x36\x1e\xe3\xdb\xa9\x1c"
+          "\xa5\xc1\x1a\xa2\x5e\xb4\xd6\x79\x27\x5c\xc5\x78\x80\x63\xa5\xf1\x97"
+          "\x41\x12\x0c\x4f\x2d\xe2\xad\xeb\xeb\x10\xa2\x98\xdd",
+          1, 400, NULL, 0 },
+        { 20, 16, 5,
+          "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c"
+          "\x0c\x0c\x0c",
+          "\x3a\xbf\x34\xc3\x50\x3b\x2a\x23\xa4\x6e\xfc\x61\x9b\xae\xf8\x97",
+          "\x41\x5f\xad\x62\x71\x58\x0a\x53\x1d\x41\x79\xbc\x89\x1d\x87\xa6",
+          1, 128, NULL, 0 },
+        { 131, 64, 6,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+          "\x54\x65\x73\x74\x20\x55\x73\x69\x6e\x67\x20\x4c\x61\x72\x67\x65\x72"
+          "\x20\x54\x68\x61\x6e\x20\x42\x6c\x6f\x63\x6b\x2d\x53\x69\x7a\x65\x20"
+          "\x4b\x65\x79\x20\x2d\x20\x48\x61\x73\x68\x20\x4b\x65\x79\x20\x46\x69"
+          "\x72\x73\x74",
+          "\x80\xb2\x42\x63\xc7\xc1\xa3\xeb\xb7\x14\x93\xc1\xdd\x7b\xe8\xb4\x9b"
+          "\x46\xd1\xf4\x1b\x4a\xee\xc1\x12\x1b\x01\x37\x83\xf8\xf3\x52\x6b\x56"
+          "\xd0\x37\xe0\x5f\x25\x98\xbd\x0f\xd2\x21\x5d\x6a\x1e\x52\x95\xe6\x4f"
+          "\x73\xf6\x3f\x0a\xec\x8b\x91\x5a\x98\x5d\x78\x65\x98",
+          1, 432, NULL, 0 },
+        { 131, 64, 7,
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+          "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+          "\x54\x68\x69\x73\x20\x69\x73\x20\x61\x20\x74\x65\x73\x74\x20\x75\x73"
+          "\x69\x6e\x67\x20\x61\x20\x6c\x61\x72\x67\x65\x72\x20\x74\x68\x61\x6e"
+          "\x20\x62\x6c\x6f\x63\x6b\x2d\x73\x69\x7a\x65\x20\x6b\x65\x79\x20\x61"
+          "\x6e\x64\x20\x61\x20\x6c\x61\x72\x67\x65\x72\x20\x74\x68\x61\x6e\x20"
+          "\x62\x6c\x6f\x63\x6b\x2d\x73\x69\x7a\x65\x20\x64\x61\x74\x61\x2e\x20"
+          "\x54\x68\x65\x20\x6b\x65\x79\x20\x6e\x65\x65\x64\x73\x20\x74\x6f\x20"
+          "\x62\x65\x20\x68\x61\x73\x68\x65\x64\x20\x62\x65\x66\x6f\x72\x65\x20"
+          "\x62\x65\x69\x6e\x67\x20\x75\x73\x65\x64\x20\x62\x79\x20\x74\x68\x65"
+          "\x20\x48\x4d\x41\x43\x20\x61\x6c\x67\x6f\x72\x69\x74\x68\x6d\x2e",
+          "\xe3\x7b\x6a\x77\x5d\xc8\x7d\xba\xa4\xdf\xa9\xf9\x6e\x5e\x3f\xfd\xde"
+          "\xbd\x71\xf8\x86\x72\x89\x86\x5d\xf5\xa3\x2d\x20\xcd\xc9\x44\xb6\x02"
+          "\x2c\xac\x3c\x49\x82\xb1\x0d\x5e\xeb\x55\xc3\xe4\xde\x15\x13\x46\x76"
+          "\xfb\x6d\xe0\x44\x60\x65\xc9\x74\x40\xfa\x8c\x6a\x58",
+          1, 1216, NULL, 0 },
+        /* Vectors from https://csrc.nist.gov/csrc/media/projects/ */
+        { 64, 32, 8,
+          "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
+          "\x11\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f\x20\x21"
+          "\x22\x23\x24\x25\x26\x27\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f\x30\x31\x32"
+          "\x33\x34\x35\x36\x37\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f",
+          "\x53\x61\x6d\x70\x6c\x65\x20\x6d\x65\x73\x73\x61\x67\x65\x20\x66\x6f"
+          "\x72\x20\x6b\x65\x79\x6c\x65\x6e\x3d\x62\x6c\x6f\x63\x6b\x6c\x65"
+          "\x6e",
+          "\xfc\x25\xe2\x40\x65\x8c\xa7\x85\xb7\xa8\x11\xa8\xd3\xf7\xb4\xca\x48"
+          "\xcf\xa2\x6a\x8a\x36\x6b\xf2\xcd\x1f\x83\x6b\x05\xfc\xb0\x24",
+          1, 272, NULL, 0 },
+        { 0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0 }
+};
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index 56240e4a..1ccf595d 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
-- 
GitLab


From 3ff179d647c459b1be21df0d12293af2e98e9101 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Mon, 17 Apr 2023 11:16:42 +0100
Subject: [PATCH 226/332] perf: check if all jobs submitted are completed when
 using burst API

This check is only done when DEBUG=y is set at compilation
and if burst API is used. Sample command line:

./perf/imb-perf --cipher-algo zuc-eea3 --burst-api --job-iter 500 --imix 80,20 --job-size 64,1424 --no-time-box
---
 perf/ipsec_perf.c | 26 ++++++++++++++++++++------
 1 file changed, 20 insertions(+), 6 deletions(-)

diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index f8c07c69..5a16efb5 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -2297,6 +2297,10 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
         /* test burst api */
         if (test_api == TEST_API_BURST) {
                 uint32_t num_jobs = num_iter;
+#ifdef DEBUG
+                uint32_t jobs_submitted = 0;
+#endif
+
                 IMB_JOB *jobs[IMB_MAX_BURST_SIZE] = {NULL};
 
                 imb_set_session(mb_mgr, &job_template);
@@ -2330,8 +2334,9 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                         }
                         /* submit burst */
 #ifdef DEBUG
-                        jobs_done += IMB_SUBMIT_BURST(mb_mgr, n, jobs);
-                        if (jobs_done == 0) {
+                        const uint32_t ret = IMB_SUBMIT_BURST(mb_mgr, n, jobs);
+
+                        if (ret == 0) {
                                 const int err = imb_get_errno(mb_mgr);
 
                                 if (err != 0) {
@@ -2339,6 +2344,8 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                                err, imb_get_strerror(err));
                                 }
                         }
+                        jobs_done += ret;
+                        jobs_submitted += n;
 #else
                         jobs_done +=
                                 IMB_SUBMIT_BURST_NOCHECK(mb_mgr, n, jobs);
@@ -2348,6 +2355,15 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                 jobs_done +=
                         IMB_FLUSH_BURST(mb_mgr, IMB_MAX_BURST_SIZE, jobs);
 
+#ifdef DEBUG
+                if (jobs_done != jobs_submitted) {
+                        printf("Number of jobs completed (%u) not equal to "
+                               "jobs submitted (%u)\n",
+                               jobs_done, jobs_submitted);
+                        goto exit;
+                 }
+#endif
+
                 /* test cipher-only burst api */
         } else if (test_api == TEST_API_CIPHER_BURST) {
                 IMB_JOB jobs[MAX_BURST_SIZE];
@@ -4191,6 +4207,8 @@ int main(int argc, char *argv[])
                 }
         }
 
+        srand(ITER_SCALE_LONG + ITER_SCALE_SHORT + ITER_SCALE_SMOKE);
+
         if ((imix_list_count != 0)) {
                 if (imix_list_count != job_size_count) {
                         fprintf(stderr,
@@ -4215,8 +4233,6 @@ int main(int argc, char *argv[])
 			distribution_total[i] = imix_list[i] +
 				distribution_total[i-1];
 
-                /* Use always same seed */
-                srand(0);
 		/* Calculate a random sequence of packet sizes,
                    based on distribution */
 		for (i = 0; i < (int)JOB_SIZE_IMIX_LIST; i++) {
@@ -4369,8 +4385,6 @@ int main(int argc, char *argv[])
         memset(t_info, 0, sizeof(t_info));
         init_offsets(cache_type);
 
-        srand(ITER_SCALE_LONG + ITER_SCALE_SHORT + ITER_SCALE_SMOKE);
-
 #ifdef LINUX
         if (use_timebox) {
                 /* set up timebox callback function */
-- 
GitLab


From d9c1808fe6c9d216a3ae17d4604e5c6abf8ffe66 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Mon, 17 Apr 2023 09:03:51 +0100
Subject: [PATCH 227/332] lib: fix queue size calculation

When next_job pointer was a smaller value than earliest_job pointer,
the calculation of the job queue size was wrong, as it did not take
into account that the pointers wrap around the array.
---
 lib/include/mb_mgr_code.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/include/mb_mgr_code.h b/lib/include/mb_mgr_code.h
index 1d689355..e662adba 100644
--- a/lib/include/mb_mgr_code.h
+++ b/lib/include/mb_mgr_code.h
@@ -52,7 +52,8 @@ void ADV_JOBS(int *ptr)
 __forceinline uint32_t
 get_queue_sz(IMB_MGR *state)
 {
-        const int a = (state->next_job - state->earliest_job) / sizeof(IMB_JOB);
+        const int a = (state->next_job - state->earliest_job) /
+                        (int) sizeof(IMB_JOB);
 
         return a & (IMB_MAX_JOBS-1);
 }
-- 
GitLab


From c8271ac5ddcac01c9c4a16d53f460eece9aa3655 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 12 Apr 2023 17:05:54 +0100
Subject: [PATCH 228/332] lib: [job] added defines for GCM AAD JOB parameters

---
 lib/include/imb_job.inc | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/lib/include/imb_job.inc b/lib/include/imb_job.inc
index 4631bbb4..0e24adcb 100644
--- a/lib/include/imb_job.inc
+++ b/lib/include/imb_job.inc
@@ -214,3 +214,5 @@ END_FIELDS
 %assign	_snow_v_aad_len 		_u + __snow_v_aad_len
 %assign	_snow_v_reserved		_u + __snow_v_reserved
 %assign	_cbcs_next_iv 		        _cipher_fields + __cbcs_next_iv
+%assign _gcm_aad                        _u + __gcm_aad
+%assign _gcm_aad_len                    _u + __gcm_aad_len
-- 
GitLab


From 3726d5b14c27b6ecfee5df07e3d6e0f0f4062cba Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 12 Apr 2023 17:04:10 +0100
Subject: [PATCH 229/332] lib: [gcm] FUNC_SAVE modified to accept optional
 argument

- replaced push/pop for GP register with stores/loads into stack frame
- removed obsolete clearing GP registers for SAFE_DATA
- FUNC_SAVE can allocate stack frames of two different sizes depending
  on input argument
- STACK_OFFSET parameter removed as it became obsolete (always zero)
---
 lib/avx512_t2/gcm_vaes_avx512.inc |  24 ++++-
 lib/include/gcm_avx512.inc        | 149 ++++++++++++++++-------------
 lib/include/gcm_avx_gen2.inc      | 153 +++++++++++++++---------------
 lib/include/gcm_avx_gen4.inc      | 144 +++++++++++++++-------------
 lib/include/gcm_defines.inc       |  24 ++---
 lib/sse_t1/gcm_api_sse.inc        |  22 +----
 lib/sse_t1/gcm_gmac_api_sse.inc   |  15 +--
 lib/sse_t1/gcm_sgl_api_sse.inc    |   8 +-
 lib/sse_t1/gcm_sse.inc            |  98 +++++++++++--------
 9 files changed, 344 insertions(+), 293 deletions(-)

diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index 54424712..f5d3be3a 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -178,8 +178,20 @@
 %define STACK_FRAME_SIZE        (STACK_LOCAL_OFFSET + LOCAL_STORAGE)
 %define STACK_FRAME_SIZE_SMALL  (STACK_LOCAL_OFFSET)
 
-;; for compatibility with stack argument definitions in gcm_defines.inc
-%define STACK_OFFSET 0
+;; extra memory for GCM context structure
+%define CONTEXT_SIZE    6*16
+%define CONTEXT_OFFSET  STACK_FRAME_SIZE
+
+;; Full stack frame layout:
+;; + 16*6  -> ---------------------------
+;;            GCM CONTEXT (JOB API only)
+;; + 32*16 -> ---------------------------
+;;            LOCAL STORAGE
+;; + 16*10 -> --------------------------
+;;            XMM STORAGE (windows only)
+;; + 8*8   -> --------------------------
+;;            GP STORAGE
+;; RSP/R14 -> --------------------------
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;; Utility Macros
@@ -2719,17 +2731,25 @@
 %macro FUNC_SAVE 0-1
 
 %assign use_big_frame 1
+%assign alloc_context 0
 
 %if %0 > 0
 %ifidni %1, small_frame
 %assign use_big_frame 0
 %endif
+%ifidni %1, alloc_context
+%assign alloc_context 1
+%endif
 %endif
         ;; Required for Update/GMC_ENC
         mov     rax, rsp
 
 %if use_big_frame > 0
+%if alloc_context > 1
+        sub     rsp, STACK_FRAME_SIZE + CONTEXT_SIZE
+%else
         sub     rsp, STACK_FRAME_SIZE
+%endif
 %else
         sub     rsp, STACK_FRAME_SIZE_SMALL
 %endif
diff --git a/lib/include/gcm_avx512.inc b/lib/include/gcm_avx512.inc
index 119301d5..79cfd5a0 100644
--- a/lib/include/gcm_avx512.inc
+++ b/lib/include/gcm_avx512.inc
@@ -153,24 +153,43 @@
 mksection .text
 default rel
 
-; need to push 4 registers into stack to maintain
-%define STACK_OFFSET   8*4
+; need to store 5 GP registers on stack (align to 16 bytes)
+%define GP_STORAGE 8*6
+
+%define	TMP2	16*0    ; Temporary storage for AES State 2 (State 1 is stored in an XMM register)
+%define	TMP3	16*1    ; Temporary storage for AES State 3
+%define	TMP4	16*2    ; Temporary storage for AES State 4
+%define	TMP5	16*3    ; Temporary storage for AES State 5
+%define	TMP6	16*4    ; Temporary storage for AES State 6
+%define	TMP7	16*5    ; Temporary storage for AES State 7
+%define	TMP8	16*6    ; Temporary storage for AES State 8
+
+%define	LOCAL_STORAGE	16*7
 
 %ifidn __OUTPUT_FORMAT__, win64
-        %define XMM_STORAGE     16*10
+	%define	XMM_STORAGE	16*10
 %else
-        %define XMM_STORAGE     0
+	%define	XMM_STORAGE	0
 %endif
 
-%define TMP2    16*0    ; Temporary storage for AES State 2 (State 1 is stored in an XMM register)
-%define TMP3    16*1    ; Temporary storage for AES State 3
-%define TMP4    16*2    ; Temporary storage for AES State 4
-%define TMP5    16*3    ; Temporary storage for AES State 5
-%define TMP6    16*4    ; Temporary storage for AES State 6
-%define TMP7    16*5    ; Temporary storage for AES State 7
-%define TMP8    16*6    ; Temporary storage for AES State 8
-%define LOCAL_STORAGE   16*7
-%define VARIABLE_OFFSET LOCAL_STORAGE + XMM_STORAGE
+%define GP_OFFSET (LOCAL_STORAGE + XMM_STORAGE)
+
+%define	VARIABLE_OFFSET	(GP_STORAGE + LOCAL_STORAGE + XMM_STORAGE)
+
+;; extra memory for GCM context structure
+%define CONTEXT_SIZE    6*16
+%define CONTEXT_OFFSET  VARIABLE_OFFSET
+
+;; Full stack frame layout:
+;; + 16*6  -> ---------------------------
+;;            GCM CONTEXT (JOB API only)
+;; + 6*8   -> ---------------------------
+;;            GP STORAGE
+;; + 16*10 -> --------------------------
+;;            XMM STORAGE (windows only)
+;; + 16*7  -> --------------------------
+;;            LOCAL STORAGE
+;; RSP/R14 -> --------------------------
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Utility Macros
@@ -2349,38 +2368,45 @@ vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
 
 ;; Start of Stack Setup
 
-%macro FUNC_SAVE 0
-        ;; Required for Update/GMC_ENC
-        ;the number of pushes must equal STACK_OFFSET
-        push    r12
-        push    r13
-        push    r14
-        push    r15
-        mov     r14, rsp
+%macro FUNC_SAVE 0-1
+	;; Required for Update/GCM_ENC
+        mov     rax, rsp
+
+%if %0 == 0
+	sub     rsp, VARIABLE_OFFSET
+%else
+%ifidni %1, alloc_context
+        sub     rsp, VARIABLE_OFFSET + CONTEXT_SIZE
+%endif
+%endif
+	and     rsp, ~63
 
-        sub     rsp, VARIABLE_OFFSET
-        and     rsp, ~63
+        mov     [rsp + GP_OFFSET + 0*8], rax ; original rsp pointer
+        mov     [rsp + GP_OFFSET + 1*8], r12
+        mov     [rsp + GP_OFFSET + 2*8], r13
+        mov     [rsp + GP_OFFSET + 3*8], r14
+        mov     [rsp + GP_OFFSET + 4*8], r15
+        mov     r14, rax
 
 %ifidn __OUTPUT_FORMAT__, win64
         ; xmm6:xmm15 need to be maintained for Windows
-        vmovdqu [rsp + LOCAL_STORAGE + 0*16],xmm6
-        vmovdqu [rsp + LOCAL_STORAGE + 1*16],xmm7
-        vmovdqu [rsp + LOCAL_STORAGE + 2*16],xmm8
-        vmovdqu [rsp + LOCAL_STORAGE + 3*16],xmm9
-        vmovdqu [rsp + LOCAL_STORAGE + 4*16],xmm10
-        vmovdqu [rsp + LOCAL_STORAGE + 5*16],xmm11
-        vmovdqu [rsp + LOCAL_STORAGE + 6*16],xmm12
-        vmovdqu [rsp + LOCAL_STORAGE + 7*16],xmm13
-        vmovdqu [rsp + LOCAL_STORAGE + 8*16],xmm14
-        vmovdqu [rsp + LOCAL_STORAGE + 9*16],xmm15
+        vmovdqu [rsp + LOCAL_STORAGE + 0*16], xmm6
+        vmovdqu [rsp + LOCAL_STORAGE + 1*16], xmm7
+        vmovdqu [rsp + LOCAL_STORAGE + 2*16], xmm8
+        vmovdqu [rsp + LOCAL_STORAGE + 3*16], xmm9
+        vmovdqu [rsp + LOCAL_STORAGE + 4*16], xmm10
+        vmovdqu [rsp + LOCAL_STORAGE + 5*16], xmm11
+        vmovdqu [rsp + LOCAL_STORAGE + 6*16], xmm12
+        vmovdqu [rsp + LOCAL_STORAGE + 7*16], xmm13
+        vmovdqu [rsp + LOCAL_STORAGE + 8*16], xmm14
+        vmovdqu [rsp + LOCAL_STORAGE + 9*16], xmm15
 %endif
 %endmacro
 
 %macro FUNC_RESTORE 0
 
 %ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_zmms_asm
+        clear_scratch_xmms_avx_asm
 %endif
 %ifidn __OUTPUT_FORMAT__, win64
         vmovdqu xmm15, [rsp + LOCAL_STORAGE + 9*16]
@@ -2389,17 +2415,18 @@ vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
         vmovdqu xmm12, [rsp + LOCAL_STORAGE + 6*16]
         vmovdqu xmm11, [rsp + LOCAL_STORAGE + 5*16]
         vmovdqu xmm10, [rsp + LOCAL_STORAGE + 4*16]
-        vmovdqu xmm9, [rsp + LOCAL_STORAGE + 3*16]
-        vmovdqu xmm8, [rsp + LOCAL_STORAGE + 2*16]
-        vmovdqu xmm7, [rsp + LOCAL_STORAGE + 1*16]
-        vmovdqu xmm6, [rsp + LOCAL_STORAGE + 0*16]
+        vmovdqu xmm9,  [rsp + LOCAL_STORAGE + 3*16]
+        vmovdqu xmm8,  [rsp + LOCAL_STORAGE + 2*16]
+        vmovdqu xmm7,  [rsp + LOCAL_STORAGE + 1*16]
+        vmovdqu xmm6,  [rsp + LOCAL_STORAGE + 0*16]
 %endif
-;; Required for Update/GMC_ENC
-        mov     rsp, r14
-        pop     r15
-        pop     r14
-        pop     r13
-        pop     r12
+
+        ;; Required for Update/GCM_ENC
+        mov     r12, [rsp + GP_OFFSET + 1*8]
+        mov     r13, [rsp + GP_OFFSET + 2*8]
+        mov     r14, [rsp + GP_OFFSET + 3*8]
+        mov     r15, [rsp + GP_OFFSET + 4*8]
+        mov     rsp, [rsp + GP_OFFSET + 0*8]
 %endmacro
 
 %macro CALC_J0 13
@@ -2997,19 +3024,10 @@ FN_NAME(precomp,_):
 
 %endif
 
-        push    r12
-        push    r13
-        push    r14
-        push    r15
-
-        mov     r14, rsp
-
-        sub     rsp, VARIABLE_OFFSET
-        and     rsp, ~63                                 ; align rsp to 64 bytes
-
 %ifidn __OUTPUT_FORMAT__, win64
+        sub     rsp, 1*16
         ; only xmm6 needs to be maintained
-        vmovdqu [rsp + LOCAL_STORAGE + 0*16],xmm6
+        vmovdqu [rsp + 0*16], xmm6
 %endif
 
         vpxor   xmm6, xmm6
@@ -3039,14 +3057,9 @@ FN_NAME(precomp,_):
         clear_scratch_zmms_asm
 %endif
 %ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm6, [rsp + LOCAL_STORAGE + 0*16]
+        vmovdqu xmm6, [rsp + 0*16]
+        add     rsp, 1*16
 %endif
-        mov     rsp, r14
-
-        pop     r15
-        pop     r14
-        pop     r13
-        pop     r12
 
 exit_precomp:
         ret
@@ -3081,7 +3094,7 @@ FN_NAME(init,_):
 %ifidn __OUTPUT_FORMAT__, win64
         push    r14
         push    r15
-        mov     r14, rsp
+        lea     r14, [rsp + 4*8]
 	; xmm6 needs to be maintained for Windows
 	sub	rsp, 1*16
 	vmovdqu [rsp + 0*16], xmm6
@@ -3122,7 +3135,7 @@ skip_aad_check_init:
 exit_init:
 %ifidn __OUTPUT_FORMAT__, win64
 	vmovdqu	xmm6 , [rsp + 0*16]
-        mov     rsp, r14
+        add     rsp, 1*16
         pop     r15
         pop     r14
 %endif
@@ -3176,7 +3189,7 @@ FN_NAME(init_var_iv,_):
 %ifidn __OUTPUT_FORMAT__, win64
         push    r14
         push    r15
-        mov     r14, rsp
+        lea     r14, [rsp + 4*8]
 	; xmm6 needs to be maintained for Windows
 	sub	rsp, 1*16
 	vmovdqu	[rsp + 0*16], xmm6
@@ -3228,8 +3241,8 @@ skip_iv_len_12_init_IV:
 %endif
 exit_init_IV:
 %ifidn __OUTPUT_FORMAT__, win64
-	vmovdqu xmm6 , [rsp + 0*16]
-        mov     rsp, r14
+	vmovdqu xmm6, [rsp + 0*16]
+        add     rsp, 1*16
         pop     r15
         pop     r14
 %endif
diff --git a/lib/include/gcm_avx_gen2.inc b/lib/include/gcm_avx_gen2.inc
index c03f2cb7..8e1682ff 100644
--- a/lib/include/gcm_avx_gen2.inc
+++ b/lib/include/gcm_avx_gen2.inc
@@ -147,8 +147,9 @@
 %endif
 
 default rel
-; need to push 4 registers into stack to maintain
-%define STACK_OFFSET 8*4
+
+; need to store 5 GP registers on stack (align to 16 bytes)
+%define GP_STORAGE 8*6
 
 %define	TMP2	16*0    ; Temporary storage for AES State 2 (State 1 is stored in an XMM register)
 %define	TMP3	16*1    ; Temporary storage for AES State 3
@@ -166,7 +167,24 @@ default rel
 	%define	XMM_STORAGE	0
 %endif
 
-%define	VARIABLE_OFFSET	LOCAL_STORAGE + XMM_STORAGE
+%define GP_OFFSET (LOCAL_STORAGE + XMM_STORAGE)
+
+%define	VARIABLE_OFFSET	(GP_STORAGE + LOCAL_STORAGE + XMM_STORAGE)
+
+;; extra memory for GCM context structure
+%define CONTEXT_SIZE    6*16
+%define CONTEXT_OFFSET  VARIABLE_OFFSET
+
+;; Full stack frame layout:
+;; + 16*6  -> ---------------------------
+;;            GCM CONTEXT (JOB API only)
+;; + 6*8   -> ---------------------------
+;;            GP STORAGE
+;; + 16*10 -> --------------------------
+;;            XMM STORAGE (windows only)
+;; + 16*7  -> --------------------------
+;;            LOCAL STORAGE
+;; RSP/R14 -> --------------------------
 
 mksection .text
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -1496,58 +1514,65 @@ vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
 
 ;; Start of Stack Setup
 
-%macro FUNC_SAVE 0
-	;; Required for Update/GMC_ENC
-	;the number of pushes must equal STACK_OFFSET
-	push    r12
-	push    r13
-	push    r14
-	push    r15
-	mov     r14, rsp
+%macro FUNC_SAVE 0-1
+	;; Required for Update/GCM_ENC
+        mov     rax, rsp
 
+%if %0 == 0
 	sub     rsp, VARIABLE_OFFSET
+%else
+%ifidni %1, alloc_context
+        sub     rsp, VARIABLE_OFFSET + CONTEXT_SIZE
+%endif
+%endif
 	and     rsp, ~63
 
+        mov     [rsp + GP_OFFSET + 0*8], rax ; original rsp pointer
+        mov     [rsp + GP_OFFSET + 1*8], r12
+        mov     [rsp + GP_OFFSET + 2*8], r13
+        mov     [rsp + GP_OFFSET + 3*8], r14
+        mov     [rsp + GP_OFFSET + 4*8], r15
+        mov     r14, rax
+
 %ifidn __OUTPUT_FORMAT__, win64
         ; xmm6:xmm15 need to be maintained for Windows
-	vmovdqu [rsp + LOCAL_STORAGE + 0*16],xmm6
-	vmovdqu [rsp + LOCAL_STORAGE + 1*16],xmm7
-	vmovdqu [rsp + LOCAL_STORAGE + 2*16],xmm8
-	vmovdqu [rsp + LOCAL_STORAGE + 3*16],xmm9
-	vmovdqu [rsp + LOCAL_STORAGE + 4*16],xmm10
-	vmovdqu [rsp + LOCAL_STORAGE + 5*16],xmm11
-	vmovdqu [rsp + LOCAL_STORAGE + 6*16],xmm12
-	vmovdqu [rsp + LOCAL_STORAGE + 7*16],xmm13
-	vmovdqu [rsp + LOCAL_STORAGE + 8*16],xmm14
-	vmovdqu [rsp + LOCAL_STORAGE + 9*16],xmm15
+        vmovdqu [rsp + LOCAL_STORAGE + 0*16], xmm6
+        vmovdqu [rsp + LOCAL_STORAGE + 1*16], xmm7
+        vmovdqu [rsp + LOCAL_STORAGE + 2*16], xmm8
+        vmovdqu [rsp + LOCAL_STORAGE + 3*16], xmm9
+        vmovdqu [rsp + LOCAL_STORAGE + 4*16], xmm10
+        vmovdqu [rsp + LOCAL_STORAGE + 5*16], xmm11
+        vmovdqu [rsp + LOCAL_STORAGE + 6*16], xmm12
+        vmovdqu [rsp + LOCAL_STORAGE + 7*16], xmm13
+        vmovdqu [rsp + LOCAL_STORAGE + 8*16], xmm14
+        vmovdqu [rsp + LOCAL_STORAGE + 9*16], xmm15
 %endif
 %endmacro
 
 %macro FUNC_RESTORE 0
 
 %ifdef SAFE_DATA
-        clear_scratch_gps_asm
         clear_scratch_xmms_avx_asm
 %endif
 %ifidn __OUTPUT_FORMAT__, win64
-	vmovdqu xmm15  , [rsp + LOCAL_STORAGE + 9*16]
-	vmovdqu xmm14  , [rsp + LOCAL_STORAGE + 8*16]
-	vmovdqu xmm13  , [rsp + LOCAL_STORAGE + 7*16]
-	vmovdqu xmm12  , [rsp + LOCAL_STORAGE + 6*16]
-	vmovdqu xmm11  , [rsp + LOCAL_STORAGE + 5*16]
-	vmovdqu xmm10  , [rsp + LOCAL_STORAGE + 4*16]
-	vmovdqu xmm9 , [rsp + LOCAL_STORAGE + 3*16]
-	vmovdqu xmm8 , [rsp + LOCAL_STORAGE + 2*16]
-	vmovdqu xmm7 , [rsp + LOCAL_STORAGE + 1*16]
-	vmovdqu xmm6 , [rsp + LOCAL_STORAGE + 0*16]
-%endif
-
-;; Required for Update/GMC_ENC
-	mov     rsp, r14
-	pop     r15
-	pop     r14
-	pop     r13
-	pop     r12
+        vmovdqu xmm15, [rsp + LOCAL_STORAGE + 9*16]
+        vmovdqu xmm14, [rsp + LOCAL_STORAGE + 8*16]
+        vmovdqu xmm13, [rsp + LOCAL_STORAGE + 7*16]
+        vmovdqu xmm12, [rsp + LOCAL_STORAGE + 6*16]
+        vmovdqu xmm11, [rsp + LOCAL_STORAGE + 5*16]
+        vmovdqu xmm10, [rsp + LOCAL_STORAGE + 4*16]
+        vmovdqu xmm9,  [rsp + LOCAL_STORAGE + 3*16]
+        vmovdqu xmm8,  [rsp + LOCAL_STORAGE + 2*16]
+        vmovdqu xmm7,  [rsp + LOCAL_STORAGE + 1*16]
+        vmovdqu xmm6,  [rsp + LOCAL_STORAGE + 0*16]
+%endif
+
+        ;; Required for Update/GCM_ENC
+        mov     r12, [rsp + GP_OFFSET + 1*8]
+        mov     r13, [rsp + GP_OFFSET + 2*8]
+        mov     r14, [rsp + GP_OFFSET + 3*8]
+        mov     r15, [rsp + GP_OFFSET + 4*8]
+        mov     rsp, [rsp + GP_OFFSET + 0*8]
 %endmacro
 
 %macro CALC_J0 15
@@ -1959,25 +1984,16 @@ FN_NAME(precomp,_):
         jz      error_precomp
 %endif
 
-        push    r12
-        push    r13
-        push    r14
-        push    r15
-
-        mov     r14, rsp
-
-        sub     rsp, VARIABLE_OFFSET
-        and     rsp, ~63                                ; align rsp to 64 bytes
-
 %ifidn __OUTPUT_FORMAT__, win64
+        sub     rsp, 1*16
         ; only xmm6 needs to be maintained
-        vmovdqu [rsp + LOCAL_STORAGE + 0*16],xmm6
+        vmovdqu [rsp + 0*16], xmm6
 %endif
 
 	vpxor	xmm6, xmm6
 	ENCRYPT_SINGLE_BLOCK	arg1, xmm6		; xmm6 = HashKey
 
-        vpshufb  xmm6, [SHUF_MASK]
+        vpshufb xmm6, [SHUF_MASK]
         ;;;;;;;;;;;;;;;  PRECOMPUTATION of HashKey<<1 mod poly from the HashKey;;;;;;;;;;;;;;;
         vmovdqa  xmm2, xmm6
         vpsllq   xmm6, 1
@@ -1997,14 +2013,9 @@ FN_NAME(precomp,_):
         PRECOMPUTE arg1, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5
 
 %ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm6, [rsp + LOCAL_STORAGE + 0*16]
+        vmovdqu xmm6, [rsp + 0*16]
+        add     rsp, 1*16
 %endif
-        mov     rsp, r14
-
-        pop     r15
-        pop     r14
-        pop     r13
-        pop     r12
 
 %ifdef SAFE_DATA
         clear_scratch_gps_asm
@@ -2044,7 +2055,7 @@ FN_NAME(init,_):
 %ifidn __OUTPUT_FORMAT__, win64
         push    r14
         push    r15
-        mov     r14, rsp
+        lea     r14, [rsp + 4*8]
 	; xmm6 needs to be maintained for Windows
 	sub	rsp, 1*16
 	vmovdqu	[rsp + 0*16], xmm6
@@ -2086,7 +2097,7 @@ exit_init:
 
 %ifidn __OUTPUT_FORMAT__, win64
 	vmovdqu	xmm6 , [rsp + 0*16]
-        mov     rsp, r14
+        add     rsp, 1*16
         pop     r15
         pop     r14
 %endif
@@ -2140,7 +2151,7 @@ FN_NAME(init_var_iv,_):
 %ifidn __OUTPUT_FORMAT__, win64
         push    r14
         push    r15
-        mov     r14, rsp
+        lea     r14, [rsp + 4*8]
 	; xmm6 need to be maintained for Windows
 	sub	rsp, 1*16
 	vmovdqu	[rsp + 0*16], xmm6
@@ -2194,7 +2205,7 @@ exit_init_IV:
 
 %ifidn __OUTPUT_FORMAT__, win64
 	vmovdqu	xmm6 , [rsp + 0*16]
-        mov     rsp, r14
+        add     rsp, 1*16
         pop     r15
         pop     r14
 %endif
@@ -2947,16 +2958,12 @@ ghash_pre_avx_gen2:
 %endif
 
 %ifidn __OUTPUT_FORMAT__, win64
-        push    r14
-        mov     r14, rsp
-
-        sub     rsp, VARIABLE_OFFSET
-        and     rsp, ~63                                 ; align rsp to 64 bytes
+        sub     rsp, 1*16
 
         ; only xmm6 needs to be maintained
-        vmovdqa [rsp + LOCAL_STORAGE + 0*16],xmm6
+        vmovdqu [rsp + 0*16], xmm6
 %endif
-        vmovdqu xmm6, [arg1]
+        vmovdqu  xmm6, [arg1]
         vpshufb  xmm6, [rel SHUF_MASK]
         ;;;;;;;;;;;;;;;  PRECOMPUTATION of HashKey<<1 mod poly from the HashKey;;;;;;;;;;;;;;;
         vmovdqa  xmm2, xmm6
@@ -2981,10 +2988,8 @@ ghash_pre_avx_gen2:
         clear_scratch_xmms_avx_asm
 %endif
 %ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm6, [rsp + LOCAL_STORAGE + 0*16]
-        mov     rsp, r14
-        pop     r14
-
+        vmovdqu xmm6, [rsp + 0*16]
+        add     rsp, 1*16
 %endif
 exit_ghash_pre:
         ret
diff --git a/lib/include/gcm_avx_gen4.inc b/lib/include/gcm_avx_gen4.inc
index b55ed33f..a4fdd8c7 100644
--- a/lib/include/gcm_avx_gen4.inc
+++ b/lib/include/gcm_avx_gen4.inc
@@ -149,26 +149,43 @@
 mksection .text
 default rel
 
-; need to push 4 registers into stack to maintain
-%define STACK_OFFSET 8*4
+; need to store 5 GP registers on stack (align to 16 bytes)
+%define GP_STORAGE 8*6
 
-%define TMP2    16*0    ; Temporary storage for AES State 2 (State 1 is stored in an XMM register)
-%define TMP3    16*1    ; Temporary storage for AES State 3
-%define TMP4    16*2    ; Temporary storage for AES State 4
-%define TMP5    16*3    ; Temporary storage for AES State 5
-%define TMP6    16*4    ; Temporary storage for AES State 6
-%define TMP7    16*5    ; Temporary storage for AES State 7
-%define TMP8    16*6    ; Temporary storage for AES State 8
+%define	TMP2	16*0    ; Temporary storage for AES State 2 (State 1 is stored in an XMM register)
+%define	TMP3	16*1    ; Temporary storage for AES State 3
+%define	TMP4	16*2    ; Temporary storage for AES State 4
+%define	TMP5	16*3    ; Temporary storage for AES State 5
+%define	TMP6	16*4    ; Temporary storage for AES State 6
+%define	TMP7	16*5    ; Temporary storage for AES State 7
+%define	TMP8	16*6    ; Temporary storage for AES State 8
 
-%define LOCAL_STORAGE   16*7
+%define	LOCAL_STORAGE	16*7
 
 %ifidn __OUTPUT_FORMAT__, win64
-        %define XMM_STORAGE     16*10
+	%define	XMM_STORAGE	16*10
 %else
-        %define XMM_STORAGE     0
+	%define	XMM_STORAGE	0
 %endif
 
-%define VARIABLE_OFFSET LOCAL_STORAGE + XMM_STORAGE
+%define GP_OFFSET (LOCAL_STORAGE + XMM_STORAGE)
+
+%define	VARIABLE_OFFSET	(GP_STORAGE + LOCAL_STORAGE + XMM_STORAGE)
+
+;; extra memory for GCM context structure
+%define CONTEXT_SIZE    6*16
+%define CONTEXT_OFFSET  VARIABLE_OFFSET
+
+;; Full stack frame layout:
+;; + 16*6  -> ---------------------------
+;;            GCM CONTEXT (JOB API only)
+;; + 6*8   -> ---------------------------
+;;            GP STORAGE
+;; + 16*10 -> --------------------------
+;;            XMM STORAGE (windows only)
+;; + 16*7  -> --------------------------
+;;            LOCAL STORAGE
+;; RSP/R14 -> --------------------------
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Utility Macros
@@ -2455,38 +2472,45 @@ vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
 
 ;; Start of Stack Setup
 
-%macro FUNC_SAVE 0
-        ;; Required for Update/GMC_ENC
-        ;the number of pushes must equal STACK_OFFSET
-        push    r12
-        push    r13
-        push    r14
-        push    r15
-        mov     r14, rsp
+%macro FUNC_SAVE 0-1
+	;; Required for Update/GCM_ENC
+        mov     rax, rsp
 
-        sub     rsp, VARIABLE_OFFSET
-        and     rsp, ~63
+%if %0 == 0
+	sub     rsp, VARIABLE_OFFSET
+%else
+%ifidni %1, alloc_context
+        sub     rsp, VARIABLE_OFFSET + CONTEXT_SIZE
+%endif
+%endif
+	and     rsp, ~63
+
+        mov     [rsp + GP_OFFSET + 0*8], rax ; original rsp pointer
+        mov     [rsp + GP_OFFSET + 1*8], r12
+        mov     [rsp + GP_OFFSET + 2*8], r13
+        mov     [rsp + GP_OFFSET + 3*8], r14
+        mov     [rsp + GP_OFFSET + 4*8], r15
+        mov     r14, rax
 
 %ifidn __OUTPUT_FORMAT__, win64
         ; xmm6:xmm15 need to be maintained for Windows
-        vmovdqu [rsp + LOCAL_STORAGE + 0*16],xmm6
-        vmovdqu [rsp + LOCAL_STORAGE + 1*16],xmm7
-        vmovdqu [rsp + LOCAL_STORAGE + 2*16],xmm8
-        vmovdqu [rsp + LOCAL_STORAGE + 3*16],xmm9
-        vmovdqu [rsp + LOCAL_STORAGE + 4*16],xmm10
-        vmovdqu [rsp + LOCAL_STORAGE + 5*16],xmm11
-        vmovdqu [rsp + LOCAL_STORAGE + 6*16],xmm12
-        vmovdqu [rsp + LOCAL_STORAGE + 7*16],xmm13
-        vmovdqu [rsp + LOCAL_STORAGE + 8*16],xmm14
-        vmovdqu [rsp + LOCAL_STORAGE + 9*16],xmm15
+        vmovdqu [rsp + LOCAL_STORAGE + 0*16], xmm6
+        vmovdqu [rsp + LOCAL_STORAGE + 1*16], xmm7
+        vmovdqu [rsp + LOCAL_STORAGE + 2*16], xmm8
+        vmovdqu [rsp + LOCAL_STORAGE + 3*16], xmm9
+        vmovdqu [rsp + LOCAL_STORAGE + 4*16], xmm10
+        vmovdqu [rsp + LOCAL_STORAGE + 5*16], xmm11
+        vmovdqu [rsp + LOCAL_STORAGE + 6*16], xmm12
+        vmovdqu [rsp + LOCAL_STORAGE + 7*16], xmm13
+        vmovdqu [rsp + LOCAL_STORAGE + 8*16], xmm14
+        vmovdqu [rsp + LOCAL_STORAGE + 9*16], xmm15
 %endif
 %endmacro
 
 %macro FUNC_RESTORE 0
 
 %ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_ymms_asm
+        clear_scratch_xmms_avx_asm
 %endif
 %ifidn __OUTPUT_FORMAT__, win64
         vmovdqu xmm15, [rsp + LOCAL_STORAGE + 9*16]
@@ -2495,18 +2519,18 @@ vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
         vmovdqu xmm12, [rsp + LOCAL_STORAGE + 6*16]
         vmovdqu xmm11, [rsp + LOCAL_STORAGE + 5*16]
         vmovdqu xmm10, [rsp + LOCAL_STORAGE + 4*16]
-        vmovdqu xmm9, [rsp + LOCAL_STORAGE + 3*16]
-        vmovdqu xmm8, [rsp + LOCAL_STORAGE + 2*16]
-        vmovdqu xmm7, [rsp + LOCAL_STORAGE + 1*16]
-        vmovdqu xmm6, [rsp + LOCAL_STORAGE + 0*16]
+        vmovdqu xmm9,  [rsp + LOCAL_STORAGE + 3*16]
+        vmovdqu xmm8,  [rsp + LOCAL_STORAGE + 2*16]
+        vmovdqu xmm7,  [rsp + LOCAL_STORAGE + 1*16]
+        vmovdqu xmm6,  [rsp + LOCAL_STORAGE + 0*16]
 %endif
 
-;; Required for Update/GMC_ENC
-        mov     rsp, r14
-        pop     r15
-        pop     r14
-        pop     r13
-        pop     r12
+        ;; Required for Update/GCM_ENC
+        mov     r12, [rsp + GP_OFFSET + 1*8]
+        mov     r13, [rsp + GP_OFFSET + 2*8]
+        mov     r14, [rsp + GP_OFFSET + 3*8]
+        mov     r15, [rsp + GP_OFFSET + 4*8]
+        mov     rsp, [rsp + GP_OFFSET + 0*8]
 %endmacro
 
 %macro CALC_J0 15
@@ -3075,19 +3099,10 @@ FN_NAME(precomp,_):
         jz      error_precomp
 %endif
 
-        push    r12
-        push    r13
-        push    r14
-        push    r15
-
-        mov     r14, rsp
-
-        sub     rsp, VARIABLE_OFFSET
-        and     rsp, ~63                                 ; align rsp to 64 bytes
-
 %ifidn __OUTPUT_FORMAT__, win64
+        sub     rsp, 1*16
         ; only xmm6 needs to be maintained
-        vmovdqu [rsp + LOCAL_STORAGE + 0*16],xmm6
+        vmovdqu [rsp + 0*16],xmm6
 %endif
 
         vpxor   xmm6, xmm6
@@ -3113,14 +3128,9 @@ FN_NAME(precomp,_):
         PRECOMPUTE arg1, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5
 
 %ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm6, [rsp + LOCAL_STORAGE + 0*16]
+        vmovdqu xmm6, [rsp + 0*16]
+        add     rsp, 1*16
 %endif
-        mov     rsp, r14
-
-        pop     r15
-        pop     r14
-        pop     r13
-        pop     r12
 
 %ifdef SAFE_DATA
         clear_scratch_gps_asm
@@ -3160,7 +3170,7 @@ FN_NAME(init,_):
 %ifidn __OUTPUT_FORMAT__, win64
         push    r14
         push    r15
-        mov     r14, rsp
+        lea     r14, [rsp + 4*8]
 	; xmm6 needs to be maintained for Windows
 	sub	rsp, 1*16
 	vmovdqu	[rsp + 0*16], xmm6
@@ -3202,7 +3212,7 @@ exit_init:
 
 %ifidn __OUTPUT_FORMAT__, win64
 	vmovdqu	xmm6 , [rsp + 0*16]
-        mov     rsp, r14
+        add     rsp, 1*16
         pop     r15
         pop     r14
 %endif
@@ -3256,7 +3266,7 @@ FN_NAME(init_var_iv,_):
 %ifidn __OUTPUT_FORMAT__, win64
         push    r14
         push    r15
-        mov     r14, rsp
+        lea     r14, [rsp + 4*8]
 	; xmm6 needs to be maintained for Windows
 	sub	rsp, 2*16
 	vmovdqu	[rsp + 0*16], xmm6
@@ -3312,7 +3322,7 @@ exit_init_IV:
 %ifidn __OUTPUT_FORMAT__, win64
 	vmovdqu	xmm6, [rsp + 0*16]
 	vmovdqu	xmm14, [rsp + 1*16]
-        mov     rsp, r14
+        add     rsp, 2*16
         pop     r15
         pop     r14
 %endif
diff --git a/lib/include/gcm_defines.inc b/lib/include/gcm_defines.inc
index 56be5fa0..3d206197 100644
--- a/lib/include/gcm_defines.inc
+++ b/lib/include/gcm_defines.inc
@@ -244,13 +244,13 @@ mksection .text
 	%xdefine arg2 rdx
 	%xdefine arg3 r8
 	%xdefine arg4 r9
-	%xdefine arg5  qword [r14 + STACK_OFFSET + 8*5]
-	%xdefine arg6  qword [r14 + STACK_OFFSET + 8*6]
-	%xdefine arg7  qword [r14 + STACK_OFFSET + 8*7]
-	%xdefine arg8  qword [r14 + STACK_OFFSET + 8*8]
-	%xdefine arg9  qword [r14 + STACK_OFFSET + 8*9]
-	%xdefine arg10 qword [r14 + STACK_OFFSET + 8*10]
-	%xdefine arg11 qword [r14 + STACK_OFFSET + 8*11]
+	%xdefine arg5  qword [r14 + 8*5]
+	%xdefine arg6  qword [r14 + 8*6]
+	%xdefine arg7  qword [r14 + 8*7]
+	%xdefine arg8  qword [r14 + 8*8]
+	%xdefine arg9  qword [r14 + 8*9]
+	%xdefine arg10 qword [r14 + 8*10]
+	%xdefine arg11 qword [r14 + 8*11]
 %else
 	%xdefine arg1 rdi
 	%xdefine arg2 rsi
@@ -258,11 +258,11 @@ mksection .text
 	%xdefine arg4 rcx
 	%xdefine arg5 r8
 	%xdefine arg6 r9
-	%xdefine arg7  qword [r14 + STACK_OFFSET + 8*1]
-	%xdefine arg8  qword [r14 + STACK_OFFSET + 8*2]
-	%xdefine arg9  qword [r14 + STACK_OFFSET + 8*3]
-	%xdefine arg10 qword [r14 + STACK_OFFSET + 8*4]
-	%xdefine arg11 qword [r14 + STACK_OFFSET + 8*5]
+	%xdefine arg7  qword [r14 + 8*1]
+	%xdefine arg8  qword [r14 + 8*2]
+	%xdefine arg9  qword [r14 + 8*3]
+	%xdefine arg10 qword [r14 + 8*4]
+	%xdefine arg11 qword [r14 + 8*5]
 %endif
 
 %ifdef NT_LDST
diff --git a/lib/sse_t1/gcm_api_sse.inc b/lib/sse_t1/gcm_api_sse.inc
index 6a717bba..270ae14b 100644
--- a/lib/sse_t1/gcm_api_sse.inc
+++ b/lib/sse_t1/gcm_api_sse.inc
@@ -53,19 +53,10 @@ FN_NAME(precomp,_):
         jz      error_precomp
 %endif
 
-        push    r12
-        push    r13
-        push    r14
-        push    r15
-
-        mov     r14, rsp
-
-        sub     rsp, VARIABLE_OFFSET
-        and     rsp, ~63                                ; align rsp to 64 bytes
-
 %ifidn __OUTPUT_FORMAT__, win64
+        sub     rsp, 1*16
         ; only xmm6 needs to be maintained
-        movdqu [rsp + LOCAL_STORAGE + 0*16],xmm6
+        movdqu [rsp +  0*16], xmm6
 %endif
 
 	pxor	xmm6, xmm6
@@ -95,14 +86,9 @@ FN_NAME(precomp,_):
         clear_scratch_xmms_sse_asm
 %endif
 %ifidn __OUTPUT_FORMAT__, win64
-       movdqu xmm6, [rsp + LOCAL_STORAGE + 0*16]
+        movdqu  xmm6, [rsp + 0*16]
+        add     rsp, 1*16
 %endif
-        mov     rsp, r14
-
-        pop     r15
-        pop     r14
-        pop     r13
-        pop     r12
 
 exit_precomp:
 
diff --git a/lib/sse_t1/gcm_gmac_api_sse.inc b/lib/sse_t1/gcm_gmac_api_sse.inc
index da90159d..7ecabb01 100644
--- a/lib/sse_t1/gcm_gmac_api_sse.inc
+++ b/lib/sse_t1/gcm_gmac_api_sse.inc
@@ -64,14 +64,9 @@ ghash_pre_sse_no_aesni:
 %endif
 
 %ifidn __OUTPUT_FORMAT__, win64
-        push    r14
-        mov     r14, rsp
-
-        sub     rsp, VARIABLE_OFFSET
-        and     rsp, ~63                                 ; align rsp to 64 bytes
-
+        sub     rsp, 1*16
         ; only xmm6 needs to be maintained
-        movdqa [rsp + LOCAL_STORAGE + 0*16],xmm6
+        movdqu [rsp + 0*16], xmm6
 %endif
         movdqu xmm6, [arg1]
         pshufb  xmm6, [rel SHUF_MASK]
@@ -98,10 +93,8 @@ ghash_pre_sse_no_aesni:
         clear_scratch_xmms_sse_asm
 %endif
 %ifidn __OUTPUT_FORMAT__, win64
-        movdqu xmm6, [rsp + LOCAL_STORAGE + 0*16]
-        mov     rsp, r14
-        pop     r14
-
+        movdqu  xmm6, [rsp + 0*16]
+        add     rsp, 1*16
 %endif
 exit_ghash_pre:
         ret
diff --git a/lib/sse_t1/gcm_sgl_api_sse.inc b/lib/sse_t1/gcm_sgl_api_sse.inc
index 82f7b2b7..30c7022c 100644
--- a/lib/sse_t1/gcm_sgl_api_sse.inc
+++ b/lib/sse_t1/gcm_sgl_api_sse.inc
@@ -51,7 +51,7 @@ FN_NAME(init,_):
 %ifidn __OUTPUT_FORMAT__, win64
         push    r14
         push    r15
-        mov     r14, rsp
+        lea     r14, [rsp + 4*8]
 	; xmm6 needs to be maintained for Windows
 	sub	rsp, 1*16
 	movdqu	[rsp + 0*16], xmm6
@@ -93,7 +93,7 @@ exit_init:
 
 %ifidn __OUTPUT_FORMAT__, win64
 	movdqu	xmm6 , [rsp + 0*16]
-        mov     rsp, r14
+        add     rsp, 16
         pop     r15
         pop     r14
 %endif
@@ -147,7 +147,7 @@ FN_NAME(init_var_iv,_):
 %ifidn __OUTPUT_FORMAT__, win64
         push    r14
         push    r15
-        mov     r14, rsp
+        lea     r14, [rsp + 4*8]
 	; xmm6 needs to be maintained for Windows
 	sub	rsp, 1*16
 	movdqu	[rsp + 0*16], xmm6
@@ -201,7 +201,7 @@ exit_init_IV:
 
 %ifidn __OUTPUT_FORMAT__, win64
 	movdqu	xmm6 , [rsp + 0*16]
-        mov     rsp, r14
+        add     rsp, 1*16
         pop     r15
         pop     r14
 %endif
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index 6d3ec092..27107606 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -155,8 +155,8 @@
 %define NROUNDS 13
 %endif
 
-; need to push 4 registers into stack to maintain
-%define STACK_OFFSET 8*4
+; need to store 5 GP registers on stack (align to 16 bytes)
+%define GP_STORAGE 8*6
 
 %define	TMP2	16*0    ; Temporary storage for AES State 2 (State 1 is stored in an XMM register)
 %define	TMP3	16*1    ; Temporary storage for AES State 3
@@ -174,7 +174,24 @@
 	%define	XMM_STORAGE	0
 %endif
 
-%define	VARIABLE_OFFSET	LOCAL_STORAGE + XMM_STORAGE
+%define GP_OFFSET (LOCAL_STORAGE + XMM_STORAGE)
+
+%define	VARIABLE_OFFSET	(GP_STORAGE + LOCAL_STORAGE + XMM_STORAGE)
+
+;; extra memory for GCM context structure
+%define CONTEXT_SIZE    6*16
+%define CONTEXT_OFFSET  VARIABLE_OFFSET
+
+;; Full stack frame layout:
+;; + 16*6  -> ---------------------------
+;;            GCM CONTEXT (JOB API only)
+;; + 6*8   -> ---------------------------
+;;            GP STORAGE
+;; + 16*10 -> --------------------------
+;;            XMM STORAGE (windows only)
+;; + 16*7  -> --------------------------
+;;            LOCAL STORAGE
+;; RSP/R14 -> --------------------------
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Utility Macros
@@ -1567,58 +1584,65 @@ movdqu  %%T_key, [%%GDATA_KEY+16*j]				; encrypt with last (14th) key round (12
 
 ;; Start of Stack Setup
 
-%macro FUNC_SAVE 0
+%macro FUNC_SAVE 0-1
 	;; Required for Update/GCM_ENC
-	;the number of pushes must equal STACK_OFFSET
-        push    r12
-        push    r13
-        push    r14
-        push    r15
-        mov     r14, rsp
+        mov     rax, rsp
 
+%if %0 == 0
 	sub     rsp, VARIABLE_OFFSET
+%else
+%ifidni %1, alloc_context
+        sub     rsp, VARIABLE_OFFSET + CONTEXT_SIZE
+%endif
+%endif
 	and     rsp, ~63
 
+        mov     [rsp + GP_OFFSET + 0*8], rax ; original rsp pointer
+        mov     [rsp + GP_OFFSET + 1*8], r12
+        mov     [rsp + GP_OFFSET + 2*8], r13
+        mov     [rsp + GP_OFFSET + 3*8], r14
+        mov     [rsp + GP_OFFSET + 4*8], r15
+        mov     r14, rax
+
 %ifidn __OUTPUT_FORMAT__, win64
         ; xmm6:xmm15 need to be maintained for Windows
-        movdqu [rsp + LOCAL_STORAGE + 0*16],xmm6
-        movdqu [rsp + LOCAL_STORAGE + 1*16],xmm7
-        movdqu [rsp + LOCAL_STORAGE + 2*16],xmm8
-        movdqu [rsp + LOCAL_STORAGE + 3*16],xmm9
-        movdqu [rsp + LOCAL_STORAGE + 4*16],xmm10
-        movdqu [rsp + LOCAL_STORAGE + 5*16],xmm11
-        movdqu [rsp + LOCAL_STORAGE + 6*16],xmm12
-        movdqu [rsp + LOCAL_STORAGE + 7*16],xmm13
-        movdqu [rsp + LOCAL_STORAGE + 8*16],xmm14
-        movdqu [rsp + LOCAL_STORAGE + 9*16],xmm15
+        movdqu  [rsp + LOCAL_STORAGE + 0*16], xmm6
+        movdqu  [rsp + LOCAL_STORAGE + 1*16], xmm7
+        movdqu  [rsp + LOCAL_STORAGE + 2*16], xmm8
+        movdqu  [rsp + LOCAL_STORAGE + 3*16], xmm9
+        movdqu  [rsp + LOCAL_STORAGE + 4*16], xmm10
+        movdqu  [rsp + LOCAL_STORAGE + 5*16], xmm11
+        movdqu  [rsp + LOCAL_STORAGE + 6*16], xmm12
+        movdqu  [rsp + LOCAL_STORAGE + 7*16], xmm13
+        movdqu  [rsp + LOCAL_STORAGE + 8*16], xmm14
+        movdqu  [rsp + LOCAL_STORAGE + 9*16], xmm15
 %endif
 %endmacro
 
 %macro FUNC_RESTORE 0
 
 %ifdef SAFE_DATA
-        clear_scratch_gps_asm
         clear_scratch_xmms_sse_asm
 %endif
 %ifidn __OUTPUT_FORMAT__, win64
-        movdqu xmm15  , [rsp + LOCAL_STORAGE + 9*16]
-        movdqu xmm14  , [rsp + LOCAL_STORAGE + 8*16]
-        movdqu xmm13  , [rsp + LOCAL_STORAGE + 7*16]
-        movdqu xmm12  , [rsp + LOCAL_STORAGE + 6*16]
-        movdqu xmm11  , [rsp + LOCAL_STORAGE + 5*16]
-        movdqu xmm10  , [rsp + LOCAL_STORAGE + 4*16]
-        movdqu xmm9 , [rsp + LOCAL_STORAGE + 3*16]
-        movdqu xmm8 , [rsp + LOCAL_STORAGE + 2*16]
-        movdqu xmm7 , [rsp + LOCAL_STORAGE + 1*16]
-        movdqu xmm6 , [rsp + LOCAL_STORAGE + 0*16]
+        movdqu  xmm15, [rsp + LOCAL_STORAGE + 9*16]
+        movdqu  xmm14, [rsp + LOCAL_STORAGE + 8*16]
+        movdqu  xmm13, [rsp + LOCAL_STORAGE + 7*16]
+        movdqu  xmm12, [rsp + LOCAL_STORAGE + 6*16]
+        movdqu  xmm11, [rsp + LOCAL_STORAGE + 5*16]
+        movdqu  xmm10, [rsp + LOCAL_STORAGE + 4*16]
+        movdqu  xmm9,  [rsp + LOCAL_STORAGE + 3*16]
+        movdqu  xmm8,  [rsp + LOCAL_STORAGE + 2*16]
+        movdqu  xmm7,  [rsp + LOCAL_STORAGE + 1*16]
+        movdqu  xmm6,  [rsp + LOCAL_STORAGE + 0*16]
 %endif
 
-;; Required for Update/GCM_ENC
-        mov     rsp, r14
-        pop     r15
-        pop     r14
-        pop     r13
-        pop     r12
+        ;; Required for Update/GCM_ENC
+        mov     r12, [rsp + GP_OFFSET + 1*8]
+        mov     r13, [rsp + GP_OFFSET + 2*8]
+        mov     r14, [rsp + GP_OFFSET + 3*8]
+        mov     r15, [rsp + GP_OFFSET + 4*8]
+        mov     rsp, [rsp + GP_OFFSET + 0*8]
 %endmacro
 
 %macro CALC_J0 15
-- 
GitLab


From 440466c7f982b3426960c9057560aa8dd7eb0866 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 12 Apr 2023 17:14:58 +0100
Subject: [PATCH 230/332] lib: [gcm] optimize GCM API's used in JOB and BURST
 API

- GCM API takes JOB structure as an argument and returns JOB
- it eliminates one extra call and JOB API can call algorithmic code directly
---
 lib/avx512_t2/gcm_api_vaes_avx512.inc | 119 ++++----
 lib/avx512_t2/gcm_vaes_avx512.inc     |  39 ++-
 lib/include/gcm.h                     | 388 ++++++--------------------
 lib/include/gcm_avx512.inc            | 130 +++++----
 lib/include/gcm_avx_gen2.inc          | 127 +++++----
 lib/include/gcm_avx_gen4.inc          | 129 +++++----
 lib/include/mb_mgr_job_api.h          | 133 ++-------
 lib/sse_t1/gcm_api_sse.inc            | 107 ++++---
 lib/sse_t1/gcm_sse.inc                |  19 +-
 9 files changed, 497 insertions(+), 694 deletions(-)

diff --git a/lib/avx512_t2/gcm_api_vaes_avx512.inc b/lib/avx512_t2/gcm_api_vaes_avx512.inc
index d9c45c5e..5ba50f2b 100644
--- a/lib/avx512_t2/gcm_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_api_vaes_avx512.inc
@@ -31,6 +31,7 @@
 %include "include/error.inc"
 %include "include/os.inc"
 %include "include/clear_regs.inc"
+%include "include/imb_job.inc"
 
 %ifndef GCM_API_VAES_AVX512_INC
 %define GCM_API_VAES_AVX512_INC
@@ -382,43 +383,54 @@ skip_aad_check_error_dec:
 ;
 ; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
 ;
-;void   aes_gcm_enc_var_iv_128_vaes_avx512 / aes_gcm_enc_var_iv_192_vaes_avx512 /
-;       aes_gcm_enc_var_iv_256_vaes_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *out,
-;        const u8  *in,
-;        u64       msg_len,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len,
-;        u8        *auth_tag,
-;        const u64 auth_tag_len);
+;IMB_JOB *aes_gcm_enc_var_iv_128_vaes_avx512 / aes_gcm_enc_var_iv_192_vaes_avx512 /
+;       aes_gcm_enc_var_iv_256_vaes_avx512(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc_var_iv,_),function,)
+MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
 FN_NAME(enc_var_iv,_):
-        FUNC_SAVE
-        cmp     arg7, 12
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _enc_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
         je      iv_len_12_enc_IV
 
-        GCM_INIT arg1, arg2, arg6, arg8, arg9, r10, r11, r12, k1, xmm14, xmm2, \
-                zmm1, zmm11, zmm3, zmm4, zmm5, zmm6, zmm7, zmm8, zmm9, zmm10, \
-                zmm12, zmm13, zmm15, zmm16, zmm17, zmm18, zmm19, zmm20, single_call, arg7
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {qword [arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12, k1, xmm14, xmm2, \
+                 zmm1, zmm11, zmm3, zmm4, zmm5,   zmm6, zmm7, zmm8, zmm9, zmm10, \
+                 zmm12, zmm13, zmm15, zmm16, zmm17, zmm18, zmm19, zmm20, single_call, \
+                 {[arg2 + _iv_len_in_bytes]}
         jmp     skip_iv_len_12_enc_IV
 
 iv_len_12_enc_IV:
-        GCM_INIT arg1, arg2, arg6, arg8, arg9, r10, r11, r12, k1, xmm14, xmm2, \
-                zmm1, zmm11, zmm3, zmm4, zmm5, zmm6, zmm7, zmm8, zmm9, zmm10, \
-                zmm12, zmm13, zmm15, zmm16, zmm17, zmm18, zmm19, zmm20, single_call
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {qword [arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12, k1, xmm14, xmm2, \
+                 zmm1, zmm11, zmm3, zmm4, zmm5,   zmm6, zmm7, zmm8, zmm9, zmm10, \
+                 zmm12, zmm13, zmm15, zmm16, zmm17, zmm18, zmm19, zmm20, single_call
 
 skip_iv_len_12_enc_IV:
-        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC, single_call
-        GCM_COMPLETE arg1, arg2, arg10, arg11, single_call, k1, r10, r11, r12
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     rbp, [arg2 + _msg_len_to_cipher]
+        GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, rbp, ENC, single_call
+
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
+                     single_call, k1, r10, r11, r12
+
 %ifdef SAFE_DATA
         clear_zmms_avx512 xmm1, xmm4, xmm6, xmm7, xmm8, xmm12, xmm13, xmm14, \
                           xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm26, xmm30, xmm31
 %endif
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
         FUNC_RESTORE
         ret
 
@@ -426,43 +438,54 @@ skip_iv_len_12_enc_IV:
 ;
 ; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
 ;
-;void   aes_gcm_dec_var_iv_128_vaes_avx512 / aes_gcm_dec_var_iv_192_vaes_avx512 /
-;       aes_gcm_dec_var_iv_256_vaes_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *out,
-;        const u8  *in,
-;        u64       msg_len,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len,
-;        u8        *auth_tag,
-;        const u64 auth_tag_len);
+;IMB_JOB *aes_gcm_dec_var_iv_128_vaes_avx512 / aes_gcm_dec_var_iv_192_vaes_avx512 /
+;       aes_gcm_dec_var_iv_256_vaes_avx512(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec_var_iv,_),function,)
+MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
 FN_NAME(dec_var_iv,_):
-        FUNC_SAVE
-        cmp     arg7, 12
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _dec_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
         je      iv_len_12_dec_IV
 
-        GCM_INIT arg1, arg2, arg6, arg8, arg9, r10, r11, r12, k1, xmm14, xmm2, \
-                zmm1, zmm11, zmm3, zmm4, zmm5, zmm6, zmm7, zmm8, zmm9, zmm10, zmm12, \
-                zmm13, zmm15, zmm16, zmm17, zmm18, zmm19, zmm20, single_call, arg7
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {qword [arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12, k1, xmm14, xmm2, \
+                 zmm1, zmm11, zmm3, zmm4, zmm5,   zmm6, zmm7, zmm8, zmm9, zmm10, \
+                 zmm12, zmm13, zmm15, zmm16, zmm17, zmm18, zmm19, zmm20, single_call, \
+                 {qword [arg2 + _iv_len_in_bytes]}
         jmp     skip_iv_len_12_dec_IV
 
 iv_len_12_dec_IV:
-        GCM_INIT arg1, arg2, arg6, arg8, arg9, r10, r11, r12, k1, xmm14, xmm2, \
-                zmm1, zmm11, zmm3, zmm4, zmm5, zmm6, zmm7, zmm8, zmm9, zmm10, \
-                zmm12, zmm13, zmm15, zmm16, zmm17, zmm18, zmm19, zmm20, single_call
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {qword [arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12, k1, xmm14, xmm2, \
+                 zmm1, zmm11, zmm3, zmm4, zmm5,   zmm6, zmm7, zmm8, zmm9, zmm10, \
+                 zmm12, zmm13, zmm15, zmm16, zmm17, zmm18, zmm19, zmm20, single_call
 
 skip_iv_len_12_dec_IV:
-        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
-        GCM_COMPLETE arg1, arg2, arg10, arg11, single_call, k1, r10, r11, r12
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     rbp, [arg2 + _msg_len_to_cipher]
+        GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, rbp, DEC, single_call
+
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
+                     single_call, k1, r10, r11, r12
+
 %ifdef SAFE_DATA
         clear_zmms_avx512 xmm1, xmm4, xmm6, xmm7, xmm8, xmm12, xmm13, xmm14, \
                           xmm16, xmm17, xmm18, xmm19, xmm20, xmm21, xmm26, xmm30, xmm31
 %endif
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
         FUNC_RESTORE
         ret
 
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/avx512_t2/gcm_vaes_avx512.inc
index f5d3be3a..95168650 100644
--- a/lib/avx512_t2/gcm_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_vaes_avx512.inc
@@ -179,19 +179,20 @@
 %define STACK_FRAME_SIZE_SMALL  (STACK_LOCAL_OFFSET)
 
 ;; extra memory for GCM context structure
-%define CONTEXT_SIZE    6*16
+%define CONTEXT_SIZE    (6*16)
 %define CONTEXT_OFFSET  STACK_FRAME_SIZE
 
 ;; Full stack frame layout:
-;; + 16*6  -> ---------------------------
-;;            GCM CONTEXT (JOB API only)
-;; + 32*16 -> ---------------------------
-;;            LOCAL STORAGE
-;; + 16*10 -> --------------------------
-;;            XMM STORAGE (windows only)
-;; + 8*8   -> --------------------------
-;;            GP STORAGE
-;; RSP/R14 -> --------------------------
+;;                    RETURN ADDRESS + ARGS
+;; R14 =   + 16*6  -> ---------------------------
+;;                    GCM CONTEXT (JOB API only)
+;;         + 32*16 -> ---------------------------
+;;                    LOCAL STORAGE
+;;         + 16*10 -> --------------------------
+;;                    XMM STORAGE (windows only)
+;;         + 8*8   -> --------------------------
+;;                    GP STORAGE
+;; RSP =           -> --------------------------
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;;; Utility Macros
@@ -2730,29 +2731,21 @@
 ;;; Save register content for the caller
 %macro FUNC_SAVE 0-1
 
-%assign use_big_frame 1
-%assign alloc_context 0
+%assign my_frame_size (STACK_FRAME_SIZE)
 
 %if %0 > 0
 %ifidni %1, small_frame
-%assign use_big_frame 0
+%assign my_frame_size (STACK_FRAME_SIZE_SMALL)
 %endif
+
 %ifidni %1, alloc_context
-%assign alloc_context 1
+%assign my_frame_size (my_frame_size + CONTEXT_SIZE)
 %endif
 %endif
         ;; Required for Update/GMC_ENC
         mov     rax, rsp
 
-%if use_big_frame > 0
-%if alloc_context > 1
-        sub     rsp, STACK_FRAME_SIZE + CONTEXT_SIZE
-%else
-        sub     rsp, STACK_FRAME_SIZE
-%endif
-%else
-        sub     rsp, STACK_FRAME_SIZE_SMALL
-%endif
+        sub     rsp, my_frame_size
         and     rsp, ~63
 
         mov     [rsp + STACK_GP_OFFSET + 0*8], r12
diff --git a/lib/include/gcm.h b/lib/include/gcm.h
index 2cbc9d42..6903ca1e 100644
--- a/lib/include/gcm.h
+++ b/lib/include/gcm.h
@@ -533,312 +533,90 @@ aes_gcm_init_var_iv_256_avx_gen4(const struct gcm_key_data *key_data,
  * Internal GCM API for SSE/AVX/AVX2/AVX512/AESNI emulation,
  * to be used only through job API.
  */
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_128_sse(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_192_sse(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_256_sse(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_128_sse(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_192_sse(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_256_sse(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_128_avx_gen2(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_192_avx_gen2(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_256_avx_gen2(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_128_avx_gen2(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_192_avx_gen2(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_256_avx_gen2(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_128_avx_gen4(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_192_avx_gen4(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_256_avx_gen4(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_128_avx_gen4(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_192_avx_gen4(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_256_avx_gen4(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_128_avx512(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_192_avx512(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_256_avx512(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_128_avx512(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_192_avx512(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_256_avx512(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_128_vaes_avx512(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_192_vaes_avx512(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_256_vaes_avx512(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_128_vaes_avx512(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_192_vaes_avx512(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_256_vaes_avx512(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_128_sse_no_aesni(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_192_sse_no_aesni(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_enc_var_iv_256_sse_no_aesni(IMB_MGR *state, IMB_JOB *job);
+
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_128_sse_no_aesni(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_192_sse_no_aesni(IMB_MGR *state, IMB_JOB *job);
+IMB_DLL_LOCAL IMB_JOB *
+aes_gcm_dec_var_iv_256_sse_no_aesni(IMB_MGR *state, IMB_JOB *job);
 
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_128_sse(const struct gcm_key_data *key_data,
-                           struct gcm_context_data *context_data,
-                           uint8_t *out, const uint8_t *in,
-                           const uint64_t msg_len,
-                           const uint8_t *iv, const uint64_t iv_len,
-                           const uint8_t *aad, const uint64_t aad_len,
-                           uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_192_sse(const struct gcm_key_data *key_data,
-                           struct gcm_context_data *context_data,
-                           uint8_t *out, const uint8_t *in,
-                           const uint64_t msg_len,
-                           const uint8_t *iv, const uint64_t iv_len,
-                           const uint8_t *aad, const uint64_t aad_len,
-                           uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_256_sse(const struct gcm_key_data *key_data,
-                           struct gcm_context_data *context_data,
-                           uint8_t *out, const uint8_t *in,
-                           const uint64_t msg_len,
-                           const uint8_t *iv, const uint64_t iv_len,
-                           const uint8_t *aad, const uint64_t aad_len,
-                           uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_128_sse(const struct gcm_key_data *key_data,
-                           struct gcm_context_data *context_data,
-                           uint8_t *out, const uint8_t *in,
-                           const uint64_t msg_len,
-                           const uint8_t *iv, const uint64_t iv_len,
-                           const uint8_t *aad, const uint64_t aad_len,
-                           uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_192_sse(const struct gcm_key_data *key_data,
-                           struct gcm_context_data *context_data,
-                           uint8_t *out, const uint8_t *in,
-                           const uint64_t msg_len,
-                           const uint8_t *iv, const uint64_t iv_len,
-                           const uint8_t *aad, const uint64_t aad_len,
-                           uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_256_sse(const struct gcm_key_data *key_data,
-                           struct gcm_context_data *context_data,
-                           uint8_t *out, const uint8_t *in,
-                           const uint64_t msg_len,
-                           const uint8_t *iv, const uint64_t iv_len,
-                           const uint8_t *aad, const uint64_t aad_len,
-                           uint8_t *auth_tag, const uint64_t auth_tag_len);
-
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_128_avx_gen2(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_192_avx_gen2(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_256_avx_gen2(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_128_avx_gen2(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_192_avx_gen2(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_256_avx_gen2(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_128_avx_gen4(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_192_avx_gen4(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_256_avx_gen4(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_128_avx_gen4(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_192_avx_gen4(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_256_avx_gen4(const struct gcm_key_data *key_data,
-                                struct gcm_context_data *context_data,
-                                uint8_t *out, const uint8_t *in,
-                                const uint64_t msg_len,
-                                const uint8_t *iv, const uint64_t iv_len,
-                                const uint8_t *aad, const uint64_t aad_len,
-                                uint8_t *auth_tag, const uint64_t auth_tag_len);
-
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_128_avx512(const struct gcm_key_data *key_data,
-                              struct gcm_context_data *context_data,
-                              uint8_t *out, const uint8_t *in,
-                              const uint64_t msg_len,
-                              const uint8_t *iv, const uint64_t iv_len,
-                              const uint8_t *aad, const uint64_t aad_len,
-                              uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_192_avx512(const struct gcm_key_data *key_data,
-                              struct gcm_context_data *context_data,
-                              uint8_t *out, const uint8_t *in,
-                              const uint64_t msg_len,
-                              const uint8_t *iv, const uint64_t iv_len,
-                              const uint8_t *aad, const uint64_t aad_len,
-                              uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_256_avx512(const struct gcm_key_data *key_data,
-                              struct gcm_context_data *context_data,
-                              uint8_t *out, const uint8_t *in,
-                              const uint64_t msg_len,
-                              const uint8_t *iv, const uint64_t iv_len,
-                              const uint8_t *aad, const uint64_t aad_len,
-                              uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_128_avx512(const struct gcm_key_data *key_data,
-                              struct gcm_context_data *context_data,
-                              uint8_t *out, const uint8_t *in,
-                              const uint64_t msg_len,
-                              const uint8_t *iv, const uint64_t iv_len,
-                              const uint8_t *aad, const uint64_t aad_len,
-                              uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_192_avx512(const struct gcm_key_data *key_data,
-                              struct gcm_context_data *context_data,
-                              uint8_t *out, const uint8_t *in,
-                              const uint64_t msg_len,
-                              const uint8_t *iv, const uint64_t iv_len,
-                              const uint8_t *aad, const uint64_t aad_len,
-                              uint8_t *auth_tag, const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_256_avx512(const struct gcm_key_data *key_data,
-                              struct gcm_context_data *context_data,
-                              uint8_t *out, const uint8_t *in,
-                              const uint64_t msg_len,
-                              const uint8_t *iv, const uint64_t iv_len,
-                              const uint8_t *aad, const uint64_t aad_len,
-                              uint8_t *auth_tag, const uint64_t auth_tag_len);
-
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_128_vaes_avx512(const struct gcm_key_data *key_data,
-                                   struct gcm_context_data *context_data,
-                                   uint8_t *out, const uint8_t *in,
-                                   const uint64_t msg_len,
-                                   const uint8_t *iv, const uint64_t iv_len,
-                                   const uint8_t *aad, const uint64_t aad_len,
-                                   uint8_t *auth_tag,
-                                   const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_192_vaes_avx512(const struct gcm_key_data *key_data,
-                                   struct gcm_context_data *context_data,
-                                   uint8_t *out, const uint8_t *in,
-                                   const uint64_t msg_len,
-                                   const uint8_t *iv, const uint64_t iv_len,
-                                   const uint8_t *aad, const uint64_t aad_len,
-                                   uint8_t *auth_tag,
-                                   const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_256_vaes_avx512(const struct gcm_key_data *key_data,
-                                   struct gcm_context_data *context_data,
-                                   uint8_t *out, const uint8_t *in,
-                                   const uint64_t msg_len,
-                                   const uint8_t *iv, const uint64_t iv_len,
-                                   const uint8_t *aad, const uint64_t aad_len,
-                                   uint8_t *auth_tag,
-                                   const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_128_vaes_avx512(const struct gcm_key_data *key_data,
-                                   struct gcm_context_data *context_data,
-                                   uint8_t *out, const uint8_t *in,
-                                   const uint64_t msg_len,
-                                   const uint8_t *iv, const uint64_t iv_len,
-                                   const uint8_t *aad, const uint64_t aad_len,
-                                   uint8_t *auth_tag,
-                                   const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_192_vaes_avx512(const struct gcm_key_data *key_data,
-                                   struct gcm_context_data *context_data,
-                                   uint8_t *out, const uint8_t *in,
-                                   const uint64_t msg_len,
-                                   const uint8_t *iv, const uint64_t iv_len,
-                                   const uint8_t *aad, const uint64_t aad_len,
-                                   uint8_t *auth_tag,
-                                   const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_256_vaes_avx512(const struct gcm_key_data *key_data,
-                                   struct gcm_context_data *context_data,
-                                   uint8_t *out, const uint8_t *in,
-                                   const uint64_t msg_len,
-                                   const uint8_t *iv, const uint64_t iv_len,
-                                   const uint8_t *aad, const uint64_t aad_len,
-                                   uint8_t *auth_tag,
-                                   const uint64_t auth_tag_len);
-
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_128_sse_no_aesni(const struct gcm_key_data *key_data,
-                                    struct gcm_context_data *context_data,
-                                    uint8_t *out, const uint8_t *in,
-                                    const uint64_t msg_len,
-                                    const uint8_t *iv, const uint64_t iv_len,
-                                    const uint8_t *aad, const uint64_t aad_len,
-                                    uint8_t *auth_tag,
-                                    const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_192_sse_no_aesni(const struct gcm_key_data *key_data,
-                                    struct gcm_context_data *context_data,
-                                    uint8_t *out, const uint8_t *in,
-                                    const uint64_t msg_len,
-                                    const uint8_t *iv, const uint64_t iv_len,
-                                    const uint8_t *aad, const uint64_t aad_len,
-                                    uint8_t *auth_tag,
-                                    const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_enc_var_iv_256_sse_no_aesni(const struct gcm_key_data *key_data,
-                                    struct gcm_context_data *context_data,
-                                    uint8_t *out, const uint8_t *in,
-                                    const uint64_t msg_len,
-                                    const uint8_t *iv, const uint64_t iv_len,
-                                    const uint8_t *aad, const uint64_t aad_len,
-                                    uint8_t *auth_tag,
-                                    const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_128_sse_no_aesni(const struct gcm_key_data *key_data,
-                                    struct gcm_context_data *context_data,
-                                    uint8_t *out, const uint8_t *in,
-                                    const uint64_t msg_len,
-                                    const uint8_t *iv, const uint64_t iv_len,
-                                    const uint8_t *aad, const uint64_t aad_len,
-                                    uint8_t *auth_tag,
-                                    const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_192_sse_no_aesni(const struct gcm_key_data *key_data,
-                                    struct gcm_context_data *context_data,
-                                    uint8_t *out, const uint8_t *in,
-                                    const uint64_t msg_len,
-                                    const uint8_t *iv, const uint64_t iv_len,
-                                    const uint8_t *aad, const uint64_t aad_len,
-                                    uint8_t *auth_tag,
-                                    const uint64_t auth_tag_len);
-IMB_DLL_LOCAL void
-aes_gcm_dec_var_iv_256_sse_no_aesni(const struct gcm_key_data *key_data,
-                                    struct gcm_context_data *context_data,
-                                    uint8_t *out, const uint8_t *in,
-                                    const uint64_t msg_len,
-                                    const uint8_t *iv, const uint64_t iv_len,
-                                    const uint8_t *aad, const uint64_t aad_len,
-                                    uint8_t *auth_tag,
-                                    const uint64_t auth_tag_len);
 /*
  * GHASH API for SSE/AVX/AVX2/AVX512/AESNI emulation
  */
diff --git a/lib/include/gcm_avx512.inc b/lib/include/gcm_avx512.inc
index 79cfd5a0..25e1611d 100644
--- a/lib/include/gcm_avx512.inc
+++ b/lib/include/gcm_avx512.inc
@@ -122,6 +122,7 @@
 %include "include/imb_job.inc"
 %include "include/memcpy.inc"
 %include "include/error.inc"
+%include "include/imb_job.inc"
 
 %ifndef GCM128_MODE
 %ifndef GCM192_MODE
@@ -181,15 +182,16 @@ default rel
 %define CONTEXT_OFFSET  VARIABLE_OFFSET
 
 ;; Full stack frame layout:
-;; + 16*6  -> ---------------------------
-;;            GCM CONTEXT (JOB API only)
-;; + 6*8   -> ---------------------------
-;;            GP STORAGE
-;; + 16*10 -> --------------------------
-;;            XMM STORAGE (windows only)
-;; + 16*7  -> --------------------------
-;;            LOCAL STORAGE
-;; RSP/R14 -> --------------------------
+;;                   RETURN ADDRESS + ARGS
+;; R14 =  + 16*6  -> ---------------------------
+;;                   GCM CONTEXT (JOB API only)
+;;        + 6*8   -> ---------------------------
+;;                   GP STORAGE
+;;        + 16*10 -> --------------------------
+;;                   XMM STORAGE (windows only)
+;;        + 16*7  -> --------------------------
+;;                   LOCAL STORAGE
+;; RSP =          -> --------------------------
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Utility Macros
@@ -3912,73 +3914,99 @@ skip_aad_check_error_dec:
 ;
 ; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
 ;
-;void   aes_gcm_enc_var_iv_128_avx512 / aes_gcm_enc_var_iv_192_avx512 /
-;       aes_gcm_enc_var_iv_256_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *out,
-;        const u8  *in,
-;        u64       msg_len,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len,
-;        u8        *auth_tag,
-;        const u64 auth_tag_len);
+;IMB_JOB *aes_gcm_enc_var_iv_128_avx512 / aes_gcm_enc_var_iv_192_avx512 /
+;       aes_gcm_enc_var_iv_256_avx512(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc_var_iv,_),function,)
+MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
 FN_NAME(enc_var_iv,_):
-        FUNC_SAVE
-        cmp     arg7, 12
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _enc_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
         je      iv_len_12_enc_IV
 
-	GCM_INIT arg1, arg2, arg6, arg8, arg9, r10, r11, r12, arg7
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12, {[arg2 + _iv_len_in_bytes]}
+
         jmp     skip_iv_len_12_enc_IV
 
 iv_len_12_enc_IV:
-	GCM_INIT arg1, arg2, arg6, arg8, arg9, r10, r11, r12
+	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12
 
 skip_iv_len_12_enc_IV:
-        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC, single_call
-        GCM_COMPLETE arg1, arg2, arg10, arg11, single_call
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
+        mov     arg2, [arg2 + _msg_len_to_cipher]
+	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, ENC, single_call
+
+        mov     arg2, [rsp + GP_OFFSET + 5*8]
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
+                     single_call
+
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
         FUNC_RESTORE
-        ret
+	ret
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;
 ; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
 ;
-;void   aes_gcm_dec_var_iv_128_avx512 / aes_gcm_dec_var_iv_192_avx512 /
-;       aes_gcm_dec_var_iv_256_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *out,
-;        const u8  *in,
-;        u64       msg_len,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len,
-;        u8        *auth_tag,
-;        const u64 auth_tag_len);
+;IMB_JOB *aes_gcm_dec_var_iv_128_avx512 / aes_gcm_dec_var_iv_192_avx512 /
+;       aes_gcm_dec_var_iv_256_avx512(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec_var_iv,_),function,)
+MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
 FN_NAME(dec_var_iv,_):
-        FUNC_SAVE
-        cmp     arg7, 12
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _dec_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
         je      iv_len_12_dec_IV
 
-	GCM_INIT arg1, arg2, arg6, arg8, arg9, r10, r11, r12, arg7
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12, {[arg2 + _iv_len_in_bytes]}
+
         jmp     skip_iv_len_12_dec_IV
 
 iv_len_12_dec_IV:
-        GCM_INIT arg1, arg2, arg6, arg8, arg9, r10, r11, r12
+	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12
 
 skip_iv_len_12_dec_IV:
-        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
-        GCM_COMPLETE arg1, arg2, arg10, arg11, single_call
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
+        mov     arg2, [arg2 + _msg_len_to_cipher]
+	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, DEC, single_call
+
+        mov     arg2, [rsp + GP_OFFSET + 5*8]
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
+                     single_call
+
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
         FUNC_RESTORE
-        ret
+	ret
 
 %ifdef GCM128_MODE
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
diff --git a/lib/include/gcm_avx_gen2.inc b/lib/include/gcm_avx_gen2.inc
index 8e1682ff..4b1cf359 100644
--- a/lib/include/gcm_avx_gen2.inc
+++ b/lib/include/gcm_avx_gen2.inc
@@ -120,6 +120,8 @@
 %include "include/memcpy.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
+%include "include/imb_job.inc"
+
 %ifndef GCM128_MODE
 %ifndef GCM192_MODE
 %ifndef GCM256_MODE
@@ -176,15 +178,16 @@ default rel
 %define CONTEXT_OFFSET  VARIABLE_OFFSET
 
 ;; Full stack frame layout:
-;; + 16*6  -> ---------------------------
-;;            GCM CONTEXT (JOB API only)
-;; + 6*8   -> ---------------------------
-;;            GP STORAGE
-;; + 16*10 -> --------------------------
-;;            XMM STORAGE (windows only)
-;; + 16*7  -> --------------------------
-;;            LOCAL STORAGE
-;; RSP/R14 -> --------------------------
+;;                   RETURN ADDRESS + ARGS
+;; R14 =  + 16*6  -> ---------------------------
+;;                   GCM CONTEXT (JOB API only)
+;;        + 6*8   -> ---------------------------
+;;                   GP STORAGE
+;;        + 16*10 -> --------------------------
+;;                   XMM STORAGE (windows only)
+;;        + 16*7  -> --------------------------
+;;                   LOCAL STORAGE
+;; RSP =          -> --------------------------
 
 mksection .text
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -2867,72 +2870,94 @@ skip_aad_check_error_dec:
 ;
 ; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
 ;
-;void   aes_gcm_enc_var_iv_128_avx_gen2 / aes_gcm_enc_var_iv_192_avx_gen2 /
-;       aes_gcm_enc_var_iv_256_avx_gen2
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *out,
-;        const u8  *in,
-;        u64       msg_len,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len,
-;        u8        *auth_tag,
-;        const u64 auth_tag_len);
+;IMB_JOB *aes_gcm_enc_var_iv_128_avx_gen2 / aes_gcm_enc_var_iv_192_avx_gen2 /
+;       aes_gcm_enc_var_iv_256_avx_gen2(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc_var_iv,_),function,)
+MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
 FN_NAME(enc_var_iv,_):
-	FUNC_SAVE
-        cmp     arg7, 12
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _enc_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
         je      iv_len_12_enc_IV
 
-	GCM_INIT arg1, arg2, arg6, arg8, arg9, arg7
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 {[arg2 + _iv_len_in_bytes]}
+
         jmp     skip_iv_len_12_enc_IV
 
 iv_len_12_enc_IV:
-	GCM_INIT arg1, arg2, arg6, arg8, arg9
+	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}
 
 skip_iv_len_12_enc_IV:
-	GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC
-	GCM_COMPLETE arg1, arg2, arg10, arg11
-	FUNC_RESTORE
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
+        mov     arg2, [arg2 + _msg_len_to_cipher]
+	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, ENC
+
+        mov     arg2, [rsp + GP_OFFSET + 5*8]
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}
+
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
+        FUNC_RESTORE
 	ret
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;
 ; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
 ;
-;void   aes_gcm_dec_var_iv_128_avx_gen2 / aes_gcm_dec_var_iv_192_avx_gen2 /
-;       aes_gcm_dec_var_iv_256_avx_gen2
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *out,
-;        const u8  *in,
-;        u64       msg_len,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len,
-;        u8        *auth_tag,
-;        const u64 auth_tag_len);
+;IMB_JOB *aes_gcm_dec_var_iv_128_avx_gen2 / aes_gcm_dec_var_iv_192_avx_gen2 /
+;       aes_gcm_dec_var_iv_256_avx_gen2(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec_var_iv,_),function,)
+MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
 FN_NAME(dec_var_iv,_):
-	FUNC_SAVE
-        cmp     arg7, 12
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _dec_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
         je      iv_len_12_dec_IV
 
-	GCM_INIT arg1, arg2, arg6, arg8, arg9, arg7
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 {[arg2 + _iv_len_in_bytes]}
+
         jmp     skip_iv_len_12_dec_IV
 
 iv_len_12_dec_IV:
-	GCM_INIT arg1, arg2, arg6, arg8, arg9
+	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}
 
 skip_iv_len_12_dec_IV:
-	GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC
-	GCM_COMPLETE arg1, arg2, arg10, arg11
-	FUNC_RESTORE
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
+        mov     arg2, [arg2 + _msg_len_to_cipher]
+	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, DEC
+
+        mov     arg2, [rsp + GP_OFFSET + 5*8]
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}
+
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
+        FUNC_RESTORE
 	ret
 
 %ifdef GCM128_MODE
diff --git a/lib/include/gcm_avx_gen4.inc b/lib/include/gcm_avx_gen4.inc
index a4fdd8c7..dd11fb95 100644
--- a/lib/include/gcm_avx_gen4.inc
+++ b/lib/include/gcm_avx_gen4.inc
@@ -119,6 +119,8 @@
 %include "include/memcpy.inc"
 %include "include/cet.inc"
 %include "include/error.inc"
+%include "include/imb_job.inc"
+
 %ifndef GCM128_MODE
 %ifndef GCM192_MODE
 %ifndef GCM256_MODE
@@ -177,15 +179,16 @@ default rel
 %define CONTEXT_OFFSET  VARIABLE_OFFSET
 
 ;; Full stack frame layout:
-;; + 16*6  -> ---------------------------
-;;            GCM CONTEXT (JOB API only)
-;; + 6*8   -> ---------------------------
-;;            GP STORAGE
-;; + 16*10 -> --------------------------
-;;            XMM STORAGE (windows only)
-;; + 16*7  -> --------------------------
-;;            LOCAL STORAGE
-;; RSP/R14 -> --------------------------
+;;                   RETURN ADDRESS + ARGS
+;; R14 =  + 16*6  -> ---------------------------
+;;                   GCM CONTEXT (JOB API only)
+;;        + 6*8   -> ---------------------------
+;;                   GP STORAGE
+;;        + 16*10 -> --------------------------
+;;                   XMM STORAGE (windows only)
+;;        + 16*7  -> --------------------------
+;;                   LOCAL STORAGE
+;; RSP =          -> --------------------------
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Utility Macros
@@ -3987,72 +3990,96 @@ skip_aad_check_error_dec:
 ;
 ; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
 ;
-;void   aes_gcm_enc_var_iv_128_avx_gen4 / aes_gcm_enc_var_iv_192_avx_gen4 /
-;       aes_gcm_enc_var_iv_256_avx_gen4
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *out,
-;        const u8  *in,
-;        u64       msg_len,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len,
-;        u8        *auth_tag,
-;        const u64 auth_tag_len);
+;IMB_JOB *aes_gcm_enc_var_iv_128_avx_gen4 / aes_gcm_enc_var_iv_192_avx_gen4 /
+;       aes_gcm_enc_var_iv_256_avx_gen4(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc_var_iv,_),function,)
+MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
 FN_NAME(enc_var_iv,_):
-	FUNC_SAVE
-        cmp     arg7, 12
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _enc_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
         je      iv_len_12_enc_IV
 
-	GCM_INIT arg1, arg2, arg6, arg8, arg9, arg7
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 {[arg2 + _iv_len_in_bytes]}
+
         jmp     skip_iv_len_12_enc_IV
 
 iv_len_12_enc_IV:
-	GCM_INIT arg1, arg2, arg6, arg8, arg9
+	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}
 
 skip_iv_len_12_enc_IV:
-        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC, single_call
-        GCM_COMPLETE arg1, arg2, arg10, arg11, single_call
-	FUNC_RESTORE
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
+        mov     arg2, [arg2 + _msg_len_to_cipher]
+	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, ENC, single_call
+
+        mov     arg2, [rsp + GP_OFFSET + 5*8]
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
+                     single_call
+
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
+        FUNC_RESTORE
 	ret
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;
 ; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
 ;
-;void   aes_gcm_dec_var_iv_128_avx_gen4 / aes_gcm_dec_var_iv_192_avx_gen4 /
-;       aes_gcm_dec_var_iv_256_avx_gen4
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *out,
-;        const u8  *in,
-;        u64       msg_len,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len,
-;        u8        *auth_tag,
-;        const u64 auth_tag_len);
+;IMB_JOB *aes_gcm_dec_var_iv_128_avx_gen4 / aes_gcm_dec_var_iv_192_avx_gen4 /
+;       aes_gcm_dec_var_iv_256_avx_gen4(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec_var_iv,_),function,)
+MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
 FN_NAME(dec_var_iv,_):
-	FUNC_SAVE
-        cmp     arg7, 12
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _dec_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
         je      iv_len_12_dec_IV
 
-	GCM_INIT arg1, arg2, arg6, arg8, arg9, arg7
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 {[arg2 + _iv_len_in_bytes]}
+
         jmp     skip_iv_len_12_dec_IV
 
 iv_len_12_dec_IV:
-	GCM_INIT arg1, arg2, arg6, arg8, arg9
+	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}
 
 skip_iv_len_12_dec_IV:
-        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
-        GCM_COMPLETE arg1, arg2, arg10, arg11, single_call
-	FUNC_RESTORE
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
+        mov     arg2, [arg2 + _msg_len_to_cipher]
+	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, DEC, single_call
+
+        mov     arg2, [rsp + GP_OFFSET + 5*8]
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
+                     single_call
+
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
+        FUNC_RESTORE
 	ret
 
 %ifdef GCM128_MODE
diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index 884a109c..a56ea7e5 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -184,92 +184,25 @@ __forceinline IMB_JOB * SUBMIT_JOB_AES128_CBCS_1_9_DEC(IMB_JOB *job)
 __forceinline IMB_JOB *SUBMIT_JOB_AES_GCM_DEC(IMB_MGR *state, IMB_JOB *job,
                                               const uint64_t key_sz)
 {
-        DECLARE_ALIGNED(struct gcm_context_data ctx, 16);
-        (void) state;
-
-        if (16 == key_sz) {
-                AES_GCM_DEC_IV_128(job->dec_keys,
-                                   &ctx, job->dst,
-                                   job->src +
-                                   job->cipher_start_src_offset_in_bytes,
-                                   job->msg_len_to_cipher_in_bytes,
-                                   job->iv, job->iv_len_in_bytes,
-                                   job->u.GCM.aad,
-                                   job->u.GCM.aad_len_in_bytes,
-                                   job->auth_tag_output,
-                                   job->auth_tag_output_len_in_bytes);
-        } else if (24 == key_sz) {
-                AES_GCM_DEC_IV_192(job->dec_keys,
-                                   &ctx, job->dst,
-                                   job->src +
-                                   job->cipher_start_src_offset_in_bytes,
-                                   job->msg_len_to_cipher_in_bytes,
-                                   job->iv, job->iv_len_in_bytes,
-                                   job->u.GCM.aad,
-                                   job->u.GCM.aad_len_in_bytes,
-                                   job->auth_tag_output,
-                                   job->auth_tag_output_len_in_bytes);
-        } else { /* assume 32 bytes */
-                AES_GCM_DEC_IV_256(job->dec_keys,
-                                   &ctx, job->dst,
-                                   job->src +
-                                   job->cipher_start_src_offset_in_bytes,
-                                   job->msg_len_to_cipher_in_bytes,
-                                   job->iv, job->iv_len_in_bytes,
-                                   job->u.GCM.aad,
-                                   job->u.GCM.aad_len_in_bytes,
-                                   job->auth_tag_output,
-                                   job->auth_tag_output_len_in_bytes);
-        }
-
-        job->status = IMB_STATUS_COMPLETED;
-        return job;
+        if (16 == key_sz)
+                return AES_GCM_DEC_IV_128(state, job);
+        else if (24 == key_sz)
+                return AES_GCM_DEC_IV_192(state, job);
+        else
+                return AES_GCM_DEC_IV_256(state, job);
 }
 
 __forceinline IMB_JOB *SUBMIT_JOB_AES_GCM_ENC(IMB_MGR *state, IMB_JOB *job,
                                               const uint64_t key_sz)
 {
-        DECLARE_ALIGNED(struct gcm_context_data ctx, 16);
-        (void) state;
-
-        if (16 == key_sz) {
-                AES_GCM_ENC_IV_128(job->enc_keys,
-                                   &ctx, job->dst,
-                                   job->src +
-                                   job->cipher_start_src_offset_in_bytes,
-                                   job->msg_len_to_cipher_in_bytes,
-                                   job->iv, job->iv_len_in_bytes,
-                                   job->u.GCM.aad,
-                                   job->u.GCM.aad_len_in_bytes,
-                                   job->auth_tag_output,
-                                   job->auth_tag_output_len_in_bytes);
-        } else if (24 == key_sz) {
-                AES_GCM_ENC_IV_192(job->enc_keys,
-                                   &ctx, job->dst,
-                                   job->src +
-                                   job->cipher_start_src_offset_in_bytes,
-                                   job->msg_len_to_cipher_in_bytes,
-                                   job->iv, job->iv_len_in_bytes,
-                                   job->u.GCM.aad,
-                                   job->u.GCM.aad_len_in_bytes,
-                                   job->auth_tag_output,
-                                   job->auth_tag_output_len_in_bytes);
-        } else { /* assume 32 bytes */
-                AES_GCM_ENC_IV_256(job->enc_keys,
-                                   &ctx, job->dst,
-                                   job->src +
-                                   job->cipher_start_src_offset_in_bytes,
-                                   job->msg_len_to_cipher_in_bytes,
-                                   job->iv, job->iv_len_in_bytes,
-                                   job->u.GCM.aad,
-                                   job->u.GCM.aad_len_in_bytes,
-                                   job->auth_tag_output,
-                                   job->auth_tag_output_len_in_bytes);
-        }
-
-        job->status = IMB_STATUS_COMPLETED;
-        return job;
+        if (16 == key_sz)
+                return AES_GCM_ENC_IV_128(state, job);
+        else if (24 == key_sz)
+                return AES_GCM_ENC_IV_192(state, job);
+        else
+                return AES_GCM_ENC_IV_256(state, job);
 }
+
 /* ========================================================================= */
 /* AES-CTR */
 /* ========================================================================= */
@@ -816,23 +749,9 @@ static IMB_JOB *submit_cipher_dec_aes_docsis_256(IMB_MGR *state, IMB_JOB *job)
 }
 
 /* AES-GCM */
-static IMB_JOB *submit_cipher_dec_aes_gcm_128(IMB_MGR *state, IMB_JOB *job)
-{
-        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM,
-                                     IMB_KEY_128_BYTES);
-}
-
-static IMB_JOB *submit_cipher_dec_aes_gcm_192(IMB_MGR *state, IMB_JOB *job)
-{
-        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM,
-                                     IMB_KEY_192_BYTES);
-}
-
-static IMB_JOB *submit_cipher_dec_aes_gcm_256(IMB_MGR *state, IMB_JOB *job)
-{
-        return SUBMIT_JOB_CIPHER_DEC(state, job, IMB_CIPHER_GCM,
-                                     IMB_KEY_256_BYTES);
-}
+#define submit_cipher_dec_aes_gcm_128 AES_GCM_DEC_IV_128
+#define submit_cipher_dec_aes_gcm_192 AES_GCM_DEC_IV_192
+#define submit_cipher_dec_aes_gcm_256 AES_GCM_DEC_IV_256
 
 /* CUSTOM */
 static IMB_JOB *submit_cipher_dec_custom(IMB_MGR *state, IMB_JOB *job)
@@ -1074,23 +993,9 @@ static IMB_JOB *submit_cipher_enc_aes_docsis_256(IMB_MGR *state, IMB_JOB *job)
 }
 
 /* AES-GCM */
-static IMB_JOB *submit_cipher_enc_aes_gcm_128(IMB_MGR *state, IMB_JOB *job)
-{
-        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM,
-                                     IMB_KEY_128_BYTES);
-}
-
-static IMB_JOB *submit_cipher_enc_aes_gcm_192(IMB_MGR *state, IMB_JOB *job)
-{
-        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM,
-                                     IMB_KEY_192_BYTES);
-}
-
-static IMB_JOB *submit_cipher_enc_aes_gcm_256(IMB_MGR *state, IMB_JOB *job)
-{
-        return SUBMIT_JOB_CIPHER_ENC(state, job, IMB_CIPHER_GCM,
-                                     IMB_KEY_256_BYTES);
-}
+#define submit_cipher_enc_aes_gcm_128 AES_GCM_ENC_IV_128
+#define submit_cipher_enc_aes_gcm_192 AES_GCM_ENC_IV_192
+#define submit_cipher_enc_aes_gcm_256 AES_GCM_ENC_IV_256
 
 /* CUSTOM */
 static IMB_JOB *submit_cipher_enc_custom(IMB_MGR *state, IMB_JOB *job)
diff --git a/lib/sse_t1/gcm_api_sse.inc b/lib/sse_t1/gcm_api_sse.inc
index 270ae14b..29fa0be5 100644
--- a/lib/sse_t1/gcm_api_sse.inc
+++ b/lib/sse_t1/gcm_api_sse.inc
@@ -30,6 +30,7 @@
 ;
 
 %include "sse_t1/gcm_sse.inc"
+%include "include/imb_job.inc"
 
 %ifndef GCM_API_SSE_INC
 %define GCM_API_SSE_INC
@@ -384,72 +385,94 @@ skip_aad_check_error_dec:
 ;
 ; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
 ;
-;void   aes_gcm_enc_var_iv_128_sse / aes_gcm_enc_var_iv_192_sse /
-;       aes_gcm_enc_var_iv_256_sse
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *out,
-;        const u8  *in,
-;        u64       msg_len,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len,
-;        u8        *auth_tag,
-;        const u64 auth_tag_len);
+;IMB_JOB *aes_gcm_enc_var_iv_128_sse / aes_gcm_enc_var_iv_192_sse /
+;       aes_gcm_enc_var_iv_256_sse(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc_var_iv,_),function,)
+MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
 FN_NAME(enc_var_iv,_):
-	FUNC_SAVE
-        cmp     arg7, 12
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _enc_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
         je      iv_len_12_enc_IV
 
-	GCM_INIT arg1, arg2, arg6, arg8, arg9, arg7
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 {[arg2 + _iv_len_in_bytes]}
+
         jmp     skip_iv_len_12_enc_IV
 
 iv_len_12_enc_IV:
-	GCM_INIT arg1, arg2, arg6, arg8, arg9
+	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}
 
 skip_iv_len_12_enc_IV:
-	GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC
-	GCM_COMPLETE arg1, arg2, arg10, arg11
-	FUNC_RESTORE
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
+        mov     arg2, [arg2 + _msg_len_to_cipher]
+	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, ENC
+
+        mov     arg2, [rsp + GP_OFFSET + 5*8]
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}
+
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
+        FUNC_RESTORE
 	ret
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;
 ; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
 ;
-;void   aes_gcm_dec_var_iv_128_sse / aes_gcm_dec_var_iv_192_sse /
-;       aes_gcm_dec_var_iv_256_sse
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *out,
-;        const u8  *in,
-;        u64       msg_len,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len,
-;        u8        *auth_tag,
-;        const u64 auth_tag_len);
+;IMB_JOB *aes_gcm_dec_var_iv_128_sse / aes_gcm_dec_var_iv_192_sse /
+;       aes_gcm_dec_var_iv_256_sse(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec_var_iv,_),function,)
+MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
 FN_NAME(dec_var_iv,_):
-	FUNC_SAVE
-        cmp     arg7, 12
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _dec_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
         je      iv_len_12_dec_IV
 
-	GCM_INIT arg1, arg2, arg6, arg8, arg9, arg7
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 {[arg2 + _iv_len_in_bytes]}
+
         jmp     skip_iv_len_12_dec_IV
 
 iv_len_12_dec_IV:
-	GCM_INIT arg1, arg2, arg6, arg8, arg9
+	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}
 
 skip_iv_len_12_dec_IV:
-	GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC
-	GCM_COMPLETE arg1, arg2, arg10, arg11
-	FUNC_RESTORE
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
+        mov     arg2, [arg2 + _msg_len_to_cipher]
+	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, DEC
+
+        mov     arg2, [rsp + GP_OFFSET + 5*8]
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}
+
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
+        FUNC_RESTORE
 	ret
 
 mksection stack-noexec
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index 27107606..2450ab11 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -183,15 +183,16 @@
 %define CONTEXT_OFFSET  VARIABLE_OFFSET
 
 ;; Full stack frame layout:
-;; + 16*6  -> ---------------------------
-;;            GCM CONTEXT (JOB API only)
-;; + 6*8   -> ---------------------------
-;;            GP STORAGE
-;; + 16*10 -> --------------------------
-;;            XMM STORAGE (windows only)
-;; + 16*7  -> --------------------------
-;;            LOCAL STORAGE
-;; RSP/R14 -> --------------------------
+;;                   RETURN ADDRESS + ARGS
+;; R14 =  + 16*6  -> ---------------------------
+;;                   GCM CONTEXT (JOB API only)
+;;        + 6*8   -> ---------------------------
+;;                   GP STORAGE
+;;        + 16*10 -> --------------------------
+;;                   XMM STORAGE (windows only)
+;;        + 16*7  -> --------------------------
+;;                   LOCAL STORAGE
+;; RSP =          -> --------------------------
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ; Utility Macros
-- 
GitLab


From afbae0668e41916f7004a2a0fafc65e92552628e Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Fri, 31 Mar 2023 17:27:24 +0100
Subject: [PATCH 231/332] test: [ZUC] test burst API

---
 test/kat-app/zuc_test.c | 376 +++++++++++++++++++++++++++++++---------
 1 file changed, 297 insertions(+), 79 deletions(-)

diff --git a/test/kat-app/zuc_test.c b/test/kat-app/zuc_test.c
index a77de47c..b815882a 100644
--- a/test/kat-app/zuc_test.c
+++ b/test/kat-app/zuc_test.c
@@ -50,9 +50,12 @@
 #define FAIL_STATUS -1
 #define DIM(_x) (sizeof(_x)/sizeof(_x[0]))
 
-enum test_type {
-        TEST_4_BUFFER,
-        TEST_N_BUFFER
+#define MAX_BURST_JOBS 32
+
+enum api_type {
+        TEST_DIRECT_API,
+        TEST_SINGLE_JOB_API,
+        TEST_BURST_JOB_API
 };
 
 int zuc_test(struct IMB_MGR *mb_mgr);
@@ -61,26 +64,26 @@ int validate_zuc_algorithm(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                            uint8_t *pDstData, uint8_t *pKeys, uint8_t *pIV);
 int validate_zuc_EEA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                              uint8_t *pDstData, uint8_t *pKeys, uint8_t *pIV,
-                             const unsigned int job_api);
+                             const enum api_type type);
 int validate_zuc_EEA_4_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                              uint8_t **pDstData, uint8_t **pKeys,
-                             uint8_t **pIV, const unsigned int job_api);
+                             uint8_t **pIV, enum api_type type);
 int validate_zuc_EEA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                              uint8_t **pDstData, uint8_t **pKeys, uint8_t **pIV,
-                             uint32_t numBuffs, const unsigned int job_api);
+                             uint32_t numBuffs, const enum api_type type);
 int validate_zuc_EIA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                              uint8_t *pDstData, uint8_t *pKeys, uint8_t *pIV,
-                             const unsigned int job_api);
+                             const enum api_type type);
 int validate_zuc_EIA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                              uint8_t **pDstData, uint8_t **pKeys,
                              uint8_t **pIV, uint32_t numBuffs,
-                             const unsigned int job_api);
+                             const enum api_type type);
 int validate_zuc256_EEA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                          uint8_t **pDstData, uint8_t **pKeys, uint8_t **pIV,
-                         uint32_t numBuffs);
+                         uint32_t numBuffs, const enum api_type type);
 int validate_zuc256_EIA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                          uint8_t **pDstData, uint8_t **pKeys, uint8_t **pIV,
-                         uint32_t numBuffs);
+                         uint32_t numBuffs, const enum api_type type);
 
 static void byte_hexdump(const char *message, const uint8_t *ptr, int len);
 
@@ -250,33 +253,34 @@ int zuc_test(struct IMB_MGR *mb_mgr)
 
         /* Direct API tests */
         if (validate_zuc_EEA_1_block(mb_mgr, pSrcData[0], pSrcData[0], pKeys[0],
-                                     pIV[0], 0))
+                                     pIV[0], TEST_DIRECT_API))
                 test_suite_update(&eea3_ctx, 0, 1);
         else
                 test_suite_update(&eea3_ctx, 1, 0);
 
-        if (validate_zuc_EEA_4_block(mb_mgr, pSrcData, pSrcData, pKeys, pIV, 0))
+        if (validate_zuc_EEA_4_block(mb_mgr, pSrcData, pSrcData, pKeys, pIV,
+                                     TEST_DIRECT_API))
                 test_suite_update(&eea3_ctx, 0, 1);
         else
                 test_suite_update(&eea3_ctx, 1, 0);
 
         for (i = 0; i < DIM(numBuffs); i++) {
                 if (validate_zuc_EEA_n_block(mb_mgr, pSrcData, pDstData, pKeys,
-                                             pIV, numBuffs[i], 0))
+                                             pIV, numBuffs[i], TEST_DIRECT_API))
                         test_suite_update(&eea3_ctx, 0, 1);
                 else
                         test_suite_update(&eea3_ctx, 1, 0);
         }
 
         if (validate_zuc_EIA_1_block(mb_mgr, pSrcData[0], pDstData[0], pKeys[0],
-                                     pIV[0], 0))
+                                     pIV[0], TEST_DIRECT_API))
                 test_suite_update(&eia3_ctx, 0, 1);
         else
                 test_suite_update(&eia3_ctx, 1, 0);
 
         for (i = 0; i < DIM(numBuffs); i++) {
                 if (validate_zuc_EIA_n_block(mb_mgr, pSrcData, pDstData, pKeys,
-                                             pIV, numBuffs[i], 0))
+                                             pIV, numBuffs[i], TEST_DIRECT_API))
                         test_suite_update(&eia3_ctx, 0, 1);
                 else
                         test_suite_update(&eia3_ctx, 1, 0);
@@ -284,51 +288,75 @@ int zuc_test(struct IMB_MGR *mb_mgr)
 
         /* Job API tests */
         if (validate_zuc_EEA_1_block(mb_mgr, pSrcData[0], pSrcData[0], pKeys[0],
-                                     pIV[0], 1))
+                                     pIV[0], TEST_SINGLE_JOB_API))
                 test_suite_update(&eea3_ctx, 0, 1);
         else
                 test_suite_update(&eea3_ctx, 1, 0);
 
-        if (validate_zuc_EEA_4_block(mb_mgr, pSrcData, pSrcData, pKeys, pIV, 1))
+        if (validate_zuc_EEA_4_block(mb_mgr, pSrcData, pSrcData, pKeys, pIV,
+                                     TEST_SINGLE_JOB_API))
                 test_suite_update(&eea3_ctx, 0, 1);
         else
                 test_suite_update(&eea3_ctx, 1, 0);
 
         for (i = 0; i < DIM(numBuffs); i++) {
                 if (validate_zuc_EEA_n_block(mb_mgr, pSrcData, pDstData, pKeys,
-                                             pIV, numBuffs[i], 1))
+                                             pIV, numBuffs[i], TEST_SINGLE_JOB_API))
                         test_suite_update(&eea3_ctx, 0, 1);
                 else
                         test_suite_update(&eea3_ctx, 1, 0);
         }
 
+        for (i = 0; i < DIM(numBuffs); i++) {
+                if (validate_zuc256_EEA3(mb_mgr, pSrcData, pDstData, pKeys,
+                                         pIV, numBuffs[i], TEST_SINGLE_JOB_API))
+                        test_suite_update(&eea3_256_ctx, 0, 1);
+                else
+                        test_suite_update(&eea3_256_ctx, 1, 0);
+        }
+
         if (validate_zuc_EIA_1_block(mb_mgr, pSrcData[0], pDstData[0], pKeys[0],
-                                     pIV[0], 1))
+                                     pIV[0], TEST_SINGLE_JOB_API))
                 test_suite_update(&eia3_ctx, 0, 1);
         else
                 test_suite_update(&eia3_ctx, 1, 0);
 
         for (i = 0; i < DIM(numBuffs); i++) {
                 if (validate_zuc_EIA_n_block(mb_mgr, pSrcData, pDstData, pKeys,
-                                             pIV, numBuffs[i], 1))
+                                             pIV, numBuffs[i], TEST_SINGLE_JOB_API))
                         test_suite_update(&eia3_ctx, 0, 1);
                 else
                         test_suite_update(&eia3_ctx, 1, 0);
         }
 
-        /* ZUC-EEA3-256 tests */
+        for (i = 0; i < DIM(numBuffs); i++) {
+                if (validate_zuc256_EIA3(mb_mgr, pSrcData, pDstData, pKeys,
+                                         pIV, numBuffs[i], TEST_SINGLE_JOB_API))
+                        test_suite_update(&eia3_256_ctx, 0, 1);
+                else
+                        test_suite_update(&eia3_256_ctx, 1, 0);
+        }
+
+        /* Burst job API tests */
+        for (i = 0; i < DIM(numBuffs); i++) {
+                if (validate_zuc_EEA_n_block(mb_mgr, pSrcData, pDstData, pKeys,
+                                             pIV, numBuffs[i], TEST_BURST_JOB_API))
+                        test_suite_update(&eea3_ctx, 0, 1);
+                else
+                        test_suite_update(&eea3_ctx, 1, 0);
+        }
+
         for (i = 0; i < DIM(numBuffs); i++) {
                 if (validate_zuc256_EEA3(mb_mgr, pSrcData, pDstData, pKeys,
-                                         pIV, numBuffs[i]))
+                                         pIV, numBuffs[i], TEST_BURST_JOB_API))
                         test_suite_update(&eea3_256_ctx, 0, 1);
                 else
                         test_suite_update(&eea3_256_ctx, 1, 0);
         }
 
-        /* ZUC-EIA3-256 tests */
         for (i = 0; i < DIM(numBuffs); i++) {
                 if (validate_zuc256_EIA3(mb_mgr, pSrcData, pDstData, pKeys,
-                                         pIV, numBuffs[i]))
+                                         pIV, numBuffs[i], TEST_BURST_JOB_API))
                         test_suite_update(&eia3_256_ctx, 0, 1);
                 else
                         test_suite_update(&eia3_256_ctx, 1, 0);
@@ -349,6 +377,78 @@ exit_zuc_test:
         return errors;
 }
 
+static inline int
+submit_burst_eea3_jobs(struct IMB_MGR *mb_mgr, uint8_t ** const keys,
+                       uint8_t ** const ivs, uint8_t ** const src,
+                       uint8_t ** const dst, const uint32_t *lens,
+                       int dir, const unsigned int num_jobs,
+                       const unsigned int key_len,
+                       const unsigned int *iv_lens)
+{
+        IMB_JOB *job, *jobs[MAX_BURST_JOBS] = {NULL};
+        unsigned int i;
+        unsigned int jobs_rx = 0;
+        uint32_t completed_jobs = 0;
+        int err;
+
+        while (IMB_GET_NEXT_BURST(mb_mgr, num_jobs, jobs) < num_jobs)
+                IMB_FLUSH_BURST(mb_mgr, num_jobs, jobs);
+
+        for (i = 0; i < num_jobs; i++) {
+                job = jobs[i];
+                job->cipher_direction = dir;
+                job->chain_order = IMB_ORDER_CIPHER_HASH;
+                job->cipher_mode = IMB_CIPHER_ZUC_EEA3;
+                job->src = src[i];
+                job->dst = dst[i];
+                job->iv = ivs[i];
+                job->iv_len_in_bytes = iv_lens[i];
+                job->enc_keys = keys[i];
+                job->key_len_in_bytes = key_len;
+
+                job->cipher_start_src_offset_in_bytes = 0;
+                job->msg_len_to_cipher_in_bytes = lens[i];
+                job->hash_alg = IMB_AUTH_NULL;
+
+                imb_set_session(mb_mgr, job);
+        }
+
+        completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
+        err = imb_get_errno(mb_mgr);
+
+        if (err != 0) {
+                printf("submit_burst error %d : '%s'\n", err,
+                       imb_get_strerror(err));
+                return -1;
+        }
+
+check_eea3_burst_jobs:
+        for (i = 0; i < completed_jobs; i++) {
+                job = jobs[i];
+
+                if (job->status != IMB_STATUS_COMPLETED) {
+                        printf("job %u status not complete!\n", i+1);
+                        return -1;
+                }
+
+                jobs_rx++;
+        }
+
+        if (jobs_rx != num_jobs) {
+                completed_jobs = IMB_FLUSH_BURST(mb_mgr,
+                                                 num_jobs - completed_jobs,
+                                                 jobs);
+                if (completed_jobs == 0) {
+                        printf("Expected %u jobs, received %u\n",
+                               num_jobs, jobs_rx);
+                        return -1;
+                }
+                goto check_eea3_burst_jobs;
+        }
+
+        return 0;
+}
+
 static inline int
 submit_eea3_jobs(struct IMB_MGR *mb_mgr, uint8_t ** const keys,
                  uint8_t ** const ivs, uint8_t ** const src,
@@ -405,6 +505,85 @@ submit_eea3_jobs(struct IMB_MGR *mb_mgr, uint8_t ** const keys,
         return 0;
 }
 
+static inline int
+submit_burst_eia3_jobs(struct IMB_MGR *mb_mgr, uint8_t ** const keys,
+                       uint8_t ** const iv, uint8_t ** const src,
+                       uint8_t ** const tags, const uint32_t *lens,
+                       const unsigned int num_jobs,
+                       const unsigned int key_sz,
+                       const unsigned int tag_sz,
+                       const unsigned int *iv_lens)
+{
+        IMB_JOB *job, *jobs[MAX_BURST_JOBS] = {NULL};
+        unsigned int i;
+        unsigned int jobs_rx = 0;
+        uint32_t completed_jobs = 0;
+        int err;
+
+        while (IMB_GET_NEXT_BURST(mb_mgr, num_jobs, jobs) < num_jobs)
+                IMB_FLUSH_BURST(mb_mgr, num_jobs, jobs);
+
+        for (i = 0; i < num_jobs; i++) {
+                job = jobs[i];
+                job->chain_order = IMB_ORDER_CIPHER_HASH;
+                job->cipher_mode = IMB_CIPHER_NULL;
+                job->src = src[i];
+                if (iv_lens[i] == IMB_ZUC256_IV_LEN_IN_BYTES_MIN) {
+                        job->u.ZUC_EIA3._iv = NULL;
+                        job->u.ZUC_EIA3._iv23 = iv[i];
+                } else {
+                        job->u.ZUC_EIA3._iv = iv[i];
+                        job->u.ZUC_EIA3._iv23 = NULL;
+                }
+                job->u.ZUC_EIA3._key = keys[i];
+
+                job->hash_start_src_offset_in_bytes = 0;
+                job->msg_len_to_hash_in_bits = lens[i];
+                if (key_sz == IMB_ZUC_KEY_LEN_IN_BYTES)
+                        job->hash_alg = IMB_AUTH_ZUC_EIA3_BITLEN;
+                else
+                        job->hash_alg = IMB_AUTH_ZUC256_EIA3_BITLEN;
+                job->auth_tag_output = tags[i];
+                job->auth_tag_output_len_in_bytes = tag_sz;
+
+                imb_set_session(mb_mgr, job);
+        }
+
+        completed_jobs = IMB_SUBMIT_BURST(mb_mgr, num_jobs, jobs);
+        err = imb_get_errno(mb_mgr);
+
+        if (err != 0) {
+                printf("submit_burst error %d : '%s'\n", err,
+                       imb_get_strerror(err));
+                return -1;
+        }
+
+check_eia3_burst_jobs:
+        for (i = 0; i < completed_jobs; i++) {
+                job = jobs[i];
+
+                if (job->status != IMB_STATUS_COMPLETED) {
+                        printf("job %u status not complete!\n", i+1);
+                        return -1;
+                }
+
+                jobs_rx++;
+        }
+
+        if (jobs_rx != num_jobs) {
+                completed_jobs = IMB_FLUSH_BURST(mb_mgr,
+                                                 num_jobs - completed_jobs,
+                                                 jobs);
+                if (completed_jobs == 0) {
+                        printf("Expected %u jobs, received %u\n",
+                               num_jobs, jobs_rx);
+                        return -1;
+                }
+                goto check_eia3_burst_jobs;
+        }
+        return 0;
+}
+
 static inline int
 submit_eia3_jobs(struct IMB_MGR *mb_mgr, uint8_t ** const keys,
                  uint8_t ** const iv, uint8_t ** const src,
@@ -525,7 +704,7 @@ test_output(const uint8_t *out, const uint8_t *ref, const uint32_t bytelen,
 int
 validate_zuc_EEA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                          uint8_t *pDstData, uint8_t *pKeys, uint8_t *pIV,
-                         const unsigned int job_api)
+                         const enum api_type type)
 {
         uint32_t i;
         int ret = 0;
@@ -544,7 +723,7 @@ validate_zuc_EEA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                                 pIV);
                 byteLength = (testEEA3_vectors[i].length_in_bits + 7) / 8;
                 memcpy(pSrcData, testEEA3_vectors[i].plaintext, byteLength);
-                if (job_api)
+                if (type == TEST_SINGLE_JOB_API)
                         submit_eea3_jobs(mb_mgr, &pKeys, &pIV, &pSrcData,
                                          &pDstData, &byteLength,
                                          IMB_DIR_ENCRYPT, 1,
@@ -569,8 +748,8 @@ validate_zuc_EEA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
 static int
 submit_and_verify(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                   uint8_t **pDstData, uint8_t **pKeys, uint8_t **pIV,
-                  const unsigned int job_api, IMB_CIPHER_DIRECTION dir,
-                  enum test_type type, const unsigned int var_bufs,
+                  const enum api_type type, IMB_CIPHER_DIRECTION dir,
+                  const unsigned int var_bufs,
                   const unsigned int num_buffers, const uint32_t *buf_idx)
 {
         unsigned int i;
@@ -592,18 +771,22 @@ submit_and_verify(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                         memcpy(pSrcData[i], vector->ciphertext, packetLen[i]);
         }
 
-        if (job_api)
+        if (type == TEST_SINGLE_JOB_API)
                 submit_eea3_jobs(mb_mgr, pKeys, pIV, pSrcData,
                                  pDstData, packetLen, dir, num_buffers,
                                  IMB_ZUC_KEY_LEN_IN_BYTES, iv_lens);
+        else if (type == TEST_BURST_JOB_API)
+                submit_burst_eea3_jobs(mb_mgr, pKeys, pIV, pSrcData,
+                                 pDstData, packetLen, dir, num_buffers,
+                                 IMB_ZUC_KEY_LEN_IN_BYTES, iv_lens);
         else {
-                if (type == TEST_4_BUFFER)
+                if (num_buffers == 4)
                         IMB_ZUC_EEA3_4_BUFFER(mb_mgr,
                                               (const void * const *)pKeys,
                                               (const void * const *)pIV,
                                               (const void * const *)pSrcData,
                                               (void **)pDstData, packetLen);
-                else /* TEST_N_BUFFER */
+                else
                         IMB_ZUC_EEA3_N_BUFFER(mb_mgr,
                                               (const void * const *)pKeys,
                                               (const void * const *)pIV,
@@ -622,11 +805,11 @@ submit_and_verify(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                 if (var_bufs)
                         snprintf(msg_start, sizeof(msg_start),
                                  "Validate ZUC %c block multi-vector",
-                                 type == TEST_4_BUFFER ? '4' : 'N');
+                                 num_buffers == 4 ? '4' : 'N');
                 else
                         snprintf(msg_start, sizeof(msg_start),
                                  "Validate ZUC %c block",
-                                 type == TEST_4_BUFFER ? '4' : 'N');
+                                 num_buffers == 4 ? '4' : 'N');
 
                 if (dir == IMB_DIR_ENCRYPT) {
                         snprintf(msg, sizeof(msg),
@@ -653,7 +836,7 @@ submit_and_verify(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
 static int
 submit_and_verify_zuc256(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                          uint8_t **pDstData, uint8_t **pKeys, uint8_t **pIV,
-                         IMB_CIPHER_DIRECTION dir,
+                         const enum api_type type, IMB_CIPHER_DIRECTION dir,
                          const unsigned int var_bufs,
                          const unsigned int num_buffers,
                          const uint32_t *buf_idx)
@@ -676,9 +859,14 @@ submit_and_verify_zuc256(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                 iv_lens[i] = vector->iv_length;
         }
 
-        submit_eea3_jobs(mb_mgr, pKeys, pIV, pSrcData,
-                         pDstData, packetLen, dir, num_buffers,
-                         IMB_ZUC256_KEY_LEN_IN_BYTES, iv_lens);
+        if (type == TEST_SINGLE_JOB_API)
+                submit_eea3_jobs(mb_mgr, pKeys, pIV, pSrcData,
+                                 pDstData, packetLen, dir, num_buffers,
+                                 IMB_ZUC256_KEY_LEN_IN_BYTES, iv_lens);
+        else if (type == TEST_BURST_JOB_API)
+                submit_burst_eea3_jobs(mb_mgr, pKeys, pIV, pSrcData,
+                                 pDstData, packetLen, dir, num_buffers,
+                                 IMB_ZUC256_KEY_LEN_IN_BYTES, iv_lens);
 
         for (i = 0; i < num_buffers; i++) {
                 uint8_t *pDst8 = (uint8_t *)pDstData[i];
@@ -718,7 +906,7 @@ submit_and_verify_zuc256(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
 
 int validate_zuc_EEA_4_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                              uint8_t **pDstData, uint8_t **pKeys, uint8_t **pIV,
-                             const unsigned int job_api)
+                             const enum api_type type)
 {
         uint32_t i, j;
         int ret = 0;
@@ -730,13 +918,13 @@ int validate_zuc_EEA_4_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                         buf_idx[j] = i;
 
                 retTmp = submit_and_verify(mb_mgr, pSrcData, pDstData, pKeys,
-                                           pIV, job_api, IMB_DIR_ENCRYPT,
-                                           TEST_4_BUFFER, 0, 4, buf_idx);
+                                           pIV, type, IMB_DIR_ENCRYPT,
+                                           0, 4, buf_idx);
                 if (retTmp < 0)
                         ret = retTmp;
                 retTmp = submit_and_verify(mb_mgr, pSrcData, pDstData, pKeys,
-                                           pIV, job_api, IMB_DIR_DECRYPT,
-                                           TEST_4_BUFFER, 0, 4, buf_idx);
+                                           pIV, type, IMB_DIR_DECRYPT,
+                                           0, 4, buf_idx);
                 if (retTmp < 0)
                         ret = retTmp;
         }
@@ -748,13 +936,13 @@ int validate_zuc_EEA_4_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                         buf_idx[j] = i+j;
 
                 retTmp = submit_and_verify(mb_mgr, pSrcData, pDstData, pKeys,
-                                           pIV, job_api, IMB_DIR_ENCRYPT,
-                                           TEST_4_BUFFER, 1, 4, buf_idx);
+                                           pIV, type, IMB_DIR_ENCRYPT,
+                                           1, 4, buf_idx);
                 if (retTmp < 0)
                         ret = retTmp;
                 retTmp = submit_and_verify(mb_mgr, pSrcData, pDstData, pKeys,
-                                           pIV, job_api, IMB_DIR_DECRYPT,
-                                           TEST_4_BUFFER, 1, 4, buf_idx);
+                                           pIV, type, IMB_DIR_DECRYPT,
+                                           1, 4, buf_idx);
                 if (retTmp < 0)
                         ret = retTmp;
         }
@@ -764,7 +952,7 @@ int validate_zuc_EEA_4_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
 
 int validate_zuc_EEA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                              uint8_t **pDstData, uint8_t **pKeys, uint8_t **pIV,
-                             uint32_t numBuffs, const unsigned int job_api)
+                             uint32_t numBuffs, const enum api_type type)
 {
         uint32_t i, j;
         int ret = 0;
@@ -777,15 +965,15 @@ int validate_zuc_EEA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                         buf_idx[j] = i;
 
                 retTmp = submit_and_verify(mb_mgr, pSrcData, pDstData, pKeys,
-                                           pIV, job_api,
-                                           IMB_DIR_ENCRYPT, TEST_N_BUFFER,
+                                           pIV, type,
+                                           IMB_DIR_ENCRYPT,
                                            0, numBuffs, buf_idx);
                 if (retTmp < 0)
                         ret = retTmp;
 
                 retTmp = submit_and_verify(mb_mgr, pSrcData, pDstData, pKeys,
-                                           pIV, job_api, IMB_DIR_DECRYPT,
-                                           TEST_N_BUFFER, 0, numBuffs, buf_idx);
+                                           pIV, type, IMB_DIR_DECRYPT,
+                                           0, numBuffs, buf_idx);
                 if (retTmp < 0)
                         ret = retTmp;
         }
@@ -795,13 +983,13 @@ int validate_zuc_EEA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                 buf_idx[i] = i % NUM_ZUC_EEA3_TESTS;
 
         retTmp = submit_and_verify(mb_mgr, pSrcData, pDstData, pKeys,
-                                   pIV, job_api, IMB_DIR_ENCRYPT, TEST_N_BUFFER,
+                                   pIV, type, IMB_DIR_ENCRYPT,
                                    1, numBuffs, buf_idx);
         if (retTmp < 0)
                 ret = retTmp;
 
         retTmp = submit_and_verify(mb_mgr, pSrcData, pDstData, pKeys,
-                                   pIV, job_api, IMB_DIR_DECRYPT, TEST_N_BUFFER,
+                                   pIV, type, IMB_DIR_DECRYPT,
                                    1, numBuffs, buf_idx);
         if (retTmp < 0)
                 ret = retTmp;
@@ -811,7 +999,7 @@ int validate_zuc_EEA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
 
 int validate_zuc256_EEA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                          uint8_t **pDstData, uint8_t **pKeys, uint8_t **pIV,
-                         uint32_t numBuffs)
+                         uint32_t numBuffs, const enum api_type type)
 {
         uint32_t i, j;
         int ret = 0;
@@ -824,13 +1012,13 @@ int validate_zuc256_EEA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                         buf_idx[j] = i;
 
                 retTmp = submit_and_verify_zuc256(mb_mgr, pSrcData, pDstData,
-                                                  pKeys, pIV, IMB_DIR_ENCRYPT,
+                                                  pKeys, pIV, type, IMB_DIR_ENCRYPT,
                                                   0, numBuffs, buf_idx);
                 if (retTmp < 0)
                         ret = retTmp;
 
                 retTmp = submit_and_verify_zuc256(mb_mgr, pSrcData, pDstData,
-                                                  pKeys, pIV, IMB_DIR_DECRYPT,
+                                                  pKeys, pIV, type, IMB_DIR_DECRYPT,
                                                   0, numBuffs, buf_idx);
                 if (retTmp < 0)
                         ret = retTmp;
@@ -841,13 +1029,13 @@ int validate_zuc256_EEA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                 buf_idx[i] = i % NUM_ZUC_256_EEA3_TESTS;
 
         retTmp = submit_and_verify_zuc256(mb_mgr, pSrcData, pDstData, pKeys,
-                                          pIV, IMB_DIR_ENCRYPT,
+                                          pIV, type, IMB_DIR_ENCRYPT,
                                           1, numBuffs, buf_idx);
         if (retTmp < 0)
                 ret = retTmp;
 
         retTmp = submit_and_verify_zuc256(mb_mgr, pSrcData, pDstData, pKeys,
-                                          pIV, IMB_DIR_DECRYPT,
+                                          pIV, type, IMB_DIR_DECRYPT,
                                           1, numBuffs, buf_idx);
         if (retTmp < 0)
                 ret = retTmp;
@@ -857,7 +1045,7 @@ int validate_zuc256_EEA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
 
 int validate_zuc_EIA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                              uint8_t *pDstData, uint8_t *pKeys, uint8_t *pIV,
-                             const unsigned int job_api)
+                             const enum api_type type)
 {
         uint32_t i;
         int ret = 0;
@@ -877,12 +1065,12 @@ int validate_zuc_EIA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
                 const uint32_t byteLength = (bitLength + 7) / 8;
 
                 memcpy(pSrcData, testEIA3_vectors[i].message, byteLength);
-                if (job_api)
+                if (type == TEST_SINGLE_JOB_API)
                         submit_eia3_jobs(mb_mgr, &pKeys, &pIV,
                                          &pSrcData, &pDstData,
                                          &bitLength, 1, IMB_ZUC_KEY_LEN_IN_BYTES,
                                          IMB_ZUC_DIGEST_LEN_IN_BYTES, &iv_len);
-                else
+                else /* TEST_DIRECT_API */
                         IMB_ZUC_EIA3_1_BUFFER(mb_mgr, pKeys, pIV, pSrcData,
                                               bitLength, (uint32_t *)pDstData);
                 const int retTmp =
@@ -912,7 +1100,7 @@ int validate_zuc_EIA_1_block(struct IMB_MGR *mb_mgr, uint8_t *pSrcData,
 
 int validate_zuc_EIA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                              uint8_t **pDstData, uint8_t **pKeys, uint8_t **pIV,
-                             uint32_t numBuffs, const unsigned int job_api)
+                             uint32_t numBuffs, const enum api_type type)
 {
         uint32_t i, j;
         int retTmp, ret = 0;
@@ -933,13 +1121,21 @@ int validate_zuc_EIA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                         memcpy(pSrcData[j], vector.message, byteLength);
                         iv_lens[j] = IMB_ZUC_IV_LEN_IN_BYTES;
                 }
-                if (job_api)
+                if (type == TEST_SINGLE_JOB_API)
                         submit_eia3_jobs(mb_mgr, pKeys, pIV,
                                          pSrcData, pDstData,
                                          bitLength, numBuffs,
-                                         IMB_ZUC_KEY_LEN_IN_BYTES, IMB_ZUC_DIGEST_LEN_IN_BYTES,
+                                         IMB_ZUC_KEY_LEN_IN_BYTES,
+                                         IMB_ZUC_DIGEST_LEN_IN_BYTES,
                                          iv_lens);
-                else
+                else if (type == TEST_BURST_JOB_API)
+                        submit_burst_eia3_jobs(mb_mgr, pKeys, pIV,
+                                               pSrcData, pDstData,
+                                               bitLength, numBuffs,
+                                               IMB_ZUC_KEY_LEN_IN_BYTES,
+                                               IMB_ZUC_DIGEST_LEN_IN_BYTES,
+                                               iv_lens);
+                else /* TEST_BURST_JOB_API */
                         IMB_ZUC_EIA3_N_BUFFER(mb_mgr,
                                               (const void * const *)pKeys,
                                               (const void * const *)pIV,
@@ -987,13 +1183,21 @@ int validate_zuc_EIA_n_block(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                 iv_lens[j] = IMB_ZUC_IV_LEN_IN_BYTES;
         }
 
-        if (job_api)
+        if (type == TEST_SINGLE_JOB_API)
                 submit_eia3_jobs(mb_mgr, pKeys, pIV,
                                  pSrcData, pDstData,
                                  bitLength, numBuffs,
-                                 IMB_ZUC_KEY_LEN_IN_BYTES, IMB_ZUC_DIGEST_LEN_IN_BYTES,
+                                 IMB_ZUC_KEY_LEN_IN_BYTES,
+                                 IMB_ZUC_DIGEST_LEN_IN_BYTES,
                                  iv_lens);
-        else
+        else if (type == TEST_BURST_JOB_API)
+                submit_burst_eia3_jobs(mb_mgr, pKeys, pIV,
+                                       pSrcData, pDstData,
+                                       bitLength, numBuffs,
+                                       IMB_ZUC_KEY_LEN_IN_BYTES,
+                                       IMB_ZUC_DIGEST_LEN_IN_BYTES,
+                                       iv_lens);
+        else /* TEST_BURST_JOB_API */
                 IMB_ZUC_EIA3_N_BUFFER(mb_mgr,
                                       (const void * const *)pKeys,
                                       (const void * const *)pIV,
@@ -1085,7 +1289,7 @@ verify_tag_256(void *mac, const struct test256EIA3_vectors_t *vector,
 
 int validate_zuc256_EIA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                          uint8_t **pDstData, uint8_t **pKeys, uint8_t **pIV,
-                         uint32_t numBuffs)
+                         uint32_t numBuffs, const enum api_type type)
 {
         uint32_t i, j;
         int retTmp, ret = 0;
@@ -1106,11 +1310,18 @@ int validate_zuc256_EIA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
                         iv_lens[j] = vector->iv_length;
                 }
                 for (tag_sz = 4; tag_sz <= 16; tag_sz *= 2) {
-                        submit_eia3_jobs(mb_mgr, pKeys, pIV,
-                                         pSrcData, pDstData,
-                                         bitLength, numBuffs,
-                                         IMB_ZUC256_KEY_LEN_IN_BYTES, tag_sz,
-                                         iv_lens);
+                        if (type == TEST_SINGLE_JOB_API)
+                                submit_eia3_jobs(mb_mgr, pKeys, pIV,
+                                                 pSrcData, pDstData,
+                                                 bitLength, numBuffs,
+                                                 IMB_ZUC256_KEY_LEN_IN_BYTES,
+                                                 tag_sz, iv_lens);
+                        else /* TEST_BURST_JOB_API */
+                                submit_burst_eia3_jobs(mb_mgr, pKeys, pIV,
+                                                       pSrcData, pDstData,
+                                                       bitLength, numBuffs,
+                                                       IMB_ZUC256_KEY_LEN_IN_BYTES,
+                                                       tag_sz, iv_lens);
 
                         for (j = 0; j < numBuffs; j++) {
                                 retTmp = verify_tag_256(pDstData[j], vector,
@@ -1135,11 +1346,18 @@ int validate_zuc256_EIA3(struct IMB_MGR *mb_mgr, uint8_t **pSrcData,
         }
 
         for (tag_sz = 4; tag_sz <= 16; tag_sz *= 2) {
-                submit_eia3_jobs(mb_mgr, pKeys, pIV,
-                                 pSrcData, pDstData,
-                                 bitLength, numBuffs,
-                                 IMB_ZUC256_KEY_LEN_IN_BYTES, tag_sz,
-                                 iv_lens);
+                if (type == TEST_SINGLE_JOB_API)
+                        submit_eia3_jobs(mb_mgr, pKeys, pIV,
+                                        pSrcData, pDstData,
+                                        bitLength, numBuffs,
+                                        IMB_ZUC256_KEY_LEN_IN_BYTES,
+                                        tag_sz, iv_lens);
+                else /* TEST_BURST_JOB_API */
+                        submit_burst_eia3_jobs(mb_mgr, pKeys, pIV,
+                                               pSrcData, pDstData,
+                                               bitLength, numBuffs,
+                                               IMB_ZUC256_KEY_LEN_IN_BYTES,
+                                               tag_sz, iv_lens);
 
                 for (i = 0; i < numBuffs; i++) {
                         const uint32_t vector_idx = i % NUM_ZUC_256_EIA3_TESTS;
-- 
GitLab


From f9c2c77ca4cfeb0a5b836a1b8cd6b0c62195c001 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Wed, 19 Apr 2023 14:56:29 +0100
Subject: [PATCH 232/332] test: [HMAC-SHA224-512] Skipping First Vector Fix

---
 test/kat-app/hmac_sha256_sha512_test.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/test/kat-app/hmac_sha256_sha512_test.c b/test/kat-app/hmac_sha256_sha512_test.c
index 52c04cb0..5b41fd5a 100644
--- a/test/kat-app/hmac_sha256_sha512_test.c
+++ b/test/kat-app/hmac_sha256_sha512_test.c
@@ -598,8 +598,7 @@ test_hmac_shax_std_vectors(struct IMB_MGR *mb_mgr,
         }
 	printf("HMAC-SHA%d standard test vectors (N jobs = %u):\n",
                sha_type, num_jobs);
-	while (v->msg != NULL) {
-                v++;
+	for (; v->msg != NULL; v++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
                         printf("RFC4231 Test Case %lu key_len:%lu "
-- 
GitLab


From 6f7decf9999371a8edf7413201cbc9227ac87007 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Thu, 20 Apr 2023 11:39:06 +0100
Subject: [PATCH 233/332] test: [HMAC-MD5] Unify Test Vectors

---
 test/kat-app/CMakeLists.txt  |   1 +
 test/kat-app/Makefile        |   4 +-
 test/kat-app/hmac_md5.json.c | 137 ++++++++++++++
 test/kat-app/hmac_md5_test.c | 351 ++++-------------------------------
 test/kat-app/win_x64.mak     |   2 +-
 5 files changed, 178 insertions(+), 317 deletions(-)
 create mode 100644 test/kat-app/hmac_md5.json.c

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 877287e2..2464ef55 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -79,6 +79,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha256.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha384.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha512.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_md5.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
 )
 
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index beef141b..d1d51b27 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -37,8 +37,8 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	ecb_test.c zuc_test.c kasumi_test.c snow3g_test.c direct_api_test.c clear_mem_test.c \
 	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
-	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c \
-	hmac_sha512.json.c
+	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c hmac_sha512.json.c \
+	hmac_md5.json.c
 OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
 # targets come here
diff --git a/test/kat-app/hmac_md5.json.c b/test/kat-app/hmac_md5.json.c
new file mode 100644
index 00000000..a61daa57
--- /dev/null
+++ b/test/kat-app/hmac_md5.json.c
@@ -0,0 +1,137 @@
+/*******************************************************************************
+  Copyright (c) 2023, Intel Corporation
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions are met:
+
+      * Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+      * Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+      * Neither the name of Intel Corporation nor the names of its contributors
+        may be used to endorse or promote products derived from this software
+        without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+/* HMACMD5, RFC2202 */
+#include "mac_test.h"
+
+const struct mac_test hmac_md5_test_json[] = {
+    /* Vectors from https://tools.ietf.org/html/rfc2202 */
+    {16, 16, 1,
+     "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b",
+     "\x48\x69\x20\x54\x68\x65\x72\x65",
+     "\x92\x94\x72\x7a\x36\x38\xbb\x1c\x13\xf4\x8e\xf8\x15\x8b\xfc\x9d", 1, 64,
+     NULL, 0},
+    {4, 16, 2, "\x4a\x65\x66\x65",
+     "\x77\x68\x61\x74\x20\x64\x6F\x20\x79\x61\x20\x77\x61\x6E\x74\x20\x66\x6F"
+     "\x72\x20\x6E\x6F\x74\x68\x69\x6E\x67\x3F",
+     "\x75\x0c\x78\x3e\x6a\xb0\xb5\x03\xea\xa8\x6e\x31\x0a\x5d\xb7\x38", 1, 224,
+     NULL, 0},
+    {16, 16, 3,
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+     "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+     "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+     "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
+     "\x56\xbe\x34\x52\x1d\x14\x4c\x88\xdb\xb8\xc7\x33\xf0\xe8\xb3\xf6", 1, 400,
+     NULL, 0},
+    {25, 16, 4,
+     "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11\x12"
+     "\x13\x14\x15\x16\x17\x18\x19",
+     "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+     "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+     "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
+     "\x69\x7e\xaf\x0a\xca\x3a\x3a\xea\x3a\x75\x16\x47\x46\xff\xaa\x79", 1, 400,
+     NULL, 0},
+    {16, 16, 5,
+     "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c",
+     "\x54\x65\x73\x74\x20\x57\x69\x74\x68\x20\x54\x72\x75\x6e\x63\x61\x74\x69"
+     "\x6f\x6e",
+     "\x56\x46\x1e\xf2\x34\x2e\xdc\x00\xf9\xba\xb9\x95\x69\x0e\xfd\x4c", 1, 160,
+     NULL, 0},
+    {80, 16, 6,
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+     "\x54\x65\x73\x74\x20\x55\x73\x69\x6E\x67\x20\x4C\x61\x72\x67\x65\x72\x20"
+     "\x54\x68\x61\x6E\x20\x42\x6C\x6F\x63\x6B\x2D\x53\x69\x7A\x65\x20\x4B\x65"
+     "\x79\x20\x2D\x20\x48\x61\x73\x68\x20\x4B\x65\x79\x20\x46\x69\x72\x73\x74",
+     "\x6b\x1a\xb7\xfe\x4b\xd7\xbf\x8f\x0b\x62\xe6\xce\x61\xb9\xd0\xcd", 1, 432,
+     NULL, 0},
+    {80, 16, 7,
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+     "\x54\x65\x73\x74\x20\x55\x73\x69\x6E\x67\x20\x4C\x61\x72\x67\x65\x72\x20"
+     "\x54\x68\x61\x6E\x20\x42\x6C\x6F\x63\x6B\x2D\x53\x69\x7A\x65\x20\x4B\x65"
+     "\x79\x20\x61\x6E\x64\x20\x4C\x61\x72\x67\x65\x72\x20\x54\x68\x61\x6E\x20"
+     "\x4F\x6E\x65\x20\x42\x6C\x6F\x63\x6B\x2D\x53\x69\x7A\x65\x20\x44\x61\x74"
+     "\x61",
+     "\x6f\x63\x0f\xad\x67\xcd\xa0\xee\x1f\xb1\xf5\x62\xdb\x3a\xa5\x3e", 1, 584,
+     NULL, 0},
+    {16, 12, 8,
+     "\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b\x0b",
+     "\x48\x69\x20\x54\x68\x65\x72\x65",
+     "\x92\x94\x72\x7a\x36\x38\xbb\x1c\x13\xf4\x8e\xf8", 1, 64, NULL, 0},
+    {4, 12, 9, "\x4a\x65\x66\x65",
+     "\x77\x68\x61\x74\x20\x64\x6F\x20\x79\x61\x20\x77\x61\x6E\x74\x20\x66\x6F"
+     "\x72\x20\x6E\x6F\x74\x68\x69\x6E\x67\x3F",
+     "\x75\x0c\x78\x3e\x6a\xb0\xb5\x03\xea\xa8\x6e\x31", 1, 224, NULL, 0},
+    {16, 12, 10,
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+     "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+     "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd"
+     "\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd\xdd",
+     "\x56\xbe\x34\x52\x1d\x14\x4c\x88\xdb\xb8\xc7\x33", 1, 400, NULL, 0},
+    {25, 12, 11,
+     "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11\x12"
+     "\x13\x14\x15\x16\x17\x18\x19",
+     "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+     "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd"
+     "\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd\xcd",
+     "\x69\x7e\xaf\x0a\xca\x3a\x3a\xea\x3a\x75\x16\x47", 1, 400, NULL, 0},
+    {16, 12, 12,
+     "\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c\x0c",
+     "\x54\x65\x73\x74\x20\x57\x69\x74\x68\x20\x54\x72\x75\x6e\x63\x61\x74\x69"
+     "\x6f\x6e",
+     "\x56\x46\x1e\xf2\x34\x2e\xdc\x00\xf9\xba\xb9\x95", 1, 160, NULL, 0},
+    {80, 12, 13,
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+     "\x54\x65\x73\x74\x20\x55\x73\x69\x6E\x67\x20\x4C\x61\x72\x67\x65\x72\x20"
+     "\x54\x68\x61\x6E\x20\x42\x6C\x6F\x63\x6B\x2D\x53\x69\x7A\x65\x20\x4B\x65"
+     "\x79\x20\x2D\x20\x48\x61\x73\x68\x20\x4B\x65\x79\x20\x46\x69\x72\x73\x74",
+     "\x6b\x1a\xb7\xfe\x4b\xd7\xbf\x8f\x0b\x62\xe6\xce", 1, 432, NULL, 0},
+    {80, 12, 14,
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa"
+     "\xaa\xaa\xaa\xaa\xaa\xaa\xaa\xaa",
+     "\x54\x65\x73\x74\x20\x55\x73\x69\x6E\x67\x20\x4C\x61\x72\x67\x65\x72\x20"
+     "\x54\x68\x61\x6E\x20\x42\x6C\x6F\x63\x6B\x2D\x53\x69\x7A\x65\x20\x4B\x65"
+     "\x79\x20\x61\x6E\x64\x20\x4C\x61\x72\x67\x65\x72\x20\x54\x68\x61\x6E\x20"
+     "\x4F\x6E\x65\x20\x42\x6C\x6F\x63\x6B\x2D\x53\x69\x7A\x65\x20\x44\x61\x74"
+     "\x61",
+     "\x6f\x63\x0f\xad\x67\xcd\xa0\xee\x1f\xb1\xf5\x62", 1, 584, NULL, 0},
+    {0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0}
+};
diff --git a/test/kat-app/hmac_md5_test.c b/test/kat-app/hmac_md5_test.c
index 6cb86e84..a531918c 100644
--- a/test/kat-app/hmac_md5_test.c
+++ b/test/kat-app/hmac_md5_test.c
@@ -33,297 +33,14 @@
 #include <intel-ipsec-mb.h>
 #include "gcm_ctr_vectors_test.h"
 #include "utils.h"
+#include "mac_test.h"
 
 int hmac_md5_test(struct IMB_MGR *mb_mgr);
 
-#define digest96_size 12
-
-/*
- * Test vectors from https://tools.ietf.org/html/rfc2202
- */
-
-/*
- * 2.  Test Case 1
- *
- *    Key =          0x0b0b0b0b0b0b0b0b0b0b0b0b0b0b0b0b
- *
- *    Key length =   16
- *
- *    Data =         "Hi There"
- *
- *    Data length =  8
- *
- *    Digest =       0x9294727a3638bb1c13f48ef8158bfc9d
- *
- *    Digest96 =     0x9294727a3638bb1c13f48ef8
- */
-#define test_case1      "1"
-#define test_case_l1    "1_long"
-#define key_len1        16
-#define data_len1       8
-#define digest_len1     digest96_size
-#define digest_len_l1   IMB_MD5_DIGEST_SIZE_IN_BYTES
-static const uint8_t key1[key_len1] = {
-        0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b,
-        0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0b
-};
-static const char data1[] = "Hi There";
-static const uint8_t digest1[digest_len_l1] = {
-        0x92, 0x94, 0x72, 0x7a, 0x36, 0x38, 0xbb, 0x1c,
-        0x13, 0xf4, 0x8e, 0xf8, 0x15, 0x8b, 0xfc, 0x9d
-};
-
-/*
- * 2.  Test Case 2
- *
- *    Key =          "Jefe"
- *
- *    Key length =   4
- *
- *    Data =         "what do ya want for nothing?"
- *
- *    Data length =  28
- *
- *    Digest =       0x750c783e6ab0b503eaa86e310a5db738
- *
- *    Digest96 =     0x750c783e6ab0b503eaa86e31
- */
-#define test_case2    "2"
-#define test_case_l2  "2_long"
-#define key_len2      4
-#define data_len2     28
-#define digest_len2   digest96_size
-#define digest_len_l2 IMB_MD5_DIGEST_SIZE_IN_BYTES
-static const char key2[] = "Jefe";
-static const char data2[] = "what do ya want for nothing?";
-static const uint8_t digest2[digest_len_l2] = {
-        0x75, 0x0c, 0x78, 0x3e, 0x6a, 0xb0, 0xb5, 0x03,
-        0xea, 0xa8, 0x6e, 0x31, 0x0a, 0x5d, 0xb7, 0x38
-};
-
-/*
- * 2.  Test Case 3
- *
- *    Key =          0xaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaaa
- *
- *    Key length =   16
- *
- *    Data =         0xdd (repeated 50 times)
- *
- *    Data length =  50
- *
- *    Digest =       0x56be34521d144c88dbb8c733f0e8b3f6
- *
- *    Digest96 =     0x56be34521d144c88dbb8c733
- */
-#define test_case3    "3"
-#define test_case_l3  "3_long"
-#define key_len3      16
-#define data_len3     50
-#define digest_len3   digest96_size
-#define digest_len_l3 IMB_MD5_DIGEST_SIZE_IN_BYTES
-static const uint8_t key3[key_len3] = {
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa,
-        0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa
-};
-static const uint8_t data3[data_len3] = {
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd, 0xdd,
-        0xdd, 0xdd
-};
-static const uint8_t digest3[digest_len_l3] = {
-        0x56, 0xbe, 0x34, 0x52, 0x1d, 0x14, 0x4c, 0x88,
-        0xdb, 0xb8, 0xc7, 0x33, 0xf0, 0xe8, 0xb3, 0xf6
-};
-
-/*
- * 2.  Test Case 4
- *
- *    Key =          0x0102030405060708090a0b0c0d0e0f10111213141516171819
- *
- *    Key length =   25
- *
- *    Data =         0xcd (repeated 50 times)
- *
- *    Data length =  50
- *
- *    Digest =       0x697eaf0aca3a3aea3a75164746ffaa79
- *
- *    Digest96 =     0x697eaf0aca3a3aea3a751647
- */
-#define test_case4    "4"
-#define test_case_l4  "4_long"
-#define key_len4      25
-#define data_len4     50
-#define digest_len4   digest96_size
-#define digest_len_l4 IMB_MD5_DIGEST_SIZE_IN_BYTES
-static const uint8_t key4[key_len4] = {
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f, 0x10,
-        0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 0x18,
-        0x19
-};
-static const uint8_t data4[data_len4] = {
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd, 0xcd,
-        0xcd, 0xcd
-};
-static const uint8_t digest4[digest_len_l4] = {
-        0x69, 0x7e, 0xaf, 0x0a, 0xca, 0x3a, 0x3a, 0xea,
-        0x3a, 0x75, 0x16, 0x47, 0x46, 0xff, 0xaa, 0x79
-};
-
-/*
- * 2.  Test Case 5
- *
- *    Key =          0x0c0c0c0c0c0c0c0c0c0c0c0c0c0c0c0c
- *
- *    Key length =   16
- *
- *    Data =         "Test With Truncation"
- *
- *    Data length =  20
- *
- *    Digest =       0x56461ef2342edc00f9bab995690efd4c
- *
- *    Digest96 =     0x56461ef2342edc00f9bab995
- */
-#define test_case5    "5"
-#define test_case_l5  "5_long"
-#define key_len5      16
-#define data_len5     20
-#define digest_len5   digest96_size
-#define digest_len_l5 IMB_MD5_DIGEST_SIZE_IN_BYTES
-static const uint8_t key5[key_len5] = {
-        0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c,
-        0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c
-};
-static const char data5[] = "Test With Truncation";
-static const uint8_t digest5[digest_len_l5] = {
-        0x56, 0x46, 0x1e, 0xf2, 0x34, 0x2e, 0xdc, 0x00,
-        0xf9, 0xba, 0xb9, 0x95, 0x69, 0x0e, 0xfd, 0x4c
-};
-
-/*
- * 2.  Test Case 6
- *
- *    Key =          0xaa (repeated 80 times)
- *
- *    Key length =   80
- *
- *    Data =         "Test Using Larger Than Block-Size Key - Hash Key First"
- *
- *    Data length =  54
- *
- *    Digest =       0x6b1ab7fe4bd7bf8f0b62e6ce61b9d0cd
- *
- *    Digest96 =     0x6b1ab7fe4bd7bf8f0b62e6ce
- */
-/* #define test_case6  "6" */
-/* #define key_len6    80 */
-/* #define data_len6   54 */
-/* #define digest_len6 digest96_size */
-/* static const uint8_t key6[key_len6] = { */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa */
-/* }; */
-/* static const char data6[] = "Test Using Larger Than Block-Size " */
-/*         "Key - Hash Key First"; */
-/* static const uint8_t digest6[digest_len6] = { */
-/*         0x6b, 0x1a, 0xb7, 0xfe, 0x4b, 0xd7, 0xbf, 0x8f, */
-/*         0x0b, 0x62, 0xe6, 0xce */
-/* }; */
-
-/*
- * 2.  Test Case 7
- *
- *    Key =          0xaa (repeated 80 times)
- *
- *    Key length =   80
- *
- *    Data =         "Test Using Larger Than Block-Size Key and Larger"
- *
- *    Data length =  73
- *
- *    Digest =       0x6f630fad67cda0ee1fb1f562db3aa53e
- *
- *    Digest96 =     0x6f630fad67cda0ee1fb1f562
- */
-/* #define test_case7  "7" */
-/* #define key_len7    80 */
-/* #define data_len7   73 */
-/* #define digest_len7 digest96_size */
-/* static const uint8_t key7[key_len7] = { */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, */
-/*         0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa, 0xaa */
-/* }; */
-/* static const char data7[] = "Test Using Larger Than Block-Size " */
-/*         "Key and Larger Than One Block-Size Data"; */
-/* static const uint8_t digest7[digest_len7] = { */
-/*         0x6f, 0x63, 0x0f, 0xad, 0x67, 0xcd, 0xa0, 0xee, */
-/*         0x1f, 0xb1, 0xf5, 0x62 */
-/* }; */
-
-#define HMAC_MD5_TEST_VEC(num)                                          \
-        { test_case##num,                                               \
-                        (const uint8_t *) key##num, key_len##num,       \
-                        (const uint8_t *) data##num, data_len##num,     \
-                        (const uint8_t *) digest##num, digest_len##num }
-#define HMAC_MD5_TEST_VEC_LONG(num)                                     \
-        { test_case_l##num,                                             \
-                        (const uint8_t *) key##num, key_len##num,       \
-                        (const uint8_t *) data##num, data_len##num,     \
-                        (const uint8_t *) digest##num, digest_len_l##num }
-
-static const struct hmac_md5_rfc2202_vector {
-        const char *test_case;
-        const uint8_t *key;
-        size_t key_len;
-        const uint8_t *data;
-        size_t data_len;
-        const uint8_t *digest;
-        size_t digest_len;
-} hmac_md5_vectors[] = {
-        HMAC_MD5_TEST_VEC(1),
-        HMAC_MD5_TEST_VEC(2),
-        HMAC_MD5_TEST_VEC(3),
-        HMAC_MD5_TEST_VEC(4),
-        HMAC_MD5_TEST_VEC(5),
-        /* HMAC_MD5_TEST_VEC(6), */
-        /* HMAC_MD5_TEST_VEC(7), */
-        HMAC_MD5_TEST_VEC_LONG(1),
-        HMAC_MD5_TEST_VEC_LONG(2),
-        HMAC_MD5_TEST_VEC_LONG(3),
-        HMAC_MD5_TEST_VEC_LONG(4),
-        HMAC_MD5_TEST_VEC_LONG(5),
-};
+extern const struct mac_test hmac_md5_test_json[];
 
 static int
-hmac_md5_job_ok(const struct hmac_md5_rfc2202_vector *vec,
+hmac_md5_job_ok(const struct mac_test *vec,
                  const struct IMB_JOB *job,
                  const uint8_t *auth,
                  const uint8_t *padding,
@@ -335,11 +52,11 @@ hmac_md5_job_ok(const struct hmac_md5_rfc2202_vector *vec,
         }
 
         /* hash checks */
-        if (memcmp(padding, &auth[sizeof_padding + vec->digest_len],
+        if (memcmp(padding, &auth[sizeof_padding + vec->tagSize],
                    sizeof_padding)) {
                 printf("hash overwrite tail\n");
                 hexdump(stderr, "Target",
-                        &auth[sizeof_padding + vec->digest_len],
+                        &auth[sizeof_padding + vec->tagSize],
                         sizeof_padding);
                 return 0;
         }
@@ -350,13 +67,13 @@ hmac_md5_job_ok(const struct hmac_md5_rfc2202_vector *vec,
                 return 0;
         }
 
-        if (memcmp(vec->digest, &auth[sizeof_padding],
-                   vec->digest_len)) {
+        if (memcmp(vec->tag, &auth[sizeof_padding],
+                   vec->tagSize)) {
                 printf("hash mismatched\n");
                 hexdump(stderr, "Received", &auth[sizeof_padding],
-                        vec->digest_len);
-                hexdump(stderr, "Expected", vec->digest,
-                        vec->digest_len);
+                        vec->tagSize);
+                hexdump(stderr, "Expected", vec->tag,
+                        vec->tagSize);
                 return 0;
         }
         return 1;
@@ -364,7 +81,7 @@ hmac_md5_job_ok(const struct hmac_md5_rfc2202_vector *vec,
 
 static int
 test_hmac_md5(struct IMB_MGR *mb_mgr,
-               const struct hmac_md5_rfc2202_vector *vec,
+               const struct mac_test *vec,
                const int num_jobs)
 {
         struct IMB_JOB *job;
@@ -384,7 +101,7 @@ test_hmac_md5(struct IMB_MGR *mb_mgr,
 
         for (i = 0; i < num_jobs; i++) {
                 const size_t alloc_len =
-                        vec->digest_len + (sizeof(padding) * 2);
+                        vec->tagSize + (sizeof(padding) * 2);
 
                 auths[i] = malloc(alloc_len);
                 if (auths[i] == NULL) {
@@ -394,7 +111,7 @@ test_hmac_md5(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, alloc_len);
         }
 
-        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_MD5, vec->key, vec->key_len,
+        imb_hmac_ipad_opad(mb_mgr, IMB_AUTH_MD5, vec->key, vec->keySize,
                            ipad_hash, opad_hash);
 
         /* empty the manager */
@@ -410,14 +127,14 @@ test_hmac_md5(struct IMB_MGR *mb_mgr,
                 job->dst = NULL;
                 job->key_len_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = vec->digest_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize;
                 job->iv = NULL;
                 job->iv_len_in_bytes = 0;
-                job->src = vec->data;
+                job->src = (const void *) vec->msg;
                 job->cipher_start_src_offset_in_bytes = 0;
                 job->msg_len_to_cipher_in_bytes = 0;
                 job->hash_start_src_offset_in_bytes = 0;
-                job->msg_len_to_hash_in_bytes = vec->data_len;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->u.HMAC._hashed_auth_key_xor_ipad = ipad_hash;
                 job->u.HMAC._hashed_auth_key_xor_opad = opad_hash;
                 job->cipher_mode = IMB_CIPHER_NULL;
@@ -477,29 +194,35 @@ test_hmac_md5_std_vectors(struct IMB_MGR *mb_mgr,
                           const int num_jobs,
                           struct test_suite_context *ts)
 {
-	const int vectors_cnt = DIM(hmac_md5_vectors);
-	int vect;
 
-	printf("HMAC-MD5 standard test vectors (N jobs = %d):\n", num_jobs);
-	for (vect = 1; vect <= vectors_cnt; vect++) {
-                const int idx = vect - 1;
+        const struct mac_test *v = hmac_md5_test_json;
 
+	printf("HMAC-MD5 standard test vectors (N jobs = %d):\n", num_jobs);
+	for (; v->msg != NULL; v++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("[%d/%d] RFC2202 Test Case %s key_len:%d "
-                               "data_len:%d digest_len:%d\n",
-                               vect, vectors_cnt,
-                               hmac_md5_vectors[idx].test_case,
-                               (int) hmac_md5_vectors[idx].key_len,
-                               (int) hmac_md5_vectors[idx].data_len,
-                               (int) hmac_md5_vectors[idx].digest_len);
+                        printf("RFC2202 Test Case %lu key_len:%lu "
+                               "data_len:%lu digest_len:%lu\n",
+                               v->tcId,
+                               v->keySize,
+                               v->msgSize / 8,
+                               v->tagSize);
 #else
                         printf(".");
 #endif
                 }
-
-                if (test_hmac_md5(mb_mgr, &hmac_md5_vectors[idx], num_jobs)) {
-                        printf("error #%d\n", vect);
+                /* No functionality for keys larger than block size */
+                if (v->keySize > IMB_MD5_BLOCK_SIZE) {
+#ifdef DEBUG
+                        if (!quiet_mode)
+                                printf("Skipped vector %lu, "
+                                       "Key size larger than block size\n",
+                                       v->tcId);
+#endif
+                        continue;
+                }
+                if (test_hmac_md5(mb_mgr, v, num_jobs)) {
+                        printf("error #%lu\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index 1ccf595d..2f38d3c7 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
-- 
GitLab


From 0af54ff0c6eacf764a9cac78619750454ffd87b7 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 24 Apr 2023 23:57:24 +0100
Subject: [PATCH 234/332] lib: [aes-gcm] unify AES-GCM, AES-GMAC and GHASH
 common code for AVX2 type-1 & 2 and AVX512 type-1

- IS_AVX2_GCM or IS_AVX512_GCM define is required
- replaced some compare 0 instructions with a shorter `or <reg>, <reg>`
---
 lib/include/gcm_avx512.inc             | 4251 +---------------------
 lib/include/gcm_avx_gen4.inc           | 4334 +----------------------
 lib/include/gcm_common_avx2_avx512.inc | 4464 ++++++++++++++++++++++++
 3 files changed, 4470 insertions(+), 8579 deletions(-)
 create mode 100644 lib/include/gcm_common_avx2_avx512.inc

diff --git a/lib/include/gcm_avx512.inc b/lib/include/gcm_avx512.inc
index 25e1611d..2c972596 100644
--- a/lib/include/gcm_avx512.inc
+++ b/lib/include/gcm_avx512.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
@@ -27,4250 +27,5 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-;
-; Authors:
-;       Erdinc Ozturk
-;       Vinodh Gopal
-;       James Guilford
-;       Tomasz Kantecki
-;
-;
-; References:
-;       This code was derived and highly optimized from the code described in paper:
-;               Vinodh Gopal et. al. Optimized Galois-Counter-Mode Implementation on Intel Architecture Processors. August, 2010
-;       The details of the implementation is explained in:
-;               Erdinc Ozturk et. al. Enabling High-Performance Galois-Counter-Mode on Intel Architecture Processors. October, 2012.
-;
-;
-;
-;
-; Assumptions:
-;
-;
-;
-; iv:
-;       0                   1                   2                   3
-;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                             Salt  (From the SA)               |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                     Initialization Vector                     |
-;       |         (This is the sequence number from IPSec header)       |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                              0x1                              |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;
-;
-;
-; AAD:
-;       AAD will be padded with 0 to the next 16byte multiple
-;       for example, assume AAD is a u32 vector
-;
-;       if AAD is 8 bytes:
-;       AAD[3] = {A0, A1};
-;       padded AAD in xmm register = {A1 A0 0 0}
-;
-;       0                   1                   2                   3
-;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                               SPI (A1)                        |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                     32-bit Sequence Number (A0)               |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                              0x0                              |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;
-;                                       AAD Format with 32-bit Sequence Number
-;
-;       if AAD is 12 bytes:
-;       AAD[3] = {A0, A1, A2};
-;       padded AAD in xmm register = {A2 A1 A0 0}
-;
-;       0                   1                   2                   3
-;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                               SPI (A2)                        |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                 64-bit Extended Sequence Number {A1,A0}       |
-;       |                                                               |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                              0x0                              |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;
-;        AAD Format with 64-bit Extended Sequence Number
-;
-;
-; aadLen:
-;       Must be a multiple of 4 bytes and from the definition of the spec.
-;       The code additionally supports any aadLen length.
-;
-; TLen:
-;       from the definition of the spec, TLen can only be 8, 12 or 16 bytes.
-;
-; poly = x^128 + x^127 + x^126 + x^121 + 1
-; throughout the code, one tab and two tab indentations are used. one tab is for GHASH part, two tabs is for AES part.
-;
-
-%include "include/os.inc"
-%include "include/reg_sizes.inc"
-%include "include/clear_regs.inc"
-%include "include/gcm_defines.inc"
-%include "include/gcm_keys_avx2_avx512.inc"
-%include "include/gcm_common.inc"
-%include "include/cet.inc"
-%include "include/mb_mgr_datastruct.inc"
-%include "include/imb_job.inc"
-%include "include/memcpy.inc"
-%include "include/error.inc"
-%include "include/imb_job.inc"
-
-%ifndef GCM128_MODE
-%ifndef GCM192_MODE
-%ifndef GCM256_MODE
-%error "No GCM mode selected for gcm_avx512.inc!"
-%endif
-%endif
-%endif
-
-;; Decide on AES-GCM key size to compile for
-%ifdef GCM128_MODE
-%define NROUNDS 9
-%define FN_NAME(x,y) aes_gcm_ %+ x %+ _128 %+ y %+ avx512
-%define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _128_ %+ avx512
-%endif
-
-%ifdef GCM192_MODE
-%define NROUNDS 11
-%define FN_NAME(x,y) aes_gcm_ %+ x %+ _192 %+ y %+ avx512
-%define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _192_ %+ avx512
-%endif
-
-%ifdef GCM256_MODE
-%define NROUNDS 13
-%define FN_NAME(x,y) aes_gcm_ %+ x %+ _256 %+ y %+ avx512
-%define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _256_ %+ avx512
-%endif
-
-mksection .text
-default rel
-
-; need to store 5 GP registers on stack (align to 16 bytes)
-%define GP_STORAGE 8*6
-
-%define	TMP2	16*0    ; Temporary storage for AES State 2 (State 1 is stored in an XMM register)
-%define	TMP3	16*1    ; Temporary storage for AES State 3
-%define	TMP4	16*2    ; Temporary storage for AES State 4
-%define	TMP5	16*3    ; Temporary storage for AES State 5
-%define	TMP6	16*4    ; Temporary storage for AES State 6
-%define	TMP7	16*5    ; Temporary storage for AES State 7
-%define	TMP8	16*6    ; Temporary storage for AES State 8
-
-%define	LOCAL_STORAGE	16*7
-
-%ifidn __OUTPUT_FORMAT__, win64
-	%define	XMM_STORAGE	16*10
-%else
-	%define	XMM_STORAGE	0
-%endif
-
-%define GP_OFFSET (LOCAL_STORAGE + XMM_STORAGE)
-
-%define	VARIABLE_OFFSET	(GP_STORAGE + LOCAL_STORAGE + XMM_STORAGE)
-
-;; extra memory for GCM context structure
-%define CONTEXT_SIZE    6*16
-%define CONTEXT_OFFSET  VARIABLE_OFFSET
-
-;; Full stack frame layout:
-;;                   RETURN ADDRESS + ARGS
-;; R14 =  + 16*6  -> ---------------------------
-;;                   GCM CONTEXT (JOB API only)
-;;        + 6*8   -> ---------------------------
-;;                   GP STORAGE
-;;        + 16*10 -> --------------------------
-;;                   XMM STORAGE (windows only)
-;;        + 16*7  -> --------------------------
-;;                   LOCAL STORAGE
-;; RSP =          -> --------------------------
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Utility Macros
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GHASH_MUL MACRO to implement: Data*HashKey mod (128,127,126,121,0)
-; Input: A and B (128-bits each, bit-reflected)
-; Output: C = A*B*x mod poly, (i.e. >>1 )
-; To compute GH = GH*HashKey mod poly, give HK = HashKey<<1 mod poly as input
-; GH = GH * HK * x mod poly which is equivalent to GH*HashKey mod poly.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  GHASH_MUL  7
-%define %%GH %1         ; 16 Bytes
-%define %%HK %2         ; 16 Bytes
-%define %%T1 %3
-%define %%T2 %4
-%define %%T3 %5
-%define %%T4 %6
-%define %%T5 %7
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        vpclmulqdq      %%T1, %%GH, %%HK, 0x11          ; %%T1 = a1*b1
-        vpclmulqdq      %%T2, %%GH, %%HK, 0x00          ; %%T2 = a0*b0
-        vpclmulqdq      %%T3, %%GH, %%HK, 0x01          ; %%T3 = a1*b0
-        vpclmulqdq      %%GH, %%GH, %%HK, 0x10          ; %%GH = a0*b1
-        vpxor           %%GH, %%GH, %%T3
-
-        vpsrldq         %%T3, %%GH, 8                   ; shift-R %%GH 2 DWs
-        vpslldq         %%GH, %%GH, 8                   ; shift-L %%GH 2 DWs
-
-        vpxor           %%T1, %%T1, %%T3
-        vpxor           %%GH, %%GH, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqu         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%GH, 0x01
-        vpslldq         %%T2, %%T2, 8                    ; shift-L %%T2 2 DWs
-
-        vpxor           %%GH, %%GH, %%T2                 ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
-        vpclmulqdq      %%T2, %%T3, %%GH, 0x00
-        vpsrldq         %%T2, %%T2, 4                    ; shift-R %%T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%GH, %%T3, %%GH, 0x10
-        vpslldq         %%GH, %%GH, 4                    ; shift-L %%GH 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%GH, %%GH, %%T2                 ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%GH, %%GH, %%T1                 ; the result is in %%GH
-%endmacro
-
-; In PRECOMPUTE, the commands filling Hashkey_i_k are not required for avx512
-; functions, but are kept to allow users to switch cpu architectures between calls
-; of pre, init, update, and finalize.
-%macro  PRECOMPUTE 8
-%define %%GDATA %1
-%define %%HK    %2
-%define %%T1    %3
-%define %%T2    %4
-%define %%T3    %5
-%define %%T4    %6
-%define %%T5    %7
-%define %%T6    %8
-
-        ; Haskey_i_k holds XORed values of the low and high parts of the Haskey_i
-        vmovdqa  %%T5, %%HK
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^2<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_2], %%T5                    ;  [HashKey_2] = HashKey^2<<1 mod poly
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^3<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_3], %%T5
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^4<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_4], %%T5
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^5<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_5], %%T5
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^6<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_6], %%T5
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^7<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_7], %%T5
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^8<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_8], %%T5
-%endmacro
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; CALC_AAD_HASH: Calculates the hash of the data which will not be encrypted.
-; Input: The input data (A_IN), that data's length (A_LEN), and the hash key (HASH_KEY).
-; Output: The hash of the data (AAD_HASH).
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  CALC_AAD_HASH   13
-%define %%A_IN          %1
-%define %%A_LEN         %2
-%define %%AAD_HASH      %3
-%define %%GDATA_KEY     %4
-%define %%XTMP0         %5      ; xmm temp reg 5
-%define %%XTMP1         %6      ; xmm temp reg 5
-%define %%XTMP2         %7
-%define %%XTMP3         %8
-%define %%XTMP4         %9
-%define %%XTMP5         %10     ; xmm temp reg 5
-%define %%T1            %11     ; temp reg 1
-%define %%T2            %12
-%define %%T3            %13
-
-        mov     %%T1, %%A_IN            ; T1 = AAD
-        mov     %%T2, %%A_LEN           ; T2 = aadLen
-
-%%_get_AAD_loop128:
-        cmp     %%T2, 128
-        jl      %%_exit_AAD_loop128
-
-        vmovdqu         %%XTMP0, [%%T1 + 16*0]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vpxor           %%XTMP0, %%AAD_HASH
-
-        vmovdqu         %%XTMP5, [%%GDATA_KEY + HashKey_8]
-        vpclmulqdq      %%XTMP1, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = a1*b1
-        vpclmulqdq      %%XTMP2, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = a0*b0
-        vpclmulqdq      %%XTMP3, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = a1*b0
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10                 ; %%T4 = a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4                       ; %%T3 = a1*b0 + a0*b1
-
-%assign i 1
-%assign j 7
-%rep 7
-        vmovdqu         %%XTMP0, [%%T1 + 16*i]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vmovdqu         %%XTMP5, [%%GDATA_KEY + HashKey_ %+ j]
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = T1 + a1*b1
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = T2 + a0*b0
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = T3 + a1*b0 + a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-%assign i (i + 1)
-%assign j (j - 1)
-%endrep
-
-        vpslldq         %%XTMP4, %%XTMP3, 8                             ; shift-L 2 DWs
-        vpsrldq         %%XTMP3, %%XTMP3, 8                             ; shift-R 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP3                       ; accumulate the results in %%T1(M):%%T2(L)
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqa         %%XTMP5, [rel POLY2]
-        vpclmulqdq      %%XTMP0, %%XTMP5, %%XTMP2, 0x01
-        vpslldq         %%XTMP0, %%XTMP0, 8                             ; shift-L xmm2 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP0                       ; first phase of the reduction complete
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
-        vpclmulqdq      %%XTMP3, %%XTMP5, %%XTMP2, 0x00
-        vpsrldq         %%XTMP3, %%XTMP3, 4                             ; shift-R 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%XTMP4, %%XTMP5, %%XTMP2, 0x10
-        vpslldq         %%XTMP4, %%XTMP4, 4                             ; shift-L 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%XTMP4, %%XTMP4, %%XTMP3                       ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%AAD_HASH, %%XTMP1, %%XTMP4                    ; the result is in %%T1
-
-        sub     %%T2, 128
-        je      %%_CALC_AAD_done
-
-        add     %%T1, 128
-        jmp     %%_get_AAD_loop128
-
-%%_exit_AAD_loop128:
-        cmp     %%T2, 16
-        jl      %%_get_small_AAD_block
-
-        ;; calculate hash_key position to start with
-        mov     %%T3, %%T2
-        and     %%T3, -16       ; 1 to 7 blocks possible here
-        neg     %%T3
-        add     %%T3, HashKey_1 + 16
-        lea     %%T3, [%%GDATA_KEY + %%T3]
-
-        vmovdqu         %%XTMP0, [%%T1]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vpxor           %%XTMP0, %%AAD_HASH
-
-        vmovdqu         %%XTMP5, [%%T3]
-        vpclmulqdq      %%XTMP1, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = a1*b1
-        vpclmulqdq      %%XTMP2, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = a0*b0
-        vpclmulqdq      %%XTMP3, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = a1*b0
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10                 ; %%T4 = a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4                       ; %%T3 = a1*b0 + a0*b1
-
-        add     %%T3, 16        ; move to next hashkey
-        add     %%T1, 16        ; move to next data block
-        sub     %%T2, 16
-        cmp     %%T2, 16
-        jl      %%_AAD_reduce
-
-%%_AAD_blocks:
-        vmovdqu         %%XTMP0, [%%T1]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vmovdqu         %%XTMP5, [%%T3]
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = T1 + a1*b1
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = T2 + a0*b0
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = T3 + a1*b0 + a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-
-        add     %%T3, 16        ; move to next hashkey
-        add     %%T1, 16
-        sub     %%T2, 16
-        cmp     %%T2, 16
-        jl      %%_AAD_reduce
-        jmp     %%_AAD_blocks
-
-%%_AAD_reduce:
-        vpslldq         %%XTMP4, %%XTMP3, 8                             ; shift-L 2 DWs
-        vpsrldq         %%XTMP3, %%XTMP3, 8                             ; shift-R 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP3                       ; accumulate the results in %%T1(M):%%T2(L)
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqa         %%XTMP5, [rel POLY2]
-        vpclmulqdq      %%XTMP0, %%XTMP5, %%XTMP2, 0x01
-        vpslldq         %%XTMP0, %%XTMP0, 8                             ; shift-L xmm2 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP0                       ; first phase of the reduction complete
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
-        vpclmulqdq      %%XTMP3, %%XTMP5, %%XTMP2, 0x00
-        vpsrldq         %%XTMP3, %%XTMP3, 4                             ; shift-R 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%XTMP4, %%XTMP5, %%XTMP2, 0x10
-        vpslldq         %%XTMP4, %%XTMP4, 4                             ; shift-L 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%XTMP4, %%XTMP4, %%XTMP3                       ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%AAD_HASH, %%XTMP1, %%XTMP4                    ; the result is in %%T1
-
-%%_get_small_AAD_block:
-        or      %%T2, %%T2
-        je      %%_CALC_AAD_done
-
-        vmovdqu         %%XTMP0, [%%GDATA_KEY + HashKey]
-        READ_SMALL_DATA_INPUT_AVX512   %%XTMP1, %%T1, %%T2, %%T3, k1
-        ;byte-reflect the AAD data
-        vpshufb         %%XTMP1, [rel SHUF_MASK]
-        vpxor           %%AAD_HASH, %%XTMP1
-        GHASH_MUL       %%AAD_HASH, %%XTMP0, %%XTMP1, %%XTMP2, %%XTMP3, %%XTMP4, %%XTMP5
-
-%%_CALC_AAD_done:
-
-%endmacro ; CALC_AAD_HASH
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; PARTIAL_BLOCK: Handles encryption/decryption and the tag partial blocks between update calls.
-; Requires the input data be at least 1 byte long.
-; Input: gcm_context_data *(GDATA_CTX), input text (PLAIN_CYPH_IN),
-; input text length (PLAIN_CYPH_LEN), the current data offset (DATA_OFFSET),
-; the hash subkey (HASH_SUBKEY) and whether encoding or decoding (ENC_DEC)
-; Output: A cypher of the first partial block (CYPH_PLAIN_OUT), and updated GDATA_CTX
-; Clobbers rax, r10, r12, r13, r15, xmm0, xmm1, xmm2, xmm3, xmm5, xmm6, xmm9, xmm10, xmm11
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro PARTIAL_BLOCK    8
-%define %%GDATA_CTX             %1
-%define %%CYPH_PLAIN_OUT        %2
-%define %%PLAIN_CYPH_IN         %3
-%define %%PLAIN_CYPH_LEN        %4
-%define %%DATA_OFFSET           %5
-%define %%AAD_HASH              %6
-%define %%HASH_SUBKEY           %7
-%define %%ENC_DEC               %8
-
-        mov     r13, [%%GDATA_CTX + PBlockLen]
-        cmp     r13, 0
-        je      %%_partial_block_done           ;Leave Macro if no partial blocks
-
-        ; Read in input data without over reading
-        READ_SMALL_DATA_INPUT_LEN_BT16_AVX512   xmm1, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, r12, rax, k1
-
-        vmovdqu xmm9, [%%GDATA_CTX + PBlockEncKey]  ;xmm9 = my_ctx_data.partial_block_enc_key
-
-        lea     r12, [rel SHIFT_MASK]
-
-        add     r12, r13                        ; adjust the shuffle mask pointer to be able to shift r13 bytes (16-r13 is the number of bytes in plaintext mod 16)
-        vmovdqu xmm2, [r12]                     ; get the appropriate shuffle mask
-        vpshufb xmm9, xmm2                      ;shift right r13 bytes
-
-%ifidn  %%ENC_DEC, DEC
-        vmovdqa xmm3, xmm1
-%endif
-        vpxor   xmm9, xmm1                      ; Ciphertext XOR E(K, Yn)
-
-        mov     r15, %%PLAIN_CYPH_LEN
-        add     r15, r13
-        sub     r15, 16                         ;Set r15 to be the amount of data left in CYPH_PLAIN_IN after filling the block
-        jge     %%_no_extra_mask                ;Determine if if partial block is not being filled and shift mask accordingly
-        sub     r12, r15
-%%_no_extra_mask:
-
-        vmovdqu xmm1, [r12 + ALL_F - SHIFT_MASK]; get the appropriate mask to mask out bottom r13 bytes of xmm9
-        vpand   xmm9, xmm1                      ; mask out bottom r13 bytes of xmm9
-
-%ifidn  %%ENC_DEC, DEC
-        vpand   xmm3, xmm1
-        vpshufb xmm3, [rel SHUF_MASK]
-        vpshufb xmm3, xmm2
-        vpxor   %%AAD_HASH, xmm3
-%else
-        vpshufb xmm9, [rel SHUF_MASK]
-        vpshufb xmm9, xmm2
-        vpxor   %%AAD_HASH, xmm9
-%endif
-        cmp     r15,0
-        jl      %%_partial_incomplete
-
-        GHASH_MUL       %%AAD_HASH, %%HASH_SUBKEY, xmm0, xmm10, xmm11, xmm5, xmm6       ;GHASH computation for the last <16 Byte block
-        xor     rax,rax
-        mov     [%%GDATA_CTX + PBlockLen], rax
-        jmp     %%_enc_dec_done
-%%_partial_incomplete:
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_CYPH_LEN
-       	add     [%%GDATA_CTX + PBlockLen], rax
-%else
-        add     [%%GDATA_CTX + PBlockLen], %%PLAIN_CYPH_LEN
-%endif
-%%_enc_dec_done:
-        vmovdqu [%%GDATA_CTX + AadHash], %%AAD_HASH
-
-%ifidn  %%ENC_DEC, ENC
-        vpshufb xmm9, [rel SHUF_MASK]       ; shuffle xmm9 back to output as ciphertext
-        vpshufb xmm9, xmm2
-%endif
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ; output encrypted Bytes
-        cmp     r15,0
-        jl      %%_partial_fill
-        mov     r12, r13
-        mov     r13, 16
-        sub     r13, r12                        ; Set r13 to be the number of bytes to write out
-        jmp     %%_count_set
-%%_partial_fill:
-        mov     r13, %%PLAIN_CYPH_LEN
-%%_count_set:
-        lea             rax, [rel byte_len_to_mask_table]
-        kmovw           k1, [rax + r13*2]
-        vmovdqu8        [%%CYPH_PLAIN_OUT + %%DATA_OFFSET]{k1}, xmm9
-        add             %%DATA_OFFSET, r13
-%%_partial_block_done:
-%endmacro ; PARTIAL_BLOCK
-
-%macro GHASH_SINGLE_MUL 9
-%define %%GDATA                 %1
-%define %%HASHKEY               %2
-%define %%CIPHER                %3
-%define %%STATE_11              %4
-%define %%STATE_00              %5
-%define %%STATE_MID             %6
-%define %%T1                    %7
-%define %%T2                    %8
-%define %%FIRST                 %9
-
-        vmovdqu         %%T1, [%%GDATA + %%HASHKEY]
-%ifidn %%FIRST, first
-        vpclmulqdq      %%STATE_11, %%CIPHER, %%T1, 0x11         ; %%T4 = a1*b1
-        vpclmulqdq      %%STATE_00, %%CIPHER, %%T1, 0x00         ; %%T4_2 = a0*b0
-        vpclmulqdq      %%STATE_MID, %%CIPHER, %%T1, 0x01        ; %%T6 = a1*b0
-        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x10               ; %%T5 = a0*b1
-        vpxor           %%STATE_MID, %%STATE_MID, %%T2
-%else
-        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x11
-        vpxor           %%STATE_11, %%STATE_11, %%T2
-
-        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x00
-        vpxor           %%STATE_00, %%STATE_00, %%T2
-
-        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x01
-        vpxor           %%STATE_MID, %%STATE_MID, %%T2
-
-        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x10
-        vpxor           %%STATE_MID, %%STATE_MID, %%T2
-%endif
-
-%endmacro
-
-; if a = number of total plaintext bytes
-; b = floor(a/16)
-; %%num_initial_blocks = b mod 8;
-; encrypt the initial %%num_initial_blocks blocks and apply ghash on the ciphertext
-; %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r14 are used as a pointer only, not modified.
-; Updated AAD_HASH is returned in %%T3
-
-%macro INITIAL_BLOCKS 23
-%define %%GDATA_KEY             %1
-%define %%CYPH_PLAIN_OUT        %2
-%define %%PLAIN_CYPH_IN         %3
-%define %%LENGTH                %4
-%define %%DATA_OFFSET           %5
-%define %%num_initial_blocks    %6      ; can be 0, 1, 2, 3, 4, 5, 6 or 7
-%define %%T1                    %7
-%define %%T2                    %8
-%define %%T3                    %9
-%define %%T4                    %10
-%define %%T5                    %11
-%define %%CTR                   %12
-%define %%XMM1                  %13
-%define %%XMM2                  %14
-%define %%XMM3                  %15
-%define %%XMM4                  %16
-%define %%XMM5                  %17
-%define %%XMM6                  %18
-%define %%XMM7                  %19
-%define %%XMM8                  %20
-%define %%T6                    %21
-%define %%T_key                 %22
-%define %%ENC_DEC               %23
-
-%assign i (8-%%num_initial_blocks)
-                ;; Move AAD_HASH to temp reg
-                vmovdqu  %%T2, %%XMM8
-                ;; Start AES for %%num_initial_blocks blocks
-                ;; vmovdqu  %%CTR, [%%GDATA_CTX + CurCount]   ; %%CTR = Y0
-
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vpaddd   %%CTR, %%CTR, [rel ONE]     ; INCR Y0
-                vmovdqa  reg(i), %%CTR
-                vpshufb  reg(i), [rel SHUF_MASK]     ; perform a 16Byte swap
-%assign i (i+1)
-%endrep
-
-%if(%%num_initial_blocks>0)
-vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vpxor    reg(i),reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign j 1
-%rep NROUNDS
-vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vaesenc  reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign j (j+1)
-%endrep
-
-vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vaesenclast      reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%endif ; %if(%%num_initial_blocks>0)
-
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-                vpxor    reg(i), reg(i), %%T1
-                ;; Write back ciphertext for %%num_initial_blocks blocks
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
-                add     %%DATA_OFFSET, 16
-                %ifidn  %%ENC_DEC, DEC
-                    vmovdqa  reg(i), %%T1
-                %endif
-                ;; Prepare ciphertext for GHASH computations
-                vpshufb  reg(i), [rel SHUF_MASK]
-%assign i (i+1)
-%endrep
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%assign i (9-%%num_initial_blocks)
-%if(%%num_initial_blocks>0)
-        vmovdqa %%T3, reg(i)
-%assign i (i+1)
-%endif
-%if %%num_initial_blocks>1
-%rep %%num_initial_blocks-1
-        vmovdqu [rsp + TMP %+ i], reg(i)
-%assign i (i+1)
-%endrep
-%endif
-
-                ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-                ;; Prepare 8 counter blocks and perform rounds of AES cipher on
-                ;; them, load plain/cipher text and store cipher/plain text.
-                ;; Stitch GHASH computation in between AES rounds.
-                vpaddd   %%XMM1, %%CTR, [rel ONE]   ; INCR Y0
-                vpaddd   %%XMM2, %%CTR, [rel TWO]   ; INCR Y0
-                vpaddd   %%XMM3, %%XMM1, [rel TWO]  ; INCR Y0
-                vpaddd   %%XMM4, %%XMM2, [rel TWO]  ; INCR Y0
-                vpaddd   %%XMM5, %%XMM3, [rel TWO]  ; INCR Y0
-                vpaddd   %%XMM6, %%XMM4, [rel TWO]  ; INCR Y0
-                vpaddd   %%XMM7, %%XMM5, [rel TWO]  ; INCR Y0
-                vpaddd   %%XMM8, %%XMM6, [rel TWO]  ; INCR Y0
-                vmovdqa  %%CTR, %%XMM8
-
-                vpshufb  %%XMM1, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM2, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM3, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM4, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM5, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM6, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM7, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM8, [rel SHUF_MASK]    ; perform a 16Byte swap
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
-                vpxor    %%XMM1, %%XMM1, %%T_key
-                vpxor    %%XMM2, %%XMM2, %%T_key
-                vpxor    %%XMM3, %%XMM3, %%T_key
-                vpxor    %%XMM4, %%XMM4, %%T_key
-                vpxor    %%XMM5, %%XMM5, %%T_key
-                vpxor    %%XMM6, %%XMM6, %%T_key
-                vpxor    %%XMM7, %%XMM7, %%T_key
-                vpxor    %%XMM8, %%XMM8, %%T_key
-
-%assign i (8-%%num_initial_blocks)
-%assign j (9-%%num_initial_blocks)
-%assign k (%%num_initial_blocks)
-
-%define %%T4_2 %%T4
-%if(%%num_initial_blocks>0)
-        ;; Hash in AES state
-        ;; T2 - incoming AAD hash
-        vpxor %%T2, %%T3
-
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, first
-%endif
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*1]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*2]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>1)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*3]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*4]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>2)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>3)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*5]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*6]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>4)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*7]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*8]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>5)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*9]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-%ifndef GCM128_MODE
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*10]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>6)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-%ifdef GCM128_MODE
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*10]
-                vaesenclast  %%XMM1, %%T_key
-                vaesenclast  %%XMM2, %%T_key
-                vaesenclast  %%XMM3, %%T_key
-                vaesenclast  %%XMM4, %%T_key
-                vaesenclast  %%XMM5, %%T_key
-                vaesenclast  %%XMM6, %%T_key
-                vaesenclast  %%XMM7, %%T_key
-                vaesenclast  %%XMM8, %%T_key
-%endif
-
-%ifdef GCM192_MODE
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*11]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu          %%T_key, [%%GDATA_KEY+16*12]
-                vaesenclast      %%XMM1, %%T_key
-                vaesenclast      %%XMM2, %%T_key
-                vaesenclast      %%XMM3, %%T_key
-                vaesenclast      %%XMM4, %%T_key
-                vaesenclast      %%XMM5, %%T_key
-                vaesenclast      %%XMM6, %%T_key
-                vaesenclast      %%XMM7, %%T_key
-                vaesenclast      %%XMM8, %%T_key
-%endif
-%ifdef GCM256_MODE
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*11]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu          %%T_key, [%%GDATA_KEY+16*12]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>7)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-%ifdef GCM256_MODE             ; GCM256
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*13]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu          %%T_key, [%%GDATA_KEY+16*14]
-                vaesenclast      %%XMM1, %%T_key
-                vaesenclast      %%XMM2, %%T_key
-                vaesenclast      %%XMM3, %%T_key
-                vaesenclast      %%XMM4, %%T_key
-                vaesenclast      %%XMM5, %%T_key
-                vaesenclast      %%XMM6, %%T_key
-                vaesenclast      %%XMM7, %%T_key
-                vaesenclast      %%XMM8, %%T_key
-%endif                          ;  GCM256 mode
-
-%if(%%num_initial_blocks>0)
-        vpsrldq %%T3, %%T6, 8            ; shift-R %%T2 2 DWs
-        vpslldq %%T6, %%T6, 8            ; shift-L %%T3 2 DWs
-        vpxor   %%T1, %%T1, %%T3         ; accumulate the results in %%T1:%%T4
-        vpxor   %%T4, %%T6, %%T4
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ; First phase of the reduction
-        vmovdqu         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%T4, 0x01
-        vpslldq         %%T2, %%T2, 8             ; shift-L xmm2 2 DWs
-
-        ;; First phase of the reduction complete
-        vpxor           %%T4, %%T4, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ; Second phase of the reduction
-        vpclmulqdq      %%T2, %%T3, %%T4, 0x00
-        ;; Shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-        vpsrldq         %%T2, %%T2, 4
-
-        vpclmulqdq      %%T4, %%T3, %%T4, 0x10
-        ;; Shift-L xmm0 1 DW (Shift-L 1-DW to obtain result with no shifts)
-        vpslldq         %%T4, %%T4, 4
-        ;; Second phase of the reduction complete
-        vpxor           %%T4, %%T4, %%T2
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ; The result is in %%T3
-        vpxor           %%T3, %%T1, %%T4
-%else
-        ;; The hash should end up in T3
-        vmovdqa  %%T3, %%T2
-%endif
-
-        ;; Final hash is now in T3
-%if %%num_initial_blocks > 0
-        ;; NOTE: obsolete in case %%num_initial_blocks = 0
-        sub     %%LENGTH, 16*%%num_initial_blocks
-%endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*0]
-                vpxor    %%XMM1, %%XMM1, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*0], %%XMM1
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM1, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*1]
-                vpxor    %%XMM2, %%XMM2, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*1], %%XMM2
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM2, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*2]
-                vpxor    %%XMM3, %%XMM3, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*2], %%XMM3
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM3, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*3]
-                vpxor    %%XMM4, %%XMM4, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*3], %%XMM4
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM4, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*4]
-                vpxor    %%XMM5, %%XMM5, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*4], %%XMM5
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM5, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*5]
-                vpxor    %%XMM6, %%XMM6, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*5], %%XMM6
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM6, %%T1
-                %endif
-
-               VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*6]
-                vpxor    %%XMM7, %%XMM7, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*6], %%XMM7
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM7, %%T1
-                %endif
-
-%if %%num_initial_blocks > 0
-                ;; NOTE: 'jl' is never taken for %%num_initial_blocks = 0
-                ;;      This macro is executed for length 128 and up,
-                ;;      zero length is checked in GCM_ENC_DEC.
-                ;; If the last block is partial then the xor will be done later
-                ;; in ENCRYPT_FINAL_PARTIAL_BLOCK.
-                ;; We know it's partial if LENGTH - 16*num_initial_blocks < 128
-                cmp %%LENGTH, 128
-                jl %%_initial_skip_last_word_write
-%endif
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*7]
-                vpxor    %%XMM8, %%XMM8, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*7], %%XMM8
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM8, %%T1
-                %endif
-
-                ;; Update %%LENGTH with the number of blocks processed
-                sub     %%LENGTH, 16
-                add     %%DATA_OFFSET, 16
-%%_initial_skip_last_word_write:
-                sub     %%LENGTH, 128-16
-                add     %%DATA_OFFSET, 128-16
-
-                vpshufb  %%XMM1, [rel SHUF_MASK]             ; perform a 16Byte swap
-                ;; Combine GHASHed value with the corresponding ciphertext
-                vpxor    %%XMM1, %%XMM1, %%T3
-                vpshufb  %%XMM2, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM3, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM4, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM5, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM6, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM7, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM8, [rel SHUF_MASK]             ; perform a 16Byte swap
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%%_initial_blocks_done:
-
-%endmacro
-
-;;; INITIAL_BLOCKS macro with support for a partial final block.
-;;; num_initial_blocks is expected to include the partial final block
-;;;     in the count.
-%macro INITIAL_BLOCKS_PARTIAL 25
-%define %%GDATA_KEY             %1
-%define %%GDATA_CTX             %2
-%define %%CYPH_PLAIN_OUT        %3
-%define %%PLAIN_CYPH_IN         %4
-%define %%LENGTH                %5
-%define %%DATA_OFFSET           %6
-%define %%num_initial_blocks    %7  ; can be 1, 2, 3, 4, 5, 6 or 7 (not 0)
-%define %%T1                    %8
-%define %%T2                    %9
-%define %%T3                    %10 ; [out] hash value
-%define %%T4                    %11
-%define %%T5                    %12
-%define %%CTR                   %13
-%define %%XMM1                  %14
-%define %%XMM2                  %15
-%define %%XMM3                  %16
-%define %%XMM4                  %17
-%define %%XMM5                  %18
-%define %%XMM6                  %19
-%define %%XMM7                  %20
-%define %%XMM8                  %21 ; [in] hash value
-%define %%T6                    %22
-%define %%T_key                 %23
-%define %%ENC_DEC               %24
-%define %%INSTANCE_TYPE         %25
-
-                ;; Move AAD_HASH to temp reg
-                vmovdqu  %%T2, %%XMM8
-
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                ;; Compute AES counters
-                vpaddd   %%CTR, %%CTR, [rel ONE]     ; INCR Y0
-                vmovdqa  reg(i), %%CTR
-                vpshufb  reg(i), [rel SHUF_MASK]     ; perform a 16Byte swap
-%assign i (i+1)
-%endrep
-
-vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                ; Start AES for %%num_initial_blocks blocks
-                vpxor    reg(i),reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign j 1
-%rep NROUNDS
-vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vaesenc  reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign j (j+1)
-%endrep
-
-vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vaesenclast      reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;; Hash all but the last block of data
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks-1
-                ;; Encrypt the message for all but the last block
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-                vpxor    reg(i), reg(i), %%T1
-                ;; write back ciphertext for %%num_initial_blocks blocks
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
-                add     %%DATA_OFFSET, 16
-%ifidn  %%ENC_DEC, DEC
-                vmovdqa  reg(i), %%T1
-%endif
-                ;; Prepare ciphertext for GHASH computations
-                vpshufb  reg(i), [rel SHUF_MASK]
-%assign i (i+1)
-%endrep
-
-%if %%num_initial_blocks > 1
-                ;; The final block of data may be <16B
-                sub      %%LENGTH, 16*(%%num_initial_blocks-1)
-%endif
-
-%if %%num_initial_blocks < 8
-                ;; NOTE: the 'jl' is always taken for num_initial_blocks = 8.
-                ;;      This is run in the context of GCM_ENC_DEC_SMALL for length < 128.
-                cmp      %%LENGTH, 16
-                jl       %%_small_initial_partial_block
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;; Handle a full length final block - encrypt and hash all blocks
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                sub      %%LENGTH, 16
-	        mov	[%%GDATA_CTX + PBlockLen], %%LENGTH
-
-                ;; Encrypt the message
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-                vpxor    reg(i), reg(i), %%T1
-                ;; write back ciphertext for %%num_initial_blocks blocks
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
-                add     %%DATA_OFFSET, 16
-%ifidn  %%ENC_DEC, DEC
-                vmovdqa  reg(i), %%T1
-%endif
-                ;; Prepare ciphertext for GHASH computations
-                vpshufb  reg(i), [rel SHUF_MASK]
-
-        ;; Hash all of the data
-%assign i (8-%%num_initial_blocks)
-%assign j (9-%%num_initial_blocks)
-%assign k (%%num_initial_blocks)
-%assign last_block_to_hash 0
-
-%if(%%num_initial_blocks>last_block_to_hash)
-        ;; Hash in AES state
-        vpxor %%T2, reg(j)
-
-        ;; T2 - incoming AAD hash
-        ;; reg(i) holds ciphertext
-        ;; T5 - hash key
-        ;; T6 - updated xor
-        ;; reg(1)/xmm1 should now be available for tmp use
-        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
-        vpclmulqdq      %%T1, %%T2, %%T5, 0x11             ; %%T4 = a1*b1
-        vpclmulqdq      %%T4, %%T2, %%T5, 0x00             ; %%T4 = a0*b0
-        vpclmulqdq      %%T6, %%T2, %%T5, 0x01             ; %%T6 = a1*b0
-        vpclmulqdq      %%T5, %%T2, %%T5, 0x10             ; %%T5 = a0*b1
-        vpxor           %%T6, %%T6, %%T5
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%assign rep_count (%%num_initial_blocks-1)
-%rep rep_count
-
-        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x11
-        vpxor           %%T1, %%T1, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x00
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%endrep
-
-        ;; Record that a reduction is needed
-        mov      r12, 1
-
-        jmp      %%_small_initial_compute_hash
-
-%endif                          ; %if %%num_initial_blocks < 8
-
-%%_small_initial_partial_block:
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;; Handle ghash for a <16B final block
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        ;; In this case if it's a single call to encrypt we can
-        ;; hash all of the data but if it's an init / update / finalize
-        ;; series of call we need to leave the last block if it's
-        ;; less than a full block of data.
-
-	mov	[%%GDATA_CTX + PBlockLen], %%LENGTH
-        vmovdqu [%%GDATA_CTX + PBlockEncKey], reg(i)
-        ;; Handle a partial final block
-        ;;                            GDATA,    KEY,   T1,   T2
-        ;; r13 - length
-        ;; LT16 - indicates type of read and that the buffer is less than 16 bytes long
-        ;;      NOTE: could be replaced with %%LENGTH but at this point
-        ;;      %%LENGTH is always less than 16.
-        ;;      No PLAIN_CYPH_LEN argument available in this macro.
-        ENCRYPT_FINAL_PARTIAL_BLOCK reg(i), %%T1, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, LT16, %%ENC_DEC, %%DATA_OFFSET
-        vpshufb  reg(i), [rel SHUF_MASK]
-
-%ifidn %%INSTANCE_TYPE, multi_call
-%assign i (8-%%num_initial_blocks)
-%assign j (9-%%num_initial_blocks)
-%assign k (%%num_initial_blocks-1)
-%assign last_block_to_hash 1
-%else
-%assign i (8-%%num_initial_blocks)
-%assign j (9-%%num_initial_blocks)
-%assign k (%%num_initial_blocks)
-%assign last_block_to_hash 0
-%endif
-
-%if(%%num_initial_blocks>last_block_to_hash)
-        ;; Record that a reduction is needed
-        mov            r12, 1
-        ;; Hash in AES state
-        vpxor          %%T2, reg(j)
-
-        ;; T2 - incoming AAD hash
-        ;; reg(i) holds ciphertext
-        ;; T5 - hash key
-        ;; T6 - updated xor
-        ;; reg(1)/xmm1 should now be available for tmp use
-        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
-        vpclmulqdq      %%T1, %%T2, %%T5, 0x11             ; %%T4 = a1*b1
-        vpclmulqdq      %%T4, %%T2, %%T5, 0x00             ; %%T4 = a0*b0
-        vpclmulqdq      %%T6, %%T2, %%T5, 0x01             ; %%T6 = a1*b0
-        vpclmulqdq      %%T5, %%T2, %%T5, 0x10             ; %%T5 = a0*b1
-        vpxor           %%T6, %%T6, %%T5
-%else
-        ;; Record that a reduction is not needed -
-        ;; In this case no hashes are computed because there
-        ;; is only one initial block and it is < 16B in length.
-        xor             r12, r12
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%ifidn %%INSTANCE_TYPE, multi_call
-%assign rep_count (%%num_initial_blocks-2)
-%%_multi_call_hash:
-%else
-%assign rep_count (%%num_initial_blocks-1)
-%endif
-
-%if rep_count < 0
-        ;; fix for negative rep_count
-%assign rep_count 0
-%endif
-
-%rep rep_count
-
-        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x11
-        vpxor           %%T1, %%T1, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x00
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%endrep
-
-%%_small_initial_compute_hash:
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;; Ghash reduction
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%if(%%num_initial_blocks=1)
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; We only need to check if a reduction is needed if
-        ;; initial_blocks == 1 and init/update/final is being used.
-        ;; In this case we may just have a partial block, and that
-        ;; gets hashed in finalize.
-        ;; cmp     r12, 0
-        or      r12, r12
-        je      %%_no_reduction_needed
-%endif
-%endif
-
-        vpsrldq %%T3, %%T6, 8          ; shift-R %%T2 2 DWs
-        vpslldq %%T6, %%T6, 8          ; shift-L %%T3 2 DWs
-        vpxor   %%T1, %%T1, %%T3       ; accumulate the results in %%T1:%%T4
-        vpxor   %%T4, %%T6, %%T4
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;; First phase of the reduction
-        vmovdqu         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%T4, 0x01
-        ;; shift-L xmm2 2 DWs
-        vpslldq         %%T2, %%T2, 8
-        vpxor           %%T4, %%T4, %%T2
-
-        ;; First phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;; Second phase of the reduction
-
-        vpclmulqdq      %%T2, %%T3, %%T4, 0x00
-        ;; Shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-        vpsrldq         %%T2, %%T2, 4
-
-        vpclmulqdq      %%T4, %%T3, %%T4, 0x10
-        ;; Shift-L xmm0 1 DW (Shift-L 1-DW to obtain result with no shifts)
-        vpslldq         %%T4, %%T4, 4
-
-        vpxor           %%T4, %%T4, %%T2
-        ;; Second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%T3, %%T1, %%T4
-
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; If using init/update/finalize, we need to xor any partial block data
-        ;; into the hash.
-%if %%num_initial_blocks > 1
-        ;; NOTE: for %%num_initial_blocks = 0 the xor never takes place
-%if %%num_initial_blocks != 8
-        ;; NOTE: for %%num_initial_blocks = 8, %%LENGTH, stored in [PBlockLen] is never zero
-        cmp             qword [%%GDATA_CTX + PBlockLen], 0
-        je              %%_no_partial_block_xor
-%endif                          ; %%num_initial_blocks != 8
-        vpxor           %%T3, %%T3, reg(8)
-%%_no_partial_block_xor:
-%endif                          ; %%num_initial_blocks > 1
-%endif                          ; %%INSTANCE_TYPE, multi_call
-
-%if(%%num_initial_blocks=1)
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; NOTE: %%_no_reduction_needed case only valid for
-        ;;      multi_call with initial_blocks = 1.
-        ;; Look for comment above around '_no_reduction_needed'
-        ;; The jmp below is obsolete as the code will fall through.
-
-        ;; The result is in %%T3
-        jmp             %%_after_reduction
-
-%%_no_reduction_needed:
-        ;; The hash should end up in T3. The only way we should get here is if
-        ;; there is a partial block of data, so xor that into the hash.
-        vpxor            %%T3, %%T2, reg(8)
-%endif                          ; %%INSTANCE_TYPE = multi_call
-%endif                          ; %%num_initial_blocks=1
-
-%%_after_reduction:
-        ;; Final hash is now in T3
-
-%endmacro                       ; INITIAL_BLOCKS_PARTIAL
-
-; encrypt 8 blocks at a time
-; ghash the 8 previously encrypted ciphertext blocks
-; %%GDATA (KEY), %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN are used as pointers only, not modified
-; %%DATA_OFFSET is the data offset value
-%macro  GHASH_8_ENCRYPT_8_PARALLEL 23
-%define %%GDATA                 %1
-%define %%CYPH_PLAIN_OUT        %2
-%define %%PLAIN_CYPH_IN         %3
-%define %%DATA_OFFSET           %4
-%define %%T1    %5
-%define %%T2    %6
-%define %%T3    %7
-%define %%T4    %8
-%define %%T5    %9
-%define %%T6    %10
-%define %%CTR   %11
-%define %%XMM1  %12
-%define %%XMM2  %13
-%define %%XMM3  %14
-%define %%XMM4  %15
-%define %%XMM5  %16
-%define %%XMM6  %17
-%define %%XMM7  %18
-%define %%XMM8  %19
-%define %%T7    %20
-%define %%loop_idx      %21
-%define %%ENC_DEC       %22
-%define %%FULL_PARTIAL  %23
-
-        vmovdqa %%T2, %%XMM1
-        vmovdqu [rsp + TMP2], %%XMM2
-        vmovdqu [rsp + TMP3], %%XMM3
-        vmovdqu [rsp + TMP4], %%XMM4
-        vmovdqu [rsp + TMP5], %%XMM5
-        vmovdqu [rsp + TMP6], %%XMM6
-        vmovdqu [rsp + TMP7], %%XMM7
-        vmovdqu [rsp + TMP8], %%XMM8
-
-%ifidn %%loop_idx, in_order
-                vpaddd  %%XMM1, %%CTR,  [rel ONE]           ; INCR CNT
-                vmovdqu %%T5, [rel TWO]
-                vpaddd  %%XMM2, %%CTR, %%T5
-                vpaddd  %%XMM3, %%XMM1, %%T5
-                vpaddd  %%XMM4, %%XMM2, %%T5
-                vpaddd  %%XMM5, %%XMM3, %%T5
-                vpaddd  %%XMM6, %%XMM4, %%T5
-                vpaddd  %%XMM7, %%XMM5, %%T5
-                vpaddd  %%XMM8, %%XMM6, %%T5
-                vmovdqa %%CTR, %%XMM8
-
-                vmovdqu %%T5, [rel SHUF_MASK]
-                vpshufb %%XMM1, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM2, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM3, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM4, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM5, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM6, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM7, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM8, %%T5             ; perform a 16Byte swap
-%else
-                vpaddd  %%XMM1, %%CTR,  [rel ONEf]          ; INCR CNT
-                vmovdqu %%T5, [rel TWOf]
-                vpaddd  %%XMM2, %%CTR,  %%T5
-                vpaddd  %%XMM3, %%XMM1, %%T5
-                vpaddd  %%XMM4, %%XMM2, %%T5
-                vpaddd  %%XMM5, %%XMM3, %%T5
-                vpaddd  %%XMM6, %%XMM4, %%T5
-                vpaddd  %%XMM7, %%XMM5, %%T5
-                vpaddd  %%XMM8, %%XMM6, %%T5
-                vmovdqa %%CTR, %%XMM8
-%endif
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                vmovdqu %%T1, [%%GDATA + 16*0]
-                vpxor   %%XMM1, %%XMM1, %%T1
-                vpxor   %%XMM2, %%XMM2, %%T1
-                vpxor   %%XMM3, %%XMM3, %%T1
-                vpxor   %%XMM4, %%XMM4, %%T1
-                vpxor   %%XMM5, %%XMM5, %%T1
-                vpxor   %%XMM6, %%XMM6, %%T1
-                vpxor   %%XMM7, %%XMM7, %%T1
-                vpxor   %%XMM8, %%XMM8, %%T1
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                vmovdqu %%T1, [%%GDATA + 16*1]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-                vmovdqu %%T1, [%%GDATA + 16*2]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_8]
-        vpclmulqdq      %%T4, %%T2, %%T5, 0x11                  ; %%T4 = a1*b1
-        vpclmulqdq      %%T7, %%T2, %%T5, 0x00                  ; %%T7 = a0*b0
-        vpclmulqdq      %%T6, %%T2, %%T5, 0x01                  ; %%T6 = a1*b0
-        vpclmulqdq      %%T5, %%T2, %%T5, 0x10                  ; %%T5 = a0*b1
-        vpxor           %%T6, %%T6, %%T5
-
-                vmovdqu %%T1, [%%GDATA + 16*3]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP2]
-        vmovdqu         %%T5, [%%GDATA + HashKey_7]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*4]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vmovdqu         %%T1, [rsp + TMP3]
-        vmovdqu         %%T5, [%%GDATA + HashKey_6]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*5]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP4]
-        vmovdqu         %%T5, [%%GDATA + HashKey_5]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*6]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP5]
-        vmovdqu         %%T5, [%%GDATA + HashKey_4]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*7]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP6]
-        vmovdqu         %%T5, [%%GDATA + HashKey_3]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*8]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP7]
-        vmovdqu         %%T5, [%%GDATA + HashKey_2]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                vmovdqu %%T5, [%%GDATA + 16*9]
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-        vmovdqu         %%T1, [rsp + TMP8]
-        vmovdqu         %%T5, [%%GDATA + HashKey]
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T1, %%T4, %%T3
-
-                vmovdqu %%T5, [%%GDATA + 16*10]
- %ifndef GCM128_MODE            ; GCM192 or GCM256
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-                vmovdqu %%T5, [%%GDATA + 16*11]
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-                vmovdqu %%T5, [%%GDATA + 16*12]
-%endif
-%ifdef GCM256_MODE
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-                vmovdqu %%T5, [%%GDATA + 16*13]
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-                vmovdqu %%T5, [%%GDATA + 16*14]
-%endif                          ; GCM256
-
-%assign i 0
-%assign j 1
-%rep 8
-
-        ;; SNP TBD: This is pretty ugly - consider whether just XORing the
-        ;; data in after vaesenclast is simpler and performant. Would
-        ;; also have to ripple it through partial block and ghash_mul_8.
-%ifidn %%FULL_PARTIAL, full
-    %ifdef  NT_LD
-        VXLDR   %%T2, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-        vpxor   %%T2, %%T2, %%T5
-    %else
-        vpxor   %%T2, %%T5, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-    %endif
-
-    %ifidn %%ENC_DEC, ENC
-        vaesenclast     reg(j), reg(j), %%T2
-    %else
-        vaesenclast     %%T3, reg(j), %%T2
-        vpxor   reg(j), %%T2, %%T5
-        VXSTR [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*i], %%T3
-    %endif
-
-%else
-    ; Don't read the final data during partial block processing
-    %ifdef  NT_LD
-        %if (i<7)
-            VXLDR   %%T2, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-            vpxor   %%T2, %%T2, %%T5
-        %else
-            ;; Stage the key directly in T2 rather than hash it with plaintext
-            vmovdqu %%T2, %%T5
-        %endif
-    %else
-        %if (i<7)
-            vpxor   %%T2, %%T5, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-        %else
-            ;; Stage the key directly in T2 rather than hash it with plaintext
-            vmovdqu %%T2, %%T5
-        %endif
-    %endif
-
-    %ifidn %%ENC_DEC, ENC
-        vaesenclast     reg(j), reg(j), %%T2
-    %else
-        %if (i<7)
-            vaesenclast     %%T3, reg(j), %%T2
-            vpxor   reg(j), %%T2, %%T5
-            ;; Do not read the data since it could fault
-            VXSTR [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*i], %%T3
-        %else
-            vaesenclast     reg(j), reg(j), %%T2
-        %endif
-    %endif
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%endrep
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        vpslldq %%T3, %%T6, 8                                   ; shift-L %%T3 2 DWs
-        vpsrldq %%T6, %%T6, 8                                   ; shift-R %%T2 2 DWs
-        vpxor   %%T7, %%T7, %%T3
-        vpxor   %%T1, %%T1, %%T6                                ; accumulate the results in %%T1:%%T7
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqu         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x01
-        vpslldq         %%T2, %%T2, 8                           ; shift-L xmm2 2 DWs
-
-        vpxor           %%T7, %%T7, %%T2                        ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-    %ifidn %%ENC_DEC, ENC
-        ; Write to the Ciphertext buffer
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*0], %%XMM1
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*1], %%XMM2
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*2], %%XMM3
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*3], %%XMM4
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*4], %%XMM5
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*5], %%XMM6
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*6], %%XMM7
-        %ifidn %%FULL_PARTIAL, full
-            ;; Avoid writing past the buffer if handling a partial block
-            VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*7], %%XMM8
-        %endif
-    %endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x00
-        vpsrldq         %%T2, %%T2, 4                                   ; shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%T4, %%T3, %%T7, 0x10
-        vpslldq         %%T4, %%T4, 4                                   ; shift-L xmm0 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%T4, %%T4, %%T2                                ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%T1, %%T1, %%T4                                ; the result is in %%T1
-
-                vpshufb %%XMM1, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM2, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM3, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM4, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM5, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM6, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM7, [rel SHUF_MASK]             ; perform a 16Byte swap
-        vpshufb %%XMM8, [rel SHUF_MASK]             ; perform a 16Byte swap
-
-        vpxor   %%XMM1, %%T1
-
-%endmacro                       ; GHASH_8_ENCRYPT_8_PARALLEL
-
-; GHASH the last 4 ciphertext blocks.
-%macro  GHASH_LAST_8 16
-%define %%GDATA %1
-%define %%T1    %2
-%define %%T2    %3
-%define %%T3    %4
-%define %%T4    %5
-%define %%T5    %6
-%define %%T6    %7
-%define %%T7    %8
-%define %%XMM1  %9
-%define %%XMM2  %10
-%define %%XMM3  %11
-%define %%XMM4  %12
-%define %%XMM5  %13
-%define %%XMM6  %14
-%define %%XMM7  %15
-%define %%XMM8  %16
-
-        ;; Karatsuba Method
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_8]
-
-        vpshufd         %%T2, %%XMM1, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM1
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T6, %%XMM1, %%T5, 0x11
-        vpclmulqdq      %%T7, %%XMM1, %%T5, 0x00
-
-        vpclmulqdq      %%XMM1, %%T2, %%T3, 0x00
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_7]
-        vpshufd         %%T2, %%XMM2, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM2
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_6]
-        vpshufd         %%T2, %%XMM3, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM3
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_5]
-        vpshufd         %%T2, %%XMM4, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM4
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_4]
-        vpshufd         %%T2, %%XMM5, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM5
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_3]
-        vpshufd         %%T2, %%XMM6, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM6
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_2]
-        vpshufd         %%T2, %%XMM7, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM7
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey]
-        vpshufd         %%T2, %%XMM8, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM8
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM8, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM8, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-        vpxor           %%XMM1, %%XMM1, %%T6
-        vpxor           %%T2, %%XMM1, %%T7
-
-        vpslldq %%T4, %%T2, 8
-        vpsrldq %%T2, %%T2, 8
-
-        vpxor   %%T7, %%T7, %%T4
-        vpxor   %%T6, %%T6, %%T2                               ; <%%T6:%%T7> holds the result of the accumulated carry-less multiplications
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqu         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x01
-        vpslldq         %%T2, %%T2, 8                           ; shift-L xmm2 2 DWs
-
-        vpxor           %%T7, %%T7, %%T2                        ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        ;second phase of the reduction
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x00
-        vpsrldq         %%T2, %%T2, 4                           ; shift-R %%T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%T4, %%T3, %%T7, 0x10
-        vpslldq         %%T4, %%T4, 4                           ; shift-L %%T4 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%T4, %%T4, %%T2                        ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%T6, %%T6, %%T4                        ; the result is in %%T6
-%endmacro
-
-; GHASH the last 4 ciphertext blocks.
-%macro  GHASH_LAST_7 15
-%define %%GDATA %1
-%define %%T1    %2
-%define %%T2    %3
-%define %%T3    %4
-%define %%T4    %5
-%define %%T5    %6
-%define %%T6    %7
-%define %%T7    %8
-%define %%XMM1  %9
-%define %%XMM2  %10
-%define %%XMM3  %11
-%define %%XMM4  %12
-%define %%XMM5  %13
-%define %%XMM6  %14
-%define %%XMM7  %15
-
-        ;; Karatsuba Method
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_7]
-
-        vpshufd         %%T2, %%XMM1, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM1
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T6, %%XMM1, %%T5, 0x11
-        vpclmulqdq      %%T7, %%XMM1, %%T5, 0x00
-
-        vpclmulqdq      %%XMM1, %%T2, %%T3, 0x00
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_6]
-        vpshufd         %%T2, %%XMM2, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM2
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_5]
-        vpshufd         %%T2, %%XMM3, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM3
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_4]
-        vpshufd         %%T2, %%XMM4, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM4
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_3]
-        vpshufd         %%T2, %%XMM5, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM5
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_2]
-        vpshufd         %%T2, %%XMM6, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM6
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_1]
-        vpshufd         %%T2, %%XMM7, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM7
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vpxor           %%XMM1, %%XMM1, %%T6
-        vpxor           %%T2, %%XMM1, %%T7
-
-        vpslldq %%T4, %%T2, 8
-        vpsrldq %%T2, %%T2, 8
-
-        vpxor   %%T7, %%T7, %%T4
-        vpxor   %%T6, %%T6, %%T2                               ; <%%T6:%%T7> holds the result of the accumulated carry-less multiplications
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqu         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x01
-        vpslldq         %%T2, %%T2, 8                           ; shift-L xmm2 2 DWs
-
-        vpxor           %%T7, %%T7, %%T2                        ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        ;second phase of the reduction
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x00
-        vpsrldq         %%T2, %%T2, 4                           ; shift-R %%T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%T4, %%T3, %%T7, 0x10
-        vpslldq         %%T4, %%T4, 4                           ; shift-L %%T4 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%T4, %%T4, %%T2                        ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%T6, %%T6, %%T4                        ; the result is in %%T6
-%endmacro
-
-;;; Handle encryption of the final partial block
-;;; IN:
-;;;   r13  - Number of bytes to read
-;;; MODIFIES:
-;;;   KEY  - Key for encrypting the partial block
-;;; SMASHES:
-;;;   rax, T1
-;;; Note:
-;;;   PLAIN_CYPH_LEN is unused at this stage. Previously:
-;;;     it was used  to determine if buffer is big enough to do
-;;;     a 16 byte read & shift.
-;;;     'LT16' is passed here only if buffer is known to be smaller
-;;;     than 16 bytes.
-;;;     Any other value passed here will result in 16 byte read
-;;;     code path.
-%macro  ENCRYPT_FINAL_PARTIAL_BLOCK 7
-%define %%KEY             %1
-%define %%T1              %2
-%define %%CYPH_PLAIN_OUT  %3
-%define %%PLAIN_CYPH_IN   %4
-%define %%PLAIN_CYPH_LEN  %5
-%define %%ENC_DEC         %6
-%define %%DATA_OFFSET     %7
-
-        ;; %%PLAIN_CYPH_IN + %%DATA_OFFSET
-        ;;               - input data address
-        ;; r13           - input data length
-        ;; rax           - temp registers
-        ;; out:
-        ;; T1            - packed output
-        ;; k1            - valid byte mask
-        READ_SMALL_DATA_INPUT_AVX512   %%T1, {%%PLAIN_CYPH_IN + %%DATA_OFFSET}, r13, rax, k1
-
-        ;; At this point T1 contains the partial block data
-        ;; Plaintext XOR E(K, Yn)
-        vpxorq          %%KEY, %%KEY, %%T1
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;; Output r13 Bytes
-        vmovdqu8        [%%CYPH_PLAIN_OUT + %%DATA_OFFSET]{k1}, %%KEY
-
-%ifidn  %%ENC_DEC, DEC
-        ;; If decrypt, restore the ciphertext into %%KEY
-        vmovdqa64       %%KEY, %%T1
-%else
-        vmovdqu8        %%KEY{k1}{z}, %%KEY
-%endif
-%endmacro                       ; ENCRYPT_FINAL_PARTIAL_BLOCK
-
-; Encryption of a single block
-%macro  ENCRYPT_SINGLE_BLOCK 2
-%define %%GDATA %1
-%define %%XMM0  %2
-
-                vpxor    %%XMM0, %%XMM0, [%%GDATA+16*0]
-%assign i 1
-%rep NROUNDS
-                vaesenc  %%XMM0, [%%GDATA+16*i]
-%assign i (i+1)
-%endrep
-                vaesenclast      %%XMM0, [%%GDATA+16*i]
-%endmacro
-
-;; Start of Stack Setup
-
-%macro FUNC_SAVE 0-1
-	;; Required for Update/GCM_ENC
-        mov     rax, rsp
-
-%if %0 == 0
-	sub     rsp, VARIABLE_OFFSET
-%else
-%ifidni %1, alloc_context
-        sub     rsp, VARIABLE_OFFSET + CONTEXT_SIZE
-%endif
-%endif
-	and     rsp, ~63
-
-        mov     [rsp + GP_OFFSET + 0*8], rax ; original rsp pointer
-        mov     [rsp + GP_OFFSET + 1*8], r12
-        mov     [rsp + GP_OFFSET + 2*8], r13
-        mov     [rsp + GP_OFFSET + 3*8], r14
-        mov     [rsp + GP_OFFSET + 4*8], r15
-        mov     r14, rax
-
-%ifidn __OUTPUT_FORMAT__, win64
-        ; xmm6:xmm15 need to be maintained for Windows
-        vmovdqu [rsp + LOCAL_STORAGE + 0*16], xmm6
-        vmovdqu [rsp + LOCAL_STORAGE + 1*16], xmm7
-        vmovdqu [rsp + LOCAL_STORAGE + 2*16], xmm8
-        vmovdqu [rsp + LOCAL_STORAGE + 3*16], xmm9
-        vmovdqu [rsp + LOCAL_STORAGE + 4*16], xmm10
-        vmovdqu [rsp + LOCAL_STORAGE + 5*16], xmm11
-        vmovdqu [rsp + LOCAL_STORAGE + 6*16], xmm12
-        vmovdqu [rsp + LOCAL_STORAGE + 7*16], xmm13
-        vmovdqu [rsp + LOCAL_STORAGE + 8*16], xmm14
-        vmovdqu [rsp + LOCAL_STORAGE + 9*16], xmm15
-%endif
-%endmacro
-
-%macro FUNC_RESTORE 0
-
-%ifdef SAFE_DATA
-        clear_scratch_xmms_avx_asm
-%endif
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm15, [rsp + LOCAL_STORAGE + 9*16]
-        vmovdqu xmm14, [rsp + LOCAL_STORAGE + 8*16]
-        vmovdqu xmm13, [rsp + LOCAL_STORAGE + 7*16]
-        vmovdqu xmm12, [rsp + LOCAL_STORAGE + 6*16]
-        vmovdqu xmm11, [rsp + LOCAL_STORAGE + 5*16]
-        vmovdqu xmm10, [rsp + LOCAL_STORAGE + 4*16]
-        vmovdqu xmm9,  [rsp + LOCAL_STORAGE + 3*16]
-        vmovdqu xmm8,  [rsp + LOCAL_STORAGE + 2*16]
-        vmovdqu xmm7,  [rsp + LOCAL_STORAGE + 1*16]
-        vmovdqu xmm6,  [rsp + LOCAL_STORAGE + 0*16]
-%endif
-
-        ;; Required for Update/GCM_ENC
-        mov     r12, [rsp + GP_OFFSET + 1*8]
-        mov     r13, [rsp + GP_OFFSET + 2*8]
-        mov     r14, [rsp + GP_OFFSET + 3*8]
-        mov     r15, [rsp + GP_OFFSET + 4*8]
-        mov     rsp, [rsp + GP_OFFSET + 0*8]
-%endmacro
-
-%macro CALC_J0 13
-%define %%KEY           %1 ;; [in] Pointer to GCM KEY structure
-%define %%IV            %2 ;; [in] Pointer to IV
-%define %%IV_LEN        %3 ;; [in] IV length
-%define %%J0            %4 ;; [out] XMM reg to contain J0
-%define %%TMP0          %5 ;; [clobbered] Temporary GP reg
-%define %%TMP1          %6 ;; [clobbered] Temporary GP reg
-%define %%TMP2          %7 ;; [clobbered] Temporary GP reg
-%define %%XTMP0         %8 ;; [clobbered] Temporary XMM reg
-%define %%XTMP1         %9 ;; [clobbered] Temporary XMM reg
-%define %%XTMP2         %10 ;; [clobbered] Temporary XMM reg
-%define %%XTMP3         %11 ;; [clobbered] Temporary XMM reg
-%define %%XTMP4         %12 ;; [clobbered] Temporary XMM reg
-%define %%XTMP5         %13 ;; [clobbered] Temporary XMM reg
-
-        ;; J0 = GHASH(IV || 0s+64 || len(IV)64)
-        ;; s = 16 * RoundUp(len(IV)/16) -  len(IV) */
-
-        ;; Calculate GHASH of (IV || 0s)
-        vpxor   %%J0, %%J0
-        CALC_AAD_HASH %%IV, %%IV_LEN, %%J0, %%KEY, %%XTMP0, %%XTMP1, %%XTMP2, \
-                      %%XTMP3, %%XTMP4, %%XTMP5, %%TMP0, %%TMP1, %%TMP2
-
-        ;; Calculate GHASH of last 16-byte block (0 || len(IV)64)
-        vmovdqu %%XTMP0, [%%KEY + HashKey]
-        mov     %%TMP2, %%IV_LEN
-        shl     %%TMP2, 3 ;; IV length in bits
-        vmovq   %%XTMP1, %%TMP2
-        vpxor   %%J0, %%XTMP1
-        GHASH_MUL %%J0, %%XTMP0, %%XTMP1, %%XTMP2, %%XTMP3, %%XTMP4, %%XTMP5
-
-        vpshufb %%J0, [rel SHUF_MASK] ; perform a 16Byte swap
-%endmacro
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GCM_INIT initializes a gcm_context_data struct to prepare for encoding/decoding.
-; Input: gcm_key_data * (GDATA_KEY), gcm_context_data *(GDATA_CTX), IV, IV_LEN
-; Additional Authentication data (A_IN), Additional Data length (A_LEN).
-; Output: Updated GDATA_CTX with the hash of A_IN (AadHash) and initialized other parts of GDATA_CTX.
-; Clobbers rax, r10-r13, and xmm0-xmm6
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  GCM_INIT        8-9
-%define %%GDATA_KEY     %1      ; [in] GCM expanded keys pointer
-%define %%GDATA_CTX     %2      ; [in] GCM context pointer
-%define %%IV            %3      ; [in] IV pointer
-%define %%A_IN          %4      ; [in] AAD pointer
-%define %%A_LEN         %5      ; [in] AAD length in bytes
-%define %%GPR1          %6      ; temp GPR
-%define %%GPR2          %7      ; temp GPR
-%define %%GPR3          %8      ; temp GPR
-%define %%IV_LEN        %9      ; [in] IV length
-
-%define %%AAD_HASH      xmm14
-
-        vpxor   %%AAD_HASH, %%AAD_HASH
-        CALC_AAD_HASH %%A_IN, %%A_LEN, %%AAD_HASH, %%GDATA_KEY, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, %%GPR1, %%GPR2, %%GPR3
-
-        mov     %%GPR1, %%A_LEN
-        vmovdqu [%%GDATA_CTX + AadHash], %%AAD_HASH         ; ctx_data.aad hash = aad_hash
-        mov     [%%GDATA_CTX + AadLen], %%GPR1              ; ctx_data.aad_length = aad_length
-
-        xor     %%GPR1, %%GPR1
-        mov     [%%GDATA_CTX + InLen], %%GPR1               ; ctx_data.in_length = 0
-        mov     [%%GDATA_CTX + PBlockLen], %%GPR1           ; ctx_data.partial_block_length = 0
-
-%if %0 == 9 ;; IV is different than 12 bytes
-        CALC_J0 %%GDATA_KEY, %%IV, %%IV_LEN, xmm2, r10, r11, r12, xmm0, xmm1, \
-                xmm3, xmm4, xmm5, xmm6
-%else ;; IV is 12 bytes
-        ;; read 12 IV bytes and pad with 0x00000001
-        mov     %%GPR2, %%IV
-        vmovd   xmm3, [%%GPR2 + 8]
-        vpslldq xmm3, 8
-        vmovq   xmm2, [%%GPR2]
-        vmovdqa xmm4, [rel ONEf]
-        vpternlogq xmm2, xmm3, xmm4, 0xfe     ; xmm2 = xmm2 or xmm3 or xmm4
-%endif
-        vmovdqu [%%GDATA_CTX + OrigIV], xmm2                ; ctx_data.orig_IV = iv
-
-        ;; store IV as counter in LE format
-        vpshufb xmm2, [rel SHUF_MASK]
-        vmovdqu [%%GDATA_CTX + CurCount], xmm2              ; ctx_data.current_counter = iv
-%endmacro
-
-%macro  GCM_ENC_DEC_SMALL   12
-%define %%GDATA_KEY         %1
-%define %%GDATA_CTX         %2
-%define %%CYPH_PLAIN_OUT    %3
-%define %%PLAIN_CYPH_IN     %4
-%define %%PLAIN_CYPH_LEN    %5
-%define %%ENC_DEC           %6
-%define %%DATA_OFFSET       %7
-%define %%LENGTH            %8  ; assumed r13
-%define %%NUM_BLOCKS        %9
-%define %%CTR               %10 ; assumed xmm9
-%define %%HASH_OUT          %11 ; assumed xmm14
-%define %%INSTANCE_TYPE     %12
-
-        ;; NOTE: the check below is obsolete in current implementation. The check is already done in GCM_ENC_DEC.
-        ;; cmp     %%NUM_BLOCKS, 0
-        ;; je      %%_small_initial_blocks_encrypted
-        cmp     %%NUM_BLOCKS, 8
-        je      %%_small_initial_num_blocks_is_8
-        cmp     %%NUM_BLOCKS, 7
-        je      %%_small_initial_num_blocks_is_7
-        cmp     %%NUM_BLOCKS, 6
-        je      %%_small_initial_num_blocks_is_6
-        cmp     %%NUM_BLOCKS, 5
-        je      %%_small_initial_num_blocks_is_5
-        cmp     %%NUM_BLOCKS, 4
-        je      %%_small_initial_num_blocks_is_4
-        cmp     %%NUM_BLOCKS, 3
-        je      %%_small_initial_num_blocks_is_3
-        cmp     %%NUM_BLOCKS, 2
-        je      %%_small_initial_num_blocks_is_2
-
-        jmp     %%_small_initial_num_blocks_is_1
-
-%%_small_initial_num_blocks_is_8:
-        ;; r13   - %%LENGTH
-        ;; xmm12 - T1
-        ;; xmm13 - T2
-        ;; xmm14 - T3   - AAD HASH OUT when not producing 8 AES keys
-        ;; xmm15 - T4
-        ;; xmm11 - T5
-        ;; xmm9  - CTR
-        ;; xmm1  - XMM1 - Cipher + Hash when producing 8 AES keys
-        ;; xmm2  - XMM2
-        ;; xmm3  - XMM3
-        ;; xmm4  - XMM4
-        ;; xmm5  - XMM5
-        ;; xmm6  - XMM6
-        ;; xmm7  - XMM7
-        ;; xmm8  - XMM8 - AAD HASH IN
-        ;; xmm10 - T6
-        ;; xmm0  - T_key
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
-                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 8, \
-                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
-                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
-                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_7:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
-                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 7, \
-                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
-                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
-                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_6:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
-                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 6, \
-                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
-                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
-                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_5:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
-                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 5, \
-                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
-                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
-                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_4:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
-                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 4, \
-                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
-                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
-                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_3:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
-                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 3, \
-                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
-                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
-                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_2:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
-                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 2, \
-                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
-                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
-                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_1:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
-                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 1, \
-                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
-                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
-                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-%%_small_initial_blocks_encrypted:
-
-%endmacro                       ; GCM_ENC_DEC_SMALL
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GCM_ENC_DEC Encodes/Decodes given data. Assumes that the passed gcm_context_data struct
-; has been initialized by GCM_INIT
-; Requires the input data be at least 1 byte long because of READ_SMALL_INPUT_DATA.
-; Input: gcm_key_data struct* (GDATA_KEY), gcm_context_data *(GDATA_CTX), input text (PLAIN_CYPH_IN),
-; input text length (PLAIN_CYPH_LEN) and whether encoding or decoding (ENC_DEC).
-; Output: A cypher of the given plain text (CYPH_PLAIN_OUT), and updated GDATA_CTX
-; Clobbers rax, r10-r15, and xmm0-xmm15
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  GCM_ENC_DEC         7
-%define %%GDATA_KEY         %1
-%define %%GDATA_CTX         %2
-%define %%CYPH_PLAIN_OUT    %3
-%define %%PLAIN_CYPH_IN     %4
-%define %%PLAIN_CYPH_LEN    %5
-%define %%ENC_DEC           %6
-%define %%INSTANCE_TYPE     %7
-%define %%DATA_OFFSET       r11
-
-; Macro flow:
-; calculate the number of 16byte blocks in the message
-; process (number of 16byte blocks) mod 8 '%%_initial_num_blocks_is_# .. %%_initial_blocks_encrypted'
-; process 8 16 byte blocks at a time until all are done '%%_encrypt_by_8_new .. %%_eight_cipher_left'
-; if there is a block of less than 16 bytes process it '%%_zero_cipher_left .. %%_multiple_of_16_bytes'
-
-%ifidn __OUTPUT_FORMAT__, win64
-        cmp     %%PLAIN_CYPH_LEN, 0
-%else
-        or      %%PLAIN_CYPH_LEN, %%PLAIN_CYPH_LEN
-%endif
-        je      %%_enc_dec_done
-
-        xor     %%DATA_OFFSET, %%DATA_OFFSET
-        ;; Update length of data processed
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_CYPH_LEN
-       	add     [%%GDATA_CTX + InLen], rax
-%else
-        add    [%%GDATA_CTX + InLen], %%PLAIN_CYPH_LEN
-%endif
-        vmovdqu xmm13, [%%GDATA_KEY + HashKey]
-        vmovdqu xmm8, [%%GDATA_CTX + AadHash]
-
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; NOTE: partial block processing makes only sense for multi_call here.
-        ;; Used for the update flow - if there was a previous partial
-        ;; block fill the remaining bytes here.
-        PARTIAL_BLOCK %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, %%DATA_OFFSET, xmm8, xmm13, %%ENC_DEC
-%endif
-
-        ;;  lift CTR set from initial_blocks to here
-%ifidn %%INSTANCE_TYPE, single_call
-        vmovdqu xmm9, xmm2
-%else
-        vmovdqu xmm9, [%%GDATA_CTX + CurCount]
-%endif
-
-        ;; Save the amount of data left to process in r10
-        mov     r13, %%PLAIN_CYPH_LEN
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; NOTE: %%DATA_OFFSET is zero in single_call case.
-        ;;      Consequently PLAIN_CYPH_LEN will never be zero after
-        ;;      %%DATA_OFFSET subtraction below.
-        sub     r13, %%DATA_OFFSET
-
-        ;; There may be no more data if it was consumed in the partial block.
-        cmp     r13, 0
-        je      %%_enc_dec_done
-%endif                          ; %%INSTANCE_TYPE, multi_call
-        mov     r10, r13
-
-        ;; Determine how many blocks to process in INITIAL
-        mov     r12, r13
-        shr     r12, 4
-        and     r12, 7
-
-        ;; Process one additional block in INITIAL if there is a partial block
-        and     r10, 0xf
-        blsmsk  r10, r10    ; Set CF if zero
-        cmc                 ; Flip CF
-        adc     r12, 0x0    ; Process an additional INITIAL block if CF set
-
-        ;;      Less than 127B will be handled by the small message code, which
-        ;;      can process up to 7 16B blocks.
-        cmp     r13, 128
-        jge     %%_large_message_path
-
-        GCM_ENC_DEC_SMALL %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, %%ENC_DEC, %%DATA_OFFSET, r13, r12, xmm9, xmm14, %%INSTANCE_TYPE
-        jmp     %%_ghash_done
-
-%%_large_message_path:
-        and     r12, 0x7    ; Still, don't allow 8 INITIAL blocks since this will
-                            ; can be handled by the x8 partial loop.
-
-        cmp     r12, 0
-        je      %%_initial_num_blocks_is_0
-        cmp     r12, 7
-        je      %%_initial_num_blocks_is_7
-        cmp     r12, 6
-        je      %%_initial_num_blocks_is_6
-        cmp     r12, 5
-        je      %%_initial_num_blocks_is_5
-        cmp     r12, 4
-        je      %%_initial_num_blocks_is_4
-        cmp     r12, 3
-        je      %%_initial_num_blocks_is_3
-        cmp     r12, 2
-        je      %%_initial_num_blocks_is_2
-
-        jmp     %%_initial_num_blocks_is_1
-
-%%_initial_num_blocks_is_7:
-        ;; r13   - %%LENGTH
-        ;; xmm12 - T1
-        ;; xmm13 - T2
-        ;; xmm14 - T3   - AAD HASH OUT when not producing 8 AES keys
-        ;; xmm15 - T4
-        ;; xmm11 - T5
-        ;; xmm9  - CTR
-        ;; xmm1  - XMM1 - Cipher + Hash when producing 8 AES keys
-        ;; xmm2  - XMM2
-        ;; xmm3  - XMM3
-        ;; xmm4  - XMM4
-        ;; xmm5  - XMM5
-        ;; xmm6  - XMM6
-        ;; xmm7  - XMM7
-        ;; xmm8  - XMM8 - AAD HASH IN
-        ;; xmm10 - T6
-        ;; xmm0  - T_key
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 7, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_6:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 6, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_5:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 5, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_4:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 4, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_3:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 3, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_2:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 2, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_1:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 1, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_0:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 0, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-
-%%_initial_blocks_encrypted:
-        ;; The entire message was encrypted processed in initial and now need to be hashed
-        cmp     r13, 0
-        je      %%_encrypt_done
-
-        ;; Encrypt the final <16 byte (partial) block, then hash
-        cmp     r13, 16
-        jl      %%_encrypt_final_partial
-
-        ;; Process 7 full blocks plus a partial block
-        cmp     r13, 128
-        jl      %%_encrypt_by_8_partial
-
-%%_encrypt_by_8_parallel:
-        ;; in_order vs. out_order is an optimization to increment the counter without shuffling
-        ;; it back into little endian. r15d keeps track of when we need to increent in order so
-        ;; that the carry is handled correctly.
-        vmovd   r15d, xmm9
-        and     r15d, 255
-        vpshufb xmm9, [rel SHUF_MASK]
-
-%%_encrypt_by_8_new:
-        cmp     r15d, 255-8
-        jg      %%_encrypt_by_8
-
-        ;; xmm0  - T1
-        ;; xmm10 - T2
-        ;; xmm11 - T3
-        ;; xmm12 - T4
-        ;; xmm13 - T5
-        ;; xmm14 - T6
-        ;; xmm9  - CTR
-        ;; xmm1  - XMM1
-        ;; xmm2  - XMM2
-        ;; xmm3  - XMM3
-        ;; xmm4  - XMM4
-        ;; xmm5  - XMM5
-        ;; xmm6  - XMM6
-        ;; xmm7  - XMM7
-        ;; xmm8  - XMM8
-        ;; xmm15 - T7
-        add     r15b, 8
-        GHASH_8_ENCRYPT_8_PARALLEL  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, out_order, %%ENC_DEC, full
-        add     %%DATA_OFFSET, 128
-        sub     r13, 128
-        cmp     r13, 128
-        jge     %%_encrypt_by_8_new
-
-        vpshufb xmm9, [rel SHUF_MASK]
-        jmp     %%_encrypt_by_8_parallel_done
-
-%%_encrypt_by_8:
-        vpshufb xmm9, [rel SHUF_MASK]
-        add     r15b, 8
-        GHASH_8_ENCRYPT_8_PARALLEL  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, in_order, %%ENC_DEC, full
-        vpshufb  xmm9, [rel SHUF_MASK]
-        add     %%DATA_OFFSET, 128
-        sub     r13, 128
-        cmp     r13, 128
-        jge     %%_encrypt_by_8_new
-        vpshufb  xmm9, [rel SHUF_MASK]
-
-%%_encrypt_by_8_parallel_done:
-        ;; Test to see if we need a by 8 with partial block. At this point
-        ;; bytes remaining should be either zero or between 113-127.
-        cmp     r13, 0
-        je      %%_encrypt_done
-
-%%_encrypt_by_8_partial:
-        ;; Shuffle needed to align key for partial block xor. out_order
-        ;; is a little faster because it avoids extra shuffles.
-        ;; TBD: Might need to account for when we don't have room to increment the counter.
-
-        ;; Process parallel buffers with a final partial block.
-        GHASH_8_ENCRYPT_8_PARALLEL  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, in_order, %%ENC_DEC, partial
-
-        add     %%DATA_OFFSET, 128-16
-        sub     r13, 128-16
-
-%%_encrypt_final_partial:
-
-        vpshufb  xmm8, [rel SHUF_MASK]
-        mov     [%%GDATA_CTX + PBlockLen], r13
-        vmovdqu [%%GDATA_CTX + PBlockEncKey], xmm8
-
-        ;; xmm8  - Final encrypted counter - need to hash with partial or full block ciphertext
-        ;;                            GDATA,  KEY,   T1,    T2
-        ENCRYPT_FINAL_PARTIAL_BLOCK xmm8, xmm0, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, %%ENC_DEC, %%DATA_OFFSET
-
-        vpshufb  xmm8, [rel SHUF_MASK]
-
-%%_encrypt_done:
-
-        ;; Mapping to macro parameters
-        ;; IN:
-        ;;   xmm9 contains the counter
-        ;;   xmm1-xmm8 contain the xor'd ciphertext
-        ;; OUT:
-        ;;   xmm14 contains the final hash
-        ;;             GDATA,   T1,    T2,    T3,    T4,    T5,    T6,    T7, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8
-%ifidn %%INSTANCE_TYPE, multi_call
-        mov     r13, [%%GDATA_CTX + PBlockLen]
-        cmp     r13, 0
-        jz      %%_hash_last_8
-        GHASH_LAST_7 %%GDATA_KEY, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7
-        ;; XOR the partial word into the hash
-        vpxor   xmm14, xmm14, xmm8
-        jmp     %%_ghash_done
-%endif
-%%_hash_last_8:
-        GHASH_LAST_8 %%GDATA_KEY, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8
-
-%%_ghash_done:
-        vmovdqu [%%GDATA_CTX + CurCount], xmm9  ; my_ctx_data.current_counter = xmm9
-        vmovdqu [%%GDATA_CTX + AadHash], xmm14      ; my_ctx_data.aad hash = xmm14
-
-%%_enc_dec_done:
-
-%endmacro                       ; GCM_ENC_DEC
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GCM_COMPLETE Finishes Encryption/Decryption of last partial block after GCM_UPDATE finishes.
-; Input: A gcm_key_data * (GDATA_KEY), gcm_context_data (GDATA_CTX).
-; Output: Authorization Tag (AUTH_TAG) and Authorization Tag length (AUTH_TAG_LEN)
-; Clobbers rax, r10-r12, and xmm0-xmm2, xmm5-xmm6, xmm9-xmm11, xmm13-xmm15
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  GCM_COMPLETE            5
-%define %%GDATA_KEY             %1
-%define %%GDATA_CTX             %2
-%define %%AUTH_TAG              %3
-%define %%AUTH_TAG_LEN          %4
-%define %%INSTANCE_TYPE         %5
-%define %%PLAIN_CYPH_LEN        rax
-
-        vmovdqu xmm13, [%%GDATA_KEY + HashKey]
-        ;; Start AES as early as possible
-        vmovdqu xmm9, [%%GDATA_CTX + OrigIV]    ; xmm9 = Y0
-        ENCRYPT_SINGLE_BLOCK %%GDATA_KEY, xmm9  ; E(K, Y0)
-
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; If the GCM function is called as a single function call rather
-        ;; than invoking the individual parts (init, update, finalize) we
-        ;; can remove a write to read dependency on AadHash.
-        vmovdqu xmm14, [%%GDATA_CTX + AadHash]
-
-        ;; Encrypt the final partial block. If we did this as a single call then
-        ;; the partial block was handled in the main GCM_ENC_DEC macro.
-	mov	r12, [%%GDATA_CTX + PBlockLen]
-	cmp	r12, 0
-
-	je %%_partial_done
-
-	GHASH_MUL xmm14, xmm13, xmm0, xmm10, xmm11, xmm5, xmm6 ;GHASH computation for the last <16 Byte block
-	vmovdqu [%%GDATA_CTX + AadHash], xmm14
-
-%%_partial_done:
-
-%endif
-
-        mov     r12, [%%GDATA_CTX + AadLen]     ; r12 = aadLen (number of bytes)
-        mov     %%PLAIN_CYPH_LEN, [%%GDATA_CTX + InLen]
-
-        shl     r12, 3                      ; convert into number of bits
-        vmovq   xmm15, r12                  ; len(A) in xmm15
-
-        shl     %%PLAIN_CYPH_LEN, 3         ; len(C) in bits  (*128)
-        vmovq   xmm1, %%PLAIN_CYPH_LEN
-        vpslldq xmm15, xmm15, 8             ; xmm15 = len(A)|| 0x0000000000000000
-        vpxor   xmm15, xmm15, xmm1          ; xmm15 = len(A)||len(C)
-
-        vpxor   xmm14, xmm15
-        GHASH_MUL       xmm14, xmm13, xmm0, xmm10, xmm11, xmm5, xmm6
-        vpshufb  xmm14, [rel SHUF_MASK]         ; perform a 16Byte swap
-
-        vpxor   xmm9, xmm9, xmm14
-
-%%_return_T:
-        mov     r10, %%AUTH_TAG             ; r10 = authTag
-        mov     r11, %%AUTH_TAG_LEN         ; r11 = auth_tag_len
-
-        cmp     r11, 16
-        je      %%_T_16
-
-        cmp     r11, 12
-        je      %%_T_12
-
-        cmp     r11, 8
-        je      %%_T_8
-
-        simd_store_avx r10, xmm9, r11, r12, rax
-        jmp     %%_return_T_done
-%%_T_8:
-        vmovq    rax, xmm9
-        mov     [r10], rax
-        jmp     %%_return_T_done
-%%_T_12:
-        vmovq    rax, xmm9
-        mov     [r10], rax
-        vpsrldq xmm9, xmm9, 8
-        vmovd    eax, xmm9
-        mov     [r10 + 8], eax
-        jmp     %%_return_T_done
-%%_T_16:
-        vmovdqu  [r10], xmm9
-
-%%_return_T_done:
-
-%ifdef SAFE_DATA
-        ;; Clear sensitive data from context structure
-        vpxor   xmm0, xmm0
-        vmovdqu [%%GDATA_CTX + AadHash], xmm0
-        vmovdqu [%%GDATA_CTX + PBlockEncKey], xmm0
-%endif
-%endmacro ; GCM_COMPLETE
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_precomp_128_avx512 /
-;       aes_gcm_precomp_192_avx512 /
-;       aes_gcm_precomp_256_avx512
-;       (struct gcm_key_data *key_data)
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(precomp,_),function,)
-FN_NAME(precomp,_):
-        endbranch64
-;; Parameter is passed through register
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_precomp
-
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
-        sub     rsp, 1*16
-        ; only xmm6 needs to be maintained
-        vmovdqu [rsp + 0*16], xmm6
-%endif
-
-        vpxor   xmm6, xmm6
-        ENCRYPT_SINGLE_BLOCK    arg1, xmm6              ; xmm6 = HashKey
-
-        vpshufb  xmm6, [rel SHUF_MASK]
-        ;;;;;;;;;;;;;;;  PRECOMPUTATION of HashKey<<1 mod poly from the HashKey;;;;;;;;;;;;;;;
-        vmovdqa  xmm2, xmm6
-        vpsllq   xmm6, xmm6, 1
-        vpsrlq   xmm2, xmm2, 63
-        vmovdqa  xmm1, xmm2
-        vpslldq  xmm2, xmm2, 8
-        vpsrldq  xmm1, xmm1, 8
-        vpor     xmm6, xmm6, xmm2
-        ;reduction
-        vpshufd  xmm2, xmm1, 00100100b
-        vpcmpeqd xmm2, [rel TWOONE]
-        vpand    xmm2, xmm2, [rel POLY]
-        vpxor    xmm6, xmm6, xmm2                       ; xmm6 holds the HashKey<<1 mod poly
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vmovdqu  [arg1 + HashKey], xmm6                 ; store HashKey<<1 mod poly
-
-        PRECOMPUTE arg1, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_zmms_asm
-%endif
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm6, [rsp + 0*16]
-        add     rsp, 1*16
-%endif
-
-exit_precomp:
-        ret
-
-%ifdef SAFE_PARAM
-error_precomp:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-
-        jmp exit_precomp
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_init_128_avx512 / aes_gcm_init_192_avx512 / aes_gcm_init_256_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *iv,
-;        const u8 *aad,
-;        u64      aad_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(init,_),function,)
-FN_NAME(init,_):
-        endbranch64
-        push    r12
-        push    r13
-%ifidn __OUTPUT_FORMAT__, win64
-        push    r14
-        push    r15
-        lea     r14, [rsp + 4*8]
-	; xmm6 needs to be maintained for Windows
-	sub	rsp, 1*16
-	vmovdqu [rsp + 0*16], xmm6
-%endif
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_init
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_init
-
-        ;; Check IV != NULL
-        cmp     arg3, 0
-        jz      error_init
-
-        ;; Check if aad_len == 0
-        cmp     arg5, 0
-        jz      skip_aad_check_init
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg4, 0
-        jz      error_init
-
-skip_aad_check_init:
-%endif
-        GCM_INIT arg1, arg2, arg3, arg4, arg5, r10, r11, r12
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_zmms_asm
-%endif
-exit_init:
-%ifidn __OUTPUT_FORMAT__, win64
-	vmovdqu	xmm6 , [rsp + 0*16]
-        add     rsp, 1*16
-        pop     r15
-        pop     r14
-%endif
-        pop     r13
-        pop     r12
-        ret
-
-%ifdef SAFE_PARAM
-error_init:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_IV
-
-        ;; Check if aad_len == 0
-        cmp     arg5, 0
-        jz      skip_aad_check_error_init
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_init:
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_init
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_init_var_iv_128_avx512 / aes_gcm_init_var_iv_192_avx512 /
-;       aes_gcm_init_var_iv_256_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(init_var_iv,_),function,)
-FN_NAME(init_var_iv,_):
-        endbranch64
-        push    r12
-        push    r13
-%ifidn __OUTPUT_FORMAT__, win64
-        push    r14
-        push    r15
-        lea     r14, [rsp + 4*8]
-	; xmm6 needs to be maintained for Windows
-	sub	rsp, 1*16
-	vmovdqu	[rsp + 0*16], xmm6
-%endif
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_init_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_init_IV
-
-        ;; Check IV != NULL
-        cmp     arg3, 0
-        jz      error_init_IV
-
-        ;; Check iv_len != 0
-        cmp     arg4, 0
-        jz      error_init_IV
-
-        ;; Check if aad_len == 0
-        cmp     arg6, 0
-        jz      skip_aad_check_init_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg5, 0
-        jz      error_init_IV
-
-skip_aad_check_init_IV:
-%endif
-        cmp     arg4, 12
-        je      iv_len_12_init_IV
-
-	GCM_INIT arg1, arg2, arg3, arg5, arg6, r10, r11, r12, arg4
-        jmp     skip_iv_len_12_init_IV
-
-iv_len_12_init_IV:
-	GCM_INIT arg1, arg2, arg3, arg5, arg6, r10, r11, r12
-
-skip_iv_len_12_init_IV:
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_zmms_asm
-%endif
-exit_init_IV:
-%ifidn __OUTPUT_FORMAT__, win64
-	vmovdqu xmm6, [rsp + 0*16]
-        add     rsp, 1*16
-        pop     r15
-        pop     r14
-%endif
-        pop     r13
-        pop     r12
-        ret
-
-%ifdef SAFE_PARAM
-error_init_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_IV
-
-        ;; Check iv_len != 0
-        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_IV_LEN
-
-        ;; Check if aad_len == 0
-        cmp     arg6, 0
-        jz      skip_aad_check_error_init_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg5, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_init_IV:
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_init_IV
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_enc_128_update_avx512 / aes_gcm_enc_192_update_avx512 /
-;       aes_gcm_enc_256_update_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *out,
-;        const u8 *in,
-;        u64      msg_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc,_update_),function,)
-FN_NAME(enc,_update_):
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_update_enc
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_update_enc
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      error_update_enc
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_update_enc
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_update_enc
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_update_enc
-%endif
-        GCM_ENC_DEC arg1, arg2, arg3, arg4, arg5, ENC, multi_call
-
-exit_update_enc:
-        FUNC_RESTORE
-
-        ret
-
-%ifdef SAFE_PARAM
-error_update_enc:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check if plaintext_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_update_enc
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (plaintext_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_update_enc:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_update_enc
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_dec_128_update_avx512 / aes_gcm_dec_192_update_avx512 /
-;       aes_gcm_dec_256_update_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *out,
-;        const u8 *in,
-;        u64      msg_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec,_update_),function,)
-FN_NAME(dec,_update_):
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_update_dec
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_update_dec
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      error_update_dec
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_update_dec
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_update_dec
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_update_dec
-%endif
-
-        GCM_ENC_DEC arg1, arg2, arg3, arg4, arg5, DEC, multi_call
-
-exit_update_dec:
-        FUNC_RESTORE
-        ret
-
-%ifdef SAFE_PARAM
-error_update_dec:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check if plaintext_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_update_dec
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (plaintext_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_update_dec:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_update_dec
-%endif
-
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_enc_128_finalize_avx512 / aes_gcm_enc_192_finalize_avx512 /
-;	aes_gcm_enc_256_finalize_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *auth_tag,
-;        u64      auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc,_finalize_),function,)
-FN_NAME(enc,_finalize_):
-        endbranch64
-;; All parameters are passed through registers
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc_fin
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc_fin
-
-        ;; Check auth_tag != NULL
-        cmp     arg3, 0
-        jz      error_enc_fin
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg4, 0
-        jz      error_enc_fin
-
-        cmp     arg4, 16
-        ja      error_enc_fin
-%endif
-
-        push r12
-
-%ifidn __OUTPUT_FORMAT__, win64
-        ; xmm6:xmm15 need to be maintained for Windows
-	sub	rsp, 7*16
-        vmovdqu	[rsp + 0*16], xmm6
-        vmovdqu	[rsp + 1*16], xmm9
-        vmovdqu	[rsp + 2*16], xmm10
-        vmovdqu	[rsp + 3*16], xmm11
-        vmovdqu	[rsp + 4*16], xmm13
-        vmovdqu	[rsp + 5*16], xmm14
-        vmovdqu	[rsp + 6*16], xmm15
-%endif
-        GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_zmms_asm
-%endif
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu	xmm15, [rsp + 6*16]
-        vmovdqu	xmm14, [rsp + 5*16]
-        vmovdqu	xmm13, [rsp + 4*16]
-        vmovdqu	xmm11, [rsp + 3*16]
-        vmovdqu	xmm10, [rsp + 2*16]
-        vmovdqu	xmm9,  [rsp + 1*16]
-        vmovdqu	xmm6,  [rsp + 0*16]
-        add     rsp, 7*16
-%endif
-
-        pop r12
-
-exit_enc_fin:
-	ret
-
-%ifdef SAFE_PARAM
-error_enc_fin:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg4, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc_fin
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_dec_128_finalize_avx512 / aes_gcm_dec_192_finalize_avx512
-;	aes_gcm_dec_256_finalize_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *auth_tag,
-;        u64      auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec,_finalize_),function,)
-FN_NAME(dec,_finalize_):
-        endbranch64
-;; All parameters are passed through registers
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec_fin
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec_fin
-
-        ;; Check auth_tag != NULL
-        cmp     arg3, 0
-        jz      error_dec_fin
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg4, 0
-        jz      error_dec_fin
-
-        cmp     arg4, 16
-        ja      error_dec_fin
-%endif
-
-        push r12
-
-%ifidn __OUTPUT_FORMAT__, win64
-        ; xmm6:xmm15 need to be maintained for Windows
-	sub	rsp, 7*16
-        vmovdqu	[rsp + 0*16], xmm6
-        vmovdqu	[rsp + 1*16], xmm9
-        vmovdqu	[rsp + 2*16], xmm10
-        vmovdqu	[rsp + 3*16], xmm11
-        vmovdqu	[rsp + 4*16], xmm13
-        vmovdqu	[rsp + 5*16], xmm14
-        vmovdqu	[rsp + 6*16], xmm15
-%endif
-        GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_zmms_asm
-%endif
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu	xmm15, [rsp + 6*16]
-        vmovdqu	xmm14, [rsp + 5*16]
-        vmovdqu	xmm13, [rsp + 4*16]
-        vmovdqu	xmm11, [rsp + 3*16]
-        vmovdqu	xmm10, [rsp + 2*16]
-        vmovdqu	xmm9,  [rsp + 1*16]
-        vmovdqu	xmm6,  [rsp + 0*16]
-        add     rsp, 7*16
-%endif
-
-        pop r12
-exit_dec_fin:
-
-        ret
-
-%ifdef SAFE_PARAM
-error_dec_fin:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg4, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec_fin
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_enc_128_avx512 / aes_gcm_enc_192_avx512 / aes_gcm_enc_256_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *out,
-;        const u8 *in,
-;        u64      msg_len,
-;        u8       *iv,
-;        const u8 *aad,
-;        u64      aad_len,
-;        u8       *auth_tag,
-;        u64      auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc,_),function,)
-FN_NAME(enc,_):
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_enc
-
-        ;; Check auth_tag != NULL
-        cmp     arg9, 0
-        jz      error_enc
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg10, 0
-        jz      error_enc
-
-        cmp     arg10, 16
-        ja      error_enc
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_enc
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_enc
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_enc
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_enc
-
-skip_in_out_check_enc:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_enc
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg7, 0
-        jz      error_enc
-
-skip_aad_check_enc:
-%endif
-        GCM_INIT arg1, arg2, arg6, arg7, arg8, r10, r11, r12
-
-        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC, single_call
-
-        GCM_COMPLETE arg1, arg2, arg9, arg10, single_call
-
-exit_enc:
-        FUNC_RESTORE
-
-        ret
-
-%ifdef SAFE_PARAM
-error_enc:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg9, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg10, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg10, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_enc
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_enc:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_error_enc
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg7, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_enc:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_dec_128_avx512 / aes_gcm_dec_192_avx512 / aes_gcm_dec_256_avx512
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *out,
-;        const u8 *in,
-;        u64      msg_len,
-;        u8       *iv,
-;        const u8 *aad,
-;        u64      aad_len,
-;        u8       *auth_tag,
-;        u64      auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec,_),function,)
-FN_NAME(dec,_):
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_dec
-
-        ;; Check auth_tag != NULL
-        cmp     arg9, 0
-        jz      error_dec
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg10, 0
-        jz      error_dec
-
-        cmp     arg10, 16
-        ja      error_dec
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_dec
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_dec
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_dec
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_dec
-
-skip_in_out_check_dec:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_dec
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg7, 0
-        jz      error_dec
-
-skip_aad_check_dec:
-%endif
-
-        GCM_INIT arg1, arg2, arg6, arg7, arg8, r10, r11, r12
-
-        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
-
-        GCM_COMPLETE arg1, arg2, arg9, arg10, single_call
-
-exit_dec:
-        FUNC_RESTORE
-
-        ret
-
-%ifdef SAFE_PARAM
-error_dec:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg9, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg10, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg10, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_dec
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_dec:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_error_dec
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg7, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_dec:
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;
-; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
-;
-;IMB_JOB *aes_gcm_enc_var_iv_128_avx512 / aes_gcm_enc_var_iv_192_avx512 /
-;       aes_gcm_enc_var_iv_256_avx512(IMB_MGR *state, IMB_JOB *job)
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
-FN_NAME(enc_var_iv,_):
-        endbranch64
-	FUNC_SAVE alloc_context
-
-        mov     arg1, [arg2 + _enc_keys]
-
-        cmp     qword [arg2 + _iv_len_in_bytes], 12
-        je      iv_len_12_enc_IV
-
-        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
-                 r10, r11, r12, {[arg2 + _iv_len_in_bytes]}
-
-        jmp     skip_iv_len_12_enc_IV
-
-iv_len_12_enc_IV:
-	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
-                 r10, r11, r12
-
-skip_iv_len_12_enc_IV:
-        mov     arg3, [arg2 + _src]
-        add     arg3, [arg2 + _cipher_start_src_offset]
-        mov     arg4, [arg2 + _dst]
-        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
-        mov     arg2, [arg2 + _msg_len_to_cipher]
-	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, ENC, single_call
-
-        mov     arg2, [rsp + GP_OFFSET + 5*8]
-        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
-                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
-                     single_call
-
-        ;; mark job complete
-        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
-
-        mov     rax, arg2       ;; return the job
-
-        FUNC_RESTORE
-	ret
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;
-; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
-;
-;IMB_JOB *aes_gcm_dec_var_iv_128_avx512 / aes_gcm_dec_var_iv_192_avx512 /
-;       aes_gcm_dec_var_iv_256_avx512(IMB_MGR *state, IMB_JOB *job)
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
-FN_NAME(dec_var_iv,_):
-        endbranch64
-	FUNC_SAVE alloc_context
-
-        mov     arg1, [arg2 + _dec_keys]
-
-        cmp     qword [arg2 + _iv_len_in_bytes], 12
-        je      iv_len_12_dec_IV
-
-        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
-                 r10, r11, r12, {[arg2 + _iv_len_in_bytes]}
-
-        jmp     skip_iv_len_12_dec_IV
-
-iv_len_12_dec_IV:
-	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
-                 r10, r11, r12
-
-skip_iv_len_12_dec_IV:
-        mov     arg3, [arg2 + _src]
-        add     arg3, [arg2 + _cipher_start_src_offset]
-        mov     arg4, [arg2 + _dst]
-        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
-        mov     arg2, [arg2 + _msg_len_to_cipher]
-	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, DEC, single_call
-
-        mov     arg2, [rsp + GP_OFFSET + 5*8]
-        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
-                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
-                     single_call
-
-        ;; mark job complete
-        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
-
-        mov     rax, arg2       ;; return the job
-
-        FUNC_RESTORE
-	ret
-
-%ifdef GCM128_MODE
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   ghash_avx512
-;        const struct gcm_key_data *key_data,
-;        const void   *in,
-;        const u64    in_len,
-;        void         *tag,
-;        const u64    tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(ghash_avx512,function,)
-ghash_avx512:
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_ghash
-
-        ;; Check in != NULL
-        cmp     arg2, 0
-        jz      error_ghash
-
-        ;; Check in_len != 0
-        cmp     arg3, 0
-        jz      error_ghash
-
-        ;; Check tag != NULL
-        cmp     arg4, 0
-        jz      error_ghash
-
-        ;; Check tag_len != 0
-        cmp     arg5, 0
-        jz      error_ghash
-%endif
-
-        ;; copy tag to xmm0
-        vmovdqu	xmm0, [arg4]
-        vpshufb xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
-
-        CALC_AAD_HASH arg2, arg3, xmm0, arg1, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, \
-                      r10, r11, r12
-
-        vpshufb xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
-
-        simd_store_avx arg4, xmm0, arg5, r12, rax
-
-exit_ghash:
-        FUNC_RESTORE
-        ret
-
-%ifdef SAFE_PARAM
-error_ghash:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check in != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_SRC
-
-        ;; Check in_len != 0
-        IMB_ERR_CHECK_ZERO arg3, rax, IMB_ERR_AUTH_LEN
-
-        ;; Check tag != NULL
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check tag_len != 0
-        IMB_ERR_CHECK_ZERO arg5, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-
-        jmp     exit_ghash
-%endif
-
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; PARTIAL_BLOCK_GMAC: Handles the tag partial blocks between update calls.
-; Requires the input data be at least 1 byte long.
-; Input: gcm_context_data (GDATA_CTX), input text (PLAIN_IN), hash subkey (HASH_SUBKEY)
-; input text length (PLAIN_LEN).
-; Output: Updated GDATA_CTX
-; Clobbers rax, r10, r12, r13, r15, xmm0, xmm1, xmm2, xmm3, xmm5, xmm6, xmm9, xmm10, xmm11
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro PARTIAL_BLOCK_GMAC       6
-%define %%GDATA_CTX             %1
-%define %%PLAIN_IN              %2
-%define %%PLAIN_LEN             %3
-%define %%DATA_OFFSET           %4
-%define %%AAD_HASH              %5
-%define %%HASH_SUBKEY           %6
-
-	mov	r13, [%%GDATA_CTX + PBlockLen]
-	cmp	r13, 0
-        ; Leave Macro if no partial blocks
-	je	%%_partial_block_done
-
-        ; Read in input data without over reading
-        READ_SMALL_DATA_INPUT_LEN_BT16_AVX512	xmm1, %%PLAIN_IN, %%PLAIN_LEN, r12, rax, k1
-
-        ; Finished reading in data
-%%_data_read:
-
-	lea	r12, [rel SHIFT_MASK]
-        ; Adjust the shuffle mask pointer to be able to shift r13 bytes
-        ; (16-r13 is the number of bytes in plaintext mod 16)
-	add	r12, r13
-        ; Get the appropriate shuffle mask
-	vmovdqu	xmm2, [r12]
-	vmovdqa	xmm3, xmm1
-
-	mov	r15, %%PLAIN_LEN
-	add	r15, r13
-        ; Set r15 to be the amount of data left in PLAIN_IN after filling the block
-	sub	r15, 16
-        ; Determine if partial block is not being filled and shift mask accordingly
-	jge	%%_no_extra_mask_1
-	sub	r12, r15
-%%_no_extra_mask_1:
-
-        ; Get the appropriate mask to mask out bottom r13 bytes of xmm3
-	vmovdqu	xmm1, [r12 + ALL_F-SHIFT_MASK]
-
-	vpand	xmm3, xmm1
-	vpshufb	xmm3, [rel SHUF_MASK]
-	vpshufb	xmm3, xmm2
-	vpxor	%%AAD_HASH, xmm3
-
-	cmp	r15,0
-	jl	%%_partial_incomplete_1
-
-        ; GHASH computation for the last <16 Byte block
-	GHASH_MUL	%%AAD_HASH, %%HASH_SUBKEY, xmm0, xmm10, xmm11, xmm5, xmm6
-	xor	rax, rax
-	mov	[%%GDATA_CTX + PBlockLen], rax
-	jmp	%%_ghash_done
-%%_partial_incomplete_1:
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_LEN
-        add     [%%GDATA_CTX + PBlockLen], rax
-%else
-        add     [%%GDATA_CTX + PBlockLen], %%PLAIN_LEN
-%endif
-%%_ghash_done:
-	vmovdqu	[%%GDATA_CTX + AadHash], %%AAD_HASH
-
-        cmp     r15, 0
-        jl      %%_partial_fill
-
-        mov     r12, 16
-        ; Set r12 to be the number of bytes to skip after this macro
-        sub     r12, r13
-
-        jmp     %%offset_set
-%%_partial_fill:
-        mov     r12, %%PLAIN_LEN
-%%offset_set:
-        mov     %%DATA_OFFSET, r12
-%%_partial_block_done:
-%endmacro ; PARTIAL_BLOCK_GMAC
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   imb_aes_gmac_update_128_avx512 / imb_aes_gmac_update_192_avx512 /
-;       imb_aes_gmac_update_256_avx512
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        const   u8 *in,
-;        const   u64 msg_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(GMAC_FN_NAME(update),function,)
-GMAC_FN_NAME(update):
-        endbranch64
-	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-%endif
-        ;; Check if msg_len == 0
-	cmp	arg4, 0
-	je	exit_gmac_update
-
-%ifdef SAFE_PARAM
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_gmac_update
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_gmac_update
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_gmac_update
-%endif
-
-        ; Increment size of "AAD length" for GMAC
-        add     [arg2 + AadLen], arg4
-
-        ;; Deal with previous partial block
-	xor	r11, r11
-	vmovdqu	xmm13, [arg1 + HashKey]
-	vmovdqu	xmm8, [arg2 + AadHash]
-
-	PARTIAL_BLOCK_GMAC arg2, arg3, arg4, r11, xmm8, xmm13
-
-        ; CALC_AAD_HASH needs to deal with multiple of 16 bytes
-        sub     arg4, r11
-        add     arg3, r11
-
-        vmovq   xmm7, arg4 ; Save remaining length
-        and     arg4, -16 ; Get multiple of 16 bytes
-
-        or      arg4, arg4
-        jz      no_full_blocks
-
-        ;; Calculate GHASH of this segment
-        CALC_AAD_HASH arg3, arg4, xmm8, arg1, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, \
-                      r10, r11, r12
-	vmovdqu	[arg2 + AadHash], xmm8	; ctx_data.aad hash = aad_hash
-
-no_full_blocks:
-        add     arg3, arg4 ; Point at partial block
-
-        vmovq   arg4, xmm7 ; Restore original remaining length
-        and     arg4, 15
-        jz      exit_gmac_update
-
-        ; Save next partial block
-        mov	[arg2 + PBlockLen], arg4
-        READ_SMALL_DATA_INPUT_AVX512 xmm1, arg3, arg4, r11, k1
-        vpshufb xmm1, [rel SHUF_MASK]
-        vpxor   xmm8, xmm1
-        vmovdqu [arg2 + AadHash], xmm8
-
-exit_gmac_update:
-	FUNC_RESTORE
-
-	ret
-
-%ifdef SAFE_PARAM
-error_gmac_update:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_SRC
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_gmac_update
-%endif
-
-mksection stack-noexec
+%define IS_AVX512_GCM
+%include "include/gcm_common_avx2_avx512.inc"
diff --git a/lib/include/gcm_avx_gen4.inc b/lib/include/gcm_avx_gen4.inc
index dd11fb95..12f596c4 100644
--- a/lib/include/gcm_avx_gen4.inc
+++ b/lib/include/gcm_avx_gen4.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2011-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
@@ -27,4333 +27,5 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-;
-; Authors:
-;       Erdinc Ozturk
-;       Vinodh Gopal
-;       James Guilford
-;
-;
-; References:
-;       This code was derived and highly optimized from the code described in paper:
-;               Vinodh Gopal et. al. Optimized Galois-Counter-Mode Implementation on Intel Architecture Processors. August, 2010
-;       The details of the implementation is explained in:
-;               Erdinc Ozturk et. al. Enabling High-Performance Galois-Counter-Mode on Intel Architecture Processors. October, 2012.
-;
-;
-;
-;
-; Assumptions:
-;
-;
-;
-; iv:
-;       0                   1                   2                   3
-;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                             Salt  (From the SA)               |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                     Initialization Vector                     |
-;       |         (This is the sequence number from IPSec header)       |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                              0x1                              |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;
-;
-;
-; AAD:
-;       AAD will be padded with 0 to the next 16byte multiple
-;       for example, assume AAD is a u32 vector
-;
-;       if AAD is 8 bytes:
-;       AAD[3] = {A0, A1};
-;       padded AAD in xmm register = {A1 A0 0 0}
-;
-;       0                   1                   2                   3
-;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                               SPI (A1)                        |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                     32-bit Sequence Number (A0)               |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                              0x0                              |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;
-;                                       AAD Format with 32-bit Sequence Number
-;
-;       if AAD is 12 bytes:
-;       AAD[3] = {A0, A1, A2};
-;       padded AAD in xmm register = {A2 A1 A0 0}
-;
-;       0                   1                   2                   3
-;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                               SPI (A2)                        |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                 64-bit Extended Sequence Number {A1,A0}       |
-;       |                                                               |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                              0x0                              |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;
-;        AAD Format with 64-bit Extended Sequence Number
-;
-;
-; aadLen:
-;       Must be a multiple of 4 bytes and from the definition of the spec.
-;       The code additionally supports any aadLen length.
-;
-; TLen:
-;       from the definition of the spec, TLen can only be 8, 12 or 16 bytes.
-;
-; poly = x^128 + x^127 + x^126 + x^121 + 1
-; throughout the code, one tab and two tab indentations are used. one tab is for GHASH part, two tabs is for AES part.
-;
-
-%include "include/os.inc"
-%include "include/reg_sizes.inc"
-%include "include/clear_regs.inc"
-%include "include/gcm_defines.inc"
-%include "include/gcm_keys_avx2_avx512.inc"
-%include "include/gcm_common.inc"
-%include "include/memcpy.inc"
-%include "include/cet.inc"
-%include "include/error.inc"
-%include "include/imb_job.inc"
-
-%ifndef GCM128_MODE
-%ifndef GCM192_MODE
-%ifndef GCM256_MODE
-%error "No GCM mode selected for gcm_avx_gen4.inc!"
-%endif
-%endif
-%endif
-
-;; Decide on AES-GCM key size to compile for
-%ifdef GCM128_MODE
-%define NROUNDS 9
-%define FN_NAME(x,y) aes_gcm_ %+ x %+ _128 %+ y %+ avx_gen4
-%define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _128_ %+ avx_gen4
-%endif
-
-%ifdef GCM192_MODE
-%define NROUNDS 11
-%define FN_NAME(x,y) aes_gcm_ %+ x %+ _192 %+ y %+ avx_gen4
-%define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _192_ %+ avx_gen4
-%endif
-
-%ifdef GCM256_MODE
-%define NROUNDS 13
-%define FN_NAME(x,y) aes_gcm_ %+ x %+ _256 %+ y %+ avx_gen4
-%define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _256_ %+ avx_gen4
-%endif
-
-mksection .text
-default rel
-
-; need to store 5 GP registers on stack (align to 16 bytes)
-%define GP_STORAGE 8*6
-
-%define	TMP2	16*0    ; Temporary storage for AES State 2 (State 1 is stored in an XMM register)
-%define	TMP3	16*1    ; Temporary storage for AES State 3
-%define	TMP4	16*2    ; Temporary storage for AES State 4
-%define	TMP5	16*3    ; Temporary storage for AES State 5
-%define	TMP6	16*4    ; Temporary storage for AES State 6
-%define	TMP7	16*5    ; Temporary storage for AES State 7
-%define	TMP8	16*6    ; Temporary storage for AES State 8
-
-%define	LOCAL_STORAGE	16*7
-
-%ifidn __OUTPUT_FORMAT__, win64
-	%define	XMM_STORAGE	16*10
-%else
-	%define	XMM_STORAGE	0
-%endif
-
-%define GP_OFFSET (LOCAL_STORAGE + XMM_STORAGE)
-
-%define	VARIABLE_OFFSET	(GP_STORAGE + LOCAL_STORAGE + XMM_STORAGE)
-
-;; extra memory for GCM context structure
-%define CONTEXT_SIZE    6*16
-%define CONTEXT_OFFSET  VARIABLE_OFFSET
-
-;; Full stack frame layout:
-;;                   RETURN ADDRESS + ARGS
-;; R14 =  + 16*6  -> ---------------------------
-;;                   GCM CONTEXT (JOB API only)
-;;        + 6*8   -> ---------------------------
-;;                   GP STORAGE
-;;        + 16*10 -> --------------------------
-;;                   XMM STORAGE (windows only)
-;;        + 16*7  -> --------------------------
-;;                   LOCAL STORAGE
-;; RSP =          -> --------------------------
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Utility Macros
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GHASH_MUL MACRO to implement: Data*HashKey mod (128,127,126,121,0)
-; Input: A and B (128-bits each, bit-reflected)
-; Output: C = A*B*x mod poly, (i.e. >>1 )
-; To compute GH = GH*HashKey mod poly, give HK = HashKey<<1 mod poly as input
-; GH = GH * HK * x mod poly which is equivalent to GH*HashKey mod poly.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  GHASH_MUL  7
-%define %%GH %1         ; 16 Bytes
-%define %%HK %2         ; 16 Bytes
-%define %%T1 %3
-%define %%T2 %4
-%define %%T3 %5
-%define %%T4 %6
-%define %%T5 %7
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        vpclmulqdq      %%T1, %%GH, %%HK, 0x11          ; %%T1 = a1*b1
-        vpclmulqdq      %%T2, %%GH, %%HK, 0x00          ; %%T2 = a0*b0
-        vpclmulqdq      %%T3, %%GH, %%HK, 0x01          ; %%T3 = a1*b0
-        vpclmulqdq      %%GH, %%GH, %%HK, 0x10          ; %%GH = a0*b1
-        vpxor           %%GH, %%GH, %%T3
-
-        vpsrldq         %%T3, %%GH, 8                   ; shift-R %%GH 2 DWs
-        vpslldq         %%GH, %%GH, 8                   ; shift-L %%GH 2 DWs
-
-        vpxor           %%T1, %%T1, %%T3
-        vpxor           %%GH, %%GH, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqa         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%GH, 0x01
-        vpslldq         %%T2, %%T2, 8                    ; shift-L %%T2 2 DWs
-
-        vpxor           %%GH, %%GH, %%T2                 ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
-        vpclmulqdq      %%T2, %%T3, %%GH, 0x00
-        vpsrldq         %%T2, %%T2, 4                    ; shift-R %%T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%GH, %%T3, %%GH, 0x10
-        vpslldq         %%GH, %%GH, 4                    ; shift-L %%GH 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%GH, %%GH, %%T2                 ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%GH, %%GH, %%T1                 ; the result is in %%GH
-
-%endmacro
-
-; In PRECOMPUTE, the commands filling Hashkey_i_k are not required for avx_gen4
-; functions, but are kept to allow users to switch cpu architectures between calls
-; of pre, init, update, and finalize.
-%macro  PRECOMPUTE 8
-%define %%GDATA %1
-%define %%HK    %2
-%define %%T1    %3
-%define %%T2    %4
-%define %%T3    %5
-%define %%T4    %6
-%define %%T5    %7
-%define %%T6    %8
-
-        ; Haskey_i_k holds XORed values of the low and high parts of the Haskey_i
-        vmovdqa  %%T5, %%HK
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^2<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_2], %%T5                    ;  [HashKey_2] = HashKey^2<<1 mod poly
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^3<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_3], %%T5
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^4<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_4], %%T5
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^5<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_5], %%T5
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^6<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_6], %%T5
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^7<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_7], %%T5
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^8<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_8], %%T5
-%endmacro
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; CALC_AAD_HASH: Calculates the hash of the data which will not be encrypted.
-; Input: The input data (A_IN), that data's length (A_LEN), and the hash key (HASH_KEY).
-; Output: The hash of the data (AAD_HASH).
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  CALC_AAD_HASH   15
-%define %%A_IN          %1
-%define %%A_LEN         %2
-%define %%AAD_HASH      %3
-%define %%GDATA_KEY     %4
-%define %%XTMP0         %5      ; xmm temp reg 5
-%define %%XTMP1         %6      ; xmm temp reg 5
-%define %%XTMP2         %7
-%define %%XTMP3         %8
-%define %%XTMP4         %9
-%define %%XTMP5         %10     ; xmm temp reg 5
-%define %%T1            %11     ; temp reg 1
-%define %%T2            %12
-%define %%T3            %13
-%define %%T4            %14
-%define %%T5            %15     ; temp reg 5
-
-        mov     %%T1, %%A_IN            ; T1 = AAD
-        mov     %%T2, %%A_LEN           ; T2 = aadLen
-
-%%_get_AAD_loop128:
-        cmp     %%T2, 128
-        jl      %%_exit_AAD_loop128
-
-        vmovdqu         %%XTMP0, [%%T1 + 16*0]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vpxor           %%XTMP0, %%AAD_HASH
-
-        vmovdqu         %%XTMP5, [%%GDATA_KEY + HashKey_8]
-        vpclmulqdq      %%XTMP1, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = a1*b1
-        vpclmulqdq      %%XTMP2, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = a0*b0
-        vpclmulqdq      %%XTMP3, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = a1*b0
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10                 ; %%T4 = a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4                       ; %%T3 = a1*b0 + a0*b1
-
-%assign i 1
-%assign j 7
-%rep 7
-        vmovdqu         %%XTMP0, [%%T1 + 16*i]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vmovdqu         %%XTMP5, [%%GDATA_KEY + HashKey_ %+ j]
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = T1 + a1*b1
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = T2 + a0*b0
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = T3 + a1*b0 + a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-%assign i (i + 1)
-%assign j (j - 1)
-%endrep
-
-        vpslldq         %%XTMP4, %%XTMP3, 8                             ; shift-L 2 DWs
-        vpsrldq         %%XTMP3, %%XTMP3, 8                             ; shift-R 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP3                       ; accumulate the results in %%T1(M):%%T2(L)
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqa         %%XTMP5, [rel POLY2]
-        vpclmulqdq      %%XTMP0, %%XTMP5, %%XTMP2, 0x01
-        vpslldq         %%XTMP0, %%XTMP0, 8                             ; shift-L xmm2 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP0                       ; first phase of the reduction complete
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
-        vpclmulqdq      %%XTMP3, %%XTMP5, %%XTMP2, 0x00
-        vpsrldq         %%XTMP3, %%XTMP3, 4                             ; shift-R 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%XTMP4, %%XTMP5, %%XTMP2, 0x10
-        vpslldq         %%XTMP4, %%XTMP4, 4                             ; shift-L 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%XTMP4, %%XTMP4, %%XTMP3                       ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%AAD_HASH, %%XTMP1, %%XTMP4                    ; the result is in %%T1
-
-        sub     %%T2, 128
-        je      %%_CALC_AAD_done
-
-        add     %%T1, 128
-        jmp     %%_get_AAD_loop128
-
-%%_exit_AAD_loop128:
-        cmp     %%T2, 16
-        jl      %%_get_small_AAD_block
-
-        ;; calculate hash_key position to start with
-        mov     %%T3, %%T2
-        and     %%T3, -16       ; 1 to 7 blocks possible here
-        neg     %%T3
-        add     %%T3, HashKey_1 + 16
-        lea     %%T3, [%%GDATA_KEY + %%T3]
-
-        vmovdqu         %%XTMP0, [%%T1]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vpxor           %%XTMP0, %%AAD_HASH
-
-        vmovdqu         %%XTMP5, [%%T3]
-        vpclmulqdq      %%XTMP1, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = a1*b1
-        vpclmulqdq      %%XTMP2, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = a0*b0
-        vpclmulqdq      %%XTMP3, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = a1*b0
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10                 ; %%T4 = a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4                       ; %%T3 = a1*b0 + a0*b1
-
-        add     %%T3, 16        ; move to next hashkey
-        add     %%T1, 16        ; move to next data block
-        sub     %%T2, 16
-        cmp     %%T2, 16
-        jl      %%_AAD_reduce
-
-%%_AAD_blocks:
-        vmovdqu         %%XTMP0, [%%T1]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vmovdqu         %%XTMP5, [%%T3]
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = T1 + a1*b1
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = T2 + a0*b0
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = T3 + a1*b0 + a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-
-        add     %%T3, 16        ; move to next hashkey
-        add     %%T1, 16
-        sub     %%T2, 16
-        cmp     %%T2, 16
-        jl      %%_AAD_reduce
-        jmp     %%_AAD_blocks
-
-%%_AAD_reduce:
-        vpslldq         %%XTMP4, %%XTMP3, 8                             ; shift-L 2 DWs
-        vpsrldq         %%XTMP3, %%XTMP3, 8                             ; shift-R 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP3                       ; accumulate the results in %%T1(M):%%T2(L)
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqa         %%XTMP5, [rel POLY2]
-        vpclmulqdq      %%XTMP0, %%XTMP5, %%XTMP2, 0x01
-        vpslldq         %%XTMP0, %%XTMP0, 8                             ; shift-L xmm2 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP0                       ; first phase of the reduction complete
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
-        vpclmulqdq      %%XTMP3, %%XTMP5, %%XTMP2, 0x00
-        vpsrldq         %%XTMP3, %%XTMP3, 4                             ; shift-R 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%XTMP4, %%XTMP5, %%XTMP2, 0x10
-        vpslldq         %%XTMP4, %%XTMP4, 4                             ; shift-L 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%XTMP4, %%XTMP4, %%XTMP3                       ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%AAD_HASH, %%XTMP1, %%XTMP4                    ; the result is in %%T1
-
-%%_get_small_AAD_block:
-        or      %%T2, %%T2
-        je      %%_CALC_AAD_done
-
-        vmovdqu         %%XTMP0, [%%GDATA_KEY + HashKey]
-        READ_SMALL_DATA_INPUT_AVX   %%XTMP1, %%T1, %%T2, %%T3, %%T4, %%T5
-        ;byte-reflect the AAD data
-        vpshufb         %%XTMP1, [rel SHUF_MASK]
-        vpxor           %%AAD_HASH, %%XTMP1
-        GHASH_MUL       %%AAD_HASH, %%XTMP0, %%XTMP1, %%XTMP2, %%XTMP3, %%XTMP4, %%XTMP5
-
-%%_CALC_AAD_done:
-
-%endmacro ; CALC_AAD_HASH
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; PARTIAL_BLOCK: Handles encryption/decryption and the tag partial blocks between update calls.
-; Requires the input data be at least 1 byte long.
-; Input: gcm_key_data * (GDATA_KEY), gcm_context_data *(GDATA_CTX), input text (PLAIN_CYPH_IN),
-; input text length (PLAIN_CYPH_LEN), the current data offset (DATA_OFFSET),
-; the hash subkey (HASH_SUBKEY) and whether encoding or decoding (ENC_DEC)
-; Output: A cypher of the first partial block (CYPH_PLAIN_OUT), and updated GDATA_CTX
-; Clobbers rax, r10, r12, r13, r15, xmm0, xmm1, xmm2, xmm3, xmm5, xmm6, xmm9, xmm10, xmm11
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro PARTIAL_BLOCK    8
-%define %%GDATA_CTX             %1
-%define %%CYPH_PLAIN_OUT        %2
-%define %%PLAIN_CYPH_IN         %3
-%define %%PLAIN_CYPH_LEN        %4
-%define %%DATA_OFFSET           %5
-%define %%AAD_HASH              %6
-%define %%HASH_SUBKEY           %7
-%define %%ENC_DEC               %8
-
-        mov     r13, [%%GDATA_CTX + PBlockLen]
-        cmp     r13, 0
-        je      %%_partial_block_done           ;Leave Macro if no partial blocks
-
-        cmp     %%PLAIN_CYPH_LEN, 16            ;Read in input data without over reading
-        jl      %%_fewer_than_16_bytes
-        VXLDR   xmm1, [%%PLAIN_CYPH_IN]         ;If more than 16 bytes of data, just fill the xmm register
-        jmp     %%_data_read
-
-%%_fewer_than_16_bytes:
-        lea     r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-        READ_SMALL_DATA_INPUT_AVX   xmm1, r10, %%PLAIN_CYPH_LEN, rax, r12, r15
-
-%%_data_read:                           ;Finished reading in data
-
-        vmovdqu xmm9, [%%GDATA_CTX + PBlockEncKey]  ;xmm9 = my_ctx_data.partial_block_enc_key
-
-        lea     r12, [rel SHIFT_MASK]
-
-        add     r12, r13                        ; adjust the shuffle mask pointer to be able to shift r13 bytes (16-r13 is the number of bytes in plaintext mod 16)
-        vmovdqu xmm2, [r12]                     ; get the appropriate shuffle mask
-        vpshufb xmm9, xmm2                      ;shift right r13 bytes
-
-%ifidn  %%ENC_DEC, DEC
-        vmovdqa xmm3, xmm1
-        vpxor   xmm9, xmm1                      ; Ciphertext XOR E(K, Yn)
-
-        mov     r15, %%PLAIN_CYPH_LEN
-        add     r15, r13
-        sub     r15, 16                         ;Set r15 to be the amount of data left in CYPH_PLAIN_IN after filling the block
-        jge     %%_no_extra_mask_1              ;Determine if if partial block is not being filled and shift mask accordingly
-        sub     r12, r15
-%%_no_extra_mask_1:
-
-        vmovdqu xmm1, [r12 + ALL_F - SHIFT_MASK]; get the appropriate mask to mask out bottom r13 bytes of xmm9
-        vpand   xmm9, xmm1                      ; mask out bottom r13 bytes of xmm9
-
-        vpand   xmm3, xmm1
-        vpshufb xmm3, [rel SHUF_MASK]
-        vpshufb xmm3, xmm2
-        vpxor   %%AAD_HASH, xmm3
-
-        cmp     r15,0
-        jl      %%_partial_incomplete_1
-
-        GHASH_MUL       %%AAD_HASH, %%HASH_SUBKEY, xmm0, xmm10, xmm11, xmm5, xmm6       ;GHASH computation for the last <16 Byte block
-        xor     rax,rax
-        mov     [%%GDATA_CTX + PBlockLen], rax
-        jmp     %%_dec_done
-%%_partial_incomplete_1:
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_CYPH_LEN
-       	add     [%%GDATA_CTX + PBlockLen], rax
-%else
-        add     [%%GDATA_CTX + PBlockLen], %%PLAIN_CYPH_LEN
-%endif
-%%_dec_done:
-        vmovdqu [%%GDATA_CTX + AadHash], %%AAD_HASH
-
-%else
-        vpxor   xmm9, xmm1      ; Plaintext XOR E(K, Yn)
-
-        mov     r15, %%PLAIN_CYPH_LEN
-        add     r15, r13
-        sub     r15, 16                         ;Set r15 to be the amount of data left in CYPH_PLAIN_IN after filling the block
-        jge     %%_no_extra_mask_2              ;Determine if if partial block is not being filled and shift mask accordingly
-        sub     r12, r15
-%%_no_extra_mask_2:
-
-        vmovdqu xmm1, [r12 + ALL_F-SHIFT_MASK]  ; get the appropriate mask to mask out bottom r13 bytes of xmm9
-        vpand   xmm9, xmm1                      ; mask out bottom r13  bytes of xmm9
-
-        vpshufb xmm9, [rel SHUF_MASK]
-        vpshufb xmm9, xmm2
-        vpxor   %%AAD_HASH, xmm9
-
-        cmp     r15,0
-        jl      %%_partial_incomplete_2
-
-        GHASH_MUL       %%AAD_HASH, %%HASH_SUBKEY, xmm0, xmm10, xmm11, xmm5, xmm6       ;GHASH computation for the last <16 Byte block
-        xor     rax,rax
-        mov     [%%GDATA_CTX + PBlockLen], rax
-        jmp     %%_encode_done
-%%_partial_incomplete_2:
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_CYPH_LEN
-       	add     [%%GDATA_CTX + PBlockLen], rax
-%else
-        add     [%%GDATA_CTX + PBlockLen], %%PLAIN_CYPH_LEN
-%endif
-%%_encode_done:
-        vmovdqu [%%GDATA_CTX + AadHash], %%AAD_HASH
-
-        vpshufb xmm9, [rel SHUF_MASK]       ; shuffle xmm9 back to output as ciphertext
-        vpshufb xmm9, xmm2
-%endif
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ; output encrypted Bytes
-        cmp     r15,0
-        jl      %%_partial_fill
-        mov     r12, r13
-        mov     r13, 16
-        sub     r13, r12                        ; Set r13 to be the number of bytes to write out
-        jmp     %%_count_set
-%%_partial_fill:
-        mov     r13, %%PLAIN_CYPH_LEN
-%%_count_set:
-        vmovq   rax, xmm9
-        cmp     r13, 8
-        jle     %%_less_than_8_bytes_left
-
-        mov     [%%CYPH_PLAIN_OUT+ %%DATA_OFFSET], rax
-        add     %%DATA_OFFSET, 8
-        vpsrldq xmm9, xmm9, 8
-        vmovq   rax, xmm9
-        sub     r13, 8
-%%_less_than_8_bytes_left:
-        mov     BYTE [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], al
-        add     %%DATA_OFFSET, 1
-        shr     rax, 8
-        sub     r13, 1
-        jne     %%_less_than_8_bytes_left
-         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%%_partial_block_done:
-%endmacro ; PARTIAL_BLOCK
-
-%macro GHASH_SINGLE_MUL 9
-%define %%GDATA                 %1
-%define %%HASHKEY               %2
-%define %%CIPHER                %3
-%define %%STATE_11              %4
-%define %%STATE_00              %5
-%define %%STATE_MID             %6
-%define %%T1                    %7
-%define %%T2                    %8
-%define %%FIRST                 %9
-
-        vmovdqu         %%T1, [%%GDATA + %%HASHKEY]
-%ifidn %%FIRST, first
-        vpclmulqdq      %%STATE_11, %%CIPHER, %%T1, 0x11         ; %%T4 = a1*b1
-        vpclmulqdq      %%STATE_00, %%CIPHER, %%T1, 0x00         ; %%T4_2 = a0*b0
-        vpclmulqdq      %%STATE_MID, %%CIPHER, %%T1, 0x01        ; %%T6 = a1*b0
-        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x10               ; %%T5 = a0*b1
-        vpxor           %%STATE_MID, %%STATE_MID, %%T2
-%else
-        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x11
-        vpxor           %%STATE_11, %%STATE_11, %%T2
-
-        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x00
-        vpxor           %%STATE_00, %%STATE_00, %%T2
-
-        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x01
-        vpxor           %%STATE_MID, %%STATE_MID, %%T2
-
-        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x10
-        vpxor           %%STATE_MID, %%STATE_MID, %%T2
-%endif
-
-%endmacro
-
-; if a = number of total plaintext bytes
-; b = floor(a/16)
-; %%num_initial_blocks = b mod 8;
-; encrypt the initial %%num_initial_blocks blocks and apply ghash on the ciphertext
-; %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r14 are used as a pointer only, not modified.
-; Updated AAD_HASH is returned in %%T3
-
-%macro INITIAL_BLOCKS 23
-%define %%GDATA_KEY             %1
-%define %%CYPH_PLAIN_OUT        %2
-%define %%PLAIN_CYPH_IN         %3
-%define %%LENGTH                %4
-%define %%DATA_OFFSET           %5
-%define %%num_initial_blocks    %6      ; can be 0, 1, 2, 3, 4, 5, 6 or 7
-%define %%T1                    %7
-%define %%T2                    %8
-%define %%T3                    %9
-%define %%T4                    %10
-%define %%T5                    %11
-%define %%CTR                   %12
-%define %%XMM1                  %13
-%define %%XMM2                  %14
-%define %%XMM3                  %15
-%define %%XMM4                  %16
-%define %%XMM5                  %17
-%define %%XMM6                  %18
-%define %%XMM7                  %19
-%define %%XMM8                  %20
-%define %%T6                    %21
-%define %%T_key                 %22
-%define %%ENC_DEC               %23
-
-%assign i (8-%%num_initial_blocks)
-                ;; Move AAD_HASH to temp reg
-                vmovdqu  %%T2, %%XMM8
-                ;; Start AES for %%num_initial_blocks blocks
-                ;; vmovdqu  %%CTR, [%%GDATA_CTX + CurCount]   ; %%CTR = Y0
-
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vpaddd   %%CTR, %%CTR, [rel ONE]     ; INCR Y0
-                vmovdqa  reg(i), %%CTR
-                vpshufb  reg(i), [rel SHUF_MASK]     ; perform a 16Byte swap
-%assign i (i+1)
-%endrep
-
-%if(%%num_initial_blocks>0)
-vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vpxor    reg(i),reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign j 1
-%rep NROUNDS
-vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vaesenc  reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign j (j+1)
-%endrep
-
-vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vaesenclast      reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%endif ; %if(%%num_initial_blocks>0)
-
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-                vpxor    reg(i), reg(i), %%T1
-                ;; Write back ciphertext for %%num_initial_blocks blocks
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
-                add     %%DATA_OFFSET, 16
-                %ifidn  %%ENC_DEC, DEC
-                    vmovdqa  reg(i), %%T1
-                %endif
-                ;; Prepare ciphertext for GHASH computations
-                vpshufb  reg(i), [rel SHUF_MASK]
-%assign i (i+1)
-%endrep
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%assign i (9-%%num_initial_blocks)
-%if(%%num_initial_blocks>0)
-        vmovdqa %%T3, reg(i)
-%assign i (i+1)
-%endif
-%if(%%num_initial_blocks>1)
-%rep %%num_initial_blocks-1
-        vmovdqu [rsp + TMP %+ i], reg(i)
-%assign i (i+1)
-%endrep
-%endif
-                ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-                ;; Prepare 8 counter blocks and perform rounds of AES cipher on
-                ;; them, load plain/cipher text and store cipher/plain text.
-                ;; Stitch GHASH computation in between AES rounds.
-                vpaddd   %%XMM1, %%CTR, [rel ONE]   ; INCR Y0
-                vpaddd   %%XMM2, %%CTR, [rel TWO]   ; INCR Y0
-                vpaddd   %%XMM3, %%XMM1, [rel TWO]  ; INCR Y0
-                vpaddd   %%XMM4, %%XMM2, [rel TWO]  ; INCR Y0
-                vpaddd   %%XMM5, %%XMM3, [rel TWO]  ; INCR Y0
-                vpaddd   %%XMM6, %%XMM4, [rel TWO]  ; INCR Y0
-                vpaddd   %%XMM7, %%XMM5, [rel TWO]  ; INCR Y0
-                vpaddd   %%XMM8, %%XMM6, [rel TWO]  ; INCR Y0
-                vmovdqa  %%CTR, %%XMM8
-
-                vpshufb  %%XMM1, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM2, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM3, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM4, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM5, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM6, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM7, [rel SHUF_MASK]    ; perform a 16Byte swap
-                vpshufb  %%XMM8, [rel SHUF_MASK]    ; perform a 16Byte swap
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
-                vpxor    %%XMM1, %%XMM1, %%T_key
-                vpxor    %%XMM2, %%XMM2, %%T_key
-                vpxor    %%XMM3, %%XMM3, %%T_key
-                vpxor    %%XMM4, %%XMM4, %%T_key
-                vpxor    %%XMM5, %%XMM5, %%T_key
-                vpxor    %%XMM6, %%XMM6, %%T_key
-                vpxor    %%XMM7, %%XMM7, %%T_key
-                vpxor    %%XMM8, %%XMM8, %%T_key
-
-%assign i (8-%%num_initial_blocks)
-%assign j (9-%%num_initial_blocks)
-%assign k (%%num_initial_blocks)
-
-%define %%T4_2 %%T4
-%if(%%num_initial_blocks>0)
-        ;; Hash in AES state
-        ;; T2 - incoming AAD hash
-        vpxor %%T2, %%T3
-
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, first
-%endif
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*1]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*2]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>1)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*3]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*4]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>2)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>3)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*5]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*6]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>4)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*7]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*8]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>5)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*9]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-%ifndef GCM128_MODE
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*10]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>6)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-%ifdef GCM128_MODE
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*10]
-                vaesenclast  %%XMM1, %%T_key
-                vaesenclast  %%XMM2, %%T_key
-                vaesenclast  %%XMM3, %%T_key
-                vaesenclast  %%XMM4, %%T_key
-                vaesenclast  %%XMM5, %%T_key
-                vaesenclast  %%XMM6, %%T_key
-                vaesenclast  %%XMM7, %%T_key
-                vaesenclast  %%XMM8, %%T_key
-%endif
-
-%ifdef GCM192_MODE
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*11]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu          %%T_key, [%%GDATA_KEY+16*12]
-                vaesenclast      %%XMM1, %%T_key
-                vaesenclast      %%XMM2, %%T_key
-                vaesenclast      %%XMM3, %%T_key
-                vaesenclast      %%XMM4, %%T_key
-                vaesenclast      %%XMM5, %%T_key
-                vaesenclast      %%XMM6, %%T_key
-                vaesenclast      %%XMM7, %%T_key
-                vaesenclast      %%XMM8, %%T_key
-%endif
-%ifdef GCM256_MODE
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*11]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu          %%T_key, [%%GDATA_KEY+16*12]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%if(%%num_initial_blocks>7)
-        ;;                 GDATA,       HASHKEY, CIPHER,
-        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
-        vmovdqu         %%T2, [rsp + TMP %+ j]
-        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
-                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
-%endif
-
-%ifdef GCM256_MODE             ; GCM256
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*13]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-
-                vmovdqu          %%T_key, [%%GDATA_KEY+16*14]
-                vaesenclast      %%XMM1, %%T_key
-                vaesenclast      %%XMM2, %%T_key
-                vaesenclast      %%XMM3, %%T_key
-                vaesenclast      %%XMM4, %%T_key
-                vaesenclast      %%XMM5, %%T_key
-                vaesenclast      %%XMM6, %%T_key
-                vaesenclast      %%XMM7, %%T_key
-                vaesenclast      %%XMM8, %%T_key
-%endif                          ;  GCM256 mode
-
-%if(%%num_initial_blocks>0)
-        vpsrldq %%T3, %%T6, 8            ; shift-R %%T2 2 DWs
-        vpslldq %%T6, %%T6, 8            ; shift-L %%T3 2 DWs
-        vpxor   %%T1, %%T1, %%T3         ; accumulate the results in %%T1:%%T4
-        vpxor   %%T4, %%T6, %%T4
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ; First phase of the reduction
-        vmovdqa         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%T4, 0x01
-        vpslldq         %%T2, %%T2, 8             ; shift-L xmm2 2 DWs
-
-        ;; First phase of the reduction complete
-        vpxor           %%T4, %%T4, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ; Second phase of the reduction
-        vpclmulqdq      %%T2, %%T3, %%T4, 0x00
-        ;; Shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-        vpsrldq         %%T2, %%T2, 4
-
-        vpclmulqdq      %%T4, %%T3, %%T4, 0x10
-        ;; Shift-L xmm0 1 DW (Shift-L 1-DW to obtain result with no shifts)
-        vpslldq         %%T4, %%T4, 4
-        ;; Second phase of the reduction complete
-        vpxor           %%T4, %%T4, %%T2
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ; The result is in %%T3
-        vpxor           %%T3, %%T1, %%T4
-%else
-        ;; The hash should end up in T3
-        vmovdqa  %%T3, %%T2
-%endif
-
-        ;; Final hash is now in T3
-%if %%num_initial_blocks > 0
-        ;; NOTE: obsolete in case %%num_initial_blocks = 0
-        sub     %%LENGTH, 16*%%num_initial_blocks
-%endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*0]
-                vpxor    %%XMM1, %%XMM1, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*0], %%XMM1
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM1, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*1]
-                vpxor    %%XMM2, %%XMM2, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*1], %%XMM2
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM2, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*2]
-                vpxor    %%XMM3, %%XMM3, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*2], %%XMM3
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM3, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*3]
-                vpxor    %%XMM4, %%XMM4, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*3], %%XMM4
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM4, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*4]
-                vpxor    %%XMM5, %%XMM5, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*4], %%XMM5
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM5, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*5]
-                vpxor    %%XMM6, %%XMM6, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*5], %%XMM6
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM6, %%T1
-                %endif
-
-               VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*6]
-                vpxor    %%XMM7, %%XMM7, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*6], %%XMM7
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM7, %%T1
-                %endif
-
-%if %%num_initial_blocks > 0
-                ;; NOTE: 'jl' is never taken for %%num_initial_blocks = 0
-                ;;      This macro is executed for length 128 and up,
-                ;;      zero length is checked in GCM_ENC_DEC.
-                ;; If the last block is partial then the xor will be done later
-                ;; in ENCRYPT_FINAL_PARTIAL_BLOCK.
-                ;; We know it's partial if LENGTH - 16*num_initial_blocks < 128
-                cmp %%LENGTH, 128
-                jl %%_initial_skip_last_word_write
-%endif
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*7]
-                vpxor    %%XMM8, %%XMM8, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*7], %%XMM8
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM8, %%T1
-                %endif
-
-                ;; Update %%LENGTH with the number of blocks processed
-                sub     %%LENGTH, 16
-                add     %%DATA_OFFSET, 16
-%%_initial_skip_last_word_write:
-                sub     %%LENGTH, 128-16
-                add     %%DATA_OFFSET, 128-16
-
-                vpshufb  %%XMM1, [rel SHUF_MASK]             ; perform a 16Byte swap
-                ;; Combine GHASHed value with the corresponding ciphertext
-                vpxor    %%XMM1, %%XMM1, %%T3
-                vpshufb  %%XMM2, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM3, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM4, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM5, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM6, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM7, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM8, [rel SHUF_MASK]             ; perform a 16Byte swap
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%%_initial_blocks_done:
-
-%endmacro
-
-;;; INITIAL_BLOCKS macro with support for a partial final block.
-;;; num_initial_blocks is expected to include the partial final block
-;;;     in the count.
-%macro INITIAL_BLOCKS_PARTIAL 25
-%define %%GDATA_KEY             %1
-%define %%GDATA_CTX             %2
-%define %%CYPH_PLAIN_OUT        %3
-%define %%PLAIN_CYPH_IN         %4
-%define %%LENGTH                %5
-%define %%DATA_OFFSET           %6
-%define %%num_initial_blocks    %7  ; can be 1, 2, 3, 4, 5, 6 or 7 (not 0)
-%define %%T1                    %8
-%define %%T2                    %9
-%define %%T3                    %10
-%define %%T4                    %11
-%define %%T5                    %12
-%define %%CTR                   %13
-%define %%XMM1                  %14
-%define %%XMM2                  %15
-%define %%XMM3                  %16
-%define %%XMM4                  %17
-%define %%XMM5                  %18
-%define %%XMM6                  %19
-%define %%XMM7                  %20
-%define %%XMM8                  %21
-%define %%T6                    %22
-%define %%T_key                 %23
-%define %%ENC_DEC               %24
-%define %%INSTANCE_TYPE         %25
-
-%assign i (8-%%num_initial_blocks)
-                ;; Move AAD_HASH to temp reg
-                vmovdqu  %%T2, %%XMM8
-                ;; vmovdqu  %%CTR, [%%GDATA_CTX + CurCount]  ; %%CTR = Y0
-
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                ;; Compute AES counters
-                vpaddd   %%CTR, %%CTR, [rel ONE]     ; INCR Y0
-                vmovdqa  reg(i), %%CTR
-                vpshufb  reg(i), [rel SHUF_MASK]     ; perform a 16Byte swap
-%assign i (i+1)
-%endrep
-
-vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                ; Start AES for %%num_initial_blocks blocks
-                vpxor    reg(i),reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign j 1
-%rep NROUNDS
-vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vaesenc  reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign j (j+1)
-%endrep
-
-vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vaesenclast      reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;; Hash all but the last block of data
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks-1
-                ;; Encrypt the message for all but the last block
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-                vpxor    reg(i), reg(i), %%T1
-                ;; write back ciphertext for %%num_initial_blocks blocks
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
-                add     %%DATA_OFFSET, 16
-                %ifidn  %%ENC_DEC, DEC
-                    vmovdqa  reg(i), %%T1
-                %endif
-                ;; Prepare ciphertext for GHASH computations
-                vpshufb  reg(i), [rel SHUF_MASK]
-%assign i (i+1)
-%endrep
-
-                ;; The final block of data may be <16B
-                sub      %%LENGTH, 16*(%%num_initial_blocks-1)
-
-%if %%num_initial_blocks < 8
-                ;; NOTE: the 'jl' is always taken for num_initial_blocks = 8.
-                ;;      This is run in the context of GCM_ENC_DEC_SMALL for length < 128.
-                cmp      %%LENGTH, 16
-                jl       %%_small_initial_partial_block
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;; Handle a full length final block - encrypt and hash all blocks
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                sub      %%LENGTH, 16
-	        mov	[%%GDATA_CTX + PBlockLen], %%LENGTH
-
-                ;; Encrypt the message
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-                vpxor    reg(i), reg(i), %%T1
-                ;; write back ciphertext for %%num_initial_blocks blocks
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
-                add     %%DATA_OFFSET, 16
-                %ifidn  %%ENC_DEC, DEC
-                    vmovdqa  reg(i), %%T1
-                %endif
-                ;; Prepare ciphertext for GHASH computations
-                vpshufb  reg(i), [rel SHUF_MASK]
-
-        ;; Hash all of the data
-%assign i (8-%%num_initial_blocks)
-%assign j (9-%%num_initial_blocks)
-%assign k (%%num_initial_blocks)
-%assign last_block_to_hash 0
-
-%if(%%num_initial_blocks>last_block_to_hash)
-        ;; Hash in AES state
-        vpxor %%T2, reg(j)
-
-        ;; T2 - incoming AAD hash
-        ;; reg(i) holds ciphertext
-        ;; T5 - hash key
-        ;; T6 - updated xor
-        ;; reg(1)/xmm1 should now be available for tmp use
-        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
-        vpclmulqdq      %%T1, %%T2, %%T5, 0x11             ; %%T4 = a1*b1
-        vpclmulqdq      %%T4, %%T2, %%T5, 0x00             ; %%T4 = a0*b0
-        vpclmulqdq      %%T6, %%T2, %%T5, 0x01             ; %%T6 = a1*b0
-        vpclmulqdq      %%T5, %%T2, %%T5, 0x10             ; %%T5 = a0*b1
-        vpxor           %%T6, %%T6, %%T5
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%assign rep_count (%%num_initial_blocks-1)
-%rep rep_count
-
-        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x11
-        vpxor           %%T1, %%T1, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x00
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%endrep
-
-        ;; Record that a reduction is needed
-        mov            r12, 1
-
-        jmp      %%_small_initial_compute_hash
-
-%endif                          ; %if %%num_initial_blocks < 8
-
-%%_small_initial_partial_block:
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;; Handle ghash for a <16B final block
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        ;; In this case if it's a single call to encrypt we can
-        ;; hash all of the data but if it's an init / update / finalize
-        ;; series of call we need to leave the last block if it's
-        ;; less than a full block of data.
-
-	mov	[%%GDATA_CTX + PBlockLen], %%LENGTH
-        vmovdqu [%%GDATA_CTX + PBlockEncKey], reg(i)
-        ;; Handle a partial final block
-        ;;                            GDATA,    KEY,   T1,   T2
-        ;; r13 - length
-        ;; LT16 - indicates type of read and that the buffer is less than 16 bytes long
-        ;;      NOTE: could be replaced with %%LENGTH but at this point
-        ;;      %%LENGTH is always less than 16.
-        ;;      No PLAIN_CYPH_LEN argument available in this macro.
-        ENCRYPT_FINAL_PARTIAL_BLOCK reg(i), %%T1, %%T3, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, LT16, %%ENC_DEC, %%DATA_OFFSET
-        vpshufb  reg(i), [rel SHUF_MASK]
-
-%ifidn %%INSTANCE_TYPE, multi_call
-%assign i (8-%%num_initial_blocks)
-%assign j (9-%%num_initial_blocks)
-%assign k (%%num_initial_blocks-1)
-%assign last_block_to_hash 1
-%else
-%assign i (8-%%num_initial_blocks)
-%assign j (9-%%num_initial_blocks)
-%assign k (%%num_initial_blocks)
-%assign last_block_to_hash 0
-%endif
-
-%if(%%num_initial_blocks>last_block_to_hash)
-        ;; Record that a reduction is needed
-        mov            r12, 1
-        ;; Hash in AES state
-        vpxor          %%T2, reg(j)
-
-        ;; T2 - incoming AAD hash
-        ;; reg(i) holds ciphertext
-        ;; T5 - hash key
-        ;; T6 - updated xor
-        ;; reg(1)/xmm1 should now be available for tmp use
-        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
-        vpclmulqdq      %%T1, %%T2, %%T5, 0x11             ; %%T4 = a1*b1
-        vpclmulqdq      %%T4, %%T2, %%T5, 0x00             ; %%T4 = a0*b0
-        vpclmulqdq      %%T6, %%T2, %%T5, 0x01             ; %%T6 = a1*b0
-        vpclmulqdq      %%T5, %%T2, %%T5, 0x10             ; %%T5 = a0*b1
-        vpxor           %%T6, %%T6, %%T5
-%else
-        ;; Record that a reduction is not needed -
-        ;; In this case no hashes are computed because there
-        ;; is only one initial block and it is < 16B in length.
-        mov            r12, 0
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%ifidn %%INSTANCE_TYPE, multi_call
-%assign rep_count (%%num_initial_blocks-2)
-%%_multi_call_hash:
-%else
-%assign rep_count (%%num_initial_blocks-1)
-%endif
-
-%if rep_count < 0
-        ;; quick fix for negative rep_count (to be investigated)
-%assign rep_count 0
-%endif
-
-%rep rep_count
-
-        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x11
-        vpxor           %%T1, %%T1, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x00
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, reg(j), %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-%assign i (i+1)
-%assign j (j+1)
-%assign k (k-1)
-%endrep
-
-%%_small_initial_compute_hash:
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;;; Ghash reduction
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%if(%%num_initial_blocks=1)
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; We only need to check if a reduction is needed if
-        ;; initial_blocks == 1 and init/update/final is being used.
-        ;; In this case we may just have a partial block, and that
-        ;; gets hashed in finalize.
-        cmp     r12, 0
-        je      %%_no_reduction_needed
-%endif
-%endif
-
-        vpsrldq %%T3, %%T6, 8          ; shift-R %%T2 2 DWs
-        vpslldq %%T6, %%T6, 8          ; shift-L %%T3 2 DWs
-        vpxor   %%T1, %%T1, %%T3       ; accumulate the results in %%T1:%%T4
-        vpxor   %%T4, %%T6, %%T4
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;; First phase of the reduction
-        vmovdqa         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%T4, 0x01
-        ;; shift-L xmm2 2 DWs
-        vpslldq         %%T2, %%T2, 8
-        vpxor           %%T4, %%T4, %%T2
-
-        ;; First phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;; Second phase of the reduction
-
-        vpclmulqdq      %%T2, %%T3, %%T4, 0x00
-        ;; Shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-        vpsrldq         %%T2, %%T2, 4
-
-        vpclmulqdq      %%T4, %%T3, %%T4, 0x10
-        ;; Shift-L xmm0 1 DW (Shift-L 1-DW to obtain result with no shifts)
-        vpslldq         %%T4, %%T4, 4
-
-        vpxor           %%T4, %%T4, %%T2
-        ;; Second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%T3, %%T1, %%T4
-
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; If using init/update/finalize, we need to xor any partial block data
-        ;; into the hash.
-%if %%num_initial_blocks > 1
-        ;; NOTE: for %%num_initial_blocks = 0 the xor never takes place
-%if %%num_initial_blocks != 8
-        ;; NOTE: for %%num_initial_blocks = 8, %%LENGTH, stored in [PBlockLen] is never zero
-        cmp             qword [%%GDATA_CTX + PBlockLen], 0
-        je              %%_no_partial_block_xor
-%endif                          ; %%num_initial_blocks != 8
-        vpxor           %%T3, %%T3, reg(8)
-%%_no_partial_block_xor:
-%endif                          ; %%num_initial_blocks > 1
-%endif                          ; %%INSTANCE_TYPE, multi_call
-
-%if(%%num_initial_blocks=1)
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; NOTE: %%_no_reduction_needed case only valid for
-        ;;      multi_call with initial_blocks = 1.
-        ;; Look for comment above around '_no_reduction_needed'
-        ;; The jmp below is obsolete as the code will fall through.
-
-        ;; The result is in %%T3
-        jmp             %%_after_reduction
-
-%%_no_reduction_needed:
-        ;; The hash should end up in T3. The only way we should get here is if
-        ;; there is a partial block of data, so xor that into the hash.
-        vpxor            %%T3, %%T2, reg(8)
-%endif                          ; %%INSTANCE_TYPE = multi_call
-%endif                          ; %%num_initial_blocks=1
-
-%%_after_reduction:
-        ;; Final hash is now in T3
-
-%endmacro                       ; INITIAL_BLOCKS_PARTIAL
-
-; encrypt 8 blocks at a time
-; ghash the 8 previously encrypted ciphertext blocks
-; %%GDATA (KEY), %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN are used as pointers only, not modified
-; %%DATA_OFFSET is the data offset value
-%macro  GHASH_8_ENCRYPT_8_PARALLEL 23
-%define %%GDATA                 %1
-%define %%CYPH_PLAIN_OUT        %2
-%define %%PLAIN_CYPH_IN         %3
-%define %%DATA_OFFSET           %4
-%define %%T1    %5
-%define %%T2    %6
-%define %%T3    %7
-%define %%T4    %8
-%define %%T5    %9
-%define %%T6    %10
-%define %%CTR   %11
-%define %%XMM1  %12
-%define %%XMM2  %13
-%define %%XMM3  %14
-%define %%XMM4  %15
-%define %%XMM5  %16
-%define %%XMM6  %17
-%define %%XMM7  %18
-%define %%XMM8  %19
-%define %%T7    %20
-%define %%loop_idx      %21
-%define %%ENC_DEC       %22
-%define %%FULL_PARTIAL  %23
-
-        vmovdqa %%T2, %%XMM1
-        vmovdqu [rsp + TMP2], %%XMM2
-        vmovdqu [rsp + TMP3], %%XMM3
-        vmovdqu [rsp + TMP4], %%XMM4
-        vmovdqu [rsp + TMP5], %%XMM5
-        vmovdqu [rsp + TMP6], %%XMM6
-        vmovdqu [rsp + TMP7], %%XMM7
-        vmovdqu [rsp + TMP8], %%XMM8
-
-%ifidn %%loop_idx, in_order
-                vpaddd  %%XMM1, %%CTR,  [rel ONE]           ; INCR CNT
-                vmovdqa %%T5, [rel TWO]
-                vpaddd  %%XMM2, %%CTR, %%T5
-                vpaddd  %%XMM3, %%XMM1, %%T5
-                vpaddd  %%XMM4, %%XMM2, %%T5
-                vpaddd  %%XMM5, %%XMM3, %%T5
-                vpaddd  %%XMM6, %%XMM4, %%T5
-                vpaddd  %%XMM7, %%XMM5, %%T5
-                vpaddd  %%XMM8, %%XMM6, %%T5
-                vmovdqa %%CTR, %%XMM8
-
-                vmovdqa %%T5, [rel SHUF_MASK]
-                vpshufb %%XMM1, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM2, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM3, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM4, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM5, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM6, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM7, %%T5             ; perform a 16Byte swap
-                vpshufb %%XMM8, %%T5             ; perform a 16Byte swap
-%else
-                vpaddd  %%XMM1, %%CTR,  [rel ONEf]          ; INCR CNT
-                vmovdqa %%T5, [rel TWOf]
-                vpaddd  %%XMM2, %%CTR,  %%T5
-                vpaddd  %%XMM3, %%XMM1, %%T5
-                vpaddd  %%XMM4, %%XMM2, %%T5
-                vpaddd  %%XMM5, %%XMM3, %%T5
-                vpaddd  %%XMM6, %%XMM4, %%T5
-                vpaddd  %%XMM7, %%XMM5, %%T5
-                vpaddd  %%XMM8, %%XMM6, %%T5
-                vmovdqa %%CTR, %%XMM8
-%endif
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                vmovdqu %%T1, [%%GDATA + 16*0]
-                vpxor   %%XMM1, %%XMM1, %%T1
-                vpxor   %%XMM2, %%XMM2, %%T1
-                vpxor   %%XMM3, %%XMM3, %%T1
-                vpxor   %%XMM4, %%XMM4, %%T1
-                vpxor   %%XMM5, %%XMM5, %%T1
-                vpxor   %%XMM6, %%XMM6, %%T1
-                vpxor   %%XMM7, %%XMM7, %%T1
-                vpxor   %%XMM8, %%XMM8, %%T1
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                vmovdqu %%T1, [%%GDATA + 16*1]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-                vmovdqu %%T1, [%%GDATA + 16*2]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_8]
-        vpclmulqdq      %%T4, %%T2, %%T5, 0x11                  ; %%T4 = a1*b1
-        vpclmulqdq      %%T7, %%T2, %%T5, 0x00                  ; %%T7 = a0*b0
-        vpclmulqdq      %%T6, %%T2, %%T5, 0x01                  ; %%T6 = a1*b0
-        vpclmulqdq      %%T5, %%T2, %%T5, 0x10                  ; %%T5 = a0*b1
-        vpxor           %%T6, %%T6, %%T5
-
-                vmovdqu %%T1, [%%GDATA + 16*3]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP2]
-        vmovdqu         %%T5, [%%GDATA + HashKey_7]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*4]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vmovdqu         %%T1, [rsp + TMP3]
-        vmovdqu         %%T5, [%%GDATA + HashKey_6]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*5]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP4]
-        vmovdqu         %%T5, [%%GDATA + HashKey_5]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*6]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP5]
-        vmovdqu         %%T5, [%%GDATA + HashKey_4]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*7]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP6]
-        vmovdqu         %%T5, [%%GDATA + HashKey_3]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*8]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP7]
-        vmovdqu         %%T5, [%%GDATA + HashKey_2]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                vmovdqu %%T5, [%%GDATA + 16*9]
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-        vmovdqu         %%T1, [rsp + TMP8]
-        vmovdqu         %%T5, [%%GDATA + HashKey]
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T1, %%T4, %%T3
-
-                vmovdqu %%T5, [%%GDATA + 16*10]
- %ifndef GCM128_MODE            ; GCM192 or GCM256
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-                vmovdqu %%T5, [%%GDATA + 16*11]
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-                vmovdqu %%T5, [%%GDATA + 16*12]
-%endif
-%ifdef GCM256_MODE
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-                vmovdqu %%T5, [%%GDATA + 16*13]
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-                vmovdqu %%T5, [%%GDATA + 16*14]
-%endif                          ; GCM256
-
-%assign i 0
-%assign j 1
-%rep 8
-
-        ;; SNP TBD: This is pretty ugly - consider whether just XORing the
-        ;; data in after vaesenclast is simpler and performant. Would
-        ;; also have to ripple it through partial block and ghash_mul_8.
-%ifidn %%FULL_PARTIAL, full
-    %ifdef  NT_LD
-        VXLDR   %%T2, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-        vpxor   %%T2, %%T2, %%T5
-    %else
-        vpxor   %%T2, %%T5, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-    %endif
-
-    %ifidn %%ENC_DEC, ENC
-        vaesenclast     reg(j), reg(j), %%T2
-    %else
-        vaesenclast     %%T3, reg(j), %%T2
-        vpxor   reg(j), %%T2, %%T5
-        VXSTR [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*i], %%T3
-    %endif
-
-%else
-    ; Don't read the final data during partial block processing
-    %ifdef  NT_LD
-        %if (i<7)
-            VXLDR   %%T2, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-            vpxor   %%T2, %%T2, %%T5
-        %else
-            ;; Stage the key directly in T2 rather than hash it with plaintext
-            vmovdqu %%T2, %%T5
-        %endif
-    %else
-        %if (i<7)
-            vpxor   %%T2, %%T5, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-        %else
-            ;; Stage the key directly in T2 rather than hash it with plaintext
-            vmovdqu %%T2, %%T5
-        %endif
-    %endif
-
-    %ifidn %%ENC_DEC, ENC
-        vaesenclast     reg(j), reg(j), %%T2
-    %else
-        %if (i<7)
-            vaesenclast     %%T3, reg(j), %%T2
-            vpxor   reg(j), %%T2, %%T5
-            ;; Do not read the data since it could fault
-            VXSTR [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*i], %%T3
-        %else
-            vaesenclast     reg(j), reg(j), %%T2
-        %endif
-    %endif
-%endif
-
-%assign i (i+1)
-%assign j (j+1)
-%endrep
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        vpslldq %%T3, %%T6, 8                                   ; shift-L %%T3 2 DWs
-        vpsrldq %%T6, %%T6, 8                                   ; shift-R %%T2 2 DWs
-        vpxor   %%T7, %%T7, %%T3
-        vpxor   %%T1, %%T1, %%T6                                ; accumulate the results in %%T1:%%T7
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqa         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x01
-        vpslldq         %%T2, %%T2, 8                           ; shift-L xmm2 2 DWs
-
-        vpxor           %%T7, %%T7, %%T2                        ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-    %ifidn %%ENC_DEC, ENC
-        ; Write to the Ciphertext buffer
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*0], %%XMM1
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*1], %%XMM2
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*2], %%XMM3
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*3], %%XMM4
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*4], %%XMM5
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*5], %%XMM6
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*6], %%XMM7
-        %ifidn %%FULL_PARTIAL, full
-            ;; Avoid writing past the buffer if handling a partial block
-            VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*7], %%XMM8
-        %endif
-    %endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x00
-        vpsrldq         %%T2, %%T2, 4                                   ; shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%T4, %%T3, %%T7, 0x10
-        vpslldq         %%T4, %%T4, 4                                   ; shift-L xmm0 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%T4, %%T4, %%T2                                ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%T1, %%T1, %%T4                                ; the result is in %%T1
-
-                vpshufb %%XMM1, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM2, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM3, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM4, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM5, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM6, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM7, [rel SHUF_MASK]             ; perform a 16Byte swap
-        vpshufb %%XMM8, [rel SHUF_MASK]             ; perform a 16Byte swap
-
-        vpxor   %%XMM1, %%T1
-
-%endmacro                       ; GHASH_8_ENCRYPT_8_PARALLEL
-
-; GHASH the last 4 ciphertext blocks.
-%macro  GHASH_LAST_8 16
-%define %%GDATA %1
-%define %%T1    %2
-%define %%T2    %3
-%define %%T3    %4
-%define %%T4    %5
-%define %%T5    %6
-%define %%T6    %7
-%define %%T7    %8
-%define %%XMM1  %9
-%define %%XMM2  %10
-%define %%XMM3  %11
-%define %%XMM4  %12
-%define %%XMM5  %13
-%define %%XMM6  %14
-%define %%XMM7  %15
-%define %%XMM8  %16
-
-        ;; Karatsuba Method
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_8]
-
-        vpshufd         %%T2, %%XMM1, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM1
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T6, %%XMM1, %%T5, 0x11
-        vpclmulqdq      %%T7, %%XMM1, %%T5, 0x00
-
-        vpclmulqdq      %%XMM1, %%T2, %%T3, 0x00
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_7]
-        vpshufd         %%T2, %%XMM2, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM2
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_6]
-        vpshufd         %%T2, %%XMM3, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM3
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_5]
-        vpshufd         %%T2, %%XMM4, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM4
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_4]
-        vpshufd         %%T2, %%XMM5, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM5
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_3]
-        vpshufd         %%T2, %%XMM6, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM6
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_2]
-        vpshufd         %%T2, %%XMM7, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM7
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey]
-        vpshufd         %%T2, %%XMM8, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM8
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM8, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM8, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-        vpxor           %%XMM1, %%XMM1, %%T6
-        vpxor           %%T2, %%XMM1, %%T7
-
-        vpslldq %%T4, %%T2, 8
-        vpsrldq %%T2, %%T2, 8
-
-        vpxor   %%T7, %%T7, %%T4
-        vpxor   %%T6, %%T6, %%T2                               ; <%%T6:%%T7> holds the result of the accumulated carry-less multiplications
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqa         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x01
-        vpslldq         %%T2, %%T2, 8                           ; shift-L xmm2 2 DWs
-
-        vpxor           %%T7, %%T7, %%T2                        ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        ;second phase of the reduction
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x00
-        vpsrldq         %%T2, %%T2, 4                           ; shift-R %%T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%T4, %%T3, %%T7, 0x10
-        vpslldq         %%T4, %%T4, 4                           ; shift-L %%T4 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%T4, %%T4, %%T2                        ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%T6, %%T6, %%T4                        ; the result is in %%T6
-%endmacro
-
-; GHASH the last 4 ciphertext blocks.
-%macro  GHASH_LAST_7 15
-%define %%GDATA %1
-%define %%T1    %2
-%define %%T2    %3
-%define %%T3    %4
-%define %%T4    %5
-%define %%T5    %6
-%define %%T6    %7
-%define %%T7    %8
-%define %%XMM1  %9
-%define %%XMM2  %10
-%define %%XMM3  %11
-%define %%XMM4  %12
-%define %%XMM5  %13
-%define %%XMM6  %14
-%define %%XMM7  %15
-
-        ;; Karatsuba Method
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_7]
-
-        vpshufd         %%T2, %%XMM1, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM1
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T6, %%XMM1, %%T5, 0x11
-        vpclmulqdq      %%T7, %%XMM1, %%T5, 0x00
-
-        vpclmulqdq      %%XMM1, %%T2, %%T3, 0x00
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_6]
-        vpshufd         %%T2, %%XMM2, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM2
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_5]
-        vpshufd         %%T2, %%XMM3, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM3
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_4]
-        vpshufd         %%T2, %%XMM4, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM4
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_3]
-        vpshufd         %%T2, %%XMM5, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM5
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_2]
-        vpshufd         %%T2, %%XMM6, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM6
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_1]
-        vpshufd         %%T2, %%XMM7, 01001110b
-        vpshufd         %%T3, %%T5, 01001110b
-        vpxor           %%T2, %%T2, %%XMM7
-        vpxor           %%T3, %%T3, %%T5
-
-        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vpxor           %%XMM1, %%XMM1, %%T6
-        vpxor           %%T2, %%XMM1, %%T7
-
-        vpslldq %%T4, %%T2, 8
-        vpsrldq %%T2, %%T2, 8
-
-        vpxor   %%T7, %%T7, %%T4
-        vpxor   %%T6, %%T6, %%T2                               ; <%%T6:%%T7> holds the result of the accumulated carry-less multiplications
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqa         %%T3, [rel POLY2]
-
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x01
-        vpslldq         %%T2, %%T2, 8                           ; shift-L xmm2 2 DWs
-
-        vpxor           %%T7, %%T7, %%T2                        ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        ;second phase of the reduction
-        vpclmulqdq      %%T2, %%T3, %%T7, 0x00
-        vpsrldq         %%T2, %%T2, 4                           ; shift-R %%T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%T4, %%T3, %%T7, 0x10
-        vpslldq         %%T4, %%T4, 4                           ; shift-L %%T4 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%T4, %%T4, %%T2                        ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%T6, %%T6, %%T4                        ; the result is in %%T6
-%endmacro
-
-;;; Handle encryption of the final partial block
-;;; IN:
-;;;   r13  - Number of bytes to read
-;;; MODIFIES:
-;;;   KEY  - Key for encrypting the partial block
-;;;   HASH - Current hash value
-;;; SMASHES:
-;;;   r10, r12, r15, rax
-;;;   T1, T2
-;;; Note:
-;;;   PLAIN_CYPH_LEN, %7, is passed only to determine
-;;;   if buffer is big enough to do a 16 byte read & shift.
-;;;     'LT16' is passed here only if buffer is known to be smaller
-;;;     than 16 bytes.
-;;;     Any other value passed here will result in 16 byte read
-;;;     code path.
-;;; TBD: Remove HASH from the instantiation
-%macro  ENCRYPT_FINAL_PARTIAL_BLOCK 8
-%define %%KEY             %1
-%define %%T1              %2
-%define %%T2              %3
-%define %%CYPH_PLAIN_OUT  %4
-%define %%PLAIN_CYPH_IN   %5
-%define %%PLAIN_CYPH_LEN  %6
-%define %%ENC_DEC         %7
-%define %%DATA_OFFSET     %8
-
-        ;; NOTE: type of read tuned based %%PLAIN_CYPH_LEN setting
-%ifidn %%PLAIN_CYPH_LEN, LT16
-        ;; Handle the case where the message is < 16 bytes
-        lea      r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-
-        ;; T1            - packed output
-        ;; r10           - input data address
-        ;; r13           - input data length
-        ;; r12, r15, rax - temp registers
-        READ_SMALL_DATA_INPUT_AVX   %%T1, r10, r13, r12, r15, rax
-
-        lea      r12, [SHIFT_MASK + 16]
-        sub      r12, r13
-%else
-        ;; Handle the case where the message is >= 16 bytes
-        sub      %%DATA_OFFSET, 16
-        add      %%DATA_OFFSET, r13
-        ;; Receive the last <16 Byte block
-        vmovdqu  %%T1, [%%PLAIN_CYPH_IN+%%DATA_OFFSET]
-        sub      %%DATA_OFFSET, r13
-        add      %%DATA_OFFSET, 16
-
-        lea      r12, [SHIFT_MASK + 16]
-        ;; Adjust the shuffle mask pointer to be able to shift 16-r13 bytes
-        ;; (r13 is the number of bytes in plaintext mod 16)
-        sub      r12, r13
-        ;; Get the appropriate shuffle mask
-        vmovdqu  %%T2, [r12]
-        ;; shift right 16-r13 bytes
-        vpshufb  %%T1, %%T2
-%endif                          ; %%PLAIN_CYPH_LEN, LT16
-
-        ;; At this point T1 contains the partial block data
-%ifidn  %%ENC_DEC, DEC
-        ;; Plaintext XOR E(K, Yn)
-        ;; Set aside the ciphertext
-        vmovdqa  %%T2, %%T1
-        vpxor    %%KEY, %%KEY, %%T1
-        ;; Get the appropriate mask to mask out top 16-r13 bytes of ciphertext
-        vmovdqu  %%T1, [r12 + ALL_F - SHIFT_MASK]
-        ;; Mask out top 16-r13 bytes of ciphertext
-        vpand    %%KEY, %%KEY, %%T1
-
-        ;; Prepare the ciphertext for the hash
-        ;; mask out top 16-r13 bytes of the plaintext
-        vpand    %%T2, %%T2, %%T1
-%else
-        ;; Plaintext XOR E(K, Yn)
-        vpxor    %%KEY, %%KEY, %%T1
-        ;; Get the appropriate mask to mask out top 16-r13 bytes of %%KEY
-        vmovdqu  %%T1, [r12 + ALL_F - SHIFT_MASK]
-        ;; Mask out top 16-r13 bytes of %%KEY
-        vpand    %%KEY, %%KEY, %%T1
-%endif
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;; Output r13 Bytes
-        vmovq   rax, %%KEY
-        cmp     r13, 8
-        jle     %%_less_than_8_bytes_left
-
-        mov     [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], rax
-        add     %%DATA_OFFSET, 8
-        vpsrldq %%T1, %%KEY, 8
-        vmovq   rax, %%T1
-        sub     r13, 8
-
-%%_less_than_8_bytes_left:
-        mov     BYTE [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], al
-        add     %%DATA_OFFSET, 1
-        shr     rax, 8
-        sub     r13, 1
-        jne     %%_less_than_8_bytes_left
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%ifidn  %%ENC_DEC, DEC
-        ;; If decrypt, restore the ciphertext into %%KEY
-        vmovdqu %%KEY, %%T2
-%endif
-%endmacro                       ; ENCRYPT_FINAL_PARTIAL_BLOCK
-
-; Encryption of a single block
-%macro  ENCRYPT_SINGLE_BLOCK 2
-%define %%GDATA %1
-%define %%XMM0  %2
-
-                vpxor    %%XMM0, %%XMM0, [%%GDATA+16*0]
-%assign i 1
-%rep NROUNDS
-                vaesenc  %%XMM0, [%%GDATA+16*i]
-%assign i (i+1)
-%endrep
-                vaesenclast      %%XMM0, [%%GDATA+16*i]
-%endmacro
-
-;; Start of Stack Setup
-
-%macro FUNC_SAVE 0-1
-	;; Required for Update/GCM_ENC
-        mov     rax, rsp
-
-%if %0 == 0
-	sub     rsp, VARIABLE_OFFSET
-%else
-%ifidni %1, alloc_context
-        sub     rsp, VARIABLE_OFFSET + CONTEXT_SIZE
-%endif
-%endif
-	and     rsp, ~63
-
-        mov     [rsp + GP_OFFSET + 0*8], rax ; original rsp pointer
-        mov     [rsp + GP_OFFSET + 1*8], r12
-        mov     [rsp + GP_OFFSET + 2*8], r13
-        mov     [rsp + GP_OFFSET + 3*8], r14
-        mov     [rsp + GP_OFFSET + 4*8], r15
-        mov     r14, rax
-
-%ifidn __OUTPUT_FORMAT__, win64
-        ; xmm6:xmm15 need to be maintained for Windows
-        vmovdqu [rsp + LOCAL_STORAGE + 0*16], xmm6
-        vmovdqu [rsp + LOCAL_STORAGE + 1*16], xmm7
-        vmovdqu [rsp + LOCAL_STORAGE + 2*16], xmm8
-        vmovdqu [rsp + LOCAL_STORAGE + 3*16], xmm9
-        vmovdqu [rsp + LOCAL_STORAGE + 4*16], xmm10
-        vmovdqu [rsp + LOCAL_STORAGE + 5*16], xmm11
-        vmovdqu [rsp + LOCAL_STORAGE + 6*16], xmm12
-        vmovdqu [rsp + LOCAL_STORAGE + 7*16], xmm13
-        vmovdqu [rsp + LOCAL_STORAGE + 8*16], xmm14
-        vmovdqu [rsp + LOCAL_STORAGE + 9*16], xmm15
-%endif
-%endmacro
-
-%macro FUNC_RESTORE 0
-
-%ifdef SAFE_DATA
-        clear_scratch_xmms_avx_asm
-%endif
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm15, [rsp + LOCAL_STORAGE + 9*16]
-        vmovdqu xmm14, [rsp + LOCAL_STORAGE + 8*16]
-        vmovdqu xmm13, [rsp + LOCAL_STORAGE + 7*16]
-        vmovdqu xmm12, [rsp + LOCAL_STORAGE + 6*16]
-        vmovdqu xmm11, [rsp + LOCAL_STORAGE + 5*16]
-        vmovdqu xmm10, [rsp + LOCAL_STORAGE + 4*16]
-        vmovdqu xmm9,  [rsp + LOCAL_STORAGE + 3*16]
-        vmovdqu xmm8,  [rsp + LOCAL_STORAGE + 2*16]
-        vmovdqu xmm7,  [rsp + LOCAL_STORAGE + 1*16]
-        vmovdqu xmm6,  [rsp + LOCAL_STORAGE + 0*16]
-%endif
-
-        ;; Required for Update/GCM_ENC
-        mov     r12, [rsp + GP_OFFSET + 1*8]
-        mov     r13, [rsp + GP_OFFSET + 2*8]
-        mov     r14, [rsp + GP_OFFSET + 3*8]
-        mov     r15, [rsp + GP_OFFSET + 4*8]
-        mov     rsp, [rsp + GP_OFFSET + 0*8]
-%endmacro
-
-%macro CALC_J0 15
-%define %%KEY           %1 ;; [in] Pointer to GCM KEY structure
-%define %%IV            %2 ;; [in] Pointer to IV
-%define %%IV_LEN        %3 ;; [in] IV length
-%define %%J0            %4 ;; [out] XMM reg to contain J0
-%define %%TMP0          %5 ;; [clobbered] Temporary GP reg
-%define %%TMP1          %6 ;; [clobbered] Temporary GP reg
-%define %%TMP2          %7 ;; [clobbered] Temporary GP reg
-%define %%TMP3          %8 ;; [clobbered] Temporary GP reg
-%define %%TMP4          %9 ;; [clobbered] Temporary GP reg
-%define %%XTMP0         %10 ;; [clobbered] Temporary XMM reg
-%define %%XTMP1         %11 ;; [clobbered] Temporary XMM reg
-%define %%XTMP2         %12 ;; [clobbered] Temporary XMM reg
-%define %%XTMP3         %13 ;; [clobbered] Temporary XMM reg
-%define %%XTMP4         %14 ;; [clobbered] Temporary XMM reg
-%define %%XTMP5         %15 ;; [clobbered] Temporary XMM reg
-
-        ;; J0 = GHASH(IV || 0s+64 || len(IV)64)
-        ;; s = 16 * RoundUp(len(IV)/16) -  len(IV) */
-
-        ;; Calculate GHASH of (IV || 0s)
-        vpxor   %%J0, %%J0
-        CALC_AAD_HASH %%IV, %%IV_LEN, %%J0, %%KEY, %%XTMP0, %%XTMP1, %%XTMP2, \
-                      %%XTMP3, %%XTMP4, %%XTMP5, %%TMP0, %%TMP1, %%TMP2, %%TMP3, %%TMP4
-
-        ;; Calculate GHASH of last 16-byte block (0 || len(IV)64)
-        vmovdqu %%XTMP0, [%%KEY + HashKey]
-        mov     %%TMP2, %%IV_LEN
-        shl     %%TMP2, 3 ;; IV length in bits
-        vmovq   %%XTMP1, %%TMP2
-        vpxor   %%J0, %%XTMP1
-        GHASH_MUL %%J0, %%XTMP0, %%XTMP1, %%XTMP2, %%XTMP3, %%XTMP4, %%XTMP5
-
-        vpshufb %%J0, [rel SHUF_MASK] ; perform a 16Byte swap
-%endmacro
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GCM_INIT initializes a gcm_context_data struct to prepare for encoding/decoding.
-; Input: gcm_key_data * (GDATA_KEY), gcm_context_data *(GDATA_CTX), IV, IV_LEN,
-; Additional Authentication data (A_IN), Additional Data length (A_LEN).
-; Output: Updated GDATA_CTX with the hash of A_IN (AadHash) and initialized other parts of GDATA.
-; Clobbers rax, r10-r13 and xmm0-xmm6
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  GCM_INIT        5-6
-%define %%GDATA_KEY     %1 ; [in] Pointer to GCM Key data structure
-%define %%GDATA_CTX     %2 ; [in/out] Pointer to GCM Context data structure
-%define %%IV            %3 ; [in] Pointer to IV
-%define %%A_IN	        %4 ; [in] Pointer to AAD
-%define %%A_LEN	        %5 ; [in] AAD length
-%define %%IV_LEN        %6 ; [in] IV length
-
-%define %%AAD_HASH      xmm14
-
-        mov     r10, %%A_LEN
-        cmp     r10, 0
-        je      %%_aad_is_zero
-
-        vpxor   %%AAD_HASH, %%AAD_HASH
-        CALC_AAD_HASH %%A_IN, %%A_LEN, %%AAD_HASH, %%GDATA_KEY, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, r10, r11, r12, r13, rax
-        jmp     %%_after_aad
-
-%%_aad_is_zero:
-        vpxor   %%AAD_HASH, %%AAD_HASH
-
-%%_after_aad:
-        mov     r10, %%A_LEN
-        vpxor   xmm2, xmm3
-
-        vmovdqu [%%GDATA_CTX + AadHash], %%AAD_HASH         ; ctx_data.aad hash = aad_hash
-        mov     [%%GDATA_CTX + AadLen], r10                 ; ctx_data.aad_length = aad_length
-        xor     r10, r10
-        mov     [%%GDATA_CTX + InLen], r10                  ; ctx_data.in_length = 0
-        mov     [%%GDATA_CTX + PBlockLen], r10              ; ctx_data.partial_block_length = 0
-        vmovdqu [%%GDATA_CTX + PBlockEncKey], xmm2          ; ctx_data.partial_block_enc_key = 0
-        mov     r10, %%IV
-%if %0 == 6 ;; IV is different than 12 bytes
-        CALC_J0 %%GDATA_KEY, %%IV, %%IV_LEN, xmm2, r10, r11, r12, r13, rax, xmm1, xmm0, \
-                xmm3, xmm4, xmm5, xmm6
-%else ;; IV is 12 bytes
-        vmovdqa xmm2, [rel ONEf]                        ; read 12 IV bytes and pad with 0x00000001
-        vpinsrq xmm2, [r10], 0
-        vpinsrd xmm2, [r10+8], 2
-%endif
-        vmovdqu [%%GDATA_CTX + OrigIV], xmm2                ; ctx_data.orig_IV = iv
-
-        vpshufb xmm2, [rel SHUF_MASK]
-
-        vmovdqu [%%GDATA_CTX + CurCount], xmm2              ; ctx_data.current_counter = iv
-%endmacro
-
-%macro  GCM_ENC_DEC_SMALL   12
-%define %%GDATA_KEY         %1
-%define %%GDATA_CTX         %2
-%define %%CYPH_PLAIN_OUT    %3
-%define %%PLAIN_CYPH_IN     %4
-%define %%PLAIN_CYPH_LEN    %5
-%define %%ENC_DEC           %6
-%define %%DATA_OFFSET       %7
-%define %%LENGTH            %8
-%define %%NUM_BLOCKS        %9
-%define %%CTR               %10
-%define %%HASH              %11
-%define %%INSTANCE_TYPE     %12
-
-        ;; NOTE: the check below is obsolete in current implementation. The check is already done in GCM_ENC_DEC.
-        ;; cmp     %%NUM_BLOCKS, 0
-        ;; je      %%_small_initial_blocks_encrypted
-        cmp     %%NUM_BLOCKS, 8
-        je      %%_small_initial_num_blocks_is_8
-        cmp     %%NUM_BLOCKS, 7
-        je      %%_small_initial_num_blocks_is_7
-        cmp     %%NUM_BLOCKS, 6
-        je      %%_small_initial_num_blocks_is_6
-        cmp     %%NUM_BLOCKS, 5
-        je      %%_small_initial_num_blocks_is_5
-        cmp     %%NUM_BLOCKS, 4
-        je      %%_small_initial_num_blocks_is_4
-        cmp     %%NUM_BLOCKS, 3
-        je      %%_small_initial_num_blocks_is_3
-        cmp     %%NUM_BLOCKS, 2
-        je      %%_small_initial_num_blocks_is_2
-
-        jmp     %%_small_initial_num_blocks_is_1
-
-%%_small_initial_num_blocks_is_8:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 8, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_7:
-        ;; r13   - %%LENGTH
-        ;; xmm12 - T1
-        ;; xmm13 - T2
-        ;; xmm14 - T3   - AAD HASH OUT when not producing 8 AES keys
-        ;; xmm15 - T4
-        ;; xmm11 - T5
-        ;; xmm9  - CTR
-        ;; xmm1  - XMM1 - Cipher + Hash when producing 8 AES keys
-        ;; xmm2  - XMM2
-        ;; xmm3  - XMM3
-        ;; xmm4  - XMM4
-        ;; xmm5  - XMM5
-        ;; xmm6  - XMM6
-        ;; xmm7  - XMM7
-        ;; xmm8  - XMM8 - AAD HASH IN
-        ;; xmm10 - T6
-        ;; xmm0  - T_key
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 7, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_6:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 6, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_5:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 5, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_4:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 4, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_3:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 3, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_2:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 2, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-        jmp     %%_small_initial_blocks_encrypted
-
-%%_small_initial_num_blocks_is_1:
-        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 1, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
-
-        ;; Note: zero initial blocks not allowed.
-
-%%_small_initial_blocks_encrypted:
-
-%endmacro                       ; GCM_ENC_DEC_SMALL
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GCM_ENC_DEC Encodes/Decodes given data. Assumes that the passed gcm_context_data struct
-; has been initialized by GCM_INIT
-; Requires the input data be at least 1 byte long because of READ_SMALL_INPUT_DATA.
-; Input: gcm_key_data struct* (GDATA_KEY), gcm_context_data *(GDATA_CTX), input text (PLAIN_CYPH_IN),
-; input text length (PLAIN_CYPH_LEN) and whether encoding or decoding (ENC_DEC).
-; Output: A cypher of the given plain text (CYPH_PLAIN_OUT), and updated GDATA_CTX
-; Clobbers rax, r10-r15, and xmm0-xmm15
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  GCM_ENC_DEC         7
-%define %%GDATA_KEY         %1
-%define %%GDATA_CTX         %2
-%define %%CYPH_PLAIN_OUT    %3
-%define %%PLAIN_CYPH_IN     %4
-%define %%PLAIN_CYPH_LEN    %5
-%define %%ENC_DEC           %6
-%define %%INSTANCE_TYPE     %7
-%define %%DATA_OFFSET       r11
-
-; Macro flow:
-; calculate the number of 16byte blocks in the message
-; process (number of 16byte blocks) mod 8 '%%_initial_num_blocks_is_# .. %%_initial_blocks_encrypted'
-; process 8 16 byte blocks at a time until all are done '%%_encrypt_by_8_new .. %%_eight_cipher_left'
-; if there is a block of less than 16 bytes process it '%%_zero_cipher_left .. %%_multiple_of_16_bytes'
-
-        cmp     %%PLAIN_CYPH_LEN, 0
-        je      %%_enc_dec_done
-
-        xor     %%DATA_OFFSET, %%DATA_OFFSET
-        ;; Update length of data processed
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_CYPH_LEN
-       	add     [%%GDATA_CTX + InLen], rax
-%else
-        add    [%%GDATA_CTX + InLen], %%PLAIN_CYPH_LEN
-%endif
-        vmovdqu xmm13, [%%GDATA_KEY + HashKey]
-        vmovdqu xmm8, [%%GDATA_CTX + AadHash]
-
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; NOTE: partial block processing makes only sense for multi_call here.
-        ;; Used for the update flow - if there was a previous partial
-        ;; block fill the remaining bytes here.
-        PARTIAL_BLOCK %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, %%DATA_OFFSET, xmm8, xmm13, %%ENC_DEC
-%endif
-
-        ;;  lift CTR set from initial_blocks to here
-%ifidn %%INSTANCE_TYPE, single_call
-        vmovdqu xmm9, xmm2
-%else
-        vmovdqu xmm9, [%%GDATA_CTX + CurCount]
-%endif
-
-        ;; Save the amount of data left to process in r10
-        mov     r13, %%PLAIN_CYPH_LEN
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; NOTE: %%DATA_OFFSET is zero in single_call case.
-        ;;      Consequently PLAIN_CYPH_LEN will never be zero after
-        ;;      %%DATA_OFFSET subtraction below.
-        sub     r13, %%DATA_OFFSET
-
-        ;; There may be no more data if it was consumed in the partial block.
-        cmp     r13, 0
-        je      %%_enc_dec_done
-%endif                          ; %%INSTANCE_TYPE, multi_call
-        mov     r10, r13
-
-        ;; Determine how many blocks to process in INITIAL
-        mov     r12, r13
-        shr     r12, 4
-        and     r12, 7
-
-        ;; Process one additional block in INITIAL if there is a partial block
-        and     r10, 0xf
-        blsmsk  r10, r10    ; Set CF if zero
-        cmc                 ; Flip CF
-        adc     r12, 0x0    ; Process an additional INITIAL block if CF set
-
-        ;;      Less than 127B will be handled by the small message code, which
-        ;;      can process up to 7 16B blocks.
-        cmp     r13, 128
-        jge     %%_large_message_path
-
-        GCM_ENC_DEC_SMALL %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, %%ENC_DEC, %%DATA_OFFSET, r13, r12, xmm9, xmm14, %%INSTANCE_TYPE
-        jmp     %%_ghash_done
-
-%%_large_message_path:
-        and     r12, 0x7    ; Still, don't allow 8 INITIAL blocks since this will
-                            ; can be handled by the x8 partial loop.
-
-        cmp     r12, 0
-        je      %%_initial_num_blocks_is_0
-        cmp     r12, 7
-        je      %%_initial_num_blocks_is_7
-        cmp     r12, 6
-        je      %%_initial_num_blocks_is_6
-        cmp     r12, 5
-        je      %%_initial_num_blocks_is_5
-        cmp     r12, 4
-        je      %%_initial_num_blocks_is_4
-        cmp     r12, 3
-        je      %%_initial_num_blocks_is_3
-        cmp     r12, 2
-        je      %%_initial_num_blocks_is_2
-
-        jmp     %%_initial_num_blocks_is_1
-
-%%_initial_num_blocks_is_7:
-        ;; r13   - %%LENGTH
-        ;; xmm12 - T1
-        ;; xmm13 - T2
-        ;; xmm14 - T3   - AAD HASH OUT when not producing 8 AES keys
-        ;; xmm15 - T4
-        ;; xmm11 - T5
-        ;; xmm9  - CTR
-        ;; xmm1  - XMM1 - Cipher + Hash when producing 8 AES keys
-        ;; xmm2  - XMM2
-        ;; xmm3  - XMM3
-        ;; xmm4  - XMM4
-        ;; xmm5  - XMM5
-        ;; xmm6  - XMM6
-        ;; xmm7  - XMM7
-        ;; xmm8  - XMM8 - AAD HASH IN
-        ;; xmm10 - T6
-        ;; xmm0  - T_key
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 7, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_6:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 6, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_5:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 5, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_4:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 4, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_3:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 3, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_2:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 2, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_1:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 1, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_0:
-        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 0, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-
-%%_initial_blocks_encrypted:
-        ;; The entire message was encrypted processed in initial and now need to be hashed
-        cmp     r13, 0
-        je      %%_encrypt_done
-
-        ;; Encrypt the final <16 byte (partial) block, then hash
-        cmp     r13, 16
-        jl      %%_encrypt_final_partial
-
-        ;; Process 7 full blocks plus a partial block
-        cmp     r13, 128
-        jl      %%_encrypt_by_8_partial
-
-%%_encrypt_by_8_parallel:
-        ;; in_order vs. out_order is an optimization to increment the counter without shuffling
-        ;; it back into little endian. r15d keeps track of when we need to increent in order so
-        ;; that the carry is handled correctly.
-        vmovd   r15d, xmm9
-        and     r15d, 255
-        vpshufb xmm9, [rel SHUF_MASK]
-
-%%_encrypt_by_8_new:
-        cmp     r15d, 255-8
-        jg      %%_encrypt_by_8
-
-        ;; xmm0  - T1
-        ;; xmm10 - T2
-        ;; xmm11 - T3
-        ;; xmm12 - T4
-        ;; xmm13 - T5
-        ;; xmm14 - T6
-        ;; xmm9  - CTR
-        ;; xmm1  - XMM1
-        ;; xmm2  - XMM2
-        ;; xmm3  - XMM3
-        ;; xmm4  - XMM4
-        ;; xmm5  - XMM5
-        ;; xmm6  - XMM6
-        ;; xmm7  - XMM7
-        ;; xmm8  - XMM8
-        ;; xmm15 - T7
-        add     r15b, 8
-        GHASH_8_ENCRYPT_8_PARALLEL  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, out_order, %%ENC_DEC, full
-        add     %%DATA_OFFSET, 128
-        sub     r13, 128
-        cmp     r13, 128
-        jge     %%_encrypt_by_8_new
-
-        vpshufb xmm9, [rel SHUF_MASK]
-        jmp     %%_encrypt_by_8_parallel_done
-
-%%_encrypt_by_8:
-        vpshufb xmm9, [rel SHUF_MASK]
-        add     r15b, 8
-        GHASH_8_ENCRYPT_8_PARALLEL  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, in_order, %%ENC_DEC, full
-        vpshufb  xmm9, [rel SHUF_MASK]
-        add     %%DATA_OFFSET, 128
-        sub     r13, 128
-        cmp     r13, 128
-        jge     %%_encrypt_by_8_new
-        vpshufb  xmm9, [rel SHUF_MASK]
-
-%%_encrypt_by_8_parallel_done:
-        ;; Test to see if we need a by 8 with partial block. At this point
-        ;; bytes remaining should be either zero or between 113-127.
-        cmp     r13, 0
-        je      %%_encrypt_done
-
-%%_encrypt_by_8_partial:
-        ;; Shuffle needed to align key for partial block xor. out_order
-        ;; is a little faster because it avoids extra shuffles.
-        ;; TBD: Might need to account for when we don't have room to increment the counter.
-
-        ;; Process parallel buffers with a final partial block.
-        GHASH_8_ENCRYPT_8_PARALLEL  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, in_order, %%ENC_DEC, partial
-
-        add     %%DATA_OFFSET, 128-16
-        sub     r13, 128-16
-
-%%_encrypt_final_partial:
-
-        vpshufb  xmm8, [rel SHUF_MASK]
-        mov     [%%GDATA_CTX + PBlockLen], r13
-        vmovdqu [%%GDATA_CTX + PBlockEncKey], xmm8
-
-        ;; xmm8  - Final encrypted counter - need to hash with partial or full block ciphertext
-        ;;                            GDATA,  KEY,   T1,    T2
-        ENCRYPT_FINAL_PARTIAL_BLOCK xmm8, xmm0, xmm10, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, %%ENC_DEC, %%DATA_OFFSET
-
-        vpshufb  xmm8, [rel SHUF_MASK]
-
-%%_encrypt_done:
-
-        ;; Mapping to macro parameters
-        ;; IN:
-        ;;   xmm9 contains the counter
-        ;;   xmm1-xmm8 contain the xor'd ciphertext
-        ;; OUT:
-        ;;   xmm14 contains the final hash
-        ;;             GDATA,   T1,    T2,    T3,    T4,    T5,    T6,    T7, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8
-%ifidn %%INSTANCE_TYPE, multi_call
-        mov     r13, [%%GDATA_CTX + PBlockLen]
-        cmp     r13, 0
-        jz      %%_hash_last_8
-        GHASH_LAST_7 %%GDATA_KEY, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7
-        ;; XOR the partial word into the hash
-        vpxor   xmm14, xmm14, xmm8
-        jmp     %%_ghash_done
-%endif
-%%_hash_last_8:
-        GHASH_LAST_8 %%GDATA_KEY, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8
-
-%%_ghash_done:
-        vmovdqu [%%GDATA_CTX + CurCount], xmm9  ; my_ctx_data.current_counter = xmm9
-        vmovdqu [%%GDATA_CTX + AadHash], xmm14      ; my_ctx_data.aad hash = xmm14
-
-%%_enc_dec_done:
-
-%endmacro
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GCM_COMPLETE Finishes Encryption/Decryption of last partial block after GCM_UPDATE finishes.
-; Input: A gcm_key_data * (GDATA_KEY), gcm_context_data (GDATA_CTX).
-; Output: Authorization Tag (AUTH_TAG) and Authorization Tag length (AUTH_TAG_LEN)
-; Clobbers rax, r10-r12, and xmm0-xmm2, xmm5-xmm6, xmm9-xmm11, xmm13-xmm15
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  GCM_COMPLETE            5
-%define %%GDATA_KEY             %1
-%define %%GDATA_CTX             %2
-%define %%AUTH_TAG              %3
-%define %%AUTH_TAG_LEN          %4
-%define %%INSTANCE_TYPE         %5
-%define %%PLAIN_CYPH_LEN        rax
-
-        vmovdqu xmm13, [%%GDATA_KEY + HashKey]
-        ;; Start AES as early as possible
-        vmovdqu xmm9, [%%GDATA_CTX + OrigIV]    ; xmm9 = Y0
-        ENCRYPT_SINGLE_BLOCK %%GDATA_KEY, xmm9  ; E(K, Y0)
-
-%ifidn %%INSTANCE_TYPE, multi_call
-        ;; If the GCM function is called as a single function call rather
-        ;; than invoking the individual parts (init, update, finalize) we
-        ;; can remove a write to read dependency on AadHash.
-        vmovdqu xmm14, [%%GDATA_CTX + AadHash]
-
-        ;; Encrypt the final partial block. If we did this as a single call then
-        ;; the partial block was handled in the main GCM_ENC_DEC macro.
-	mov	r12, [%%GDATA_CTX + PBlockLen]
-	cmp	r12, 0
-
-	je %%_partial_done
-
-	GHASH_MUL xmm14, xmm13, xmm0, xmm10, xmm11, xmm5, xmm6 ;GHASH computation for the last <16 Byte block
-	vmovdqu [%%GDATA_CTX + AadHash], xmm14
-
-%%_partial_done:
-
-%endif
-
-        mov     r12, [%%GDATA_CTX + AadLen]     ; r12 = aadLen (number of bytes)
-        mov     %%PLAIN_CYPH_LEN, [%%GDATA_CTX + InLen]
-
-        shl     r12, 3                      ; convert into number of bits
-        vmovq   xmm15, r12                  ; len(A) in xmm15
-
-        shl     %%PLAIN_CYPH_LEN, 3         ; len(C) in bits  (*128)
-        vmovq   xmm1, %%PLAIN_CYPH_LEN
-        vpslldq xmm15, xmm15, 8             ; xmm15 = len(A)|| 0x0000000000000000
-        vpxor   xmm15, xmm15, xmm1          ; xmm15 = len(A)||len(C)
-
-        vpxor   xmm14, xmm15
-        GHASH_MUL       xmm14, xmm13, xmm0, xmm10, xmm11, xmm5, xmm6
-        vpshufb  xmm14, [rel SHUF_MASK]         ; perform a 16Byte swap
-
-        vpxor   xmm9, xmm9, xmm14
-
-%%_return_T:
-        mov     r10, %%AUTH_TAG             ; r10 = authTag
-        mov     r11, %%AUTH_TAG_LEN         ; r11 = auth_tag_len
-
-        cmp     r11, 16
-        je      %%_T_16
-
-        cmp     r11, 12
-        je      %%_T_12
-
-        cmp     r11, 8
-        je      %%_T_8
-
-        simd_store_avx r10, xmm9, r11, r12, rax
-        jmp     %%_return_T_done
-%%_T_8:
-        vmovq   rax, xmm9
-        mov     [r10], rax
-        jmp     %%_return_T_done
-%%_T_12:
-        vmovq   rax, xmm9
-        mov     [r10], rax
-        vpsrldq xmm9, xmm9, 8
-        vmovd   eax, xmm9
-        mov     [r10 + 8], eax
-        jmp     %%_return_T_done
-%%_T_16:
-        vmovdqu  [r10], xmm9
-
-%%_return_T_done:
-
-%ifdef SAFE_DATA
-        ;; Clear sensitive data from context structure
-        vpxor   xmm0, xmm0
-        vmovdqu [%%GDATA_CTX + AadHash], xmm0
-        vmovdqu [%%GDATA_CTX + PBlockEncKey], xmm0
-%endif
-%endmacro ; GCM_COMPLETE
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_precomp_128_avx_gen4 /
-;       aes_gcm_precomp_192_avx_gen4 /
-;       aes_gcm_precomp_256_avx_gen4
-;       (struct gcm_key_data *key_data)
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(precomp,_),function,)
-FN_NAME(precomp,_):
-        endbranch64
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_precomp
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
-        sub     rsp, 1*16
-        ; only xmm6 needs to be maintained
-        vmovdqu [rsp + 0*16],xmm6
-%endif
-
-        vpxor   xmm6, xmm6
-        ENCRYPT_SINGLE_BLOCK    arg1, xmm6              ; xmm6 = HashKey
-
-        vpshufb  xmm6, [rel SHUF_MASK]
-        ;;;;;;;;;;;;;;;  PRECOMPUTATION of HashKey<<1 mod poly from the HashKey;;;;;;;;;;;;;;;
-        vmovdqa  xmm2, xmm6
-        vpsllq   xmm6, xmm6, 1
-        vpsrlq   xmm2, xmm2, 63
-        vmovdqa  xmm1, xmm2
-        vpslldq  xmm2, xmm2, 8
-        vpsrldq  xmm1, xmm1, 8
-        vpor     xmm6, xmm6, xmm2
-        ;reduction
-        vpshufd  xmm2, xmm1, 00100100b
-        vpcmpeqd xmm2, [rel TWOONE]
-        vpand    xmm2, xmm2, [rel POLY]
-        vpxor    xmm6, xmm6, xmm2                       ; xmm6 holds the HashKey<<1 mod poly
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vmovdqu  [arg1 + HashKey], xmm6                 ; store HashKey<<1 mod poly
-
-        PRECOMPUTE arg1, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5
-
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm6, [rsp + 0*16]
-        add     rsp, 1*16
-%endif
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_ymms_asm
-%endif
-exit_precomp:
-
-        ret
-
-%ifdef SAFE_PARAM
-error_precomp:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-
-        jmp exit_precomp
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_init_128_avx_gen4 / aes_gcm_init_192_avx_gen4 / aes_gcm_init_256_avx_gen4
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *iv,
-;        const u8 *aad,
-;        u64      aad_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(init,_),function,)
-FN_NAME(init,_):
-        endbranch64
-        push    r12
-        push    r13
-%ifidn __OUTPUT_FORMAT__, win64
-        push    r14
-        push    r15
-        lea     r14, [rsp + 4*8]
-	; xmm6 needs to be maintained for Windows
-	sub	rsp, 1*16
-	vmovdqu	[rsp + 0*16], xmm6
-%endif
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_init
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_init
-
-        ;; Check IV != NULL
-        cmp     arg3, 0
-        jz      error_init
-
-        ;; Check if aad_len == 0
-        cmp     arg5, 0
-        jz      skip_aad_check_init
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg4, 0
-        jz      error_init
-
-skip_aad_check_init:
-%endif
-        GCM_INIT arg1, arg2, arg3, arg4, arg5
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_ymms_asm
-%endif
-exit_init:
-
-%ifidn __OUTPUT_FORMAT__, win64
-	vmovdqu	xmm6 , [rsp + 0*16]
-        add     rsp, 1*16
-        pop     r15
-        pop     r14
-%endif
-        pop     r13
-        pop     r12
-        ret
-
-%ifdef SAFE_PARAM
-error_init:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_IV
-
-        ;; Check if aad_len == 0
-        cmp     arg5, 0
-        jz      skip_aad_check_error_init
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_init:
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_init
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_init_var_iv_128_avx_gen4 / aes_gcm_init_var_iv_192_avx_gen4 /
-;       aes_gcm_init_var_iv_256_avx_gen4
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(init_var_iv,_),function,)
-FN_NAME(init_var_iv,_):
-        endbranch64
-	push	r12
-	push	r13
-%ifidn __OUTPUT_FORMAT__, win64
-        push    r14
-        push    r15
-        lea     r14, [rsp + 4*8]
-	; xmm6 needs to be maintained for Windows
-	sub	rsp, 2*16
-	vmovdqu	[rsp + 0*16], xmm6
-	vmovdqu	[rsp + 1*16], xmm14
-%endif
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_init_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_init_IV
-
-        ;; Check IV != NULL
-        cmp     arg3, 0
-        jz      error_init_IV
-
-        ;; Check iv_len != 0
-        cmp     arg4, 0
-        jz      error_init_IV
-
-        ;; Check if aad_len == 0
-        cmp     arg6, 0
-        jz      skip_aad_check_init_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg5, 0
-        jz      error_init_IV
-
-skip_aad_check_init_IV:
-%endif
-        cmp     arg4, 12
-        je      iv_len_12_init_IV
-
-	GCM_INIT arg1, arg2, arg3, arg5, arg6, arg4
-        jmp     skip_iv_len_12_init_IV
-
-iv_len_12_init_IV:
-	GCM_INIT arg1, arg2, arg3, arg5, arg6
-
-skip_iv_len_12_init_IV:
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_ymms_asm
-%endif
-exit_init_IV:
-
-%ifidn __OUTPUT_FORMAT__, win64
-	vmovdqu	xmm6, [rsp + 0*16]
-	vmovdqu	xmm14, [rsp + 1*16]
-        add     rsp, 2*16
-        pop     r15
-        pop     r14
-%endif
-	pop	r13
-	pop	r12
-        ret
-
-%ifdef SAFE_PARAM
-error_init_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_IV
-
-        ;; Check iv_len != 0
-        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_IV_LEN
-
-        ;; Check if aad_len == 0
-        cmp     arg6, 0
-        jz      skip_aad_check_error_init_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg5, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_init_IV:
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_init_IV
-%endif
-
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_enc_128_update_avx_gen4 / aes_gcm_enc_192_update_avx_gen4 /
-;       aes_gcm_enc_128_update_avx_gen4
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *out,
-;        const u8 *in,
-;        u64      msg_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc,_update_),function,)
-FN_NAME(enc,_update_):
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-	;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-	;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_update_enc
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_update_enc
-
-        ;; Check if plaintext_len == 0
-        cmp     arg5, 0
-        jz      error_update_enc
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_update_enc
-
-        ;; Check out != NULL (plaintext_len != 0)
-        cmp     arg3, 0
-        jz      error_update_enc
-
-        ;; Check in != NULL (plaintext_len != 0)
-        cmp     arg4, 0
-        jz      error_update_enc
-%endif
-        GCM_ENC_DEC arg1, arg2, arg3, arg4, arg5, ENC, multi_call
-
-exit_update_enc:
-        FUNC_RESTORE
-
-        ret
-
-%ifdef SAFE_PARAM
-error_update_enc:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check if plaintext_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_update_enc
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (plaintext_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_update_enc:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_update_enc
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_dec_128_update_avx_gen4 / aes_gcm_dec_192_update_avx_gen4 /
-;       aes_gcm_dec_256_update_avx_gen4
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *out,
-;        const u8 *in,
-;        u64      msg_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec,_update_),function,)
-FN_NAME(dec,_update_):
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_update_dec
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_update_dec
-
-        ;; Check if plaintext_len == 0
-        cmp     arg5, 0
-        jz      error_update_dec
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_update_dec
-
-        ;; Check out != NULL (plaintext_len != 0)
-        cmp     arg3, 0
-        jz      error_update_dec
-
-        ;; Check in != NULL (plaintext_len != 0)
-        cmp     arg4, 0
-        jz      error_update_dec
-%endif
-
-        GCM_ENC_DEC arg1, arg2, arg3, arg4, arg5, DEC, multi_call
-
-exit_update_dec:
-        FUNC_RESTORE
-
-        ret
-
-%ifdef SAFE_PARAM
-error_update_dec:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check if plaintext_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_update_dec
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (plaintext_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_update_dec:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_update_dec
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_enc_128_finalize_avx_gen4 / aes_gcm_enc_192_finalize_avx_gen4 /
-;	aes_gcm_enc_256_finalize_avx_gen4
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *auth_tag,
-;        u64      auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc,_finalize_),function,)
-FN_NAME(enc,_finalize_):
-        endbranch64
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc_fin
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc_fin
-
-        ;; Check auth_tag != NULL
-        cmp     arg3, 0
-        jz      error_enc_fin
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg4, 0
-        jz      error_enc_fin
-
-        cmp     arg4, 16
-        ja      error_enc_fin
-%endif
-        push r12
-
-%ifidn __OUTPUT_FORMAT__, win64
-        ; xmm6:xmm15 need to be maintained for Windows
-	sub	rsp, 7*16
-        vmovdqu	[rsp + 0*16], xmm6
-        vmovdqu	[rsp + 1*16], xmm9
-        vmovdqu	[rsp + 2*16], xmm10
-        vmovdqu	[rsp + 3*16], xmm11
-        vmovdqu	[rsp + 4*16], xmm13
-        vmovdqu	[rsp + 5*16], xmm14
-        vmovdqu	[rsp + 6*16], xmm15
-%endif
-        GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_ymms_asm
-%endif
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu	xmm15, [rsp + 6*16]
-        vmovdqu	xmm14, [rsp + 5*16]
-        vmovdqu	xmm13, [rsp + 4*16]
-        vmovdqu	xmm11, [rsp + 3*16]
-        vmovdqu	xmm10, [rsp + 2*16]
-        vmovdqu	xmm9,  [rsp + 1*16]
-        vmovdqu	xmm6,  [rsp + 0*16]
-        add     rsp, 7*16
-%endif
-        pop r12
-exit_enc_fin:
-        ret
-
-%ifdef SAFE_PARAM
-error_enc_fin:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg4, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc_fin
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_dec_128_finalize_avx_gen4 / aes_gcm_dec_192_finalize_avx_gen4
-;	aes_gcm_dec_256_finalize_avx_gen4
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *auth_tag,
-;        u64      auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec,_finalize_),function,)
-FN_NAME(dec,_finalize_):
-        endbranch64
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec_fin
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec_fin
-
-        ;; Check auth_tag != NULL
-        cmp     arg3, 0
-        jz      error_dec_fin
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg4, 0
-        jz      error_dec_fin
-
-        cmp     arg4, 16
-        ja      error_dec_fin
-%endif
-
-        push r12
-
-%ifidn __OUTPUT_FORMAT__, win64
-        ; xmm6:xmm15 need to be maintained for Windows
-	sub	rsp, 7*16
-        vmovdqu	[rsp + 0*16], xmm6
-        vmovdqu	[rsp + 1*16], xmm9
-        vmovdqu	[rsp + 2*16], xmm10
-        vmovdqu	[rsp + 3*16], xmm11
-        vmovdqu	[rsp + 4*16], xmm13
-        vmovdqu	[rsp + 5*16], xmm14
-        vmovdqu	[rsp + 6*16], xmm15
-%endif
-        GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_ymms_asm
-%endif
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu	xmm15, [rsp + 6*16]
-        vmovdqu	xmm14, [rsp + 5*16]
-        vmovdqu	xmm13, [rsp + 4*16]
-        vmovdqu	xmm11, [rsp + 3*16]
-        vmovdqu	xmm10, [rsp + 2*16]
-        vmovdqu	xmm9,  [rsp + 1*16]
-        vmovdqu	xmm6,  [rsp + 0*16]
-        add     rsp, 7*16
-%endif
-
-        pop r12
-
-exit_dec_fin:
-        ret
-
-%ifdef SAFE_PARAM
-error_dec_fin:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg4, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec_fin
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_enc_128_avx_gen4 / aes_gcm_enc_192_avx_gen4 / aes_gcm_enc_256_avx_gen4
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *out,
-;        const u8 *in,
-;        u64      msg_len,
-;        u8       *iv,
-;        const u8 *aad,
-;        u64      aad_len,
-;        u8       *auth_tag,
-;        u64      auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc,_),function,)
-FN_NAME(enc,_):
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_enc
-
-        ;; Check auth_tag != NULL
-        cmp     arg9, 0
-        jz      error_enc
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg10, 0
-        jz      error_enc
-
-        cmp     arg10, 16
-        ja      error_enc
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_enc
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_enc
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_enc
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_enc
-
-skip_in_out_check_enc:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_enc
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg7, 0
-        jz      error_enc
-
-skip_aad_check_enc:
-%endif
-        GCM_INIT arg1, arg2, arg6, arg7, arg8
-
-        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC, single_call
-
-        GCM_COMPLETE arg1, arg2, arg9, arg10, single_call
-
-exit_enc:
-        FUNC_RESTORE
-
-        ret
-
-%ifdef SAFE_PARAM
-error_enc:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg9, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg10, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg10, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_enc
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_enc:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_error_enc
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg7, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_enc:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_dec_128_avx_gen4 / aes_gcm_dec_192_avx_gen4 / aes_gcm_dec_256_avx_gen4
-;       (const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8       *out,
-;        const u8 *in,
-;        u64      msg_len,
-;        u8       *iv,
-;        const u8 *aad,
-;        u64      aad_len,
-;        u8       *auth_tag,
-;        u64      auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec,_),function,)
-FN_NAME(dec,_):
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_dec
-
-        ;; Check auth_tag != NULL
-        cmp     arg9, 0
-        jz      error_dec
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg10, 0
-        jz      error_dec
-
-        cmp     arg10, 16
-        ja      error_dec
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_dec
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_dec
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_dec
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_dec
-
-skip_in_out_check_dec:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_dec
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg7, 0
-        jz      error_dec
-
-skip_aad_check_dec:
-%endif
-        GCM_INIT arg1, arg2, arg6, arg7, arg8
-
-        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
-
-        GCM_COMPLETE arg1, arg2, arg9, arg10, single_call
-
-exit_dec:
-        FUNC_RESTORE
-
-        ret
-
-%ifdef SAFE_PARAM
-error_dec:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg9, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg10, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg10, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_dec
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_dec:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_error_dec
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg7, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_dec:
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;
-; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
-;
-;IMB_JOB *aes_gcm_enc_var_iv_128_avx_gen4 / aes_gcm_enc_var_iv_192_avx_gen4 /
-;       aes_gcm_enc_var_iv_256_avx_gen4(IMB_MGR *state, IMB_JOB *job)
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
-FN_NAME(enc_var_iv,_):
-        endbranch64
-	FUNC_SAVE alloc_context
-
-        mov     arg1, [arg2 + _enc_keys]
-
-        cmp     qword [arg2 + _iv_len_in_bytes], 12
-        je      iv_len_12_enc_IV
-
-        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
-                 {[arg2 + _iv_len_in_bytes]}
-
-        jmp     skip_iv_len_12_enc_IV
-
-iv_len_12_enc_IV:
-	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}
-
-skip_iv_len_12_enc_IV:
-        mov     arg3, [arg2 + _src]
-        add     arg3, [arg2 + _cipher_start_src_offset]
-        mov     arg4, [arg2 + _dst]
-        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
-        mov     arg2, [arg2 + _msg_len_to_cipher]
-	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, ENC, single_call
-
-        mov     arg2, [rsp + GP_OFFSET + 5*8]
-        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
-                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
-                     single_call
-
-        ;; mark job complete
-        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
-
-        mov     rax, arg2       ;; return the job
-
-        FUNC_RESTORE
-	ret
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;
-; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
-;
-;IMB_JOB *aes_gcm_dec_var_iv_128_avx_gen4 / aes_gcm_dec_var_iv_192_avx_gen4 /
-;       aes_gcm_dec_var_iv_256_avx_gen4(IMB_MGR *state, IMB_JOB *job)
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
-FN_NAME(dec_var_iv,_):
-        endbranch64
-	FUNC_SAVE alloc_context
-
-        mov     arg1, [arg2 + _dec_keys]
-
-        cmp     qword [arg2 + _iv_len_in_bytes], 12
-        je      iv_len_12_dec_IV
-
-        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
-                 {[arg2 + _iv_len_in_bytes]}
-
-        jmp     skip_iv_len_12_dec_IV
-
-iv_len_12_dec_IV:
-	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}
-
-skip_iv_len_12_dec_IV:
-        mov     arg3, [arg2 + _src]
-        add     arg3, [arg2 + _cipher_start_src_offset]
-        mov     arg4, [arg2 + _dst]
-        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
-        mov     arg2, [arg2 + _msg_len_to_cipher]
-	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, DEC, single_call
-
-        mov     arg2, [rsp + GP_OFFSET + 5*8]
-        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
-                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
-                     single_call
-
-        ;; mark job complete
-        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
-
-        mov     rax, arg2       ;; return the job
-
-        FUNC_RESTORE
-	ret
-
-%ifdef GCM128_MODE
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   ghash_avx_gen4
-;        const struct gcm_key_data *key_data,
-;        const void   *in,
-;        const u64    in_len,
-;        void         *io_tag,
-;        const u64    tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(ghash_avx_gen4,function,)
-ghash_avx_gen4:
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_ghash
-
-        ;; Check in != NULL
-        cmp     arg2, 0
-        jz      error_ghash
-
-        ;; Check in_len != 0
-        cmp     arg3, 0
-        jz      error_ghash
-
-        ;; Check tag != NULL
-        cmp     arg4, 0
-        jz      error_ghash
-
-        ;; Check tag_len != 0
-        cmp     arg5, 0
-        jz      error_ghash
-%endif
-
-        ;; copy tag to xmm0
-        vmovdqu	xmm0, [arg4]
-        vpshufb xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
-
-        CALC_AAD_HASH arg2, arg3, xmm0, arg1, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, \
-                      r10, r11, r12, r13, rax
-
-        vpshufb xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
-
-        simd_store_avx arg4, xmm0, arg5, r12, rax
-
-exit_ghash:
-        FUNC_RESTORE
-        ret
-
-%ifdef SAFE_PARAM
-error_ghash:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check in != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_SRC
-
-        ;; Check in_len != 0
-        IMB_ERR_CHECK_ZERO arg3, rax, IMB_ERR_AUTH_LEN
-
-        ;; Check tag != NULL
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check tag_len != 0
-        IMB_ERR_CHECK_ZERO arg5, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-
-        jmp     exit_ghash
-%endif
-
-%endif ;; GCM128_MODE
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; PARTIAL_BLOCK_GMAC: Handles the tag partial blocks between update calls.
-; Requires the input data be at least 1 byte long.
-; Input: gcm_key_data (GDATA_KEY), gcm_context_data (GDATA_CTX), input text (PLAIN_IN),
-; input text length (PLAIN_LEN), hash subkey (HASH_SUBKEY).
-; Output: Updated GDATA_CTX
-; Clobbers rax, r10, r12, r13, r15, xmm0, xmm1, xmm2, xmm3, xmm5, xmm6, xmm9, xmm10, xmm11, xmm13
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro PARTIAL_BLOCK_GMAC	7
-%define	%%GDATA_KEY             %1
-%define	%%GDATA_CTX             %2
-%define	%%PLAIN_IN              %3
-%define	%%PLAIN_LEN             %4
-%define	%%DATA_OFFSET           %5
-%define	%%AAD_HASH              %6
-%define	%%HASH_SUBKEY           %7
-
-	mov	r13, [%%GDATA_CTX + PBlockLen]
-	cmp	r13, 0
-        ; Leave Macro if no partial blocks
-	je	%%_partial_block_done
-
-        ; Read in input data without over reading
-	cmp	%%PLAIN_LEN, 16
-	jl	%%_fewer_than_16_bytes
-        ; If more than 16 bytes of data, just fill the xmm register
-	VXLDR   xmm1, [%%PLAIN_IN]
-	jmp	%%_data_read
-
-%%_fewer_than_16_bytes:
-	lea	r10, [%%PLAIN_IN]
-	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, %%PLAIN_LEN, rax, r12, r15
-
-        ; Finished reading in data
-%%_data_read:
-
-	lea	r12, [rel SHIFT_MASK]
-        ; Adjust the shuffle mask pointer to be able to shift r13 bytes
-        ; (16-r13 is the number of bytes in plaintext mod 16)
-	add	r12, r13
-        ; Get the appropriate shuffle mask
-	vmovdqu	xmm2, [r12]
-	vmovdqa	xmm3, xmm1
-
-	mov	r15, %%PLAIN_LEN
-	add	r15, r13
-        ; Set r15 to be the amount of data left in PLAIN_IN after filling the block
-	sub	r15, 16
-        ; Determine if partial block is not being filled and shift mask accordingly
-	jge	%%_no_extra_mask_1
-	sub	r12, r15
-%%_no_extra_mask_1:
-
-        ; Get the appropriate mask to mask out bottom r13 bytes of xmm3
-	vmovdqu	xmm1, [r12 + ALL_F-SHIFT_MASK]
-
-	vpand	xmm3, xmm1
-	vpshufb	xmm3, [rel SHUF_MASK]
-	vpshufb	xmm3, xmm2
-	vpxor	%%AAD_HASH, xmm3
-
-	cmp	r15,0
-	jl	%%_partial_incomplete_1
-
-        ; GHASH computation for the last <16 Byte block
-	GHASH_MUL	%%AAD_HASH, %%HASH_SUBKEY, xmm0, xmm10, xmm11, xmm5, xmm6
-	xor	rax, rax
-	mov	[%%GDATA_CTX + PBlockLen], rax
-	jmp	%%_ghash_done
-%%_partial_incomplete_1:
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_LEN
-        add     [%%GDATA_CTX + PBlockLen], rax
-%else
-        add     [%%GDATA_CTX + PBlockLen], %%PLAIN_LEN
-%endif
-%%_ghash_done:
-	vmovdqu	[%%GDATA_CTX + AadHash], %%AAD_HASH
-
-        cmp     r15, 0
-        jl      %%_partial_fill
-
-        mov     r12, 16
-        ; Set r12 to be the number of bytes to skip after this macro
-        sub     r12, r13
-
-        jmp     %%offset_set
-%%_partial_fill:
-        mov     r12, %%PLAIN_LEN
-%%offset_set:
-        mov     %%DATA_OFFSET, r12
-%%_partial_block_done:
-%endmacro ; PARTIAL_BLOCK_GMAC
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   imb_aes_gmac_update_128_avx_gen4 / imb_aes_gmac_update_192_avx_gen4 /
-;       imb_aes_gmac_update_256_avx_gen4
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        const   u8 *in,
-;        const   u64 msg_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(GMAC_FN_NAME(update),function,)
-GMAC_FN_NAME(update):
-        endbranch64
-	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-%endif
-        ;; Check if msg_len == 0
-        cmp     arg4, 0
-        je	exit_gmac_update
-
-%ifdef SAFE_PARAM
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_gmac_update
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_gmac_update
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_gmac_update
-%endif
-
-        ; Increment size of "AAD length" for GMAC
-        add     [arg2 + AadLen], arg4
-
-        ;; Deal with previous partial block
-	xor	r11, r11
-	vmovdqu	xmm13, [arg1 + HashKey]
-	vmovdqu	xmm8, [arg2 + AadHash]
-
-	PARTIAL_BLOCK_GMAC arg1, arg2, arg3, arg4, r11, xmm8, xmm13
-
-        ; CALC_AAD_HASH needs to deal with multiple of 16 bytes
-        sub     arg4, r11
-        add     arg3, r11
-
-        vmovq   xmm7, arg4 ; Save remaining length
-        and     arg4, -16 ; Get multiple of 16 bytes
-
-        or      arg4, arg4
-        jz      no_full_blocks
-
-        ;; Calculate GHASH of this segment
-        CALC_AAD_HASH arg3, arg4, xmm8, arg1, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, \
-                      r10, r11, r12, r13, rax
-	vmovdqu	[arg2 + AadHash], xmm8	; ctx_data.aad hash = aad_hash
-
-no_full_blocks:
-        add     arg3, arg4 ; Point at partial block
-
-        vmovq   arg4, xmm7 ; Restore original remaining length
-        and     arg4, 15
-        jz      exit_gmac_update
-
-        ; Save next partial block
-        mov	[arg2 + PBlockLen], arg4
-        READ_SMALL_DATA_INPUT_AVX xmm1, arg3, arg4, r11, r12, r13
-        vpshufb xmm1, [rel SHUF_MASK]
-        vpxor   xmm8, xmm1
-        vmovdqu [arg2 + AadHash], xmm8
-
-exit_gmac_update:
-	FUNC_RESTORE
-
-	ret
-
-%ifdef SAFE_PARAM
-error_gmac_update:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_SRC
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_gmac_update
-%endif
-
-mksection stack-noexec
+%define IS_AVX2_GCM
+%include "include/gcm_common_avx2_avx512.inc"
diff --git a/lib/include/gcm_common_avx2_avx512.inc b/lib/include/gcm_common_avx2_avx512.inc
new file mode 100644
index 00000000..b383263a
--- /dev/null
+++ b/lib/include/gcm_common_avx2_avx512.inc
@@ -0,0 +1,4464 @@
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;  Copyright(c) 2011-2023, Intel Corporation All rights reserved.
+;
+;  Redistribution and use in source and binary forms, with or without
+;  modification, are permitted provided that the following conditions
+;  are met:
+;    * Redistributions of source code must retain the above copyright
+;      notice, this list of conditions and the following disclaimer.
+;    * Redistributions in binary form must reproduce the above copyright
+;      notice, this list of conditions and the following disclaimer in
+;      the documentation and/or other materials provided with the
+;      distribution.
+;    * Neither the name of Intel Corporation nor the names of its
+;      contributors may be used to endorse or promote products derived
+;      from this software without specific prior written permission.
+;
+;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;
+; Authors:
+;       Erdinc Ozturk
+;       Vinodh Gopal
+;       James Guilford
+;       Tomasz Kantecki
+;
+;
+; References:
+;       This code was derived and highly optimized from the code described in paper:
+;               Vinodh Gopal et. al. Optimized Galois-Counter-Mode Implementation on Intel Architecture Processors. August, 2010
+;       The details of the implementation is explained in:
+;               Erdinc Ozturk et. al. Enabling High-Performance Galois-Counter-Mode on Intel Architecture Processors. October, 2012.
+;
+;
+;
+;
+; Assumptions:
+;
+;
+;
+; iv:
+;       0                   1                   2                   3
+;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;       |                             Salt  (From the SA)               |
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;       |                     Initialization Vector                     |
+;       |         (This is the sequence number from IPSec header)       |
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;       |                              0x1                              |
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;
+;
+;
+; AAD:
+;       AAD will be padded with 0 to the next 16byte multiple
+;       for example, assume AAD is a u32 vector
+;
+;       if AAD is 8 bytes:
+;       AAD[3] = {A0, A1};
+;       padded AAD in xmm register = {A1 A0 0 0}
+;
+;       0                   1                   2                   3
+;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;       |                               SPI (A1)                        |
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;       |                     32-bit Sequence Number (A0)               |
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;       |                              0x0                              |
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;
+;                                       AAD Format with 32-bit Sequence Number
+;
+;       if AAD is 12 bytes:
+;       AAD[3] = {A0, A1, A2};
+;       padded AAD in xmm register = {A2 A1 A0 0}
+;
+;       0                   1                   2                   3
+;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;       |                               SPI (A2)                        |
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;       |                 64-bit Extended Sequence Number {A1,A0}       |
+;       |                                                               |
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;       |                              0x0                              |
+;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
+;
+;        AAD Format with 64-bit Extended Sequence Number
+;
+;
+; aadLen:
+;       Must be a multiple of 4 bytes and from the definition of the spec.
+;       The code additionally supports any aadLen length.
+;
+; TLen:
+;       from the definition of the spec, TLen can only be 8, 12 or 16 bytes.
+;
+; poly = x^128 + x^127 + x^126 + x^121 + 1
+; throughout the code, one tab and two tab indentations are used. one tab is for GHASH part, two tabs is for AES part.
+;
+
+%include "include/os.inc"
+%include "include/reg_sizes.inc"
+%include "include/clear_regs.inc"
+%include "include/gcm_defines.inc"
+%include "include/gcm_keys_avx2_avx512.inc"
+%include "include/gcm_common.inc"
+%include "include/memcpy.inc"
+%include "include/cet.inc"
+%include "include/error.inc"
+%include "include/imb_job.inc"
+
+%ifndef GCM128_MODE
+%ifndef GCM192_MODE
+%ifndef GCM256_MODE
+%error "No GCM key size selected for gcm_avx2_avx512.inc!"
+%endif
+%endif
+%endif
+
+%ifndef IS_AVX2_GCM
+%ifndef IS_AVX512_GCM
+%error "No GCM AVX2 or AVX512 selection made for gcm_avx2_avx512.inc!"
+%endif
+%endif
+
+%ifdef IS_AVX2_GCM
+%xdefine GCM_API_POSTFIX avx_gen4
+%endif
+
+%ifdef IS_AVX512_GCM
+%xdefine GCM_API_POSTFIX avx512
+%endif
+
+;; Decide on AES-GCM key size to compile for
+%ifdef GCM128_MODE
+%define NROUNDS 9
+%xdefine GCM_API_KEYSZ _128
+%endif
+
+%ifdef GCM192_MODE
+%define NROUNDS 11
+%xdefine GCM_API_KEYSZ _192
+%endif
+
+%ifdef GCM256_MODE
+%define NROUNDS 13
+%xdefine GCM_API_KEYSZ _256
+%endif
+
+;; Decide on AES-GCM key size to compile for
+%define FN_NAME(x,y) aes_gcm_ %+ x %+ GCM_API_KEYSZ %+ y %+ GCM_API_POSTFIX
+%define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ GCM_API_KEYSZ %+ _ %+ GCM_API_POSTFIX
+%define GHASH_FN_NAME(x) x %+ _ %+ GCM_API_POSTFIX
+
+mksection .text
+default rel
+
+; need to store 5 GP registers on stack (align to 16 bytes)
+%define GP_STORAGE 8*6
+
+%define	TMP2	16*0    ; Temporary storage for AES State 2 (State 1 is stored in an XMM register)
+%define	TMP3	16*1    ; Temporary storage for AES State 3
+%define	TMP4	16*2    ; Temporary storage for AES State 4
+%define	TMP5	16*3    ; Temporary storage for AES State 5
+%define	TMP6	16*4    ; Temporary storage for AES State 6
+%define	TMP7	16*5    ; Temporary storage for AES State 7
+%define	TMP8	16*6    ; Temporary storage for AES State 8
+
+%define	LOCAL_STORAGE	16*7
+
+%ifidn __OUTPUT_FORMAT__, win64
+	%define	XMM_STORAGE	16*10
+%else
+	%define	XMM_STORAGE	0
+%endif
+
+%define GP_OFFSET (LOCAL_STORAGE + XMM_STORAGE)
+
+%define	VARIABLE_OFFSET	(GP_STORAGE + LOCAL_STORAGE + XMM_STORAGE)
+
+;; extra memory for GCM context structure
+%define CONTEXT_SIZE    6*16
+%define CONTEXT_OFFSET  VARIABLE_OFFSET
+
+;; Full stack frame layout:
+;;                   RETURN ADDRESS + ARGS
+;; R14 =  + 16*6  -> ---------------------------
+;;                   GCM CONTEXT (JOB API only)
+;;        + 6*8   -> ---------------------------
+;;                   GP STORAGE
+;;        + 16*10 -> --------------------------
+;;                   XMM STORAGE (windows only)
+;;        + 16*7  -> --------------------------
+;;                   LOCAL STORAGE
+;; RSP =          -> --------------------------
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; Utility Macros
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; GHASH_MUL MACRO to implement: Data*HashKey mod (128,127,126,121,0)
+; Input: A and B (128-bits each, bit-reflected)
+; Output: C = A*B*x mod poly, (i.e. >>1 )
+; To compute GH = GH*HashKey mod poly, give HK = HashKey<<1 mod poly as input
+; GH = GH * HK * x mod poly which is equivalent to GH*HashKey mod poly.
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+%macro  GHASH_MUL  7
+%define %%GH %1         ; 16 Bytes
+%define %%HK %2         ; 16 Bytes
+%define %%T1 %3
+%define %%T2 %4
+%define %%T3 %5
+%define %%T4 %6
+%define %%T5 %7
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+        vpclmulqdq      %%T1, %%GH, %%HK, 0x11          ; %%T1 = a1*b1
+        vpclmulqdq      %%T2, %%GH, %%HK, 0x00          ; %%T2 = a0*b0
+        vpclmulqdq      %%T3, %%GH, %%HK, 0x01          ; %%T3 = a1*b0
+        vpclmulqdq      %%GH, %%GH, %%HK, 0x10          ; %%GH = a0*b1
+        vpxor           %%GH, %%GH, %%T3
+
+        vpsrldq         %%T3, %%GH, 8                   ; shift-R %%GH 2 DWs
+        vpslldq         %%GH, %%GH, 8                   ; shift-L %%GH 2 DWs
+
+        vpxor           %%T1, %%T1, %%T3
+        vpxor           %%GH, %%GH, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;first phase of the reduction
+        vmovdqa         %%T3, [rel POLY2]
+
+        vpclmulqdq      %%T2, %%T3, %%GH, 0x01
+        vpslldq         %%T2, %%T2, 8                    ; shift-L %%T2 2 DWs
+
+        vpxor           %%GH, %%GH, %%T2                 ; first phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;second phase of the reduction
+        vpclmulqdq      %%T2, %%T3, %%GH, 0x00
+        vpsrldq         %%T2, %%T2, 4                    ; shift-R %%T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
+
+        vpclmulqdq      %%GH, %%T3, %%GH, 0x10
+        vpslldq         %%GH, %%GH, 4                    ; shift-L %%GH 1 DW (Shift-L 1-DW to obtain result with no shifts)
+
+        vpxor           %%GH, %%GH, %%T2                 ; second phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vpxor           %%GH, %%GH, %%T1                 ; the result is in %%GH
+
+%endmacro
+
+%macro  PRECOMPUTE 8
+%define %%GDATA %1      ;; [in/out] pointer to GCM key data structure
+%define %%HK    %2      ;; [in] Hash Key
+%define %%T1    %3      ;; [clobbered] temporary XMM register
+%define %%T2    %4      ;; [clobbered] temporary XMM register
+%define %%T3    %5      ;; [clobbered] temporary XMM register
+%define %%T4    %6      ;; [clobbered] temporary XMM register
+%define %%T5    %7      ;; [clobbered] temporary XMM register
+%define %%T6    %8      ;; [clobbered] temporary XMM register
+
+        vmovdqa  %%T5, %%HK
+
+        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^2<<1 mod poly
+        vmovdqu  [%%GDATA + HashKey_2], %%T5                    ;  [HashKey_2] = HashKey^2<<1 mod poly
+
+        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^3<<1 mod poly
+        vmovdqu  [%%GDATA + HashKey_3], %%T5
+
+        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^4<<1 mod poly
+        vmovdqu  [%%GDATA + HashKey_4], %%T5
+
+        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^5<<1 mod poly
+        vmovdqu  [%%GDATA + HashKey_5], %%T5
+
+        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^6<<1 mod poly
+        vmovdqu  [%%GDATA + HashKey_6], %%T5
+
+        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^7<<1 mod poly
+        vmovdqu  [%%GDATA + HashKey_7], %%T5
+
+        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^8<<1 mod poly
+        vmovdqu  [%%GDATA + HashKey_8], %%T5
+%endmacro
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; CALC_AAD_HASH: Calculates the hash of the data which will not be encrypted.
+; Input: The input data (A_IN), that data's length (A_LEN), and the hash key (HASH_KEY).
+; Output: The hash of the data (AAD_HASH).
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+%macro  CALC_AAD_HASH   13-15
+%define %%A_IN          %1      ;; [in] message pointer
+%define %%A_LEN         %2      ;; [in] message length
+%define %%AAD_HASH      %3      ;; [in] input hash value (XMM)
+%define %%GDATA_KEY     %4      ;; [in] pointer to GCM key data
+%define %%XTMP0         %5      ;; [clobbered] temporary XMM
+%define %%XTMP1         %6      ;; [clobbered] temporary XMM
+%define %%XTMP2         %7      ;; [clobbered] temporary XMM
+%define %%XTMP3         %8      ;; [clobbered] temporary XMM
+%define %%XTMP4         %9      ;; [clobbered] temporary XMM
+%define %%XTMP5         %10     ;; [clobbered] temporary XMM
+%define %%T1            %11     ;; [clobbered] temporary GP register
+%define %%T2            %12     ;; [clobbered] temporary GP register
+%define %%T3            %13     ;; [clobbered] temporary GP register
+%define %%T4            %14     ;; [clobbered] temporary GP register (obsolete with avx512)
+%define %%T5            %15     ;; [clobbered] temporary GP register (obsolete with avx512)
+
+%ifdef IS_AVX2_GCM
+%if %0 != 15
+%error "AVX2 CALC_AAD_HASH needs 15 arguments!"
+%endif
+%endif
+
+%ifdef IS_AVX512_GCM
+%if %0 != 13
+%error "AVX512 CALC_AAD_HASH needs 13 arguments!"
+%endif
+%endif
+
+        mov     %%T1, %%A_IN            ; T1 = AAD
+        mov     %%T2, %%A_LEN           ; T2 = aadLen
+
+%%_get_AAD_loop128:
+        cmp     %%T2, 128
+        jl      %%_exit_AAD_loop128
+
+        vmovdqu         %%XTMP0, [%%T1 + 16*0]
+        vpshufb         %%XTMP0, [rel SHUF_MASK]
+
+        vpxor           %%XTMP0, %%AAD_HASH
+
+        vmovdqu         %%XTMP5, [%%GDATA_KEY + HashKey_8]
+        vpclmulqdq      %%XTMP1, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = a1*b1
+        vpclmulqdq      %%XTMP2, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = a0*b0
+        vpclmulqdq      %%XTMP3, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = a1*b0
+        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10                 ; %%T4 = a0*b1
+        vpxor           %%XTMP3, %%XTMP3, %%XTMP4                       ; %%T3 = a1*b0 + a0*b1
+
+%assign i 1
+%assign j 7
+%rep 7
+        vmovdqu         %%XTMP0, [%%T1 + 16*i]
+        vpshufb         %%XTMP0, [rel SHUF_MASK]
+
+        vmovdqu         %%XTMP5, [%%GDATA_KEY + HashKey_ %+ j]
+        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = T1 + a1*b1
+        vpxor           %%XTMP1, %%XTMP1, %%XTMP4
+
+        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = T2 + a0*b0
+        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
+
+        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = T3 + a1*b0 + a0*b1
+        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
+        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10
+        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
+%assign i (i + 1)
+%assign j (j - 1)
+%endrep
+
+        vpslldq         %%XTMP4, %%XTMP3, 8                             ; shift-L 2 DWs
+        vpsrldq         %%XTMP3, %%XTMP3, 8                             ; shift-R 2 DWs
+        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
+        vpxor           %%XTMP1, %%XTMP1, %%XTMP3                       ; accumulate the results in %%T1(M):%%T2(L)
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;first phase of the reduction
+        vmovdqa         %%XTMP5, [rel POLY2]
+        vpclmulqdq      %%XTMP0, %%XTMP5, %%XTMP2, 0x01
+        vpslldq         %%XTMP0, %%XTMP0, 8                             ; shift-L xmm2 2 DWs
+        vpxor           %%XTMP2, %%XTMP2, %%XTMP0                       ; first phase of the reduction complete
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;second phase of the reduction
+        vpclmulqdq      %%XTMP3, %%XTMP5, %%XTMP2, 0x00
+        vpsrldq         %%XTMP3, %%XTMP3, 4                             ; shift-R 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
+
+        vpclmulqdq      %%XTMP4, %%XTMP5, %%XTMP2, 0x10
+        vpslldq         %%XTMP4, %%XTMP4, 4                             ; shift-L 1 DW (Shift-L 1-DW to obtain result with no shifts)
+
+        vpxor           %%XTMP4, %%XTMP4, %%XTMP3                       ; second phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vpxor           %%AAD_HASH, %%XTMP1, %%XTMP4                    ; the result is in %%T1
+
+        sub     %%T2, 128
+        je      %%_CALC_AAD_done
+
+        add     %%T1, 128
+        jmp     %%_get_AAD_loop128
+
+%%_exit_AAD_loop128:
+        cmp     %%T2, 16
+        jl      %%_get_small_AAD_block
+
+        ;; calculate hash_key position to start with
+        mov     %%T3, %%T2
+        and     %%T3, -16       ; 1 to 7 blocks possible here
+        neg     %%T3
+        add     %%T3, HashKey_1 + 16
+        lea     %%T3, [%%GDATA_KEY + %%T3]
+
+        vmovdqu         %%XTMP0, [%%T1]
+        vpshufb         %%XTMP0, [rel SHUF_MASK]
+
+        vpxor           %%XTMP0, %%AAD_HASH
+
+        vmovdqu         %%XTMP5, [%%T3]
+        vpclmulqdq      %%XTMP1, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = a1*b1
+        vpclmulqdq      %%XTMP2, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = a0*b0
+        vpclmulqdq      %%XTMP3, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = a1*b0
+        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10                 ; %%T4 = a0*b1
+        vpxor           %%XTMP3, %%XTMP3, %%XTMP4                       ; %%T3 = a1*b0 + a0*b1
+
+        add     %%T3, 16        ; move to next hashkey
+        add     %%T1, 16        ; move to next data block
+        sub     %%T2, 16
+        cmp     %%T2, 16
+        jl      %%_AAD_reduce
+
+%%_AAD_blocks:
+        vmovdqu         %%XTMP0, [%%T1]
+        vpshufb         %%XTMP0, [rel SHUF_MASK]
+
+        vmovdqu         %%XTMP5, [%%T3]
+        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = T1 + a1*b1
+        vpxor           %%XTMP1, %%XTMP1, %%XTMP4
+
+        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = T2 + a0*b0
+        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
+
+        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = T3 + a1*b0 + a0*b1
+        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
+        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10
+        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
+
+        add     %%T3, 16        ; move to next hashkey
+        add     %%T1, 16
+        sub     %%T2, 16
+        cmp     %%T2, 16
+        jl      %%_AAD_reduce
+        jmp     %%_AAD_blocks
+
+%%_AAD_reduce:
+        vpslldq         %%XTMP4, %%XTMP3, 8                             ; shift-L 2 DWs
+        vpsrldq         %%XTMP3, %%XTMP3, 8                             ; shift-R 2 DWs
+        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
+        vpxor           %%XTMP1, %%XTMP1, %%XTMP3                       ; accumulate the results in %%T1(M):%%T2(L)
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;first phase of the reduction
+        vmovdqa         %%XTMP5, [rel POLY2]
+        vpclmulqdq      %%XTMP0, %%XTMP5, %%XTMP2, 0x01
+        vpslldq         %%XTMP0, %%XTMP0, 8                             ; shift-L xmm2 2 DWs
+        vpxor           %%XTMP2, %%XTMP2, %%XTMP0                       ; first phase of the reduction complete
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;second phase of the reduction
+        vpclmulqdq      %%XTMP3, %%XTMP5, %%XTMP2, 0x00
+        vpsrldq         %%XTMP3, %%XTMP3, 4                             ; shift-R 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
+
+        vpclmulqdq      %%XTMP4, %%XTMP5, %%XTMP2, 0x10
+        vpslldq         %%XTMP4, %%XTMP4, 4                             ; shift-L 1 DW (Shift-L 1-DW to obtain result with no shifts)
+
+        vpxor           %%XTMP4, %%XTMP4, %%XTMP3                       ; second phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vpxor           %%AAD_HASH, %%XTMP1, %%XTMP4                    ; the result is in %%T1
+
+%%_get_small_AAD_block:
+        or      %%T2, %%T2
+        je      %%_CALC_AAD_done
+
+        vmovdqu         %%XTMP0, [%%GDATA_KEY + HashKey]
+%ifdef IS_AVX2_GCM
+        READ_SMALL_DATA_INPUT_AVX %%XTMP1, %%T1, %%T2, %%T3, %%T4, %%T5
+%else
+        READ_SMALL_DATA_INPUT_AVX512 %%XTMP1, %%T1, %%T2, %%T3, k1
+%endif
+        ;byte-reflect the AAD data
+        vpshufb         %%XTMP1, [rel SHUF_MASK]
+        vpxor           %%AAD_HASH, %%XTMP1
+        GHASH_MUL       %%AAD_HASH, %%XTMP0, %%XTMP1, %%XTMP2, %%XTMP3, %%XTMP4, %%XTMP5
+
+%%_CALC_AAD_done:
+
+%endmacro ; CALC_AAD_HASH
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; PARTIAL_BLOCK: Handles encryption/decryption and the tag partial blocks between update calls.
+; Requires the input data be at least 1 byte long.
+; Input: gcm_key_data * (GDATA_KEY), gcm_context_data *(GDATA_CTX), input text (PLAIN_CYPH_IN),
+; input text length (PLAIN_CYPH_LEN), the current data offset (DATA_OFFSET),
+; the hash subkey (HASH_SUBKEY) and whether encoding or decoding (ENC_DEC)
+; Output: A cypher of the first partial block (CYPH_PLAIN_OUT), and updated GDATA_CTX
+; Clobbers rax, r10, r12, r13, r15, xmm0, xmm1, xmm2, xmm3, xmm5, xmm6, xmm9, xmm10, xmm11
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+%macro PARTIAL_BLOCK    8
+%define %%GDATA_CTX             %1
+%define %%CYPH_PLAIN_OUT        %2
+%define %%PLAIN_CYPH_IN         %3
+%define %%PLAIN_CYPH_LEN        %4
+%define %%DATA_OFFSET           %5
+%define %%AAD_HASH              %6
+%define %%HASH_SUBKEY           %7
+%define %%ENC_DEC               %8
+
+        mov     r13, [%%GDATA_CTX + PBlockLen]
+        or      r13, r13
+        je      %%_partial_block_done           ;Leave Macro if no partial blocks
+
+%ifdef IS_AVX2_GCM
+        cmp     %%PLAIN_CYPH_LEN, 16            ;Read in input data without over reading
+        jl      %%_fewer_than_16_bytes
+        VXLDR   xmm1, [%%PLAIN_CYPH_IN]         ;If more than 16 bytes of data, just fill the xmm register
+        jmp     %%_data_read
+
+%%_fewer_than_16_bytes:
+        lea     r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
+        READ_SMALL_DATA_INPUT_AVX   xmm1, r10, %%PLAIN_CYPH_LEN, rax, r12, r15
+
+%%_data_read:                           ;Finished reading in data
+%else
+        ; Read in input data without over reading
+        READ_SMALL_DATA_INPUT_LEN_BT16_AVX512   xmm1, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, r12, rax, k1
+%endif
+        vmovdqu xmm9, [%%GDATA_CTX + PBlockEncKey]  ;xmm9 = my_ctx_data.partial_block_enc_key
+
+        lea     r12, [rel SHIFT_MASK]
+
+        add     r12, r13                        ; adjust the shuffle mask pointer to be able to shift r13 bytes (16-r13 is the number of bytes in plaintext mod 16)
+        vmovdqu xmm2, [r12]                     ; get the appropriate shuffle mask
+        vpshufb xmm9, xmm2                      ;shift right r13 bytes
+
+%ifidn  %%ENC_DEC, DEC
+        vmovdqa xmm3, xmm1
+%endif
+        vpxor   xmm9, xmm1                      ; Ciphertext XOR E(K, Yn)
+
+        mov     r15, %%PLAIN_CYPH_LEN
+        add     r15, r13
+        sub     r15, 16                         ;Set r15 to be the amount of data left in CYPH_PLAIN_IN after filling the block
+        jge     %%_no_extra_mask                ;Determine if if partial block is not being filled and shift mask accordingly
+        sub     r12, r15
+%%_no_extra_mask:
+
+        vmovdqu xmm1, [r12 + ALL_F - SHIFT_MASK]; get the appropriate mask to mask out bottom r13 bytes of xmm9
+        vpand   xmm9, xmm1                      ; mask out bottom r13 bytes of xmm9
+
+%ifidn  %%ENC_DEC, DEC
+        vpand   xmm3, xmm1
+        vpshufb xmm3, [rel SHUF_MASK]
+        vpshufb xmm3, xmm2
+        vpxor   %%AAD_HASH, xmm3
+%else
+        vpshufb xmm9, [rel SHUF_MASK]
+        vpshufb xmm9, xmm2
+        vpxor   %%AAD_HASH, xmm9
+%endif
+        or      r15, r15
+        jl      %%_partial_incomplete
+
+        GHASH_MUL       %%AAD_HASH, %%HASH_SUBKEY, xmm0, xmm10, xmm11, xmm5, xmm6       ;GHASH computation for the last <16 Byte block
+        xor     rax, rax
+        mov     [%%GDATA_CTX + PBlockLen], rax
+        jmp     %%_enc_dec_done
+
+%%_partial_incomplete:
+%ifidn __OUTPUT_FORMAT__, win64
+        mov     rax, %%PLAIN_CYPH_LEN
+       	add     [%%GDATA_CTX + PBlockLen], rax
+%else
+        add     [%%GDATA_CTX + PBlockLen], %%PLAIN_CYPH_LEN
+%endif
+%%_enc_dec_done:
+        vmovdqu [%%GDATA_CTX + AadHash], %%AAD_HASH
+
+%ifidn  %%ENC_DEC, ENC
+        vpshufb xmm9, [rel SHUF_MASK]       ; shuffle xmm9 back to output as ciphertext
+        vpshufb xmm9, xmm2
+%endif
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ; output encrypted Bytes
+        or      r15, r15
+        jl      %%_partial_fill
+        mov     r12, r13
+        mov     r13, 16
+        sub     r13, r12                        ; Set r13 to be the number of bytes to write out
+        jmp     %%_count_set
+%%_partial_fill:
+        mov     r13, %%PLAIN_CYPH_LEN
+%%_count_set:
+%ifdef IS_AVX2_GCM
+        vmovq   rax, xmm9
+        cmp     r13, 8
+        jle     %%_less_than_8_bytes_left
+
+        mov     [%%CYPH_PLAIN_OUT+ %%DATA_OFFSET], rax
+        add     %%DATA_OFFSET, 8
+        vpsrldq xmm9, xmm9, 8
+        vmovq   rax, xmm9
+        sub     r13, 8
+%%_less_than_8_bytes_left:
+        mov     BYTE [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], al
+        add     %%DATA_OFFSET, 1
+        shr     rax, 8
+        sub     r13, 1
+        jne     %%_less_than_8_bytes_left
+%else
+        lea             rax, [rel byte_len_to_mask_table]
+        kmovw           k1, [rax + r13*2]
+        vmovdqu8        [%%CYPH_PLAIN_OUT + %%DATA_OFFSET]{k1}, xmm9
+        add             %%DATA_OFFSET, r13
+%endif
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+%%_partial_block_done:
+%endmacro ; PARTIAL_BLOCK
+
+%macro GHASH_SINGLE_MUL 9
+%define %%GDATA                 %1
+%define %%HASHKEY               %2
+%define %%CIPHER                %3
+%define %%STATE_11              %4
+%define %%STATE_00              %5
+%define %%STATE_MID             %6
+%define %%T1                    %7
+%define %%T2                    %8
+%define %%FIRST                 %9
+
+        vmovdqu         %%T1, [%%GDATA + %%HASHKEY]
+%ifidn %%FIRST, first
+        vpclmulqdq      %%STATE_11, %%CIPHER, %%T1, 0x11         ; %%T4 = a1*b1
+        vpclmulqdq      %%STATE_00, %%CIPHER, %%T1, 0x00         ; %%T4_2 = a0*b0
+        vpclmulqdq      %%STATE_MID, %%CIPHER, %%T1, 0x01        ; %%T6 = a1*b0
+        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x10               ; %%T5 = a0*b1
+        vpxor           %%STATE_MID, %%STATE_MID, %%T2
+%else
+        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x11
+        vpxor           %%STATE_11, %%STATE_11, %%T2
+
+        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x00
+        vpxor           %%STATE_00, %%STATE_00, %%T2
+
+        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x01
+        vpxor           %%STATE_MID, %%STATE_MID, %%T2
+
+        vpclmulqdq      %%T2, %%CIPHER, %%T1, 0x10
+        vpxor           %%STATE_MID, %%STATE_MID, %%T2
+%endif
+
+%endmacro
+
+; if a = number of total plaintext bytes
+; b = floor(a/16)
+; %%num_initial_blocks = b mod 8;
+; encrypt the initial %%num_initial_blocks blocks and apply ghash on the ciphertext
+; %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r14 are used as a pointer only, not modified.
+; Updated AAD_HASH is returned in %%T3
+
+%macro INITIAL_BLOCKS 23
+%define %%GDATA_KEY             %1
+%define %%CYPH_PLAIN_OUT        %2
+%define %%PLAIN_CYPH_IN         %3
+%define %%LENGTH                %4
+%define %%DATA_OFFSET           %5
+%define %%num_initial_blocks    %6      ; can be 0, 1, 2, 3, 4, 5, 6 or 7
+%define %%T1                    %7
+%define %%T2                    %8
+%define %%T3                    %9
+%define %%T4                    %10
+%define %%T5                    %11
+%define %%CTR                   %12
+%define %%XMM1                  %13
+%define %%XMM2                  %14
+%define %%XMM3                  %15
+%define %%XMM4                  %16
+%define %%XMM5                  %17
+%define %%XMM6                  %18
+%define %%XMM7                  %19
+%define %%XMM8                  %20
+%define %%T6                    %21
+%define %%T_key                 %22
+%define %%ENC_DEC               %23
+
+%assign i (8-%%num_initial_blocks)
+                ;; Move AAD_HASH to temp reg
+                vmovdqu  %%T2, %%XMM8
+                ;; Start AES for %%num_initial_blocks blocks
+                ;; vmovdqu  %%CTR, [%%GDATA_CTX + CurCount]   ; %%CTR = Y0
+
+%assign i (9-%%num_initial_blocks)
+%rep %%num_initial_blocks
+                vpaddd   %%CTR, %%CTR, [rel ONE]        ; INCR Y0
+                vpshufb  reg(i), %%CTR, [rel SHUF_MASK] ; perform a 16Byte swap
+%assign i (i+1)
+%endrep
+
+%if (%%num_initial_blocks > 0)
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
+%assign i (9 - %%num_initial_blocks)
+%rep %%num_initial_blocks
+                vpxor    reg(i), reg(i), %%T_key
+%assign i (i+1)
+%endrep
+
+%assign j 1
+%rep NROUNDS
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
+%assign i (9 - %%num_initial_blocks)
+%rep %%num_initial_blocks
+                vaesenc  reg(i), %%T_key
+%assign i (i+1)
+%endrep
+
+%assign j (j+1)
+%endrep
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
+%assign i (9 - %%num_initial_blocks)
+%rep %%num_initial_blocks
+                vaesenclast      reg(i),%%T_key
+%assign i (i+1)
+%endrep
+
+%endif ; %if(%%num_initial_blocks>0)
+
+%assign i (9 - %%num_initial_blocks)
+%rep %%num_initial_blocks
+                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
+                vpxor    reg(i), reg(i), %%T1
+                ;; Write back ciphertext for %%num_initial_blocks blocks
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
+                add     %%DATA_OFFSET, 16
+                ;; Prepare ciphertext for GHASH computations
+%ifidn  %%ENC_DEC, DEC
+                vpshufb  reg(i), %%T1, [rel SHUF_MASK]
+%else
+                vpshufb  reg(i), reg(i), [rel SHUF_MASK]
+%endif
+%assign i (i+1)
+%endrep
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+%assign i (9 - %%num_initial_blocks)
+%if (%%num_initial_blocks > 0)
+        vmovdqa %%T3, reg(i)
+%assign i (i + 1)
+%endif
+%if (%%num_initial_blocks > 1)
+%rep %%num_initial_blocks - 1
+        vmovdqu [rsp + TMP %+ i], reg(i)
+%assign i (i+1)
+%endrep
+%endif
+                ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+                ;; Prepare 8 counter blocks and perform rounds of AES cipher on
+                ;; them, load plain/cipher text and store cipher/plain text.
+                ;; Stitch GHASH computation in between AES rounds.
+                vpaddd   %%XMM1, %%CTR, [rel ONE]   ; INCR Y0
+                vpaddd   %%XMM2, %%CTR, [rel TWO]   ; INCR Y0
+                vpaddd   %%XMM3, %%XMM1, [rel TWO]  ; INCR Y0
+                vpaddd   %%XMM4, %%XMM2, [rel TWO]  ; INCR Y0
+                vpaddd   %%XMM5, %%XMM3, [rel TWO]  ; INCR Y0
+                vpaddd   %%XMM6, %%XMM4, [rel TWO]  ; INCR Y0
+                vpaddd   %%XMM7, %%XMM5, [rel TWO]  ; INCR Y0
+                vpaddd   %%XMM8, %%XMM6, [rel TWO]  ; INCR Y0
+                vmovdqa  %%CTR, %%XMM8
+
+                vpshufb  %%XMM1, [rel SHUF_MASK]    ; perform a 16Byte swap
+                vpshufb  %%XMM2, [rel SHUF_MASK]    ; perform a 16Byte swap
+                vpshufb  %%XMM3, [rel SHUF_MASK]    ; perform a 16Byte swap
+                vpshufb  %%XMM4, [rel SHUF_MASK]    ; perform a 16Byte swap
+                vpshufb  %%XMM5, [rel SHUF_MASK]    ; perform a 16Byte swap
+                vpshufb  %%XMM6, [rel SHUF_MASK]    ; perform a 16Byte swap
+                vpshufb  %%XMM7, [rel SHUF_MASK]    ; perform a 16Byte swap
+                vpshufb  %%XMM8, [rel SHUF_MASK]    ; perform a 16Byte swap
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
+                vpxor    %%XMM1, %%XMM1, %%T_key
+                vpxor    %%XMM2, %%XMM2, %%T_key
+                vpxor    %%XMM3, %%XMM3, %%T_key
+                vpxor    %%XMM4, %%XMM4, %%T_key
+                vpxor    %%XMM5, %%XMM5, %%T_key
+                vpxor    %%XMM6, %%XMM6, %%T_key
+                vpxor    %%XMM7, %%XMM7, %%T_key
+                vpxor    %%XMM8, %%XMM8, %%T_key
+
+%assign i (8-%%num_initial_blocks)
+%assign j (9-%%num_initial_blocks)
+%assign k (%%num_initial_blocks)
+
+%define %%T4_2 %%T4
+%if(%%num_initial_blocks>0)
+        ;; Hash in AES state
+        ;; T2 - incoming AAD hash
+        vpxor %%T2, %%T3
+
+        ;;                 GDATA,       HASHKEY, CIPHER,
+        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
+        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
+                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, first
+%endif
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*1]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*2]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%if(%%num_initial_blocks>1)
+        ;;                 GDATA,       HASHKEY, CIPHER,
+        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
+        vmovdqu         %%T2, [rsp + TMP %+ j]
+        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
+                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
+%endif
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*3]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*4]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%if(%%num_initial_blocks>2)
+        ;;                 GDATA,       HASHKEY, CIPHER,
+        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
+        vmovdqu         %%T2, [rsp + TMP %+ j]
+        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
+                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
+%endif
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%if(%%num_initial_blocks>3)
+        ;;                 GDATA,       HASHKEY, CIPHER,
+        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
+        vmovdqu         %%T2, [rsp + TMP %+ j]
+        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
+                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
+%endif
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*5]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*6]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%if(%%num_initial_blocks>4)
+        ;;                 GDATA,       HASHKEY, CIPHER,
+        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
+        vmovdqu         %%T2, [rsp + TMP %+ j]
+        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
+                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
+%endif
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*7]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*8]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%if(%%num_initial_blocks>5)
+        ;;                 GDATA,       HASHKEY, CIPHER,
+        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
+        vmovdqu         %%T2, [rsp + TMP %+ j]
+        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
+                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
+%endif
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*9]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+%ifndef GCM128_MODE
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*10]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+%endif
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%if(%%num_initial_blocks>6)
+        ;;                 GDATA,       HASHKEY, CIPHER,
+        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
+        vmovdqu         %%T2, [rsp + TMP %+ j]
+        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
+                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
+%endif
+
+%ifdef GCM128_MODE
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*10]
+                vaesenclast  %%XMM1, %%T_key
+                vaesenclast  %%XMM2, %%T_key
+                vaesenclast  %%XMM3, %%T_key
+                vaesenclast  %%XMM4, %%T_key
+                vaesenclast  %%XMM5, %%T_key
+                vaesenclast  %%XMM6, %%T_key
+                vaesenclast  %%XMM7, %%T_key
+                vaesenclast  %%XMM8, %%T_key
+%endif
+
+%ifdef GCM192_MODE
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*11]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+                vmovdqu          %%T_key, [%%GDATA_KEY+16*12]
+                vaesenclast      %%XMM1, %%T_key
+                vaesenclast      %%XMM2, %%T_key
+                vaesenclast      %%XMM3, %%T_key
+                vaesenclast      %%XMM4, %%T_key
+                vaesenclast      %%XMM5, %%T_key
+                vaesenclast      %%XMM6, %%T_key
+                vaesenclast      %%XMM7, %%T_key
+                vaesenclast      %%XMM8, %%T_key
+%endif
+%ifdef GCM256_MODE
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*11]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+                vmovdqu          %%T_key, [%%GDATA_KEY+16*12]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+%endif
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%if(%%num_initial_blocks>7)
+        ;;                 GDATA,       HASHKEY, CIPHER,
+        ;;               STATE_11, STATE_00, STATE_MID, T1, T2
+        vmovdqu         %%T2, [rsp + TMP %+ j]
+        GHASH_SINGLE_MUL %%GDATA_KEY, HashKey_ %+ k, %%T2, \
+                         %%T1,     %%T4,   %%T6,    %%T5, %%T3, not_first
+%endif
+
+%ifdef GCM256_MODE             ; GCM256
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*13]
+                vaesenc  %%XMM1, %%T_key
+                vaesenc  %%XMM2, %%T_key
+                vaesenc  %%XMM3, %%T_key
+                vaesenc  %%XMM4, %%T_key
+                vaesenc  %%XMM5, %%T_key
+                vaesenc  %%XMM6, %%T_key
+                vaesenc  %%XMM7, %%T_key
+                vaesenc  %%XMM8, %%T_key
+
+                vmovdqu          %%T_key, [%%GDATA_KEY+16*14]
+                vaesenclast      %%XMM1, %%T_key
+                vaesenclast      %%XMM2, %%T_key
+                vaesenclast      %%XMM3, %%T_key
+                vaesenclast      %%XMM4, %%T_key
+                vaesenclast      %%XMM5, %%T_key
+                vaesenclast      %%XMM6, %%T_key
+                vaesenclast      %%XMM7, %%T_key
+                vaesenclast      %%XMM8, %%T_key
+%endif                          ;  GCM256 mode
+
+%if(%%num_initial_blocks>0)
+        vpsrldq %%T3, %%T6, 8            ; shift-R %%T2 2 DWs
+        vpslldq %%T6, %%T6, 8            ; shift-L %%T3 2 DWs
+        vpxor   %%T1, %%T1, %%T3         ; accumulate the results in %%T1:%%T4
+        vpxor   %%T4, %%T6, %%T4
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ; First phase of the reduction
+        vmovdqa         %%T3, [rel POLY2]
+
+        vpclmulqdq      %%T2, %%T3, %%T4, 0x01
+        vpslldq         %%T2, %%T2, 8             ; shift-L xmm2 2 DWs
+
+        ;; First phase of the reduction complete
+        vpxor           %%T4, %%T4, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ; Second phase of the reduction
+        vpclmulqdq      %%T2, %%T3, %%T4, 0x00
+        ;; Shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
+        vpsrldq         %%T2, %%T2, 4
+
+        vpclmulqdq      %%T4, %%T3, %%T4, 0x10
+        ;; Shift-L xmm0 1 DW (Shift-L 1-DW to obtain result with no shifts)
+        vpslldq         %%T4, %%T4, 4
+        ;; Second phase of the reduction complete
+        vpxor           %%T4, %%T4, %%T2
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ; The result is in %%T3
+        vpxor           %%T3, %%T1, %%T4
+%else
+        ;; The hash should end up in T3
+        vmovdqa  %%T3, %%T2
+%endif
+
+        ;; Final hash is now in T3
+%if %%num_initial_blocks > 0
+        ;; NOTE: obsolete in case %%num_initial_blocks = 0
+        sub     %%LENGTH, 16*%%num_initial_blocks
+%endif
+
+                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*0]
+                vpxor    %%XMM1, %%XMM1, %%T1
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*0], %%XMM1
+                %ifidn  %%ENC_DEC, DEC
+                vmovdqa  %%XMM1, %%T1
+                %endif
+
+                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*1]
+                vpxor    %%XMM2, %%XMM2, %%T1
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*1], %%XMM2
+                %ifidn  %%ENC_DEC, DEC
+                vmovdqa  %%XMM2, %%T1
+                %endif
+
+                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*2]
+                vpxor    %%XMM3, %%XMM3, %%T1
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*2], %%XMM3
+                %ifidn  %%ENC_DEC, DEC
+                vmovdqa  %%XMM3, %%T1
+                %endif
+
+                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*3]
+                vpxor    %%XMM4, %%XMM4, %%T1
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*3], %%XMM4
+                %ifidn  %%ENC_DEC, DEC
+                vmovdqa  %%XMM4, %%T1
+                %endif
+
+                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*4]
+                vpxor    %%XMM5, %%XMM5, %%T1
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*4], %%XMM5
+                %ifidn  %%ENC_DEC, DEC
+                vmovdqa  %%XMM5, %%T1
+                %endif
+
+                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*5]
+                vpxor    %%XMM6, %%XMM6, %%T1
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*5], %%XMM6
+                %ifidn  %%ENC_DEC, DEC
+                vmovdqa  %%XMM6, %%T1
+                %endif
+
+               VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*6]
+                vpxor    %%XMM7, %%XMM7, %%T1
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*6], %%XMM7
+                %ifidn  %%ENC_DEC, DEC
+                vmovdqa  %%XMM7, %%T1
+                %endif
+
+%if %%num_initial_blocks > 0
+                ;; NOTE: 'jl' is never taken for %%num_initial_blocks = 0
+                ;;      This macro is executed for length 128 and up,
+                ;;      zero length is checked in GCM_ENC_DEC.
+                ;; If the last block is partial then the xor will be done later
+                ;; in ENCRYPT_FINAL_PARTIAL_BLOCK.
+                ;; We know it's partial if LENGTH - 16*num_initial_blocks < 128
+                cmp %%LENGTH, 128
+                jl %%_initial_skip_last_word_write
+%endif
+                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*7]
+                vpxor    %%XMM8, %%XMM8, %%T1
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*7], %%XMM8
+                %ifidn  %%ENC_DEC, DEC
+                vmovdqa  %%XMM8, %%T1
+                %endif
+
+                ;; Update %%LENGTH with the number of blocks processed
+                sub     %%LENGTH, 16
+                add     %%DATA_OFFSET, 16
+%%_initial_skip_last_word_write:
+                sub     %%LENGTH, 128-16
+                add     %%DATA_OFFSET, 128-16
+
+                vpshufb  %%XMM1, [rel SHUF_MASK]             ; perform a 16Byte swap
+                ;; Combine GHASHed value with the corresponding ciphertext
+                vpxor    %%XMM1, %%XMM1, %%T3
+                vpshufb  %%XMM2, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb  %%XMM3, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb  %%XMM4, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb  %%XMM5, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb  %%XMM6, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb  %%XMM7, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb  %%XMM8, [rel SHUF_MASK]             ; perform a 16Byte swap
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+%%_initial_blocks_done:
+
+%endmacro
+
+;;; INITIAL_BLOCKS macro with support for a partial final block.
+;;; num_initial_blocks is expected to include the partial final block
+;;;     in the count.
+%macro INITIAL_BLOCKS_PARTIAL 25
+%define %%GDATA_KEY             %1      ;; [in] pointer to GCM key data
+%define %%GDATA_CTX             %2      ;; [in] pointer to GCM context data
+%define %%CYPH_PLAIN_OUT        %3      ;; [in] pointer to destination buffer
+%define %%PLAIN_CYPH_IN         %4      ;; [in] pointer to source buffer
+%define %%LENGTH                %5      ;; [in] message length
+%define %%DATA_OFFSET           %6      ;; [in/out] buffer offset
+%define %%num_initial_blocks    %7      ;; [in] numeric value, number of blocks can be from 1 to 7 (not 0)
+%define %%T1                    %8
+%define %%T2                    %9
+%define %%T3                    %10     ;; [out] hash value (XMM)
+%define %%T4                    %11
+%define %%T5                    %12
+%define %%CTR                   %13
+%define %%XMM1                  %14
+%define %%XMM2                  %15
+%define %%XMM3                  %16
+%define %%XMM4                  %17
+%define %%XMM5                  %18
+%define %%XMM6                  %19
+%define %%XMM7                  %20
+%define %%XMM8                  %21     ;; [in] hash value (XMM)
+%define %%T6                    %22
+%define %%T_key                 %23
+%define %%ENC_DEC               %24
+%define %%INSTANCE_TYPE         %25
+
+%assign i (8 - %%num_initial_blocks)
+                ;; Move AAD_HASH to temp reg
+                vmovdqu  %%T2, %%XMM8
+                ;; vmovdqu  %%CTR, [%%GDATA_CTX + CurCount]  ; %%CTR = Y0
+
+%assign i (9 - %%num_initial_blocks)
+%rep %%num_initial_blocks
+                ;; Compute AES counters
+                vpaddd   %%CTR, %%CTR, [rel ONE]     ; INCR Y0
+                vmovdqa  reg(i), %%CTR
+                vpshufb  reg(i), [rel SHUF_MASK]     ; perform a 16Byte swap
+%assign i (i + 1)
+%endrep
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
+%assign i (9 - %%num_initial_blocks)
+%rep %%num_initial_blocks
+                ; Start AES for %%num_initial_blocks blocks
+                vpxor    reg(i), reg(i), %%T_key
+%assign i (i + 1)
+%endrep
+
+%assign j 1
+%rep NROUNDS
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
+%assign i (9-%%num_initial_blocks)
+%rep %%num_initial_blocks
+                vaesenc  reg(i), %%T_key
+%assign i (i + 1)
+%endrep
+
+%assign j (j + 1)
+%endrep
+
+                vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
+%assign i (9 - %%num_initial_blocks)
+%rep %%num_initial_blocks
+                vaesenclast      reg(i),%%T_key
+%assign i (i + 1)
+%endrep
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;; Hash all but the last block of data
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+%assign i (9-%%num_initial_blocks)
+%rep %%num_initial_blocks-1
+                ;; Encrypt the message for all but the last block
+                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
+                vpxor    reg(i), reg(i), %%T1
+                ;; write back ciphertext for %%num_initial_blocks blocks
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
+                add     %%DATA_OFFSET, 16
+                %ifidn  %%ENC_DEC, DEC
+                    vmovdqa  reg(i), %%T1
+                %endif
+                ;; Prepare ciphertext for GHASH computations
+                vpshufb  reg(i), [rel SHUF_MASK]
+%assign i (i+1)
+%endrep
+
+%if %%num_initial_blocks > 1
+                ;; The final block of data may be <16B
+                sub      %%LENGTH, 16*(%%num_initial_blocks-1)
+%endif
+
+%if %%num_initial_blocks < 8
+                ;; NOTE: the 'jl' is always taken for num_initial_blocks = 8.
+                ;;      This is run in the context of GCM_ENC_DEC_SMALL for length < 128.
+                cmp      %%LENGTH, 16
+                jl       %%_small_initial_partial_block
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;; Handle a full length final block - encrypt and hash all blocks
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+                sub      %%LENGTH, 16
+	        mov	[%%GDATA_CTX + PBlockLen], %%LENGTH
+
+                ;; Encrypt the message
+                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
+                vpxor    reg(i), reg(i), %%T1
+                ;; write back ciphertext for %%num_initial_blocks blocks
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
+                add     %%DATA_OFFSET, 16
+                ;; Prepare ciphertext for GHASH computations
+%ifidn  %%ENC_DEC, DEC
+                vpshufb  reg(i), %%T1, [rel SHUF_MASK]
+%else
+                vpshufb  reg(i), reg(i), [rel SHUF_MASK]
+%endif
+
+        ;; Hash all of the data
+%assign i (8 - %%num_initial_blocks)
+%assign j (9 - %%num_initial_blocks)
+%assign k (%%num_initial_blocks)
+%assign last_block_to_hash 0
+
+%if (%%num_initial_blocks > last_block_to_hash)
+        ;; Hash in AES state
+        vpxor %%T2, reg(j)
+
+        ;; T2 - incoming AAD hash
+        ;; reg(i) holds ciphertext
+        ;; T5 - hash key
+        ;; T6 - updated xor
+        ;; reg(1)/xmm1 should now be available for tmp use
+        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
+        vpclmulqdq      %%T1, %%T2, %%T5, 0x11             ; %%T4 = a1*b1
+        vpclmulqdq      %%T4, %%T2, %%T5, 0x00             ; %%T4 = a0*b0
+        vpclmulqdq      %%T6, %%T2, %%T5, 0x01             ; %%T6 = a1*b0
+        vpclmulqdq      %%T5, %%T2, %%T5, 0x10             ; %%T5 = a0*b1
+        vpxor           %%T6, %%T6, %%T5
+%endif
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%assign rep_count (%%num_initial_blocks-1)
+%rep rep_count
+
+        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
+        vpclmulqdq      %%T3, reg(j), %%T5, 0x11
+        vpxor           %%T1, %%T1, %%T3
+
+        vpclmulqdq      %%T3, reg(j), %%T5, 0x00
+        vpxor           %%T4, %%T4, %%T3
+
+        vpclmulqdq      %%T3, reg(j), %%T5, 0x01
+        vpxor           %%T6, %%T6, %%T3
+
+        vpclmulqdq      %%T3, reg(j), %%T5, 0x10
+        vpxor           %%T6, %%T6, %%T3
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%endrep
+
+        ;; Record that a reduction is needed
+        mov            r12, 1
+
+        jmp      %%_small_initial_compute_hash
+
+%endif                          ; %if %%num_initial_blocks < 8
+
+%%_small_initial_partial_block:
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;; Handle ghash for a <16B final block
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+        ;; In this case if it's a single call to encrypt we can
+        ;; hash all of the data but if it's an init / update / finalize
+        ;; series of call we need to leave the last block if it's
+        ;; less than a full block of data.
+
+	mov	[%%GDATA_CTX + PBlockLen], %%LENGTH
+        vmovdqu [%%GDATA_CTX + PBlockEncKey], reg(i)
+        ;; Handle a partial final block
+        ;;                            GDATA,    KEY,   T1,   T2
+        ;; r13 - length
+        ;; LT16 - indicates type of read and that the buffer is less than 16 bytes long
+        ;;      NOTE: could be replaced with %%LENGTH but at this point
+        ;;      %%LENGTH is always less than 16.
+        ;;      No PLAIN_CYPH_LEN argument available in this macro.
+        ENCRYPT_FINAL_PARTIAL_BLOCK reg(i), %%T1, %%T3, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, LT16, %%ENC_DEC, %%DATA_OFFSET
+        vpshufb  reg(i), [rel SHUF_MASK]
+
+%ifidn %%INSTANCE_TYPE, multi_call
+%assign i (8 - %%num_initial_blocks)
+%assign j (9 - %%num_initial_blocks)
+%assign k (%%num_initial_blocks - 1)
+%assign last_block_to_hash 1
+%else
+%assign i (8 - %%num_initial_blocks)
+%assign j (9 - %%num_initial_blocks)
+%assign k (%%num_initial_blocks)
+%assign last_block_to_hash 0
+%endif
+
+%if (%%num_initial_blocks > last_block_to_hash)
+        ;; Record that a reduction is needed
+        mov            r12, 1
+        ;; Hash in AES state
+        vpxor          %%T2, reg(j)
+
+        ;; T2 - incoming AAD hash
+        ;; reg(i) holds ciphertext
+        ;; T5 - hash key
+        ;; T6 - updated xor
+        ;; reg(1)/xmm1 should now be available for tmp use
+        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
+        vpclmulqdq      %%T1, %%T2, %%T5, 0x11             ; %%T4 = a1*b1
+        vpclmulqdq      %%T4, %%T2, %%T5, 0x00             ; %%T4 = a0*b0
+        vpclmulqdq      %%T6, %%T2, %%T5, 0x01             ; %%T6 = a1*b0
+        vpclmulqdq      %%T5, %%T2, %%T5, 0x10             ; %%T5 = a0*b1
+        vpxor           %%T6, %%T6, %%T5
+%else
+        ;; Record that a reduction is not needed -
+        ;; In this case no hashes are computed because there
+        ;; is only one initial block and it is < 16B in length.
+        xor            r12, r12
+%endif
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%ifidn %%INSTANCE_TYPE, multi_call
+%assign rep_count (%%num_initial_blocks-2)
+%%_multi_call_hash:
+%else
+%assign rep_count (%%num_initial_blocks-1)
+%endif
+
+%if rep_count < 0
+        ;; fix for negative rep_count
+%assign rep_count 0
+%endif
+
+%rep rep_count
+
+        vmovdqu         %%T5, [%%GDATA_KEY + HashKey_ %+ k]
+        vpclmulqdq      %%T3, reg(j), %%T5, 0x11
+        vpxor           %%T1, %%T1, %%T3
+
+        vpclmulqdq      %%T3, reg(j), %%T5, 0x00
+        vpxor           %%T4, %%T4, %%T3
+
+        vpclmulqdq      %%T3, reg(j), %%T5, 0x01
+        vpxor           %%T6, %%T6, %%T3
+
+        vpclmulqdq      %%T3, reg(j), %%T5, 0x10
+        vpxor           %%T6, %%T6, %%T3
+
+%assign i (i+1)
+%assign j (j+1)
+%assign k (k-1)
+%endrep
+
+%%_small_initial_compute_hash:
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;; Ghash reduction
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+%if(%%num_initial_blocks=1)
+%ifidn %%INSTANCE_TYPE, multi_call
+        ;; We only need to check if a reduction is needed if
+        ;; initial_blocks == 1 and init/update/final is being used.
+        ;; In this case we may just have a partial block, and that
+        ;; gets hashed in finalize.
+        or      r12, r12
+        je      %%_no_reduction_needed
+%endif
+%endif
+
+        vpsrldq %%T3, %%T6, 8          ; shift-R %%T2 2 DWs
+        vpslldq %%T6, %%T6, 8          ; shift-L %%T3 2 DWs
+        vpxor   %%T1, %%T1, %%T3       ; accumulate the results in %%T1:%%T4
+        vpxor   %%T4, %%T6, %%T4
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;; First phase of the reduction
+        vmovdqa         %%T3, [rel POLY2]
+
+        vpclmulqdq      %%T2, %%T3, %%T4, 0x01
+        ;; shift-L xmm2 2 DWs
+        vpslldq         %%T2, %%T2, 8
+        vpxor           %%T4, %%T4, %%T2
+
+        ;; First phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;; Second phase of the reduction
+
+        vpclmulqdq      %%T2, %%T3, %%T4, 0x00
+        ;; Shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
+        vpsrldq         %%T2, %%T2, 4
+
+        vpclmulqdq      %%T4, %%T3, %%T4, 0x10
+        ;; Shift-L xmm0 1 DW (Shift-L 1-DW to obtain result with no shifts)
+        vpslldq         %%T4, %%T4, 4
+
+        vpxor           %%T4, %%T4, %%T2
+        ;; Second phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vpxor           %%T3, %%T1, %%T4
+
+%ifidn %%INSTANCE_TYPE, multi_call
+        ;; If using init/update/finalize, we need to xor any partial block data
+        ;; into the hash.
+%if %%num_initial_blocks > 1
+        ;; NOTE: for %%num_initial_blocks = 0 the xor never takes place
+%if %%num_initial_blocks != 8
+        ;; NOTE: for %%num_initial_blocks = 8, %%LENGTH, stored in [PBlockLen] is never zero
+        cmp             qword [%%GDATA_CTX + PBlockLen], 0
+        je              %%_no_partial_block_xor
+%endif                          ; %%num_initial_blocks != 8
+        vpxor           %%T3, %%T3, reg(8)
+%%_no_partial_block_xor:
+%endif                          ; %%num_initial_blocks > 1
+%endif                          ; %%INSTANCE_TYPE, multi_call
+
+%if(%%num_initial_blocks=1)
+%ifidn %%INSTANCE_TYPE, multi_call
+        ;; NOTE: %%_no_reduction_needed case only valid for
+        ;;      multi_call with initial_blocks = 1.
+        ;; Look for comment above around '_no_reduction_needed'
+        ;; The jmp below is obsolete as the code will fall through.
+
+        ;; The result is in %%T3
+        jmp             %%_after_reduction
+
+%%_no_reduction_needed:
+        ;; The hash should end up in T3. The only way we should get here is if
+        ;; there is a partial block of data, so xor that into the hash.
+        vpxor            %%T3, %%T2, reg(8)
+%endif                          ; %%INSTANCE_TYPE = multi_call
+%endif                          ; %%num_initial_blocks=1
+
+%%_after_reduction:
+        ;; Final hash is now in T3
+
+%endmacro                       ; INITIAL_BLOCKS_PARTIAL
+
+; encrypt 8 blocks at a time
+; ghash the 8 previously encrypted ciphertext blocks
+; %%GDATA (KEY), %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN are used as pointers only, not modified
+; %%DATA_OFFSET is the data offset value
+%macro  GHASH_8_ENCRYPT_8_PARALLEL 23
+%define %%GDATA                 %1
+%define %%CYPH_PLAIN_OUT        %2
+%define %%PLAIN_CYPH_IN         %3
+%define %%DATA_OFFSET           %4
+%define %%T1    %5
+%define %%T2    %6
+%define %%T3    %7
+%define %%T4    %8
+%define %%T5    %9
+%define %%T6    %10
+%define %%CTR   %11
+%define %%XMM1  %12
+%define %%XMM2  %13
+%define %%XMM3  %14
+%define %%XMM4  %15
+%define %%XMM5  %16
+%define %%XMM6  %17
+%define %%XMM7  %18
+%define %%XMM8  %19
+%define %%T7    %20
+%define %%loop_idx      %21
+%define %%ENC_DEC       %22
+%define %%FULL_PARTIAL  %23
+
+        vmovdqa %%T2, %%XMM1
+        vmovdqu [rsp + TMP2], %%XMM2
+        vmovdqu [rsp + TMP3], %%XMM3
+        vmovdqu [rsp + TMP4], %%XMM4
+        vmovdqu [rsp + TMP5], %%XMM5
+        vmovdqu [rsp + TMP6], %%XMM6
+        vmovdqu [rsp + TMP7], %%XMM7
+        vmovdqu [rsp + TMP8], %%XMM8
+
+%ifidn %%loop_idx, in_order
+                vpaddd  %%XMM1, %%CTR,  [rel ONE]           ; INCR CNT
+                vmovdqa %%T5, [rel TWO]
+                vpaddd  %%XMM2, %%CTR, %%T5
+                vpaddd  %%XMM3, %%XMM1, %%T5
+                vpaddd  %%XMM4, %%XMM2, %%T5
+                vpaddd  %%XMM5, %%XMM3, %%T5
+                vpaddd  %%XMM6, %%XMM4, %%T5
+                vpaddd  %%XMM7, %%XMM5, %%T5
+                vpaddd  %%XMM8, %%XMM6, %%T5
+                vmovdqa %%CTR, %%XMM8
+
+                vmovdqa %%T5, [rel SHUF_MASK]
+                vpshufb %%XMM1, %%T5             ; perform a 16Byte swap
+                vpshufb %%XMM2, %%T5             ; perform a 16Byte swap
+                vpshufb %%XMM3, %%T5             ; perform a 16Byte swap
+                vpshufb %%XMM4, %%T5             ; perform a 16Byte swap
+                vpshufb %%XMM5, %%T5             ; perform a 16Byte swap
+                vpshufb %%XMM6, %%T5             ; perform a 16Byte swap
+                vpshufb %%XMM7, %%T5             ; perform a 16Byte swap
+                vpshufb %%XMM8, %%T5             ; perform a 16Byte swap
+%else
+                vpaddd  %%XMM1, %%CTR,  [rel ONEf]          ; INCR CNT
+                vmovdqa %%T5, [rel TWOf]
+                vpaddd  %%XMM2, %%CTR,  %%T5
+                vpaddd  %%XMM3, %%XMM1, %%T5
+                vpaddd  %%XMM4, %%XMM2, %%T5
+                vpaddd  %%XMM5, %%XMM3, %%T5
+                vpaddd  %%XMM6, %%XMM4, %%T5
+                vpaddd  %%XMM7, %%XMM5, %%T5
+                vpaddd  %%XMM8, %%XMM6, %%T5
+                vmovdqa %%CTR, %%XMM8
+%endif
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+                vmovdqu %%T1, [%%GDATA + 16*0]
+                vpxor   %%XMM1, %%XMM1, %%T1
+                vpxor   %%XMM2, %%XMM2, %%T1
+                vpxor   %%XMM3, %%XMM3, %%T1
+                vpxor   %%XMM4, %%XMM4, %%T1
+                vpxor   %%XMM5, %%XMM5, %%T1
+                vpxor   %%XMM6, %%XMM6, %%T1
+                vpxor   %%XMM7, %%XMM7, %%T1
+                vpxor   %%XMM8, %%XMM8, %%T1
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+                vmovdqu %%T1, [%%GDATA + 16*1]
+                vaesenc %%XMM1, %%T1
+                vaesenc %%XMM2, %%T1
+                vaesenc %%XMM3, %%T1
+                vaesenc %%XMM4, %%T1
+                vaesenc %%XMM5, %%T1
+                vaesenc %%XMM6, %%T1
+                vaesenc %%XMM7, %%T1
+                vaesenc %%XMM8, %%T1
+
+                vmovdqu %%T1, [%%GDATA + 16*2]
+                vaesenc %%XMM1, %%T1
+                vaesenc %%XMM2, %%T1
+                vaesenc %%XMM3, %%T1
+                vaesenc %%XMM4, %%T1
+                vaesenc %%XMM5, %%T1
+                vaesenc %%XMM6, %%T1
+                vaesenc %%XMM7, %%T1
+                vaesenc %%XMM8, %%T1
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_8]
+        vpclmulqdq      %%T4, %%T2, %%T5, 0x11                  ; %%T4 = a1*b1
+        vpclmulqdq      %%T7, %%T2, %%T5, 0x00                  ; %%T7 = a0*b0
+        vpclmulqdq      %%T6, %%T2, %%T5, 0x01                  ; %%T6 = a1*b0
+        vpclmulqdq      %%T5, %%T2, %%T5, 0x10                  ; %%T5 = a0*b1
+        vpxor           %%T6, %%T6, %%T5
+
+                vmovdqu %%T1, [%%GDATA + 16*3]
+                vaesenc %%XMM1, %%T1
+                vaesenc %%XMM2, %%T1
+                vaesenc %%XMM3, %%T1
+                vaesenc %%XMM4, %%T1
+                vaesenc %%XMM5, %%T1
+                vaesenc %%XMM6, %%T1
+                vaesenc %%XMM7, %%T1
+                vaesenc %%XMM8, %%T1
+
+        vmovdqu         %%T1, [rsp + TMP2]
+        vmovdqu         %%T5, [%%GDATA + HashKey_7]
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
+        vpxor           %%T4, %%T4, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
+        vpxor           %%T6, %%T6, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
+        vpxor           %%T6, %%T6, %%T3
+
+                vmovdqu %%T1, [%%GDATA + 16*4]
+                vaesenc %%XMM1, %%T1
+                vaesenc %%XMM2, %%T1
+                vaesenc %%XMM3, %%T1
+                vaesenc %%XMM4, %%T1
+                vaesenc %%XMM5, %%T1
+                vaesenc %%XMM6, %%T1
+                vaesenc %%XMM7, %%T1
+                vaesenc %%XMM8, %%T1
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vmovdqu         %%T1, [rsp + TMP3]
+        vmovdqu         %%T5, [%%GDATA + HashKey_6]
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
+        vpxor           %%T4, %%T4, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
+        vpxor           %%T6, %%T6, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
+        vpxor           %%T6, %%T6, %%T3
+
+                vmovdqu %%T1, [%%GDATA + 16*5]
+                vaesenc %%XMM1, %%T1
+                vaesenc %%XMM2, %%T1
+                vaesenc %%XMM3, %%T1
+                vaesenc %%XMM4, %%T1
+                vaesenc %%XMM5, %%T1
+                vaesenc %%XMM6, %%T1
+                vaesenc %%XMM7, %%T1
+                vaesenc %%XMM8, %%T1
+
+        vmovdqu         %%T1, [rsp + TMP4]
+        vmovdqu         %%T5, [%%GDATA + HashKey_5]
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
+        vpxor           %%T4, %%T4, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
+        vpxor           %%T6, %%T6, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
+        vpxor           %%T6, %%T6, %%T3
+
+                vmovdqu %%T1, [%%GDATA + 16*6]
+                vaesenc %%XMM1, %%T1
+                vaesenc %%XMM2, %%T1
+                vaesenc %%XMM3, %%T1
+                vaesenc %%XMM4, %%T1
+                vaesenc %%XMM5, %%T1
+                vaesenc %%XMM6, %%T1
+                vaesenc %%XMM7, %%T1
+                vaesenc %%XMM8, %%T1
+
+        vmovdqu         %%T1, [rsp + TMP5]
+        vmovdqu         %%T5, [%%GDATA + HashKey_4]
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
+        vpxor           %%T4, %%T4, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
+        vpxor           %%T6, %%T6, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
+        vpxor           %%T6, %%T6, %%T3
+
+                vmovdqu %%T1, [%%GDATA + 16*7]
+                vaesenc %%XMM1, %%T1
+                vaesenc %%XMM2, %%T1
+                vaesenc %%XMM3, %%T1
+                vaesenc %%XMM4, %%T1
+                vaesenc %%XMM5, %%T1
+                vaesenc %%XMM6, %%T1
+                vaesenc %%XMM7, %%T1
+                vaesenc %%XMM8, %%T1
+
+        vmovdqu         %%T1, [rsp + TMP6]
+        vmovdqu         %%T5, [%%GDATA + HashKey_3]
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
+        vpxor           %%T4, %%T4, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
+        vpxor           %%T6, %%T6, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
+        vpxor           %%T6, %%T6, %%T3
+
+                vmovdqu %%T1, [%%GDATA + 16*8]
+                vaesenc %%XMM1, %%T1
+                vaesenc %%XMM2, %%T1
+                vaesenc %%XMM3, %%T1
+                vaesenc %%XMM4, %%T1
+                vaesenc %%XMM5, %%T1
+                vaesenc %%XMM6, %%T1
+                vaesenc %%XMM7, %%T1
+                vaesenc %%XMM8, %%T1
+
+        vmovdqu         %%T1, [rsp + TMP7]
+        vmovdqu         %%T5, [%%GDATA + HashKey_2]
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
+        vpxor           %%T4, %%T4, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
+        vpxor           %%T6, %%T6, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
+        vpxor           %%T6, %%T6, %%T3
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+                vmovdqu %%T5, [%%GDATA + 16*9]
+                vaesenc %%XMM1, %%T5
+                vaesenc %%XMM2, %%T5
+                vaesenc %%XMM3, %%T5
+                vaesenc %%XMM4, %%T5
+                vaesenc %%XMM5, %%T5
+                vaesenc %%XMM6, %%T5
+                vaesenc %%XMM7, %%T5
+                vaesenc %%XMM8, %%T5
+
+        vmovdqu         %%T1, [rsp + TMP8]
+        vmovdqu         %%T5, [%%GDATA + HashKey]
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x01
+        vpxor           %%T6, %%T6, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x10
+        vpxor           %%T6, %%T6, %%T3
+
+        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
+        vpxor           %%T1, %%T4, %%T3
+
+                vmovdqu %%T5, [%%GDATA + 16*10]
+ %ifndef GCM128_MODE            ; GCM192 or GCM256
+                vaesenc %%XMM1, %%T5
+                vaesenc %%XMM2, %%T5
+                vaesenc %%XMM3, %%T5
+                vaesenc %%XMM4, %%T5
+                vaesenc %%XMM5, %%T5
+                vaesenc %%XMM6, %%T5
+                vaesenc %%XMM7, %%T5
+                vaesenc %%XMM8, %%T5
+
+                vmovdqu %%T5, [%%GDATA + 16*11]
+                vaesenc %%XMM1, %%T5
+                vaesenc %%XMM2, %%T5
+                vaesenc %%XMM3, %%T5
+                vaesenc %%XMM4, %%T5
+                vaesenc %%XMM5, %%T5
+                vaesenc %%XMM6, %%T5
+                vaesenc %%XMM7, %%T5
+                vaesenc %%XMM8, %%T5
+
+                vmovdqu %%T5, [%%GDATA + 16*12]
+%endif
+%ifdef GCM256_MODE
+                vaesenc %%XMM1, %%T5
+                vaesenc %%XMM2, %%T5
+                vaesenc %%XMM3, %%T5
+                vaesenc %%XMM4, %%T5
+                vaesenc %%XMM5, %%T5
+                vaesenc %%XMM6, %%T5
+                vaesenc %%XMM7, %%T5
+                vaesenc %%XMM8, %%T5
+
+                vmovdqu %%T5, [%%GDATA + 16*13]
+                vaesenc %%XMM1, %%T5
+                vaesenc %%XMM2, %%T5
+                vaesenc %%XMM3, %%T5
+                vaesenc %%XMM4, %%T5
+                vaesenc %%XMM5, %%T5
+                vaesenc %%XMM6, %%T5
+                vaesenc %%XMM7, %%T5
+                vaesenc %%XMM8, %%T5
+
+                vmovdqu %%T5, [%%GDATA + 16*14]
+%endif                          ; GCM256
+
+%assign i 0
+%assign j 1
+%rep 8
+
+        ;; SNP TBD: This is pretty ugly - consider whether just XORing the
+        ;; data in after vaesenclast is simpler and performant. Would
+        ;; also have to ripple it through partial block and ghash_mul_8.
+%ifidn %%FULL_PARTIAL, full
+    %ifdef  NT_LD
+        VXLDR   %%T2, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
+        vpxor   %%T2, %%T2, %%T5
+    %else
+        vpxor   %%T2, %%T5, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
+    %endif
+
+    %ifidn %%ENC_DEC, ENC
+        vaesenclast     reg(j), reg(j), %%T2
+    %else
+        vaesenclast     %%T3, reg(j), %%T2
+        vpxor   reg(j), %%T2, %%T5
+        VXSTR [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*i], %%T3
+    %endif
+
+%else
+    ; Don't read the final data during partial block processing
+    %ifdef  NT_LD
+        %if (i<7)
+            VXLDR   %%T2, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
+            vpxor   %%T2, %%T2, %%T5
+        %else
+            ;; Stage the key directly in T2 rather than hash it with plaintext
+            vmovdqu %%T2, %%T5
+        %endif
+    %else
+        %if (i<7)
+            vpxor   %%T2, %%T5, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
+        %else
+            ;; Stage the key directly in T2 rather than hash it with plaintext
+            vmovdqu %%T2, %%T5
+        %endif
+    %endif
+
+    %ifidn %%ENC_DEC, ENC
+        vaesenclast     reg(j), reg(j), %%T2
+    %else
+        %if (i<7)
+            vaesenclast     %%T3, reg(j), %%T2
+            vpxor   reg(j), %%T2, %%T5
+            ;; Do not read the data since it could fault
+            VXSTR [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*i], %%T3
+        %else
+            vaesenclast     reg(j), reg(j), %%T2
+        %endif
+    %endif
+%endif
+
+%assign i (i+1)
+%assign j (j+1)
+%endrep
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+        vpslldq %%T3, %%T6, 8                                   ; shift-L %%T3 2 DWs
+        vpsrldq %%T6, %%T6, 8                                   ; shift-R %%T2 2 DWs
+        vpxor   %%T7, %%T7, %%T3
+        vpxor   %%T1, %%T1, %%T6                                ; accumulate the results in %%T1:%%T7
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;first phase of the reduction
+        vmovdqa         %%T3, [rel POLY2]
+
+        vpclmulqdq      %%T2, %%T3, %%T7, 0x01
+        vpslldq         %%T2, %%T2, 8                           ; shift-L xmm2 2 DWs
+
+        vpxor           %%T7, %%T7, %%T2                        ; first phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+    %ifidn %%ENC_DEC, ENC
+        ; Write to the Ciphertext buffer
+        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*0], %%XMM1
+        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*1], %%XMM2
+        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*2], %%XMM3
+        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*3], %%XMM4
+        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*4], %%XMM5
+        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*5], %%XMM6
+        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*6], %%XMM7
+        %ifidn %%FULL_PARTIAL, full
+            ;; Avoid writing past the buffer if handling a partial block
+            VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*7], %%XMM8
+        %endif
+    %endif
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;second phase of the reduction
+        vpclmulqdq      %%T2, %%T3, %%T7, 0x00
+        vpsrldq         %%T2, %%T2, 4                                   ; shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
+
+        vpclmulqdq      %%T4, %%T3, %%T7, 0x10
+        vpslldq         %%T4, %%T4, 4                                   ; shift-L xmm0 1 DW (Shift-L 1-DW to obtain result with no shifts)
+
+        vpxor           %%T4, %%T4, %%T2                                ; second phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vpxor           %%T1, %%T1, %%T4                                ; the result is in %%T1
+
+                vpshufb %%XMM1, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM2, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM3, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM4, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM5, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM6, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM7, [rel SHUF_MASK]             ; perform a 16Byte swap
+        vpshufb %%XMM8, [rel SHUF_MASK]             ; perform a 16Byte swap
+
+        vpxor   %%XMM1, %%T1
+
+%endmacro                       ; GHASH_8_ENCRYPT_8_PARALLEL
+
+; GHASH the last 4 ciphertext blocks.
+%macro  GHASH_LAST_8 16
+%define %%GDATA %1
+%define %%T1    %2
+%define %%T2    %3
+%define %%T3    %4
+%define %%T4    %5
+%define %%T5    %6
+%define %%T6    %7
+%define %%T7    %8
+%define %%XMM1  %9
+%define %%XMM2  %10
+%define %%XMM3  %11
+%define %%XMM4  %12
+%define %%XMM5  %13
+%define %%XMM6  %14
+%define %%XMM7  %15
+%define %%XMM8  %16
+
+        ;; Karatsuba Method
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_8]
+
+        vpshufd         %%T2, %%XMM1, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM1
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T6, %%XMM1, %%T5, 0x11
+        vpclmulqdq      %%T7, %%XMM1, %%T5, 0x00
+
+        vpclmulqdq      %%XMM1, %%T2, %%T3, 0x00
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_7]
+        vpshufd         %%T2, %%XMM2, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM2
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_6]
+        vpshufd         %%T2, %%XMM3, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM3
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_5]
+        vpshufd         %%T2, %%XMM4, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM4
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_4]
+        vpshufd         %%T2, %%XMM5, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM5
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_3]
+        vpshufd         %%T2, %%XMM6, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM6
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_2]
+        vpshufd         %%T2, %%XMM7, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM7
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey]
+        vpshufd         %%T2, %%XMM8, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM8
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM8, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM8, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+        vpxor           %%XMM1, %%XMM1, %%T6
+        vpxor           %%T2, %%XMM1, %%T7
+
+        vpslldq %%T4, %%T2, 8
+        vpsrldq %%T2, %%T2, 8
+
+        vpxor   %%T7, %%T7, %%T4
+        vpxor   %%T6, %%T6, %%T2                               ; <%%T6:%%T7> holds the result of the accumulated carry-less multiplications
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;first phase of the reduction
+        vmovdqa         %%T3, [rel POLY2]
+
+        vpclmulqdq      %%T2, %%T3, %%T7, 0x01
+        vpslldq         %%T2, %%T2, 8                           ; shift-L xmm2 2 DWs
+
+        vpxor           %%T7, %%T7, %%T2                        ; first phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+        ;second phase of the reduction
+        vpclmulqdq      %%T2, %%T3, %%T7, 0x00
+        vpsrldq         %%T2, %%T2, 4                           ; shift-R %%T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
+
+        vpclmulqdq      %%T4, %%T3, %%T7, 0x10
+        vpslldq         %%T4, %%T4, 4                           ; shift-L %%T4 1 DW (Shift-L 1-DW to obtain result with no shifts)
+
+        vpxor           %%T4, %%T4, %%T2                        ; second phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vpxor           %%T6, %%T6, %%T4                        ; the result is in %%T6
+%endmacro
+
+; GHASH the last 4 ciphertext blocks.
+%macro  GHASH_LAST_7 15
+%define %%GDATA %1
+%define %%T1    %2
+%define %%T2    %3
+%define %%T3    %4
+%define %%T4    %5
+%define %%T5    %6
+%define %%T6    %7
+%define %%T7    %8
+%define %%XMM1  %9
+%define %%XMM2  %10
+%define %%XMM3  %11
+%define %%XMM4  %12
+%define %%XMM5  %13
+%define %%XMM6  %14
+%define %%XMM7  %15
+
+        ;; Karatsuba Method
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_7]
+
+        vpshufd         %%T2, %%XMM1, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM1
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T6, %%XMM1, %%T5, 0x11
+        vpclmulqdq      %%T7, %%XMM1, %%T5, 0x00
+
+        vpclmulqdq      %%XMM1, %%T2, %%T3, 0x00
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_6]
+        vpshufd         %%T2, %%XMM2, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM2
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_5]
+        vpshufd         %%T2, %%XMM3, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM3
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_4]
+        vpshufd         %%T2, %%XMM4, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM4
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_3]
+        vpshufd         %%T2, %%XMM5, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM5
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_2]
+        vpshufd         %%T2, %%XMM6, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM6
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vmovdqu         %%T5, [%%GDATA + HashKey_1]
+        vpshufd         %%T2, %%XMM7, 01001110b
+        vpshufd         %%T3, %%T5, 01001110b
+        vpxor           %%T2, %%T2, %%XMM7
+        vpxor           %%T3, %%T3, %%T5
+
+        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x11
+        vpxor           %%T6, %%T6, %%T4
+
+        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x00
+        vpxor           %%T7, %%T7, %%T4
+
+        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
+
+        vpxor           %%XMM1, %%XMM1, %%T2
+
+        ;;;;;;;;;;;;;;;;;;;;;;
+
+        vpxor           %%XMM1, %%XMM1, %%T6
+        vpxor           %%T2, %%XMM1, %%T7
+
+        vpslldq %%T4, %%T2, 8
+        vpsrldq %%T2, %%T2, 8
+
+        vpxor   %%T7, %%T7, %%T4
+        vpxor   %%T6, %%T6, %%T2                               ; <%%T6:%%T7> holds the result of the accumulated carry-less multiplications
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;first phase of the reduction
+        vmovdqa         %%T3, [rel POLY2]
+
+        vpclmulqdq      %%T2, %%T3, %%T7, 0x01
+        vpslldq         %%T2, %%T2, 8                           ; shift-L xmm2 2 DWs
+
+        vpxor           %%T7, %%T7, %%T2                        ; first phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+        ;second phase of the reduction
+        vpclmulqdq      %%T2, %%T3, %%T7, 0x00
+        vpsrldq         %%T2, %%T2, 4                           ; shift-R %%T2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
+
+        vpclmulqdq      %%T4, %%T3, %%T7, 0x10
+        vpslldq         %%T4, %%T4, 4                           ; shift-L %%T4 1 DW (Shift-L 1-DW to obtain result with no shifts)
+
+        vpxor           %%T4, %%T4, %%T2                        ; second phase of the reduction complete
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vpxor           %%T6, %%T6, %%T4                        ; the result is in %%T6
+%endmacro
+
+;;; Handle encryption of the final partial block
+;;; IN:
+;;;   r13  - Number of bytes to read
+;;; MODIFIES:
+;;;   KEY  - Key for encrypting the partial block
+;;;   HASH - Current hash value
+;;; SMASHES:
+;;;   r10, r12, r15, rax
+;;;   T1, T2
+;;; Note AVX2:
+;;;   PLAIN_CYPH_LEN, %7, is passed only to determine
+;;;   if buffer is big enough to do a 16 byte read & shift.
+;;;     'LT16' is passed here only if buffer is known to be smaller
+;;;     than 16 bytes.
+;;;     Any other value passed here will result in 16 byte read
+;;;     code path.
+;;; Note AVX512:
+;;;   PLAIN_CYPH_LEN and T2 are unused at this stage.
+%macro  ENCRYPT_FINAL_PARTIAL_BLOCK 8
+%define %%KEY             %1
+%define %%T1              %2
+%define %%T2              %3
+%define %%CYPH_PLAIN_OUT  %4
+%define %%PLAIN_CYPH_IN   %5
+%define %%PLAIN_CYPH_LEN  %6
+%define %%ENC_DEC         %7
+%define %%DATA_OFFSET     %8
+
+%ifdef IS_AVX2_GCM
+
+        ;; NOTE: type of read tuned based %%PLAIN_CYPH_LEN setting
+%ifidn %%PLAIN_CYPH_LEN, LT16
+        ;; Handle the case where the message is < 16 bytes
+        lea      r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
+
+        ;; T1            - packed output
+        ;; r10           - input data address
+        ;; r13           - input data length
+        ;; r12, r15, rax - temp registers
+        READ_SMALL_DATA_INPUT_AVX   %%T1, r10, r13, r12, r15, rax
+
+        lea      r12, [SHIFT_MASK + 16]
+        sub      r12, r13
+%else
+        ;; Handle the case where the message is >= 16 bytes
+        sub      %%DATA_OFFSET, 16
+        add      %%DATA_OFFSET, r13
+        ;; Receive the last <16 Byte block
+        vmovdqu  %%T1, [%%PLAIN_CYPH_IN+%%DATA_OFFSET]
+        sub      %%DATA_OFFSET, r13
+        add      %%DATA_OFFSET, 16
+
+        lea      r12, [SHIFT_MASK + 16]
+        ;; Adjust the shuffle mask pointer to be able to shift 16-r13 bytes
+        ;; (r13 is the number of bytes in plaintext mod 16)
+        sub      r12, r13
+        ;; Get the appropriate shuffle mask
+        vmovdqu  %%T2, [r12]
+        ;; shift right 16-r13 bytes
+        vpshufb  %%T1, %%T2
+%endif                          ; %%PLAIN_CYPH_LEN, LT16
+
+        ;; At this point T1 contains the partial block data
+%ifidn  %%ENC_DEC, DEC
+        ;; Plaintext XOR E(K, Yn)
+        ;; Set aside the ciphertext
+        vmovdqa  %%T2, %%T1
+        vpxor    %%KEY, %%KEY, %%T1
+        ;; Get the appropriate mask to mask out top 16-r13 bytes of ciphertext
+        vmovdqu  %%T1, [r12 + ALL_F - SHIFT_MASK]
+        ;; Mask out top 16-r13 bytes of ciphertext
+        vpand    %%KEY, %%KEY, %%T1
+
+        ;; Prepare the ciphertext for the hash
+        ;; mask out top 16-r13 bytes of the plaintext
+        vpand    %%T2, %%T2, %%T1
+%else
+        ;; Plaintext XOR E(K, Yn)
+        vpxor    %%KEY, %%KEY, %%T1
+        ;; Get the appropriate mask to mask out top 16-r13 bytes of %%KEY
+        vmovdqu  %%T1, [r12 + ALL_F - SHIFT_MASK]
+        ;; Mask out top 16-r13 bytes of %%KEY
+        vpand    %%KEY, %%KEY, %%T1
+%endif
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;; Output r13 Bytes
+        vmovq   rax, %%KEY
+        cmp     r13, 8
+        jle     %%_less_than_8_bytes_left
+
+        mov     [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], rax
+        add     %%DATA_OFFSET, 8
+        vpsrldq %%T1, %%KEY, 8
+        vmovq   rax, %%T1
+        sub     r13, 8
+
+%%_less_than_8_bytes_left:
+        mov     BYTE [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], al
+        add     %%DATA_OFFSET, 1
+        shr     rax, 8
+        sub     r13, 1
+        jne     %%_less_than_8_bytes_left
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+%ifidn  %%ENC_DEC, DEC
+        ;; If decrypt, restore the ciphertext into %%KEY
+        vmovdqu %%KEY, %%T2
+%endif
+
+%else ;; IS_AVX512_GCM
+
+        ;; %%PLAIN_CYPH_IN + %%DATA_OFFSET
+        ;;               - input data address
+        ;; r13           - input data length
+        ;; rax           - temp registers
+        ;; out:
+        ;; T1            - packed output
+        ;; k1            - valid byte mask
+        READ_SMALL_DATA_INPUT_AVX512   %%T1, {%%PLAIN_CYPH_IN + %%DATA_OFFSET}, r13, rax, k1
+
+        ;; At this point T1 contains the partial block data
+        ;; Plaintext XOR E(K, Yn)
+        vpxorq          %%KEY, %%KEY, %%T1
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;; Output r13 Bytes
+        vmovdqu8        [%%CYPH_PLAIN_OUT + %%DATA_OFFSET]{k1}, %%KEY
+
+%ifidn  %%ENC_DEC, DEC
+        ;; If decrypt, restore the ciphertext into %%KEY
+        vmovdqa64       %%KEY, %%T1
+%else
+        vmovdqu8        %%KEY{k1}{z}, %%KEY
+%endif
+
+%endif ;; IS_AVX512_GCM
+
+%endmacro                       ; ENCRYPT_FINAL_PARTIAL_BLOCK
+
+; Encryption of a single block
+%macro  ENCRYPT_SINGLE_BLOCK 2
+%define %%GDATA %1
+%define %%XMM0  %2
+
+                vpxor    %%XMM0, %%XMM0, [%%GDATA+16*0]
+%assign i 1
+%rep NROUNDS
+                vaesenc  %%XMM0, [%%GDATA+16*i]
+%assign i (i+1)
+%endrep
+                vaesenclast      %%XMM0, [%%GDATA+16*i]
+%endmacro
+
+;; Start of Stack Setup
+
+%macro FUNC_SAVE 0-1
+	;; Required for Update/GCM_ENC
+        mov     rax, rsp
+
+%if %0 == 0
+	sub     rsp, VARIABLE_OFFSET
+%else
+%ifidni %1, alloc_context
+        sub     rsp, VARIABLE_OFFSET + CONTEXT_SIZE
+%endif
+%endif
+	and     rsp, ~63
+
+        mov     [rsp + GP_OFFSET + 0*8], rax ; original rsp pointer
+        mov     [rsp + GP_OFFSET + 1*8], r12
+        mov     [rsp + GP_OFFSET + 2*8], r13
+        mov     [rsp + GP_OFFSET + 3*8], r14
+        mov     [rsp + GP_OFFSET + 4*8], r15
+        mov     r14, rax
+
+%ifidn __OUTPUT_FORMAT__, win64
+        ; xmm6:xmm15 need to be maintained for Windows
+        vmovdqu [rsp + LOCAL_STORAGE + 0*16], xmm6
+        vmovdqu [rsp + LOCAL_STORAGE + 1*16], xmm7
+        vmovdqu [rsp + LOCAL_STORAGE + 2*16], xmm8
+        vmovdqu [rsp + LOCAL_STORAGE + 3*16], xmm9
+        vmovdqu [rsp + LOCAL_STORAGE + 4*16], xmm10
+        vmovdqu [rsp + LOCAL_STORAGE + 5*16], xmm11
+        vmovdqu [rsp + LOCAL_STORAGE + 6*16], xmm12
+        vmovdqu [rsp + LOCAL_STORAGE + 7*16], xmm13
+        vmovdqu [rsp + LOCAL_STORAGE + 8*16], xmm14
+        vmovdqu [rsp + LOCAL_STORAGE + 9*16], xmm15
+%endif
+%endmacro
+
+%macro FUNC_RESTORE 0
+
+%ifdef SAFE_DATA
+        clear_scratch_xmms_avx_asm
+%endif
+%ifidn __OUTPUT_FORMAT__, win64
+        vmovdqu xmm15, [rsp + LOCAL_STORAGE + 9*16]
+        vmovdqu xmm14, [rsp + LOCAL_STORAGE + 8*16]
+        vmovdqu xmm13, [rsp + LOCAL_STORAGE + 7*16]
+        vmovdqu xmm12, [rsp + LOCAL_STORAGE + 6*16]
+        vmovdqu xmm11, [rsp + LOCAL_STORAGE + 5*16]
+        vmovdqu xmm10, [rsp + LOCAL_STORAGE + 4*16]
+        vmovdqu xmm9,  [rsp + LOCAL_STORAGE + 3*16]
+        vmovdqu xmm8,  [rsp + LOCAL_STORAGE + 2*16]
+        vmovdqu xmm7,  [rsp + LOCAL_STORAGE + 1*16]
+        vmovdqu xmm6,  [rsp + LOCAL_STORAGE + 0*16]
+%endif
+
+        ;; Required for Update/GCM_ENC
+        mov     r12, [rsp + GP_OFFSET + 1*8]
+        mov     r13, [rsp + GP_OFFSET + 2*8]
+        mov     r14, [rsp + GP_OFFSET + 3*8]
+        mov     r15, [rsp + GP_OFFSET + 4*8]
+        mov     rsp, [rsp + GP_OFFSET + 0*8]
+%endmacro
+
+%macro CALC_J0 15
+%define %%KEY           %1 ;; [in] Pointer to GCM KEY structure
+%define %%IV            %2 ;; [in] Pointer to IV
+%define %%IV_LEN        %3 ;; [in] IV length
+%define %%J0            %4 ;; [out] XMM reg to contain J0
+%define %%TMP0          %5 ;; [clobbered] Temporary GP reg
+%define %%TMP1          %6 ;; [clobbered] Temporary GP reg
+%define %%TMP2          %7 ;; [clobbered] Temporary GP reg
+%define %%TMP3          %8 ;; [clobbered] Temporary GP reg (unused with AVX512)
+%define %%TMP4          %9 ;; [clobbered] Temporary GP reg (unused with AVX512)
+%define %%XTMP0         %10 ;; [clobbered] Temporary XMM reg
+%define %%XTMP1         %11 ;; [clobbered] Temporary XMM reg
+%define %%XTMP2         %12 ;; [clobbered] Temporary XMM reg
+%define %%XTMP3         %13 ;; [clobbered] Temporary XMM reg
+%define %%XTMP4         %14 ;; [clobbered] Temporary XMM reg
+%define %%XTMP5         %15 ;; [clobbered] Temporary XMM reg
+
+        ;; J0 = GHASH(IV || 0s+64 || len(IV)64)
+        ;; s = 16 * RoundUp(len(IV)/16) -  len(IV) */
+
+        ;; Calculate GHASH of (IV || 0s)
+        vpxor   %%J0, %%J0
+%ifdef IS_AVX2_GCM
+        CALC_AAD_HASH %%IV, %%IV_LEN, %%J0, %%KEY, %%XTMP0, %%XTMP1, %%XTMP2, \
+                      %%XTMP3, %%XTMP4, %%XTMP5, %%TMP0, %%TMP1, %%TMP2, %%TMP3, %%TMP4
+%else
+        CALC_AAD_HASH %%IV, %%IV_LEN, %%J0, %%KEY, %%XTMP0, %%XTMP1, %%XTMP2, \
+                      %%XTMP3, %%XTMP4, %%XTMP5, %%TMP0, %%TMP1, %%TMP2
+%endif
+
+        ;; Calculate GHASH of last 16-byte block (0 || len(IV)64)
+        vmovdqu %%XTMP0, [%%KEY + HashKey]
+        mov     %%TMP2, %%IV_LEN
+        shl     %%TMP2, 3 ;; IV length in bits
+        vmovq   %%XTMP1, %%TMP2
+        vpxor   %%J0, %%XTMP1
+        GHASH_MUL %%J0, %%XTMP0, %%XTMP1, %%XTMP2, %%XTMP3, %%XTMP4, %%XTMP5
+
+        vpshufb %%J0, [rel SHUF_MASK] ; perform a 16Byte swap
+%endmacro
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; GCM_INIT initializes a gcm_context_data struct to prepare for encoding/decoding.
+; Input: gcm_key_data * (GDATA_KEY), gcm_context_data *(GDATA_CTX), IV, IV_LEN,
+; Additional Authentication data (A_IN), Additional Data length (A_LEN).
+; Output: Updated GDATA_CTX with the hash of A_IN (AadHash) and initialized other parts of GDATA.
+; Clobbers rax, r10-r13 and xmm0-xmm6
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+%macro  GCM_INIT        8-9
+%define %%GDATA_KEY     %1      ; [in] GCM expanded keys pointer
+%define %%GDATA_CTX     %2      ; [in] GCM context pointer
+%define %%IV            %3      ; [in] IV pointer
+%define %%A_IN          %4      ; [in] AAD pointer
+%define %%A_LEN         %5      ; [in] AAD length in bytes
+%define %%GPR1          %6      ; temp GPR
+%define %%GPR2          %7      ; temp GPR
+%define %%GPR3          %8      ; temp GPR
+%define %%IV_LEN        %9      ; [in] IV length
+
+%define %%AAD_HASH      xmm14
+
+        vpxor   %%AAD_HASH, %%AAD_HASH
+%ifdef IS_AVX2_GCM
+       CALC_AAD_HASH %%A_IN, %%A_LEN, %%AAD_HASH, %%GDATA_KEY, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, %%GPR1, %%GPR2, %%GPR3, r13, rax
+%else
+       CALC_AAD_HASH %%A_IN, %%A_LEN, %%AAD_HASH, %%GDATA_KEY, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, %%GPR1, %%GPR2, %%GPR3
+%endif
+        mov     %%GPR1, %%A_LEN
+        vmovdqu [%%GDATA_CTX + AadHash], %%AAD_HASH         ; ctx_data.aad hash = aad_hash
+        mov     [%%GDATA_CTX + AadLen], %%GPR1              ; ctx_data.aad_length = aad_length
+
+        xor     %%GPR1, %%GPR1
+        mov     [%%GDATA_CTX + InLen], %%GPR1               ; ctx_data.in_length = 0
+        mov     [%%GDATA_CTX + PBlockLen], %%GPR1           ; ctx_data.partial_block_length = 0
+
+%if %0 == 9 ;; IV is different than 12 bytes
+        CALC_J0 %%GDATA_KEY, %%IV, %%IV_LEN, xmm2, r10, r11, r12, r13, rax, xmm0, xmm1, \
+                xmm3, xmm4, xmm5, xmm6
+%else ;; IV is 12 bytes
+        ;; read 12 IV bytes and pad with 0x00000001
+        mov     %%GPR2, %%IV
+        vmovdqa xmm2, [rel ONEf]                        ; read 12 IV bytes and pad with 0x00000001
+        vpinsrq xmm2, [%%GPR2], 0
+        vpinsrd xmm2, [%%GPR2 + 8], 2
+%endif
+        vmovdqu [%%GDATA_CTX + OrigIV], xmm2                ; ctx_data.orig_IV = iv
+
+        ;; store IV as counter in LE format
+        vpshufb xmm2, [rel SHUF_MASK]
+        vmovdqu [%%GDATA_CTX + CurCount], xmm2              ; ctx_data.current_counter = iv
+%endmacro
+
+%macro  GCM_ENC_DEC_SMALL   12
+%define %%GDATA_KEY         %1
+%define %%GDATA_CTX         %2
+%define %%CYPH_PLAIN_OUT    %3
+%define %%PLAIN_CYPH_IN     %4
+%define %%PLAIN_CYPH_LEN    %5
+%define %%ENC_DEC           %6
+%define %%DATA_OFFSET       %7
+%define %%LENGTH            %8  ; assumed r13
+%define %%NUM_BLOCKS        %9
+%define %%CTR               %10 ; assumed xmm9
+%define %%HASH_OUT          %11 ; assumed xmm14
+%define %%INSTANCE_TYPE     %12
+
+        ;; NOTE: the check below is obsolete in current implementation. The check is already done in GCM_ENC_DEC.
+        ;; cmp     %%NUM_BLOCKS, 0
+        ;; je      %%_small_initial_blocks_encrypted
+        cmp     %%NUM_BLOCKS, 7
+        je      %%_small_initial_num_blocks_is_7
+        ja      %%_small_initial_num_blocks_is_8
+        cmp     %%NUM_BLOCKS, 5
+        je      %%_small_initial_num_blocks_is_5
+        ja      %%_small_initial_num_blocks_is_6
+        cmp     %%NUM_BLOCKS, 3
+        je      %%_small_initial_num_blocks_is_3
+        ja      %%_small_initial_num_blocks_is_4
+        cmp     %%NUM_BLOCKS, 2
+        je      %%_small_initial_num_blocks_is_2
+
+        jmp     %%_small_initial_num_blocks_is_1
+
+%%_small_initial_num_blocks_is_8:
+        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
+                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 8, \
+                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
+                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
+                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
+        jmp     %%_small_initial_blocks_encrypted
+
+%%_small_initial_num_blocks_is_7:
+        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
+                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 7, \
+                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
+                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
+                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
+        jmp     %%_small_initial_blocks_encrypted
+
+%%_small_initial_num_blocks_is_6:
+        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
+                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 6, \
+                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
+                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
+                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
+        jmp     %%_small_initial_blocks_encrypted
+
+%%_small_initial_num_blocks_is_5:
+        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
+                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 5, \
+                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
+                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
+                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
+        jmp     %%_small_initial_blocks_encrypted
+
+%%_small_initial_num_blocks_is_4:
+        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
+                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 4, \
+                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
+                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
+                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
+        jmp     %%_small_initial_blocks_encrypted
+
+%%_small_initial_num_blocks_is_3:
+        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
+                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 3, \
+                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
+                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
+                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
+        jmp     %%_small_initial_blocks_encrypted
+
+%%_small_initial_num_blocks_is_2:
+        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
+                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 2, \
+                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
+                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
+                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
+        jmp     %%_small_initial_blocks_encrypted
+
+%%_small_initial_num_blocks_is_1:
+        INITIAL_BLOCKS_PARTIAL  %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, \
+                %%PLAIN_CYPH_IN, %%LENGTH, %%DATA_OFFSET, 1, \
+                xmm12, xmm13, %%HASH_OUT, xmm15, xmm11, %%CTR, \
+                xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, \
+                xmm10, xmm0, %%ENC_DEC, %%INSTANCE_TYPE
+%%_small_initial_blocks_encrypted:
+
+        ;; Note: zero initial blocks not allowed.
+
+%endmacro                       ; GCM_ENC_DEC_SMALL
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; GCM_ENC_DEC Encodes/Decodes given data. Assumes that the passed gcm_context_data struct
+; has been initialized by GCM_INIT
+; Requires the input data be at least 1 byte long because of READ_SMALL_INPUT_DATA.
+; Input: gcm_key_data struct* (GDATA_KEY), gcm_context_data *(GDATA_CTX), input text (PLAIN_CYPH_IN),
+; input text length (PLAIN_CYPH_LEN) and whether encoding or decoding (ENC_DEC).
+; Output: A cypher of the given plain text (CYPH_PLAIN_OUT), and updated GDATA_CTX
+; Clobbers rax, r10-r15, and xmm0-xmm15
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+%macro  GCM_ENC_DEC         7
+%define %%GDATA_KEY         %1
+%define %%GDATA_CTX         %2
+%define %%CYPH_PLAIN_OUT    %3
+%define %%PLAIN_CYPH_IN     %4
+%define %%PLAIN_CYPH_LEN    %5
+%define %%ENC_DEC           %6
+%define %%INSTANCE_TYPE     %7
+%define %%DATA_OFFSET       r11
+
+; Macro flow:
+; calculate the number of 16byte blocks in the message
+; process (number of 16byte blocks) mod 8 '%%_initial_num_blocks_is_# .. %%_initial_blocks_encrypted'
+; process 8 16 byte blocks at a time until all are done '%%_encrypt_by_8_new .. %%_eight_cipher_left'
+; if there is a block of less than 16 bytes process it '%%_zero_cipher_left .. %%_multiple_of_16_bytes'
+
+%ifidn __OUTPUT_FORMAT__, win64
+        cmp     %%PLAIN_CYPH_LEN, 0
+%else
+        or      %%PLAIN_CYPH_LEN, %%PLAIN_CYPH_LEN
+%endif
+        je      %%_enc_dec_done
+
+        xor     %%DATA_OFFSET, %%DATA_OFFSET
+        ;; Update length of data processed
+%ifidn __OUTPUT_FORMAT__, win64
+        mov     rax, %%PLAIN_CYPH_LEN
+       	add     [%%GDATA_CTX + InLen], rax
+%else
+        add    [%%GDATA_CTX + InLen], %%PLAIN_CYPH_LEN
+%endif
+        vmovdqu xmm13, [%%GDATA_KEY + HashKey]
+        vmovdqu xmm8, [%%GDATA_CTX + AadHash]
+
+%ifidn %%INSTANCE_TYPE, multi_call
+        ;; NOTE: partial block processing makes only sense for multi_call here.
+        ;; Used for the update flow - if there was a previous partial
+        ;; block fill the remaining bytes here.
+        PARTIAL_BLOCK %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, %%DATA_OFFSET, xmm8, xmm13, %%ENC_DEC
+%endif
+
+        ;;  lift CTR set from initial_blocks to here
+%ifidn %%INSTANCE_TYPE, single_call
+        vmovdqu xmm9, xmm2
+%else
+        vmovdqu xmm9, [%%GDATA_CTX + CurCount]
+%endif
+
+        ;; Save the amount of data left to process in r10
+        mov     r13, %%PLAIN_CYPH_LEN
+%ifidn %%INSTANCE_TYPE, multi_call
+        ;; NOTE: %%DATA_OFFSET is zero in single_call case.
+        ;;      Consequently PLAIN_CYPH_LEN will never be zero after
+        ;;      %%DATA_OFFSET subtraction below.
+        sub     r13, %%DATA_OFFSET
+
+        ;; There may be no more data if it was consumed in the partial block.
+        or      r13, r13
+        je      %%_enc_dec_done
+%endif                          ; %%INSTANCE_TYPE, multi_call
+        mov     r10, r13
+
+        ;; Determine how many blocks to process in INITIAL
+        mov     r12, r13
+        shr     r12, 4
+        and     r12, 7
+
+        ;; Process one additional block in INITIAL if there is a partial block
+        and     r10, 0xf
+        blsmsk  r10, r10    ; Set CF if zero
+        cmc                 ; Flip CF
+        adc     r12, 0x0    ; Process an additional INITIAL block if CF set
+
+        ;;      Less than 127B will be handled by the small message code, which
+        ;;      can process up to 7 16B blocks.
+        cmp     r13, 128
+        jge     %%_large_message_path
+
+        GCM_ENC_DEC_SMALL %%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, %%ENC_DEC, %%DATA_OFFSET, r13, r12, xmm9, xmm14, %%INSTANCE_TYPE
+        jmp     %%_ghash_done
+
+%%_large_message_path:
+        and     r12, 0x7    ; Still, don't allow 8 INITIAL blocks since this will
+                            ; can be handled by the x8 partial loop.
+
+        je      %%_initial_num_blocks_is_0
+        cmp     r12, 6
+        ja      %%_initial_num_blocks_is_7
+        je      %%_initial_num_blocks_is_6
+        cmp     r12, 4
+        ja      %%_initial_num_blocks_is_5
+        je      %%_initial_num_blocks_is_4
+        cmp     r12, 2
+        ja      %%_initial_num_blocks_is_3
+        je      %%_initial_num_blocks_is_2
+
+        jmp     %%_initial_num_blocks_is_1
+
+%%_initial_num_blocks_is_7:
+        ;; r13   - %%LENGTH
+        ;; xmm12 - T1
+        ;; xmm13 - T2
+        ;; xmm14 - T3   - AAD HASH OUT when not producing 8 AES keys
+        ;; xmm15 - T4
+        ;; xmm11 - T5
+        ;; xmm9  - CTR
+        ;; xmm1  - XMM1 - Cipher + Hash when producing 8 AES keys
+        ;; xmm2  - XMM2
+        ;; xmm3  - XMM3
+        ;; xmm4  - XMM4
+        ;; xmm5  - XMM5
+        ;; xmm6  - XMM6
+        ;; xmm7  - XMM7
+        ;; xmm8  - XMM8 - AAD HASH IN
+        ;; xmm10 - T6
+        ;; xmm0  - T_key
+        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 7, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
+        jmp     %%_initial_blocks_encrypted
+
+%%_initial_num_blocks_is_6:
+        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 6, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
+        jmp     %%_initial_blocks_encrypted
+
+%%_initial_num_blocks_is_5:
+        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 5, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
+        jmp     %%_initial_blocks_encrypted
+
+%%_initial_num_blocks_is_4:
+        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 4, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
+        jmp     %%_initial_blocks_encrypted
+
+%%_initial_num_blocks_is_3:
+        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 3, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
+        jmp     %%_initial_blocks_encrypted
+
+%%_initial_num_blocks_is_2:
+        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 2, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
+        jmp     %%_initial_blocks_encrypted
+
+%%_initial_num_blocks_is_1:
+        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 1, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
+        jmp     %%_initial_blocks_encrypted
+
+%%_initial_num_blocks_is_0:
+        INITIAL_BLOCKS  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 0, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
+
+%%_initial_blocks_encrypted:
+        ;; The entire message was encrypted processed in initial and now need to be hashed
+        or      r13, r13
+        je      %%_encrypt_done
+
+        ;; Encrypt the final <16 byte (partial) block, then hash
+        cmp     r13, 16
+        jl      %%_encrypt_final_partial
+
+        ;; Process 7 full blocks plus a partial block
+        cmp     r13, 128
+        jl      %%_encrypt_by_8_partial
+
+%%_encrypt_by_8_parallel:
+        ;; in_order vs. out_order is an optimization to increment the counter without shuffling
+        ;; it back into little endian. r15d keeps track of when we need to increent in order so
+        ;; that the carry is handled correctly.
+        vmovd   r15d, xmm9
+        and     r15d, 255
+        vpshufb xmm9, [rel SHUF_MASK]
+
+%%_encrypt_by_8_new:
+        cmp     r15d, 255-8
+        jg      %%_encrypt_by_8
+
+        ;; xmm0  - T1
+        ;; xmm10 - T2
+        ;; xmm11 - T3
+        ;; xmm12 - T4
+        ;; xmm13 - T5
+        ;; xmm14 - T6
+        ;; xmm9  - CTR
+        ;; xmm1  - XMM1
+        ;; xmm2  - XMM2
+        ;; xmm3  - XMM3
+        ;; xmm4  - XMM4
+        ;; xmm5  - XMM5
+        ;; xmm6  - XMM6
+        ;; xmm7  - XMM7
+        ;; xmm8  - XMM8
+        ;; xmm15 - T7
+        add     r15b, 8
+        GHASH_8_ENCRYPT_8_PARALLEL  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, out_order, %%ENC_DEC, full
+        add     %%DATA_OFFSET, 128
+        sub     r13, 128
+        cmp     r13, 128
+        jge     %%_encrypt_by_8_new
+
+        vpshufb xmm9, [rel SHUF_MASK]
+        jmp     %%_encrypt_by_8_parallel_done
+
+%%_encrypt_by_8:
+        vpshufb xmm9, [rel SHUF_MASK]
+        add     r15b, 8
+        GHASH_8_ENCRYPT_8_PARALLEL  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, in_order, %%ENC_DEC, full
+        vpshufb  xmm9, [rel SHUF_MASK]
+        add     %%DATA_OFFSET, 128
+        sub     r13, 128
+        cmp     r13, 128
+        jge     %%_encrypt_by_8_new
+        vpshufb  xmm9, [rel SHUF_MASK]
+
+%%_encrypt_by_8_parallel_done:
+        ;; Test to see if we need a by 8 with partial block. At this point
+        ;; bytes remaining should be either zero or between 113-127.
+        or      r13, r13
+        je      %%_encrypt_done
+
+%%_encrypt_by_8_partial:
+        ;; Shuffle needed to align key for partial block xor. out_order
+        ;; is a little faster because it avoids extra shuffles.
+        ;; TBD: Might need to account for when we don't have room to increment the counter.
+
+        ;; Process parallel buffers with a final partial block.
+        GHASH_8_ENCRYPT_8_PARALLEL  %%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, in_order, %%ENC_DEC, partial
+
+        add     %%DATA_OFFSET, 128-16
+        sub     r13, 128-16
+
+%%_encrypt_final_partial:
+
+        vpshufb  xmm8, [rel SHUF_MASK]
+        mov     [%%GDATA_CTX + PBlockLen], r13
+        vmovdqu [%%GDATA_CTX + PBlockEncKey], xmm8
+
+        ;; xmm8  - Final encrypted counter - need to hash with partial or full block ciphertext
+        ;;                            GDATA,  KEY,   T1,    T2
+        ENCRYPT_FINAL_PARTIAL_BLOCK xmm8, xmm0, xmm10, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, %%ENC_DEC, %%DATA_OFFSET
+
+        vpshufb  xmm8, [rel SHUF_MASK]
+
+%%_encrypt_done:
+
+        ;; Mapping to macro parameters
+        ;; IN:
+        ;;   xmm9 contains the counter
+        ;;   xmm1-xmm8 contain the xor'd ciphertext
+        ;; OUT:
+        ;;   xmm14 contains the final hash
+        ;;             GDATA,   T1,    T2,    T3,    T4,    T5,    T6,    T7, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8
+%ifidn %%INSTANCE_TYPE, multi_call
+        mov     r13, [%%GDATA_CTX + PBlockLen]
+        or      r13, r13
+        jz      %%_hash_last_8
+        GHASH_LAST_7 %%GDATA_KEY, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7
+        ;; XOR the partial word into the hash
+        vpxor   xmm14, xmm14, xmm8
+        jmp     %%_ghash_done
+%endif
+%%_hash_last_8:
+        GHASH_LAST_8 %%GDATA_KEY, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8
+
+%%_ghash_done:
+        vmovdqu [%%GDATA_CTX + CurCount], xmm9  ; my_ctx_data.current_counter = xmm9
+        vmovdqu [%%GDATA_CTX + AadHash], xmm14      ; my_ctx_data.aad hash = xmm14
+
+%%_enc_dec_done:
+
+%endmacro       ; GCM_ENC_DEC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; GCM_COMPLETE Finishes Encryption/Decryption of last partial block after GCM_UPDATE finishes.
+; Input: A gcm_key_data * (GDATA_KEY), gcm_context_data (GDATA_CTX).
+; Output: Authorization Tag (AUTH_TAG) and Authorization Tag length (AUTH_TAG_LEN)
+; Clobbers rax, r10-r12, and xmm0-xmm2, xmm5-xmm6, xmm9-xmm11, xmm13-xmm15
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+%macro  GCM_COMPLETE            5
+%define %%GDATA_KEY             %1
+%define %%GDATA_CTX             %2
+%define %%AUTH_TAG              %3
+%define %%AUTH_TAG_LEN          %4
+%define %%INSTANCE_TYPE         %5
+%define %%PLAIN_CYPH_LEN        rax
+
+        vmovdqu xmm13, [%%GDATA_KEY + HashKey]
+        ;; Start AES as early as possible
+        vmovdqu xmm9, [%%GDATA_CTX + OrigIV]    ; xmm9 = Y0
+        ENCRYPT_SINGLE_BLOCK %%GDATA_KEY, xmm9  ; E(K, Y0)
+
+%ifidn %%INSTANCE_TYPE, multi_call
+        ;; If the GCM function is called as a single function call rather
+        ;; than invoking the individual parts (init, update, finalize) we
+        ;; can remove a write to read dependency on AadHash.
+        vmovdqu xmm14, [%%GDATA_CTX + AadHash]
+
+        ;; Encrypt the final partial block. If we did this as a single call then
+        ;; the partial block was handled in the main GCM_ENC_DEC macro.
+	mov	r12, [%%GDATA_CTX + PBlockLen]
+	or	r12, r12
+
+	je %%_partial_done
+
+	GHASH_MUL xmm14, xmm13, xmm0, xmm10, xmm11, xmm5, xmm6 ;GHASH computation for the last <16 Byte block
+	vmovdqu [%%GDATA_CTX + AadHash], xmm14
+
+%%_partial_done:
+
+%endif
+
+        mov     r12, [%%GDATA_CTX + AadLen]     ; r12 = aadLen (number of bytes)
+        mov     %%PLAIN_CYPH_LEN, [%%GDATA_CTX + InLen]
+
+        shl     r12, 3                      ; convert into number of bits
+        vmovq   xmm15, r12                  ; len(A) in xmm15
+
+        shl     %%PLAIN_CYPH_LEN, 3         ; len(C) in bits  (*128)
+        vmovq   xmm1, %%PLAIN_CYPH_LEN
+        vpslldq xmm15, xmm15, 8             ; xmm15 = len(A)|| 0x0000000000000000
+        vpxor   xmm15, xmm15, xmm1          ; xmm15 = len(A)||len(C)
+
+        vpxor   xmm14, xmm15
+        GHASH_MUL       xmm14, xmm13, xmm0, xmm10, xmm11, xmm5, xmm6
+        vpshufb  xmm14, [rel SHUF_MASK]         ; perform a 16Byte swap
+
+        vpxor   xmm9, xmm9, xmm14
+
+%%_return_T:
+        mov     r10, %%AUTH_TAG             ; r10 = authTag
+        mov     r11, %%AUTH_TAG_LEN         ; r11 = auth_tag_len
+
+        cmp     r11, 16
+        je      %%_T_16
+
+        cmp     r11, 12
+        je      %%_T_12
+
+        cmp     r11, 8
+        je      %%_T_8
+
+        simd_store_avx r10, xmm9, r11, r12, rax
+        jmp     %%_return_T_done
+%%_T_8:
+        vmovq   rax, xmm9
+        mov     [r10], rax
+        jmp     %%_return_T_done
+%%_T_12:
+        vmovq   rax, xmm9
+        mov     [r10], rax
+        vpsrldq xmm9, xmm9, 8
+        vmovd   eax, xmm9
+        mov     [r10 + 8], eax
+        jmp     %%_return_T_done
+%%_T_16:
+        vmovdqu  [r10], xmm9
+
+%%_return_T_done:
+
+%ifdef SAFE_DATA
+        ;; Clear sensitive data from context structure
+        vpxor   xmm0, xmm0
+        vmovdqu [%%GDATA_CTX + AadHash], xmm0
+        vmovdqu [%%GDATA_CTX + PBlockEncKey], xmm0
+%endif
+%endmacro ; GCM_COMPLETE
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   aes_gcm_precomp_128_avx_gen4 /
+;       aes_gcm_precomp_192_avx_gen4 /
+;       aes_gcm_precomp_256_avx_gen4 /
+;       aes_gcm_precomp_128_avx512 /
+;       aes_gcm_precomp_192_avx512 /
+;       aes_gcm_precomp_256_avx512
+;       (struct gcm_key_data *key_data)
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(precomp,_),function,)
+FN_NAME(precomp,_):
+        endbranch64
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_precomp
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+        sub     rsp, 1*16
+        ; only xmm6 needs to be maintained
+        vmovdqu [rsp + 0*16],xmm6
+%endif
+
+        vpxor   xmm6, xmm6
+        ENCRYPT_SINGLE_BLOCK    arg1, xmm6              ; xmm6 = HashKey
+
+        vpshufb  xmm6, [rel SHUF_MASK]
+        ;;;;;;;;;;;;;;;  PRECOMPUTATION of HashKey<<1 mod poly from the HashKey;;;;;;;;;;;;;;;
+        vmovdqa  xmm2, xmm6
+        vpsllq   xmm6, xmm6, 1
+        vpsrlq   xmm2, xmm2, 63
+        vmovdqa  xmm1, xmm2
+        vpslldq  xmm2, xmm2, 8
+        vpsrldq  xmm1, xmm1, 8
+        vpor     xmm6, xmm6, xmm2
+        ;reduction
+        vpshufd  xmm2, xmm1, 00100100b
+        vpcmpeqd xmm2, [rel TWOONE]
+        vpand    xmm2, xmm2, [rel POLY]
+        vpxor    xmm6, xmm6, xmm2                       ; xmm6 holds the HashKey<<1 mod poly
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vmovdqu  [arg1 + HashKey], xmm6                 ; store HashKey<<1 mod poly
+
+        PRECOMPUTE arg1, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5
+
+%ifdef SAFE_DATA
+        clear_scratch_gps_asm
+        clear_scratch_xmms_avx_asm
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+        vmovdqu xmm6, [rsp + 0*16]
+        add     rsp, 1*16
+%endif
+
+exit_precomp:
+
+        ret
+
+%ifdef SAFE_PARAM
+error_precomp:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+
+        jmp exit_precomp
+%endif
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   aes_gcm_init_128_avx_gen4 / aes_gcm_init_192_avx_gen4 / aes_gcm_init_256_avx_gen4 /
+;       aes_gcm_init_128_avx512 / aes_gcm_init_192_avx512 / aes_gcm_init_256_avx512
+;       (const struct gcm_key_data *key_data,
+;        struct gcm_context_data *context_data,
+;        u8       *iv,
+;        const u8 *aad,
+;        u64      aad_len);
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(init,_),function,)
+FN_NAME(init,_):
+        endbranch64
+        push    r12
+        push    r13
+%ifidn __OUTPUT_FORMAT__, win64
+        push    r14
+        push    r15
+        lea     r14, [rsp + 4*8]
+	; xmm6 needs to be maintained for Windows
+	sub	rsp, 1*16
+	vmovdqu	[rsp + 0*16], xmm6
+%endif
+
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_init
+
+        ;; Check context_data != NULL
+        or      arg2, arg2
+        jz      error_init
+
+        ;; Check IV != NULL
+        or      arg3, arg3
+        jz      error_init
+
+        ;; Check if aad_len == 0
+        cmp     arg5, 0
+        jz      skip_aad_check_init
+
+        ;; Check aad != NULL (aad_len != 0)
+        or      arg4, arg4
+        jz      error_init
+
+skip_aad_check_init:
+%endif
+        GCM_INIT arg1, arg2, arg3, arg4, arg5, r10, r11, r12
+
+%ifdef SAFE_DATA
+        clear_scratch_gps_asm
+        clear_scratch_xmms_avx_asm
+%endif
+exit_init:
+
+%ifidn __OUTPUT_FORMAT__, win64
+	vmovdqu	xmm6 , [rsp + 0*16]
+        add     rsp, 1*16
+        pop     r15
+        pop     r14
+%endif
+        pop     r13
+        pop     r12
+        ret
+
+%ifdef SAFE_PARAM
+error_init:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Check context_data != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
+
+        ;; Check IV != NULL
+        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_IV
+
+        ;; Check if aad_len == 0
+        cmp     arg5, 0
+        jz      skip_aad_check_error_init
+
+        ;; Check aad != NULL (aad_len != 0)
+        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_AAD
+
+skip_aad_check_error_init:
+
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+        jmp     exit_init
+%endif
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   aes_gcm_init_var_iv_128_avx_gen4 / aes_gcm_init_var_iv_192_avx_gen4 /
+;       aes_gcm_init_var_iv_256_avx_gen4
+;       aes_gcm_init_var_iv_128_avx512 / aes_gcm_init_var_iv_192_avx512 /
+;       aes_gcm_init_var_iv_256_avx512
+;       (const struct gcm_key_data *key_data,
+;        struct gcm_context_data *context_data,
+;        u8        *iv,
+;        const u64 iv_len,
+;        const u8  *aad,
+;        const u64 aad_len);
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(init_var_iv,_),function,)
+FN_NAME(init_var_iv,_):
+        endbranch64
+	push	r12
+	push	r13
+%ifidn __OUTPUT_FORMAT__, win64
+        push    r14
+        push    r15
+        lea     r14, [rsp + 4*8]
+	; xmm6 & xmm14 need to be maintained for Windows
+	sub	rsp, 2*16
+	vmovdqu	[rsp + 0*16], xmm6
+	vmovdqu	[rsp + 1*16], xmm14
+%endif
+
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_init_IV
+
+        ;; Check context_data != NULL
+        or      arg2, arg2
+        jz      error_init_IV
+
+        ;; Check IV != NULL
+        or      arg3, arg3
+        jz      error_init_IV
+
+        ;; Check iv_len != 0
+        or      arg4, arg4
+        jz      error_init_IV
+
+        ;; Check if aad_len == 0
+        cmp     arg6, 0
+        jz      skip_aad_check_init_IV
+
+        ;; Check aad != NULL (aad_len != 0)
+        cmp     arg5, 0
+        jz      error_init_IV
+
+skip_aad_check_init_IV:
+%endif
+        cmp     arg4, 12
+        je      iv_len_12_init_IV
+
+	GCM_INIT arg1, arg2, arg3, arg5, arg6, r10, r11, r12, arg4
+        jmp     skip_iv_len_12_init_IV
+
+iv_len_12_init_IV:
+	GCM_INIT arg1, arg2, arg3, arg5, arg6, r10, r11, r12
+
+skip_iv_len_12_init_IV:
+%ifdef SAFE_DATA
+        clear_scratch_gps_asm
+        clear_scratch_xmms_avx_asm
+%endif
+exit_init_IV:
+
+%ifidn __OUTPUT_FORMAT__, win64
+	vmovdqu	xmm6, [rsp + 0*16]
+	vmovdqu	xmm14, [rsp + 1*16]
+        add     rsp, 2*16
+        pop     r15
+        pop     r14
+%endif
+	pop	r13
+	pop	r12
+        ret
+
+%ifdef SAFE_PARAM
+error_init_IV:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Check context_data != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
+
+        ;; Check IV != NULL
+        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_IV
+
+        ;; Check iv_len != 0
+        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_IV_LEN
+
+        ;; Check if aad_len == 0
+        cmp     arg6, 0
+        jz      skip_aad_check_error_init_IV
+
+        ;; Check aad != NULL (aad_len != 0)
+        IMB_ERR_CHECK_NULL arg5, rax, IMB_ERR_NULL_AAD
+
+skip_aad_check_error_init_IV:
+
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+        jmp     exit_init_IV
+%endif
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   aes_gcm_enc_128_update_avx_gen4 / aes_gcm_enc_192_update_avx_gen4 /
+;       aes_gcm_enc_128_update_avx_gen4 /
+;       aes_gcm_enc_128_update_avx512 / aes_gcm_enc_192_update_avx512 /
+;       aes_gcm_enc_256_update_avx512
+;       (const struct gcm_key_data *key_data,
+;        struct gcm_context_data *context_data,
+;        u8       *out,
+;        const u8 *in,
+;        u64      msg_len);
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(enc,_update_),function,)
+FN_NAME(enc,_update_):
+        endbranch64
+        FUNC_SAVE
+
+%ifdef SAFE_PARAM
+	;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+	;; Load max len to reg on windows
+        INIT_GCM_MAX_LENGTH
+
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_update_enc
+
+        ;; Check context_data != NULL
+        or      arg2, arg2
+        jz      error_update_enc
+
+        ;; Check if msg_len == 0
+        cmp     arg5, 0
+        jz      error_update_enc
+
+        ;; Check if msg_len > max_len
+        cmp     arg5, GCM_MAX_LENGTH
+        ja      error_update_enc
+
+        ;; Check out != NULL (msg_len != 0)
+        or      arg3, arg3
+        jz      error_update_enc
+
+        ;; Check in != NULL (msg_len != 0)
+        or      arg4, arg4
+        jz      error_update_enc
+%endif
+        GCM_ENC_DEC arg1, arg2, arg3, arg4, arg5, ENC, multi_call
+
+exit_update_enc:
+        FUNC_RESTORE
+
+        ret
+
+%ifdef SAFE_PARAM
+error_update_enc:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Check context_data != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
+
+        ;; Check if plaintext_len == 0
+        cmp     arg5, 0
+        jz      skip_in_out_check_error_update_enc
+
+        ;; Check if msg_len > max_len
+        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
+
+        ;; Check out != NULL
+        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
+
+        ;; Check in != NULL (msg_len != 0)
+        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
+
+skip_in_out_check_error_update_enc:
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+        jmp     exit_update_enc
+%endif
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   aes_gcm_dec_128_update_avx_gen4 / aes_gcm_dec_192_update_avx_gen4 /
+;       aes_gcm_dec_256_update_avx_gen4 /
+;       aes_gcm_dec_128_update_avx512 / aes_gcm_dec_192_update_avx512 /
+;       aes_gcm_dec_256_update_avx512
+;       (const struct gcm_key_data *key_data,
+;        struct gcm_context_data *context_data,
+;        u8       *out,
+;        const u8 *in,
+;        u64      msg_len);
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(dec,_update_),function,)
+FN_NAME(dec,_update_):
+        endbranch64
+        FUNC_SAVE
+
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+        ;; Load max len to reg on windows
+        INIT_GCM_MAX_LENGTH
+
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_update_dec
+
+        ;; Check context_data != NULL
+        or      arg2, arg2
+        jz      error_update_dec
+
+        ;; Check if msg_len == 0
+        cmp     arg5, 0
+        jz      error_update_dec
+
+        ;; Check if msg_len > max_len
+        cmp     arg5, GCM_MAX_LENGTH
+        ja      error_update_dec
+
+        ;; Check out != NULL (msg_len != 0)
+        or      arg3, arg3
+        jz      error_update_dec
+
+        ;; Check in != NULL (msg_len != 0)
+        or      arg4, arg4
+        jz      error_update_dec
+%endif
+
+        GCM_ENC_DEC arg1, arg2, arg3, arg4, arg5, DEC, multi_call
+
+exit_update_dec:
+        FUNC_RESTORE
+
+        ret
+
+%ifdef SAFE_PARAM
+error_update_dec:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Check context_data != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
+
+        ;; Check if plaintext_len == 0
+        cmp     arg5, 0
+        jz      skip_in_out_check_error_update_dec
+
+        ;; Check if msg_len > max_len
+        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
+
+        ;; Check out != NULL
+        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
+
+        ;; Check in != NULL (plaintext_len != 0)
+        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
+
+skip_in_out_check_error_update_dec:
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+        jmp     exit_update_dec
+%endif
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   aes_gcm_enc_128_finalize_avx_gen4 / aes_gcm_enc_192_finalize_avx_gen4 /
+;	aes_gcm_enc_256_finalize_avx_gen4 /
+;       aes_gcm_enc_128_finalize_avx512 / aes_gcm_enc_192_finalize_avx512 /
+;	aes_gcm_enc_256_finalize_avx512
+;       (const struct gcm_key_data *key_data,
+;        struct gcm_context_data *context_data,
+;        u8       *auth_tag,
+;        u64      auth_tag_len);
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(enc,_finalize_),function,)
+FN_NAME(enc,_finalize_):
+        endbranch64
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_enc_fin
+
+        ;; Check context_data != NULL
+        or      arg2, arg2
+        jz      error_enc_fin
+
+        ;; Check auth_tag != NULL
+        or      arg3, arg3
+        jz      error_enc_fin
+
+        ;; Check auth_tag_len == 0 or > 16
+        or      arg4, arg4
+        jz      error_enc_fin
+
+        cmp     arg4, 16
+        ja      error_enc_fin
+%endif
+        push r12
+
+%ifidn __OUTPUT_FORMAT__, win64
+        ; xmm6:xmm15 need to be maintained for Windows
+	sub	rsp, 7*16
+        vmovdqu	[rsp + 0*16], xmm6
+        vmovdqu	[rsp + 1*16], xmm9
+        vmovdqu	[rsp + 2*16], xmm10
+        vmovdqu	[rsp + 3*16], xmm11
+        vmovdqu	[rsp + 4*16], xmm13
+        vmovdqu	[rsp + 5*16], xmm14
+        vmovdqu	[rsp + 6*16], xmm15
+%endif
+        GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call
+
+%ifdef SAFE_DATA
+        clear_scratch_gps_asm
+        clear_scratch_xmms_avx_asm
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+        vmovdqu	xmm15, [rsp + 6*16]
+        vmovdqu	xmm14, [rsp + 5*16]
+        vmovdqu	xmm13, [rsp + 4*16]
+        vmovdqu	xmm11, [rsp + 3*16]
+        vmovdqu	xmm10, [rsp + 2*16]
+        vmovdqu	xmm9,  [rsp + 1*16]
+        vmovdqu	xmm6,  [rsp + 0*16]
+        add     rsp, 7*16
+%endif
+        pop r12
+exit_enc_fin:
+        ret
+
+%ifdef SAFE_PARAM
+error_enc_fin:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Check context_data != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
+
+        ;; Check auth_tag != NULL
+        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_AUTH
+
+        ;; Check auth_tag_len == 0 or > 16
+        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_AUTH_TAG_LEN
+
+        IMB_ERR_CHECK_ABOVE arg4, 16, rax, IMB_ERR_AUTH_TAG_LEN
+
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+        jmp     exit_enc_fin
+%endif
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   aes_gcm_dec_128_finalize_avx_gen4 / aes_gcm_dec_192_finalize_avx_gen4
+;	aes_gcm_dec_256_finalize_avx_gen4 /
+;       aes_gcm_dec_128_finalize_avx512 / aes_gcm_dec_192_finalize_avx512
+;	aes_gcm_dec_256_finalize_avx512
+;       (const struct gcm_key_data *key_data,
+;        struct gcm_context_data *context_data,
+;        u8       *auth_tag,
+;        u64      auth_tag_len);
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(dec,_finalize_),function,)
+FN_NAME(dec,_finalize_):
+        endbranch64
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_dec_fin
+
+        ;; Check context_data != NULL
+        or      arg2, arg2
+        jz      error_dec_fin
+
+        ;; Check auth_tag != NULL
+        or      arg3, arg3
+        jz      error_dec_fin
+
+        ;; Check auth_tag_len == 0 or > 16
+        or      arg4, arg4
+        jz      error_dec_fin
+
+        cmp     arg4, 16
+        ja      error_dec_fin
+%endif
+
+        push r12
+
+%ifidn __OUTPUT_FORMAT__, win64
+        ; xmm6:xmm15 need to be maintained for Windows
+	sub	rsp, 7*16
+        vmovdqu	[rsp + 0*16], xmm6
+        vmovdqu	[rsp + 1*16], xmm9
+        vmovdqu	[rsp + 2*16], xmm10
+        vmovdqu	[rsp + 3*16], xmm11
+        vmovdqu	[rsp + 4*16], xmm13
+        vmovdqu	[rsp + 5*16], xmm14
+        vmovdqu	[rsp + 6*16], xmm15
+%endif
+        GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call
+
+%ifdef SAFE_DATA
+        clear_scratch_xmms_avx_asm
+%endif
+%ifidn __OUTPUT_FORMAT__, win64
+        vmovdqu	xmm15, [rsp + 6*16]
+        vmovdqu	xmm14, [rsp + 5*16]
+        vmovdqu	xmm13, [rsp + 4*16]
+        vmovdqu	xmm11, [rsp + 3*16]
+        vmovdqu	xmm10, [rsp + 2*16]
+        vmovdqu	xmm9,  [rsp + 1*16]
+        vmovdqu	xmm6,  [rsp + 0*16]
+        add     rsp, 7*16
+%endif
+
+        pop r12
+
+exit_dec_fin:
+        ret
+
+%ifdef SAFE_PARAM
+error_dec_fin:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Check context_data != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
+
+        ;; Check auth_tag != NULL
+        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_AUTH
+
+        ;; Check auth_tag_len == 0 or > 16
+        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_AUTH_TAG_LEN
+
+        IMB_ERR_CHECK_ABOVE arg4, 16, rax, IMB_ERR_AUTH_TAG_LEN
+
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+        jmp     exit_dec_fin
+%endif
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   aes_gcm_enc_128_avx_gen4 / aes_gcm_enc_192_avx_gen4 / aes_gcm_enc_256_avx_gen4 /
+;       aes_gcm_enc_128_avx512 / aes_gcm_enc_192_avx512 / aes_gcm_enc_256_avx512
+;       (const struct gcm_key_data *key_data,
+;        struct gcm_context_data *context_data,
+;        u8       *out,
+;        const u8 *in,
+;        u64      msg_len,
+;        u8       *iv,
+;        const u8 *aad,
+;        u64      aad_len,
+;        u8       *auth_tag,
+;        u64      auth_tag_len);
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(enc,_),function,)
+FN_NAME(enc,_):
+        endbranch64
+        FUNC_SAVE
+
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+        ;; Load max len to reg on windows
+        INIT_GCM_MAX_LENGTH
+
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_enc
+
+        ;; Check context_data != NULL
+        or      arg2, arg2
+        jz      error_enc
+
+        ;; Check IV != NULL
+        cmp     arg6, 0
+        jz      error_enc
+
+        ;; Check auth_tag != NULL
+        cmp     arg9, 0
+        jz      error_enc
+
+        ;; Check auth_tag_len == 0 or > 16
+        cmp     arg10, 0
+        jz      error_enc
+
+        cmp     arg10, 16
+        ja      error_enc
+
+        ;; Check if msg_len == 0
+        cmp     arg5, 0
+        jz      skip_in_out_check_enc
+
+        ;; Check if msg_len > max_len
+        cmp     arg5, GCM_MAX_LENGTH
+        ja      error_enc
+
+        ;; Check out != NULL (msg_len != 0)
+        or      arg3, arg3
+        jz      error_enc
+
+        ;; Check in != NULL (msg_len != 0)
+        or      arg4, arg4
+        jz      error_enc
+
+skip_in_out_check_enc:
+        ;; Check if aad_len == 0
+        cmp     arg8, 0
+        jz      skip_aad_check_enc
+
+        ;; Check aad != NULL (aad_len != 0)
+        cmp     arg7, 0
+        jz      error_enc
+
+skip_aad_check_enc:
+%endif
+        GCM_INIT arg1, arg2, arg6, arg7, arg8, r10, r11, r12
+
+        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC, single_call
+
+        GCM_COMPLETE arg1, arg2, arg9, arg10, single_call
+
+exit_enc:
+        FUNC_RESTORE
+
+        ret
+
+%ifdef SAFE_PARAM
+error_enc:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Check context_data != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
+
+        ;; Check IV != NULL
+        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
+
+        ;; Check auth_tag != NULL
+        IMB_ERR_CHECK_NULL arg9, rax, IMB_ERR_NULL_AUTH
+
+        ;; Check auth_tag_len == 0 or > 16
+        IMB_ERR_CHECK_ZERO arg10, rax, IMB_ERR_AUTH_TAG_LEN
+
+        IMB_ERR_CHECK_ABOVE arg10, 16, rax, IMB_ERR_AUTH_TAG_LEN
+
+        ;; Check if msg_len == 0
+        cmp     arg5, 0
+        jz      skip_in_out_check_error_enc
+
+        ;; Check if msg_len > max_len
+        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
+
+        ;; Check out != NULL (msg_len != 0)
+        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
+
+        ;; Check in != NULL (msg_len != 0)
+        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
+
+skip_in_out_check_error_enc:
+        ;; Check if aad_len == 0
+        cmp     arg8, 0
+        jz      skip_aad_check_error_enc
+
+        ;; Check aad != NULL (aad_len != 0)
+        IMB_ERR_CHECK_NULL arg7, rax, IMB_ERR_NULL_AAD
+
+skip_aad_check_error_enc:
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+        jmp     exit_enc
+%endif
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   aes_gcm_dec_128_avx_gen4 / aes_gcm_dec_192_avx_gen4 / aes_gcm_dec_256_avx_gen4 /
+;       aes_gcm_dec_128_avx512 / aes_gcm_dec_192_avx512 / aes_gcm_dec_256_avx512
+;       (const struct gcm_key_data *key_data,
+;        struct gcm_context_data *context_data,
+;        u8       *out,
+;        const u8 *in,
+;        u64      msg_len,
+;        u8       *iv,
+;        const u8 *aad,
+;        u64      aad_len,
+;        u8       *auth_tag,
+;        u64      auth_tag_len);
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(dec,_),function,)
+FN_NAME(dec,_):
+        endbranch64
+        FUNC_SAVE
+
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+        ;; Load max len to reg on windows
+        INIT_GCM_MAX_LENGTH
+
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_dec
+
+        ;; Check context_data != NULL
+        or      arg2, arg2
+        jz      error_dec
+
+        ;; Check IV != NULL
+        cmp     arg6, 0
+        jz      error_dec
+
+        ;; Check auth_tag != NULL
+        cmp     arg9, 0
+        jz      error_dec
+
+        ;; Check auth_tag_len == 0 or > 16
+        cmp     arg10, 0
+        jz      error_dec
+
+        cmp     arg10, 16
+        ja      error_dec
+
+        ;; Check if msg_len == 0
+        cmp     arg5, 0
+        jz      skip_in_out_check_dec
+
+        ;; Check if msg_len > max_len
+        cmp     arg5, GCM_MAX_LENGTH
+        ja      error_dec
+
+        ;; Check out != NULL (msg_len != 0)
+        or      arg3, arg3
+        jz      error_dec
+
+        ;; Check in != NULL (msg_len != 0)
+        or      arg4, arg4
+        jz      error_dec
+
+skip_in_out_check_dec:
+        ;; Check if aad_len == 0
+        cmp     arg8, 0
+        jz      skip_aad_check_dec
+
+        ;; Check aad != NULL (aad_len != 0)
+        cmp     arg7, 0
+        jz      error_dec
+
+skip_aad_check_dec:
+%endif
+        GCM_INIT arg1, arg2, arg6, arg7, arg8, r10, r11, r12
+
+        GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC, single_call
+
+        GCM_COMPLETE arg1, arg2, arg9, arg10, single_call
+
+exit_dec:
+        FUNC_RESTORE
+
+        ret
+
+%ifdef SAFE_PARAM
+error_dec:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Check context_data != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
+
+        ;; Check IV != NULL
+        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
+
+        ;; Check auth_tag != NULL
+        IMB_ERR_CHECK_NULL arg9, rax, IMB_ERR_NULL_AUTH
+
+        ;; Check auth_tag_len == 0 or > 16
+        IMB_ERR_CHECK_ZERO arg10, rax, IMB_ERR_AUTH_TAG_LEN
+
+        IMB_ERR_CHECK_ABOVE arg10, 16, rax, IMB_ERR_AUTH_TAG_LEN
+
+        ;; Check if msg_len == 0
+        cmp     arg5, 0
+        jz      skip_in_out_check_error_dec
+
+        ;; Check if msg_len > max_len
+        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
+
+        ;; Check out != NULL (msg_len != 0)
+        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
+
+        ;; Check in != NULL (msg_len != 0)
+        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
+
+skip_in_out_check_error_dec:
+        ;; Check if aad_len == 0
+        cmp     arg8, 0
+        jz      skip_aad_check_error_dec
+
+        ;; Check aad != NULL (aad_len != 0)
+        IMB_ERR_CHECK_NULL arg7, rax, IMB_ERR_NULL_AAD
+
+skip_aad_check_error_dec:
+
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+        jmp     exit_dec
+%endif
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
+;IMB_JOB * aes_gcm_enc_var_iv_128_avx_gen4 / aes_gcm_enc_var_iv_192_avx_gen4 /
+;       aes_gcm_enc_var_iv_256_avx_gen4 /
+;       aes_gcm_enc_var_iv_128_avx512 / aes_gcm_enc_var_iv_192_avx512 /
+;       aes_gcm_enc_var_iv_256_avx512
+;       (IMB_MGR *state, IMB_JOB *job)
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
+FN_NAME(enc_var_iv,_):
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _enc_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
+        je      iv_len_12_enc_IV
+
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12, {[arg2 + _iv_len_in_bytes]}
+
+        jmp     skip_iv_len_12_enc_IV
+
+iv_len_12_enc_IV:
+	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12
+
+skip_iv_len_12_enc_IV:
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
+        mov     arg2, [arg2 + _msg_len_to_cipher]
+	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, ENC, single_call
+
+        mov     arg2, [rsp + GP_OFFSET + 5*8]
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
+                     single_call
+
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
+        FUNC_RESTORE
+	ret
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;
+; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
+;
+;IMB_JOB *aes_gcm_dec_var_iv_128_avx_gen4 / aes_gcm_dec_var_iv_192_avx_gen4 /
+;       aes_gcm_dec_var_iv_256_avx_gen4 /
+;       aes_gcm_dec_var_iv_128_avx512 / aes_gcm_dec_var_iv_192_avx512 /
+;       aes_gcm_dec_var_iv_256_avx512
+;       (IMB_MGR *state, IMB_JOB *job)
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
+FN_NAME(dec_var_iv,_):
+        endbranch64
+	FUNC_SAVE alloc_context
+
+        mov     arg1, [arg2 + _dec_keys]
+
+        cmp     qword [arg2 + _iv_len_in_bytes], 12
+        je      iv_len_12_dec_IV
+
+        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12, {[arg2 + _iv_len_in_bytes]}
+
+        jmp     skip_iv_len_12_dec_IV
+
+iv_len_12_dec_IV:
+	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
+                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
+                 r10, r11, r12
+
+skip_iv_len_12_dec_IV:
+        mov     arg3, [arg2 + _src]
+        add     arg3, [arg2 + _cipher_start_src_offset]
+        mov     arg4, [arg2 + _dst]
+        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
+        mov     arg2, [arg2 + _msg_len_to_cipher]
+	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, DEC, single_call
+
+        mov     arg2, [rsp + GP_OFFSET + 5*8]
+        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
+                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}, \
+                     single_call
+
+        ;; mark job complete
+        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
+
+        mov     rax, arg2       ;; return the job
+
+        FUNC_RESTORE
+	ret
+
+%ifdef GCM128_MODE
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   ghash_avx_gen4 / ghash_avx512 (
+;        const struct gcm_key_data *key_data,
+;        const void   *in,
+;        const u64    in_len,
+;        void         *io_tag,
+;        const u64    tag_len);
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(GHASH_FN_NAME(ghash),function,)
+GHASH_FN_NAME(ghash):
+        endbranch64
+        FUNC_SAVE
+
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_ghash
+
+        ;; Check in != NULL
+        or      arg2, arg2
+        jz      error_ghash
+
+        ;; Check in_len != 0
+        or      arg3, arg3
+        jz      error_ghash
+
+        ;; Check tag != NULL
+        or      arg4, arg4
+        jz      error_ghash
+
+        ;; Check tag_len != 0
+        cmp     arg5, 0
+        jz      error_ghash
+%endif
+
+        ;; copy tag to xmm0
+        vmovdqu	xmm0, [arg4]
+        vpshufb xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
+
+%ifdef IS_AVX2_GCM
+        CALC_AAD_HASH arg2, arg3, xmm0, arg1, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, \
+                      r10, r11, r12, r13, rax
+%else
+        CALC_AAD_HASH arg2, arg3, xmm0, arg1, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, \
+                      r10, r11, r12
+%endif
+        vpshufb xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
+
+        simd_store_avx arg4, xmm0, arg5, r12, rax
+
+exit_ghash:
+        FUNC_RESTORE
+        ret
+
+%ifdef SAFE_PARAM
+error_ghash:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Check in != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_SRC
+
+        ;; Check in_len != 0
+        IMB_ERR_CHECK_ZERO arg3, rax, IMB_ERR_AUTH_LEN
+
+        ;; Check tag != NULL
+        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_AUTH
+
+        ;; Check tag_len != 0
+        IMB_ERR_CHECK_ZERO arg5, rax, IMB_ERR_AUTH_TAG_LEN
+
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+
+        jmp     exit_ghash
+%endif
+
+%endif ;; GCM128_MODE
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+; PARTIAL_BLOCK_GMAC: Handles the tag partial blocks between update calls.
+; Requires the input data be at least 1 byte long.
+; Input: gcm_context_data (GDATA_CTX), input text (PLAIN_IN), hash subkey (HASH_SUBKEY)
+; input text length (PLAIN_LEN).
+; Output: Updated GDATA_CTX
+; Clobbers rax, r10, r12, r13, r15, xmm0, xmm1, xmm2, xmm3, xmm5, xmm6, xmm9, xmm10, xmm11
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+%macro PARTIAL_BLOCK_GMAC       6
+%define %%GDATA_CTX             %1
+%define %%PLAIN_IN              %2
+%define %%PLAIN_LEN             %3
+%define %%DATA_OFFSET           %4
+%define %%AAD_HASH              %5
+%define %%HASH_SUBKEY           %6
+
+	mov	r13, [%%GDATA_CTX + PBlockLen]
+	or	r13, r13
+        ; Leave Macro if no partial blocks
+	je	%%_partial_block_done
+
+        ; Read in input data without over reading
+%ifdef IS_AVX2_GCM
+	cmp	%%PLAIN_LEN, 16
+	jl	%%_fewer_than_16_bytes
+        ; If more than 16 bytes of data, just fill the xmm register
+	VXLDR   xmm1, [%%PLAIN_IN]
+	jmp	%%_data_read
+
+%%_fewer_than_16_bytes:
+	lea	r10, [%%PLAIN_IN]
+	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, %%PLAIN_LEN, rax, r12, r15
+%else
+        ; Read in input data without over reading
+        READ_SMALL_DATA_INPUT_LEN_BT16_AVX512	xmm1, %%PLAIN_IN, %%PLAIN_LEN, r12, rax, k1
+%endif
+        ; Finished reading in data
+%%_data_read:
+
+	lea	r12, [rel SHIFT_MASK]
+        ; Adjust the shuffle mask pointer to be able to shift r13 bytes
+        ; (16-r13 is the number of bytes in plaintext mod 16)
+	add	r12, r13
+        ; Get the appropriate shuffle mask
+	vmovdqu	xmm2, [r12]
+	vmovdqa	xmm3, xmm1
+
+	mov	r15, %%PLAIN_LEN
+	add	r15, r13
+        ; Set r15 to be the amount of data left in PLAIN_IN after filling the block
+	sub	r15, 16
+        ; Determine if partial block is not being filled and shift mask accordingly
+	jge	%%_no_extra_mask_1
+	sub	r12, r15
+%%_no_extra_mask_1:
+
+        ; Get the appropriate mask to mask out bottom r13 bytes of xmm3
+	vmovdqu	xmm1, [r12 + ALL_F-SHIFT_MASK]
+
+	vpand	xmm3, xmm1
+	vpshufb	xmm3, [rel SHUF_MASK]
+	vpshufb	xmm3, xmm2
+	vpxor	%%AAD_HASH, xmm3
+
+	cmp	r15,0
+	jl	%%_partial_incomplete_1
+
+        ; GHASH computation for the last <16 Byte block
+	GHASH_MUL	%%AAD_HASH, %%HASH_SUBKEY, xmm0, xmm10, xmm11, xmm5, xmm6
+	xor	rax, rax
+	mov	[%%GDATA_CTX + PBlockLen], rax
+	jmp	%%_ghash_done
+%%_partial_incomplete_1:
+%ifidn __OUTPUT_FORMAT__, win64
+        mov     rax, %%PLAIN_LEN
+        add     [%%GDATA_CTX + PBlockLen], rax
+%else
+        add     [%%GDATA_CTX + PBlockLen], %%PLAIN_LEN
+%endif
+%%_ghash_done:
+	vmovdqu	[%%GDATA_CTX + AadHash], %%AAD_HASH
+
+        or      r15, r15
+        jl      %%_partial_fill
+
+        mov     r12, 16
+        ; Set r12 to be the number of bytes to skip after this macro
+        sub     r12, r13
+
+        jmp     %%offset_set
+%%_partial_fill:
+        mov     r12, %%PLAIN_LEN
+%%offset_set:
+        mov     %%DATA_OFFSET, r12
+%%_partial_block_done:
+%endmacro ; PARTIAL_BLOCK_GMAC
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   imb_aes_gmac_update_128_avx_gen4 / imb_aes_gmac_update_192_avx_gen4 /
+;       imb_aes_gmac_update_256_avx_gen4
+;       imb_aes_gmac_update_128_avx512 / imb_aes_gmac_update_192_avx512 /
+;       imb_aes_gmac_update_256_avx512 (
+;        const struct gcm_key_data *key_data,
+;        struct gcm_context_data *context_data,
+;        const   u8 *in,
+;        const   u64 msg_len);
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(GMAC_FN_NAME(update),function,)
+GMAC_FN_NAME(update):
+        endbranch64
+	FUNC_SAVE
+
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+%endif
+        ;; Check if msg_len == 0
+        or      arg4, arg4
+        je	exit_gmac_update
+
+%ifdef SAFE_PARAM
+        ;; Check key_data != NULL
+        or      arg1, arg1
+        jz      error_gmac_update
+
+        ;; Check context_data != NULL
+        or      arg2, arg2
+        jz      error_gmac_update
+
+        ;; Check in != NULL (msg_len != 0)
+        or      arg3, arg3
+        jz      error_gmac_update
+%endif
+
+        ; Increment size of "AAD length" for GMAC
+        add     [arg2 + AadLen], arg4
+
+        ;; Deal with previous partial block
+	xor	r11, r11
+	vmovdqu	xmm13, [arg1 + HashKey]
+	vmovdqu	xmm8, [arg2 + AadHash]
+
+	PARTIAL_BLOCK_GMAC arg2, arg3, arg4, r11, xmm8, xmm13
+
+        ; CALC_AAD_HASH needs to deal with multiple of 16 bytes
+        sub     arg4, r11
+        add     arg3, r11
+
+        vmovq   xmm7, arg4 ; Save remaining length
+        and     arg4, -16 ; Get multiple of 16 bytes
+
+        or      arg4, arg4
+        jz      no_full_blocks
+
+        ;; Calculate GHASH of this segment
+%ifdef IS_AVX2_GCM
+        CALC_AAD_HASH arg3, arg4, xmm8, arg1, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, \
+                      r10, r11, r12, r13, rax
+%else
+        CALC_AAD_HASH arg3, arg4, xmm8, arg1, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, \
+                      r10, r11, r12
+%endif
+        vmovdqu	[arg2 + AadHash], xmm8	; ctx_data.aad hash = aad_hash
+
+no_full_blocks:
+        add     arg3, arg4 ; Point at partial block
+
+        vmovq   arg4, xmm7 ; Restore original remaining length
+        and     arg4, 15
+        jz      exit_gmac_update
+
+        ; Save next partial block
+        mov	[arg2 + PBlockLen], arg4
+%ifdef IS_AVX2_GCM
+        READ_SMALL_DATA_INPUT_AVX xmm1, arg3, arg4, r11, r12, r13
+%else
+        READ_SMALL_DATA_INPUT_AVX512 xmm1, arg3, arg4, r11, k1
+%endif
+        vpshufb xmm1, [rel SHUF_MASK]
+        vpxor   xmm8, xmm1
+        vmovdqu [arg2 + AadHash], xmm8
+
+exit_gmac_update:
+	FUNC_RESTORE
+
+	ret
+
+%ifdef SAFE_PARAM
+error_gmac_update:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Check context_data != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
+
+        ;; Check in != NULL (msg_len != 0)
+        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_SRC
+
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+        jmp     exit_gmac_update
+%endif
+
+mksection stack-noexec
-- 
GitLab


From 267b16cf7917ae3a08f550a5ac74c34c53fec6bf Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 25 Apr 2023 15:50:26 +0100
Subject: [PATCH 235/332] lib: [aes-gcm] remove obsolete call to
 clear_scratch_gps_asm() with SAFE_DATA in AVX2 and AVX512

---
 lib/include/gcm_common_avx2_avx512.inc | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/lib/include/gcm_common_avx2_avx512.inc b/lib/include/gcm_common_avx2_avx512.inc
index b383263a..748fb955 100644
--- a/lib/include/gcm_common_avx2_avx512.inc
+++ b/lib/include/gcm_common_avx2_avx512.inc
@@ -3196,7 +3196,6 @@ FN_NAME(precomp,_):
         PRECOMPUTE arg1, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5
 
 %ifdef SAFE_DATA
-        clear_scratch_gps_asm
         clear_scratch_xmms_avx_asm
 %endif
 
@@ -3275,7 +3274,6 @@ skip_aad_check_init:
         GCM_INIT arg1, arg2, arg3, arg4, arg5, r10, r11, r12
 
 %ifdef SAFE_DATA
-        clear_scratch_gps_asm
         clear_scratch_xmms_avx_asm
 %endif
 exit_init:
@@ -3386,7 +3384,6 @@ iv_len_12_init_IV:
 
 skip_iv_len_12_init_IV:
 %ifdef SAFE_DATA
-        clear_scratch_gps_asm
         clear_scratch_xmms_avx_asm
 %endif
 exit_init_IV:
@@ -3655,7 +3652,6 @@ FN_NAME(enc,_finalize_):
         GCM_COMPLETE    arg1, arg2, arg3, arg4, multi_call
 
 %ifdef SAFE_DATA
-        clear_scratch_gps_asm
         clear_scratch_xmms_avx_asm
 %endif
 
-- 
GitLab


From 63824e53bc400d45e3cf19a01d1e527553de7ee4 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 25 Apr 2023 18:16:41 +0100
Subject: [PATCH 236/332] lib: [aes-gcm] READ_SMALL_DATA_INPUT macros changed
 to use SIMD load ones

- custom partial block store code replaced with SIMD store macros
---
 lib/include/gcm_avx_gen2.inc           | 10 ++---
 lib/include/gcm_common.inc             | 62 +++++---------------------
 lib/include/gcm_common_avx2_avx512.inc | 48 +++++---------------
 lib/sse_t1/gcm_gmac_api_sse.inc        |  2 +-
 lib/sse_t1/gcm_sse.inc                 |  8 ++--
 5 files changed, 33 insertions(+), 97 deletions(-)

diff --git a/lib/include/gcm_avx_gen2.inc b/lib/include/gcm_avx_gen2.inc
index 4b1cf359..fe671e73 100644
--- a/lib/include/gcm_avx_gen2.inc
+++ b/lib/include/gcm_avx_gen2.inc
@@ -490,7 +490,7 @@ mksection .text
         je      %%_CALC_AAD_done
 
         vmovdqu         %%XTMP0, [%%GDATA_KEY + HashKey]
-        READ_SMALL_DATA_INPUT_AVX   %%XTMP1, %%T1, %%T2, %%T3, %%T4, %%T5
+        READ_SMALL_DATA_INPUT_AVX   %%XTMP1, %%T1, %%T2, %%T3
         ;byte-reflect the AAD data
         vpshufb         %%XTMP1, [rel SHUF_MASK]
         vpxor           %%AAD_HASH, %%XTMP1
@@ -534,7 +534,7 @@ mksection .text
 
 %%_fewer_than_16_bytes:
 	lea	r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, %%PLAIN_CYPH_LEN, rax, r12, r15
+	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, %%PLAIN_CYPH_LEN, rax
 
 %%_data_read:				;Finished reading in data
 
@@ -1820,7 +1820,7 @@ vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
 	jge	%%_large_enough_update
 
 	lea	r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, r13, r12, r15, rax
+	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, r13, r12
 	lea	r12, [SHIFT_MASK + 16]
         sub     r12, r13
 	jmp	%%_data_read
@@ -3146,7 +3146,7 @@ error_ghash:
 
 %%_fewer_than_16_bytes:
 	lea	r10, [%%PLAIN_IN]
-	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, %%PLAIN_LEN, rax, r12, r15
+	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, %%PLAIN_LEN, rax
 
         ; Finished reading in data
 %%_data_read:
@@ -3278,7 +3278,7 @@ no_full_blocks:
 
         ; Save next partial block
         mov	[arg2 + PBlockLen], arg4
-        READ_SMALL_DATA_INPUT_AVX xmm1, arg3, arg4, r11, r12, r13
+        READ_SMALL_DATA_INPUT_AVX xmm1, arg3, arg4, r11
         vpshufb xmm1, [rel SHUF_MASK]
         vpxor   xmm8, xmm1
         vmovdqu [arg2 + AadHash], xmm8
diff --git a/lib/include/gcm_common.inc b/lib/include/gcm_common.inc
index e2738f8b..3bdc4f4a 100644
--- a/lib/include/gcm_common.inc
+++ b/lib/include/gcm_common.inc
@@ -38,69 +38,31 @@
 ; READ_SMALL_DATA_INPUT: Packs xmm register with data when data input is less than 16 bytes.
 ; Returns 0 if data has length 0.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro READ_SMALL_DATA_INPUT 7
+%macro READ_SMALL_DATA_INPUT 5
 %define	%%OUTPUT		%1 ; [out] xmm register
 %define	%%INPUT			%2 ; [in] gp with input address
 %define	%%LENGTH		%3 ; [in] gp with data length (0 to 16 bytes)
-%define	%%UNUSED	        %4 ; [unused] gp register
-%define	%%COUNTER		%5 ; [clobbered] gp register
-%define	%%TMP1			%6 ; [clobbered] gp register
-%define %%ARCH                  %7 ; [in] "SSE" or "AVX"
+%define	%%TMP1     		%4 ; [clobbered] temporary gp register
+%define %%ARCH                  %5 ; [in] "SSE" or "AVX"
 
-%ifidn %%ARCH, SSE
-	pxor	%%OUTPUT, %%OUTPUT
-%else
-	vpxor	%%OUTPUT, %%OUTPUT
-%endif
-	mov	%%COUNTER, %%LENGTH
-        or      %%COUNTER, %%COUNTER
-        jz      %%_done
-
-	xor	%%TMP1, %%TMP1
-
-	cmp	%%COUNTER, 8
-	jb	%%_byte_loop_2
-%ifidn %%ARCH, SSE
-	movq	%%OUTPUT, [%%INPUT]
-%else
-	vmovq	%%OUTPUT, [%%INPUT]
-%endif
-	je	%%_done
-
-	sub	%%COUNTER, 8
-
-%%_byte_loop_1:					;Read 1 byte at a time
-	shl	%%TMP1, 8			;This loop handles case when 8 bytes were read in
-	dec	%%COUNTER
-	mov	BYTE(%%TMP1), BYTE [%%INPUT + %%COUNTER + 8]
-	jnz	%%_byte_loop_1
-%ifidn %%ARCH, SSE
-	pinsrq	%%OUTPUT, %%TMP1, 1
-%else
-	vpinsrq	%%OUTPUT, %%TMP1, 1
-%endif
-	jmp	%%_done
+        mov             DWORD(%%TMP1), 16
+        cmp             %%LENGTH, %%TMP1
+        cmovb           %%TMP1, %%LENGTH
 
-%%_byte_loop_2:					;Read 1 byte at a time
-	shl	%%TMP1, 8			;This loop handles case when no bytes were read in
-	dec	%%COUNTER
-	mov	BYTE(%%TMP1), BYTE [%%INPUT + %%COUNTER]
-	jnz	%%_byte_loop_2
 %ifidn %%ARCH, SSE
-	movq	%%OUTPUT, %%TMP1
+        simd_load_sse_16        %%OUTPUT, %%INPUT, %%TMP1
 %else
-	vmovq	%%OUTPUT, %%TMP1
+        simd_load_avx_16        %%OUTPUT, %%INPUT, %%TMP1
 %endif
-%%_done:
 
 %endmacro ; READ_SMALL_DATA_INPUT
 
-%macro READ_SMALL_DATA_INPUT_SSE 6
-        READ_SMALL_DATA_INPUT %1, %2, %3, %4, %5, %6, SSE
+%macro READ_SMALL_DATA_INPUT_SSE 4
+        READ_SMALL_DATA_INPUT %1, %2, %3, %4, SSE
 %endmacro ; READ_SMALL_DATA_INPUT_SSE
 
-%macro READ_SMALL_DATA_INPUT_AVX 6
-        READ_SMALL_DATA_INPUT %1, %2, %3, %4, %5, %6, AVX
+%macro READ_SMALL_DATA_INPUT_AVX 4
+        READ_SMALL_DATA_INPUT %1, %2, %3, %4, AVX
 %endmacro ; READ_SMALL_DATA_INPUT_AVX
 
 ;; ***
diff --git a/lib/include/gcm_common_avx2_avx512.inc b/lib/include/gcm_common_avx2_avx512.inc
index 748fb955..d8939d3c 100644
--- a/lib/include/gcm_common_avx2_avx512.inc
+++ b/lib/include/gcm_common_avx2_avx512.inc
@@ -483,7 +483,7 @@ default rel
 
         vmovdqu         %%XTMP0, [%%GDATA_KEY + HashKey]
 %ifdef IS_AVX2_GCM
-        READ_SMALL_DATA_INPUT_AVX %%XTMP1, %%T1, %%T2, %%T3, %%T4, %%T5
+        READ_SMALL_DATA_INPUT_AVX %%XTMP1, %%T1, %%T2, %%T3
 %else
         READ_SMALL_DATA_INPUT_AVX512 %%XTMP1, %%T1, %%T2, %%T3, k1
 %endif
@@ -527,7 +527,7 @@ default rel
 
 %%_fewer_than_16_bytes:
         lea     r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-        READ_SMALL_DATA_INPUT_AVX   xmm1, r10, %%PLAIN_CYPH_LEN, rax, r12, r15
+        READ_SMALL_DATA_INPUT_AVX   xmm1, r10, %%PLAIN_CYPH_LEN, rax
 
 %%_data_read:                           ;Finished reading in data
 %else
@@ -601,22 +601,10 @@ default rel
 %%_partial_fill:
         mov     r13, %%PLAIN_CYPH_LEN
 %%_count_set:
-%ifdef IS_AVX2_GCM
-        vmovq   rax, xmm9
-        cmp     r13, 8
-        jle     %%_less_than_8_bytes_left
 
-        mov     [%%CYPH_PLAIN_OUT+ %%DATA_OFFSET], rax
-        add     %%DATA_OFFSET, 8
-        vpsrldq xmm9, xmm9, 8
-        vmovq   rax, xmm9
-        sub     r13, 8
-%%_less_than_8_bytes_left:
-        mov     BYTE [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], al
-        add     %%DATA_OFFSET, 1
-        shr     rax, 8
-        sub     r13, 1
-        jne     %%_less_than_8_bytes_left
+%ifdef IS_AVX2_GCM
+        simd_store_avx  %%CYPH_PLAIN_OUT, xmm9, r13, rax, r12, %%DATA_OFFSET
+        add             %%DATA_OFFSET, r13
 %else
         lea             rax, [rel byte_len_to_mask_table]
         kmovw           k1, [rax + r13*2]
@@ -2407,7 +2395,7 @@ default rel
         ;; r10           - input data address
         ;; r13           - input data length
         ;; r12, r15, rax - temp registers
-        READ_SMALL_DATA_INPUT_AVX   %%T1, r10, r13, r12, r15, rax
+        READ_SMALL_DATA_INPUT_AVX   %%T1, r10, r13, r12
 
         lea      r12, [SHIFT_MASK + 16]
         sub      r12, r13
@@ -2455,27 +2443,13 @@ default rel
 
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
         ;; Output r13 Bytes
-        vmovq   rax, %%KEY
-        cmp     r13, 8
-        jle     %%_less_than_8_bytes_left
-
-        mov     [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], rax
-        add     %%DATA_OFFSET, 8
-        vpsrldq %%T1, %%KEY, 8
-        vmovq   rax, %%T1
-        sub     r13, 8
-
-%%_less_than_8_bytes_left:
-        mov     BYTE [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], al
-        add     %%DATA_OFFSET, 1
-        shr     rax, 8
-        sub     r13, 1
-        jne     %%_less_than_8_bytes_left
+        vmovdqa         %%T1, %%KEY
+        simd_store_avx  %%CYPH_PLAIN_OUT, %%T1, r13, rax, r12, %%DATA_OFFSET
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %ifidn  %%ENC_DEC, DEC
         ;; If decrypt, restore the ciphertext into %%KEY
-        vmovdqu %%KEY, %%T2
+        vmovdqa %%KEY, %%T2
 %endif
 
 %else ;; IS_AVX512_GCM
@@ -4282,7 +4256,7 @@ error_ghash:
 
 %%_fewer_than_16_bytes:
 	lea	r10, [%%PLAIN_IN]
-	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, %%PLAIN_LEN, rax, r12, r15
+	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, %%PLAIN_LEN, rax
 %else
         ; Read in input data without over reading
         READ_SMALL_DATA_INPUT_LEN_BT16_AVX512	xmm1, %%PLAIN_IN, %%PLAIN_LEN, r12, rax, k1
@@ -4425,7 +4399,7 @@ no_full_blocks:
         ; Save next partial block
         mov	[arg2 + PBlockLen], arg4
 %ifdef IS_AVX2_GCM
-        READ_SMALL_DATA_INPUT_AVX xmm1, arg3, arg4, r11, r12, r13
+        READ_SMALL_DATA_INPUT_AVX xmm1, arg3, arg4, r11
 %else
         READ_SMALL_DATA_INPUT_AVX512 xmm1, arg3, arg4, r11, k1
 %endif
diff --git a/lib/sse_t1/gcm_gmac_api_sse.inc b/lib/sse_t1/gcm_gmac_api_sse.inc
index 7ecabb01..23f20938 100644
--- a/lib/sse_t1/gcm_gmac_api_sse.inc
+++ b/lib/sse_t1/gcm_gmac_api_sse.inc
@@ -270,7 +270,7 @@ no_full_blocks:
 
         ; Save next partial block
         mov	[arg2 + PBlockLen], arg4
-        READ_SMALL_DATA_INPUT_SSE xmm1, arg3, arg4, r11, r12, r13
+        READ_SMALL_DATA_INPUT_SSE xmm1, arg3, arg4, r11
         pshufb  xmm1, [rel SHUF_MASK]
         pxor    xmm8, xmm1
         movdqu  [arg2 + AadHash], xmm8
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index 2450ab11..3652daf3 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -530,7 +530,7 @@
         je      %%_CALC_AAD_done
 
         movdqu          %%XTMP0, [%%GDATA_KEY + HashKey]
-        READ_SMALL_DATA_INPUT_SSE   %%XTMP1, %%T1, %%T2, %%T3, %%T4, %%T5
+        READ_SMALL_DATA_INPUT_SSE   %%XTMP1, %%T1, %%T2, %%T3
         ;byte-reflect the AAD data
         pshufb          %%XTMP1, [rel SHUF_MASK]
         pxor            %%AAD_HASH, %%XTMP1
@@ -569,7 +569,7 @@
 
 %%_fewer_than_16_bytes:
 	lea	r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-	READ_SMALL_DATA_INPUT_SSE	xmm1, r10, %%PLAIN_CYPH_LEN, rax, r12, r15
+	READ_SMALL_DATA_INPUT_SSE	xmm1, r10, %%PLAIN_CYPH_LEN, rax
 
 %%_data_read:				;Finished reading in data
 
@@ -1887,7 +1887,7 @@ movdqu  %%T_key, [%%GDATA_KEY+16*j]				; encrypt with last (14th) key round (12
 	jge	%%_large_enough_update
 
 	lea	r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-	READ_SMALL_DATA_INPUT_SSE	xmm1, r10, r13, r12, r15, rax
+	READ_SMALL_DATA_INPUT_SSE	xmm1, r10, r13, r12
 	lea	r12, [SHIFT_MASK + 16]
 	sub	r12, r13
 	jmp	%%_data_read
@@ -2069,7 +2069,7 @@ movdqu  %%T_key, [%%GDATA_KEY+16*j]				; encrypt with last (14th) key round (12
 
 %%_fewer_than_16_bytes:
 	lea	r10, [%%PLAIN_IN]
-	READ_SMALL_DATA_INPUT_SSE	xmm1, r10, %%PLAIN_LEN, rax, r12, r15
+	READ_SMALL_DATA_INPUT_SSE	xmm1, r10, %%PLAIN_LEN, rax
 
         ; Finished reading in data
 %%_data_read:
-- 
GitLab


From 6877cec80fd2b2e41655fd858853df3eb926ba34 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 26 Apr 2023 13:37:14 +0100
Subject: [PATCH 237/332] perf: new option to test unaligned buffer cases

---
 perf/ipsec_perf.c | 24 ++++++++++++++++++++----
 1 file changed, 20 insertions(+), 4 deletions(-)

diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index 5a16efb5..201d40d2 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -897,6 +897,7 @@ uint32_t index_limit;
 uint32_t key_idxs[NUM_OFFSETS];
 uint32_t offsets[NUM_OFFSETS];
 uint32_t sha_size_incr = UINT32_MAX;
+uint32_t buffer_offset = 0;
 
 enum range {
         RANGE_MIN = 0,
@@ -1293,12 +1294,12 @@ get_key_pointer(const uint32_t index, const imb_uint128_t *p_keys)
 
 static uint8_t *get_src_buffer(const uint32_t index, uint8_t *p_buffer)
 {
-        return &p_buffer[offsets[index]];
+        return &p_buffer[offsets[index] + buffer_offset];
 }
 
 static uint8_t *get_dst_buffer(const uint32_t index, uint8_t *p_buffer)
 {
-        return &p_buffer[offsets[index] + sha_size_incr];
+        return &p_buffer[offsets[index] + buffer_offset + sha_size_incr];
 }
 
 static uint32_t get_next_index(uint32_t index)
@@ -3537,7 +3538,9 @@ static void usage(void)
                 "--cipher-burst-api: use cipher-only burst API for perf tests\n"
                 "--hash-burst-api: use hash-only burst API for perf tests\n"
                 "--burst-size: number of jobs to submit per burst\n"
-                "--quic-api: run QUIC-API specific tests only\n",
+                "--quic-api: run QUIC-API specific tests only\n"
+                "--buffer-offset val: val is 0 by default, valid range is 0 to 15.\n"
+                "                     This option allows to test unaligned buffer cases\n",
                 MAX_NUM_THREADS + 1);
 }
 
@@ -4142,6 +4145,17 @@ int main(int argc, char *argv[])
                         use_timebox = 0;
                 } else if (strcmp(argv[i], "--quic-api") == 0) {
                         quic_api_test = 1;
+                } else if (strcmp(argv[i], "--buffer-offset") == 0) {
+                        i = get_next_num_arg((const char * const *)argv, i,
+                                             argc, &buffer_offset,
+                                             sizeof(buffer_offset));
+                        if (buffer_offset > 15) {
+                                fprintf(stderr,
+                                        "Invalid --buffer-offset %u setting."
+                                        "Valid range is 0 to 15!\n",
+                                        (unsigned) buffer_offset);
+                                return EXIT_FAILURE;
+                        }
                 } else {
                         usage();
                         return EXIT_FAILURE;
@@ -4348,9 +4362,11 @@ int main(int argc, char *argv[])
 
         fprintf(stderr,
                 "Authentication size = cipher size + %u\n"
+                "Buffer offset = %u\n"
                 "Tool version: %s\n"
                 "Library version: %s\n",
-                sha_size_incr, IMB_VERSION_STR, imb_get_version_str());
+                sha_size_incr, buffer_offset,
+                IMB_VERSION_STR, imb_get_version_str());
 
         if (!use_job_api)
                 fprintf(stderr, "API type: direct\n");
-- 
GitLab


From f9a6172c37b5c604922dfe365352b999656b1f39 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 26 Apr 2023 15:30:35 +0100
Subject: [PATCH 238/332] sse: [aes-gcm] workaround load block issue in case of
 false store-forward condition

- perform all plain/cipher text loads first and then do stores
  - avoid doing one load and one store
    - in unaligned address cases and in-place operation, it may cause performance problem
- move forward reduction steps to improve performance
---
 lib/sse_t1/gcm_sse.inc | 258 +++++++++++++++++++++++------------------
 1 file changed, 144 insertions(+), 114 deletions(-)

diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index 3652daf3..c8137caf 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2011-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
@@ -732,16 +732,18 @@
 %assign i (i+1)
 %endrep
 
-movdqu  %%T_key, [%%GDATA_KEY+16*0]
+                ;; ARK
+                movdqu  %%T_key, [%%GDATA_KEY+16*0]
 %assign i (9-%%num_initial_blocks)
 %rep %%num_initial_blocks
                 pxor    reg(i),%%T_key
 %assign i (i+1)
 %endrep
 
+                ;; encrypt N blocks (13 rounds for AES-256, 11 for AES-192 and 9 for AES-128)
 %assign j 1
-%rep NROUNDS							; encrypt N blocks with 13 key rounds (11 for GCM192)
-movdqu  %%T_key, [%%GDATA_KEY+16*j]
+%rep NROUNDS
+                movdqu  %%T_key, [%%GDATA_KEY+16*j]
 %assign i (9-%%num_initial_blocks)
 %rep %%num_initial_blocks
                 aesenc  reg(i),%%T_key
@@ -750,27 +752,58 @@ movdqu  %%T_key, [%%GDATA_KEY+16*j]
 
 %assign j (j+1)
 %endrep
-
-movdqu  %%T_key, [%%GDATA_KEY+16*j]				; encrypt with last (14th) key round (12 for GCM192)
+		;; last encryption round (14th for AES-256, 12th for AES-192 and 10th for AES-128)
+                movdqu  %%T_key, [%%GDATA_KEY+16*j]
 %assign i (9-%%num_initial_blocks)
 %rep %%num_initial_blocks
-                aesenclast      reg(i),%%T_key
+                aesenclast      reg(i), %%T_key
 %assign i (i+1)
 %endrep
 
-%assign i (9-%%num_initial_blocks)
+                ;; - load source buffer block
+                ;; - XOR AES result with plain/cipher text block
+                ;; - store to destination is postponed for later
+%assign i (9 - %%num_initial_blocks)
+%assign k 0
 %rep %%num_initial_blocks
-                XLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
+                XLDR    %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + k*16]
                 pxor    reg(i), %%T1
-                XSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)            ; write back ciphertext for %%num_initial_blocks blocks
-                add     %%DATA_OFFSET, 16
-                %ifidn  %%ENC_DEC, DEC
-                movdqa  reg(i), %%T1
-                %endif
-                pshufb  reg(i), [SHUF_MASK]     ; prepare ciphertext for GHASH computations
-%assign i (i+1)
+%ifidn %%ENC_DEC, DEC
+                ;; DECRYPT
+%if k == 0
+                movdqa   %%T6, %%T1              ; save cipher text block 0 in a register
+%else
+                movdqa   [rsp + TMP %+ i], %%T1  ; aligned store of cipher text into stack
+%endif
+%endif
+
+%assign i (i + 1)
+%assign k (k + 1)
+%endrep
+
+                ;; Note: Loads done first and then stores.
+                ;;       This is to avoid potential loads being blocked on
+                ;;       false store-to-load condition.
+%assign i (9 - %%num_initial_blocks)
+%assign k 0
+%rep %%num_initial_blocks
+                XSTR    [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + k*16], reg(i)
+%ifidn %%ENC_DEC, DEC
+                ;; DECRYPT
+                ;; - restore cipher text blocks into XMM1:XMM8
+%if k == 0
+                movdqa  reg(i), %%T6
+%else
+                movdqa  reg(i), [rsp + TMP %+ i]
+%endif
+%endif
+                pshufb  reg(i), [rel SHUF_MASK]     ; prepare ciphertext for GHASH computations
+%assign i (i + 1)
+%assign k (k + 1)
 %endrep
 
+                add     %%DATA_OFFSET, (16 * %%num_initial_blocks)
+
 %assign i (8-%%num_initial_blocks)
 %assign j (9-%%num_initial_blocks)
 
@@ -848,82 +881,58 @@ movdqu  %%T_key, [%%GDATA_KEY+16*j]				; encrypt with last (14th) key round (12
 %endrep
 
                 movdqu          %%T_key, [%%GDATA_KEY+16*i]		; do final key round
-                aesenclast      %%XMM1, %%T_key
-                aesenclast      %%XMM2, %%T_key
-                aesenclast      %%XMM3, %%T_key
-                aesenclast      %%XMM4, %%T_key
-                aesenclast      %%XMM5, %%T_key
-                aesenclast      %%XMM6, %%T_key
-                aesenclast      %%XMM7, %%T_key
-                aesenclast      %%XMM8, %%T_key
-
-                XLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*0]
-                pxor    %%XMM1, %%T1
-                XSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*0], %%XMM1
-                %ifidn  %%ENC_DEC, DEC
-                movdqa  %%XMM1, %%T1
-                %endif
 
-                XLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*1]
-                pxor    %%XMM2, %%T1
-                XSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*1], %%XMM2
-                %ifidn  %%ENC_DEC, DEC
-                movdqa  %%XMM2, %%T1
-                %endif
-
-                XLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*2]
-                pxor    %%XMM3, %%T1
-                XSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*2], %%XMM3
-                %ifidn  %%ENC_DEC, DEC
-                movdqa  %%XMM3, %%T1
-                %endif
-
-                XLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*3]
-                pxor    %%XMM4, %%T1
-                XSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*3], %%XMM4
-                %ifidn  %%ENC_DEC, DEC
-                movdqa  %%XMM4, %%T1
-                %endif
+                ;; - load source buffer block
+                ;; - do the last AES encryption round
+                ;; - XOR AES result with plain/cipher text block
+                ;; - store to destination is postponed for later
+%assign i 0
+%assign j 1
+%rep 8
+                XLDR            %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*i]
+                aesenclast      reg(j), %%T_key          ; XMM1:XMM8
+                pxor            reg(j), %%T1
+%ifidn %%ENC_DEC, DEC
+                ;; DECRYPT
+%if j == 1
+                movdqa          %%T6, %%T1              ; save cipher text block 0 in a register
+%else
+                movdqa          [rsp + TMP %+ j], %%T1  ; aligned store of cipher text into stack
+%endif
+%endif
 
-                XLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*4]
-                pxor    %%XMM5, %%T1
-                XSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*4], %%XMM5
-                %ifidn  %%ENC_DEC, DEC
-                movdqa  %%XMM5, %%T1
-                %endif
+%assign i (i+1)
+%assign j (j+1)
+%endrep
 
-                XLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*5]
-                pxor    %%XMM6, %%T1
-                XSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*5], %%XMM6
-                %ifidn  %%ENC_DEC, DEC
-                movdqa  %%XMM6, %%T1
-                %endif
+                ;; Note: Loads done first and then stores.
+                ;;       This is to avoid potential loads being blocked on
+                ;;       false store-to-load condition.
+%assign i 0
+%assign j 1
+%rep 8
+                ;; store cipher/plain text block
+                XSTR    [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*i], reg(j)
 
-                XLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*6]
-                pxor    %%XMM7, %%T1
-                XSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*6], %%XMM7
-                %ifidn  %%ENC_DEC, DEC
-                movdqa  %%XMM7, %%T1
-                %endif
+%ifidn %%ENC_DEC, DEC
+                ;; DECRYPT
+                ;; - restore cipher text blocks into XMM1:XMM8
+%if j == 1
+                movdqa  reg(j), %%T6
+%else
+                movdqa  reg(j), [rsp + TMP %+ j]
+%endif
+%endif
+                ;; prepare cipher text block for GHASH
+                pshufb  reg(j), [rel SHUF_MASK] ; perform a 16Byte swap
 
-                XLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*7]
-                pxor    %%XMM8, %%T1
-                XSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*7], %%XMM8
-                %ifidn  %%ENC_DEC, DEC
-                movdqa  %%XMM8, %%T1
-                %endif
+%assign i (i+1)
+%assign j (j+1)
+%endrep
 
                 add     %%DATA_OFFSET, 128
 
-                pshufb  %%XMM1, [SHUF_MASK]             ; perform a 16Byte swap
                 pxor    %%XMM1, %%T3                    ; combine GHASHed value with the corresponding ciphertext
-                pshufb  %%XMM2, [SHUF_MASK]             ; perform a 16Byte swap
-                pshufb  %%XMM3, [SHUF_MASK]             ; perform a 16Byte swap
-                pshufb  %%XMM4, [SHUF_MASK]             ; perform a 16Byte swap
-                pshufb  %%XMM5, [SHUF_MASK]             ; perform a 16Byte swap
-                pshufb  %%XMM6, [SHUF_MASK]             ; perform a 16Byte swap
-                pshufb  %%XMM7, [SHUF_MASK]             ; perform a 16Byte swap
-                pshufb  %%XMM8, [SHUF_MASK]             ; perform a 16Byte swap
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
@@ -1239,6 +1248,17 @@ movdqu  %%T_key, [%%GDATA_KEY+16*j]				; encrypt with last (14th) key round (12
                 aesenc  %%XMM7, %%T1
                 aesenc  %%XMM8, %%T1
 
+        ;; accumulate product into %%T4:%%T7
+        pxor    %%T2, %%T6
+        pxor    %%T2, %%T4
+        pxor    %%T2, %%T7
+
+        movdqa  %%T3, %%T2
+        pslldq  %%T3, 8                                 ; shift-L %%T3 2 DWs
+        psrldq  %%T2, 8                                 ; shift-R %%T2 2 DWs
+        pxor    %%T7, %%T3
+        pxor    %%T4, %%T2                              ; accumulate the results in %%T4:%%T7
+
 %ifdef GCM128_MODE
 		movdqu	%%T5, [%%GDATA + 16*10]
 %endif
@@ -1309,37 +1329,30 @@ movdqu  %%T_key, [%%GDATA_KEY+16*j]				; encrypt with last (14th) key round (12
 	        movdqu	%%T5, [%%GDATA + 16*14]        ; finish last key round
 %endif
 
+                ;; - load source buffer block
+                ;; - do the last AES encryption round
+                ;; - XOR AES result with plain/cipher text block
+                ;; - store to destination is postponed for later
 %assign i 0
 %assign j 1
 %rep 8
-                XLDR  %%T1, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-
+                XLDR            %%T1, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
+                aesenclast      reg(j), %%T5          ; XMM1:XMM8
+                pxor            reg(j), %%T1
 %ifidn %%ENC_DEC, DEC
-                movdqa  %%T3, %%T1
+                ;; DECRYPT
+%if j == 1
+                movdqa          %%T6, %%T1              ; save cipher text block 0 in a register
+%else
+                movdqa          [rsp + TMP %+ j], %%T1  ; aligned store of cipher text into stack
 %endif
-
-                pxor    %%T1, %%T5
-                aesenclast      reg(j), %%T1          ; XMM1:XMM8
-                XSTR  [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*i], reg(j)       ; Write to the Output buffer
-
-%ifidn %%ENC_DEC, DEC
-                movdqa  reg(j), %%T3
 %endif
+
 %assign i (i+1)
 %assign j (j+1)
 %endrep
 
-        pxor    %%T2, %%T6
-        pxor    %%T2, %%T4
-        pxor    %%T2, %%T7
-
-        movdqa  %%T3, %%T2
-        pslldq  %%T3, 8                                 ; shift-L %%T3 2 DWs
-        psrldq  %%T2, 8                                 ; shift-R %%T2 2 DWs
-        pxor    %%T7, %%T3
-        pxor    %%T4, %%T2                              ; accumulate the results in %%T4:%%T7
-
-        ;first phase of the reduction
+        ;; first phase of the reduction
         movdqa  %%T2, %%T7
         movdqa  %%T3, %%T7
         movdqa  %%T1, %%T7                              ; move %%T7 into %%T2, %%T3, %%T1 in order to perform the three shifts independently
@@ -1355,18 +1368,35 @@ movdqu  %%T_key, [%%GDATA_KEY+16*j]				; encrypt with last (14th) key round (12
 
         pslldq  %%T2, 12                                ; shift-L %%T2 3 DWs
         pxor    %%T7, %%T2                              ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-                pshufb  %%XMM1, [SHUF_MASK]     ; perform a 16Byte swap
-                pshufb  %%XMM2, [SHUF_MASK]     ; perform a 16Byte swap
-                pshufb  %%XMM3, [SHUF_MASK]     ; perform a 16Byte swap
-                pshufb  %%XMM4, [SHUF_MASK]     ; perform a 16Byte swap
-                pshufb  %%XMM5, [SHUF_MASK]     ; perform a 16Byte swap
-                pshufb  %%XMM6, [SHUF_MASK]     ; perform a 16Byte swap
-                pshufb  %%XMM7, [SHUF_MASK]     ; perform a 16Byte swap
-                pshufb  %%XMM8, [SHUF_MASK]     ; perform a 16Byte swap
+                ;; Note: Loads done first and then stores.
+                ;;       This is to avoid potential loads being blocked on
+                ;;       false store-to-load condition.
+%assign i 0
+%assign j 1
+%rep 8
+                ;; store cipher/plain text block
+                XSTR    [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*i], reg(j)
 
-        ;second phase of the reduction
+%ifidn %%ENC_DEC, DEC
+                ;; DECRYPT
+                ;; - restore cipher text blocks into XMM1:XMM8
+%if j == 1
+                movdqa  reg(j), %%T6
+%else
+                movdqa  reg(j), [rsp + TMP %+ j]
+%endif
+%endif
+                ;; prepare cipher text block for GHASH
+                pshufb  reg(j), [rel SHUF_MASK] ; perform a 16Byte swap
+
+%assign i (i+1)
+%assign j (j+1)
+%endrep
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+        ;; second phase of the reduction
         movdqa  %%T2,%%T7                               ; make 3 copies of %%T7 (in in %%T2, %%T3, %%T1) for doing three shift operations
         movdqa  %%T3,%%T7
         movdqa  %%T1,%%T7
-- 
GitLab


From 87ca7d4c59684616ebb5c54149f14aa757598746 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 26 Apr 2023 22:32:21 +0100
Subject: [PATCH 239/332] test: add cmake tests to kat-app

---
 CMakeLists.txt              |  3 +++
 test/kat-app/CMakeLists.txt | 38 +++++++++++++++++++++++++++++++++++++
 2 files changed, 41 insertions(+)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index c426254d..75d304af 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -42,6 +42,9 @@ cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb VERSION ${IPSEC_MB_VERSION}
     DESCRIPTION "Intel(R) IPsec Multi-Buffer library")
 
+# add testing support
+include(CTest)
+
 # project options list (used by print_help target)
 set(IPSEC_MB_OPTIONS CMAKE_BUILD_TYPE)
 
diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 2464ef55..06027b1d 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -103,3 +103,41 @@ add_executable(${TEST_APP} ${TEST_APP_SRC_FILES})
 target_link_libraries(${TEST_APP} PRIVATE ${IPSEC_MB_LIB})
 target_compile_definitions(${TEST_APP} PRIVATE ${APP_DEFINES})
 
+########################################
+# add tests
+########################################
+
+add_test(KAT ${TEST_APP} --test-type KAT)
+add_test(DO_TEST ${TEST_APP} --test-type DO_TEST)
+add_test(CTR ${TEST_APP} --test-type CTR)
+add_test(PON ${TEST_APP} --test-type PON)
+add_test(XCBC ${TEST_APP} --test-type XCBC)
+add_test(GCM ${TEST_APP} --test-type GCM)
+add_test(CUSTOMOP ${TEST_APP} --test-type CUSTOMOP)
+add_test(DES ${TEST_APP} --test-type DES)
+add_test(CCM ${TEST_APP} --test-type CCM)
+add_test(CMAC ${TEST_APP} --test-type CMAC)
+add_test(ZUC ${TEST_APP} --test-type ZUC)
+add_test(KASUMI ${TEST_APP} --test-type KASUMI)
+add_test(SNOW3G ${TEST_APP} --test-type SNOW3G)
+add_test(HMAC_SHA1 ${TEST_APP} --test-type HMAC_SHA1)
+add_test(HMAC_SHA256 ${TEST_APP} --test-type HMAC_SHA256)
+add_test(HMAC_MD5 ${TEST_APP} --test-type HMAC_MD5)
+add_test(AES ${TEST_APP} --test-type AES)
+add_test(ECB ${TEST_APP} --test-type ECB)
+add_test(SHA ${TEST_APP} --test-type SHA)
+add_test(CHAINED ${TEST_APP} --test-type CHAINED)
+add_test(HEC ${TEST_APP} --test-type HEC)
+add_test(AES_CBCS ${TEST_APP} --test-type AES_CBCS)
+add_test(CHACHA ${TEST_APP} --test-type CHACHA)
+add_test(POLY1305 ${TEST_APP} --test-type POLY1305)
+add_test(API ${TEST_APP} --test-type API)
+add_test(DIRECT_API ${TEST_APP} --test-type DIRECT_API)
+add_test(CLEAR_MEM ${TEST_APP} --test-type CLEAR_MEM)
+add_test(CRC ${TEST_APP} --test-type CRC)
+add_test(CHACHA20_POLY1305 ${TEST_APP} --test-type CHACHA20_POLY1305)
+add_test(NULL ${TEST_APP} --test-type NULL)
+add_test(SNOW_V ${TEST_APP} --test-type SNOW_V)
+add_test(DIRECT_API_PARAM ${TEST_APP} --test-type DIRECT_API_PARAM)
+add_test(QUIC ${TEST_APP} --test-type QUIC)
+
-- 
GitLab


From 5ecf9edaeb8dde2aca5a81b72020aef5e2a8b9c2 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Fri, 28 Apr 2023 13:11:49 +0100
Subject: [PATCH 240/332] lib: [QUIC-ECB] do not support AES-192

---
 lib/avx2_t1/mb_mgr_avx2_t1.c               |  1 -
 lib/avx2_t2/mb_mgr_avx2_t2.c               |  1 -
 lib/avx512_t1/mb_mgr_avx512_t1.c           |  1 -
 lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm | 16 ++---
 lib/avx512_t2/mb_mgr_avx512_t2.c           |  1 -
 lib/avx_t1/aes_ecb_quic_x8_avx.asm         | 15 ++--
 lib/avx_t1/mb_mgr_avx_t1.c                 |  1 -
 lib/avx_t2/mb_mgr_avx_t2.c                 |  1 -
 lib/include/arch_avx512_type2.h            |  2 -
 lib/include/arch_avx_type1.h               |  2 -
 lib/include/arch_noaesni.h                 |  2 -
 lib/include/arch_sse_type1.h               |  2 -
 lib/intel-ipsec-mb.h                       |  1 -
 lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm  |  1 -
 lib/no-aesni/mb_mgr_sse_no_aesni.c         |  1 -
 lib/sse_t1/aes_ecb_quic_x8_sse.asm         | 20 ++----
 lib/sse_t1/mb_mgr_sse_t1.c                 |  1 -
 lib/sse_t2/mb_mgr_sse_t2.c                 |  1 -
 lib/sse_t3/mb_mgr_sse_t3.c                 |  1 -
 lib/x86_64/quic_hp_aes_ecb.c               | 11 ++-
 test/kat-app/quic_ecb_test.c               | 81 ++++------------------
 21 files changed, 33 insertions(+), 130 deletions(-)

diff --git a/lib/avx2_t1/mb_mgr_avx2_t1.c b/lib/avx2_t1/mb_mgr_avx2_t1.c
index dc034284..4c7cb33e 100644
--- a/lib/avx2_t1/mb_mgr_avx2_t1.c
+++ b/lib/avx2_t1/mb_mgr_avx2_t1.c
@@ -484,7 +484,6 @@ init_mb_mgr_avx2_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen4;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_avx;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index d72509d5..3714a7f8 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -484,7 +484,6 @@ init_mb_mgr_avx2_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen4;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_avx;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
diff --git a/lib/avx512_t1/mb_mgr_avx512_t1.c b/lib/avx512_t1/mb_mgr_avx512_t1.c
index 86a40954..0e73cd1d 100644
--- a/lib/avx512_t1/mb_mgr_avx512_t1.c
+++ b/lib/avx512_t1/mb_mgr_avx512_t1.c
@@ -590,7 +590,6 @@ init_mb_mgr_avx512_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx512;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_avx;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
diff --git a/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm b/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm
index bf82290e..a322a95f 100644
--- a/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_ecb_quic_vaes_avx512.asm
@@ -34,7 +34,7 @@
 ;                                     void    *out,
 ;                                     UINT64   num_buffers);
 ;
-; x = key size (128/192/256)
+; x = key size (128/256)
 ; arg 1: IN: array of pointers to input buffers
 ; arg 2: KEYS: pointer to keys (common for all buffers)
 ; arg 3: OUT: array of pointers to output buffers)
@@ -47,7 +47,6 @@
 %include "include/cet.inc"
 
 %define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_vaes_avx512
-%define AES_ECB_QUIC_ENC_192 aes_ecb_quic_enc_192_vaes_avx512
 %define AES_ECB_QUIC_ENC_256 aes_ecb_quic_enc_256_vaes_avx512
 
 %ifdef LINUX
@@ -217,7 +216,7 @@ mksection .text
                 YDATA6, YDATA7
 
 ; Perform AES encryption on blocks
-%rep (%%NROUNDS + 1)          ; 10/12/14
+%rep (%%NROUNDS + 1)          ; 10/14
         vbroadcasti128      YKEY1, [KEYS + %%I*16]
         YMM_AESENC_ROUND_BLOCKS_0_16 YDATA0, YDATA1, YDATA2, YDATA3, YDATA4,\
                 YDATA5, YDATA6, YDATA7, YKEY1, %%I, no_data,\
@@ -247,9 +246,9 @@ align 16
                 YDATA1, YDATA2, YDATA3, YDATA4, YDATA5,\
                 YDATA6, YDATA7
 
-        ; Perform AES encryption/decryption on 16 blocks
+        ; Perform AES encryption on 16 blocks
 %assign %%ROUNDNO 0        ; current key number
-%rep (%%NROUNDS + 1)          ; 10/12/14
+%rep (%%NROUNDS + 1)          ; 10/14
         vbroadcasti128      YKEY1, [KEYS + %%ROUNDNO*16]
         YMM_AESENC_ROUND_BLOCKS_0_16 YDATA0, YDATA1, YDATA2, YDATA3, YDATA4,\
                 YDATA5, YDATA6, YDATA7, YKEY1, %%ROUNDNO, no_data,\
@@ -285,13 +284,6 @@ AES_ECB_QUIC_ENC_128:
         AES_ECB_QUIC 10
         ret
 
-align 16
-MKGLOBAL(AES_ECB_QUIC_ENC_192,function,internal)
-AES_ECB_QUIC_ENC_192:
-        endbranch64
-        AES_ECB_QUIC 12
-        ret
-
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_256,function,internal)
 AES_ECB_QUIC_ENC_256:
diff --git a/lib/avx512_t2/mb_mgr_avx512_t2.c b/lib/avx512_t2/mb_mgr_avx512_t2.c
index 82e7d93c..84ba0ca1 100644
--- a/lib/avx512_t2/mb_mgr_avx512_t2.c
+++ b/lib/avx512_t2/mb_mgr_avx512_t2.c
@@ -602,7 +602,6 @@ init_mb_mgr_avx512_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac256_finalize = imb_aes_gmac_finalize_256_vaes_avx512;
 
         state->aes_ecb_128_quic = aes_ecb_quic_enc_128_vaes_avx512;
-        state->aes_ecb_192_quic = aes_ecb_quic_enc_192_vaes_avx512;
         state->aes_ecb_256_quic = aes_ecb_quic_enc_256_vaes_avx512;
 }
 
diff --git a/lib/avx_t1/aes_ecb_quic_x8_avx.asm b/lib/avx_t1/aes_ecb_quic_x8_avx.asm
index 3939abe7..b9adb569 100644
--- a/lib/avx_t1/aes_ecb_quic_x8_avx.asm
+++ b/lib/avx_t1/aes_ecb_quic_x8_avx.asm
@@ -34,7 +34,7 @@
 ;                             void    *out,
 ;                             UINT64   num_buffers);
 ;
-; x = key size (128/192/256)
+; x = key size (128/256)
 ; arg 1: IN: array of pointers to input buffers
 ; arg 2: KEYS: pointer to keys (common for all buffers)
 ; arg 3: OUT: array of pointers to output buffers)
@@ -47,7 +47,6 @@
 %include "include/cet.inc"
 
 %define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_avx
-%define AES_ECB_QUIC_ENC_192 aes_ecb_quic_enc_192_avx
 %define AES_ECB_QUIC_ENC_256 aes_ecb_quic_enc_256_avx
 
 ;; =============================================================================
@@ -178,8 +177,8 @@ mksection .text
                 XDATA1, XDATA2, XDATA3, XDATA4, XDATA5,\
                 XDATA6, XDATA7
 %assign %%I 0
-; Perform aesenc encryption/decryption on initial blocks
-%rep (%%NROUNDS + 1)          ; 10/12/14
+; Perform aesenc encryption on initial blocks
+%rep (%%NROUNDS + 1)          ; 10/14
         movdqu      XKEY1, [KEYS + %%I*16]
         XMM_AESENC_ROUND_BLOCKS_AVX_0_8 XDATA0, XDATA1, XDATA2, XDATA3, XDATA4,\
                 XDATA5, XDATA6, XDATA7, XKEY1, %%I, no_data,\
@@ -204,7 +203,7 @@ align 16
                 XDATA6, XDATA7
 %assign %%I 0
 ; Perform AES encryption/decryption on 8 blocks
-%rep (%%NROUNDS + 1)          ; 10/12/14
+%rep (%%NROUNDS + 1)          ; 10/14
         movdqu      XKEY1, [KEYS + %%I*16]
         XMM_AESENC_ROUND_BLOCKS_AVX_0_8 XDATA0, XDATA1, XDATA2, XDATA3, XDATA4,\
                 XDATA5, XDATA6, XDATA7, XKEY1, %%I, no_data,\
@@ -231,12 +230,6 @@ AES_ECB_QUIC_ENC_128:
         endbranch64
         AES_ECB_QUIC 10
 
-align 16
-MKGLOBAL(AES_ECB_QUIC_ENC_192,function,internal)
-AES_ECB_QUIC_ENC_192:
-        endbranch64
-        AES_ECB_QUIC 12
-
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_256,function,internal)
 AES_ECB_QUIC_ENC_256:
diff --git a/lib/avx_t1/mb_mgr_avx_t1.c b/lib/avx_t1/mb_mgr_avx_t1.c
index bcd71c21..5bdd94f8 100644
--- a/lib/avx_t1/mb_mgr_avx_t1.c
+++ b/lib/avx_t1/mb_mgr_avx_t1.c
@@ -482,7 +482,6 @@ init_mb_mgr_avx_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen2;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_avx;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
diff --git a/lib/avx_t2/mb_mgr_avx_t2.c b/lib/avx_t2/mb_mgr_avx_t2.c
index a7847297..39b1ee37 100644
--- a/lib/avx_t2/mb_mgr_avx_t2.c
+++ b/lib/avx_t2/mb_mgr_avx_t2.c
@@ -484,7 +484,6 @@ init_mb_mgr_avx_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen2;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_avx;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
diff --git a/lib/include/arch_avx512_type2.h b/lib/include/arch_avx512_type2.h
index c389d964..fdaa4227 100644
--- a/lib/include/arch_avx512_type2.h
+++ b/lib/include/arch_avx512_type2.h
@@ -73,8 +73,6 @@ void aes_ecb_dec_128_vaes_avx512(const void *in, const void *keys,
 
 void aes_ecb_quic_enc_128_vaes_avx512(const void *in, const void *keys,
                                       void *out, uint64_t num_buffers);
-void aes_ecb_quic_enc_192_vaes_avx512(const void *in, const void *keys,
-                                      void *out, uint64_t num_buffers);
 void aes_ecb_quic_enc_256_vaes_avx512(const void *in, const void *keys,
                                       void *out, uint64_t num_buffers);
 
diff --git a/lib/include/arch_avx_type1.h b/lib/include/arch_avx_type1.h
index fa426709..89be0d5b 100644
--- a/lib/include/arch_avx_type1.h
+++ b/lib/include/arch_avx_type1.h
@@ -83,8 +83,6 @@ void aes_ecb_dec_128_avx(const void *in, const void *keys,
 
 void aes_ecb_quic_enc_128_avx(const void *in, const void *keys,
                               void *out, uint64_t num_buffers);
-void aes_ecb_quic_enc_192_avx(const void *in, const void *keys,
-                              void *out, uint64_t num_buffers);
 void aes_ecb_quic_enc_256_avx(const void *in, const void *keys,
                               void *out, uint64_t num_buffers);
 /* AES128-ECBENC */
diff --git a/lib/include/arch_noaesni.h b/lib/include/arch_noaesni.h
index 6ae999e0..e45be836 100644
--- a/lib/include/arch_noaesni.h
+++ b/lib/include/arch_noaesni.h
@@ -85,8 +85,6 @@ void aes_ecb_dec_128_sse_no_aesni(const void *in, const void *keys,
 
 void aes_ecb_quic_enc_128_sse_no_aesni(const void *in, const void *keys,
                                        void *out, uint64_t num_buffers);
-void aes_ecb_quic_enc_192_sse_no_aesni(const void *in, const void *keys,
-                                       void *out, uint64_t num_buffers);
 void aes_ecb_quic_enc_256_sse_no_aesni(const void *in, const void *keys,
                                        void *out, uint64_t num_buffers);
 
diff --git a/lib/include/arch_sse_type1.h b/lib/include/arch_sse_type1.h
index 37573861..763e1b53 100644
--- a/lib/include/arch_sse_type1.h
+++ b/lib/include/arch_sse_type1.h
@@ -84,8 +84,6 @@ void aes_ecb_dec_128_by4_sse(const void *in, const void *keys,
 
 void aes_ecb_quic_enc_128_sse(const void *in, const void *keys,
                               void *out, uint64_t num_buffers);
-void aes_ecb_quic_enc_192_sse(const void *in, const void *keys,
-                              void *out, uint64_t num_buffers);
 void aes_ecb_quic_enc_256_sse(const void *in, const void *keys,
                               void *out, uint64_t num_buffers);
 
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 30398d54..aa03f0d7 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -1237,7 +1237,6 @@ typedef struct IMB_MGR {
         aes_cfb_t aes256_cfb_one;
 
         aes_ecb_quic_t aes_ecb_128_quic;
-        aes_ecb_quic_t aes_ecb_192_quic;
         aes_ecb_quic_t aes_ecb_256_quic;
 
         void (*set_suite_id)(struct IMB_MGR *, IMB_JOB *);
diff --git a/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm b/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm
index fec72391..5a20222e 100644
--- a/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm
@@ -33,7 +33,6 @@
 %define AES_ECB_DEC_192 aes_ecb_dec_192_sse_no_aesni
 %define AES_ECB_DEC_256 aes_ecb_dec_256_sse_no_aesni
 %define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_sse_no_aesni
-%define AES_ECB_QUIC_ENC_192 aes_ecb_quic_enc_192_sse_no_aesni
 %define AES_ECB_QUIC_ENC_256 aes_ecb_quic_enc_256_sse_no_aesni
 %include "sse_t1/aes128_ecb_by4_sse.asm"
 %include "sse_t1/aes_ecb_quic_x8_sse.asm"
diff --git a/lib/no-aesni/mb_mgr_sse_no_aesni.c b/lib/no-aesni/mb_mgr_sse_no_aesni.c
index 3fbfc248..8fd7076c 100644
--- a/lib/no-aesni/mb_mgr_sse_no_aesni.c
+++ b/lib/no-aesni/mb_mgr_sse_no_aesni.c
@@ -469,7 +469,6 @@ init_mb_mgr_sse_no_aesni_internal(IMB_MGR *state, const int reset_mgrs)
         state->chacha20_poly1305_finalize = finalize_chacha20_poly1305_sse;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse_no_aesni;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse_no_aesni;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse_no_aesni;
 
         state->set_suite_id        = SET_SUITE_ID_FN;
diff --git a/lib/sse_t1/aes_ecb_quic_x8_sse.asm b/lib/sse_t1/aes_ecb_quic_x8_sse.asm
index b2f79a0b..323aa4fc 100644
--- a/lib/sse_t1/aes_ecb_quic_x8_sse.asm
+++ b/lib/sse_t1/aes_ecb_quic_x8_sse.asm
@@ -34,7 +34,7 @@
 ;                             void    *out,
 ;                             UINT64   num_buffers);
 ;
-; x = key size (128/192/256)
+; x = key size (128/256)
 ; arg 1: IN: array of pointers to input buffers
 ; arg 2: KEYS: pointer to keys (common for all buffers)
 ; arg 3: OUT: array of pointers to output buffers)
@@ -48,7 +48,6 @@
 
 %ifndef AES_ECB_QUIC_ENC_128
 %define AES_ECB_QUIC_ENC_128 aes_ecb_quic_enc_128_sse
-%define AES_ECB_QUIC_ENC_192 aes_ecb_quic_enc_192_sse
 %define AES_ECB_QUIC_ENC_256 aes_ecb_quic_enc_256_sse
 %endif
 
@@ -180,8 +179,8 @@ mksection .text
                 XDATA1, XDATA2, XDATA3, XDATA4, XDATA5,\
                 XDATA6, XDATA7
 %assign %%I 0
-; Perform aesenc encryption/decryption on initial blocks
-%rep (%%NROUNDS + 1)          ; 10/12/14
+; Perform aesenc encryption on initial blocks
+%rep (%%NROUNDS + 1)          ; 10/14
         movdqu      XKEY1, [KEYS + %%I*16]
         XMM_AESENC_ROUND_BLOCKS_SSE_0_8 XDATA0, XDATA1, XDATA2, XDATA3, XDATA4,\
                 XDATA5, XDATA6, XDATA7, XKEY1, %%I, no_data,\
@@ -205,8 +204,8 @@ align 16
                 XDATA1, XDATA2, XDATA3, XDATA4, XDATA5,\
                 XDATA6, XDATA7
 %assign %%I 0
-; Perform AES encryption/decryption on 8 blocks
-%rep (%%NROUNDS + 1)          ; 10/12/14
+; Perform AES encryption on 8 blocks
+%rep (%%NROUNDS + 1)          ; 10/14
         movdqu      XKEY1, [KEYS + %%I*16]
         XMM_AESENC_ROUND_BLOCKS_SSE_0_8 XDATA0, XDATA1, XDATA2, XDATA3, XDATA4,\
                 XDATA5, XDATA6, XDATA7, XKEY1, %%I, no_data,\
@@ -236,15 +235,6 @@ AES_ECB_QUIC_ENC_128:
 
 %endif
 
-%ifdef AES_ECB_QUIC_ENC_192
-align 16
-MKGLOBAL(AES_ECB_QUIC_ENC_192,function,internal)
-AES_ECB_QUIC_ENC_192:
-        endbranch64
-        AES_ECB_QUIC 12
-
-%endif
-
 %ifdef AES_ECB_QUIC_ENC_256
 align 16
 MKGLOBAL(AES_ECB_QUIC_ENC_256,function,internal)
diff --git a/lib/sse_t1/mb_mgr_sse_t1.c b/lib/sse_t1/mb_mgr_sse_t1.c
index a92539da..a4760f9c 100644
--- a/lib/sse_t1/mb_mgr_sse_t1.c
+++ b/lib/sse_t1/mb_mgr_sse_t1.c
@@ -490,7 +490,6 @@ init_mb_mgr_sse_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_sse;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
diff --git a/lib/sse_t2/mb_mgr_sse_t2.c b/lib/sse_t2/mb_mgr_sse_t2.c
index 6dd3b5df..f28c9c53 100644
--- a/lib/sse_t2/mb_mgr_sse_t2.c
+++ b/lib/sse_t2/mb_mgr_sse_t2.c
@@ -488,7 +488,6 @@ init_mb_mgr_sse_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_sse;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
diff --git a/lib/sse_t3/mb_mgr_sse_t3.c b/lib/sse_t3/mb_mgr_sse_t3.c
index 16326fe2..7a674c82 100644
--- a/lib/sse_t3/mb_mgr_sse_t3.c
+++ b/lib/sse_t3/mb_mgr_sse_t3.c
@@ -489,7 +489,6 @@ init_mb_mgr_sse_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_sse;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_sse;
-        state->aes_ecb_192_quic    = aes_ecb_quic_enc_192_sse;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_sse;
 }
 
diff --git a/lib/x86_64/quic_hp_aes_ecb.c b/lib/x86_64/quic_hp_aes_ecb.c
index bd836453..d5e42879 100644
--- a/lib/x86_64/quic_hp_aes_ecb.c
+++ b/lib/x86_64/quic_hp_aes_ecb.c
@@ -64,9 +64,10 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
 
         switch (key_size) {
         case IMB_KEY_128_BYTES:
-        case IMB_KEY_192_BYTES:
         case IMB_KEY_256_BYTES:
                 break;
+        /* AES-192 is not supported by QUIC */
+        case IMB_KEY_192_BYTES:
         default:
                 imb_set_errno(state, IMB_ERR_KEY_LEN);
                 return;
@@ -80,14 +81,12 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
                 state->aes_ecb_128_quic(src_ptr_array, exp_key_data,
                                         dst_ptr_array, num_packets);
                 break;
-        case IMB_KEY_192_BYTES:
-                state->aes_ecb_192_quic(src_ptr_array, exp_key_data,
-                                        dst_ptr_array, num_packets);
-                break;
         case IMB_KEY_256_BYTES:
-        default:
                 state->aes_ecb_256_quic(src_ptr_array, exp_key_data,
                                         dst_ptr_array, num_packets);
                 break;
+        default:
+                imb_set_errno(state, IMB_ERR_KEY_LEN);
+                return;
         };
 }
diff --git a/test/kat-app/quic_ecb_test.c b/test/kat-app/quic_ecb_test.c
index 97442a7a..5428c80e 100644
--- a/test/kat-app/quic_ecb_test.c
+++ b/test/kat-app/quic_ecb_test.c
@@ -58,95 +58,52 @@ static const uint8_t ecb_128_C1[] = {
         0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
 };
 
-/* 192-bit */
-static const uint8_t ecb_192_K20[] = {
-        0x8e, 0x73, 0xb0, 0xf7, 0xda, 0x0e, 0x64, 0x52,
-        0xc8, 0x10, 0xf3, 0x2b, 0x80, 0x90, 0x79, 0xe5,
-        0x62, 0xf8, 0xea, 0xd2, 0x52, 0x2c, 0x6b, 0x7b
-};
-static const uint8_t ecb_192_P20[] = {
-        0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
-        0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
-};
-static const uint8_t ecb_192_P21[] = {
-        0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
-        0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
-};
-static const uint8_t ecb_192_P22[] = {
-        0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
-        0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef,
-};
-static const uint8_t ecb_192_P23[] = {
-        0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
-        0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10
-};
-static const uint8_t ecb_192_C20[] = {
-        0xbd, 0x33, 0x4f, 0x1d, 0x6e, 0x45, 0xf2, 0x5f,
-        0xf7, 0x12, 0xa2, 0x14, 0x57, 0x1f, 0xa5, 0xcc,
-};
-static const uint8_t ecb_192_C21[] = {
-        0x97, 0x41, 0x04, 0x84, 0x6d, 0x0a, 0xd3, 0xad,
-        0x77, 0x34, 0xec, 0xb3, 0xec, 0xee, 0x4e, 0xef,
-};
-static const uint8_t ecb_192_C22[] = {
-        0xef, 0x7a, 0xfd, 0x22, 0x70, 0xe2, 0xe6, 0x0a,
-        0xdc, 0xe0, 0xba, 0x2f, 0xac, 0xe6, 0x44, 0x4e,
-};
-static const uint8_t ecb_192_C23[] = {
-        0x9a, 0x4b, 0x41, 0xba, 0x73, 0x8d, 0x6c, 0x72,
-        0xfb, 0x16, 0x69, 0x16, 0x03, 0xc1, 0x8e, 0x0e
-};
-
 /* 256-bit */
-static const uint8_t ecb_256_K30[] = {
+static const uint8_t ecb_256_K20[] = {
         0x60, 0x3d, 0xeb, 0x10, 0x15, 0xca, 0x71, 0xbe,
         0x2b, 0x73, 0xae, 0xf0, 0x85, 0x7d, 0x77, 0x81,
         0x1f, 0x35, 0x2c, 0x07, 0x3b, 0x61, 0x08, 0xd7,
         0x2d, 0x98, 0x10, 0xa3, 0x09, 0x14, 0xdf, 0xf4
 };
-static const uint8_t ecb_256_P30[] = {
+static const uint8_t ecb_256_P20[] = {
         0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
         0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
 };
-static const uint8_t ecb_256_P31[] = {
+static const uint8_t ecb_256_P21[] = {
         0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
         0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
 };
-static const uint8_t ecb_256_P32[] = {
+static const uint8_t ecb_256_P22[] = {
         0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
         0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef,
 };
-static const uint8_t ecb_256_P33[] = {
+static const uint8_t ecb_256_P23[] = {
         0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
         0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10
 };
-static const uint8_t ecb_256_C30[] = {
+static const uint8_t ecb_256_C20[] = {
         0xf3, 0xee, 0xd1, 0xbd, 0xb5, 0xd2, 0xa0, 0x3c,
         0x06, 0x4b, 0x5a, 0x7e, 0x3d, 0xb1, 0x81, 0xf8,
 };
-static const uint8_t ecb_256_C31[] = {
+static const uint8_t ecb_256_C21[] = {
         0x59, 0x1c, 0xcb, 0x10, 0xd4, 0x10, 0xed, 0x26,
         0xdc, 0x5b, 0xa7, 0x4a, 0x31, 0x36, 0x28, 0x70,
 };
-static const uint8_t ecb_256_C32[] = {
+static const uint8_t ecb_256_C22[] = {
         0xb6, 0xed, 0x21, 0xb9, 0x9c, 0xa6, 0xf4, 0xf9,
         0xf1, 0x53, 0xe7, 0xb1, 0xbe, 0xaf, 0xed, 0x1d,
 };
-static const uint8_t ecb_256_C33[] = {
+static const uint8_t ecb_256_C23[] = {
         0x23, 0x30, 0x4b, 0x7a, 0x39, 0xf9, 0xf3, 0xff,
         0x06, 0x7d, 0x8d, 0x8f, 0x9e, 0x24, 0xec, 0xc7
 };
 
 static const struct quic_ecb_vector quic_ecb_vectors[] = {
         {ecb_128_K1,  ecb_128_P1, ecb_128_C1, sizeof(ecb_128_K1)},
-        {ecb_192_K20, ecb_192_P20, ecb_192_C20, sizeof(ecb_192_K20)},
-        {ecb_192_K20, ecb_192_P21, ecb_192_C21, sizeof(ecb_192_K20)},
-        {ecb_192_K20, ecb_192_P22, ecb_192_C22, sizeof(ecb_192_K20)},
-        {ecb_192_K20, ecb_192_P23, ecb_192_C23, sizeof(ecb_192_K20)},
-        {ecb_256_K30, ecb_256_P30, ecb_256_C30, sizeof(ecb_256_K30)},
-        {ecb_256_K30, ecb_256_P31, ecb_256_C31, sizeof(ecb_256_K30)},
-        {ecb_256_K30, ecb_256_P32, ecb_256_C32, sizeof(ecb_256_K30)},
-        {ecb_256_K30, ecb_256_P33, ecb_256_C33, sizeof(ecb_256_K30)},
+        {ecb_256_K20, ecb_256_P20, ecb_256_C20, sizeof(ecb_256_K20)},
+        {ecb_256_K20, ecb_256_P21, ecb_256_C21, sizeof(ecb_256_K20)},
+        {ecb_256_K20, ecb_256_P22, ecb_256_C22, sizeof(ecb_256_K20)},
+        {ecb_256_K20, ecb_256_P23, ecb_256_C23, sizeof(ecb_256_K20)},
 };
 
 static int
@@ -222,7 +179,6 @@ test_quic_ecb_vectors(struct IMB_MGR *mb_mgr, const int vec_cnt,
                       const struct quic_ecb_vector *vec_tab, const char *banner,
                       const int num_jobs,
                       struct test_suite_context *ts128,
-                      struct test_suite_context *ts192,
                       struct test_suite_context *ts256)
 {
 	int vect;
@@ -249,11 +205,6 @@ test_quic_ecb_vectors(struct IMB_MGR *mb_mgr, const int vec_cnt,
                                            dec_keys);
                         ctx = ts128;
                         break;
-                case 24:
-                        IMB_AES_KEYEXP_192(mb_mgr, vec_tab[vect].K, enc_keys,
-                                           dec_keys);
-                        ctx = ts192;
-                        break;
                 case 32:
                 default:
                         IMB_AES_KEYEXP_256(mb_mgr, vec_tab[vect].K, enc_keys,
@@ -288,7 +239,7 @@ test_quic_ecb_vectors(struct IMB_MGR *mb_mgr, const int vec_cnt,
 int
 quic_ecb_test(struct IMB_MGR *mb_mgr)
 {
-        struct test_suite_context ts128, ts192, ts256;
+        struct test_suite_context ts128, ts256;
         const int num_jobs_tab[] = {
                 1, 3, 4, 5, 7, 8, 9, 15, 16, 17
         };
@@ -296,7 +247,6 @@ quic_ecb_test(struct IMB_MGR *mb_mgr)
         int errors = 0;
 
         test_suite_start(&ts128, "QUIC-HP-AES-ECB-128");
-        test_suite_start(&ts192, "QUIC-HP-AES-ECB-192");
         test_suite_start(&ts256, "QUIC-HP-AES-ECB-256");
 
         for (i = 0; i < DIM(num_jobs_tab); i++)
@@ -304,10 +254,9 @@ quic_ecb_test(struct IMB_MGR *mb_mgr)
                                       quic_ecb_vectors,
                                       "QUIC-HP-AES-ECB test vectors",
                                       num_jobs_tab[i],
-                                      &ts128, &ts192, &ts256);
+                                      &ts128, &ts256);
 
         errors = test_suite_end(&ts128);
-        errors += test_suite_end(&ts192);
         errors += test_suite_end(&ts256);
 
 	return errors;
-- 
GitLab


From 320ac64f5fa4aefd0890c8c491b29523f3c5302f Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 27 Apr 2023 09:55:00 +0100
Subject: [PATCH 241/332] avx2: [aes-gcm] workaround load block issue in case
 of false store-forward condition

- perform all plain/cipher text loads first and then do stores
  - avoid doing one block load and one store
    - in unaligned address cases and in-place operation, it may cause performance degradation
---
 lib/include/gcm_common_avx2_avx512.inc | 379 ++++++++++++++-----------
 1 file changed, 212 insertions(+), 167 deletions(-)

diff --git a/lib/include/gcm_common_avx2_avx512.inc b/lib/include/gcm_common_avx2_avx512.inc
index d8939d3c..841480df 100644
--- a/lib/include/gcm_common_avx2_avx512.inc
+++ b/lib/include/gcm_common_avx2_avx512.inc
@@ -725,20 +725,43 @@ default rel
 %endif ; %if(%%num_initial_blocks>0)
 
 %assign i (9 - %%num_initial_blocks)
+%assign k 0
+%rep %%num_initial_blocks
+                VXLDR   %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + k*16]
+                vpxor   reg(i), reg(i), %%T1
+
+%ifidn  %%ENC_DEC, DEC
+%if k == 0
+                vmovdqa %%T6, %%T1
+%else
+                vmovdqa [rsp + TMP %+ i], %%T1
+%endif
+%endif
+
+%assign i (i + 1)
+%assign k (k + 1)
+%endrep
+
+%assign i (9 - %%num_initial_blocks)
+%assign k 0
 %rep %%num_initial_blocks
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-                vpxor    reg(i), reg(i), %%T1
                 ;; Write back ciphertext for %%num_initial_blocks blocks
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
-                add     %%DATA_OFFSET, 16
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + k*16], reg(i)
                 ;; Prepare ciphertext for GHASH computations
 %ifidn  %%ENC_DEC, DEC
-                vpshufb  reg(i), %%T1, [rel SHUF_MASK]
+%if k == 0
+                vpshufb reg(i), %%T6, [rel SHUF_MASK]
+%else
+                vmovdqa %%T1, [rsp + TMP %+ i]
+                vpshufb reg(i), %%T1, [rel SHUF_MASK]
+%endif
 %else
                 vpshufb  reg(i), reg(i), [rel SHUF_MASK]
 %endif
-%assign i (i+1)
+%assign i (i + 1)
+%assign k (k + 1)
 %endrep
+                add     %%DATA_OFFSET, (16 * %%num_initial_blocks)
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
@@ -1090,65 +1113,15 @@ default rel
         vpxor           %%T3, %%T1, %%T4
 %else
         ;; The hash should end up in T3
-        vmovdqa  %%T3, %%T2
+        vmovdqa         %%T3, %%T2
 %endif
 
         ;; Final hash is now in T3
-%if %%num_initial_blocks > 0
-        ;; NOTE: obsolete in case %%num_initial_blocks = 0
-        sub     %%LENGTH, 16*%%num_initial_blocks
-%endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*0]
-                vpxor    %%XMM1, %%XMM1, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*0], %%XMM1
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM1, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*1]
-                vpxor    %%XMM2, %%XMM2, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*1], %%XMM2
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM2, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*2]
-                vpxor    %%XMM3, %%XMM3, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*2], %%XMM3
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM3, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*3]
-                vpxor    %%XMM4, %%XMM4, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*3], %%XMM4
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM4, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*4]
-                vpxor    %%XMM5, %%XMM5, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*4], %%XMM5
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM5, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*5]
-                vpxor    %%XMM6, %%XMM6, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*5], %%XMM6
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM6, %%T1
-                %endif
-
-               VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*6]
-                vpxor    %%XMM7, %%XMM7, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*6], %%XMM7
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM7, %%T1
-                %endif
 
 %if %%num_initial_blocks > 0
+                ;; NOTE: obsolete in case %%num_initial_blocks = 0
+                sub     %%LENGTH, 16 * %%num_initial_blocks
+
                 ;; NOTE: 'jl' is never taken for %%num_initial_blocks = 0
                 ;;      This macro is executed for length 128 and up,
                 ;;      zero length is checked in GCM_ENC_DEC.
@@ -1158,30 +1131,97 @@ default rel
                 cmp %%LENGTH, 128
                 jl %%_initial_skip_last_word_write
 %endif
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*7]
-                vpxor    %%XMM8, %%XMM8, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*7], %%XMM8
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM8, %%T1
-                %endif
+
+                ;; Load 8 plain/cipher text blocks and XOR them against AES blocks
+%assign i 1
+%rep 8
+%assign k (i - 1)
+
+                VXLDR   %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*k]
+                vpxor   reg(i), reg(i), %%T1
+%ifidn  %%ENC_DEC, DEC
+%if i == 1
+                vmovdqa %%T6, %%T1
+%else
+                vmovdqa [rsp + TMP %+ i], %%T1
+%endif
+%endif
+%assign i (i + 1)
+%endrep
+
+                ;; Store 8 cipher/plain text blocks and prepare cipher text blocks for GHASH
+%assign i 1
+%rep 8
+%assign k (i - 1)
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*k], reg(i)
+%ifidn  %%ENC_DEC, DEC
+%if i == 1
+                vmovdqa reg(i), %%T6
+%else
+                vmovdqa reg(i), [rsp + TMP %+ i]
+%endif
+%endif
+%assign i (i + 1)
+%endrep
 
                 ;; Update %%LENGTH with the number of blocks processed
-                sub     %%LENGTH, 16
-                add     %%DATA_OFFSET, 16
+                sub     %%LENGTH, 8*16
+                add     %%DATA_OFFSET, 8*16
+
+%if %%num_initial_blocks > 0
+                ;; jmp and %%_initial_skip_last_word_write not required for %%num_initial_blocks=0 case
+                jmp     %%_initial_words_done
+
 %%_initial_skip_last_word_write:
-                sub     %%LENGTH, 128-16
-                add     %%DATA_OFFSET, 128-16
+                ;; Load 7 plain/cipher text blocks and XOR them against AES blocks
+%assign i 1
+%rep 7
+%assign k (i - 1)
+
+                VXLDR   %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*k]
+                vpxor   reg(i), reg(i), %%T1
+%ifidn  %%ENC_DEC, DEC
+%if i == 1
+                vmovdqa %%T6, %%T1
+%else
+                vmovdqa [rsp + TMP %+ i], %%T1
+%endif
+%endif
+%assign i (i + 1)
+%endrep
+
+                ;; Store 7 cipher/plain text blocks and prepare cipher text blocks for GHASH
+%assign i 1
+%rep 7
+%assign k (i - 1)
+                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*k], reg(i)
+%ifidn  %%ENC_DEC, DEC
+%if i == 1
+                vmovdqa reg(i), %%T6
+%else
+                vmovdqa reg(i), [rsp + TMP %+ i]
+%endif
+%endif
+%assign i (i + 1)
+%endrep
+
+                ;; Update %%LENGTH with the number of blocks processed
+                sub     %%LENGTH, 7*16
+                add     %%DATA_OFFSET, 7*16
+
+%%_initial_words_done:
+%endif ;; %%num_initial_blocks > 0
 
-                vpshufb  %%XMM1, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM1, [rel SHUF_MASK]             ; perform a 16Byte swap
                 ;; Combine GHASHed value with the corresponding ciphertext
-                vpxor    %%XMM1, %%XMM1, %%T3
-                vpshufb  %%XMM2, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM3, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM4, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM5, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM6, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM7, [rel SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM8, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpxor   %%XMM1, %%XMM1, %%T3
+                vpshufb %%XMM2, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM3, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM4, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM5, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM6, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM7, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM8, [rel SHUF_MASK]             ; perform a 16Byte swap
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
@@ -1264,21 +1304,43 @@ default rel
 ;;; Hash all but the last block of data
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks-1
+%assign k 0
+%assign i (9 - %%num_initial_blocks)
+%rep %%num_initial_blocks - 1
                 ;; Encrypt the message for all but the last block
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-                vpxor    reg(i), reg(i), %%T1
+                VXLDR   %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*k]
+                vpxor   reg(i), reg(i), %%T1
+%ifidn  %%ENC_DEC, DEC
+%if k == 0
+                vmovdqa %%T6, %%T1
+%else
+                vmovdqa [rsp + TMP %+ i], %%T1
+%endif
+%endif
+%assign i (i + 1)
+%assign k (k + 1)
+%endrep
+
+%assign k 0
+%assign i (9 - %%num_initial_blocks)
+%rep %%num_initial_blocks - 1
                 ;; write back ciphertext for %%num_initial_blocks blocks
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)
-                add     %%DATA_OFFSET, 16
-                %ifidn  %%ENC_DEC, DEC
-                    vmovdqa  reg(i), %%T1
-                %endif
+                VXSTR   [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*k], reg(i)
                 ;; Prepare ciphertext for GHASH computations
-                vpshufb  reg(i), [rel SHUF_MASK]
-%assign i (i+1)
+%ifidn  %%ENC_DEC, DEC
+%if k == 0
+                vpshufb reg(i), %%T6, [rel SHUF_MASK]
+%else
+                vmovdqa reg(i), [rsp + TMP %+ i]
+                vpshufb reg(i), reg(i), [rel SHUF_MASK]
+%endif
+%else ; ENC
+                vpshufb reg(i), reg(i), [rel SHUF_MASK]
+%endif
+%assign i (i + 1)
+%assign k (k + 1)
 %endrep
+                add     %%DATA_OFFSET, (16 * (%%num_initial_blocks - 1))
 
 %if %%num_initial_blocks > 1
                 ;; The final block of data may be <16B
@@ -1877,75 +1939,47 @@ default rel
                 vmovdqu %%T5, [%%GDATA + 16*14]
 %endif                          ; GCM256
 
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;; accumulate product into %%T1:%%T7
+
+        vpslldq %%T3, %%T6, 8                                   ; shift-L %%T3 2 DWs
+        vpsrldq %%T6, %%T6, 8                                   ; shift-R %%T2 2 DWs
+        vpxor   %%T7, %%T7, %%T3
+        vpxor   %%T1, %%T1, %%T6                                ; accumulate the results in %%T1:%%T7
+
 %assign i 0
 %assign j 1
 %rep 8
 
-        ;; SNP TBD: This is pretty ugly - consider whether just XORing the
-        ;; data in after vaesenclast is simpler and performant. Would
-        ;; also have to ripple it through partial block and ghash_mul_8.
-%ifidn %%FULL_PARTIAL, full
-    %ifdef  NT_LD
-        VXLDR   %%T2, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-        vpxor   %%T2, %%T2, %%T5
-    %else
-        vpxor   %%T2, %%T5, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-    %endif
-
-    %ifidn %%ENC_DEC, ENC
-        vaesenclast     reg(j), reg(j), %%T2
-    %else
-        vaesenclast     %%T3, reg(j), %%T2
-        vpxor   reg(j), %%T2, %%T5
-        VXSTR [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*i], %%T3
-    %endif
+%assign skip_load_and_xor 0
+%ifnidn %%FULL_PARTIAL, full
+%if i >= 7
+;; if partial case and dealing with the last block then skip load and xor
+%assign skip_load_and_xor 1
+%endif
+%endif
 
-%else
-    ; Don't read the final data during partial block processing
-    %ifdef  NT_LD
-        %if (i<7)
-            VXLDR   %%T2, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-            vpxor   %%T2, %%T2, %%T5
-        %else
-            ;; Stage the key directly in T2 rather than hash it with plaintext
-            vmovdqu %%T2, %%T5
-        %endif
-    %else
-        %if (i<7)
-            vpxor   %%T2, %%T5, [%%PLAIN_CYPH_IN+%%DATA_OFFSET+16*i]
-        %else
-            ;; Stage the key directly in T2 rather than hash it with plaintext
-            vmovdqu %%T2, %%T5
-        %endif
-    %endif
-
-    %ifidn %%ENC_DEC, ENC
-        vaesenclast     reg(j), reg(j), %%T2
-    %else
-        %if (i<7)
-            vaesenclast     %%T3, reg(j), %%T2
-            vpxor   reg(j), %%T2, %%T5
-            ;; Do not read the data since it could fault
-            VXSTR [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*i], %%T3
-        %else
-            vaesenclast     reg(j), reg(j), %%T2
-        %endif
-    %endif
+%if skip_load_and_xor == 0
+                VXLDR           %%T2, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*i]
 %endif
+                vaesenclast     reg(j), reg(j), %%T5
+%if skip_load_and_xor == 0
+                vpxor           reg(j), reg(j), %%T2
+%ifidn %%ENC_DEC, DEC
+%if i == 0
+                vmovdqa         %%T6, %%T2
+%else
+                vmovdqa         [rsp + TMP %+ j], %%T2
+%endif ; i
+%endif ; DEC
+%endif ; skip_load_and_xor
 
-%assign i (i+1)
-%assign j (j+1)
+%assign i (i + 1)
+%assign j (j + 1)
 %endrep
 
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        vpslldq %%T3, %%T6, 8                                   ; shift-L %%T3 2 DWs
-        vpsrldq %%T6, %%T6, 8                                   ; shift-R %%T2 2 DWs
-        vpxor   %%T7, %%T7, %%T3
-        vpxor   %%T1, %%T1, %%T6                                ; accumulate the results in %%T1:%%T7
-
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
+        ;; first phase of the reduction
         vmovdqa         %%T3, [rel POLY2]
 
         vpclmulqdq      %%T2, %%T3, %%T7, 0x01
@@ -1954,23 +1988,34 @@ default rel
         vpxor           %%T7, %%T7, %%T2                        ; first phase of the reduction complete
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-    %ifidn %%ENC_DEC, ENC
-        ; Write to the Ciphertext buffer
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*0], %%XMM1
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*1], %%XMM2
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*2], %%XMM3
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*3], %%XMM4
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*4], %%XMM5
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*5], %%XMM6
-        VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*6], %%XMM7
-        %ifidn %%FULL_PARTIAL, full
-            ;; Avoid writing past the buffer if handling a partial block
-            VXSTR   [%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*7], %%XMM8
-        %endif
-    %endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
+%assign i 0
+%assign j 1
+%rep 8
+%assign skip_store 0
+%ifnidn %%FULL_PARTIAL, full
+%if i >= 7
+;; if partial case and dealing with the last block then skip store
+%assign skip_store 1
+%endif
+%endif
+
+%if skip_store == 0
+                VXSTR           [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*i], reg(j)
+%ifidn %%ENC_DEC, DEC
+%if i == 0
+                vmovdqa         reg(j), %%T6
+%else
+                vmovdqa         reg(j), [rsp + TMP %+ j]
+%endif ; i
+%endif ; DEC
+%endif ; skip_store
+
+%assign i (i + 1)
+%assign j (j + 1)
+%endrep
+
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        ;; second phase of the reduction
         vpclmulqdq      %%T2, %%T3, %%T7, 0x00
         vpsrldq         %%T2, %%T2, 4                                   ; shift-R xmm2 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
 
@@ -1988,7 +2033,7 @@ default rel
                 vpshufb %%XMM5, [rel SHUF_MASK]             ; perform a 16Byte swap
                 vpshufb %%XMM6, [rel SHUF_MASK]             ; perform a 16Byte swap
                 vpshufb %%XMM7, [rel SHUF_MASK]             ; perform a 16Byte swap
-        vpshufb %%XMM8, [rel SHUF_MASK]             ; perform a 16Byte swap
+                vpshufb %%XMM8, [rel SHUF_MASK]             ; perform a 16Byte swap
 
         vpxor   %%XMM1, %%T1
 
-- 
GitLab


From 45e67a23cd232ebc0fde88b1d2a7b69cb1b414ab Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 2 May 2023 11:55:09 +0100
Subject: [PATCH 242/332] cmake: add utils file to handle utility functions

---
 CMakeLists.txt    | 54 ++++++------------------------
 cmake/utils.cmake | 83 +++++++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 93 insertions(+), 44 deletions(-)
 create mode 100644 cmake/utils.cmake

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 75d304af..507f76bb 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -24,38 +24,24 @@
 # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-# set default CMakeCache.txt values
-set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Selected build type")
-# clear default release build C Compiler Flags
-set(CMAKE_C_FLAGS_RELEASE "" CACHE STRING "" FORCE)
-# clear default debug build C Compiler Flags
-set(CMAKE_C_FLAGS_DEBUG "" CACHE STRING "" FORCE)
+include("${CMAKE_CURRENT_SOURCE_DIR}/cmake/utils.cmake")
 
 # get version from public header file
-set(IMB_HDR "${CMAKE_CURRENT_SOURCE_DIR}/lib/intel-ipsec-mb.h")
-file(STRINGS ${IMB_HDR} VER_STR REGEX "^.*IMB_VERSION_STR.*$")
-string(REGEX MATCH "[0-9]+.[0-9]+.[0-9]+(-[a-z]+)?" IPSEC_MB_VERSION_FULL ${VER_STR})
-string(REGEX MATCH "[0-9]+.[0-9]+.[0-9]+" IPSEC_MB_VERSION ${IPSEC_MB_VERSION_FULL})
+imb_get_version("${CMAKE_CURRENT_SOURCE_DIR}/lib/intel-ipsec-mb.h")
 message(STATUS "Project Version: ${IPSEC_MB_VERSION_FULL}")
 
 cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb VERSION ${IPSEC_MB_VERSION}
     DESCRIPTION "Intel(R) IPsec Multi-Buffer library")
 
-# add testing support
-include(CTest)
+# set default project values
+imb_set_proj_defaults()
 
-# project options list (used by print_help target)
-set(IPSEC_MB_OPTIONS CMAKE_BUILD_TYPE)
+# do compiler checks
+imb_compiler_check()
 
-# flag to force full project build
-set(FULL_PROJECT_BUILD TRUE)
-
-# check compiler version
-if(("${CMAKE_C_COMPILER_ID}" STREQUAL "GNU") AND
-    (CMAKE_C_COMPILER_VERSION VERSION_LESS 5.0))
-    message(FATAL_ERROR "GNU C Compiler version must be 5.0 or higher")
-endif()
+# add testing support
+include(CTest)
 
 # build library
 add_subdirectory(lib)
@@ -71,28 +57,8 @@ add_subdirectory(test)
 #######################################
 
 # add custom target to uninstall library
-configure_file(
-    "${CMAKE_CURRENT_SOURCE_DIR}/lib/cmake/uninstall.cmake.in"
-    "${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake"
-    IMMEDIATE @ONLY)
-
-add_custom_target(uninstall
-    COMMAND ${CMAKE_COMMAND} -P ${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake)
+imb_add_target_uninstall("${CMAKE_CURRENT_SOURCE_DIR}/lib/cmake/uninstall.cmake.in")
 
 # add custom target to print help information
-add_custom_target(
-  print_help
-  COMMAND ${CMAKE_COMMAND} -E echo "Available build options:"
-  VERBATIM
-)
-
-foreach (OPTION ${IPSEC_MB_OPTIONS})
-  get_property(HELP_TEXT CACHE ${OPTION} PROPERTY HELPSTRING)
-  if(HELP_TEXT)
-    add_custom_command(TARGET print_help
-      COMMAND
-      ${CMAKE_COMMAND} -E echo "    ${OPTION}=${${OPTION}} - ${HELP_TEXT}"
-    )
-  endif()
-endforeach()
+imb_add_target_print_help("${IPSEC_MB_OPTIONS}")
 
diff --git a/cmake/utils.cmake b/cmake/utils.cmake
new file mode 100644
index 00000000..80f3b1c1
--- /dev/null
+++ b/cmake/utils.cmake
@@ -0,0 +1,83 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# extract library version from header file
+macro(imb_get_version IMB_HDR_FILE)
+  file(STRINGS ${IMB_HDR_FILE} VER_STR REGEX "^.*IMB_VERSION_STR.*$")
+  string(REGEX MATCH "[0-9]+.[0-9]+.[0-9]+(-[a-z]+)?" IPSEC_MB_VERSION_FULL ${VER_STR})
+  string(REGEX MATCH "[0-9]+.[0-9]+.[0-9]+" IPSEC_MB_VERSION ${IPSEC_MB_VERSION_FULL})
+endmacro()
+
+# set default project settings
+macro(imb_set_proj_defaults)
+  set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Selected build type")
+  # clear default release build C Compiler Flags
+  set(CMAKE_C_FLAGS_RELEASE "" CACHE STRING "" FORCE)
+  # clear default debug build C Compiler Flags
+  set(CMAKE_C_FLAGS_DEBUG "" CACHE STRING "" FORCE)
+
+  # project options list (used by print_help target)
+  set(IPSEC_MB_OPTIONS CMAKE_BUILD_TYPE)
+
+  # flag to force full project build
+  set(FULL_PROJECT_BUILD TRUE)
+endmacro()
+
+# compiler checks
+macro(imb_compiler_check)
+  if((${CMAKE_C_COMPILER_ID} STREQUAL "GNU") AND
+    (CMAKE_C_COMPILER_VERSION VERSION_LESS 5.0))
+    message(FATAL_ERROR "GNU C Compiler version must be 5.0 or higher")
+  endif()
+endmacro()
+
+# add uninstall target
+macro(imb_add_target_uninstall UNINSTALL_ROUTINE)
+  configure_file(${UNINSTALL_ROUTINE}
+    "${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake"
+    IMMEDIATE @ONLY)
+
+  add_custom_target(uninstall
+    COMMAND ${CMAKE_COMMAND} -P ${CMAKE_CURRENT_BINARY_DIR}/cmake_uninstall.cmake)
+endmacro()
+
+# add print_help target
+macro(imb_add_target_print_help OPTIONS)
+  add_custom_target(
+    print_help
+    COMMAND ${CMAKE_COMMAND} -E echo "Available build options:"
+    VERBATIM
+    )
+
+  foreach (OPTION ${OPTIONS})
+    get_property(HELP_TEXT CACHE ${OPTION} PROPERTY HELPSTRING)
+    if(HELP_TEXT)
+      add_custom_command(TARGET print_help
+        COMMAND
+        ${CMAKE_COMMAND} -E echo "    ${OPTION}=${${OPTION}} - ${HELP_TEXT}"
+        )
+    endif()
+  endforeach()
+endmacro()
-- 
GitLab


From f20ffad254101ca98f64b8f127e03b6a3cb47caf Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 2 May 2023 14:24:34 +0100
Subject: [PATCH 243/332] cmake: add style check target using clang-format

---
 .clang-format            | 46 ++++++++++++++++++++++++++++++++++++++++
 CMakeLists.txt           |  2 ++
 cmake/clang-format.cmake | 43 +++++++++++++++++++++++++++++++++++++
 cmake/utils.cmake        |  6 ++++++
 4 files changed, 97 insertions(+)
 create mode 100644 .clang-format
 create mode 100644 cmake/clang-format.cmake

diff --git a/.clang-format b/.clang-format
new file mode 100644
index 00000000..b0d723d6
--- /dev/null
+++ b/.clang-format
@@ -0,0 +1,46 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+BasedOnStyle: LLVM
+IndentWidth: 8
+Language: Cpp
+BreakBeforeBraces: Linux
+AllowShortIfStatementsOnASingleLine: false
+IndentCaseLabels: false
+UseTab: Never
+AlignConsecutiveMacros: true
+AlignTrailingComments: true
+AlwaysBreakAfterReturnType: All
+SortIncludes: false
+BreakBeforeInheritanceComma: true
+AllowAllParametersOfDeclarationOnNextLine: false
+BinPackParameters: true
+BinPackArguments: true
+ReflowComments: true
+SpaceAfterCStyleCast: false
+ColumnLimit: 100
+Cpp11BracedListStyle: false
+MaxEmptyLinesToKeep: 1
+ContinuationIndentWidth: 8
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 507f76bb..09edd431 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -62,3 +62,5 @@ imb_add_target_uninstall("${CMAKE_CURRENT_SOURCE_DIR}/lib/cmake/uninstall.cmake.
 # add custom target to print help information
 imb_add_target_print_help("${IPSEC_MB_OPTIONS}")
 
+# style check target
+imb_add_target_style_check()
diff --git a/cmake/clang-format.cmake b/cmake/clang-format.cmake
new file mode 100644
index 00000000..2ee74fa8
--- /dev/null
+++ b/cmake/clang-format.cmake
@@ -0,0 +1,43 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# set clang-format binary name
+if(NOT CLANG_FORMAT_BIN)
+  set(CLANG_FORMAT_BIN clang-format)
+endif()
+
+find_program(CLANG_FORMAT NAMES ${CLANG_FORMAT_BIN})
+
+# set up target if clang-format available
+if(CLANG_FORMAT)
+  file(GLOB_RECURSE CLANG_FORMAT_SRC_FILES "${CMAKE_CURRENT_SOURCE_DIR}/*.[ch]")
+
+  add_custom_target(style
+    COMMENT "Checking style using clang-format"
+    COMMAND clang-format -style=file --dry-run --Werror ${CLANG_FORMAT_SRC_FILES}
+  )
+endif()
+
+
diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index 80f3b1c1..86520d05 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -81,3 +81,9 @@ macro(imb_add_target_print_help OPTIONS)
     endif()
   endforeach()
 endmacro()
+
+# style check using clang format
+macro(imb_add_target_style_check)
+  include("${CMAKE_CURRENT_SOURCE_DIR}/cmake/clang-format.cmake")
+endmacro()
+
-- 
GitLab


From e7cd663451244a75a5085fdef87d3edf729bf1ce Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 2 May 2023 15:21:00 +0100
Subject: [PATCH 244/332] cmake: add style fix target using clang-format

---
 cmake/clang-format.cmake | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/cmake/clang-format.cmake b/cmake/clang-format.cmake
index 2ee74fa8..6d71f07c 100644
--- a/cmake/clang-format.cmake
+++ b/cmake/clang-format.cmake
@@ -38,6 +38,11 @@ if(CLANG_FORMAT)
     COMMENT "Checking style using clang-format"
     COMMAND clang-format -style=file --dry-run --Werror ${CLANG_FORMAT_SRC_FILES}
   )
+
+  add_custom_target(style-fix
+    COMMENT "Fixing style issues using clang-format"
+    COMMAND clang-format -style=file -i ${CLANG_FORMAT_SRC_FILES}
+  )
 endif()
 
 
-- 
GitLab


From 88d083ccefabb778732d7e92789c38a964916f4e Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 4 May 2023 15:27:15 +0100
Subject: [PATCH 245/332] test: remove old .clang-format file

---
 test/kat-app/.clang-format | 20 --------------------
 1 file changed, 20 deletions(-)
 delete mode 100755 test/kat-app/.clang-format

diff --git a/test/kat-app/.clang-format b/test/kat-app/.clang-format
deleted file mode 100755
index 87bfece7..00000000
--- a/test/kat-app/.clang-format
+++ /dev/null
@@ -1,20 +0,0 @@
-BasedOnStyle: LLVM
-IndentWidth: 8
-Language: Cpp
-BreakBeforeBraces: Linux
-AllowShortIfStatementsOnASingleLine: false
-IndentCaseLabels: false
-UseTab: Never
-AlignConsecutiveMacros: true
-AlignTrailingComments: true
-AlwaysBreakAfterReturnType: AllDefinitions
-SortIncludes: false
-BreakBeforeInheritanceComma: true
-AllowAllParametersOfDeclarationOnNextLine: false
-BinPackParameters: false
-BinPackArguments: true
-ReflowComments: true
-SpaceAfterCStyleCast: false
-ColumnLimit: 80
-Cpp11BracedListStyle: false
-MaxEmptyLinesToKeep: 1
\ No newline at end of file
-- 
GitLab


From 7670235aafbbdbe3582a332aa7b048cf35426227 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Thu, 4 May 2023 14:12:02 +0100
Subject: [PATCH 246/332] test: [GMAC] Moving Test to new file

---
 test/kat-app/CMakeLists.txt |   1 +
 test/kat-app/Makefile       |   3 +-
 test/kat-app/gcm_test.c     | 331 -----------------------------
 test/kat-app/gmac_test.c    | 402 ++++++++++++++++++++++++++++++++++++
 test/kat-app/main.c         |   6 +
 test/kat-app/win_x64.mak    |   2 +-
 6 files changed, 412 insertions(+), 333 deletions(-)
 create mode 100644 test/kat-app/gmac_test.c

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 06027b1d..6e867522 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -74,6 +74,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/snow_v_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/quic_ecb_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/gmac_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha1.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha224.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha256.json.c
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index d1d51b27..6e6efc3a 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -38,7 +38,8 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
 	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c hmac_sha512.json.c \
-	hmac_md5.json.c
+	hmac_md5.json.c \
+	gmac_test.c
 OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
 # targets come here
diff --git a/test/kat-app/gcm_test.c b/test/kat-app/gcm_test.c
index bac7e0c9..70ed41c4 100644
--- a/test/kat-app/gcm_test.c
+++ b/test/kat-app/gcm_test.c
@@ -1123,138 +1123,6 @@ static uint8_t T34[] =  {
 };
 #define A34_len sizeof(A34)
 
-/*
- * GMAC vectors
- */
-static uint8_t K29[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F
-};
-static uint8_t IV29[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0A, 0x0B
-};
-static uint8_t P29[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
-        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-        0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
-        0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
-        0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-};
-static uint8_t T29[] =  {
-        0xC5, 0x3A, 0xF9, 0xE8
-};
-
-#define C29 NULL
-#define C29_len 0
-#define A29 NULL
-#define A29_len 0
-
-static uint8_t K30[] = {
-        0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
-        0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08
-};
-static uint8_t IV30[] = {
-        0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
-        0xde, 0xca, 0xf8, 0x88
-};
-static uint8_t P30[] = {
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10
-};
-static uint8_t T30[] =  {
-        0x4C, 0x0C, 0x4F, 0x47, 0x2D, 0x78, 0xF6, 0xD8,
-        0x03, 0x53, 0x20, 0x2F, 0x1A, 0xDF, 0x90, 0xD0
-};
-
-#define C30 NULL
-#define C30_len 0
-#define A30 NULL
-#define A30_len 0
-
-static uint8_t K31[] = {
-        0xaa, 0x74, 0x0a, 0xbf, 0xad, 0xcd, 0xa7, 0x79,
-        0x22, 0x0d, 0x3b, 0x40, 0x6c, 0x5d, 0x7e, 0xc0,
-        0x9a, 0x77, 0xfe, 0x9d, 0x94, 0x10, 0x45, 0x39,
-};
-static uint8_t IV31[] = {
-        0xab, 0x22, 0x65, 0xb4, 0xc1, 0x68, 0x95,
-        0x55, 0x61, 0xf0, 0x43, 0x15
-};
-static uint8_t P31[] = {
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-};
-static uint8_t T31[] =  {
-        0xCF, 0x82, 0x80, 0x64, 0x02, 0x46, 0xF4, 0xFB,
-        0x33, 0xAE, 0x1D, 0x90, 0xEA, 0x48, 0x83, 0xDB
-};
-
-#define C31 NULL
-#define C31_len 0
-#define A31 NULL
-#define A31_len 0
-
-static uint8_t K32[] = {
-        0xb5, 0x48, 0xe4, 0x93, 0x4f, 0x5c, 0x64, 0xd3,
-        0xc0, 0xf0, 0xb7, 0x8f, 0x7b, 0x4d, 0x88, 0x24,
-        0xaa, 0xc4, 0x6b, 0x3c, 0x8d, 0x2c, 0xc3, 0x5e,
-        0xe4, 0xbf, 0xb2, 0x54, 0xe4, 0xfc, 0xba, 0xf7,
-};
-static uint8_t IV32[] = {
-        0x2e, 0xed, 0xe1, 0xdc, 0x64, 0x47, 0xc7,
-        0xaf, 0xc4, 0x41, 0x53, 0x58,
-};
-static uint8_t P32[] = {
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01
-};
-static uint8_t T32[] =  {
-        0x77, 0x46, 0x0D, 0x6F, 0xB1, 0x87, 0xDB, 0xA9,
-        0x46, 0xAD, 0xCD, 0xFB, 0xB7, 0xF9, 0x13, 0xA1
-};
-
-#define C32 NULL
-#define C32_len 0
-#define A32 NULL
-#define A32_len 0
-
 static const struct gcm_ctr_vector gcm_vectors[] = {
 	/*
          * field order {K, Klen, IV, IVlen, A, Alen, P, Plen, C, T, Tlen};
@@ -1303,13 +1171,6 @@ static const struct gcm_ctr_vector ghash_vectors[] = {
         ghash_vector(33)
 };
 
-static const struct gcm_ctr_vector gmac_vectors[] = {
-	vector(29),
-	vector(30),
-	vector(31),
-	vector(32),
-};
-
 typedef int (*gcm_enc_dec_fn_t)(IMB_MGR *, const struct gcm_key_data *,
                                 struct gcm_context_data *,
                                 uint8_t *, const uint8_t *, uint64_t,
@@ -2680,190 +2541,6 @@ test_ghash(struct test_suite_context *ts, const int use_job_api)
         }
 }
 
-static void
-aes_gmac_job(IMB_MGR *mb_mgr,
-             const uint8_t *k,
-             struct gcm_key_data *gmac_key,
-             const uint64_t key_len,
-             const uint8_t *in, const uint64_t len,
-             const uint8_t *iv, const uint64_t iv_len,
-             uint8_t *auth_tag, const uint64_t auth_tag_len)
-{
-        IMB_JOB *job;
-
-        job = IMB_GET_NEXT_JOB(mb_mgr);
-        if (!job) {
-                fprintf(stderr, "failed to get job\n");
-                return;
-        }
-
-        if (key_len == 16) {
-                IMB_AES128_GCM_PRE(mb_mgr, k, gmac_key);
-                job->hash_alg = IMB_AUTH_AES_GMAC_128;
-        } else if (key_len == 24) {
-                IMB_AES192_GCM_PRE(mb_mgr, k, gmac_key);
-                job->hash_alg = IMB_AUTH_AES_GMAC_192;
-        } else { /* key_len == 32 */
-                IMB_AES256_GCM_PRE(mb_mgr, k, gmac_key);
-                job->hash_alg = IMB_AUTH_AES_GMAC_256;
-        }
-
-        job->cipher_mode = IMB_CIPHER_NULL;
-        job->u.GMAC._key = gmac_key;
-        job->u.GMAC._iv = iv;
-        job->u.GMAC.iv_len_in_bytes = iv_len;
-        job->src = in;
-        job->msg_len_to_hash_in_bytes = len;
-        job->hash_start_src_offset_in_bytes = UINT64_C(0);
-        job->auth_tag_output                  = auth_tag;
-        job->auth_tag_output_len_in_bytes     = auth_tag_len;
-
-        job = IMB_SUBMIT_JOB(mb_mgr);
-        while (job) {
-                if (job->status != IMB_STATUS_COMPLETED)
-                        fprintf(stderr, "failed job, status:%d\n", job->status);
-                job = IMB_GET_COMPLETED_JOB(mb_mgr);
-        }
-        while ((job = IMB_FLUSH_JOB(mb_mgr)) != NULL) {
-                if (job->status != IMB_STATUS_COMPLETED)
-                        fprintf(stderr, "failed job, status:%d\n", job->status);
-        }
-}
-
-#define MAX_SEG_SIZE 64
-static void
-test_gmac_vector(const struct gcm_ctr_vector *vector,
-                 const uint64_t seg_size,
-                 const unsigned job_api,
-                 struct test_suite_context *ts128,
-                 struct test_suite_context *ts192,
-                 struct test_suite_context *ts256)
-{
-        struct gcm_key_data key;
-        struct gcm_context_data ctx;
-        const uint8_t *iv = vector->IV;
-        const uint64_t iv_len = vector->IVlen;
-        const uint64_t nb_segs = (vector->Plen / seg_size);
-        const uint64_t last_partial_seg = (vector->Plen % seg_size);
-        const uint8_t *in_ptr = vector->P;
-        uint8_t T_test[16];
-        struct test_suite_context *ts = ts128;
-
-        if (vector->Klen ==  IMB_KEY_192_BYTES)
-                ts = ts192;
-
-        if (vector->Klen ==  IMB_KEY_256_BYTES)
-                ts = ts256;
-
-        memset(&key, 0, sizeof(struct gcm_key_data));
-        if (job_api) {
-                aes_gmac_job(p_gcm_mgr, vector->K, &key, vector->Klen, in_ptr,
-                             seg_size, iv, iv_len, T_test, vector->Tlen);
-        } else {
-                uint8_t in_seg[MAX_SEG_SIZE];
-                uint32_t i;
-
-                switch (vector->Klen) {
-                case IMB_KEY_128_BYTES:
-                        IMB_AES128_GCM_PRE(p_gcm_mgr, vector->K, &key);
-                        IMB_AES128_GMAC_INIT(p_gcm_mgr, &key, &ctx, iv, iv_len);
-                        in_ptr = vector->P;
-                        for (i = 0; i < nb_segs; i++) {
-                                memcpy(in_seg, in_ptr, seg_size);
-                                IMB_AES128_GMAC_UPDATE(p_gcm_mgr, &key, &ctx,
-                                                       in_seg,
-                                                       seg_size);
-                                in_ptr += seg_size;
-                        }
-
-                        if (last_partial_seg != 0) {
-                                memcpy(in_seg, in_ptr, last_partial_seg);
-                                IMB_AES128_GMAC_UPDATE(p_gcm_mgr, &key, &ctx,
-                                                       in_seg,
-                                                       last_partial_seg);
-                        }
-
-                        IMB_AES128_GMAC_FINALIZE(p_gcm_mgr, &key, &ctx, T_test,
-                                                 vector->Tlen);
-                        break;
-                case IMB_KEY_192_BYTES:
-                        IMB_AES192_GCM_PRE(p_gcm_mgr, vector->K, &key);
-                        IMB_AES192_GMAC_INIT(p_gcm_mgr, &key, &ctx, iv, iv_len);
-                        in_ptr = vector->P;
-                        for (i = 0; i < nb_segs; i++) {
-                                memcpy(in_seg, in_ptr, seg_size);
-                                IMB_AES192_GMAC_UPDATE(p_gcm_mgr, &key, &ctx,
-                                                       in_seg,
-                                                       seg_size);
-                                in_ptr += seg_size;
-                        }
-
-                        if (last_partial_seg != 0) {
-                                memcpy(in_seg, in_ptr, last_partial_seg);
-                                IMB_AES192_GMAC_UPDATE(p_gcm_mgr, &key, &ctx,
-                                                       in_seg,
-                                                       last_partial_seg);
-                        }
-
-                        IMB_AES192_GMAC_FINALIZE(p_gcm_mgr, &key, &ctx, T_test,
-                                                 vector->Tlen);
-                        break;
-                case IMB_KEY_256_BYTES:
-                default:
-                        IMB_AES256_GCM_PRE(p_gcm_mgr, vector->K, &key);
-                        IMB_AES256_GMAC_INIT(p_gcm_mgr, &key, &ctx, iv, iv_len);
-                        in_ptr = vector->P;
-                        for (i = 0; i < nb_segs; i++) {
-                                memcpy(in_seg, in_ptr, seg_size);
-                                IMB_AES256_GMAC_UPDATE(p_gcm_mgr, &key, &ctx,
-                                                       in_seg,
-                                                       seg_size);
-                                in_ptr += seg_size;
-                        }
-
-                        if (last_partial_seg != 0) {
-                                memcpy(in_seg, in_ptr, last_partial_seg);
-                                IMB_AES256_GMAC_UPDATE(p_gcm_mgr, &key, &ctx,
-                                                       in_seg,
-                                                       last_partial_seg);
-                        }
-
-                        IMB_AES256_GMAC_FINALIZE(p_gcm_mgr, &key, &ctx, T_test,
-                                                 vector->Tlen);
-                        break;
-                }
-        }
-
-        if (check_data(T_test, vector->T, vector->Tlen, "generated tag (T)"))
-                test_suite_update(ts, 0, 1);
-        else
-                test_suite_update(ts, 1, 0);
-}
-
-static void
-test_gmac(struct test_suite_context *ts128,
-          struct test_suite_context *ts192,
-          struct test_suite_context *ts256)
-{
-	const int vectors_cnt = DIM(gmac_vectors);
-	int vect;
-
-	printf("GMAC test vectors:\n");
-	for (vect = 0; vect < vectors_cnt; vect++) {
-                const struct gcm_ctr_vector *vector = &gmac_vectors[vect];
-                uint64_t seg_size;
-
-                /* Using direct API, which allows SGL */
-                for (seg_size = 1; seg_size <= MAX_SEG_SIZE; seg_size++)
-                        test_gmac_vector(vector, seg_size, 0,
-                                         ts128, ts192, ts256);
-
-                /* Using job API */
-                test_gmac_vector(vector, vector->Plen, 1,
-                                 ts128, ts192, ts256);
-        }
-}
-
 static void
 test_single_job_sgl(struct IMB_MGR *mb_mgr,
                     struct test_suite_context *ctx,
@@ -3318,14 +2995,6 @@ int gcm_test(IMB_MGR *p_mgr)
         errors += test_suite_end(&ts192);
         errors += test_suite_end(&ts256);
 
-        test_suite_start(&ts128, "AES-GMAC-128");
-        test_suite_start(&ts192, "AES-GMAC-192");
-        test_suite_start(&ts256, "AES-GMAC-256");
-	test_gmac(&ts128, &ts192, &ts256);
-        errors += test_suite_end(&ts128);
-        errors += test_suite_end(&ts192);
-        errors += test_suite_end(&ts256);
-
         test_suite_start(&ts128, "GHASH");
         test_ghash(&ts128, 0);
         test_ghash(&ts128, 1);
diff --git a/test/kat-app/gmac_test.c b/test/kat-app/gmac_test.c
new file mode 100644
index 00000000..4fb7522e
--- /dev/null
+++ b/test/kat-app/gmac_test.c
@@ -0,0 +1,402 @@
+/**********************************************************************
+  Copyright(c) 2023 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>		/* for memcmp() */
+
+#include <intel-ipsec-mb.h>
+#include "gcm_ctr_vectors_test.h"
+#include "utils.h"
+
+int gmac_test(struct IMB_MGR *mb_mgr);
+
+/*
+ * GMAC vectors
+ */
+static uint8_t K29[] = {
+        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F
+};
+static uint8_t IV29[] = {
+        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+        0x08, 0x09, 0x0A, 0x0B
+};
+static uint8_t P29[] = {
+        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
+        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
+        0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
+        0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
+        0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
+};
+static uint8_t T29[] =  {
+        0xC5, 0x3A, 0xF9, 0xE8
+};
+
+#define C29 NULL
+#define C29_len 0
+#define A29 NULL
+#define A29_len 0
+
+static uint8_t K30[] = {
+        0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
+        0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08
+};
+static uint8_t IV30[] = {
+        0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
+        0xde, 0xca, 0xf8, 0x88
+};
+static uint8_t P30[] = {
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10
+};
+static uint8_t T30[] =  {
+        0x4C, 0x0C, 0x4F, 0x47, 0x2D, 0x78, 0xF6, 0xD8,
+        0x03, 0x53, 0x20, 0x2F, 0x1A, 0xDF, 0x90, 0xD0
+};
+
+#define C30 NULL
+#define C30_len 0
+#define A30 NULL
+#define A30_len 0
+
+static uint8_t K31[] = {
+        0xaa, 0x74, 0x0a, 0xbf, 0xad, 0xcd, 0xa7, 0x79,
+        0x22, 0x0d, 0x3b, 0x40, 0x6c, 0x5d, 0x7e, 0xc0,
+        0x9a, 0x77, 0xfe, 0x9d, 0x94, 0x10, 0x45, 0x39,
+};
+static uint8_t IV31[] = {
+        0xab, 0x22, 0x65, 0xb4, 0xc1, 0x68, 0x95,
+        0x55, 0x61, 0xf0, 0x43, 0x15
+};
+static uint8_t P31[] = {
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+};
+static uint8_t T31[] =  {
+        0xCF, 0x82, 0x80, 0x64, 0x02, 0x46, 0xF4, 0xFB,
+        0x33, 0xAE, 0x1D, 0x90, 0xEA, 0x48, 0x83, 0xDB
+};
+
+#define C31 NULL
+#define C31_len 0
+#define A31 NULL
+#define A31_len 0
+
+static uint8_t K32[] = {
+        0xb5, 0x48, 0xe4, 0x93, 0x4f, 0x5c, 0x64, 0xd3,
+        0xc0, 0xf0, 0xb7, 0x8f, 0x7b, 0x4d, 0x88, 0x24,
+        0xaa, 0xc4, 0x6b, 0x3c, 0x8d, 0x2c, 0xc3, 0x5e,
+        0xe4, 0xbf, 0xb2, 0x54, 0xe4, 0xfc, 0xba, 0xf7,
+};
+static uint8_t IV32[] = {
+        0x2e, 0xed, 0xe1, 0xdc, 0x64, 0x47, 0xc7,
+        0xaf, 0xc4, 0x41, 0x53, 0x58,
+};
+static uint8_t P32[] = {
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
+        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
+        0x01
+};
+static uint8_t T32[] =  {
+        0x77, 0x46, 0x0D, 0x6F, 0xB1, 0x87, 0xDB, 0xA9,
+        0x46, 0xAD, 0xCD, 0xFB, 0xB7, 0xF9, 0x13, 0xA1
+};
+
+#define C32 NULL
+#define C32_len 0
+#define A32 NULL
+#define A32_len 0
+
+static const struct gcm_ctr_vector gmac_vectors[] = {
+	vector(29),
+	vector(30),
+	vector(31),
+	vector(32),
+};
+
+static int check_data(const uint8_t *test, const uint8_t *expected,
+                      uint64_t len, const char *data_name)
+{
+	int mismatch;
+	int is_error = 0;
+
+        if (len == 0)
+                return is_error;
+
+        if (test == NULL || expected == NULL || data_name == NULL)
+                return 1;
+
+	mismatch = memcmp(test, expected, len);
+	if (mismatch) {
+                uint64_t a;
+
+		is_error = 1;
+		printf("  expected results don't match %s \t\t", data_name);
+                for (a = 0; a < len; a++) {
+                        if (test[a] != expected[a]) {
+                                printf(" '%x' != '%x' at %llx of %llx\n",
+                                       test[a], expected[a],
+                                       (unsigned long long) a,
+                                       (unsigned long long) len);
+                                break;
+                        }
+                }
+	}
+	return is_error;
+}
+
+static void
+aes_gmac_job(IMB_MGR *mb_mgr,
+             const uint8_t *k,
+             struct gcm_key_data *gmac_key,
+             const uint64_t key_len,
+             const uint8_t *in, const uint64_t len,
+             const uint8_t *iv, const uint64_t iv_len,
+             uint8_t *auth_tag, const uint64_t auth_tag_len)
+{
+        IMB_JOB *job;
+
+        job = IMB_GET_NEXT_JOB(mb_mgr);
+        if (!job) {
+                fprintf(stderr, "failed to get job\n");
+                return;
+        }
+
+        if (key_len == 16) {
+                IMB_AES128_GCM_PRE(mb_mgr, k, gmac_key);
+                job->hash_alg = IMB_AUTH_AES_GMAC_128;
+        } else if (key_len == 24) {
+                IMB_AES192_GCM_PRE(mb_mgr, k, gmac_key);
+                job->hash_alg = IMB_AUTH_AES_GMAC_192;
+        } else { /* key_len == 32 */
+                IMB_AES256_GCM_PRE(mb_mgr, k, gmac_key);
+                job->hash_alg = IMB_AUTH_AES_GMAC_256;
+        }
+
+        job->cipher_mode = IMB_CIPHER_NULL;
+        job->u.GMAC._key = gmac_key;
+        job->u.GMAC._iv = iv;
+        job->u.GMAC.iv_len_in_bytes = iv_len;
+        job->src = in;
+        job->msg_len_to_hash_in_bytes = len;
+        job->hash_start_src_offset_in_bytes = UINT64_C(0);
+        job->auth_tag_output                  = auth_tag;
+        job->auth_tag_output_len_in_bytes     = auth_tag_len;
+
+        job = IMB_SUBMIT_JOB(mb_mgr);
+        while (job) {
+                if (job->status != IMB_STATUS_COMPLETED)
+                        fprintf(stderr, "failed job, status:%d\n", job->status);
+                job = IMB_GET_COMPLETED_JOB(mb_mgr);
+        }
+        while ((job = IMB_FLUSH_JOB(mb_mgr)) != NULL) {
+                if (job->status != IMB_STATUS_COMPLETED)
+                        fprintf(stderr, "failed job, status:%d\n", job->status);
+        }
+}
+
+#define MAX_SEG_SIZE 64
+static void
+gmac_test_vector(IMB_MGR *mb_mgr,
+                 const struct gcm_ctr_vector *vector,
+                 const uint64_t seg_size,
+                 const unsigned job_api,
+                 struct test_suite_context *ts128,
+                 struct test_suite_context *ts192,
+                 struct test_suite_context *ts256)
+{
+        struct gcm_key_data key;
+        struct gcm_context_data ctx;
+        const uint8_t *iv = vector->IV;
+        const uint64_t iv_len = vector->IVlen;
+        const uint64_t nb_segs = (vector->Plen / seg_size);
+        const uint64_t last_partial_seg = (vector->Plen % seg_size);
+        const uint8_t *in_ptr = vector->P;
+        uint8_t T_test[16];
+        struct test_suite_context *ts = ts128;
+
+        if (vector->Klen ==  IMB_KEY_192_BYTES)
+                ts = ts192;
+
+        if (vector->Klen ==  IMB_KEY_256_BYTES)
+                ts = ts256;
+
+        memset(&key, 0, sizeof(struct gcm_key_data));
+        if (job_api) {
+                aes_gmac_job(mb_mgr, vector->K, &key, vector->Klen, in_ptr,
+                             seg_size, iv, iv_len, T_test, vector->Tlen);
+        } else {
+                uint8_t in_seg[MAX_SEG_SIZE];
+                uint32_t i;
+
+                switch (vector->Klen) {
+                case IMB_KEY_128_BYTES:
+                        IMB_AES128_GCM_PRE(mb_mgr, vector->K, &key);
+                        IMB_AES128_GMAC_INIT(mb_mgr, &key, &ctx, iv, iv_len);
+                        in_ptr = vector->P;
+                        for (i = 0; i < nb_segs; i++) {
+                                memcpy(in_seg, in_ptr, seg_size);
+                                IMB_AES128_GMAC_UPDATE(mb_mgr, &key, &ctx,
+                                                       in_seg,
+                                                       seg_size);
+                                in_ptr += seg_size;
+                        }
+
+                        if (last_partial_seg != 0) {
+                                memcpy(in_seg, in_ptr, last_partial_seg);
+                                IMB_AES128_GMAC_UPDATE(mb_mgr, &key, &ctx,
+                                                       in_seg,
+                                                       last_partial_seg);
+                        }
+
+                        IMB_AES128_GMAC_FINALIZE(mb_mgr, &key, &ctx, T_test,
+                                                 vector->Tlen);
+                        break;
+                case IMB_KEY_192_BYTES:
+                        IMB_AES192_GCM_PRE(mb_mgr, vector->K, &key);
+                        IMB_AES192_GMAC_INIT(mb_mgr, &key, &ctx, iv, iv_len);
+                        in_ptr = vector->P;
+                        for (i = 0; i < nb_segs; i++) {
+                                memcpy(in_seg, in_ptr, seg_size);
+                                IMB_AES192_GMAC_UPDATE(mb_mgr, &key, &ctx,
+                                                       in_seg,
+                                                       seg_size);
+                                in_ptr += seg_size;
+                        }
+
+                        if (last_partial_seg != 0) {
+                                memcpy(in_seg, in_ptr, last_partial_seg);
+                                IMB_AES192_GMAC_UPDATE(mb_mgr, &key, &ctx,
+                                                       in_seg,
+                                                       last_partial_seg);
+                        }
+
+                        IMB_AES192_GMAC_FINALIZE(mb_mgr, &key, &ctx, T_test,
+                                                 vector->Tlen);
+                        break;
+                case IMB_KEY_256_BYTES:
+                default:
+                        IMB_AES256_GCM_PRE(mb_mgr, vector->K, &key);
+                        IMB_AES256_GMAC_INIT(mb_mgr, &key, &ctx, iv, iv_len);
+                        in_ptr = vector->P;
+                        for (i = 0; i < nb_segs; i++) {
+                                memcpy(in_seg, in_ptr, seg_size);
+                                IMB_AES256_GMAC_UPDATE(mb_mgr, &key, &ctx,
+                                                       in_seg,
+                                                       seg_size);
+                                in_ptr += seg_size;
+                        }
+
+                        if (last_partial_seg != 0) {
+                                memcpy(in_seg, in_ptr, last_partial_seg);
+                                IMB_AES256_GMAC_UPDATE(mb_mgr, &key, &ctx,
+                                                       in_seg,
+                                                       last_partial_seg);
+                        }
+
+                        IMB_AES256_GMAC_FINALIZE(mb_mgr, &key, &ctx, T_test,
+                                                 vector->Tlen);
+                        break;
+                }
+        }
+
+        if (check_data(T_test, vector->T, vector->Tlen, "generated tag (T)"))
+                test_suite_update(ts, 0, 1);
+        else
+                test_suite_update(ts, 1, 0);
+}
+
+int gmac_test(IMB_MGR *mb_mgr)
+{
+        struct test_suite_context ts128, ts192, ts256;
+	int errors = 0;
+	const int vectors_cnt = DIM(gmac_vectors);
+	int vect;
+
+        test_suite_start(&ts128, "AES-GMAC-128");
+        test_suite_start(&ts192, "AES-GMAC-192");
+        test_suite_start(&ts256, "AES-GMAC-256");
+
+	printf("GMAC test vectors:\n");
+	for (vect = 0; vect < vectors_cnt; vect++) {
+                const struct gcm_ctr_vector *vector = &gmac_vectors[vect];
+                uint64_t seg_size;
+
+                /* Using direct API, which allows SGL */
+                for (seg_size = 1; seg_size <= MAX_SEG_SIZE; seg_size++)
+                        gmac_test_vector(mb_mgr, vector, seg_size, 0,
+                                         &ts128, &ts192, &ts256);
+
+                /* Using job API */
+                gmac_test_vector(mb_mgr, vector, vector->Plen, 1,
+                                 &ts128, &ts192, &ts256);
+        }
+        errors += test_suite_end(&ts128);
+        errors += test_suite_end(&ts192);
+        errors += test_suite_end(&ts256);
+
+        return errors;
+}
diff --git a/test/kat-app/main.c b/test/kat-app/main.c
index a28d8e94..fdbfdc55 100644
--- a/test/kat-app/main.c
+++ b/test/kat-app/main.c
@@ -63,6 +63,7 @@ extern int null_test(struct IMB_MGR *mb_mgr);
 extern int snow_v_test(struct IMB_MGR *mb_mgr);
 extern int direct_api_param_test(struct IMB_MGR *mb_mgr);
 extern int quic_ecb_test(struct IMB_MGR *mb_mgr);
+extern int gmac_test(struct IMB_MGR *mb_mgr);
 
 typedef int (*imb_test_t)(struct IMB_MGR *mb_mgr);
 
@@ -111,6 +112,11 @@ struct imb_test tests[] = {
                 .fn = gcm_test,
                 .enabled = 1
         },
+        {
+                .str = "GMAC",
+                .fn = gmac_test,
+                .enabled = 1
+        },
         {
                 .str = "CUSTOMOP",
                 .fn = customop_test,
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index 2f38d3c7..0bba4daf 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
-- 
GitLab


From eb81bd8eec5b1af5f1808c93a105a9804df592fe Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Fri, 5 May 2023 15:00:01 +0100
Subject: [PATCH 247/332] test: [GMAC] Unify Test Vectors

---
 test/kat-app/CMakeLists.txt   |   1 +
 test/kat-app/Makefile         |   2 +-
 test/kat-app/gmac_test.c      | 194 +++++-----------------------------
 test/kat-app/gmac_test.json.c |  78 ++++++++++++++
 test/kat-app/win_x64.mak      |   2 +-
 5 files changed, 109 insertions(+), 168 deletions(-)
 create mode 100644 test/kat-app/gmac_test.json.c

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 6e867522..5971003b 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -81,6 +81,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha384.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha512.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_md5.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/gmac_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
 )
 
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index 6e6efc3a..926069a2 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -38,7 +38,7 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
 	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c hmac_sha512.json.c \
-	hmac_md5.json.c \
+	hmac_md5.json.c gmac_test.json.c \
 	gmac_test.c
 OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
diff --git a/test/kat-app/gmac_test.c b/test/kat-app/gmac_test.c
index 4fb7522e..74ed890d 100644
--- a/test/kat-app/gmac_test.c
+++ b/test/kat-app/gmac_test.c
@@ -33,149 +33,12 @@
 #include <string.h>		/* for memcmp() */
 
 #include <intel-ipsec-mb.h>
-#include "gcm_ctr_vectors_test.h"
 #include "utils.h"
+#include "mac_test.h"
 
 int gmac_test(struct IMB_MGR *mb_mgr);
 
-/*
- * GMAC vectors
- */
-static uint8_t K29[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F
-};
-static uint8_t IV29[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0A, 0x0B
-};
-static uint8_t P29[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
-        0x20, 0x21, 0x22, 0x23, 0x24, 0x25, 0x26, 0x27,
-        0x28, 0x29, 0x2a, 0x2b, 0x2c, 0x2d, 0x2e, 0x2f,
-        0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37,
-        0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
-};
-static uint8_t T29[] =  {
-        0xC5, 0x3A, 0xF9, 0xE8
-};
-
-#define C29 NULL
-#define C29_len 0
-#define A29 NULL
-#define A29_len 0
-
-static uint8_t K30[] = {
-        0xfe, 0xff, 0xe9, 0x92, 0x86, 0x65, 0x73, 0x1c,
-        0x6d, 0x6a, 0x8f, 0x94, 0x67, 0x30, 0x83, 0x08
-};
-static uint8_t IV30[] = {
-        0xca, 0xfe, 0xba, 0xbe, 0xfa, 0xce, 0xdb, 0xad,
-        0xde, 0xca, 0xf8, 0x88
-};
-static uint8_t P30[] = {
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10
-};
-static uint8_t T30[] =  {
-        0x4C, 0x0C, 0x4F, 0x47, 0x2D, 0x78, 0xF6, 0xD8,
-        0x03, 0x53, 0x20, 0x2F, 0x1A, 0xDF, 0x90, 0xD0
-};
-
-#define C30 NULL
-#define C30_len 0
-#define A30 NULL
-#define A30_len 0
-
-static uint8_t K31[] = {
-        0xaa, 0x74, 0x0a, 0xbf, 0xad, 0xcd, 0xa7, 0x79,
-        0x22, 0x0d, 0x3b, 0x40, 0x6c, 0x5d, 0x7e, 0xc0,
-        0x9a, 0x77, 0xfe, 0x9d, 0x94, 0x10, 0x45, 0x39,
-};
-static uint8_t IV31[] = {
-        0xab, 0x22, 0x65, 0xb4, 0xc1, 0x68, 0x95,
-        0x55, 0x61, 0xf0, 0x43, 0x15
-};
-static uint8_t P31[] = {
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-};
-static uint8_t T31[] =  {
-        0xCF, 0x82, 0x80, 0x64, 0x02, 0x46, 0xF4, 0xFB,
-        0x33, 0xAE, 0x1D, 0x90, 0xEA, 0x48, 0x83, 0xDB
-};
-
-#define C31 NULL
-#define C31_len 0
-#define A31 NULL
-#define A31_len 0
-
-static uint8_t K32[] = {
-        0xb5, 0x48, 0xe4, 0x93, 0x4f, 0x5c, 0x64, 0xd3,
-        0xc0, 0xf0, 0xb7, 0x8f, 0x7b, 0x4d, 0x88, 0x24,
-        0xaa, 0xc4, 0x6b, 0x3c, 0x8d, 0x2c, 0xc3, 0x5e,
-        0xe4, 0xbf, 0xb2, 0x54, 0xe4, 0xfc, 0xba, 0xf7,
-};
-static uint8_t IV32[] = {
-        0x2e, 0xed, 0xe1, 0xdc, 0x64, 0x47, 0xc7,
-        0xaf, 0xc4, 0x41, 0x53, 0x58,
-};
-static uint8_t P32[] = {
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08,
-        0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F, 0x10,
-        0x01
-};
-static uint8_t T32[] =  {
-        0x77, 0x46, 0x0D, 0x6F, 0xB1, 0x87, 0xDB, 0xA9,
-        0x46, 0xAD, 0xCD, 0xFB, 0xB7, 0xF9, 0x13, 0xA1
-};
-
-#define C32 NULL
-#define C32_len 0
-#define A32 NULL
-#define A32_len 0
-
-static const struct gcm_ctr_vector gmac_vectors[] = {
-	vector(29),
-	vector(30),
-	vector(31),
-	vector(32),
-};
+extern const struct mac_test gmac_test_kat_json[];
 
 static int check_data(const uint8_t *test, const uint8_t *expected,
                       uint64_t len, const char *data_name)
@@ -261,7 +124,7 @@ aes_gmac_job(IMB_MGR *mb_mgr,
 #define MAX_SEG_SIZE 64
 static void
 gmac_test_vector(IMB_MGR *mb_mgr,
-                 const struct gcm_ctr_vector *vector,
+                 const struct mac_test *vector,
                  const uint64_t seg_size,
                  const unsigned job_api,
                  struct test_suite_context *ts128,
@@ -270,33 +133,33 @@ gmac_test_vector(IMB_MGR *mb_mgr,
 {
         struct gcm_key_data key;
         struct gcm_context_data ctx;
-        const uint8_t *iv = vector->IV;
-        const uint64_t iv_len = vector->IVlen;
-        const uint64_t nb_segs = (vector->Plen / seg_size);
-        const uint64_t last_partial_seg = (vector->Plen % seg_size);
-        const uint8_t *in_ptr = vector->P;
+        const uint8_t *iv = (const void *) vector->iv;
+        const uint64_t iv_len = vector->ivSize;
+        const uint64_t nb_segs = ((vector->msgSize / 8) / seg_size);
+        const uint64_t last_partial_seg = ((vector->msgSize / 8) % seg_size);
+        const uint8_t *in_ptr = (const void *) vector->msg;
         uint8_t T_test[16];
         struct test_suite_context *ts = ts128;
 
-        if (vector->Klen ==  IMB_KEY_192_BYTES)
+        if (vector->keySize ==  IMB_KEY_192_BYTES)
                 ts = ts192;
 
-        if (vector->Klen ==  IMB_KEY_256_BYTES)
+        if (vector->keySize ==  IMB_KEY_256_BYTES)
                 ts = ts256;
 
         memset(&key, 0, sizeof(struct gcm_key_data));
         if (job_api) {
-                aes_gmac_job(mb_mgr, vector->K, &key, vector->Klen, in_ptr,
-                             seg_size, iv, iv_len, T_test, vector->Tlen);
+                aes_gmac_job(mb_mgr, (const void *) vector->key, &key, vector->keySize, in_ptr,
+                             seg_size, iv, iv_len, T_test, vector->tagSize);
         } else {
                 uint8_t in_seg[MAX_SEG_SIZE];
                 uint32_t i;
 
-                switch (vector->Klen) {
+                switch (vector->keySize) {
                 case IMB_KEY_128_BYTES:
-                        IMB_AES128_GCM_PRE(mb_mgr, vector->K, &key);
+                        IMB_AES128_GCM_PRE(mb_mgr, vector->key, &key);
                         IMB_AES128_GMAC_INIT(mb_mgr, &key, &ctx, iv, iv_len);
-                        in_ptr = vector->P;
+                        in_ptr = (const void *) vector->msg;
                         for (i = 0; i < nb_segs; i++) {
                                 memcpy(in_seg, in_ptr, seg_size);
                                 IMB_AES128_GMAC_UPDATE(mb_mgr, &key, &ctx,
@@ -313,12 +176,12 @@ gmac_test_vector(IMB_MGR *mb_mgr,
                         }
 
                         IMB_AES128_GMAC_FINALIZE(mb_mgr, &key, &ctx, T_test,
-                                                 vector->Tlen);
+                                                 vector->tagSize);
                         break;
                 case IMB_KEY_192_BYTES:
-                        IMB_AES192_GCM_PRE(mb_mgr, vector->K, &key);
+                        IMB_AES192_GCM_PRE(mb_mgr, vector->key, &key);
                         IMB_AES192_GMAC_INIT(mb_mgr, &key, &ctx, iv, iv_len);
-                        in_ptr = vector->P;
+                        in_ptr = (const void *) vector->msg;
                         for (i = 0; i < nb_segs; i++) {
                                 memcpy(in_seg, in_ptr, seg_size);
                                 IMB_AES192_GMAC_UPDATE(mb_mgr, &key, &ctx,
@@ -335,13 +198,13 @@ gmac_test_vector(IMB_MGR *mb_mgr,
                         }
 
                         IMB_AES192_GMAC_FINALIZE(mb_mgr, &key, &ctx, T_test,
-                                                 vector->Tlen);
+                                                 vector->tagSize);
                         break;
                 case IMB_KEY_256_BYTES:
                 default:
-                        IMB_AES256_GCM_PRE(mb_mgr, vector->K, &key);
+                        IMB_AES256_GCM_PRE(mb_mgr, vector->key, &key);
                         IMB_AES256_GMAC_INIT(mb_mgr, &key, &ctx, iv, iv_len);
-                        in_ptr = vector->P;
+                        in_ptr = (const void *) vector->msg;
                         for (i = 0; i < nb_segs; i++) {
                                 memcpy(in_seg, in_ptr, seg_size);
                                 IMB_AES256_GMAC_UPDATE(mb_mgr, &key, &ctx,
@@ -358,12 +221,12 @@ gmac_test_vector(IMB_MGR *mb_mgr,
                         }
 
                         IMB_AES256_GMAC_FINALIZE(mb_mgr, &key, &ctx, T_test,
-                                                 vector->Tlen);
+                                                 vector->tagSize);
                         break;
                 }
         }
 
-        if (check_data(T_test, vector->T, vector->Tlen, "generated tag (T)"))
+        if (check_data(T_test, (const void *) vector->tag, vector->tagSize, "generated tag (T)"))
                 test_suite_update(ts, 0, 1);
         else
                 test_suite_update(ts, 1, 0);
@@ -373,26 +236,25 @@ int gmac_test(IMB_MGR *mb_mgr)
 {
         struct test_suite_context ts128, ts192, ts256;
 	int errors = 0;
-	const int vectors_cnt = DIM(gmac_vectors);
-	int vect;
 
         test_suite_start(&ts128, "AES-GMAC-128");
         test_suite_start(&ts192, "AES-GMAC-192");
         test_suite_start(&ts256, "AES-GMAC-256");
 
 	printf("GMAC test vectors:\n");
-	for (vect = 0; vect < vectors_cnt; vect++) {
-                const struct gcm_ctr_vector *vector = &gmac_vectors[vect];
+        const struct mac_test *vec = gmac_test_kat_json;
+	while (vec->msg != NULL) {
                 uint64_t seg_size;
 
                 /* Using direct API, which allows SGL */
                 for (seg_size = 1; seg_size <= MAX_SEG_SIZE; seg_size++)
-                        gmac_test_vector(mb_mgr, vector, seg_size, 0,
+                        gmac_test_vector(mb_mgr, vec, seg_size, 0,
                                          &ts128, &ts192, &ts256);
 
                 /* Using job API */
-                gmac_test_vector(mb_mgr, vector, vector->Plen, 1,
+                gmac_test_vector(mb_mgr, vec, (vec->msgSize / 8), 1,
                                  &ts128, &ts192, &ts256);
+                vec++;
         }
         errors += test_suite_end(&ts128);
         errors += test_suite_end(&ts192);
diff --git a/test/kat-app/gmac_test.json.c b/test/kat-app/gmac_test.json.c
new file mode 100644
index 00000000..921f086e
--- /dev/null
+++ b/test/kat-app/gmac_test.json.c
@@ -0,0 +1,78 @@
+/**********************************************************************
+  Copyright(c) 2023 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+/* GMAC */
+#include "mac_test.h"
+
+const struct mac_test gmac_test_kat_json[] = {
+    /* Vectors from
+       http://csrc.nist.gov/groups/ST/toolkit/BCM/documents/proposedmodes/gcm/gcm-revised-spec.pdf
+     */
+    {16, 4, 1,
+     "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+     "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11"
+     "\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f\x20\x21\x22\x23"
+     "\x24\x25\x26\x27\x28\x29\x2a\x2b\x2c\x2d\x2e\x2f\x30\x31\x32\x33\x34\x35"
+     "\x36\x37\x38\x39\x3a\x3b\x3c\x3d\x3e\x3f",
+     "\xc5\x3a\xf9\xe8", 1, 512,
+     "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b", 12},
+    {16, 16, 2,
+     "\xfe\xff\xe9\x92\x86\x65\x73\x1c\x6d\x6a\x8f\x94\x67\x30\x83\x08",
+     "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02"
+     "\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02\x03\x04"
+     "\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02\x03\x04\x05\x06"
+     "\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02\x03\x04\x05\x06\x07\x08"
+     "\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a"
+     "\x0b\x0c\x0d\x0e\x0f\x10\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c"
+     "\x0d\x0e\x0f\x10\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e"
+     "\x0f\x10\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10"
+     "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10",
+     "\x4c\x0c\x4f\x47\x2d\x78\xf6\xd8\x03\x53\x20\x2f\x1a\xdf\x90\xd0", 1,
+     1280, "\xca\xfe\xba\xbe\xfa\xce\xdb\xad\xde\xca\xf8\x88", 12},
+    {24, 16, 3,
+     "\xaa\x74\x0a\xbf\xad\xcd\xa7\x79\x22\x0d\x3b\x40\x6c\x5d\x7e\xc0\x9a\x77"
+     "\xfe\x9d\x94\x10\x45\x39",
+     "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02"
+     "\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02\x03\x04"
+     "\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02\x03\x04\x05\x06"
+     "\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02\x03\x04\x05\x06\x07\x08"
+     "\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10",
+     "\xcf\x82\x80\x64\x02\x46\xf4\xfb\x33\xae\x1d\x90\xea\x48\x83\xdb", 1, 640,
+     "\xab\x22\x65\xb4\xc1\x68\x95\x55\x61\xf0\x43\x15", 12},
+    {32, 16, 4,
+     "\xb5\x48\xe4\x93\x4f\x5c\x64\xd3\xc0\xf0\xb7\x8f\x7b\x4d\x88\x24\xaa\xc4"
+     "\x6b\x3c\x8d\x2c\xc3\x5e\xe4\xbf\xb2\x54\xe4\xfc\xba\xf7",
+     "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02"
+     "\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02\x03\x04"
+     "\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01\x02\x03\x04\x05\x06"
+     "\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x01",
+     "\x77\x46\x0d\x6f\xb1\x87\xdb\xa9\x46\xad\xcd\xfb\xb7\xf9\x13\xa1", 1, 520,
+     "\x2e\xed\xe1\xdc\x64\x47\xc7\xaf\xc4\x41\x53\x58", 12},
+    {0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0}
+};
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index 0bba4daf..57ffc077 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
-- 
GitLab


From a26bc0e3e14bd1bba89b2e8c865727ae8a2ec06f Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 8 May 2023 11:49:00 +0100
Subject: [PATCH 248/332] perf: add support for buffer offset parameter in the
 perf_tool.py

---
 perf/ipsec_perf_tool.py | 23 ++++++++++++++++-------
 1 file changed, 16 insertions(+), 7 deletions(-)

diff --git a/perf/ipsec_perf_tool.py b/perf/ipsec_perf_tool.py
index 27bb3713..5e171355 100755
--- a/perf/ipsec_perf_tool.py
+++ b/perf/ipsec_perf_tool.py
@@ -62,7 +62,7 @@ class Variant:
                  hash_alg=None, aead_alg=None, sizes=None, offset=None,
                  cold_cache=False, shani_off=False, force_job_api=False,
                  unhalted_cycles=False, quick_test=False, smoke_test=False,
-                 imix=None, aad_size=None, job_iter=None, no_time_box=False):
+                 imix=None, aad_size=None, job_iter=None, no_time_box=False, buffer_offset=None):
         """Build perf app command line"""
         global PERF_APP
 
@@ -88,6 +88,7 @@ class Variant:
         self.aad_size = aad_size
         self.job_iter = job_iter
         self.no_time_box = no_time_box
+        self.buffer_offset = buffer_offset
 
         if self.arch is not None:
             self.cmd += ' --arch {}'.format(self.arch)
@@ -152,6 +153,8 @@ class Variant:
         if self.job_iter is not None:
             self.cmd += ' --job-iter {}'.format(self.job_iter)
 
+        if self.buffer_offset is not None:
+            self.cmd += ' --buffer-offset {}'.format(self.buffer_offset)
 
     def run(self):
         """Run perf app and store output"""
@@ -420,6 +423,8 @@ def parse_args():
                         help="number of tests iterations for each job size")
     parser.add_argument("--no-time-box", default=False, action='store_true',
                         help="disables time box feature for single packet size test duration (100ms)")
+    parser.add_argument("--buffer-offset", default=None, type=int,
+                        help="buffer start address offset value 0-15, default 0")
 
     args = parser.parse_args()
 
@@ -458,7 +463,7 @@ def parse_args():
         alg_types, args.job_size, args.cold_cache, args.arch_best, \
         args.shani_off, args.force_job_api, args.unhalted_cycles, \
         args.quick, args.smoke, args.imix, \
-        args.aad_size, args.job_iter, args.no_time_box
+        args.aad_size, args.job_iter, args.no_time_box, args.buffer_offset
 
 
 def run_test(core=None):
@@ -528,7 +533,7 @@ def main():
     # parse command line args
     archs, cores, directions, offset, alg_types, sizes, cold_cache, arch_best, \
         shani_off, force_job_api, unhalted_cycles, quick_test, smoke_test, \
-        imix, aad_size, job_iter, no_time_box = parse_args()
+        imix, aad_size, job_iter, no_time_box, buffer_offset = parse_args()
 
     # validate requested archs are supported
     if arch_best is True:
@@ -579,7 +584,8 @@ def main():
                                        cold_cache=cold_cache, shani_off=shani_off,
                                        force_job_api=force_job_api, unhalted_cycles=unhalted_cycles,
                                        quick_test=quick_test, smoke_test=smoke_test, imix=imix,
-                                       aad_size=aad_size, job_iter=job_iter, no_time_box=no_time_box))
+                                       aad_size=aad_size, job_iter=job_iter, no_time_box=no_time_box,
+				       buffer_offset=buffer_offset))
                     TOTAL_VARIANTS += 1
 
         if 'hash-only' in alg_types:
@@ -590,7 +596,8 @@ def main():
                                    cold_cache=cold_cache, shani_off=shani_off,
                                    force_job_api=force_job_api, unhalted_cycles=unhalted_cycles,
                                    quick_test=quick_test, smoke_test=smoke_test, imix=imix,
-                                   aad_size=aad_size, job_iter=job_iter, no_time_box=no_time_box))
+                                   aad_size=aad_size, job_iter=job_iter, no_time_box=no_time_box,
+			       	   buffer_offset=buffer_offset))
                 TOTAL_VARIANTS += 1
 
         if 'aead-only' in alg_types:
@@ -601,7 +608,8 @@ def main():
                                        cold_cache=cold_cache, shani_off=shani_off,
                                        force_job_api=force_job_api, unhalted_cycles=unhalted_cycles,
                                        quick_test=quick_test, smoke_test=smoke_test, imix=imix,
-                                       aad_size=aad_size, job_iter=job_iter, no_time_box=no_time_box))
+                                       aad_size=aad_size, job_iter=job_iter, no_time_box=no_time_box,
+				       buffer_offset=buffer_offset))
                     TOTAL_VARIANTS += 1
 
         if 'cipher-hash-all' in alg_types:
@@ -615,7 +623,8 @@ def main():
                                            shani_off=shani_off, force_job_api=force_job_api,
                                            unhalted_cycles=unhalted_cycles, quick_test=quick_test,
                                            smoke_test=smoke_test, imix=imix, aad_size=aad_size,
-                                           job_iter=job_iter, no_time_box=no_time_box))
+                                           job_iter=job_iter, no_time_box=no_time_box,
+					   buffer_offset=buffer_offset))
                         TOTAL_VARIANTS += 1
 
     # take starting timestamp
-- 
GitLab


From a84d46c38f4b5613b316d377013ea7b7653b0f4a Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 8 May 2023 16:53:27 +0100
Subject: [PATCH 249/332] perf: always set length fields in the job structure

---
 perf/ipsec_perf.c | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index 201d40d2..27f183be 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -1528,7 +1528,7 @@ get_next_size(const uint32_t index)
 
 static inline void
 set_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys,
-               const uint32_t i, const uint32_t index)
+               const uint32_t i, const uint32_t index, const IMB_JOB *template)
 {
         uint32_t list_idx;
 
@@ -1539,6 +1539,11 @@ set_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys,
 
                 job->msg_len_to_cipher_in_bytes = cipher_size_list[list_idx];
                 job->msg_len_to_hash_in_bytes = hash_size_list[list_idx];
+        } else {
+                job->msg_len_to_hash_in_bytes =
+                        template->msg_len_to_hash_in_bytes;
+                job->msg_len_to_cipher_in_bytes =
+                        template->msg_len_to_cipher_in_bytes;
         }
 
         if (job->hash_alg == IMB_AUTH_PON_CRC_BIP) {
@@ -1605,10 +1610,11 @@ set_sgl_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys,
         /* If IMIX testing is being done, set the buffer size to cipher and hash
          * going through the list of sizes precalculated */
         if (imix_list_count != 0) {
-                uint32_t list_idx = size_idx & (JOB_SIZE_IMIX_LIST - 1);
+                const uint32_t list_idx = size_idx & (JOB_SIZE_IMIX_LIST - 1);
 
                 job->msg_len_to_cipher_in_bytes = cipher_size_list[list_idx];
         }
+
         buf_size = (uint32_t) job->msg_len_to_cipher_in_bytes;
         if (job->cipher_mode == IMB_CIPHER_GCM_SGL) {
                 job->u.GCM.aad = aad;
@@ -2328,7 +2334,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                                            &cp_ctx[i]);
                                 else
                                         set_job_fields(job, p_buffer, p_keys,
-                                                       i, index);
+                                                       i, index, &job_template);
 
                                 index = get_next_index(index);
 
@@ -2507,7 +2513,8 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                                    sgl[0], &gcm_ctx[0],
                                                    &cp_ctx[0]);
                         else
-                                set_job_fields(job, p_buffer, p_keys, i, index);
+                                set_job_fields(job, p_buffer, p_keys, i, index,
+                                               &job_template);
 
                         index = get_next_index(index);
 #ifdef DEBUG
-- 
GitLab


From 5ceabe5b4005898bc9d5b82b0ddbee174409214f Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 8 May 2023 11:40:35 +0100
Subject: [PATCH 250/332] perf: use clang-format for style check

---
 perf/Makefile | 13 ++++++-------
 1 file changed, 6 insertions(+), 7 deletions(-)

diff --git a/perf/Makefile b/perf/Makefile
index b7980e03..7aa198a6 100644
--- a/perf/Makefile
+++ b/perf/Makefile
@@ -119,15 +119,14 @@ clean:
 	-rm -f $(DEPFILES)
 	-rm -f $(EXE)
 
-SOURCES_STYLE := $(foreach infile,$(SOURCES),-f $(infile))
-CHECKPATCH?=checkpatch.pl
+CLANGFORMAT?=clang-format
 .PHONY: style
 style:
-	$(CHECKPATCH) --no-tree --no-signoff --emacs --no-color \
---ignore CODE_INDENT,INITIALISED_STATIC,LEADING_SPACE,SPLIT_STRING,\
-UNSPECIFIED_INT,ARRAY_SIZE,BLOCK_COMMENT_STYLE,GLOBAL_INITIALISERS,\
-COMPLEX_MACRO,SPACING,STORAGE_CLASS,USE_FUNC,NEW_TYPEDEFS,VOLATILE,\
-CONSTANT_COMPARISON $(SOURCES_STYLE)
+	@for file in $(wildcard *.[ch]); do \
+		echo "Checking style $$file"; \
+		$(CLANGFORMAT) -style=file "$$file" | diff "$$file" - | tee /dev/stderr | [ $$(wc -c) -eq 0 ] || \
+		{ echo "ERROR: $$file has style problems"; exit 1; } \
+	done
 
 # cppcheck analysis check
 CPPCHECK ?= cppcheck
-- 
GitLab


From 7f3b300c39d503c81e6888f684701a73642c0eab Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 8 May 2023 11:47:31 +0100
Subject: [PATCH 251/332] update .clang-format to add space after case

---
 .clang-format | 1 +
 1 file changed, 1 insertion(+)

diff --git a/.clang-format b/.clang-format
index b0d723d6..194dba31 100644
--- a/.clang-format
+++ b/.clang-format
@@ -44,3 +44,4 @@ ColumnLimit: 100
 Cpp11BracedListStyle: false
 MaxEmptyLinesToKeep: 1
 ContinuationIndentWidth: 8
+SpaceAfterCStyleCast: true
-- 
GitLab


From e3941c5d9aced707012efd3571c11f6f521af4ea Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 10 May 2023 10:22:17 +0100
Subject: [PATCH 252/332] perf: format source files with clang-format

---
 perf/ipsec_perf.c | 1800 ++++++++++++++++++---------------------------
 perf/misc.h       |    3 +-
 perf/msr.c        |   37 +-
 perf/msr.h        |   23 +-
 4 files changed, 742 insertions(+), 1121 deletions(-)

diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index 27f183be..af48887c 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -59,7 +59,7 @@
 #define __forceinline static inline __attribute__((always_inline))
 #include <unistd.h>
 #include <pthread.h>
-#if defined (__FreeBSD__)
+#if defined(__FreeBSD__)
 #include <sys/cpuset.h>
 typedef cpuset_t cpu_set_t;
 #else
@@ -87,20 +87,19 @@ typedef cpuset_t cpu_set_t;
 /* max offset applied to a buffer - this is to avoid collisions in L1 */
 #define MAX_BUFFER_OFFSET 4096
 /* max value of sha_size_incr */
-#define MAX_SHA_SIZE_INCR  128
+#define MAX_SHA_SIZE_INCR 128
 /* region size for one buffer rounded up to 4K page size */
-#define REGION_SIZE (((JOB_SIZE_TOP + (MAX_BUFFER_OFFSET + \
-                                       MAX_SHA_SIZE_INCR)) + 4095) & (~4095))
+#define REGION_SIZE (((JOB_SIZE_TOP + (MAX_BUFFER_OFFSET + MAX_SHA_SIZE_INCR)) + 4095) & (~4095))
 /* number of test buffers */
 #define NUM_OFFSETS (BUFSIZE / REGION_SIZE)
-#define NUM_RUNS 16
+#define NUM_RUNS    16
 /* maximum number of 128-bit expanded keys */
 #define KEYS_PER_JOB 15
 
-#define AAD_SIZE_MAX JOB_SIZE_TOP
-#define CCM_AAD_SIZE_MAX 46
-#define DEFAULT_GCM_AAD_SIZE 12
-#define DEFAULT_CCM_AAD_SIZE 8
+#define AAD_SIZE_MAX                 JOB_SIZE_TOP
+#define CCM_AAD_SIZE_MAX             46
+#define DEFAULT_GCM_AAD_SIZE         12
+#define DEFAULT_CCM_AAD_SIZE         8
 #define DEFAULT_CHACHA_POLY_AAD_SIZE 12
 #define DEFAULT_SNOW_V_AEAD_AAD_SIZE 16
 
@@ -108,8 +107,8 @@ typedef cpuset_t cpu_set_t;
 #define ITER_SCALE_SHORT 200000
 #define ITER_SCALE_LONG  2000000
 
-#define BITS(x) (sizeof(x) * 8)
-#define DIM(x) (sizeof(x)/sizeof(x[0]))
+#define BITS(x)            (sizeof(x) * 8)
+#define DIM(x)             (sizeof(x) / sizeof(x[0]))
 #define DIV_ROUND_UP(x, y) ((x + y - 1) / y)
 
 #define MAX_NUM_THREADS 16 /* Maximum number of threads that can be created */
@@ -119,23 +118,17 @@ typedef cpuset_t cpu_set_t;
 #define IA32_MSR_CPU_UNHALTED_THREAD 0x30A
 
 #define DEFAULT_BURST_SIZE 32
-#define MAX_BURST_SIZE 256
-
-enum arch_type_e {
-        ARCH_SSE = 0,
-        ARCH_AVX,
-        ARCH_AVX2,
-        ARCH_AVX512,
-        NUM_ARCHS
-};
+#define MAX_BURST_SIZE     256
+
+enum arch_type_e { ARCH_SSE = 0, ARCH_AVX, ARCH_AVX2, ARCH_AVX512, NUM_ARCHS };
 
 /* This enum will be mostly translated to IMB_CIPHER_MODE
  * (make sure to update c_mode_names list in print_times function)  */
 enum test_cipher_mode_e {
         TEST_CBC = 1,
         TEST_CNTR,
-        TEST_CNTR8, /* CNTR with increased buffer by 8 */
-        TEST_CNTR_BITLEN, /* CNTR-BITLEN */
+        TEST_CNTR8,        /* CNTR with increased buffer by 8 */
+        TEST_CNTR_BITLEN,  /* CNTR-BITLEN */
         TEST_CNTR_BITLEN4, /* CNTR-BITLEN with 4 less bits in the last byte */
         TEST_ECB,
         TEST_CBCS_1_9,
@@ -144,7 +137,7 @@ enum test_cipher_mode_e {
         TEST_AESDOCSIS8, /* AES DOCSIS with increased buffer size by 8 */
         TEST_DESDOCSIS,
         TEST_DESDOCSIS4, /* DES DOCSIS with increased buffer size by 4 */
-        TEST_GCM, /* Additional field used by GCM, not translated */
+        TEST_GCM,        /* Additional field used by GCM, not translated */
         TEST_CCM,
         TEST_DES,
         TEST_3DES,
@@ -180,7 +173,7 @@ enum test_hash_alg_e {
         TEST_HASH_CMAC_256,
         TEST_NULL_HASH,
         TEST_DOCSIS_CRC32,
-        TEST_HASH_GCM, /* Additional field used by GCM, not translated */
+        TEST_HASH_GCM,    /* Additional field used by GCM, not translated */
         TEST_CUSTOM_HASH, /* unused */
         TEST_HASH_CCM,
         TEST_PON_CRC_BIP,
@@ -212,279 +205,117 @@ enum test_hash_alg_e {
 
 /* Struct storing cipher parameters */
 struct params_s {
-        IMB_CIPHER_DIRECTION	cipher_dir;
-        enum test_cipher_mode_e	cipher_mode;
-        enum test_hash_alg_e	hash_alg;
-        uint32_t		aes_key_size;
-        uint32_t		size_aes;
-        uint64_t		aad_size;
-        uint32_t		num_sizes;
-        uint32_t                core;
+        IMB_CIPHER_DIRECTION cipher_dir;
+        enum test_cipher_mode_e cipher_mode;
+        enum test_hash_alg_e hash_alg;
+        uint32_t aes_key_size;
+        uint32_t size_aes;
+        uint64_t aad_size;
+        uint32_t num_sizes;
+        uint32_t core;
 };
 
 struct custom_job_params {
         enum test_cipher_mode_e cipher_mode;
-        enum test_hash_alg_e    hash_alg;
-        uint32_t                aes_key_size;
-        IMB_CIPHER_DIRECTION    cipher_dir;
+        enum test_hash_alg_e hash_alg;
+        uint32_t aes_key_size;
+        IMB_CIPHER_DIRECTION cipher_dir;
 };
 
 union params {
-        enum arch_type_e         arch_type;
+        enum arch_type_e arch_type;
         struct custom_job_params job_params;
 };
 
 struct str_value_mapping {
-        const char      *name;
-        union params    values;
+        const char *name;
+        union params values;
 };
 
-const struct str_value_mapping arch_str_map[] = {
-        {.name = "SSE",    .values.arch_type = ARCH_SSE },
-        {.name = "AVX",    .values.arch_type = ARCH_AVX },
-        {.name = "AVX2",   .values.arch_type = ARCH_AVX2 },
-        {.name = "AVX512", .values.arch_type = ARCH_AVX512 }
-};
+const struct str_value_mapping arch_str_map[] = { { .name = "SSE", .values.arch_type = ARCH_SSE },
+                                                  { .name = "AVX", .values.arch_type = ARCH_AVX },
+                                                  { .name = "AVX2", .values.arch_type = ARCH_AVX2 },
+                                                  { .name = "AVX512",
+                                                    .values.arch_type = ARCH_AVX512 } };
 
 const struct str_value_mapping cipher_algo_str_map[] = {
-        {
-                .name = "aes-cbc-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_CBC,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-cbc-192",
-                .values.job_params = {
-                        .cipher_mode = TEST_CBC,
-                        .aes_key_size = IMB_KEY_192_BYTES
-                }
-        },
-        {
-                .name = "aes-cbc-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_CBC,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr-192",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR,
-                        .aes_key_size = IMB_KEY_192_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr8-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR8,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr8-192",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR8,
-                        .aes_key_size = IMB_KEY_192_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr8-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR8,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr-bit-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR_BITLEN,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr-bit-192",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR_BITLEN,
-                        .aes_key_size = IMB_KEY_192_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr-bit-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR_BITLEN,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr-bit4-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR_BITLEN4,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr-bit4-192",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR_BITLEN4,
-                        .aes_key_size = IMB_KEY_192_BYTES
-                }
-        },
-        {
-                .name = "aes-ctr-bit4-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_CNTR_BITLEN4,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "aes-ecb-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_ECB,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-ecb-192",
-                .values.job_params = {
-                        .cipher_mode = TEST_ECB,
-                        .aes_key_size = IMB_KEY_192_BYTES
-                }
-        },
-        {
-                .name = "aes-ecb-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_ECB,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "aes-docsis-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_AESDOCSIS,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-docsis8-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_AESDOCSIS8,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-docsis-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_AESDOCSIS,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "aes-docsis8-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_AESDOCSIS8,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "des-docsis",
-                .values.job_params = {
-                        .cipher_mode = TEST_DESDOCSIS,
-                        .aes_key_size = 8
-                }
-        },
-        {
-                .name = "des-docsis4",
-                .values.job_params = {
-                        .cipher_mode = TEST_DESDOCSIS4,
-                        .aes_key_size = 8
-                }
-        },
-        {
-                .name = "des-cbc",
-                .values.job_params = {
-                        .cipher_mode = TEST_DES,
-                        .aes_key_size = 8
-                }
-        },
-        {
-                .name = "3des-cbc",
-                .values.job_params = {
-                        .cipher_mode = TEST_3DES,
-                        .aes_key_size = 8
-                }
-        },
-        {
-                .name = "zuc-eea3",
-                .values.job_params = {
-                        .cipher_mode = TEST_ZUC_EEA3,
-                        .aes_key_size = 16
-                }
-        },
-        {
-                .name = "zuc-eea3-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_ZUC_EEA3,
-                        .aes_key_size = 32
-                }
-        },
-        {
-                .name = "snow3g-uea2",
-                .values.job_params = {
-                        .cipher_mode = TEST_SNOW3G_UEA2,
-                        .aes_key_size = 16
-                }
-        },
-        {
-                .name = "kasumi-uea1",
-                .values.job_params = {
-                        .cipher_mode = TEST_KASUMI_UEA1,
-                        .aes_key_size = 16
-                }
-        },
-        {
-                .name = "aes-cbcs-1-9",
-                .values.job_params = {
-                        .cipher_mode = TEST_CBCS_1_9,
-                        .aes_key_size = 16
-                }
-        },
-        {
-                .name = "chacha20",
-                .values.job_params = {
-                        .cipher_mode = TEST_CHACHA20,
-                        .aes_key_size = 32
-                }
-        },
-        {
-                .name = "snow-v",
-                .values.job_params = {
-                        .cipher_mode = TEST_SNOW_V,
-                        .aes_key_size = 32
-                }
-        },
-        {
-                .name = "null",
-                .values.job_params = {
-                        .cipher_mode = TEST_NULL_CIPHER,
-                        .aes_key_size = 0
-                }
-        }
+        { .name = "aes-cbc-128",
+          .values.job_params = { .cipher_mode = TEST_CBC, .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-cbc-192",
+          .values.job_params = { .cipher_mode = TEST_CBC, .aes_key_size = IMB_KEY_192_BYTES } },
+        { .name = "aes-cbc-256",
+          .values.job_params = { .cipher_mode = TEST_CBC, .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "aes-ctr-128",
+          .values.job_params = { .cipher_mode = TEST_CNTR, .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-ctr-192",
+          .values.job_params = { .cipher_mode = TEST_CNTR, .aes_key_size = IMB_KEY_192_BYTES } },
+        { .name = "aes-ctr-256",
+          .values.job_params = { .cipher_mode = TEST_CNTR, .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "aes-ctr8-128",
+          .values.job_params = { .cipher_mode = TEST_CNTR8, .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-ctr8-192",
+          .values.job_params = { .cipher_mode = TEST_CNTR8, .aes_key_size = IMB_KEY_192_BYTES } },
+        { .name = "aes-ctr8-256",
+          .values.job_params = { .cipher_mode = TEST_CNTR8, .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "aes-ctr-bit-128",
+          .values.job_params = { .cipher_mode = TEST_CNTR_BITLEN,
+                                 .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-ctr-bit-192",
+          .values.job_params = { .cipher_mode = TEST_CNTR_BITLEN,
+                                 .aes_key_size = IMB_KEY_192_BYTES } },
+        { .name = "aes-ctr-bit-256",
+          .values.job_params = { .cipher_mode = TEST_CNTR_BITLEN,
+                                 .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "aes-ctr-bit4-128",
+          .values.job_params = { .cipher_mode = TEST_CNTR_BITLEN4,
+                                 .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-ctr-bit4-192",
+          .values.job_params = { .cipher_mode = TEST_CNTR_BITLEN4,
+                                 .aes_key_size = IMB_KEY_192_BYTES } },
+        { .name = "aes-ctr-bit4-256",
+          .values.job_params = { .cipher_mode = TEST_CNTR_BITLEN4,
+                                 .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "aes-ecb-128",
+          .values.job_params = { .cipher_mode = TEST_ECB, .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-ecb-192",
+          .values.job_params = { .cipher_mode = TEST_ECB, .aes_key_size = IMB_KEY_192_BYTES } },
+        { .name = "aes-ecb-256",
+          .values.job_params = { .cipher_mode = TEST_ECB, .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "aes-docsis-128",
+          .values.job_params = { .cipher_mode = TEST_AESDOCSIS,
+                                 .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-docsis8-128",
+          .values.job_params = { .cipher_mode = TEST_AESDOCSIS8,
+                                 .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-docsis-256",
+          .values.job_params = { .cipher_mode = TEST_AESDOCSIS,
+                                 .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "aes-docsis8-256",
+          .values.job_params = { .cipher_mode = TEST_AESDOCSIS8,
+                                 .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "des-docsis",
+          .values.job_params = { .cipher_mode = TEST_DESDOCSIS, .aes_key_size = 8 } },
+        { .name = "des-docsis4",
+          .values.job_params = { .cipher_mode = TEST_DESDOCSIS4, .aes_key_size = 8 } },
+        { .name = "des-cbc", .values.job_params = { .cipher_mode = TEST_DES, .aes_key_size = 8 } },
+        { .name = "3des-cbc",
+          .values.job_params = { .cipher_mode = TEST_3DES, .aes_key_size = 8 } },
+        { .name = "zuc-eea3",
+          .values.job_params = { .cipher_mode = TEST_ZUC_EEA3, .aes_key_size = 16 } },
+        { .name = "zuc-eea3-256",
+          .values.job_params = { .cipher_mode = TEST_ZUC_EEA3, .aes_key_size = 32 } },
+        { .name = "snow3g-uea2",
+          .values.job_params = { .cipher_mode = TEST_SNOW3G_UEA2, .aes_key_size = 16 } },
+        { .name = "kasumi-uea1",
+          .values.job_params = { .cipher_mode = TEST_KASUMI_UEA1, .aes_key_size = 16 } },
+        { .name = "aes-cbcs-1-9",
+          .values.job_params = { .cipher_mode = TEST_CBCS_1_9, .aes_key_size = 16 } },
+        { .name = "chacha20",
+          .values.job_params = { .cipher_mode = TEST_CHACHA20, .aes_key_size = 32 } },
+        { .name = "snow-v",
+          .values.job_params = { .cipher_mode = TEST_SNOW_V, .aes_key_size = 32 } },
+        { .name = "null",
+          .values.job_params = { .cipher_mode = TEST_NULL_CIPHER, .aes_key_size = 0 } }
 };
 
 const struct str_value_mapping hash_algo_str_map[] = {
@@ -713,115 +544,63 @@ const struct str_value_mapping hash_algo_str_map[] = {
 };
 
 const struct str_value_mapping aead_algo_str_map[] = {
-        {
-                .name = "aes-gcm-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_GCM,
-                        .hash_alg = TEST_HASH_GCM,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-gcm-192",
-                .values.job_params = {
-                        .cipher_mode = TEST_GCM,
-                        .hash_alg = TEST_HASH_GCM,
-                        .aes_key_size = IMB_KEY_192_BYTES
-                }
-        },
-        {
-                .name = "aes-gcm-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_GCM,
-                        .hash_alg = TEST_HASH_GCM,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "aes-ccm-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_CCM,
-                        .hash_alg = TEST_HASH_CCM,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-ccm-256",
-                .values.job_params = {
-                        .cipher_mode = TEST_CCM,
-                        .hash_alg = TEST_HASH_CCM,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "pon-128",
-                .values.job_params = {
-                        .cipher_mode = TEST_PON_CNTR,
-                        .hash_alg = TEST_PON_CRC_BIP,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "pon-128-no-ctr",
-                .values.job_params = {
-                        .cipher_mode = TEST_PON_NO_CNTR,
-                        .hash_alg = TEST_PON_CRC_BIP,
-                        .aes_key_size = 0
-                }
-        },
-        {
-                .name = "chacha20-poly1305",
-                .values.job_params = {
-                        .cipher_mode = TEST_AEAD_CHACHA20,
-                        .hash_alg = TEST_AEAD_POLY1305,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "aes-docsis-128-crc32",
-                .values.job_params = {
-                        .cipher_mode = TEST_AESDOCSIS,
-                        .hash_alg = TEST_DOCSIS_CRC32,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-                {
-                .name = "aes-docsis8-128-crc32",
-                .values.job_params = {
-                        .cipher_mode = TEST_AESDOCSIS8,
-                        .hash_alg = TEST_DOCSIS_CRC32,
-                        .aes_key_size = IMB_KEY_128_BYTES
-                }
-        },
-        {
-                .name = "aes-docsis-256-crc32",
-                .values.job_params = {
-                        .cipher_mode = TEST_AESDOCSIS,
-                        .hash_alg = TEST_DOCSIS_CRC32,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "aes-docsis8-256-crc32",
-                .values.job_params = {
-                        .cipher_mode = TEST_AESDOCSIS8,
-                        .hash_alg = TEST_DOCSIS_CRC32,
-                        .aes_key_size = IMB_KEY_256_BYTES
-                }
-        },
-        {
-                .name = "snow-v-aead",
-                .values.job_params = {
-                        .cipher_mode = TEST_SNOW_V_AEAD,
-                        .aes_key_size = 32,
-                        .hash_alg = TEST_AUTH_SNOW_V_AEAD
-                }
-        },
+        { .name = "aes-gcm-128",
+          .values.job_params = { .cipher_mode = TEST_GCM,
+                                 .hash_alg = TEST_HASH_GCM,
+                                 .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-gcm-192",
+          .values.job_params = { .cipher_mode = TEST_GCM,
+                                 .hash_alg = TEST_HASH_GCM,
+                                 .aes_key_size = IMB_KEY_192_BYTES } },
+        { .name = "aes-gcm-256",
+          .values.job_params = { .cipher_mode = TEST_GCM,
+                                 .hash_alg = TEST_HASH_GCM,
+                                 .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "aes-ccm-128",
+          .values.job_params = { .cipher_mode = TEST_CCM,
+                                 .hash_alg = TEST_HASH_CCM,
+                                 .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-ccm-256",
+          .values.job_params = { .cipher_mode = TEST_CCM,
+                                 .hash_alg = TEST_HASH_CCM,
+                                 .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "pon-128",
+          .values.job_params = { .cipher_mode = TEST_PON_CNTR,
+                                 .hash_alg = TEST_PON_CRC_BIP,
+                                 .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "pon-128-no-ctr",
+          .values.job_params = { .cipher_mode = TEST_PON_NO_CNTR,
+                                 .hash_alg = TEST_PON_CRC_BIP,
+                                 .aes_key_size = 0 } },
+        { .name = "chacha20-poly1305",
+          .values.job_params = { .cipher_mode = TEST_AEAD_CHACHA20,
+                                 .hash_alg = TEST_AEAD_POLY1305,
+                                 .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "aes-docsis-128-crc32",
+          .values.job_params = { .cipher_mode = TEST_AESDOCSIS,
+                                 .hash_alg = TEST_DOCSIS_CRC32,
+                                 .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-docsis8-128-crc32",
+          .values.job_params = { .cipher_mode = TEST_AESDOCSIS8,
+                                 .hash_alg = TEST_DOCSIS_CRC32,
+                                 .aes_key_size = IMB_KEY_128_BYTES } },
+        { .name = "aes-docsis-256-crc32",
+          .values.job_params = { .cipher_mode = TEST_AESDOCSIS,
+                                 .hash_alg = TEST_DOCSIS_CRC32,
+                                 .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "aes-docsis8-256-crc32",
+          .values.job_params = { .cipher_mode = TEST_AESDOCSIS8,
+                                 .hash_alg = TEST_DOCSIS_CRC32,
+                                 .aes_key_size = IMB_KEY_256_BYTES } },
+        { .name = "snow-v-aead",
+          .values.job_params = { .cipher_mode = TEST_SNOW_V_AEAD,
+                                 .aes_key_size = 32,
+                                 .hash_alg = TEST_AUTH_SNOW_V_AEAD } },
 };
 
 const struct str_value_mapping cipher_dir_str_map[] = {
-        {.name = "encrypt", .values.job_params.cipher_dir = IMB_DIR_ENCRYPT},
-        {.name = "decrypt", .values.job_params.cipher_dir = IMB_DIR_DECRYPT}
+        { .name = "encrypt", .values.job_params.cipher_dir = IMB_DIR_ENCRYPT },
+        { .name = "decrypt", .values.job_params.cipher_dir = IMB_DIR_DECRYPT }
 };
 
 /* This struct stores all information about performed test case */
@@ -838,60 +617,57 @@ struct thread_info {
         IMB_MGR *p_mgr;
 } t_info[MAX_NUM_THREADS];
 
-enum cache_type_e {
-        WARM = 0,
-        COLD = 1
-};
+enum cache_type_e { WARM = 0, COLD = 1 };
 
 enum cache_type_e cache_type = WARM;
 
 const uint32_t auth_tag_length_bytes[] = {
-                12, /* SHA1_HMAC */
-                14, /* SHA_224_HMAC */
-                16, /* SHA_256_HMAC */
-                24, /* SHA_384_HMAC */
-                32, /* SHA_512_HMAC */
-                12, /* AES_XCBC */
-                12, /* MD5 */
-                0,  /* NULL_HASH */
-                16, /* AES_GMAC */
-                0,  /* CUSTOM HASH */
-                16, /* AES_CCM */
-                16, /* AES_CMAC */
-                20, /* PLAIN_SHA1 */
-                28, /* PLAIN_SHA_224 */
-                32, /* PLAIN_SHA_256 */
-                48, /* PLAIN_SHA_384 */
-                64, /* PLAIN_SHA_512 */
-                4,  /* AES_CMAC_BITLEN (3GPP) */
-                8,  /* PON */
-                4,  /* ZUC-EIA3 */
-                IMB_DOCSIS_CRC32_TAG_SIZE, /* DOCSIS_CRC32 */
-                4,  /* SNOW3G-UIA2 */
-                4,  /* KASUMI-UIA1 */
-                16, /* IMB_AUTH_AES_GMAC_128 */
-                16, /* IMB_AUTH_AES_GMAC_192 */
-                16, /* IMB_AUTH_AES_GMAC_256 */
-                16, /* AES_CMAC_256 */
-                16, /* POLY1305 */
-                16, /* AEAD CHACHA20-POLY1305 */
-                16, /* AEAD CHACHA20 with SGL support*/
-                4,  /* ZUC-256-EIA3 */
-                16,  /* SNOW-V AEAD */
-                16, /* AES-GCM with SGL support */
-                4,  /* IMB_AUTH_CRC32_ETHERNET_FCS */
-                4,  /* IMB_AUTH_CRC32_SCTP */
-                4,  /* IMB_AUTH_CRC32_WIMAX_OFDMA_DATA */
-                4,  /* IMB_AUTH_CRC24_LTE_A */
-                4,  /* IMB_AUTH_CRC24_LTE_B */
-                4,  /* IMB_AUTH_CRC16_X25 */
-                4,  /* IMB_AUTH_CRC16_FP_DATA */
-                4,  /* IMB_AUTH_CRC11_FP_HEADER */
-                4,  /* IMB_AUTH_CRC10_IUUP_DATA */
-                4,  /* IMB_AUTH_CRC8_WIMAX_OFDMA_HCS */
-                4,  /* IMB_AUTH_CRC7_FP_HEADER */
-                4,  /* IMB_AUTH_CRC6_IUUP_HEADER */
-                16, /* IMB_AUTH_GHASH */
+        12,                        /* SHA1_HMAC */
+        14,                        /* SHA_224_HMAC */
+        16,                        /* SHA_256_HMAC */
+        24,                        /* SHA_384_HMAC */
+        32,                        /* SHA_512_HMAC */
+        12,                        /* AES_XCBC */
+        12,                        /* MD5 */
+        0,                         /* NULL_HASH */
+        16,                        /* AES_GMAC */
+        0,                         /* CUSTOM HASH */
+        16,                        /* AES_CCM */
+        16,                        /* AES_CMAC */
+        20,                        /* PLAIN_SHA1 */
+        28,                        /* PLAIN_SHA_224 */
+        32,                        /* PLAIN_SHA_256 */
+        48,                        /* PLAIN_SHA_384 */
+        64,                        /* PLAIN_SHA_512 */
+        4,                         /* AES_CMAC_BITLEN (3GPP) */
+        8,                         /* PON */
+        4,                         /* ZUC-EIA3 */
+        IMB_DOCSIS_CRC32_TAG_SIZE, /* DOCSIS_CRC32 */
+        4,                         /* SNOW3G-UIA2 */
+        4,                         /* KASUMI-UIA1 */
+        16,                        /* IMB_AUTH_AES_GMAC_128 */
+        16,                        /* IMB_AUTH_AES_GMAC_192 */
+        16,                        /* IMB_AUTH_AES_GMAC_256 */
+        16,                        /* AES_CMAC_256 */
+        16,                        /* POLY1305 */
+        16,                        /* AEAD CHACHA20-POLY1305 */
+        16,                        /* AEAD CHACHA20 with SGL support*/
+        4,                         /* ZUC-256-EIA3 */
+        16,                        /* SNOW-V AEAD */
+        16,                        /* AES-GCM with SGL support */
+        4,                         /* IMB_AUTH_CRC32_ETHERNET_FCS */
+        4,                         /* IMB_AUTH_CRC32_SCTP */
+        4,                         /* IMB_AUTH_CRC32_WIMAX_OFDMA_DATA */
+        4,                         /* IMB_AUTH_CRC24_LTE_A */
+        4,                         /* IMB_AUTH_CRC24_LTE_B */
+        4,                         /* IMB_AUTH_CRC16_X25 */
+        4,                         /* IMB_AUTH_CRC16_FP_DATA */
+        4,                         /* IMB_AUTH_CRC11_FP_HEADER */
+        4,                         /* IMB_AUTH_CRC10_IUUP_DATA */
+        4,                         /* IMB_AUTH_CRC8_WIMAX_OFDMA_HCS */
+        4,                         /* IMB_AUTH_CRC7_FP_HEADER */
+        4,                         /* IMB_AUTH_CRC6_IUUP_HEADER */
+        16,                        /* IMB_AUTH_GHASH */
 };
 uint32_t index_limit;
 uint32_t key_idxs[NUM_OFFSETS];
@@ -899,16 +675,10 @@ uint32_t offsets[NUM_OFFSETS];
 uint32_t sha_size_incr = UINT32_MAX;
 uint32_t buffer_offset = 0;
 
-enum range {
-        RANGE_MIN = 0,
-        RANGE_STEP,
-        RANGE_MAX,
-        NUM_RANGE
-};
+enum range { RANGE_MIN = 0, RANGE_STEP, RANGE_MAX, NUM_RANGE };
 
-uint32_t job_sizes[NUM_RANGE] = {DEFAULT_JOB_SIZE_MIN,
-                                 DEFAULT_JOB_SIZE_STEP,
-                                 DEFAULT_JOB_SIZE_MAX};
+uint32_t job_sizes[NUM_RANGE] = { DEFAULT_JOB_SIZE_MIN, DEFAULT_JOB_SIZE_STEP,
+                                  DEFAULT_JOB_SIZE_MAX };
 uint32_t job_size_list[MAX_LIST];
 uint32_t job_size_count = 0;
 uint32_t imix_list[MAX_LIST];
@@ -931,19 +701,17 @@ uint64_t ccm_aad_size = DEFAULT_CCM_AAD_SIZE;
 uint64_t chacha_poly_aad_size = DEFAULT_CHACHA_POLY_AAD_SIZE;
 uint64_t snow_v_aad_size = DEFAULT_SNOW_V_AEAD_AAD_SIZE;
 
-struct custom_job_params custom_job_params = {
-        .cipher_mode  = TEST_NULL_CIPHER,
-        .hash_alg     = TEST_NULL_HASH,
-        .aes_key_size = 0,
-        .cipher_dir   = IMB_DIR_ENCRYPT
-};
+struct custom_job_params custom_job_params = { .cipher_mode = TEST_NULL_CIPHER,
+                                               .hash_alg = TEST_NULL_HASH,
+                                               .aes_key_size = 0,
+                                               .cipher_dir = IMB_DIR_ENCRYPT };
 
-uint8_t archs[NUM_ARCHS] = {1, 1, 1, 1}; /* uses all function sets */
+uint8_t archs[NUM_ARCHS] = { 1, 1, 1, 1 }; /* uses all function sets */
 int use_job_api = 0;
 int use_gcm_sgl_api = 0;
 int use_unhalted_cycles = 0; /* read unhalted cycles instead of tsc */
 uint64_t rd_cycles_cost = 0; /* cost of reading unhalted cycles */
-uint64_t core_mask = 0; /* bitmap of selected cores */
+uint64_t core_mask = 0;      /* bitmap of selected cores */
 
 uint64_t flags = 0; /* flags passed to alloc_mb_mgr() */
 
@@ -963,7 +731,7 @@ static int plot_output_option = 0;
 static int quic_api_test = 0;
 
 /* API types */
-typedef enum  {
+typedef enum {
         TEST_API_JOB = 0,
         TEST_API_BURST,
         TEST_API_CIPHER_BURST,
@@ -971,19 +739,19 @@ typedef enum  {
         TEST_API_NUMOF
 } TEST_API;
 
-const char *str_api_list[TEST_API_NUMOF] = {"single job", "burst",
-                                            "cipher-only burst",
-                                            "hash-only burst"};
+const char *str_api_list[TEST_API_NUMOF] = { "single job", "burst", "cipher-only burst",
+                                             "hash-only burst" };
 
 static TEST_API test_api = TEST_API_JOB; /* test job API by default */
-static uint32_t burst_size = 0; /* num jobs to pass to burst API */
-static uint32_t segment_size = 0; /* segment size to test SGL (0 = no SGL) */
+static uint32_t burst_size = 0;          /* num jobs to pass to burst API */
+static uint32_t segment_size = 0;        /* segment size to test SGL (0 = no SGL) */
 
 static volatile int timebox_on = 1; /* flag to stop the test loop */
 static int use_timebox = 1;         /* time-box feature on/off flag */
 
 #ifdef LINUX
-static void timebox_callback(int sig)
+static void
+timebox_callback(int sig)
 {
         (void) sig;
         timebox_on = 0;
@@ -991,7 +759,8 @@ static void timebox_callback(int sig)
 #endif
 
 #ifdef _WIN32
-static void CALLBACK timebox_callback(PVOID lpParam, BOOLEAN TimerFired)
+static void CALLBACK
+timebox_callback(PVOID lpParam, BOOLEAN TimerFired)
 {
         (void) lpParam;
         (void) TimerFired;
@@ -1000,7 +769,8 @@ static void CALLBACK timebox_callback(PVOID lpParam, BOOLEAN TimerFired)
 #endif
 
 /* Return rdtsc to core cycle scale factor */
-static double get_tsc_to_core_scale(const int turbo)
+static double
+get_tsc_to_core_scale(const int turbo)
 {
         int i;
         /* use enough cycles for accurate measurement */
@@ -1014,10 +784,11 @@ static double get_tsc_to_core_scale(const int turbo)
         for (i = 0; i < num_loops; i++)
                 tsc_cycles = measure_tsc(expected_cycles);
 
-        return ((double)tsc_cycles / (double)expected_cycles);
+        return ((double) tsc_cycles / (double) expected_cycles);
 }
 
-static void prog_bar_init(const uint32_t total_num)
+static void
+prog_bar_init(const uint32_t total_num)
 {
         if (silent_progress_bar)
                 return;
@@ -1039,7 +810,8 @@ static void prog_bar_init(const uint32_t total_num)
         fputs(prog_bar, stderr);
 }
 
-static void prog_bar_fini(void)
+static void
+prog_bar_fini(void)
 {
         if (silent_progress_bar)
                 return;
@@ -1048,7 +820,8 @@ static void prog_bar_fini(void)
         fputs(prog_bar, stderr);
 }
 
-static void prog_bar_update(const uint32_t num)
+static void
+prog_bar_update(const uint32_t num)
 {
         if (silent_progress_bar)
                 return;
@@ -1062,7 +835,7 @@ static void prog_bar_update(const uint32_t num)
                 if (pb_idx < (PB_SIZE + 1))
                         pb_idx++;
         } else {
-                const char pb_inter_chars[] = {'|', '/', '-', '\\'};
+                const char pb_inter_chars[] = { '|', '/', '-', '\\' };
                 /* print intermediate chars */
                 prog_bar[pb_idx] = pb_inter_chars[num % DIM(pb_inter_chars)];
                 fputs(prog_bar, stderr);
@@ -1070,14 +843,16 @@ static void prog_bar_update(const uint32_t num)
 }
 
 /* Read unhalted cycles */
-__forceinline uint64_t read_cycles(const uint32_t core)
+__forceinline uint64_t
+read_cycles(const uint32_t core)
 {
         uint64_t val = 0;
 
-        if (msr_read(core, IA32_MSR_CPU_UNHALTED_THREAD,
-                     &val) != MACHINE_RETVAL_OK) {
-                fprintf(stderr, "Error reading cycles "
-                        "counter on core %u!\n", core);
+        if (msr_read(core, IA32_MSR_CPU_UNHALTED_THREAD, &val) != MACHINE_RETVAL_OK) {
+                fprintf(stderr,
+                        "Error reading cycles "
+                        "counter on core %u!\n",
+                        core);
                 exit(EXIT_FAILURE);
         }
 
@@ -1085,13 +860,15 @@ __forceinline uint64_t read_cycles(const uint32_t core)
 }
 
 /* Method used by qsort to compare 2 values */
-static int compare_uint64_t(const void *a, const void *b)
+static int
+compare_uint64_t(const void *a, const void *b)
 {
-        return (int)(int64_t)(*(const uint64_t *)a - *(const uint64_t *)b);
+        return (int) (int64_t) (*(const uint64_t *) a - *(const uint64_t *) b);
 }
 
 /* Get number of bits set in value */
-static unsigned bitcount(const uint64_t val)
+static unsigned
+bitcount(const uint64_t val)
 {
         unsigned i, bits = 0;
 
@@ -1104,8 +881,8 @@ static unsigned bitcount(const uint64_t val)
 
 /* Get the next core in core mask
    Set last_core to negative to start from beginning of core_mask */
-static int next_core(const uint64_t core_mask,
-                     const int last_core)
+static int
+next_core(const uint64_t core_mask, const int last_core)
 {
         int core = 0;
 
@@ -1115,7 +892,7 @@ static int next_core(const uint64_t core_mask,
         while (((core_mask >> core) & 1) == 0) {
                 core++;
 
-                if (core >= (int)BITS(core_mask))
+                if (core >= (int) BITS(core_mask))
                         return -1;
         }
 
@@ -1123,7 +900,8 @@ static int next_core(const uint64_t core_mask,
 }
 
 /* Set CPU affinity for current thread */
-static int set_affinity(const int cpu)
+static int
+set_affinity(const int cpu)
 {
         int ret = 0;
         int num_cpus = 0;
@@ -1144,15 +922,16 @@ static int set_affinity(const int cpu)
 
         /* Check if selected core is valid */
         if (cpu < 0 || cpu >= num_cpus) {
-                fprintf(stderr, "Invalid CPU selected! "
-                        "Max valid CPU is %d\n", num_cpus - 1);
+                fprintf(stderr,
+                        "Invalid CPU selected! "
+                        "Max valid CPU is %d\n",
+                        num_cpus - 1);
                 return 1;
         }
 
 #ifdef _WIN32
         NewGroupAffinity.Mask = 1ULL << cpu;
-        ret = !SetThreadGroupAffinity(GetCurrentThread(),
-                                      &NewGroupAffinity, NULL);
+        ret = !SetThreadGroupAffinity(GetCurrentThread(), &NewGroupAffinity, NULL);
 #else
         cpu_set_t cpuset;
 
@@ -1161,8 +940,7 @@ static int set_affinity(const int cpu)
 
         /* Set affinity of current process to cpu */
 #if defined(__FreeBSD__)
-	ret = cpuset_setaffinity(CPU_LEVEL_WHICH, CPU_WHICH_TID, -1,
-				sizeof(cpuset), &cpuset);
+        ret = cpuset_setaffinity(CPU_LEVEL_WHICH, CPU_WHICH_TID, -1, sizeof(cpuset), &cpuset);
 #else
         ret = sched_setaffinity(0, sizeof(cpuset), &cpuset);
 #endif
@@ -1172,7 +950,8 @@ static int set_affinity(const int cpu)
 }
 
 /* Start counting unhalted cycles */
-static int start_cycles_ctr(const uint32_t core)
+static int
+start_cycles_ctr(const uint32_t core)
 {
         int ret;
 
@@ -1195,11 +974,12 @@ static int start_cycles_ctr(const uint32_t core)
                 return ret;
 
         /* Enable cycles counter */
-        return  msr_write(core, IA32_MSR_PERF_GLOBAL_CTR, (1ULL << 33));
+        return msr_write(core, IA32_MSR_PERF_GLOBAL_CTR, (1ULL << 33));
 }
 
 /* Init MSR module */
-static int init_msr_mod(void)
+static int
+init_msr_mod(void)
 {
         unsigned max_core_count = 0;
 #ifdef _WIN32
@@ -1216,7 +996,8 @@ static int init_msr_mod(void)
 }
 
 /* Set the cost of reading unhalted cycles using RDMSR */
-static int set_unhalted_cycle_cost(const int core, uint64_t *value)
+static int
+set_unhalted_cycle_cost(const int core, uint64_t *value)
 {
         uint64_t time1, time2;
 
@@ -1233,7 +1014,8 @@ static int set_unhalted_cycle_cost(const int core, uint64_t *value)
 }
 
 /* Calculate the general cost of reading unhalted cycles (median) */
-static int set_avg_unhalted_cycle_cost(const int core, uint64_t *value)
+static int
+set_avg_unhalted_cycle_cost(const int core, uint64_t *value)
 {
         unsigned i;
         uint64_t cycles[10];
@@ -1250,13 +1032,14 @@ static int set_avg_unhalted_cycle_cost(const int core, uint64_t *value)
         qsort(cycles, DIM(cycles), sizeof(uint64_t), compare_uint64_t);
 
         /* set median cost */
-        *value = cycles[DIM(cycles)/2];
+        *value = cycles[DIM(cycles) / 2];
 
         return 0;
 }
 
 /* Freeing allocated memory */
-static void free_mem(uint8_t **p_buffer, imb_uint128_t **p_keys)
+static void
+free_mem(uint8_t **p_buffer, imb_uint128_t **p_keys)
 {
         imb_uint128_t *keys = NULL;
         uint8_t *buf = NULL;
@@ -1292,24 +1075,28 @@ get_key_pointer(const uint32_t index, const imb_uint128_t *p_keys)
         return (const void *) &p_keys[key_idxs[index]];
 }
 
-static uint8_t *get_src_buffer(const uint32_t index, uint8_t *p_buffer)
+static uint8_t *
+get_src_buffer(const uint32_t index, uint8_t *p_buffer)
 {
         return &p_buffer[offsets[index] + buffer_offset];
 }
 
-static uint8_t *get_dst_buffer(const uint32_t index, uint8_t *p_buffer)
+static uint8_t *
+get_dst_buffer(const uint32_t index, uint8_t *p_buffer)
 {
         return &p_buffer[offsets[index] + buffer_offset + sha_size_incr];
 }
 
-static uint32_t get_next_index(uint32_t index)
+static uint32_t
+get_next_index(uint32_t index)
 {
         if (++index >= index_limit)
                 index = 0;
         return index;
 }
 
-static void init_buf(void *pb, const size_t length)
+static void
+init_buf(void *pb, const size_t length)
 {
         const size_t n = length / sizeof(uint64_t);
         size_t i = 0;
@@ -1318,7 +1105,7 @@ static void init_buf(void *pb, const size_t length)
                 return;
 
         for (i = 0; i < n; i++)
-                ((uint64_t *)pb)[i] = (uint64_t) rand();
+                ((uint64_t *) pb)[i] = (uint64_t) rand();
 }
 
 /*
@@ -1326,16 +1113,16 @@ static void init_buf(void *pb, const size_t length)
  * init_offsets() needs to be called prior to that so that
  * index_limit is set up accordingly to hot/cold selection.
  */
-static void init_mem(uint8_t **p_buffer, imb_uint128_t **p_keys)
+static void
+init_mem(uint8_t **p_buffer, imb_uint128_t **p_keys)
 {
         const size_t bufs_size = index_limit * REGION_SIZE;
-        const size_t keys_size =
-                index_limit * KEYS_PER_JOB * sizeof(imb_uint128_t);
+        const size_t keys_size = index_limit * KEYS_PER_JOB * sizeof(imb_uint128_t);
         const size_t alignment = 64;
         uint8_t *buf = NULL;
         imb_uint128_t *keys = NULL;
 #ifdef LINUX
-	int ret;
+        int ret;
 #endif
 
         if (p_keys == NULL || p_buffer == NULL) {
@@ -1346,7 +1133,7 @@ static void init_mem(uint8_t **p_buffer, imb_uint128_t **p_keys)
 #ifdef LINUX
         ret = posix_memalign((void **) &buf, alignment, bufs_size);
 
-	if (ret != 0) {
+        if (ret != 0) {
                 fprintf(stderr, "Could not malloc buf\n");
                 exit(EXIT_FAILURE);
         }
@@ -1360,7 +1147,7 @@ static void init_mem(uint8_t **p_buffer, imb_uint128_t **p_keys)
 
 #ifdef LINUX
         ret = posix_memalign((void **) &keys, alignment, keys_size);
-	if (ret != 0) {
+        if (ret != 0) {
                 fprintf(stderr, "Could not allocate memory for keys!\n");
                 free_mem(&buf, &keys);
                 exit(EXIT_FAILURE);
@@ -1385,7 +1172,8 @@ static void init_mem(uint8_t **p_buffer, imb_uint128_t **p_keys)
  * Initialize packet buffer and keys offsets from
  * the start of the respective buffers
  */
-static void init_offsets(const enum cache_type_e ctype)
+static void
+init_offsets(const enum cache_type_e ctype)
 {
         if (ctype == COLD) {
                 uint32_t i;
@@ -1424,8 +1212,7 @@ static void init_offsets(const enum cache_type_e ctype)
                         const uint32_t L1_way_size = 4096;
 
                         key_idxs[i] = i * KEYS_PER_JOB;
-                        offsets[i] = i * REGION_SIZE +
-                                ((i * offset_step) & (L1_way_size - 1));
+                        offsets[i] = i * REGION_SIZE + ((i * offset_step) & (L1_way_size - 1));
                 }
         }
 }
@@ -1527,8 +1314,8 @@ get_next_size(const uint32_t index)
 }
 
 static inline void
-set_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys,
-               const uint32_t i, const uint32_t index, const IMB_JOB *template)
+set_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys, const uint32_t i,
+               const uint32_t index, const IMB_JOB *template)
 {
         uint32_t list_idx;
 
@@ -1540,17 +1327,14 @@ set_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys,
                 job->msg_len_to_cipher_in_bytes = cipher_size_list[list_idx];
                 job->msg_len_to_hash_in_bytes = hash_size_list[list_idx];
         } else {
-                job->msg_len_to_hash_in_bytes =
-                        template->msg_len_to_hash_in_bytes;
-                job->msg_len_to_cipher_in_bytes =
-                        template->msg_len_to_cipher_in_bytes;
+                job->msg_len_to_hash_in_bytes = template->msg_len_to_hash_in_bytes;
+                job->msg_len_to_cipher_in_bytes = template->msg_len_to_cipher_in_bytes;
         }
 
         if (job->hash_alg == IMB_AUTH_PON_CRC_BIP) {
-                uint64_t *p_src =
-                        (uint64_t *) get_src_buffer(index, p_buffer);
+                uint64_t *p_src = (uint64_t *) get_src_buffer(index, p_buffer);
 
-                job->src = (const uint8_t *)p_src;
+                job->src = (const uint8_t *) p_src;
                 if (imix_list_count != 0)
                         p_src[0] = xgem_hdr_list[list_idx];
                 else
@@ -1563,41 +1347,30 @@ set_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys,
                 job->u.GCM.aad = job->src;
         } else if (job->cipher_mode == IMB_CIPHER_CCM) {
                 job->u.CCM.aad = job->src;
-                job->enc_keys = job->dec_keys =
-                        (const uint32_t *) get_key_pointer(index,
-                                                           p_keys);
+                job->enc_keys = job->dec_keys = (const uint32_t *) get_key_pointer(index, p_keys);
         } else if (job->cipher_mode == IMB_CIPHER_DES3) {
                 static const void *ks_ptr[3];
 
-                ks_ptr[0] = ks_ptr[1] = ks_ptr[2] =
-                        get_key_pointer(index, p_keys);
-                job->enc_keys =
-                        job->dec_keys = ks_ptr;
+                ks_ptr[0] = ks_ptr[1] = ks_ptr[2] = get_key_pointer(index, p_keys);
+                job->enc_keys = job->dec_keys = ks_ptr;
         } else if (job->cipher_mode == IMB_CIPHER_CHACHA20_POLY1305) {
                 job->u.CHACHA20_POLY1305.aad = job->src;
         } else if (job->cipher_mode == IMB_CIPHER_SNOW_V_AEAD) {
                 job->u.SNOW_V_AEAD.aad = job->src;
-                job->enc_keys = job->dec_keys =
-                        (const uint32_t *) get_key_pointer(index,
-                                                           p_keys);
-        /* Force destination buffer to start 8 bytes after source */
+                job->enc_keys = job->dec_keys = (const uint32_t *) get_key_pointer(index, p_keys);
+                /* Force destination buffer to start 8 bytes after source */
         } else if (job->cipher_mode == IMB_CIPHER_PON_AES_CNTR) {
                 job->dst = get_src_buffer(index, p_buffer) + 8;
-                job->enc_keys = job->dec_keys =
-                        (const uint32_t *) get_key_pointer(index,
-                                                           p_keys);
+                job->enc_keys = job->dec_keys = (const uint32_t *) get_key_pointer(index, p_keys);
         } else {
-                job->enc_keys = job->dec_keys =
-                        (const uint32_t *) get_key_pointer(index,
-                                                           p_keys);
+                job->enc_keys = job->dec_keys = (const uint32_t *) get_key_pointer(index, p_keys);
         }
 }
 
 static inline void
-set_sgl_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys,
-                   const uint32_t size_idx, const uint32_t buf_index,
-                   struct IMB_SGL_IOV *sgl, struct gcm_context_data *gcm_ctx,
-                   struct chacha20_poly1305_context_data *cp_ctx)
+set_sgl_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys, const uint32_t size_idx,
+                   const uint32_t buf_index, struct IMB_SGL_IOV *sgl,
+                   struct gcm_context_data *gcm_ctx, struct chacha20_poly1305_context_data *cp_ctx)
 {
         uint8_t *src = get_src_buffer(buf_index, p_buffer);
         uint8_t *dst = get_dst_buffer(buf_index, p_buffer);
@@ -1623,9 +1396,7 @@ set_sgl_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys,
                 job->u.CHACHA20_POLY1305.aad = aad;
                 job->u.CHACHA20_POLY1305.ctx = cp_ctx;
         }
-        job->enc_keys = job->dec_keys =
-                (const uint32_t *) get_key_pointer(buf_index,
-                                   p_keys);
+        job->enc_keys = job->dec_keys = (const uint32_t *) get_key_pointer(buf_index, p_keys);
         job->sgl_state = IMB_SGL_ALL;
 
         const uint32_t num_segs = buf_size / segment_size;
@@ -1649,8 +1420,8 @@ set_sgl_job_fields(IMB_JOB *job, uint8_t *p_buffer, imb_uint128_t *p_keys,
 };
 
 static void
-set_size_lists(uint32_t *cipher_size_list, uint32_t *hash_size_list,
-               uint64_t *xgem_hdr_list, struct params_s *params)
+set_size_lists(uint32_t *cipher_size_list, uint32_t *hash_size_list, uint64_t *xgem_hdr_list,
+               struct params_s *params)
 {
         unsigned int i, list_size;
         uint32_t job_size;
@@ -1666,8 +1437,7 @@ set_size_lists(uint32_t *cipher_size_list, uint32_t *hash_size_list,
                 else
                         job_size = params->size_aes;
 
-                if ((params->cipher_mode == TEST_AESDOCSIS8) ||
-                    (params->cipher_mode == TEST_CNTR8))
+                if ((params->cipher_mode == TEST_AESDOCSIS8) || (params->cipher_mode == TEST_CNTR8))
                         cipher_size_list[i] = job_size + 8;
                 else if (params->cipher_mode == TEST_DESDOCSIS4)
                         cipher_size_list[i] = job_size + 4;
@@ -1684,13 +1454,11 @@ set_size_lists(uint32_t *cipher_size_list, uint32_t *hash_size_list,
                         if (job_size < 8)
                                 cipher_size_list[i] = 8;
                         else
-                                cipher_size_list[i] =
-                                        (job_size + 3) & 0xfffffffc;
+                                cipher_size_list[i] = (job_size + 3) & 0xfffffffc;
                 } else
                         cipher_size_list[i] = job_size;
 
-                if ((params->hash_alg == TEST_HASH_CCM) ||
-                    (params->hash_alg == TEST_HASH_GCM))
+                if ((params->hash_alg == TEST_HASH_CCM) || (params->hash_alg == TEST_HASH_GCM))
                         hash_size_list[i] = job_size;
                 else
                         hash_size_list[i] = job_size + sha_size_incr;
@@ -1717,11 +1485,11 @@ set_size_lists(uint32_t *cipher_size_list, uint32_t *hash_size_list,
                         hash_size_list[i] = 0;
 
                 if (((params->cipher_mode == TEST_AESDOCSIS) ||
-                    (params->cipher_mode == TEST_AESDOCSIS8)) &&
+                     (params->cipher_mode == TEST_AESDOCSIS8)) &&
                     (params->hash_alg == TEST_DOCSIS_CRC32)) {
                         const uint32_t ciph_adjust = /* SA + DA */
-                               IMB_DOCSIS_CRC32_MIN_ETH_PDU_SIZE - 2;
-                               /* ETH TYPE */
+                                IMB_DOCSIS_CRC32_MIN_ETH_PDU_SIZE - 2;
+                        /* ETH TYPE */
 
                         hash_size_list[i] = cipher_size_list[i] + ciph_adjust;
                         cipher_size_list[i] -= IMB_DOCSIS_CRC32_TAG_SIZE;
@@ -1729,13 +1497,10 @@ set_size_lists(uint32_t *cipher_size_list, uint32_t *hash_size_list,
 
                 if (params->hash_alg == TEST_PON_CRC_BIP) {
                         /* create XGEM header template */
-                        const uint64_t pli =
-                                (job_size << 2) & 0xffff;
+                        const uint64_t pli = (job_size << 2) & 0xffff;
 
-                        xgem_hdr_list[i] = ((pli >> 8) & 0xff) |
-                                        ((pli & 0xff) << 8);
+                        xgem_hdr_list[i] = ((pli >> 8) & 0xff) | ((pli & 0xff) << 8);
                 }
-
         }
 }
 
@@ -1745,11 +1510,11 @@ set_size_lists(uint32_t *cipher_size_list, uint32_t *hash_size_list,
  * =========================================================
  */
 
-#define MAX_K 32
+#define MAX_K        32
 #define PKT_SIZE_MAX 16384
 
 #define AAD_LEN 12
-#define IV_LEN 12
+#define IV_LEN  12
 #define TAG_LEN 16
 
 static void
@@ -1761,10 +1526,8 @@ bench_quic_aes_gcm(IMB_MGR *p_mgr, const uint64_t n_max, uint8_t *blob)
         const void *aad[MAX_K];
         void *tag[MAX_K];
         uint64_t len[MAX_K];
-        const uint8_t kp[16] = {
-                0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03,
-                0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03
-        };
+        const uint8_t kp[16] = { 0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03,
+                                 0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03 };
         struct gcm_key_data key;
         const uint64_t pkt_size = 16384;
         const int K = MAX_K;
@@ -1802,12 +1565,9 @@ bench_quic_aes_gcm(IMB_MGR *p_mgr, const uint64_t n_max, uint8_t *blob)
         const uint64_t tsc_start = __rdtscp(&aux);
 
         for (n = 0; n < n_max; n++) {
-                imb_quic_aes_gcm(p_mgr, &key,
-                                 IMB_KEY_128_BYTES, IMB_DIR_ENCRYPT,
-                                 (void **) out, (const void * const*) in, len,
-                                 (const void * const*) iv,
-                                 (const void * const*) &aad, AAD_LEN,
-                                 (void **) tag, TAG_LEN, K);
+                imb_quic_aes_gcm(p_mgr, &key, IMB_KEY_128_BYTES, IMB_DIR_ENCRYPT, (void **) out,
+                                 (const void *const *) in, len, (const void *const *) iv,
+                                 (const void *const *) &aad, AAD_LEN, (void **) tag, TAG_LEN, K);
         }
 
         const uint64_t tsc_end = __rdtscp(&aux);
@@ -1824,12 +1584,10 @@ bench_quic_aes_ecb_hp(IMB_MGR *p_mgr, const uint64_t n_max, uint8_t *blob)
 {
         void *out[MAX_K];
         const void *in[MAX_K];
-        const uint8_t kp[16] = {
-                0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03,
-                0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03
-        };
-        DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
-        DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
+        const uint8_t kp[16] = { 0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03,
+                                 0xaa, 055, 0x11, 0x44, 0x01, 0x02, 0x00, 0x03 };
+        DECLARE_ALIGNED(uint32_t enc_keys[15 * 4], 16);
+        DECLARE_ALIGNED(uint32_t dec_keys[15 * 4], 16);
         const int K = MAX_K;
         const uint64_t pkt_size = 16;
         uint32_t aux;
@@ -1855,9 +1613,8 @@ bench_quic_aes_ecb_hp(IMB_MGR *p_mgr, const uint64_t n_max, uint8_t *blob)
         const uint64_t tsc_start = __rdtscp(&aux);
 
         for (n = 0; n < n_max; n++)
-                imb_quic_hp_aes_ecb(p_mgr, enc_keys,
-                                    (void **)out, (const void * const *) in,
-                                    K, IMB_KEY_128_BYTES);
+                imb_quic_hp_aes_ecb(p_mgr, enc_keys, (void **) out, (const void *const *) in, K,
+                                    IMB_KEY_128_BYTES);
 
         const uint64_t tsc_end = __rdtscp(&aux);
         const uint64_t cpi = (tsc_end - tsc_start) / n_max;
@@ -1868,12 +1625,12 @@ bench_quic_aes_ecb_hp(IMB_MGR *p_mgr, const uint64_t n_max, uint8_t *blob)
                (unsigned long) cpi, (unsigned long) cpp);
 }
 
-static void quic_main(IMB_MGR *p_mgr)
+static void
+quic_main(IMB_MGR *p_mgr)
 {
-        const size_t blob_sz =
-                (AAD_LEN + IV_LEN + TAG_LEN + PKT_SIZE_MAX) * MAX_K * 2;
+        const size_t blob_sz = (AAD_LEN + IV_LEN + TAG_LEN + PKT_SIZE_MAX) * MAX_K * 2;
 
-        uint8_t *blob_ptr  = (uint8_t *) malloc(blob_sz);
+        uint8_t *blob_ptr = (uint8_t *) malloc(blob_sz);
 
         if (blob_ptr == NULL) {
                 printf("Error allocating QUIC-API test buffer!\n");
@@ -1924,8 +1681,8 @@ static void quic_main(IMB_MGR *p_mgr)
 
 /* Performs test using AES_HMAC or DOCSIS */
 static uint64_t
-do_test(IMB_MGR *mb_mgr, struct params_s *params,
-        const uint32_t num_iter, uint8_t *p_buffer, imb_uint128_t *p_keys)
+do_test(IMB_MGR *mb_mgr, struct params_s *params, const uint32_t num_iter, uint8_t *p_buffer,
+        imb_uint128_t *p_keys)
 {
         IMB_JOB *job;
         IMB_JOB job_template;
@@ -1935,8 +1692,8 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
         static DECLARE_ALIGNED(imb_uint128_t auth_iv, 16);
         static uint32_t ipad[5], opad[5], digest[3];
         static DECLARE_ALIGNED(uint32_t k1_expanded[11 * 4], 16);
-        static DECLARE_ALIGNED(uint8_t	k2[16], 16);
-        static DECLARE_ALIGNED(uint8_t	k3[16], 16);
+        static DECLARE_ALIGNED(uint8_t k2[16], 16);
+        static DECLARE_ALIGNED(uint8_t k3[16], 16);
         static DECLARE_ALIGNED(struct gcm_key_data gdata_key, 512);
         uint64_t time = 0;
         uint32_t aux;
@@ -1944,7 +1701,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
         uint8_t next_iv[IMB_AES_BLOCK_SIZE];
         struct gcm_context_data gcm_ctx[MAX_BURST_SIZE];
         struct chacha20_poly1305_context_data cp_ctx[MAX_BURST_SIZE];
-        struct IMB_SGL_IOV *sgl[MAX_BURST_SIZE] = {NULL};
+        struct IMB_SGL_IOV *sgl[MAX_BURST_SIZE] = { NULL };
         uint32_t max_num_segs = 1;
 
         memset(&job_template, 0, sizeof(IMB_JOB));
@@ -1954,12 +1711,10 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
         set_size_lists(cipher_size_list, hash_size_list, xgem_hdr_list, params);
 
         if (segment_size != 0)
-                max_num_segs = DIV_ROUND_UP(job_sizes[RANGE_MAX],
-                                            segment_size);
+                max_num_segs = DIV_ROUND_UP(job_sizes[RANGE_MAX], segment_size);
 
         for (i = 0; i < MAX_BURST_SIZE; i++) {
-                sgl[i] = malloc(sizeof(struct IMB_SGL_IOV) *
-                                max_num_segs);
+                sgl[i] = malloc(sizeof(struct IMB_SGL_IOV) * max_num_segs);
                 if (sgl[i] == NULL) {
                         fprintf(stderr, "malloc() failed\n");
                         goto exit;
@@ -2063,7 +1818,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
         case TEST_SNOW3G_UIA2:
                 job_template.hash_alg = IMB_AUTH_SNOW3G_UIA2_BITLEN;
                 job_template.u.SNOW3G_UIA2._key = k3;
-                job_template.u.SNOW3G_UIA2._iv = (uint8_t *)&auth_iv;
+                job_template.u.SNOW3G_UIA2._iv = (uint8_t *) &auth_iv;
                 break;
         case TEST_KASUMI_UIA1:
                 job_template.hash_alg = IMB_AUTH_KASUMI_UIA1;
@@ -2137,16 +1892,14 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                 break;
         default:
                 /* HMAC hash alg is SHA1 or MD5 */
-                job_template.u.HMAC._hashed_auth_key_xor_ipad =
-                        (uint8_t *) ipad;
-                job_template.u.HMAC._hashed_auth_key_xor_opad =
-                        (uint8_t *) opad;
+                job_template.u.HMAC._hashed_auth_key_xor_ipad = (uint8_t *) ipad;
+                job_template.u.HMAC._hashed_auth_key_xor_opad = (uint8_t *) opad;
                 job_template.hash_alg = (IMB_HASH_ALG) params->hash_alg;
                 break;
         }
         if (tag_size == 0)
                 job_template.auth_tag_output_len_in_bytes =
-                    (uint64_t) auth_tag_length_bytes[job_template.hash_alg - 1];
+                        (uint64_t) auth_tag_length_bytes[job_template.hash_alg - 1];
         else
                 job_template.auth_tag_output_len_in_bytes = tag_size;
 
@@ -2154,10 +1907,9 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
 
         if (params->cipher_mode == TEST_NULL_CIPHER) {
                 job_template.chain_order = IMB_ORDER_HASH_CIPHER;
-        } else if (params->cipher_mode == TEST_CCM ||
-                   ((params->cipher_mode == TEST_AESDOCSIS ||
-                     params->cipher_mode == TEST_AESDOCSIS8) &&
-                    params->hash_alg == TEST_DOCSIS_CRC32)) {
+        } else if (params->cipher_mode == TEST_CCM || ((params->cipher_mode == TEST_AESDOCSIS ||
+                                                        params->cipher_mode == TEST_AESDOCSIS8) &&
+                                                       params->hash_alg == TEST_DOCSIS_CRC32)) {
                 if (job_template.cipher_direction == IMB_DIR_ENCRYPT)
                         job_template.chain_order = IMB_ORDER_HASH_CIPHER;
                 else
@@ -2238,17 +1990,15 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                 job_template.cipher_start_src_offset_in_bytes = 0;
                 job_template.enc_keys = k1_expanded;
                 job_template.dec_keys = k1_expanded;
-                job_template.u.CHACHA20_POLY1305.aad_len_in_bytes =
-                        params->aad_size;
+                job_template.u.CHACHA20_POLY1305.aad_len_in_bytes = params->aad_size;
                 job_template.iv_len_in_bytes = 12;
         } else if (job_template.cipher_mode == IMB_CIPHER_SNOW_V)
                 job_template.iv_len_in_bytes = 16;
         else if (job_template.cipher_mode == IMB_CIPHER_SNOW_V_AEAD &&
-                job_template.hash_alg == IMB_AUTH_SNOW_V_AEAD) {
+                 job_template.hash_alg == IMB_AUTH_SNOW_V_AEAD) {
                 job_template.key_len_in_bytes = 32;
                 job_template.iv_len_in_bytes = 16;
-                job_template.u.SNOW_V_AEAD.aad_len_in_bytes =
-                        params->aad_size;
+                job_template.u.SNOW_V_AEAD.aad_len_in_bytes = params->aad_size;
         }
 
 #define TIMEOUT_MS 100 /*< max time for one packet size to be tested for */
@@ -2276,16 +2026,14 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                 /* create the timer queue */
                 hTimeboxQueue = CreateTimerQueue();
                 if (NULL == hTimeboxQueue) {
-                        fprintf(stderr, "CreateTimerQueue() error %u\n",
-                                (unsigned) GetLastError());
+                        fprintf(stderr, "CreateTimerQueue() error %u\n", (unsigned) GetLastError());
                         goto exit;
                 }
 
                 /* set a timer to call the timebox */
                 if (!CreateTimerQueueTimer(&hTimebox, hTimeboxQueue,
-                                           (WAITORTIMERCALLBACK)
-                                           timebox_callback,
-                                           NULL, TIMEOUT_MS, 0, 0)) {
+                                           (WAITORTIMERCALLBACK) timebox_callback, NULL, TIMEOUT_MS,
+                                           0, 0)) {
                         fprintf(stderr, "CreateTimerQueueTimer() error %u\n",
                                 (unsigned) GetLastError());
                         goto exit;
@@ -2308,13 +2056,12 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                 uint32_t jobs_submitted = 0;
 #endif
 
-                IMB_JOB *jobs[IMB_MAX_BURST_SIZE] = {NULL};
+                IMB_JOB *jobs[IMB_MAX_BURST_SIZE] = { NULL };
 
                 imb_set_session(mb_mgr, &job_template);
 
                 while (num_jobs && timebox_on) {
-                        uint32_t n = (num_jobs / burst_size) ?
-                                burst_size : num_jobs;
+                        uint32_t n = (num_jobs / burst_size) ? burst_size : num_jobs;
 
                         while (IMB_GET_NEXT_BURST(mb_mgr, n, jobs) < n)
                                 IMB_FLUSH_BURST(mb_mgr, n, jobs);
@@ -2327,17 +2074,13 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                         *job = job_template;
 
                                 if (segment_size != 0)
-                                        set_sgl_job_fields(job, p_buffer,
-                                                           p_keys, i,
-                                                           index, sgl[i],
-                                                           &gcm_ctx[i],
-                                                           &cp_ctx[i]);
+                                        set_sgl_job_fields(job, p_buffer, p_keys, i, index, sgl[i],
+                                                           &gcm_ctx[i], &cp_ctx[i]);
                                 else
-                                        set_job_fields(job, p_buffer, p_keys,
-                                                       i, index, &job_template);
+                                        set_job_fields(job, p_buffer, p_keys, i, index,
+                                                       &job_template);
 
                                 index = get_next_index(index);
-
                         }
                         /* submit burst */
 #ifdef DEBUG
@@ -2347,20 +2090,18 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                 const int err = imb_get_errno(mb_mgr);
 
                                 if (err != 0) {
-                                        printf("submit_burst error %d : '%s'\n",
-                                               err, imb_get_strerror(err));
+                                        printf("submit_burst error %d : '%s'\n", err,
+                                               imb_get_strerror(err));
                                 }
                         }
                         jobs_done += ret;
                         jobs_submitted += n;
 #else
-                        jobs_done +=
-                                IMB_SUBMIT_BURST_NOCHECK(mb_mgr, n, jobs);
+                        jobs_done += IMB_SUBMIT_BURST_NOCHECK(mb_mgr, n, jobs);
 #endif
                         num_jobs -= n;
                 }
-                jobs_done +=
-                        IMB_FLUSH_BURST(mb_mgr, IMB_MAX_BURST_SIZE, jobs);
+                jobs_done += IMB_FLUSH_BURST(mb_mgr, IMB_MAX_BURST_SIZE, jobs);
 
 #ifdef DEBUG
                 if (jobs_done != jobs_submitted) {
@@ -2368,7 +2109,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                "jobs submitted (%u)\n",
                                jobs_done, jobs_submitted);
                         goto exit;
-                 }
+                }
 #endif
 
                 /* test cipher-only burst api */
@@ -2379,8 +2120,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                 uint32_t list_idx;
 
                 while (num_jobs && timebox_on) {
-                        uint32_t n_jobs =
-                                (num_jobs / burst_size) ? burst_size : num_jobs;
+                        uint32_t n_jobs = (num_jobs / burst_size) ? burst_size : num_jobs;
 
                         /* set all job params */
                         for (i = 0; i < n_jobs; i++) {
@@ -2400,8 +2140,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                 job->src = get_src_buffer(index, p_buffer);
                                 job->dst = get_dst_buffer(index, p_buffer);
                                 job->enc_keys = job->dec_keys =
-                                        (const uint32_t *)
-                                        get_key_pointer(index, p_keys);
+                                        (const uint32_t *) get_key_pointer(index, p_keys);
                                 job->cipher_start_src_offset_in_bytes =
                                         jt->cipher_start_src_offset_in_bytes;
                                 job->iv = jt->iv;
@@ -2412,25 +2151,21 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                         /* submit cipher-only burst */
 #ifdef DEBUG
                         const uint32_t completed_jobs =
-                                IMB_SUBMIT_CIPHER_BURST(mb_mgr, jobs, n_jobs,
-                                                        jt->cipher_mode,
-                                                        jt->cipher_direction,
-                                                        jt->key_len_in_bytes);
+                                IMB_SUBMIT_CIPHER_BURST(mb_mgr, jobs, n_jobs, jt->cipher_mode,
+                                                        jt->cipher_direction, jt->key_len_in_bytes);
 
                         if (completed_jobs != n_jobs) {
                                 const int err = imb_get_errno(mb_mgr);
 
                                 if (err != 0) {
                                         printf("submit_cipher_burst error "
-                                               "%d : '%s'\n", err,
-                                               imb_get_strerror(err));
+                                               "%d : '%s'\n",
+                                               err, imb_get_strerror(err));
                                 }
                         }
 #else
-                        IMB_SUBMIT_CIPHER_BURST_NOCHECK(mb_mgr, jobs, n_jobs,
-                                                        jt->cipher_mode,
-                                                        jt->cipher_direction,
-                                                        jt->key_len_in_bytes);
+                        IMB_SUBMIT_CIPHER_BURST_NOCHECK(mb_mgr, jobs, n_jobs, jt->cipher_mode,
+                                                        jt->cipher_direction, jt->key_len_in_bytes);
 #endif
                         num_jobs -= n_jobs;
                 }
@@ -2444,8 +2179,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                 uint32_t list_idx;
 
                 while (num_jobs && timebox_on) {
-                        uint32_t n_jobs =
-                                (num_jobs / burst_size) ? burst_size : num_jobs;
+                        uint32_t n_jobs = (num_jobs / burst_size) ? burst_size : num_jobs;
 
                         /* set all job params */
                         for (i = 0; i < n_jobs; i++) {
@@ -2456,8 +2190,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                  * list of sizes precalculated */
                                 if (imix_list_count != 0) {
                                         list_idx = i & (JOB_SIZE_IMIX_LIST - 1);
-                                        job->msg_len_to_hash_in_bytes =
-                                                hash_size_list[list_idx];
+                                        job->msg_len_to_hash_in_bytes = hash_size_list[list_idx];
                                 } else
                                         job->msg_len_to_hash_in_bytes =
                                                 jt->msg_len_to_hash_in_bytes;
@@ -2478,21 +2211,19 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                         /* submit hash-only burst */
 #ifdef DEBUG
                         const uint32_t completed_jobs =
-                                IMB_SUBMIT_HASH_BURST(mb_mgr, jobs, n_jobs,
-                                                      jt->hash_alg);
+                                IMB_SUBMIT_HASH_BURST(mb_mgr, jobs, n_jobs, jt->hash_alg);
 
                         if (completed_jobs != n_jobs) {
                                 const int err = imb_get_errno(mb_mgr);
 
                                 if (err != 0) {
                                         printf("submit_hash_burst error "
-                                               "%d : '%s'\n", err,
-                                               imb_get_strerror(err));
+                                               "%d : '%s'\n",
+                                               err, imb_get_strerror(err));
                                 }
                         }
 #else
-                        IMB_SUBMIT_HASH_BURST_NOCHECK(mb_mgr, jobs, n_jobs,
-                                                        jt->hash_alg);
+                        IMB_SUBMIT_HASH_BURST_NOCHECK(mb_mgr, jobs, n_jobs, jt->hash_alg);
 #endif
                         num_jobs -= n_jobs;
                 }
@@ -2508,13 +2239,10 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                 *job = job_template;
 
                         if (segment_size != 0)
-                                set_sgl_job_fields(job, p_buffer, p_keys,
-                                                   i, index,
-                                                   sgl[0], &gcm_ctx[0],
-                                                   &cp_ctx[0]);
+                                set_sgl_job_fields(job, p_buffer, p_keys, i, index, sgl[0],
+                                                   &gcm_ctx[0], &cp_ctx[0]);
                         else
-                                set_job_fields(job, p_buffer, p_keys, i, index,
-                                               &job_template);
+                                set_job_fields(job, p_buffer, p_keys, i, index, &job_template);
 
                         index = get_next_index(index);
 #ifdef DEBUG
@@ -2527,9 +2255,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                                 if (job->status != IMB_STATUS_COMPLETED) {
                                         const int err = imb_get_errno(mb_mgr);
 
-                                        fprintf(stderr,
-                                                "failed job, status:%d, %s\n",
-                                                job->status,
+                                        fprintf(stderr, "failed job, status:%d, %s\n", job->status,
                                                 imb_get_strerror(err));
                                         goto exit;
                                 }
@@ -2544,14 +2270,12 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
                         if (job->status != IMB_STATUS_COMPLETED) {
                                 const int errc = imb_get_errno(mb_mgr);
 
-                                fprintf(stderr,
-                                        "failed job, status:%d, error:%d, %s\n",
-                                        job->status, errc,
-                                        imb_get_strerror(errc));
+                                fprintf(stderr, "failed job, status:%d, error:%d, %s\n",
+                                        job->status, errc, imb_get_strerror(errc));
                                 goto exit;
                         }
 #else
-                        (void)job;
+                        (void) job;
 #endif
                 }
 
@@ -2583,8 +2307,7 @@ do_test(IMB_MGR *mb_mgr, struct params_s *params,
 #else /* _WIN32 */
                 /* delete all timeboxes in the timer queue */
                 if (!DeleteTimerQueue(hTimeboxQueue))
-                        fprintf(stderr, "DeleteTimerQueue() error %u\n",
-                                (unsigned) GetLastError());
+                        fprintf(stderr, "DeleteTimerQueue() error %u\n", (unsigned) GetLastError());
 #endif
 
                 /* calculate return value */
@@ -2608,12 +2331,9 @@ exit:
 
 static void
 run_gcm_sgl(aes_gcm_init_t init, aes_gcm_enc_dec_update_t update,
-            aes_gcm_enc_dec_finalize_t finalize,
-            struct gcm_key_data *gdata_key,
-            struct gcm_context_data *gdata_ctx,
-            uint8_t *p_buffer, uint32_t buf_size,
-            const void *aad, const uint64_t aad_size,
-            const uint32_t num_iter)
+            aes_gcm_enc_dec_finalize_t finalize, struct gcm_key_data *gdata_key,
+            struct gcm_context_data *gdata_ctx, uint8_t *p_buffer, uint32_t buf_size,
+            const void *aad, const uint64_t aad_size, const uint32_t num_iter)
 {
         uint32_t i;
         static uint32_t index = 0;
@@ -2634,17 +2354,12 @@ run_gcm_sgl(aes_gcm_init_t init, aes_gcm_enc_dec_update_t update,
 
                         init(gdata_key, gdata_ctx, iv, aad, aad_size);
                         for (j = 0; j < num_segs; j++)
-                                update(gdata_key, gdata_ctx,
-                                       &pb[j*segment_size],
-                                       &pb[j*segment_size],
-                                       segment_size);
+                                update(gdata_key, gdata_ctx, &pb[j * segment_size],
+                                       &pb[j * segment_size], segment_size);
                         if (final_seg_sz != 0)
-                                update(gdata_key, gdata_ctx,
-                                       &pb[j*segment_size],
-                                       &pb[j*segment_size],
-                                       final_seg_sz);
-                        finalize(gdata_key, gdata_ctx, auth_tag,
-                                 sizeof(auth_tag));
+                                update(gdata_key, gdata_ctx, &pb[j * segment_size],
+                                       &pb[j * segment_size], final_seg_sz);
+                        finalize(gdata_key, gdata_ctx, auth_tag, sizeof(auth_tag));
 
                         index = get_next_index(index);
                 }
@@ -2657,8 +2372,7 @@ run_gcm_sgl(aes_gcm_init_t init, aes_gcm_enc_dec_update_t update,
 
                         init(gdata_key, gdata_ctx, iv, aad, aad_size);
                         update(gdata_key, gdata_ctx, pb, pb, buf_size);
-                        finalize(gdata_key, gdata_ctx, auth_tag,
-                                 sizeof(auth_tag));
+                        finalize(gdata_key, gdata_ctx, auth_tag, sizeof(auth_tag));
 
                         index = get_next_index(index);
                 }
@@ -2666,12 +2380,9 @@ run_gcm_sgl(aes_gcm_init_t init, aes_gcm_enc_dec_update_t update,
 }
 
 static void
-run_gcm(aes_gcm_enc_dec_t enc_dec,
-        struct gcm_key_data *gdata_key,
-        struct gcm_context_data *gdata_ctx,
-        uint8_t *p_buffer, uint32_t buf_size,
-        const void *aad, const uint64_t aad_size,
-        const uint32_t num_iter)
+run_gcm(aes_gcm_enc_dec_t enc_dec, struct gcm_key_data *gdata_key,
+        struct gcm_context_data *gdata_ctx, uint8_t *p_buffer, uint32_t buf_size, const void *aad,
+        const uint64_t aad_size, const uint32_t num_iter)
 {
         uint32_t i;
         uint32_t index = 0;
@@ -2684,9 +2395,8 @@ run_gcm(aes_gcm_enc_dec_t enc_dec,
                 if (imix_list_count != 0)
                         buf_size = get_next_size(i);
 
-                enc_dec(gdata_key, gdata_ctx, pb, pb,
-                        buf_size, iv, aad, aad_size,
-                        auth_tag, sizeof(auth_tag));
+                enc_dec(gdata_key, gdata_ctx, pb, pb, buf_size, iv, aad, aad_size, auth_tag,
+                        sizeof(auth_tag));
 
                 index = get_next_index(index);
         }
@@ -2694,9 +2404,8 @@ run_gcm(aes_gcm_enc_dec_t enc_dec,
 
 /* Performs test using GCM */
 static uint64_t
-do_test_gcm(struct params_s *params,
-            const uint32_t num_iter, IMB_MGR *mb_mgr,
-            uint8_t *p_buffer, imb_uint128_t *p_keys)
+do_test_gcm(struct params_s *params, const uint32_t num_iter, IMB_MGR *mb_mgr, uint8_t *p_buffer,
+            imb_uint128_t *p_keys)
 {
         static DECLARE_ALIGNED(struct gcm_key_data gdata_key, 512);
         static DECLARE_ALIGNED(struct gcm_context_data gdata_ctx, 64);
@@ -2748,54 +2457,35 @@ do_test_gcm(struct params_s *params,
 
                 if (params->aes_key_size == IMB_KEY_128_BYTES) {
                         if (use_gcm_sgl_api)
-                                run_gcm_sgl(mb_mgr->gcm128_init,
-                                            mb_mgr->gcm128_enc_update,
-                                            mb_mgr->gcm128_enc_finalize,
-                                            &gdata_key, &gdata_ctx,
-                                            p_buffer, params->size_aes,
-                                            aad, params->aad_size,
+                                run_gcm_sgl(mb_mgr->gcm128_init, mb_mgr->gcm128_enc_update,
+                                            mb_mgr->gcm128_enc_finalize, &gdata_key, &gdata_ctx,
+                                            p_buffer, params->size_aes, aad, params->aad_size,
                                             num_iter);
                         else
-                                run_gcm(mb_mgr->gcm128_enc,
-                                        &gdata_key, &gdata_ctx,
-                                        p_buffer, params->size_aes,
-                                        aad, params->aad_size,
-                                        num_iter);
+                                run_gcm(mb_mgr->gcm128_enc, &gdata_key, &gdata_ctx, p_buffer,
+                                        params->size_aes, aad, params->aad_size, num_iter);
                 } else if (params->aes_key_size == IMB_KEY_192_BYTES) {
                         if (use_gcm_sgl_api)
-                                run_gcm_sgl(mb_mgr->gcm192_init,
-                                            mb_mgr->gcm192_enc_update,
-                                            mb_mgr->gcm192_enc_finalize,
-                                            &gdata_key, &gdata_ctx,
-                                            p_buffer, params->size_aes,
-                                            aad, params->aad_size,
+                                run_gcm_sgl(mb_mgr->gcm192_init, mb_mgr->gcm192_enc_update,
+                                            mb_mgr->gcm192_enc_finalize, &gdata_key, &gdata_ctx,
+                                            p_buffer, params->size_aes, aad, params->aad_size,
                                             num_iter);
                         else
-                                run_gcm(mb_mgr->gcm192_enc,
-                                        &gdata_key, &gdata_ctx,
-                                        p_buffer, params->size_aes,
-                                        aad, params->aad_size,
-                                        num_iter);
+                                run_gcm(mb_mgr->gcm192_enc, &gdata_key, &gdata_ctx, p_buffer,
+                                        params->size_aes, aad, params->aad_size, num_iter);
                 } else { /* 256 */
                         if (use_gcm_sgl_api)
-                                run_gcm_sgl(mb_mgr->gcm256_init,
-                                            mb_mgr->gcm256_enc_update,
-                                            mb_mgr->gcm256_enc_finalize,
-                                            &gdata_key, &gdata_ctx,
-                                            p_buffer, params->size_aes,
-                                            aad, params->aad_size,
+                                run_gcm_sgl(mb_mgr->gcm256_init, mb_mgr->gcm256_enc_update,
+                                            mb_mgr->gcm256_enc_finalize, &gdata_key, &gdata_ctx,
+                                            p_buffer, params->size_aes, aad, params->aad_size,
                                             num_iter);
                         else
-                                run_gcm(mb_mgr->gcm256_enc,
-                                        &gdata_key, &gdata_ctx,
-                                        p_buffer, params->size_aes,
-                                        aad, params->aad_size,
-                                        num_iter);
+                                run_gcm(mb_mgr->gcm256_enc, &gdata_key, &gdata_ctx, p_buffer,
+                                        params->size_aes, aad, params->aad_size, num_iter);
                 }
 #ifndef _WIN32
                 if (use_unhalted_cycles)
-                        time = (read_cycles(params->core) -
-                                rd_cycles_cost) - time;
+                        time = (read_cycles(params->core) - rd_cycles_cost) - time;
                 else
 #endif
                         time = __rdtscp(&aux) - time;
@@ -2809,54 +2499,35 @@ do_test_gcm(struct params_s *params,
 
                 if (params->aes_key_size == IMB_KEY_128_BYTES) {
                         if (use_gcm_sgl_api)
-                                run_gcm_sgl(mb_mgr->gcm128_init,
-                                            mb_mgr->gcm128_dec_update,
-                                            mb_mgr->gcm128_dec_finalize,
-                                            &gdata_key, &gdata_ctx,
-                                            p_buffer, params->size_aes,
-                                            aad, params->aad_size,
+                                run_gcm_sgl(mb_mgr->gcm128_init, mb_mgr->gcm128_dec_update,
+                                            mb_mgr->gcm128_dec_finalize, &gdata_key, &gdata_ctx,
+                                            p_buffer, params->size_aes, aad, params->aad_size,
                                             num_iter);
                         else
-                                run_gcm(mb_mgr->gcm128_dec,
-                                        &gdata_key, &gdata_ctx,
-                                        p_buffer, params->size_aes,
-                                        aad, params->aad_size,
-                                        num_iter);
+                                run_gcm(mb_mgr->gcm128_dec, &gdata_key, &gdata_ctx, p_buffer,
+                                        params->size_aes, aad, params->aad_size, num_iter);
                 } else if (params->aes_key_size == IMB_KEY_192_BYTES) {
                         if (use_gcm_sgl_api)
-                                run_gcm_sgl(mb_mgr->gcm192_init,
-                                            mb_mgr->gcm192_dec_update,
-                                            mb_mgr->gcm192_dec_finalize,
-                                            &gdata_key, &gdata_ctx,
-                                            p_buffer, params->size_aes,
-                                            aad, params->aad_size,
+                                run_gcm_sgl(mb_mgr->gcm192_init, mb_mgr->gcm192_dec_update,
+                                            mb_mgr->gcm192_dec_finalize, &gdata_key, &gdata_ctx,
+                                            p_buffer, params->size_aes, aad, params->aad_size,
                                             num_iter);
                         else
-                                run_gcm(mb_mgr->gcm192_dec,
-                                        &gdata_key, &gdata_ctx,
-                                        p_buffer, params->size_aes,
-                                        aad, params->aad_size,
-                                        num_iter);
+                                run_gcm(mb_mgr->gcm192_dec, &gdata_key, &gdata_ctx, p_buffer,
+                                        params->size_aes, aad, params->aad_size, num_iter);
                 } else { /* 256 */
                         if (use_gcm_sgl_api)
-                                run_gcm_sgl(mb_mgr->gcm256_init,
-                                            mb_mgr->gcm256_dec_update,
-                                            mb_mgr->gcm256_dec_finalize,
-                                            &gdata_key, &gdata_ctx,
-                                            p_buffer, params->size_aes,
-                                            aad, params->aad_size,
+                                run_gcm_sgl(mb_mgr->gcm256_init, mb_mgr->gcm256_dec_update,
+                                            mb_mgr->gcm256_dec_finalize, &gdata_key, &gdata_ctx,
+                                            p_buffer, params->size_aes, aad, params->aad_size,
                                             num_iter);
                         else
-                                run_gcm(mb_mgr->gcm256_dec,
-                                        &gdata_key, &gdata_ctx,
-                                        p_buffer, params->size_aes,
-                                        aad, params->aad_size,
-                                        num_iter);
+                                run_gcm(mb_mgr->gcm256_dec, &gdata_key, &gdata_ctx, p_buffer,
+                                        params->size_aes, aad, params->aad_size, num_iter);
                 }
 #ifndef _WIN32
                 if (use_unhalted_cycles)
-                        time = (read_cycles(params->core) -
-                                rd_cycles_cost) - time;
+                        time = (read_cycles(params->core) - rd_cycles_cost) - time;
                 else
 #endif
                         time = __rdtscp(&aux) - time;
@@ -2873,8 +2544,7 @@ do_test_gcm(struct params_s *params,
 
 /* Performs test using CHACHA20-POLY1305 direct API */
 static uint64_t
-do_test_chacha_poly(struct params_s *params,
-                    const uint32_t num_iter, IMB_MGR *mb_mgr,
+do_test_chacha_poly(struct params_s *params, const uint32_t num_iter, IMB_MGR *mb_mgr,
                     uint8_t *p_buffer, imb_uint128_t *p_keys)
 {
         uint8_t key[32];
@@ -2926,50 +2596,36 @@ do_test_chacha_poly(struct params_s *params,
                         }
                 }
 
-                IMB_CHACHA20_POLY1305_INIT(mb_mgr, key, &chacha_ctx, iv,
-                                           aad, params->aad_size);
+                IMB_CHACHA20_POLY1305_INIT(mb_mgr, key, &chacha_ctx, iv, aad, params->aad_size);
 
                 if (params->cipher_dir == IMB_DIR_ENCRYPT) {
                         for (j = 0; j < num_segs; j++)
-                                IMB_CHACHA20_POLY1305_ENC_UPDATE(mb_mgr, key,
-                                                         &chacha_ctx,
-                                                         &pb[j*segment_size],
-                                                         &pb[j*segment_size],
-                                                         segment_size);
+                                IMB_CHACHA20_POLY1305_ENC_UPDATE(
+                                        mb_mgr, key, &chacha_ctx, &pb[j * segment_size],
+                                        &pb[j * segment_size], segment_size);
                         if (final_seg_sz != 0)
-                                IMB_CHACHA20_POLY1305_ENC_UPDATE(mb_mgr, key,
-                                                         &chacha_ctx,
-                                                         &pb[j*segment_size],
-                                                         &pb[j*segment_size],
-                                                         final_seg_sz);
-                        IMB_CHACHA20_POLY1305_ENC_FINALIZE(mb_mgr,
-                                                           &chacha_ctx,
-                                                           auth_tag,
+                                IMB_CHACHA20_POLY1305_ENC_UPDATE(
+                                        mb_mgr, key, &chacha_ctx, &pb[j * segment_size],
+                                        &pb[j * segment_size], final_seg_sz);
+                        IMB_CHACHA20_POLY1305_ENC_FINALIZE(mb_mgr, &chacha_ctx, auth_tag,
                                                            sizeof(auth_tag));
                 } else { /* IMB_DIR_DECRYPT */
                         for (j = 0; j < num_segs; j++)
-                                IMB_CHACHA20_POLY1305_ENC_UPDATE(mb_mgr, key,
-                                                         &chacha_ctx,
-                                                         &pb[j*segment_size],
-                                                         &pb[j*segment_size],
-                                                         segment_size);
+                                IMB_CHACHA20_POLY1305_ENC_UPDATE(
+                                        mb_mgr, key, &chacha_ctx, &pb[j * segment_size],
+                                        &pb[j * segment_size], segment_size);
                         if (final_seg_sz != 0)
-                                IMB_CHACHA20_POLY1305_DEC_UPDATE(mb_mgr, key,
-                                                         &chacha_ctx,
-                                                         &pb[j*segment_size],
-                                                         &pb[j*segment_size],
-                                                         final_seg_sz);
-                        IMB_CHACHA20_POLY1305_DEC_FINALIZE(mb_mgr,
-                                                           &chacha_ctx,
-                                                           auth_tag,
+                                IMB_CHACHA20_POLY1305_DEC_UPDATE(
+                                        mb_mgr, key, &chacha_ctx, &pb[j * segment_size],
+                                        &pb[j * segment_size], final_seg_sz);
+                        IMB_CHACHA20_POLY1305_DEC_FINALIZE(mb_mgr, &chacha_ctx, auth_tag,
                                                            sizeof(auth_tag));
                 }
                 index = get_next_index(index);
         }
 #ifndef _WIN32
         if (use_unhalted_cycles)
-                time = (read_cycles(params->core) -
-                        rd_cycles_cost) - time;
+                time = (read_cycles(params->core) - rd_cycles_cost) - time;
         else
 #endif
                 time = __rdtscp(&aux) - time;
@@ -2984,9 +2640,8 @@ do_test_chacha_poly(struct params_s *params,
 
 /* Performs test using GCM */
 static uint64_t
-do_test_ghash(struct params_s *params,
-              const uint32_t num_iter, IMB_MGR *mb_mgr,
-              uint8_t *p_buffer, imb_uint128_t *p_keys)
+do_test_ghash(struct params_s *params, const uint32_t num_iter, IMB_MGR *mb_mgr, uint8_t *p_buffer,
+              imb_uint128_t *p_keys)
 {
         static DECLARE_ALIGNED(struct gcm_key_data gdata_key, 512);
         uint64_t time = 0;
@@ -3008,8 +2663,7 @@ do_test_ghash(struct params_s *params,
                         uint8_t *pb = get_dst_buffer(index, p_buffer);
                         const uint32_t buf_size = get_next_size(i);
 
-                        IMB_GHASH(mb_mgr, &gdata_key, pb, buf_size,
-                                  auth_tag, sizeof(auth_tag));
+                        IMB_GHASH(mb_mgr, &gdata_key, pb, buf_size, auth_tag, sizeof(auth_tag));
                         index = get_next_index(index);
                 }
         } else {
@@ -3017,16 +2671,14 @@ do_test_ghash(struct params_s *params,
                         uint8_t *pb = get_dst_buffer(index, p_buffer);
                         const uint32_t buf_size = params->size_aes;
 
-                        IMB_GHASH(mb_mgr, &gdata_key, pb, buf_size,
-                                  auth_tag, sizeof(auth_tag));
+                        IMB_GHASH(mb_mgr, &gdata_key, pb, buf_size, auth_tag, sizeof(auth_tag));
                         index = get_next_index(index);
                 }
         }
 
 #ifndef _WIN32
         if (use_unhalted_cycles)
-                time = (read_cycles(params->core) -
-                        rd_cycles_cost) - time;
+                time = (read_cycles(params->core) - rd_cycles_cost) - time;
         else
 #endif
                 time = __rdtscp(&aux) - time;
@@ -3039,8 +2691,7 @@ do_test_ghash(struct params_s *params,
 
 /* Computes mean of set of times after dropping bottom and top quarters */
 static uint64_t
-mean_median(uint64_t *array, uint32_t size,
-            uint8_t *p_buffer, imb_uint128_t *p_keys)
+mean_median(uint64_t *array, uint32_t size, uint8_t *p_buffer, imb_uint128_t *p_keys)
 {
         const uint32_t quarter = size / 4;
         uint32_t i;
@@ -3060,7 +2711,6 @@ mean_median(uint64_t *array, uint32_t size,
         array += quarter;
         size -= quarter * 2;
 
-
         if ((size == 0) || (size & 0x80000000)) {
                 fprintf(stderr, "Not enough data points!\n");
                 free_mem(&p_buffer, &p_keys);
@@ -3076,10 +2726,9 @@ mean_median(uint64_t *array, uint32_t size,
 
 /* Runs test for each buffer size and stores averaged execution time */
 static void
-process_variant(IMB_MGR *mgr, const enum arch_type_e arch,
-                struct params_s *params,
-                struct variant_s *variant_ptr, const uint32_t run,
-                uint8_t *p_buffer, imb_uint128_t *p_keys)
+process_variant(IMB_MGR *mgr, const enum arch_type_e arch, struct params_s *params,
+                struct variant_s *variant_ptr, const uint32_t run, uint8_t *p_buffer,
+                imb_uint128_t *p_keys)
 {
         uint32_t sizes = params->num_sizes;
         uint64_t *times = &variant_ptr->avg_times[run];
@@ -3091,8 +2740,7 @@ process_variant(IMB_MGR *mgr, const enum arch_type_e arch,
 
         for (sz = 0; sz < sizes; sz++) {
                 if (job_size_count == 0)
-                        size_aes = job_sizes[RANGE_MIN] +
-                                        (sz * job_sizes[RANGE_STEP]);
+                        size_aes = job_sizes[RANGE_MIN] + (sz * job_sizes[RANGE_STEP]);
                 else
                         size_aes = job_size_list[sz];
 
@@ -3116,48 +2764,37 @@ process_variant(IMB_MGR *mgr, const enum arch_type_e arch,
                  * (only allowed for GCM/CCM)
                  */
                 if (size_aes == 0 && params->aad_size != 0)
-                        num_iter = (iter_scale >= (uint32_t)params->aad_size) ?
-                                   (iter_scale / (uint32_t)params->aad_size) :
-                                   1;
+                        num_iter = (iter_scale >= (uint32_t) params->aad_size)
+                                           ? (iter_scale / (uint32_t) params->aad_size)
+                                           : 1;
                 else if (size_aes != 0)
-                        num_iter = (iter_scale >= size_aes) ?
-                                   (iter_scale / size_aes) : 1;
+                        num_iter = (iter_scale >= size_aes) ? (iter_scale / size_aes) : 1;
                 else
                         num_iter = iter_scale;
 
                 params->size_aes = size_aes;
                 if (params->cipher_mode == TEST_GCM && (!use_job_api)) {
                         if (job_iter == 0)
-                                *times = do_test_gcm(params, 2 * num_iter, mgr,
-                                                     p_buffer, p_keys);
+                                *times = do_test_gcm(params, 2 * num_iter, mgr, p_buffer, p_keys);
                         else
-                                *times = do_test_gcm(params, job_iter, mgr,
-                                                     p_buffer, p_keys);
-                } else if (params->cipher_mode == TEST_AEAD_CHACHA20 &&
-                           (!use_job_api)) {
+                                *times = do_test_gcm(params, job_iter, mgr, p_buffer, p_keys);
+                } else if (params->cipher_mode == TEST_AEAD_CHACHA20 && (!use_job_api)) {
                         if (job_iter == 0)
-                                *times = do_test_chacha_poly(params,
-                                                     2 * num_iter, mgr,
-                                                     p_buffer, p_keys);
+                                *times = do_test_chacha_poly(params, 2 * num_iter, mgr, p_buffer,
+                                                             p_keys);
                         else
-                                *times = do_test_chacha_poly(params,
-                                                     job_iter, mgr,
-                                                     p_buffer, p_keys);
-                } else if (params->hash_alg == TEST_AUTH_GHASH &&
-                           (!use_job_api)) {
+                                *times = do_test_chacha_poly(params, job_iter, mgr, p_buffer,
+                                                             p_keys);
+                } else if (params->hash_alg == TEST_AUTH_GHASH && (!use_job_api)) {
                         if (job_iter == 0)
-                                *times = do_test_ghash(params, 2 * num_iter,
-                                                       mgr, p_buffer, p_keys);
+                                *times = do_test_ghash(params, 2 * num_iter, mgr, p_buffer, p_keys);
                         else
-                                *times = do_test_ghash(params, job_iter, mgr,
-                                                       p_buffer, p_keys);
+                                *times = do_test_ghash(params, job_iter, mgr, p_buffer, p_keys);
                 } else {
                         if (job_iter == 0)
-                                *times = do_test(mgr, params, num_iter,
-                                                 p_buffer, p_keys);
+                                *times = do_test(mgr, params, num_iter, p_buffer, p_keys);
                         else
-                                *times = do_test(mgr, params, job_iter,
-                                                 p_buffer, p_keys);
+                                *times = do_test(mgr, params, job_iter, p_buffer, p_keys);
                 }
                 times += NUM_RUNS;
         }
@@ -3168,9 +2805,8 @@ process_variant(IMB_MGR *mgr, const enum arch_type_e arch,
 
 /* Generates output containing averaged times for each test variant */
 static void
-print_times(struct variant_s *variant_list, struct params_s *params,
-            const uint32_t total_variants, uint8_t *p_buffer,
-            imb_uint128_t *p_keys)
+print_times(struct variant_s *variant_list, struct params_s *params, const uint32_t total_variants,
+            uint8_t *p_buffer, imb_uint128_t *p_keys)
 {
         /* If IMIX is used, only show the average size */
         const uint32_t sizes = (imix_list_count != 0) ? 1 : params->num_sizes;
@@ -3178,35 +2814,77 @@ print_times(struct variant_s *variant_list, struct params_s *params,
         uint32_t sz;
 
         if (plot_output_option == 0) {
-                const char *func_names[4] = {
-                        "SSE", "AVX", "AVX2", "AVX512"
-                };
-                const char *c_mode_names[TEST_NUM_CIPHER_TESTS - 1] = {
-                        "CBC", "CNTR", "CNTR+8", "CNTR_BITLEN", "CNTR_BITLEN4",
-                        "ECB", "CBCS_1_9", "NULL_CIPHER", "DOCAES", "DOCAES+8",
-                        "DOCDES", "DOCDES+4", "GCM", "CCM", "DES", "3DES",
-                        "PON", "PON_NO_CTR", "ZUC_EEA3", "SNOW3G_UEA2_BITLEN",
-                        "KASUMI_UEA1_BITLEN", "CHACHA20", "CHACHA20_AEAD",
-                        "SNOW_V", "SNOW_V_AEAD"
-                };
-                const char *c_dir_names[2] = {
-                        "ENCRYPT", "DECRYPT"
-                };
-                const char *h_alg_names[TEST_NUM_HASH_TESTS - 1] = {
-                        "SHA1_HMAC", "SHA_224_HMAC", "SHA_256_HMAC",
-                        "SHA_384_HMAC", "SHA_512_HMAC", "XCBC",
-                        "MD5", "CMAC", "SHA1", "SHA_224", "SHA_256",
-                        "SHA_384", "SHA_512", "CMAC_BITLEN", "CMAC_256",
-                        "NULL_HASH", "CRC32", "GCM", "CUSTOM", "CCM",
-                        "BIP-CRC32", "ZUC_EIA3_BITLEN", "SNOW3G_UIA2_BITLEN",
-                        "KASUMI_UIA1", "GMAC-128", "GMAC-192", "GMAC-256",
-                        "POLY1305", "POLY1305_AEAD", "ZUC256_EIA3",
-                        "SNOW_V_AEAD", "CRC32_ETH_FCS", "CRC32_SCTP",
-                        "CRC32_WIMAX_DATA", "CRC24_LTE_A", "CR24_LTE_B",
-                        "CR16_X25", "CRC16_FP_DATA", "CRC11_FP_HEADER",
-                        "CRC10_IUUP_DATA", "CRC8_WIMAX_HCS", "CRC7_FP_HEADER",
-                        "CRC6_IUUP_HEADER", "GHASH"
-                };
+                const char *func_names[4] = { "SSE", "AVX", "AVX2", "AVX512" };
+                const char *c_mode_names[TEST_NUM_CIPHER_TESTS - 1] = { "CBC",
+                                                                        "CNTR",
+                                                                        "CNTR+8",
+                                                                        "CNTR_BITLEN",
+                                                                        "CNTR_BITLEN4",
+                                                                        "ECB",
+                                                                        "CBCS_1_9",
+                                                                        "NULL_CIPHER",
+                                                                        "DOCAES",
+                                                                        "DOCAES+8",
+                                                                        "DOCDES",
+                                                                        "DOCDES+4",
+                                                                        "GCM",
+                                                                        "CCM",
+                                                                        "DES",
+                                                                        "3DES",
+                                                                        "PON",
+                                                                        "PON_NO_CTR",
+                                                                        "ZUC_EEA3",
+                                                                        "SNOW3G_UEA2_BITLEN",
+                                                                        "KASUMI_UEA1_BITLEN",
+                                                                        "CHACHA20",
+                                                                        "CHACHA20_AEAD",
+                                                                        "SNOW_V",
+                                                                        "SNOW_V_AEAD" };
+                const char *c_dir_names[2] = { "ENCRYPT", "DECRYPT" };
+                const char *h_alg_names[TEST_NUM_HASH_TESTS - 1] = { "SHA1_HMAC",
+                                                                     "SHA_224_HMAC",
+                                                                     "SHA_256_HMAC",
+                                                                     "SHA_384_HMAC",
+                                                                     "SHA_512_HMAC",
+                                                                     "XCBC",
+                                                                     "MD5",
+                                                                     "CMAC",
+                                                                     "SHA1",
+                                                                     "SHA_224",
+                                                                     "SHA_256",
+                                                                     "SHA_384",
+                                                                     "SHA_512",
+                                                                     "CMAC_BITLEN",
+                                                                     "CMAC_256",
+                                                                     "NULL_HASH",
+                                                                     "CRC32",
+                                                                     "GCM",
+                                                                     "CUSTOM",
+                                                                     "CCM",
+                                                                     "BIP-CRC32",
+                                                                     "ZUC_EIA3_BITLEN",
+                                                                     "SNOW3G_UIA2_BITLEN",
+                                                                     "KASUMI_UIA1",
+                                                                     "GMAC-128",
+                                                                     "GMAC-192",
+                                                                     "GMAC-256",
+                                                                     "POLY1305",
+                                                                     "POLY1305_AEAD",
+                                                                     "ZUC256_EIA3",
+                                                                     "SNOW_V_AEAD",
+                                                                     "CRC32_ETH_FCS",
+                                                                     "CRC32_SCTP",
+                                                                     "CRC32_WIMAX_DATA",
+                                                                     "CRC24_LTE_A",
+                                                                     "CR24_LTE_B",
+                                                                     "CR16_X25",
+                                                                     "CRC16_FP_DATA",
+                                                                     "CRC11_FP_HEADER",
+                                                                     "CRC10_IUUP_DATA",
+                                                                     "CRC8_WIMAX_HCS",
+                                                                     "CRC7_FP_HEADER",
+                                                                     "CRC6_IUUP_HEADER",
+                                                                     "GHASH" };
                 struct params_s par;
 
                 printf("ARCH");
@@ -3252,16 +2930,13 @@ print_times(struct variant_s *variant_list, struct params_s *params,
                 if (imix_list_count != 0)
                         printf("%u", average_job_size);
                 else if (job_size_count == 0)
-                        printf("%d", job_sizes[RANGE_MIN] +
-                                     (sz * job_sizes[RANGE_STEP]));
+                        printf("%d", job_sizes[RANGE_MIN] + (sz * job_sizes[RANGE_STEP]));
                 else
                         printf("%d", job_size_list[sz]);
                 for (col = 0; col < total_variants; col++) {
-                        uint64_t *time_ptr =
-                                &variant_list[col].avg_times[sz * NUM_RUNS];
+                        uint64_t *time_ptr = &variant_list[col].avg_times[sz * NUM_RUNS];
                         const unsigned long long val =
-                                mean_median(time_ptr, NUM_RUNS,
-                                            p_buffer, p_keys);
+                                mean_median(time_ptr, NUM_RUNS, p_buffer, p_keys);
 
                         printf("\t%llu", val);
                 }
@@ -3278,7 +2953,7 @@ static void *
 run_tests(void *arg)
 {
         uint32_t i;
-        struct thread_info *info = (struct thread_info *)arg;
+        struct thread_info *info = (struct thread_info *) arg;
         IMB_MGR *p_mgr = NULL;
         struct params_s params;
         enum arch_type_e arch;
@@ -3311,13 +2986,15 @@ run_tests(void *arg)
         else
                 params.num_sizes = job_size_count;
 
-        params.core = (uint32_t)info->core;
+        params.core = (uint32_t) info->core;
 
         /* if cores selected then set affinity */
         if (core_mask)
                 if (set_affinity(info->core) != 0) {
-                        fprintf(stderr, "Failed to set cpu "
-                                "affinity on core %d\n", info->core);
+                        fprintf(stderr,
+                                "Failed to set cpu "
+                                "affinity on core %d\n",
+                                info->core);
                         goto exit_failure;
                 }
 
@@ -3328,21 +3005,24 @@ run_tests(void *arg)
 
                 ret = start_cycles_ctr(params.core);
                 if (ret != 0) {
-                        fprintf(stderr, "Failed to start cycles "
-                                "counter on core %u\n", params.core);
+                        fprintf(stderr,
+                                "Failed to start cycles "
+                                "counter on core %u\n",
+                                params.core);
                         goto exit_failure;
                 }
                 /* Get average cost of reading counter */
                 ret = set_avg_unhalted_cycle_cost(params.core, &rd_cycles_cost);
                 if (ret != 0 || rd_cycles_cost == 0) {
                         fprintf(stderr, "Error calculating unhalted "
-                                "cycles read overhead!\n");
+                                        "cycles read overhead!\n");
                         goto exit_failure;
                 } else
-                        fprintf(stderr, "Started counting unhalted cycles on "
+                        fprintf(stderr,
+                                "Started counting unhalted cycles on "
                                 "core %u\nUnhalted cycles read cost = %lu "
-                                "cycles\n", params.core,
-                                (unsigned long)rd_cycles_cost);
+                                "cycles\n",
+                                params.core, (unsigned long) rd_cycles_cost);
         }
 
         init_mem(&buf, &keys);
@@ -3360,12 +3040,12 @@ run_tests(void *arg)
         }
 
         if (info->print_info && !silent_progress_bar)
-                fprintf(stderr, "Total number of combinations (algos, "
+                fprintf(stderr,
+                        "Total number of combinations (algos, "
                         "key sizes, cipher directions) to test = %u\n",
                         total_variants);
 
-        variant_list = (struct variant_s *)
-                malloc(total_variants * sizeof(struct variant_s));
+        variant_list = (struct variant_s *) malloc(total_variants * sizeof(struct variant_s));
         if (variant_list == NULL) {
                 fprintf(stderr, "Cannot allocate memory\n");
                 goto exit_failure;
@@ -3373,8 +3053,7 @@ run_tests(void *arg)
         memset(variant_list, 0, total_variants * sizeof(struct variant_s));
 
         at_size = NUM_RUNS * params.num_sizes * sizeof(uint64_t);
-        for (variant = 0, variant_ptr = variant_list;
-             variant < total_variants;
+        for (variant = 0, variant_ptr = variant_list; variant < total_variants;
              variant++, variant_ptr++) {
                 variant_ptr->avg_times = (uint64_t *) malloc(at_size);
                 if (!variant_ptr->avg_times) {
@@ -3385,9 +3064,8 @@ run_tests(void *arg)
 
         for (run = 0; run < NUM_RUNS; run++) {
                 if (info->print_info)
-                        fprintf(stderr, "\nStarting run %u of %d%c",
-                                run + 1, NUM_RUNS,
-                                silent_progress_bar ? '\r' : '\n' );
+                        fprintf(stderr, "\nStarting run %u of %d%c", run + 1, NUM_RUNS,
+                                silent_progress_bar ? '\r' : '\n');
 
                 variant = 0;
                 variant_ptr = variant_list;
@@ -3429,8 +3107,7 @@ run_tests(void *arg)
                                 goto exit_failure;
                         }
 
-                        process_variant(p_mgr, arch, &params,
-                                        variant_ptr, run, buf, keys);
+                        process_variant(p_mgr, arch, &params, variant_ptr, run, buf, keys);
 
                         /* update and print progress bar */
                         if (info->print_info)
@@ -3481,9 +3158,11 @@ exit_failure:
  * =========================================================
  */
 
-static void usage(void)
+static void
+usage(void)
 {
-        fprintf(stderr, "Usage: imb-perf <ALGORITHM> [ARGS]\n"
+        fprintf(stderr,
+                "Usage: imb-perf <ALGORITHM> [ARGS]\n"
                 "\nALGORITHM can be one or more of:\n"
                 "--cipher-algo: Select cipher algorithm to run on the custom test\n"
                 "--hash-algo: Select hash algorithm to run on the custom test\n"
@@ -3552,8 +3231,8 @@ static void usage(void)
 }
 
 static int
-get_next_num_arg(const char * const *argv, const int index, const int argc,
-                 void *dst, const size_t dst_size)
+get_next_num_arg(const char *const *argv, const int index, const int argc, void *dst,
+                 const size_t dst_size)
 {
         char *endptr = NULL;
         uint64_t val;
@@ -3574,27 +3253,26 @@ get_next_num_arg(const char * const *argv, const int index, const int argc,
         val = strtoull(argv[index + 1], &endptr, 0);
 #endif
         if (endptr == argv[index + 1] || (endptr != NULL && *endptr != '\0')) {
-                fprintf(stderr, "Error converting '%s' as value for '%s'!\n",
-                        argv[index + 1], argv[index]);
+                fprintf(stderr, "Error converting '%s' as value for '%s'!\n", argv[index + 1],
+                        argv[index]);
                 exit(EXIT_FAILURE);
         }
 
         switch (dst_size) {
         case (sizeof(uint8_t)):
-                *((uint8_t *)dst) = (uint8_t) val;
+                *((uint8_t *) dst) = (uint8_t) val;
                 break;
         case (sizeof(uint16_t)):
-                *((uint16_t *)dst) = (uint16_t) val;
+                *((uint16_t *) dst) = (uint16_t) val;
                 break;
         case (sizeof(uint32_t)):
-                *((uint32_t *)dst) = (uint32_t) val;
+                *((uint32_t *) dst) = (uint32_t) val;
                 break;
         case (sizeof(uint64_t)):
-                *((uint64_t *)dst) = val;
+                *((uint64_t *) dst) = val;
                 break;
         default:
-                fprintf(stderr, "%s() invalid dst_size %u!\n",
-                        __func__, (unsigned) dst_size);
+                fprintf(stderr, "%s() invalid dst_size %u!\n", __func__, (unsigned) dst_size);
                 exit(EXIT_FAILURE);
                 break;
         }
@@ -3605,10 +3283,8 @@ get_next_num_arg(const char * const *argv, const int index, const int argc,
 static int
 detect_arch(unsigned int arch_support[NUM_ARCHS])
 {
-        const uint64_t detect_sse =
-                IMB_FEATURE_SSE4_2 | IMB_FEATURE_CMOV | IMB_FEATURE_AESNI;
-        const uint64_t detect_avx =
-                IMB_FEATURE_AVX | IMB_FEATURE_CMOV | IMB_FEATURE_AESNI;
+        const uint64_t detect_sse = IMB_FEATURE_SSE4_2 | IMB_FEATURE_CMOV | IMB_FEATURE_AESNI;
+        const uint64_t detect_avx = IMB_FEATURE_AVX | IMB_FEATURE_CMOV | IMB_FEATURE_AESNI;
         const uint64_t detect_avx2 = IMB_FEATURE_AVX2 | detect_avx;
         const uint64_t detect_avx512 = IMB_FEATURE_AVX512_SKX | detect_avx2;
         IMB_MGR *p_mgr = NULL;
@@ -3650,8 +3326,7 @@ detect_arch(unsigned int arch_support[NUM_ARCHS])
  * with it.
  */
 static const union params *
-check_string_arg(const char *param, const char *arg,
-                 const struct str_value_mapping *map,
+check_string_arg(const char *param, const char *arg, const struct str_value_mapping *map,
                  const unsigned int num_avail_opts)
 {
         unsigned int i;
@@ -3677,8 +3352,8 @@ exit:
 }
 
 static int
-parse_list(const char * const *argv, const int index, const int argc,
-           uint32_t *list, uint32_t *min, uint32_t *max)
+parse_list(const char *const *argv, const int index, const int argc, uint32_t *list, uint32_t *min,
+           uint32_t *max)
 {
         char *token;
         uint32_t number;
@@ -3721,8 +3396,7 @@ parse_list(const char * const *argv, const int index, const int argc,
 
         while (token != NULL) {
                 if (count == MAX_LIST) {
-                        fprintf(stderr, "Using only the first %d sizes\n",
-                                MAX_LIST);
+                        fprintf(stderr, "Using only the first %d sizes\n", MAX_LIST);
                         break;
                 }
 
@@ -3756,14 +3430,13 @@ err_list:
 }
 
 static int
-parse_range(const char * const *argv, const int index, const int argc,
+parse_range(const char *const *argv, const int index, const int argc,
             uint32_t range_values[NUM_RANGE])
 {
         char *token;
         uint32_t number;
         unsigned int i;
 
-
         if (range_values == NULL || argv == NULL || index < 0 || argc < 0) {
                 fprintf(stderr, "%s() internal error!\n", __func__);
                 exit(EXIT_FAILURE);
@@ -3803,7 +3476,7 @@ parse_range(const char * const *argv, const int index, const int argc,
 
         if (range_values[RANGE_MAX] < range_values[RANGE_MIN]) {
                 fprintf(stderr, "Maximum value of range cannot be lower "
-                        "than minimum value\n");
+                                "than minimum value\n");
                 exit(EXIT_FAILURE);
         }
 
@@ -3815,16 +3488,13 @@ parse_range(const char * const *argv, const int index, const int argc,
         goto end_range;
 no_range:
         /* Try parsing as a list/single value */
-        job_size_count = parse_list(argv, index, argc, job_size_list,
-                                    &job_sizes[RANGE_MIN],
+        job_size_count = parse_list(argv, index, argc, job_size_list, &job_sizes[RANGE_MIN],
                                     &job_sizes[RANGE_MAX]);
 end_range:
         free(copy_arg);
         return (index + 1);
-
 }
 
-
 /**
  * @brief Update table of supported architectures
  *
@@ -3836,10 +3506,8 @@ end_range:
 static int
 detect_best_arch(uint8_t arch_support[NUM_ARCHS])
 {
-        const uint64_t detect_sse =
-                IMB_FEATURE_SSE4_2 | IMB_FEATURE_CMOV | IMB_FEATURE_AESNI;
-        const uint64_t detect_avx =
-                IMB_FEATURE_AVX | IMB_FEATURE_CMOV | IMB_FEATURE_AESNI;
+        const uint64_t detect_sse = IMB_FEATURE_SSE4_2 | IMB_FEATURE_CMOV | IMB_FEATURE_AESNI;
+        const uint64_t detect_avx = IMB_FEATURE_AVX | IMB_FEATURE_CMOV | IMB_FEATURE_AESNI;
         const uint64_t detect_avx2 = IMB_FEATURE_AVX2 | detect_avx;
         const uint64_t detect_avx512 = IMB_FEATURE_AVX512_SKX | detect_avx2;
         IMB_MGR *p_mgr = NULL;
@@ -3889,7 +3557,8 @@ detect_best_arch(uint8_t arch_support[NUM_ARCHS])
 /**
  * @brief Print system and application information
  */
-static void print_info(void)
+static void
+print_info(void)
 {
         uint32_t i;
         uint32_t supported_archs[NUM_ARCHS];
@@ -3911,8 +3580,7 @@ static void print_info(void)
 
         for (i = 0; i < DIM(arch_str_map); i++)
                 if (arch_tab[i]) {
-                        printf("Best architecture: %s\n",
-                               arch_str_map[i].name);
+                        printf("Best architecture: %s\n", arch_str_map[i].name);
                         break;
                 }
 
@@ -3934,12 +3602,13 @@ static void print_info(void)
 
         return;
 
- print_info_err:
+print_info_err:
         fprintf(stderr, "%s() error!\n", __func__);
         exit(EXIT_FAILURE);
 }
 
-int main(int argc, char *argv[])
+int
+main(int argc, char *argv[])
 {
         uint32_t num_t = 0;
         int i, core = 0;
@@ -3991,8 +3660,7 @@ int main(int argc, char *argv[])
                 } else if (strcmp(argv[i], "--plot") == 0) {
                         plot_output_option = 1;
                 } else if (strcmp(argv[i], "--arch") == 0) {
-                        values = check_string_arg(argv[i], argv[i+1],
-                                                  arch_str_map,
+                        values = check_string_arg(argv[i], argv[i + 1], arch_str_map,
                                                   DIM(arch_str_map));
                         if (values == NULL)
                                 return EXIT_FAILURE;
@@ -4008,107 +3676,87 @@ int main(int argc, char *argv[])
                         if (detect_best_arch(archs) != 0)
                                 return EXIT_FAILURE;
                 } else if (strcmp(argv[i], "--cipher-algo") == 0) {
-                        values = check_string_arg(argv[i], argv[i+1],
-                                        cipher_algo_str_map,
-                                        DIM(cipher_algo_str_map));
+                        values = check_string_arg(argv[i], argv[i + 1], cipher_algo_str_map,
+                                                  DIM(cipher_algo_str_map));
                         if (values == NULL)
                                 return EXIT_FAILURE;
 
-                        custom_job_params.cipher_mode =
-                                        values->job_params.cipher_mode;
-                        custom_job_params.aes_key_size =
-                                        values->job_params.aes_key_size;
+                        custom_job_params.cipher_mode = values->job_params.cipher_mode;
+                        custom_job_params.aes_key_size = values->job_params.aes_key_size;
                         cipher_algo_set = 1;
                         i++;
                 } else if (strcmp(argv[i], "--cipher-dir") == 0) {
-                        values = check_string_arg(argv[i], argv[i+1],
-                                        cipher_dir_str_map,
-                                        DIM(cipher_dir_str_map));
+                        values = check_string_arg(argv[i], argv[i + 1], cipher_dir_str_map,
+                                                  DIM(cipher_dir_str_map));
                         if (values == NULL)
                                 return EXIT_FAILURE;
 
-                        custom_job_params.cipher_dir =
-                                        values->job_params.cipher_dir;
+                        custom_job_params.cipher_dir = values->job_params.cipher_dir;
                         cipher_dir_set = 1;
                         i++;
                 } else if (strcmp(argv[i], "--hash-algo") == 0) {
-                        values = check_string_arg(argv[i], argv[i+1],
-                                        hash_algo_str_map,
-                                        DIM(hash_algo_str_map));
+                        values = check_string_arg(argv[i], argv[i + 1], hash_algo_str_map,
+                                                  DIM(hash_algo_str_map));
                         if (values == NULL)
                                 return EXIT_FAILURE;
 
-                        custom_job_params.hash_alg =
-                                        values->job_params.hash_alg;
+                        custom_job_params.hash_alg = values->job_params.hash_alg;
                         hash_algo_set = 1;
                         i++;
                 } else if (strcmp(argv[i], "--aead-algo") == 0) {
-                        values = check_string_arg(argv[i], argv[i+1],
-                                        aead_algo_str_map,
-                                        DIM(aead_algo_str_map));
+                        values = check_string_arg(argv[i], argv[i + 1], aead_algo_str_map,
+                                                  DIM(aead_algo_str_map));
                         if (values == NULL)
                                 return EXIT_FAILURE;
 
-                        custom_job_params.cipher_mode =
-                                        values->job_params.cipher_mode;
-                        custom_job_params.aes_key_size =
-                                        values->job_params.aes_key_size;
-                        custom_job_params.hash_alg =
-                                        values->job_params.hash_alg;
+                        custom_job_params.cipher_mode = values->job_params.cipher_mode;
+                        custom_job_params.aes_key_size = values->job_params.aes_key_size;
+                        custom_job_params.hash_alg = values->job_params.hash_alg;
                         aead_algo_set = 1;
                         i++;
                 } else if (strcmp(argv[i], "-o") == 0) {
-                        i = get_next_num_arg((const char * const *)argv, i,
-                                             argc, &sha_size_incr,
+                        i = get_next_num_arg((const char *const *) argv, i, argc, &sha_size_incr,
                                              sizeof(sha_size_incr));
                 } else if (strcmp(argv[i], "--job-size") == 0) {
                         /* Try parsing the argument as a range first */
-                        i = parse_range((const char * const *)argv, i, argc,
-                                          job_sizes);
+                        i = parse_range((const char *const *) argv, i, argc, job_sizes);
                         if (job_sizes[RANGE_MAX] > JOB_SIZE_TOP) {
-                                fprintf(stderr,
-                                       "Invalid job size %u (max %d)\n",
-                                       (unsigned) job_sizes[RANGE_MAX],
-                                       JOB_SIZE_TOP);
+                                fprintf(stderr, "Invalid job size %u (max %d)\n",
+                                        (unsigned) job_sizes[RANGE_MAX], JOB_SIZE_TOP);
                                 return EXIT_FAILURE;
                         }
                 } else if (strcmp(argv[i], "--imix") == 0) {
-                        imix_list_count = parse_list((const char * const *)argv,
-                                          i, argc, imix_list, NULL, NULL);
+                        imix_list_count = parse_list((const char *const *) argv, i, argc, imix_list,
+                                                     NULL, NULL);
                         if (imix_list_count == 0) {
-                                fprintf(stderr,
-                                       "Invalid IMIX distribution list\n");
+                                fprintf(stderr, "Invalid IMIX distribution list\n");
                                 return EXIT_FAILURE;
                         }
                         i++;
                 } else if (strcmp(argv[i], "--aad-size") == 0) {
                         /* Get AAD size for both GCM and CCM */
-                        i = get_next_num_arg((const char * const *)argv, i,
-                                             argc, &gcm_aad_size,
+                        i = get_next_num_arg((const char *const *) argv, i, argc, &gcm_aad_size,
                                              sizeof(gcm_aad_size));
                         if (gcm_aad_size > AAD_SIZE_MAX) {
-                                fprintf(stderr,
-                                        "Invalid AAD size %u (max %d)!\n",
-                                        (unsigned) gcm_aad_size,
-                                        AAD_SIZE_MAX);
+                                fprintf(stderr, "Invalid AAD size %u (max %d)!\n",
+                                        (unsigned) gcm_aad_size, AAD_SIZE_MAX);
                                 return EXIT_FAILURE;
                         }
                         ccm_aad_size = gcm_aad_size;
                         chacha_poly_aad_size = gcm_aad_size;
                         snow_v_aad_size = gcm_aad_size;
                 } else if (strcmp(argv[i], "--job-iter") == 0) {
-                        i = get_next_num_arg((const char * const *)argv, i,
-                                             argc, &job_iter, sizeof(job_iter));
+                        i = get_next_num_arg((const char *const *) argv, i, argc, &job_iter,
+                                             sizeof(job_iter));
                 } else if (strcmp(argv[i], "--threads") == 0) {
-                        i = get_next_num_arg((const char * const *)argv, i,
-                                             argc, &num_t, sizeof(num_t));
+                        i = get_next_num_arg((const char *const *) argv, i, argc, &num_t,
+                                             sizeof(num_t));
                         if (num_t > (MAX_NUM_THREADS + 1)) {
                                 fprintf(stderr, "Invalid number of threads!\n");
                                 return EXIT_FAILURE;
                         }
                 } else if (strcmp(argv[i], "--cores") == 0) {
-                        i = get_next_num_arg((const char * const *)argv, i,
-                                             argc, &core_mask,
+                        i = get_next_num_arg((const char *const *) argv, i, argc, &core_mask,
                                              sizeof(core_mask));
                 } else if (strcmp(argv[i], "--unhalted-cycles") == 0) {
                         use_unhalted_cycles = 1;
@@ -4122,8 +3770,8 @@ int main(int argc, char *argv[])
                 } else if (strcmp(argv[i], "--no-tsc-detect") == 0) {
                         tsc_detect = 0;
                 } else if (strcmp(argv[i], "--tag-size") == 0) {
-                        i = get_next_num_arg((const char * const *)argv, i,
-                                             argc, &tag_size, sizeof(tag_size));
+                        i = get_next_num_arg((const char *const *) argv, i, argc, &tag_size,
+                                             sizeof(tag_size));
                 } else if (strcmp(argv[i], "--burst-api") == 0) {
                         test_api = TEST_API_BURST;
                 } else if (strcmp(argv[i], "--cipher-burst-api") == 0) {
@@ -4131,21 +3779,23 @@ int main(int argc, char *argv[])
                 } else if (strcmp(argv[i], "--hash-burst-api") == 0) {
                         test_api = TEST_API_HASH_BURST;
                 } else if (strcmp(argv[i], "--burst-size") == 0) {
-                        i = get_next_num_arg((const char * const *)argv, i,
-                                             argc, &burst_size,
+                        i = get_next_num_arg((const char *const *) argv, i, argc, &burst_size,
                                              sizeof(burst_size));
                         if (burst_size > (MAX_BURST_SIZE)) {
-                                fprintf(stderr, "Burst size cannot be "
-                                        "more than %d\n", MAX_BURST_SIZE);
+                                fprintf(stderr,
+                                        "Burst size cannot be "
+                                        "more than %d\n",
+                                        MAX_BURST_SIZE);
                                 return EXIT_FAILURE;
                         }
                 } else if (strcmp(argv[i], "--segment-size") == 0) {
-                        i = get_next_num_arg((const char * const *)argv, i,
-                                             argc, &segment_size,
+                        i = get_next_num_arg((const char *const *) argv, i, argc, &segment_size,
                                              sizeof(segment_size));
                         if (segment_size > (JOB_SIZE_TOP)) {
-                                fprintf(stderr, "Segment size cannot be "
-                                        "more than %d\n", JOB_SIZE_TOP);
+                                fprintf(stderr,
+                                        "Segment size cannot be "
+                                        "more than %d\n",
+                                        JOB_SIZE_TOP);
                                 return EXIT_FAILURE;
                         }
                 } else if (strcmp(argv[i], "--no-time-box") == 0) {
@@ -4153,8 +3803,7 @@ int main(int argc, char *argv[])
                 } else if (strcmp(argv[i], "--quic-api") == 0) {
                         quic_api_test = 1;
                 } else if (strcmp(argv[i], "--buffer-offset") == 0) {
-                        i = get_next_num_arg((const char * const *)argv, i,
-                                             argc, &buffer_offset,
+                        i = get_next_num_arg((const char *const *) argv, i, argc, &buffer_offset,
                                              sizeof(buffer_offset));
                         if (buffer_offset > 15) {
                                 fprintf(stderr,
@@ -4170,8 +3819,8 @@ int main(int argc, char *argv[])
 
         if (burst_size != 0 && test_api == TEST_API_JOB) {
                 fprintf(stderr, "--burst-size can only be used with "
-                        "--burst-api, --cipher-burst-api or "
-                        "--hash-burst-api options\n");
+                                "--burst-api, --cipher-burst-api or "
+                                "--hash-burst-api options\n");
                 return EXIT_FAILURE;
         }
 
@@ -4179,11 +3828,10 @@ int main(int argc, char *argv[])
                 burst_size = DEFAULT_BURST_SIZE;
 
         /* currently only AES-CBC & CTR supported by cipher-only burst API */
-        if (test_api == TEST_API_CIPHER_BURST &&
-            (custom_job_params.cipher_mode != TEST_CBC &&
-             custom_job_params.cipher_mode != TEST_CNTR)) {
+        if (test_api == TEST_API_CIPHER_BURST && (custom_job_params.cipher_mode != TEST_CBC &&
+                                                  custom_job_params.cipher_mode != TEST_CNTR)) {
                 fprintf(stderr, "Unsupported cipher-only burst "
-                        "API algorithm selected\n");
+                                "API algorithm selected\n");
                 return EXIT_FAILURE;
         }
 
@@ -4194,23 +3842,22 @@ int main(int argc, char *argv[])
              (custom_job_params.hash_alg != TEST_SHA_256_HMAC) &&
              (custom_job_params.hash_alg != TEST_SHA_384_HMAC) &&
              (custom_job_params.hash_alg != TEST_SHA_512_HMAC))) {
-                fprintf(stderr,
-                        "Unsupported hash-only burst API algorithm selected\n");
+                fprintf(stderr, "Unsupported hash-only burst API algorithm selected\n");
                 return EXIT_FAILURE;
         }
 
-        if (aead_algo_set == 0 && cipher_algo_set == 0 &&
-            hash_algo_set == 0 && quic_api_test == 0) {
+        if (aead_algo_set == 0 && cipher_algo_set == 0 && hash_algo_set == 0 &&
+            quic_api_test == 0) {
                 fprintf(stderr, "No cipher, hash or "
-                        "AEAD algorithms selected\n");
+                                "AEAD algorithms selected\n");
                 usage();
                 return EXIT_FAILURE;
         }
 
         if (aead_algo_set && (cipher_algo_set || hash_algo_set)) {
                 fprintf(stderr, "AEAD algorithm cannot be used "
-                        "combined with another cipher/hash "
-                        "algorithm\n");
+                                "combined with another cipher/hash "
+                                "algorithm\n");
                 return EXIT_FAILURE;
         }
 
@@ -4222,8 +3869,7 @@ int main(int argc, char *argv[])
 
         if (custom_job_params.cipher_mode == TEST_CCM) {
                 if (ccm_aad_size > CCM_AAD_SIZE_MAX) {
-                        fprintf(stderr, "AAD cannot be higher than %d in CCM\n",
-                                CCM_AAD_SIZE_MAX);
+                        fprintf(stderr, "AAD cannot be higher than %d in CCM\n", CCM_AAD_SIZE_MAX);
                         return EXIT_FAILURE;
                 }
         }
@@ -4232,64 +3878,55 @@ int main(int argc, char *argv[])
 
         if ((imix_list_count != 0)) {
                 if (imix_list_count != job_size_count) {
-                        fprintf(stderr,
-                                "IMIX distribution list must have the same "
-                                "number of items as the job list\n");
+                        fprintf(stderr, "IMIX distribution list must have the same "
+                                        "number of items as the job list\n");
                         return EXIT_FAILURE;
                 }
-                job_size_imix_list = malloc(JOB_SIZE_IMIX_LIST*4);
+                job_size_imix_list = malloc(JOB_SIZE_IMIX_LIST * 4);
                 if (job_size_imix_list == NULL) {
-                        fprintf(stderr,
-                                "Memory allocation for IMIX list failed\n");
+                        fprintf(stderr, "Memory allocation for IMIX list failed\n");
                         return EXIT_FAILURE;
                 }
 
                 num_sizes_list = JOB_SIZE_IMIX_LIST;
-		/*
-		 * Calculate accumulated distribution of
-		 * probabilities per job size
-		 */
-		distribution_total[0] = imix_list[0];
-		for (i = 1; i < (int)imix_list_count; i++)
-			distribution_total[i] = imix_list[i] +
-				distribution_total[i-1];
-
-		/* Calculate a random sequence of packet sizes,
+                /*
+                 * Calculate accumulated distribution of
+                 * probabilities per job size
+                 */
+                distribution_total[0] = imix_list[0];
+                for (i = 1; i < (int) imix_list_count; i++)
+                        distribution_total[i] = imix_list[i] + distribution_total[i - 1];
+
+                /* Calculate a random sequence of packet sizes,
                    based on distribution */
-		for (i = 0; i < (int)JOB_SIZE_IMIX_LIST; i++) {
-			uint16_t random_number = rand() %
-				distribution_total[imix_list_count - 1];
+                for (i = 0; i < (int) JOB_SIZE_IMIX_LIST; i++) {
+                        uint16_t random_number = rand() % distribution_total[imix_list_count - 1];
                         uint16_t j;
 
-			for (j = 0; j < imix_list_count; j++)
-				if (random_number < distribution_total[j])
-					break;
+                        for (j = 0; j < imix_list_count; j++)
+                                if (random_number < distribution_total[j])
+                                        break;
 
-			job_size_imix_list[i] = job_size_list[j];
-		}
+                        job_size_imix_list[i] = job_size_list[j];
+                }
 
-		/* Calculate average buffer size for the IMIX distribution */
-		for (i = 0; i < (int)imix_list_count; i++)
-			average_job_size += job_size_list[i] *
-				imix_list[i];
+                /* Calculate average buffer size for the IMIX distribution */
+                for (i = 0; i < (int) imix_list_count; i++)
+                        average_job_size += job_size_list[i] * imix_list[i];
 
-		average_job_size /=
-				distribution_total[imix_list_count - 1];
+                average_job_size /= distribution_total[imix_list_count - 1];
         }
-        cipher_size_list = (uint32_t *) malloc(sizeof(uint32_t) *
-                                num_sizes_list);
+        cipher_size_list = (uint32_t *) malloc(sizeof(uint32_t) * num_sizes_list);
         if (cipher_size_list == NULL) {
                 fprintf(stderr, "Could not malloc cipher size list\n");
                 exit(EXIT_FAILURE);
         }
-        hash_size_list = (uint32_t *) malloc(sizeof(uint32_t) *
-                                num_sizes_list);
+        hash_size_list = (uint32_t *) malloc(sizeof(uint32_t) * num_sizes_list);
         if (hash_size_list == NULL) {
                 fprintf(stderr, "Could not malloc hash size list\n");
                 exit(EXIT_FAILURE);
         }
-        xgem_hdr_list = (uint64_t *) malloc(sizeof(uint64_t) *
-                                num_sizes_list);
+        xgem_hdr_list = (uint64_t *) malloc(sizeof(uint64_t) * num_sizes_list);
         if (xgem_hdr_list == NULL) {
                 fprintf(stderr, "Could not malloc xgem hdr list\n");
                 exit(EXIT_FAILURE);
@@ -4297,13 +3934,14 @@ int main(int argc, char *argv[])
 
         if (job_sizes[RANGE_MIN] == 0 && aead_algo_set == 0) {
                 fprintf(stderr, "Buffer size cannot be 0 unless only "
-                        "an AEAD algorithm is tested\n");
+                                "an AEAD algorithm is tested\n");
                 return EXIT_FAILURE;
         }
 
         /* Check num cores >= number of threads */
         if ((core_mask != 0 && num_t != 0) && (num_t > bitcount(core_mask))) {
-                fprintf(stderr, "Insufficient number of cores in "
+                fprintf(stderr,
+                        "Insufficient number of cores in "
                         "core mask (0x%lx) to run %u threads!\n",
                         (unsigned long) core_mask, num_t);
                 return EXIT_FAILURE;
@@ -4311,10 +3949,9 @@ int main(int argc, char *argv[])
 
         /* Check timebox option vs number of threads bigger than 1 */
         if (use_timebox && num_t > 1) {
-                fprintf(stderr,
-                        "Time-box feature, enabled by default, doesn't work "
-                        "safely with number of threads bigger than one! Please "
-                        "use '--no-time-box' option to disable\n");
+                fprintf(stderr, "Time-box feature, enabled by default, doesn't work "
+                                "safely with number of threads bigger than one! Please "
+                                "use '--no-time-box' option to disable\n");
                 return EXIT_FAILURE;
         }
 
@@ -4322,7 +3959,7 @@ int main(int argc, char *argv[])
         if (use_unhalted_cycles) {
                 if (core_mask == 0) {
                         fprintf(stderr, "Must specify core mask "
-                                "when reading unhalted cycles!\n");
+                                        "when reading unhalted cycles!\n");
                         return EXIT_FAILURE;
                 }
 
@@ -4339,10 +3976,8 @@ int main(int argc, char *argv[])
         for (arch_id = 0; arch_id < NUM_ARCHS; arch_id++) {
                 if (archs[arch_id] == 1 && arch_support[arch_id] == 0) {
                         archs[arch_id] = 0;
-                        fprintf(stderr,
-                                "%s not supported. Disabling %s tests\n",
-                                arch_str_map[arch_id].name,
-                                arch_str_map[arch_id].name);
+                        fprintf(stderr, "%s not supported. Disabling %s tests\n",
+                                arch_str_map[arch_id].name, arch_str_map[arch_id].name);
                 }
         }
 
@@ -4372,8 +4007,7 @@ int main(int argc, char *argv[])
                 "Buffer offset = %u\n"
                 "Tool version: %s\n"
                 "Library version: %s\n",
-                sha_size_incr, buffer_offset,
-                IMB_VERSION_STR, imb_get_version_str());
+                sha_size_incr, buffer_offset, IMB_VERSION_STR, imb_get_version_str());
 
         if (!use_job_api)
                 fprintf(stderr, "API type: direct\n");
@@ -4386,10 +4020,10 @@ int main(int argc, char *argv[])
         }
 
         if (custom_job_params.cipher_mode == TEST_GCM)
-                fprintf(stderr, "GCM AAD = %"PRIu64"\n", gcm_aad_size);
+                fprintf(stderr, "GCM AAD = %" PRIu64 "\n", gcm_aad_size);
 
         if (custom_job_params.cipher_mode == TEST_CCM)
-                fprintf(stderr, "CCM AAD = %"PRIu64"\n", ccm_aad_size);
+                fprintf(stderr, "CCM AAD = %" PRIu64 "\n", ccm_aad_size);
 
         if (archs[ARCH_SSE]) {
                 IMB_MGR *p_mgr = alloc_mb_mgr(flags);
@@ -4400,8 +4034,7 @@ int main(int argc, char *argv[])
                 }
                 init_mb_mgr_sse(p_mgr);
                 fprintf(stderr, "%s SHA extensions (shani) for SSE arch\n",
-                        (p_mgr->features & IMB_FEATURE_SHANI) ?
-                        "Using" : "Not using");
+                        (p_mgr->features & IMB_FEATURE_SHANI) ? "Using" : "Not using");
                 free_mb_mgr(p_mgr);
         }
 
@@ -4431,21 +4064,19 @@ int main(int argc, char *argv[])
                         /* Allocate MB manager for each thread */
                         thread_info_p->p_mgr = alloc_mb_mgr(flags);
                         if (thread_info_p->p_mgr == NULL) {
-                                fprintf(stderr, "Failed to allocate MB_MGR "
+                                fprintf(stderr,
+                                        "Failed to allocate MB_MGR "
                                         "structure for thread %u!\n",
-                                        (unsigned)(n + 1));
+                                        (unsigned) (n + 1));
                                 exit(EXIT_FAILURE);
                         }
 #ifdef _WIN32
-                        threads[n] = (HANDLE)
-                                _beginthread(&run_tests, 0,
-                                             (void *)thread_info_p);
+                        threads[n] = (HANDLE) _beginthread(&run_tests, 0, (void *) thread_info_p);
 #else
                         pthread_attr_t attr;
 
                         pthread_attr_init(&attr);
-                        pthread_create(&tids[n], &attr, run_tests,
-                                       (void *)thread_info_p);
+                        pthread_create(&tids[n], &attr, run_tests, (void *) thread_info_p);
 #endif
                 }
         }
@@ -4454,7 +4085,7 @@ int main(int argc, char *argv[])
         thread_info_p->p_mgr = alloc_mb_mgr(flags);
         if (thread_info_p->p_mgr == NULL) {
                 fprintf(stderr, "Failed to allocate MB_MGR "
-                        "structure for main thread!\n");
+                                "structure for main thread!\n");
                 exit(EXIT_FAILURE);
         }
         if (core_mask) {
@@ -4462,7 +4093,7 @@ int main(int argc, char *argv[])
                 thread_info_p->core = core;
         }
 
-        run_tests((void *)thread_info_p);
+        run_tests((void *) thread_info_p);
         if (num_t > 1) {
                 uint32_t n;
 
@@ -4470,8 +4101,7 @@ int main(int argc, char *argv[])
                 WaitForMultipleObjects(num_t, threads, FALSE, INFINITE);
 #endif
                 for (n = 0; n < (num_t - 1); n++) {
-                        fprintf(stderr, "Waiting on thread %u to finish...\n",
-                                (unsigned)(n + 2));
+                        fprintf(stderr, "Waiting on thread %u to finish...\n", (unsigned) (n + 2));
 #ifdef _WIN32
                         CloseHandle(threads[n]);
 #else
diff --git a/perf/misc.h b/perf/misc.h
index 0f6b504d..2883728b 100644
--- a/perf/misc.h
+++ b/perf/misc.h
@@ -33,4 +33,5 @@
  *
  * @return Number of TSC cycles measured while in fixed cost loop
  */
-uint64_t measure_tsc(const uint64_t cycles);
+uint64_t
+measure_tsc(const uint64_t cycles);
diff --git a/perf/msr.c b/perf/msr.c
index b0e9df6c..6e1498dc 100644
--- a/perf/msr.c
+++ b/perf/msr.c
@@ -56,9 +56,9 @@
 
 #include "msr.h"
 
-static int *m_msr_fd = NULL;           /**< MSR driver file descriptors table */
-static unsigned m_maxcores = 0;        /**< max number of cores (size of the
-                                          table above too) */
+static int *m_msr_fd = NULL;    /**< MSR driver file descriptors table */
+static unsigned m_maxcores = 0; /**< max number of cores (size of the
+                                   table above too) */
 #ifdef _WIN32
 #ifdef WIN_MSR
 union msr_data {
@@ -131,7 +131,7 @@ machine_init(const unsigned max_core_id)
          * Each file descriptor is for a different core.
          * Core id is an index to the table.
          */
-        m_msr_fd = (int *)malloc(m_maxcores * sizeof(m_msr_fd[0]));
+        m_msr_fd = (int *) malloc(m_maxcores * sizeof(m_msr_fd[0]));
         if (m_msr_fd == NULL) {
                 m_maxcores = 0;
                 return MACHINE_RETVAL_ERROR;
@@ -195,8 +195,7 @@ msr_file_open(const unsigned lcore)
                 char fname[32];
 
                 memset(fname, 0, sizeof(fname));
-                snprintf(fname, sizeof(fname)-1,
-                         "/dev/cpu/%u/msr", lcore);
+                snprintf(fname, sizeof(fname) - 1, "/dev/cpu/%u/msr", lcore);
                 fd = open(fname, O_RDWR);
                 if (fd < 0)
                         fprintf(stderr, "Error opening file '%s'!\n", fname);
@@ -209,9 +208,7 @@ msr_file_open(const unsigned lcore)
 #endif /* _WIN32 */
 
 int
-msr_read(const unsigned lcore,
-         const uint32_t reg,
-         uint64_t * const value)
+msr_read(const unsigned lcore, const uint32_t reg, uint64_t *const value)
 {
         int ret = MACHINE_RETVAL_OK;
 #ifdef _WIN32
@@ -234,8 +231,7 @@ msr_read(const unsigned lcore,
 #ifdef _WIN32
 #ifdef WIN_MSR
         msr.ui64 = 0;
-        status = RdmsrTx((DWORD)reg, &(msr.ui32.low),
-                         &(msr.ui32.high), (1ULL << lcore));
+        status = RdmsrTx((DWORD) reg, &(msr.ui32.low), &(msr.ui32.high), (1ULL << lcore));
         if (status)
                 *value = msr.ui64;
         else
@@ -249,22 +245,19 @@ msr_read(const unsigned lcore,
         if (fd < 0)
                 return MACHINE_RETVAL_ERROR;
 
-        read_ret = pread(fd, value, sizeof(value[0]), (off_t)reg);
+        read_ret = pread(fd, value, sizeof(value[0]), (off_t) reg);
 
         if (read_ret != sizeof(value[0]))
                 ret = MACHINE_RETVAL_ERROR;
 #endif /* _WIN32 */
         if (ret != MACHINE_RETVAL_OK)
-                fprintf(stderr, "RDMSR failed for reg[0x%x] on lcore %u\n",
-                        (unsigned)reg, lcore);
+                fprintf(stderr, "RDMSR failed for reg[0x%x] on lcore %u\n", (unsigned) reg, lcore);
 
         return ret;
 }
 
 int
-msr_write(const unsigned lcore,
-          const uint32_t reg,
-          const uint64_t value)
+msr_write(const unsigned lcore, const uint32_t reg, const uint64_t value)
 {
         int ret = MACHINE_RETVAL_OK;
 #ifdef _WIN32
@@ -284,8 +277,7 @@ msr_write(const unsigned lcore,
 #ifdef _WIN32
 #ifdef WIN_MSR
         msr.ui64 = value;
-        status = WrmsrTx((DWORD)reg, msr.ui32.low,
-                         msr.ui32.high, (1ULL << lcore));
+        status = WrmsrTx((DWORD) reg, msr.ui32.low, msr.ui32.high, (1ULL << lcore));
         if (!status)
                 ret = MACHINE_RETVAL_ERROR;
 #endif /* WIN_MSR */
@@ -297,15 +289,16 @@ msr_write(const unsigned lcore,
         if (fd < 0)
                 return MACHINE_RETVAL_ERROR;
 
-        write_ret = pwrite(fd, &value, sizeof(value), (off_t)reg);
+        write_ret = pwrite(fd, &value, sizeof(value), (off_t) reg);
 
         if (write_ret != sizeof(value))
                 ret = MACHINE_RETVAL_ERROR;
 #endif /* _WIN32 */
         if (ret != MACHINE_RETVAL_OK)
-                fprintf(stderr, "WRMSR failed for reg[0x%x] "
+                fprintf(stderr,
+                        "WRMSR failed for reg[0x%x] "
                         "<- value[0x%llx] on lcore %u\n",
-                        (unsigned)reg, (unsigned long long)value, lcore);
+                        (unsigned) reg, (unsigned long long) value, lcore);
 
         return ret;
 }
diff --git a/perf/msr.h b/perf/msr.h
index 5757352b..19dcd58c 100644
--- a/perf/msr.h
+++ b/perf/msr.h
@@ -44,18 +44,17 @@
 extern "C" {
 #endif
 
-
 #ifdef DEBUG
 #define ASSERT assert
 #else
 #define ASSERT(x)
 #endif
 
-#define MACHINE_DEFAULT_MAX_COREID  255       /**< max core id */
+#define MACHINE_DEFAULT_MAX_COREID 255 /**< max core id */
 
-#define MACHINE_RETVAL_OK           0         /**< everything OK */
-#define MACHINE_RETVAL_ERROR        1         /**< generic error */
-#define MACHINE_RETVAL_PARAM        2         /**< parameter error */
+#define MACHINE_RETVAL_OK    0 /**< everything OK */
+#define MACHINE_RETVAL_ERROR 1 /**< generic error */
+#define MACHINE_RETVAL_PARAM 2 /**< parameter error */
 
 /**
  * @brief Initializes machine module
@@ -67,7 +66,8 @@ extern "C" {
  * @return Operation status
  * @retval MACHINE_RETVAL_OK on success
  */
-int machine_init(const unsigned max_core_id);
+int
+machine_init(const unsigned max_core_id);
 
 /**
  * @brief Shuts down machine module
@@ -75,7 +75,8 @@ int machine_init(const unsigned max_core_id);
  * @return Operation status
  * @retval MACHINE_RETVAL_OK on success
  */
-int machine_fini(void);
+int
+machine_fini(void);
 
 /**
  * @brief Executes RDMSR on \a lcore logical core
@@ -88,9 +89,7 @@ int machine_fini(void);
  * @retval MACHINE_RETVAL_OK on success
  */
 int
-msr_read(const unsigned lcore,
-         const uint32_t reg,
-         uint64_t * const value);
+msr_read(const unsigned lcore, const uint32_t reg, uint64_t *const value);
 
 /**
  * @brief Executes WRMSR on \a lcore logical core
@@ -103,9 +102,7 @@ msr_read(const unsigned lcore,
  * @retval MACHINE_RETVAL_OK on success
  */
 int
-msr_write(const unsigned lcore,
-          const uint32_t reg,
-          const uint64_t value);
+msr_write(const unsigned lcore, const uint32_t reg, const uint64_t value);
 
 #ifdef __cplusplus
 }
-- 
GitLab


From eae5c32e13da1f7ffdd72003d56c0e8cade79801 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Mon, 15 May 2023 13:11:06 +0100
Subject: [PATCH 253/332] test: [KAT] fix Windows build

This commit fixes warnings such:

hmac_sha1_test.c(444): warning C4477: 'printf' : format string '%lu' requires an argument of type 'unsigned long',
but variadic argument 1 has type 'const size_t'
hmac_sha1_test.c(444): note: consider using '%zu' in the format string
---
 test/kat-app/hmac_md5_test.c           |  8 ++++----
 test/kat-app/hmac_sha1_test.c          | 10 +++++-----
 test/kat-app/hmac_sha256_sha512_test.c | 12 ++++++------
 3 files changed, 15 insertions(+), 15 deletions(-)

diff --git a/test/kat-app/hmac_md5_test.c b/test/kat-app/hmac_md5_test.c
index a531918c..5e833e94 100644
--- a/test/kat-app/hmac_md5_test.c
+++ b/test/kat-app/hmac_md5_test.c
@@ -201,8 +201,8 @@ test_hmac_md5_std_vectors(struct IMB_MGR *mb_mgr,
 	for (; v->msg != NULL; v++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("RFC2202 Test Case %lu key_len:%lu "
-                               "data_len:%lu digest_len:%lu\n",
+                        printf("RFC2202 Test Case %zu key_len:%zu "
+                               "data_len:%zu digest_len:%zu\n",
                                v->tcId,
                                v->keySize,
                                v->msgSize / 8,
@@ -215,14 +215,14 @@ test_hmac_md5_std_vectors(struct IMB_MGR *mb_mgr,
                 if (v->keySize > IMB_MD5_BLOCK_SIZE) {
 #ifdef DEBUG
                         if (!quiet_mode)
-                                printf("Skipped vector %lu, "
+                                printf("Skipped vector %zu, "
                                        "Key size larger than block size\n",
                                        v->tcId);
 #endif
                         continue;
                 }
                 if (test_hmac_md5(mb_mgr, v, num_jobs)) {
-                        printf("error #%lu\n", v->tcId);
+                        printf("error #%zu\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
diff --git a/test/kat-app/hmac_sha1_test.c b/test/kat-app/hmac_sha1_test.c
index 44bc1dcd..73ede2be 100644
--- a/test/kat-app/hmac_sha1_test.c
+++ b/test/kat-app/hmac_sha1_test.c
@@ -429,8 +429,8 @@ test_hmac_sha1_std_vectors(struct IMB_MGR *mb_mgr,
 	while (v->msg != NULL) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("RFC2202 Test Case %lu keySize:%lu "
-                               "msgSize:%lu tagSize:%lu\n",
+                        printf("RFC2202 Test Case %zu keySize:%zu "
+                               "msgSize:%zu tagSize:%zu\n",
                                v->tcId,
                                v->keySize,
                                v->msgSize / 8,
@@ -441,21 +441,21 @@ test_hmac_sha1_std_vectors(struct IMB_MGR *mb_mgr,
                 }
 
                 if (test_hmac_sha1(mb_mgr, v, num_jobs)) {
-                        printf("error #%lu\n", v->tcId);
+                        printf("error #%zu\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
                 }
                 if (test_hmac_sha1_burst(mb_mgr, v,
                                          num_jobs)) {
-                        printf("error #%lu - burst API\n", v->tcId);
+                        printf("error #%zu - burst API\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
                 }
                 if (test_hmac_sha1_hash_burst(mb_mgr, v,
                                               num_jobs)) {
-                        printf("error #%lu - hash-only burst API\n", v->tcId);
+                        printf("error #%zu - hash-only burst API\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
diff --git a/test/kat-app/hmac_sha256_sha512_test.c b/test/kat-app/hmac_sha256_sha512_test.c
index 5b41fd5a..475aecc1 100644
--- a/test/kat-app/hmac_sha256_sha512_test.c
+++ b/test/kat-app/hmac_sha256_sha512_test.c
@@ -601,8 +601,8 @@ test_hmac_shax_std_vectors(struct IMB_MGR *mb_mgr,
 	for (; v->msg != NULL; v++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("RFC4231 Test Case %lu key_len:%lu "
-                               "data_len:%lu\n",
+                        printf("RFC4231 Test Case %zu key_len:%zu "
+                               "data_len:%zu\n",
                                v->tcId,
                                v->keySize,
                                v->msgSize / 8);
@@ -620,26 +620,26 @@ test_hmac_shax_std_vectors(struct IMB_MGR *mb_mgr,
                 if (flag) {
 #ifdef DEBUG
                         if (!quiet_mode)
-                                printf("Skipped vector %lu, "
+                                printf("Skipped vector %zu, "
                                        "N/A for HMAC-SHA%d\n",
                                        v->tcId, sha_type);
 #endif
                         continue;
                 }
                 if (test_hmac_shax(mb_mgr, v, num_jobs, sha_type)) {
-                        printf("error #%lu\n", v->tcId);
+                        printf("error #%zu\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
                 }
                 if (test_hmac_shax_burst(mb_mgr, v, num_jobs, sha_type)) {
-                        printf("error #%lu - burst API\n", v->tcId);
+                        printf("error #%zu - burst API\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
                 }
                 if (test_hmac_shax_hash_burst(mb_mgr, v, num_jobs, sha_type)) {
-                        printf("error #%lu - hash-only burst API\n", v->tcId);
+                        printf("error #%zu - hash-only burst API\n", v->tcId);
                         test_suite_update(ts, 0, 1);
                 } else {
                         test_suite_update(ts, 1, 0);
-- 
GitLab


From 04967b58b07cd95727582cd9ecb19db1f349b4b2 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Thu, 11 May 2023 13:26:34 +0100
Subject: [PATCH 254/332] test: [GMAC] Minor test improvement

---
 test/kat-app/gmac_test.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/test/kat-app/gmac_test.c b/test/kat-app/gmac_test.c
index 74ed890d..f8020ffd 100644
--- a/test/kat-app/gmac_test.c
+++ b/test/kat-app/gmac_test.c
@@ -110,15 +110,12 @@ aes_gmac_job(IMB_MGR *mb_mgr,
         job->auth_tag_output_len_in_bytes     = auth_tag_len;
 
         job = IMB_SUBMIT_JOB(mb_mgr);
-        while (job) {
-                if (job->status != IMB_STATUS_COMPLETED)
-                        fprintf(stderr, "failed job, status:%d\n", job->status);
-                job = IMB_GET_COMPLETED_JOB(mb_mgr);
-        }
-        while ((job = IMB_FLUSH_JOB(mb_mgr)) != NULL) {
-                if (job->status != IMB_STATUS_COMPLETED)
-                        fprintf(stderr, "failed job, status:%d\n", job->status);
-        }
+        if (job == NULL)
+                job = IMB_FLUSH_JOB(mb_mgr);
+	if (job == NULL)
+                fprintf(stderr, "No job retrieved\n");
+	else if (job->status != IMB_STATUS_COMPLETED)
+                fprintf(stderr, "failed job, status:%d\n", job->status);
 }
 
 #define MAX_SEG_SIZE 64
-- 
GitLab


From 9a1e8da2e827d30b78d8f7c5da1a93c5d2f3f53e Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 16 May 2023 16:25:53 +0100
Subject: [PATCH 255/332] CI: [actions] use apt-get instead of apt

Use apt-get instead of apt, to avoid warning due to
usage in script.
---
 .github/workflows/linux_build_shared_clang.yml | 2 +-
 .github/workflows/linux_build_shared_gcc.yml   | 2 +-
 .github/workflows/linux_build_static_clang.yml | 2 +-
 .github/workflows/linux_build_static_gcc.yml   | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/linux_build_shared_clang.yml b/.github/workflows/linux_build_shared_clang.yml
index 193fdefc..3c474e07 100644
--- a/.github/workflows/linux_build_shared_clang.yml
+++ b/.github/workflows/linux_build_shared_clang.yml
@@ -12,7 +12,7 @@ jobs:
     runs-on: ubuntu-latest
 
     steps:
-    - run: sudo apt install -y nasm clang
+    - run: sudo apt-get install -y nasm clang
     - uses: actions/checkout@v2
       with:
         repository: intel/intel-ipsec-mb
diff --git a/.github/workflows/linux_build_shared_gcc.yml b/.github/workflows/linux_build_shared_gcc.yml
index f356cfd0..0610ce64 100644
--- a/.github/workflows/linux_build_shared_gcc.yml
+++ b/.github/workflows/linux_build_shared_gcc.yml
@@ -12,7 +12,7 @@ jobs:
     runs-on: ubuntu-latest
 
     steps:
-    - run: sudo apt install -y nasm
+    - run: sudo apt-get install -y nasm
     - uses: actions/checkout@v2
       with:
         repository: intel/intel-ipsec-mb
diff --git a/.github/workflows/linux_build_static_clang.yml b/.github/workflows/linux_build_static_clang.yml
index 0e5e678a..68e1b204 100644
--- a/.github/workflows/linux_build_static_clang.yml
+++ b/.github/workflows/linux_build_static_clang.yml
@@ -12,7 +12,7 @@ jobs:
     runs-on: ubuntu-latest
 
     steps:
-    - run: sudo apt install -y nasm clang
+    - run: sudo apt-get install -y nasm clang
     - uses: actions/checkout@v2
       with:
         repository: intel/intel-ipsec-mb
diff --git a/.github/workflows/linux_build_static_gcc.yml b/.github/workflows/linux_build_static_gcc.yml
index a4941bbc..20af6751 100644
--- a/.github/workflows/linux_build_static_gcc.yml
+++ b/.github/workflows/linux_build_static_gcc.yml
@@ -12,7 +12,7 @@ jobs:
     runs-on: ubuntu-latest
 
     steps:
-    - run: sudo apt install -y nasm
+    - run: sudo apt-get install -y nasm
     - uses: actions/checkout@v2
       with:
         repository: intel/intel-ipsec-mb
-- 
GitLab


From 2d2a624ab12405418af78f0381d8cb74c98dfcee Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Mon, 8 May 2023 15:04:54 +0100
Subject: [PATCH 256/332] test: [GHASH] Moving Test to New File

---
 test/kat-app/CMakeLists.txt |   1 +
 test/kat-app/Makefile       |   2 +-
 test/kat-app/gcm_test.c     | 140 -----------------------------
 test/kat-app/ghash_test.c   | 175 ++++++++++++++++++++++++++++++++++++
 test/kat-app/main.c         |   6 ++
 test/kat-app/win_x64.mak    |   2 +-
 6 files changed, 184 insertions(+), 142 deletions(-)
 create mode 100644 test/kat-app/ghash_test.c

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 5971003b..47d13d52 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -75,6 +75,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/direct_api_param_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/quic_ecb_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/gmac_test.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/ghash_test.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha1.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha224.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha256.json.c
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index 926069a2..342327b2 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -38,7 +38,7 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
 	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c hmac_sha512.json.c \
-	hmac_md5.json.c gmac_test.json.c \
+	hmac_md5.json.c gmac_test.json.c ghash_test.c\
 	gmac_test.c
 OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
diff --git a/test/kat-app/gcm_test.c b/test/kat-app/gcm_test.c
index 70ed41c4..adb4716d 100644
--- a/test/kat-app/gcm_test.c
+++ b/test/kat-app/gcm_test.c
@@ -814,71 +814,6 @@ static uint8_t T22[] = {
         0x4b, 0x15, 0x3c, 0x8d, 0x48, 0xa1, 0x79, 0x30
 };
 
-/* GHASH vectors */
-static uint8_t K23[] = {
-        0xA1, 0xF6, 0x25, 0x8C, 0x87, 0x7D, 0x5F, 0xCD,
-        0x89, 0x64, 0x48, 0x45, 0x38, 0xBF, 0xC9, 0x2C
-};
-
-static uint8_t P23[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F
-};
-
-static uint8_t T23[] = {
-        0x9E, 0xE5, 0xA5, 0x1F, 0xBE, 0x28, 0xA1, 0x15,
-        0x3E, 0xF1, 0x96, 0xF5, 0x0B, 0xBF, 0x03, 0xCA
-};
-
-static uint8_t K24[] = {
-        0x1F, 0x0A, 0x6D, 0xCC, 0x67, 0xB1, 0x87, 0x22,
-        0x98, 0x22, 0x77, 0x91, 0xDD, 0xA1, 0x9B, 0x6A
-};
-
-static uint8_t P24[] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
-        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-        0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
-};
-
-static uint8_t T24[] = {
-        0xB5, 0x40, 0xDA, 0x44, 0xA3, 0x8C, 0x9C, 0x2B,
-        0x95, 0x8E, 0x4B, 0x0B
-};
-
-static uint8_t K25[] = {
-        0x1F, 0x0A, 0x6D, 0xCC, 0x67, 0xB1, 0x87, 0x22,
-        0x98, 0x22, 0x77, 0x91, 0xDD, 0xA1, 0x9B, 0x6A
-};
-
-static uint8_t P25[] = {
-        0x05
-};
-
-static uint8_t T25[] = {
-        0xE6, 0xCE, 0x47, 0xB5, 0xFB, 0xF2, 0xEF, 0x37,
-        0x51, 0xF1, 0x57, 0x53, 0xAD, 0x56, 0x4F, 0xED
-};
-
-static uint8_t K33[] = {
-        0x1f, 0x0f, 0x8a, 0x3a, 0xca, 0x64, 0x2e, 0xde,
-        0xb1, 0xdf, 0x8a, 0x52, 0x9a, 0x29, 0x76, 0xee
-};
-static uint8_t P33[] = {
-        0x9b, 0xb5, 0x92, 0x9f, 0xa7, 0xaa, 0x83, 0xfd,
-        0x0c, 0xd1, 0x83, 0x3a, 0x8e, 0xd5, 0x4d, 0xda,
-        0x6a, 0xaf, 0xa1, 0xc7, 0xa1, 0x32, 0x3a, 0xd4,
-        0x92, 0x9a, 0x2c, 0x83, 0xc6, 0x27, 0x92, 0x59,
-        0x28, 0x90, 0x11, 0xde, 0x19, 0x4e, 0xd5, 0x16,
-        0xef, 0x4f, 0x72, 0xeb, 0x79, 0x18, 0xd5, 0xb1,
-        0xc5, 0x22, 0x40, 0x14, 0x92, 0xa2
-};
-static uint8_t T33[] =  {
-        0x8B, 0xA5, 0x3F, 0x5F, 0xD7, 0x0E, 0x55, 0x7C,
-        0x30, 0xD4, 0xF2, 0xE1, 0x1A, 0x4F, 0xF8, 0xC7
-};
-
 /* GCM vectors with IV different than 12 bytes */
 
 /*
@@ -1164,13 +1099,6 @@ static const struct gcm_ctr_vector gcm_iv_vectors[] = {
 	vector(34)
 };
 
-static const struct gcm_ctr_vector ghash_vectors[] = {
-        ghash_vector(23),
-        ghash_vector(24),
-        ghash_vector(25),
-        ghash_vector(33)
-};
-
 typedef int (*gcm_enc_dec_fn_t)(IMB_MGR *, const struct gcm_key_data *,
                                 struct gcm_context_data *,
                                 uint8_t *, const uint8_t *, uint64_t,
@@ -2478,69 +2406,6 @@ test_gcm_std_vectors(struct test_suite_context *ts128,
                 printf("\n");
 }
 
-static void
-test_ghash(struct test_suite_context *ts, const int use_job_api)
-{
-	const int vectors_cnt = DIM(ghash_vectors);
-	int vect;
-
-	printf("GHASH test vectors (%s API):\n",
-               use_job_api ? "job" : "direct");
-	for (vect = 0; vect < vectors_cnt; vect++) {
-	        struct gcm_key_data gdata_key;
-                struct gcm_ctr_vector const *vector = &ghash_vectors[vect];
-                uint8_t T_test[16];
-
-                memset(&gdata_key, 0, sizeof(struct gcm_key_data));
-                memset(T_test, 0, sizeof(T_test));
-                IMB_GHASH_PRE(p_gcm_mgr, vector->K, &gdata_key);
-
-                if (!use_job_api) {
-                        IMB_GHASH(p_gcm_mgr, &gdata_key, vector->P,
-                                  vector->Plen, T_test, vector->Tlen);
-                } else {
-                        IMB_JOB *job = IMB_GET_NEXT_JOB(p_gcm_mgr);
-
-                        if (!job) {
-                                fprintf(stderr,
-                                        "failed to get job for ghash\n");
-                                return;
-                        }
-
-                        job->cipher_mode = IMB_CIPHER_NULL;
-                        job->hash_alg = IMB_AUTH_GHASH;
-                        job->u.GHASH._key = &gdata_key;
-                        job->u.GHASH._init_tag = T_test;
-                        job->src = vector->P;
-                        job->msg_len_to_hash_in_bytes = vector->Plen;
-                        job->hash_start_src_offset_in_bytes = UINT64_C(0);
-                        job->auth_tag_output = T_test;
-                        job->auth_tag_output_len_in_bytes = vector->Tlen;
-
-                        job = IMB_SUBMIT_JOB(p_gcm_mgr);
-                        while (job) {
-                                if (job->status != IMB_STATUS_COMPLETED)
-                                        fprintf(stderr,
-                                                "failed job, status:%d\n",
-                                                job->status);
-                                job = IMB_GET_COMPLETED_JOB(p_gcm_mgr);
-                        }
-                        while ((job = IMB_FLUSH_JOB(p_gcm_mgr)) != NULL) {
-                                if (job->status != IMB_STATUS_COMPLETED)
-                                        fprintf(stderr,
-                                                "failed job, status:%d\n",
-                                                job->status);
-                        }
-                }
-
-	        if (check_data(T_test, vector->T, vector->Tlen,
-                               "generated tag (T)"))
-                        test_suite_update(ts, 0, 1);
-                else
-                        test_suite_update(ts, 1, 0);
-        }
-}
-
 static void
 test_single_job_sgl(struct IMB_MGR *mb_mgr,
                     struct test_suite_context *ctx,
@@ -2995,10 +2860,5 @@ int gcm_test(IMB_MGR *p_mgr)
         errors += test_suite_end(&ts192);
         errors += test_suite_end(&ts256);
 
-        test_suite_start(&ts128, "GHASH");
-        test_ghash(&ts128, 0);
-        test_ghash(&ts128, 1);
-        errors += test_suite_end(&ts128);
-
 	return errors;
 }
diff --git a/test/kat-app/ghash_test.c b/test/kat-app/ghash_test.c
new file mode 100644
index 00000000..15e655c5
--- /dev/null
+++ b/test/kat-app/ghash_test.c
@@ -0,0 +1,175 @@
+#include <stdlib.h>
+#include <stdio.h>
+#include <stdint.h>
+#include <string.h>		/* for memcmp() */
+
+#include <intel-ipsec-mb.h>
+#include "gcm_ctr_vectors_test.h"
+#include "utils.h"
+
+int ghash_test(struct IMB_MGR *mb_mgr);
+
+static const uint8_t K23[] = {
+	0xA1, 0xF6, 0x25, 0x8C, 0x87, 0x7D, 0x5F, 0xCD,
+	0x89, 0x64, 0x48, 0x45, 0x38, 0xBF, 0xC9, 0x2C
+};
+
+static const uint8_t P23[] = {
+	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+	0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F
+};
+
+static const uint8_t T23[] = {
+	0x9E, 0xE5, 0xA5, 0x1F, 0xBE, 0x28, 0xA1, 0x15,
+	0x3E, 0xF1, 0x96, 0xF5, 0x0B, 0xBF, 0x03, 0xCA
+};
+
+static const uint8_t K24[] = {
+	0x1F, 0x0A, 0x6D, 0xCC, 0x67, 0xB1, 0x87, 0x22,
+	0x98, 0x22, 0x77, 0x91, 0xDD, 0xA1, 0x9B, 0x6A
+};
+
+static const uint8_t P24[] = {
+	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+	0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
+	0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
+	0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
+};
+
+static const uint8_t T24[] = {
+	0xB5, 0x40, 0xDA, 0x44, 0xA3, 0x8C, 0x9C, 0x2B,
+	0x95, 0x8E, 0x4B, 0x0B
+};
+
+static const uint8_t K25[] = {
+	0x1F, 0x0A, 0x6D, 0xCC, 0x67, 0xB1, 0x87, 0x22,
+	0x98, 0x22, 0x77, 0x91, 0xDD, 0xA1, 0x9B, 0x6A
+};
+
+static const uint8_t P25[] = {
+    	0x05
+};
+
+static const uint8_t T25[] = {
+	0xE6, 0xCE, 0x47, 0xB5, 0xFB, 0xF2, 0xEF, 0x37,
+	0x51, 0xF1, 0x57, 0x53, 0xAD, 0x56, 0x4F, 0xED
+};
+
+static const uint8_t K33[] = {
+	0x1f, 0x0f, 0x8a, 0x3a, 0xca, 0x64, 0x2e, 0xde,
+	0xb1, 0xdf, 0x8a, 0x52, 0x9a, 0x29, 0x76, 0xee
+};
+static const uint8_t P33[] = {
+	0x9b, 0xb5, 0x92, 0x9f, 0xa7, 0xaa, 0x83, 0xfd,
+	0x0c, 0xd1, 0x83, 0x3a, 0x8e, 0xd5, 0x4d, 0xda,
+	0x6a, 0xaf, 0xa1, 0xc7, 0xa1, 0x32, 0x3a, 0xd4,
+	0x92, 0x9a, 0x2c, 0x83, 0xc6, 0x27, 0x92, 0x59,
+	0x28, 0x90, 0x11, 0xde, 0x19, 0x4e, 0xd5, 0x16,
+	0xef, 0x4f, 0x72, 0xeb, 0x79, 0x18, 0xd5, 0xb1,
+	0xc5, 0x22, 0x40, 0x14, 0x92, 0xa2
+};
+static const uint8_t T33[] =  {
+	0x8B, 0xA5, 0x3F, 0x5F, 0xD7, 0x0E, 0x55, 0x7C,
+	0x30, 0xD4, 0xF2, 0xE1, 0x1A, 0x4F, 0xF8, 0xC7
+};
+
+static const struct gcm_ctr_vector ghash_vectors[] = {
+	ghash_vector(23),
+	ghash_vector(24),
+	ghash_vector(25),
+	ghash_vector(33)
+};
+
+static int check_data(const uint8_t *test, const uint8_t *expected,
+                      uint64_t len, const char *data_name)
+{
+	int mismatch;
+	int is_error = 0;
+
+	if (len == 0)
+		return is_error;
+
+	if (test == NULL || expected == NULL|| data_name == NULL)
+		return 1;
+
+	mismatch = memcmp(test, expected, len);
+	if (mismatch) {
+		uint64_t a;
+
+		is_error = 1;
+		printf("  expected results don't match %s \t\t", data_name);
+        	for (a = 0; a < len; a++)
+			if (test[a] != expected[a]) {
+				printf(" '%x' != '%x' at %llx of %llx\n", test[a], expected[a],
+					(unsigned long long) a, (unsigned long long) len);
+				break;
+            		}
+	}
+	return is_error;
+}
+
+int ghash_test(struct IMB_MGR *mb_mgr)
+{
+        struct test_suite_context ts;
+        int use_job_api = 0;
+
+        test_suite_start(&ts, "GHASH");
+
+        while (use_job_api < 2) {
+		const int vectors_cnt = DIM(ghash_vectors);
+		int vect;
+
+		printf("GHASH test vectors (%s API):\n", use_job_api ? "job" : "direct");
+		for (vect = 0; vect < vectors_cnt; vect++) {
+			struct gcm_key_data gdata_key;
+			struct gcm_ctr_vector const *vector = &ghash_vectors[vect];
+			uint8_t T_test[16];
+
+			memset(&gdata_key, 0, sizeof(struct gcm_key_data));
+			memset(T_test, 0, sizeof(T_test));
+			IMB_GHASH_PRE(mb_mgr, vector->K, &gdata_key);
+
+			if (!use_job_api) {
+				IMB_GHASH(mb_mgr, &gdata_key, vector->P,
+					  vector->Plen, T_test, vector->Tlen);
+			} else {
+				IMB_JOB *job = IMB_GET_NEXT_JOB(mb_mgr);
+
+				if (!job) {
+					fprintf(stderr, "failed to get job for ghash\n");
+					test_suite_update(&ts, 0, 1);
+					return test_suite_end(&ts);
+				}
+
+				job->cipher_mode = IMB_CIPHER_NULL;
+				job->hash_alg = IMB_AUTH_GHASH;
+				job->u.GHASH._key = &gdata_key;
+				job->u.GHASH._init_tag = T_test;
+				job->src = vector->P;
+				job->msg_len_to_hash_in_bytes = vector->Plen;
+				job->hash_start_src_offset_in_bytes = UINT64_C(0);
+				job->auth_tag_output = T_test;
+				job->auth_tag_output_len_in_bytes = vector->Tlen;
+
+				job = IMB_SUBMIT_JOB(mb_mgr);
+
+				if (job == NULL)
+					job = IMB_FLUSH_JOB(mb_mgr);
+				if (job == NULL) {
+					fprintf(stderr, "No job retrieved\n");
+				}
+				else if (job->status != IMB_STATUS_COMPLETED) {
+					fprintf(stderr, "failed job, status:%d\n", job->status);
+				}
+			}
+
+			if (check_data(T_test, vector->T, vector->Tlen, "generated tag (T)"))
+				test_suite_update(&ts, 0, 1);
+			else
+				test_suite_update(&ts, 1, 0);
+		}
+		use_job_api++;
+        }
+
+        return test_suite_end(&ts);
+}
diff --git a/test/kat-app/main.c b/test/kat-app/main.c
index fdbfdc55..e0bec417 100644
--- a/test/kat-app/main.c
+++ b/test/kat-app/main.c
@@ -64,6 +64,7 @@ extern int snow_v_test(struct IMB_MGR *mb_mgr);
 extern int direct_api_param_test(struct IMB_MGR *mb_mgr);
 extern int quic_ecb_test(struct IMB_MGR *mb_mgr);
 extern int gmac_test(struct IMB_MGR *mb_mgr);
+extern int ghash_test(struct IMB_MGR *mb_mgr);
 
 typedef int (*imb_test_t)(struct IMB_MGR *mb_mgr);
 
@@ -117,6 +118,11 @@ struct imb_test tests[] = {
                 .fn = gmac_test,
                 .enabled = 1
         },
+        {
+                .str = "GHASH",
+                .fn = ghash_test,
+                .enabled = 1
+        },
         {
                 .str = "CUSTOMOP",
                 .fn = customop_test,
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index 57ffc077..d606cea9 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
-- 
GitLab


From 10a6d8d29262ca5106d12c6fdbd5b2b6e32b1858 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Wed, 10 May 2023 10:20:43 +0100
Subject: [PATCH 257/332] test: [GHASH] Unifying Test Vectors

---
 test/kat-app/CMakeLists.txt    |   1 +
 test/kat-app/Makefile          |   2 +-
 test/kat-app/ghash_test.c      | 139 ++++++++++++---------------------
 test/kat-app/ghash_test.json.c |  56 +++++++++++++
 test/kat-app/win_x64.mak       |   2 +-
 5 files changed, 107 insertions(+), 93 deletions(-)
 create mode 100644 test/kat-app/ghash_test.json.c

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 47d13d52..bc4bf8d0 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -83,6 +83,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha512.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_md5.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/gmac_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/ghash_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
 )
 
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index 342327b2..c03d7baf 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -38,7 +38,7 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
 	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c hmac_sha512.json.c \
-	hmac_md5.json.c gmac_test.json.c ghash_test.c\
+	hmac_md5.json.c gmac_test.json.c ghash_test.c ghash_test.json.c\
 	gmac_test.c
 OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
diff --git a/test/kat-app/ghash_test.c b/test/kat-app/ghash_test.c
index 15e655c5..5dc5f1ed 100644
--- a/test/kat-app/ghash_test.c
+++ b/test/kat-app/ghash_test.c
@@ -1,86 +1,46 @@
+/**********************************************************************
+  Copyright(c) 2023 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
 #include <stdlib.h>
 #include <stdio.h>
 #include <stdint.h>
 #include <string.h>		/* for memcmp() */
 
 #include <intel-ipsec-mb.h>
-#include "gcm_ctr_vectors_test.h"
 #include "utils.h"
+#include "mac_test.h"
 
 int ghash_test(struct IMB_MGR *mb_mgr);
 
-static const uint8_t K23[] = {
-	0xA1, 0xF6, 0x25, 0x8C, 0x87, 0x7D, 0x5F, 0xCD,
-	0x89, 0x64, 0x48, 0x45, 0x38, 0xBF, 0xC9, 0x2C
-};
-
-static const uint8_t P23[] = {
-	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F
-};
-
-static const uint8_t T23[] = {
-	0x9E, 0xE5, 0xA5, 0x1F, 0xBE, 0x28, 0xA1, 0x15,
-	0x3E, 0xF1, 0x96, 0xF5, 0x0B, 0xBF, 0x03, 0xCA
-};
-
-static const uint8_t K24[] = {
-	0x1F, 0x0A, 0x6D, 0xCC, 0x67, 0xB1, 0x87, 0x22,
-	0x98, 0x22, 0x77, 0x91, 0xDD, 0xA1, 0x9B, 0x6A
-};
-
-static const uint8_t P24[] = {
-	0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-	0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F,
-	0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-	0x18, 0x19, 0x1A, 0x1B, 0x1C, 0x1D, 0x1E, 0x1F,
-};
-
-static const uint8_t T24[] = {
-	0xB5, 0x40, 0xDA, 0x44, 0xA3, 0x8C, 0x9C, 0x2B,
-	0x95, 0x8E, 0x4B, 0x0B
-};
-
-static const uint8_t K25[] = {
-	0x1F, 0x0A, 0x6D, 0xCC, 0x67, 0xB1, 0x87, 0x22,
-	0x98, 0x22, 0x77, 0x91, 0xDD, 0xA1, 0x9B, 0x6A
-};
-
-static const uint8_t P25[] = {
-    	0x05
-};
-
-static const uint8_t T25[] = {
-	0xE6, 0xCE, 0x47, 0xB5, 0xFB, 0xF2, 0xEF, 0x37,
-	0x51, 0xF1, 0x57, 0x53, 0xAD, 0x56, 0x4F, 0xED
-};
-
-static const uint8_t K33[] = {
-	0x1f, 0x0f, 0x8a, 0x3a, 0xca, 0x64, 0x2e, 0xde,
-	0xb1, 0xdf, 0x8a, 0x52, 0x9a, 0x29, 0x76, 0xee
-};
-static const uint8_t P33[] = {
-	0x9b, 0xb5, 0x92, 0x9f, 0xa7, 0xaa, 0x83, 0xfd,
-	0x0c, 0xd1, 0x83, 0x3a, 0x8e, 0xd5, 0x4d, 0xda,
-	0x6a, 0xaf, 0xa1, 0xc7, 0xa1, 0x32, 0x3a, 0xd4,
-	0x92, 0x9a, 0x2c, 0x83, 0xc6, 0x27, 0x92, 0x59,
-	0x28, 0x90, 0x11, 0xde, 0x19, 0x4e, 0xd5, 0x16,
-	0xef, 0x4f, 0x72, 0xeb, 0x79, 0x18, 0xd5, 0xb1,
-	0xc5, 0x22, 0x40, 0x14, 0x92, 0xa2
-};
-static const uint8_t T33[] =  {
-	0x8B, 0xA5, 0x3F, 0x5F, 0xD7, 0x0E, 0x55, 0x7C,
-	0x30, 0xD4, 0xF2, 0xE1, 0x1A, 0x4F, 0xF8, 0xC7
-};
-
-static const struct gcm_ctr_vector ghash_vectors[] = {
-	ghash_vector(23),
-	ghash_vector(24),
-	ghash_vector(25),
-	ghash_vector(33)
-};
-
-static int check_data(const uint8_t *test, const uint8_t *expected,
+extern const struct mac_test ghash_test_json[];
+
+static int check_data(const uint8_t *test, const char *expected,
                       uint64_t len, const char *data_name)
 {
 	int mismatch;
@@ -89,7 +49,7 @@ static int check_data(const uint8_t *test, const uint8_t *expected,
 	if (len == 0)
 		return is_error;
 
-	if (test == NULL || expected == NULL|| data_name == NULL)
+	if (test == NULL || expected == NULL || data_name == NULL)
 		return 1;
 
 	mismatch = memcmp(test, expected, len);
@@ -98,12 +58,12 @@ static int check_data(const uint8_t *test, const uint8_t *expected,
 
 		is_error = 1;
 		printf("  expected results don't match %s \t\t", data_name);
-        	for (a = 0; a < len; a++)
+		for (a = 0; a < len; a++)
 			if (test[a] != expected[a]) {
 				printf(" '%x' != '%x' at %llx of %llx\n", test[a], expected[a],
 					(unsigned long long) a, (unsigned long long) len);
 				break;
-            		}
+			}
 	}
 	return is_error;
 }
@@ -116,22 +76,20 @@ int ghash_test(struct IMB_MGR *mb_mgr)
         test_suite_start(&ts, "GHASH");
 
         while (use_job_api < 2) {
-		const int vectors_cnt = DIM(ghash_vectors);
-		int vect;
+		const struct mac_test *vec = ghash_test_json;
 
 		printf("GHASH test vectors (%s API):\n", use_job_api ? "job" : "direct");
-		for (vect = 0; vect < vectors_cnt; vect++) {
+		while (vec->msg != NULL) {
 			struct gcm_key_data gdata_key;
-			struct gcm_ctr_vector const *vector = &ghash_vectors[vect];
 			uint8_t T_test[16];
 
 			memset(&gdata_key, 0, sizeof(struct gcm_key_data));
 			memset(T_test, 0, sizeof(T_test));
-			IMB_GHASH_PRE(mb_mgr, vector->K, &gdata_key);
+			IMB_GHASH_PRE(mb_mgr, vec->key, &gdata_key);
 
 			if (!use_job_api) {
-				IMB_GHASH(mb_mgr, &gdata_key, vector->P,
-					  vector->Plen, T_test, vector->Tlen);
+				IMB_GHASH(mb_mgr, &gdata_key, vec->msg,
+					  (vec->msgSize / 8), T_test, vec->tagSize);
 			} else {
 				IMB_JOB *job = IMB_GET_NEXT_JOB(mb_mgr);
 
@@ -145,28 +103,27 @@ int ghash_test(struct IMB_MGR *mb_mgr)
 				job->hash_alg = IMB_AUTH_GHASH;
 				job->u.GHASH._key = &gdata_key;
 				job->u.GHASH._init_tag = T_test;
-				job->src = vector->P;
-				job->msg_len_to_hash_in_bytes = vector->Plen;
+				job->src = (const void *) vec->msg;
+				job->msg_len_to_hash_in_bytes = (vec->msgSize / 8);
 				job->hash_start_src_offset_in_bytes = UINT64_C(0);
 				job->auth_tag_output = T_test;
-				job->auth_tag_output_len_in_bytes = vector->Tlen;
+				job->auth_tag_output_len_in_bytes = vec->tagSize;
 
 				job = IMB_SUBMIT_JOB(mb_mgr);
 
 				if (job == NULL)
 					job = IMB_FLUSH_JOB(mb_mgr);
-				if (job == NULL) {
+				if (job == NULL)
 					fprintf(stderr, "No job retrieved\n");
-				}
-				else if (job->status != IMB_STATUS_COMPLETED) {
+				else if (job->status != IMB_STATUS_COMPLETED)
 					fprintf(stderr, "failed job, status:%d\n", job->status);
-				}
 			}
 
-			if (check_data(T_test, vector->T, vector->Tlen, "generated tag (T)"))
+			if (check_data(T_test, vec->tag, vec->tagSize, "generated tag (T)"))
 				test_suite_update(&ts, 0, 1);
 			else
 				test_suite_update(&ts, 1, 0);
+			vec++;
 		}
 		use_job_api++;
         }
diff --git a/test/kat-app/ghash_test.json.c b/test/kat-app/ghash_test.json.c
new file mode 100644
index 00000000..bfaf87f9
--- /dev/null
+++ b/test/kat-app/ghash_test.json.c
@@ -0,0 +1,56 @@
+/**********************************************************************
+  Copyright(c) 2023 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+/* GHASH */
+#include "mac_test.h"
+
+const struct mac_test ghash_test_json[] = {
+    {16, 16, 1,
+     "\xa1\xf6\x25\x8c\x87\x7d\x5f\xcd\x89\x64\x48\x45\x38\xbf\xc9\x2c",
+     "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+     "\x9e\xe5\xa5\x1f\xbe\x28\xa1\x15\x3e\xf1\x96\xf5\x0b\xbf\x03\xca", 1, 128,
+     NULL, 0},
+    {16, 12, 2,
+     "\x1f\x0a\x6d\xcc\x67\xb1\x87\x22\x98\x22\x77\x91\xdd\xa1\x9b\x6a",
+     "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11"
+     "\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f",
+     "\xb5\x40\xda\x44\xa3\x8c\x9c\x2b\x95\x8e\x4b\x0b", 1, 256, NULL, 0},
+    {16, 16, 3,
+     "\x1f\x0a\x6d\xcc\x67\xb1\x87\x22\x98\x22\x77\x91\xdd\xa1\x9b\x6a", "\x05",
+     "\xe6\xce\x47\xb5\xfb\xf2\xef\x37\x51\xf1\x57\x53\xad\x56\x4f\xed", 1, 8,
+     NULL, 0},
+    {16, 16, 4,
+     "\x1f\x0f\x8a\x3a\xca\x64\x2e\xde\xb1\xdf\x8a\x52\x9a\x29\x76\xee",
+     "\x9b\xb5\x92\x9f\xa7\xaa\x83\xfd\x0c\xd1\x83\x3a\x8e\xd5\x4d\xda\x6a\xaf"
+     "\xa1\xc7\xa1\x32\x3a\xd4\x92\x9a\x2c\x83\xc6\x27\x92\x59\x28\x90\x11\xde"
+     "\x19\x4e\xd5\x16\xef\x4f\x72\xeb\x79\x18\xd5\xb1\xc5\x22\x40\x14\x92\xa2",
+     "\x8b\xa5\x3f\x5f\xd7\x0e\x55\x7c\x30\xd4\xf2\xe1\x1a\x4f\xf8\xc7", 1, 432,
+     NULL, 0},
+    {0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0}
+};
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index d606cea9..d635f22b 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj ghash_test.json.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
-- 
GitLab


From d8bddb753b4dafaf7ff859b4c7496d7ecb7fdb6b Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 12 May 2023 14:39:45 +0100
Subject: [PATCH 258/332] test: [acvp] add acvp library version information

---
 test/acvp-app/acvp_app_main.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/test/acvp-app/acvp_app_main.c b/test/acvp-app/acvp_app_main.c
index 44bbfbe8..4531ac4f 100644
--- a/test/acvp-app/acvp_app_main.c
+++ b/test/acvp-app/acvp_app_main.c
@@ -1343,6 +1343,8 @@ int main(int argc, char **argv)
                 goto exit;
         }
 
+        printf("ACVP library: %s\n", acvp_version());
+
         /* Create test session and enable supported algorithms */
         acvp_ret = acvp_create_test_session(&ctx, logger, ACVP_LOG_LVL_INFO);
         if (acvp_ret != ACVP_SUCCESS)
-- 
GitLab


From 046b0c2acddbea69e940917a2a5f8d258e77170d Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 12 May 2023 14:40:28 +0100
Subject: [PATCH 259/332] test: [acvp] add TDES-EDE-CBC support

---
 test/acvp-app/acvp_app_main.c | 128 ++++++++++++++++++++++++++++++++++
 1 file changed, 128 insertions(+)

diff --git a/test/acvp-app/acvp_app_main.c b/test/acvp-app/acvp_app_main.c
index 4531ac4f..04b9f764 100644
--- a/test/acvp-app/acvp_app_main.c
+++ b/test/acvp-app/acvp_app_main.c
@@ -572,6 +572,129 @@ static int aes_ctr_handler(ACVP_TEST_CASE *test_case)
         return EXIT_SUCCESS;
 }
 
+static int tdes_cbc_handler(ACVP_TEST_CASE *test_case)
+{
+        ACVP_SYM_CIPHER_TC *tc;
+        IMB_JOB *job = NULL;
+        static DECLARE_ALIGNED(uint64_t keys1[IMB_DES_KEY_SCHED_SIZE / sizeof(uint64_t)], 16);
+        static DECLARE_ALIGNED(uint64_t keys2[IMB_DES_KEY_SCHED_SIZE / sizeof(uint64_t)], 16);
+        static DECLARE_ALIGNED(uint64_t keys3[IMB_DES_KEY_SCHED_SIZE / sizeof(uint64_t)], 16);
+        static const void *ks_ptr[3];
+        static uint8_t next_iv[8];
+
+        if (test_case == NULL)
+                return EXIT_FAILURE;
+
+        tc = test_case->tc.symmetric;
+
+        if (tc->direction != ACVP_SYM_CIPH_DIR_ENCRYPT &&
+            tc->direction != ACVP_SYM_CIPH_DIR_DECRYPT) {
+                fprintf(stderr, "Unsupported direction\n");
+                return EXIT_FAILURE;
+        }
+
+        if (tc->keyingOption != 1) {
+                fprintf(stderr, "Unsupported keyingOption\n");
+                return EXIT_FAILURE;
+        }
+
+        /*
+         * Only 3 key DES supported
+         */
+        if (tc->key_len != 192) {
+                fprintf(stderr, "Unsupported DES key length\n");
+                return EXIT_FAILURE;
+        }
+
+        /*
+         * Only TDES CBC supported
+         */
+        const ACVP_SUB_TDES alg = acvp_get_tdes_alg(tc->cipher);
+
+        if (alg == 0) {
+                fprintf(stderr, "Invalid cipher value");
+                return EXIT_FAILURE;
+        }
+
+        if (alg != ACVP_SUB_TDES_CBC) {
+                fprintf(stderr, "Error: Unsupported DES mode requested by ACVP server\n");
+                return EXIT_FAILURE;
+        }
+
+        /* Create key schedules */
+        if (tc->test_type != ACVP_SYM_TEST_TYPE_MCT ||
+            (tc->test_type == ACVP_SYM_TEST_TYPE_MCT && tc->mct_index == 0)) {
+                /*
+                 * Always create key schedules unless this is continuation of
+                 * Monte Carlo inner loop.
+                 * Not creating key schedules every time in MCT test
+                 * improves performance.
+                 */
+                IMB_DES_KEYSCHED(mb_mgr, keys1, &tc->key[0]);
+                IMB_DES_KEYSCHED(mb_mgr, keys2, &tc->key[8]);
+                IMB_DES_KEYSCHED(mb_mgr, keys3, &tc->key[16]);
+                ks_ptr[0] = keys1;
+                ks_ptr[1] = keys2;
+                ks_ptr[2] = keys3;
+        }
+
+        job = IMB_GET_NEXT_JOB(mb_mgr);
+        job->key_len_in_bytes = 192 / 8;
+        job->cipher_mode = IMB_CIPHER_DES3;
+        job->hash_alg = IMB_AUTH_NULL;
+
+        job->iv = tc->iv;
+
+        if (tc->test_type == ACVP_SYM_TEST_TYPE_MCT &&
+            tc->direction == ACVP_SYM_CIPH_DIR_DECRYPT &&
+            tc->mct_index != 0)
+                job->iv = next_iv;
+
+        job->iv_len_in_bytes = tc->iv_len;
+        job->cipher_start_src_offset_in_bytes = 0;
+        job->enc_keys = ks_ptr;
+        job->dec_keys = ks_ptr;
+
+        if (tc->direction == ACVP_SYM_CIPH_DIR_ENCRYPT) {
+                job->cipher_direction = IMB_DIR_ENCRYPT;
+                job->chain_order = IMB_ORDER_CIPHER_HASH;
+                job->src = tc->pt;
+                job->dst = tc->ct;
+                job->msg_len_to_cipher_in_bytes = tc->pt_len;
+                tc->ct_len = tc->pt_len;
+        } else /* DECRYPT */ {
+                job->cipher_direction = IMB_DIR_DECRYPT;
+                job->chain_order = IMB_ORDER_HASH_CIPHER;
+                job->src = tc->ct;
+                job->dst = tc->pt;
+                job->msg_len_to_cipher_in_bytes = tc->ct_len;
+                tc->pt_len = tc->ct_len;
+        }
+
+        job = IMB_SUBMIT_JOB(mb_mgr);
+        if (job == NULL)
+                job = IMB_FLUSH_JOB(mb_mgr);
+        if (job->status != IMB_STATUS_COMPLETED) {
+                fprintf(stderr, "Invalid job\n");
+                return EXIT_FAILURE;
+        }
+
+        /*
+         * If Monte Carlo test:
+         *   encrypt/decrypt - set IV for the next outer iteration
+         *   decrypt - copy the ciphertext as IV for the next inner iteration
+         */
+        if (tc->test_type == ACVP_SYM_TEST_TYPE_MCT) {
+                if (tc->mct_index == ACVP_DES_MCT_INNER - 1)
+                        memcpy(tc->iv_ret_after, tc->ct, 8);
+
+                if (tc->direction == ACVP_SYM_CIPH_DIR_DECRYPT)
+                        memcpy(next_iv, tc->ct, 8);
+        }
+
+        return EXIT_SUCCESS;
+}
+
 static int aes_ccm_handler(ACVP_TEST_CASE *test_case)
 {
         ACVP_SYM_CIPHER_TC *tc;
@@ -1365,10 +1488,15 @@ int main(int argc, char **argv)
         if (acvp_cap_sym_cipher_enable(ctx, ACVP_AES_CTR,
                                        &aes_ctr_handler) != ACVP_SUCCESS)
                 goto exit;
+
         if (acvp_cap_sym_cipher_enable(ctx, ACVP_AES_GMAC,
                                        &aes_gmac_handler) != ACVP_SUCCESS)
                 goto exit;
 
+        if (acvp_cap_sym_cipher_enable(ctx, ACVP_TDES_CBC,
+                                       &tdes_cbc_handler) != ACVP_SUCCESS)
+                goto exit;
+
         if (acvp_cap_sym_cipher_enable(ctx, ACVP_AES_CCM,
                                        &aes_ccm_handler) != ACVP_SUCCESS)
                 goto exit;
-- 
GitLab


From bc945d294be122cf3e06328a39491f91c10c6b86 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 12 May 2023 18:03:18 +0100
Subject: [PATCH 260/332] test: [acvp] tidy up crypto handler return codes and
 extend verbose mode

---
 test/acvp-app/acvp_app_main.c | 188 +++++++++++++++++-----------------
 1 file changed, 96 insertions(+), 92 deletions(-)

diff --git a/test/acvp-app/acvp_app_main.c b/test/acvp-app/acvp_app_main.c
index 04b9f764..ef5ac944 100644
--- a/test/acvp-app/acvp_app_main.c
+++ b/test/acvp-app/acvp_app_main.c
@@ -55,14 +55,14 @@ static int aes_cbc_handler(ACVP_TEST_CASE *test_case)
         static uint8_t next_iv[16];
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.symmetric;
 
         if (tc->direction != ACVP_SYM_CIPH_DIR_ENCRYPT &&
             tc->direction != ACVP_SYM_CIPH_DIR_DECRYPT) {
                 fprintf(stderr, "Unsupported direction\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         switch (tc->key_len) {
@@ -77,7 +77,7 @@ static int aes_cbc_handler(ACVP_TEST_CASE *test_case)
                 break;
         default:
                 fprintf(stderr, "Unsupported AES key length\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
@@ -112,7 +112,7 @@ static int aes_cbc_handler(ACVP_TEST_CASE *test_case)
                         job = IMB_FLUSH_JOB(mb_mgr);
                 if (job->status != IMB_STATUS_COMPLETED) {
                         fprintf(stderr, "Invalid job\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         } else /* DECRYPT */ {
                 job->cipher_direction = IMB_DIR_DECRYPT;
@@ -127,7 +127,7 @@ static int aes_cbc_handler(ACVP_TEST_CASE *test_case)
                         job = IMB_FLUSH_JOB(mb_mgr);
                 if (job->status != IMB_STATUS_COMPLETED) {
                         fprintf(stderr, "Invalid job\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
         /*
@@ -137,7 +137,7 @@ static int aes_cbc_handler(ACVP_TEST_CASE *test_case)
         if (tc->test_type == ACVP_SYM_TEST_TYPE_MCT)
                 memcpy(next_iv, tc->ct, 16);
 
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int aes_ecb_handler(ACVP_TEST_CASE *test_case)
@@ -148,14 +148,14 @@ static int aes_ecb_handler(ACVP_TEST_CASE *test_case)
         DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.symmetric;
 
         if (tc->direction != ACVP_SYM_CIPH_DIR_ENCRYPT &&
             tc->direction != ACVP_SYM_CIPH_DIR_DECRYPT) {
                 fprintf(stderr, "Unsupported direction\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         switch (tc->key_len) {
@@ -170,7 +170,7 @@ static int aes_ecb_handler(ACVP_TEST_CASE *test_case)
                 break;
         default:
                 fprintf(stderr, "Unsupported AES key length\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
@@ -197,7 +197,7 @@ static int aes_ecb_handler(ACVP_TEST_CASE *test_case)
                         const char *err_str = imb_get_strerror(err);
 
                         fprintf(stderr, "Invalid encrypt job: %s\n", err_str);
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         } else /* DECRYPT */ {
                 job->cipher_direction = IMB_DIR_DECRYPT;
@@ -215,11 +215,11 @@ static int aes_ecb_handler(ACVP_TEST_CASE *test_case)
                         const char *err_str = imb_get_strerror(err);
 
                         fprintf(stderr, "Invalid decrypt job: %s\n", err_str);
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
 
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int aes_gcm_handler(ACVP_TEST_CASE *test_case)
@@ -237,13 +237,13 @@ static int aes_gcm_handler(ACVP_TEST_CASE *test_case)
         struct gcm_context_data ctx;
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.symmetric;
 
         if (tc->direction != ACVP_SYM_CIPH_DIR_ENCRYPT &&
             tc->direction != ACVP_SYM_CIPH_DIR_DECRYPT) {
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         switch (tc->key_len) {
@@ -258,7 +258,7 @@ static int aes_gcm_handler(ACVP_TEST_CASE *test_case)
                 break;
         default:
                 fprintf(stderr, "Unsupported AES key length\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         if (direct_api == 1) {
@@ -282,7 +282,7 @@ static int aes_gcm_handler(ACVP_TEST_CASE *test_case)
                         break;
                 default:
                         fprintf(stderr, "Unsupported AES key length\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         } else {
                 job = IMB_GET_NEXT_JOB(mb_mgr);
@@ -322,7 +322,7 @@ static int aes_gcm_handler(ACVP_TEST_CASE *test_case)
                                 job = IMB_FLUSH_JOB(mb_mgr);
                         if (job->status != IMB_STATUS_COMPLETED) {
                                 fprintf(stderr, "Invalid job\n");
-                                return EXIT_FAILURE;
+                                return ACVP_CRYPTO_MODULE_FAIL;
                         }
                 }
         } else /* DECRYPT */ {
@@ -349,7 +349,7 @@ static int aes_gcm_handler(ACVP_TEST_CASE *test_case)
                                 job = IMB_FLUSH_JOB(mb_mgr);
                         if (job->status != IMB_STATUS_COMPLETED) {
                                 fprintf(stderr, "Invalid job\n");
-                                return EXIT_FAILURE;
+                                return ACVP_CRYPTO_MODULE_FAIL;
                         }
                 }
                 if (memcmp(res_tag, tc->tag, tc->tag_len) != 0) {
@@ -358,12 +358,12 @@ static int aes_gcm_handler(ACVP_TEST_CASE *test_case)
                                         res_tag, tc->tag_len);
                                 hexdump(stdout, "reference tag: ",
                                         tc->tag, tc->tag_len);
-                                fprintf(stderr, "Invalid tag\n");
+                                fprintf(stderr, "Tag mismatch\n");
                         }
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int aes_gmac_handler(ACVP_TEST_CASE *test_case)
@@ -378,13 +378,13 @@ static int aes_gmac_handler(ACVP_TEST_CASE *test_case)
         IMB_HASH_ALG hash_mode;
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.symmetric;
 
         if (tc->direction != ACVP_SYM_CIPH_DIR_ENCRYPT &&
             tc->direction != ACVP_SYM_CIPH_DIR_DECRYPT) {
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         switch (tc->key_len) {
@@ -402,7 +402,7 @@ static int aes_gmac_handler(ACVP_TEST_CASE *test_case)
                 break;
         default:
                 fprintf(stderr, "Unsupported AES key length\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         if (direct_api == 1) {
@@ -422,7 +422,7 @@ static int aes_gmac_handler(ACVP_TEST_CASE *test_case)
                         break;
                 default:
                         fprintf(stderr, "Unsupported AES key length\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         } else {
                 job = IMB_GET_NEXT_JOB(mb_mgr);
@@ -455,7 +455,7 @@ static int aes_gmac_handler(ACVP_TEST_CASE *test_case)
                                 job = IMB_FLUSH_JOB(mb_mgr);
                         if (job->status != IMB_STATUS_COMPLETED) {
                                 fprintf(stderr, "Invalid job\n");
-                                return EXIT_FAILURE;
+                                return ACVP_CRYPTO_MODULE_FAIL;
                         }
                 }
         } else /* DECRYPT */ {
@@ -477,7 +477,7 @@ static int aes_gmac_handler(ACVP_TEST_CASE *test_case)
                                 job = IMB_FLUSH_JOB(mb_mgr);
                         if (job->status != IMB_STATUS_COMPLETED) {
                                 fprintf(stderr, "Invalid job\n");
-                                return EXIT_FAILURE;
+                                return ACVP_CRYPTO_MODULE_FAIL;
                         }
                 }
                 if (memcmp(res_tag, tc->tag, tc->tag_len) != 0) {
@@ -486,12 +486,12 @@ static int aes_gmac_handler(ACVP_TEST_CASE *test_case)
                                         res_tag, tc->tag_len);
                                 hexdump(stdout, "reference tag: ",
                                         tc->tag, tc->tag_len);
-                                fprintf(stderr, "Invalid tag\n");
+                                fprintf(stderr, "Tag mismatch\n");
                         }
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int aes_ctr_handler(ACVP_TEST_CASE *test_case)
@@ -502,14 +502,14 @@ static int aes_ctr_handler(ACVP_TEST_CASE *test_case)
         DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.symmetric;
 
         if (tc->direction != ACVP_SYM_CIPH_DIR_ENCRYPT &&
             tc->direction != ACVP_SYM_CIPH_DIR_DECRYPT) {
                 fprintf(stderr, "Unsupported direction\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         switch (tc->key_len) {
@@ -524,7 +524,7 @@ static int aes_ctr_handler(ACVP_TEST_CASE *test_case)
                 break;
         default:
                 fprintf(stderr, "Unsupported AES key length\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
@@ -551,7 +551,7 @@ static int aes_ctr_handler(ACVP_TEST_CASE *test_case)
                         job = IMB_FLUSH_JOB(mb_mgr);
                 if (job->status != IMB_STATUS_COMPLETED) {
                         fprintf(stderr, "Invalid job\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         } else /* DECRYPT */ {
                 job->cipher_direction = IMB_DIR_DECRYPT;
@@ -566,10 +566,10 @@ static int aes_ctr_handler(ACVP_TEST_CASE *test_case)
                         job = IMB_FLUSH_JOB(mb_mgr);
                 if (job->status != IMB_STATUS_COMPLETED) {
                         fprintf(stderr, "Invalid job\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int tdes_cbc_handler(ACVP_TEST_CASE *test_case)
@@ -583,19 +583,19 @@ static int tdes_cbc_handler(ACVP_TEST_CASE *test_case)
         static uint8_t next_iv[8];
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.symmetric;
 
         if (tc->direction != ACVP_SYM_CIPH_DIR_ENCRYPT &&
             tc->direction != ACVP_SYM_CIPH_DIR_DECRYPT) {
                 fprintf(stderr, "Unsupported direction\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         if (tc->keyingOption != 1) {
                 fprintf(stderr, "Unsupported keyingOption\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         /*
@@ -603,7 +603,7 @@ static int tdes_cbc_handler(ACVP_TEST_CASE *test_case)
          */
         if (tc->key_len != 192) {
                 fprintf(stderr, "Unsupported DES key length\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         /*
@@ -613,12 +613,12 @@ static int tdes_cbc_handler(ACVP_TEST_CASE *test_case)
 
         if (alg == 0) {
                 fprintf(stderr, "Invalid cipher value");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         if (alg != ACVP_SUB_TDES_CBC) {
                 fprintf(stderr, "Error: Unsupported DES mode requested by ACVP server\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         /* Create key schedules */
@@ -676,7 +676,7 @@ static int tdes_cbc_handler(ACVP_TEST_CASE *test_case)
                 job = IMB_FLUSH_JOB(mb_mgr);
         if (job->status != IMB_STATUS_COMPLETED) {
                 fprintf(stderr, "Invalid job\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         /*
@@ -692,7 +692,7 @@ static int tdes_cbc_handler(ACVP_TEST_CASE *test_case)
                         memcpy(next_iv, tc->ct, 8);
         }
 
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int aes_ccm_handler(ACVP_TEST_CASE *test_case)
@@ -704,14 +704,14 @@ static int aes_ccm_handler(ACVP_TEST_CASE *test_case)
         uint8_t res_tag[MAX_TAG_LENGTH] = {0};
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.symmetric;
 
         if (tc->direction != ACVP_SYM_CIPH_DIR_ENCRYPT &&
             tc->direction != ACVP_SYM_CIPH_DIR_DECRYPT) {
                 fprintf(stderr, "Unsupported direction\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         switch (tc->key_len) {
@@ -726,7 +726,7 @@ static int aes_ccm_handler(ACVP_TEST_CASE *test_case)
                 break;
         default:
                 fprintf(stderr, "Unsupported AES key length\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
@@ -770,7 +770,7 @@ static int aes_ccm_handler(ACVP_TEST_CASE *test_case)
                 job = IMB_FLUSH_JOB(mb_mgr);
         if (job->status != IMB_STATUS_COMPLETED) {
                 fprintf(stderr, "Invalid job\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         if (tc->direction == ACVP_SYM_CIPH_DIR_DECRYPT) {
@@ -783,12 +783,12 @@ static int aes_ccm_handler(ACVP_TEST_CASE *test_case)
                                         res_tag, tc->tag_len);
                                 hexdump(stdout, "reference tag: ",
                                         ref_tag, tc->tag_len);
-                                fprintf(stderr, "Invalid tag\n");
+                                fprintf(stderr, "Tag mismatch\n");
                         }
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int aes_cmac_handler(ACVP_TEST_CASE *test_case)
@@ -801,7 +801,7 @@ static int aes_cmac_handler(ACVP_TEST_CASE *test_case)
         uint8_t res_tag[MAX_TAG_LENGTH] = {0};
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.cmac;
 
@@ -816,7 +816,7 @@ static int aes_cmac_handler(ACVP_TEST_CASE *test_case)
                 break;
         default:
                 fprintf(stderr, "Unsupported AES key length\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         job = IMB_GET_NEXT_JOB(mb_mgr);
@@ -847,7 +847,7 @@ static int aes_cmac_handler(ACVP_TEST_CASE *test_case)
                 job = IMB_FLUSH_JOB(mb_mgr);
         if (job->status != IMB_STATUS_COMPLETED) {
                 fprintf(stderr, "Invalid job\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
 
         if (tc->verify == 1) {
@@ -857,13 +857,13 @@ static int aes_cmac_handler(ACVP_TEST_CASE *test_case)
                                         res_tag, (tc->mac_len));
                                 hexdump(stdout, "reference tag: ",
                                         tc->mac, tc->mac_len);
-                                fprintf(stderr, "Invalid tag\n");
+                                fprintf(stderr, "Tag mismatch\n");
                         }
                         tc->ver_disposition = ACVP_TEST_DISPOSITION_FAIL;
                 } else
                         tc->ver_disposition = ACVP_TEST_DISPOSITION_PASS;
         }
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int hmac_sha1_handler(ACVP_TEST_CASE *test_case)
@@ -874,7 +874,7 @@ static int hmac_sha1_handler(ACVP_TEST_CASE *test_case)
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA1_DIGEST_SIZE_IN_BYTES], 16);
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.hmac;
 
@@ -904,9 +904,9 @@ static int hmac_sha1_handler(ACVP_TEST_CASE *test_case)
                 job = IMB_FLUSH_JOB(mb_mgr);
         if (job->status != IMB_STATUS_COMPLETED) {
                 fprintf(stderr, "Invalid job\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int hmac_sha256_handler(ACVP_TEST_CASE *test_case)
@@ -917,7 +917,7 @@ static int hmac_sha256_handler(ACVP_TEST_CASE *test_case)
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA256_DIGEST_SIZE_IN_BYTES], 16);
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.hmac;
 
@@ -947,9 +947,9 @@ static int hmac_sha256_handler(ACVP_TEST_CASE *test_case)
                 job = IMB_FLUSH_JOB(mb_mgr);
         if (job->status != IMB_STATUS_COMPLETED) {
                 fprintf(stderr, "Invalid job\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int hmac_sha224_handler(ACVP_TEST_CASE *test_case)
@@ -960,7 +960,7 @@ static int hmac_sha224_handler(ACVP_TEST_CASE *test_case)
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA224_DIGEST_SIZE_IN_BYTES], 16);
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.hmac;
 
@@ -990,9 +990,9 @@ static int hmac_sha224_handler(ACVP_TEST_CASE *test_case)
                 job = IMB_FLUSH_JOB(mb_mgr);
         if (job->status != IMB_STATUS_COMPLETED) {
                 fprintf(stderr, "Invalid job\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int hmac_sha384_handler(ACVP_TEST_CASE *test_case)
@@ -1003,7 +1003,7 @@ static int hmac_sha384_handler(ACVP_TEST_CASE *test_case)
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.hmac;
 
@@ -1033,9 +1033,9 @@ static int hmac_sha384_handler(ACVP_TEST_CASE *test_case)
                 job = IMB_FLUSH_JOB(mb_mgr);
         if (job->status != IMB_STATUS_COMPLETED) {
                 fprintf(stderr, "Invalid job\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int hmac_sha512_handler(ACVP_TEST_CASE *test_case)
@@ -1046,7 +1046,7 @@ static int hmac_sha512_handler(ACVP_TEST_CASE *test_case)
         DECLARE_ALIGNED(uint8_t opad_hash[IMB_SHA512_DIGEST_SIZE_IN_BYTES], 16);
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.hmac;
 
@@ -1076,9 +1076,9 @@ static int hmac_sha512_handler(ACVP_TEST_CASE *test_case)
                 job = IMB_FLUSH_JOB(mb_mgr);
         if (job->status != IMB_STATUS_COMPLETED) {
                 fprintf(stderr, "Invalid job\n");
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
         }
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int sha1_handler(ACVP_TEST_CASE *test_case)
@@ -1089,7 +1089,7 @@ static int sha1_handler(ACVP_TEST_CASE *test_case)
         uint8_t *m;
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.hash;
 
@@ -1099,7 +1099,7 @@ static int sha1_handler(ACVP_TEST_CASE *test_case)
 
                 if (m == NULL) {
                         printf("Can't allocate buffer memory\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
                 memcpy(m, tc->m1, tc->msg_len);
                 memcpy(m + tc->msg_len, tc->m2, tc->msg_len);
@@ -1130,13 +1130,13 @@ static int sha1_handler(ACVP_TEST_CASE *test_case)
                         job = IMB_FLUSH_JOB(mb_mgr);
                 if (job->status != IMB_STATUS_COMPLETED) {
                         fprintf(stderr, "Invalid job\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
         if (tc->test_type == ACVP_HASH_TEST_TYPE_MCT)
                 free(m);
         tc->md_len = IMB_SHA1_DIGEST_SIZE_IN_BYTES;
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int sha2_224_handler(ACVP_TEST_CASE *test_case)
@@ -1147,7 +1147,7 @@ static int sha2_224_handler(ACVP_TEST_CASE *test_case)
         uint8_t *m;
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.hash;
 
@@ -1157,7 +1157,7 @@ static int sha2_224_handler(ACVP_TEST_CASE *test_case)
 
                 if (m == NULL) {
                         printf("Can't allocate buffer memory\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
                 memcpy(m, tc->m1, tc->msg_len);
                 memcpy(m + tc->msg_len, tc->m2, tc->msg_len);
@@ -1188,13 +1188,13 @@ static int sha2_224_handler(ACVP_TEST_CASE *test_case)
                         job = IMB_FLUSH_JOB(mb_mgr);
                 if (job->status != IMB_STATUS_COMPLETED) {
                         fprintf(stderr, "Invalid job\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
         if (tc->test_type == ACVP_HASH_TEST_TYPE_MCT)
                 free(m);
         tc->md_len = IMB_SHA224_DIGEST_SIZE_IN_BYTES;
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int sha2_256_handler(ACVP_TEST_CASE *test_case)
@@ -1205,7 +1205,7 @@ static int sha2_256_handler(ACVP_TEST_CASE *test_case)
         uint8_t *m;
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.hash;
 
@@ -1215,7 +1215,7 @@ static int sha2_256_handler(ACVP_TEST_CASE *test_case)
 
                 if (m == NULL) {
                         printf("Can't allocate buffer memory\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
                 memcpy(m, tc->m1, tc->msg_len);
                 memcpy(m + tc->msg_len, tc->m2, tc->msg_len);
@@ -1246,13 +1246,13 @@ static int sha2_256_handler(ACVP_TEST_CASE *test_case)
                         job = IMB_FLUSH_JOB(mb_mgr);
                 if (job->status != IMB_STATUS_COMPLETED) {
                         fprintf(stderr, "Invalid job\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
         if (tc->test_type == ACVP_HASH_TEST_TYPE_MCT)
                 free(m);
         tc->md_len = IMB_SHA256_DIGEST_SIZE_IN_BYTES;
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int sha2_384_handler(ACVP_TEST_CASE *test_case)
@@ -1263,7 +1263,7 @@ static int sha2_384_handler(ACVP_TEST_CASE *test_case)
         uint8_t *m;
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.hash;
 
@@ -1273,7 +1273,7 @@ static int sha2_384_handler(ACVP_TEST_CASE *test_case)
 
                 if (m == NULL) {
                         printf("Can't allocate buffer memory\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
                 memcpy(m, tc->m1, tc->msg_len);
                 memcpy(m + tc->msg_len, tc->m2, tc->msg_len);
@@ -1304,13 +1304,13 @@ static int sha2_384_handler(ACVP_TEST_CASE *test_case)
                         job = IMB_FLUSH_JOB(mb_mgr);
                 if (job->status != IMB_STATUS_COMPLETED) {
                         fprintf(stderr, "Invalid job\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
         if (tc->test_type == ACVP_HASH_TEST_TYPE_MCT)
                 free(m);
         tc->md_len = IMB_SHA384_DIGEST_SIZE_IN_BYTES;
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static int sha2_512_handler(ACVP_TEST_CASE *test_case)
@@ -1321,7 +1321,7 @@ static int sha2_512_handler(ACVP_TEST_CASE *test_case)
         uint8_t *m;
 
         if (test_case == NULL)
-                return EXIT_FAILURE;
+                return ACVP_CRYPTO_MODULE_FAIL;
 
         tc = test_case->tc.hash;
 
@@ -1331,7 +1331,7 @@ static int sha2_512_handler(ACVP_TEST_CASE *test_case)
 
                 if (m == NULL) {
                         printf("Can't allocate buffer memory\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
                 memcpy(m, tc->m1, tc->msg_len);
                 memcpy(m + tc->msg_len, tc->m2, tc->msg_len);
@@ -1362,13 +1362,13 @@ static int sha2_512_handler(ACVP_TEST_CASE *test_case)
                         job = IMB_FLUSH_JOB(mb_mgr);
                 if (job->status != IMB_STATUS_COMPLETED) {
                         fprintf(stderr, "Invalid job\n");
-                        return EXIT_FAILURE;
+                        return ACVP_CRYPTO_MODULE_FAIL;
                 }
         }
         if (tc->test_type == ACVP_HASH_TEST_TYPE_MCT)
                 free(m);
         tc->md_len = IMB_SHA512_DIGEST_SIZE_IN_BYTES;
-        return EXIT_SUCCESS;
+        return ACVP_SUCCESS;
 }
 
 static void usage(const char *app_name)
@@ -1469,7 +1469,11 @@ int main(int argc, char **argv)
         printf("ACVP library: %s\n", acvp_version());
 
         /* Create test session and enable supported algorithms */
-        acvp_ret = acvp_create_test_session(&ctx, logger, ACVP_LOG_LVL_INFO);
+        if (verbose)
+                acvp_ret = acvp_create_test_session(&ctx, logger, ACVP_LOG_LVL_VERBOSE);
+        else
+                acvp_ret = acvp_create_test_session(&ctx, logger, ACVP_LOG_LVL_INFO);
+
         if (acvp_ret != ACVP_SUCCESS)
                 goto exit;
 
-- 
GitLab


From 9374883b26517ac02fefe9c7709f54ec0980bb02 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 9 May 2023 16:58:54 +0100
Subject: [PATCH 261/332] cmake: improve OS detection

---
 CMakeLists.txt                 |  3 +++
 cmake/utils.cmake              | 13 +++++++++++++
 lib/CMakeLists.txt             |  6 +++---
 lib/cmake/unix.cmake           |  1 -
 lib/cmake/windows.cmake        |  1 -
 perf/CMakeLists.txt            |  6 +++---
 perf/cmake/unix.cmake          |  1 -
 perf/cmake/windows.cmake       |  1 -
 test/cmake/unix.cmake          |  1 -
 test/cmake/windows.cmake       |  1 -
 test/kat-app/CMakeLists.txt    |  6 +++---
 test/xvalid-app/CMakeLists.txt |  6 +++---
 12 files changed, 28 insertions(+), 18 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 09edd431..db21c7fa 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -34,6 +34,9 @@ cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb VERSION ${IPSEC_MB_VERSION}
     DESCRIPTION "Intel(R) IPsec Multi-Buffer library")
 
+# detect OS
+imb_detect_os()
+
 # set default project values
 imb_set_proj_defaults()
 
diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index 86520d05..3d99d7f3 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -30,6 +30,19 @@ macro(imb_get_version IMB_HDR_FILE)
   string(REGEX MATCH "[0-9]+.[0-9]+.[0-9]+" IPSEC_MB_VERSION ${IPSEC_MB_VERSION_FULL})
 endmacro()
 
+macro(imb_detect_os)
+  message(STATUS "OPERATING SYSTEM...        ${CMAKE_HOST_SYSTEM_NAME}")
+  if(CMAKE_HOST_UNIX)
+    if(CMAKE_HOST_SYSTEM_NAME STREQUAL "FreeBSD")
+      set(FREEBSD 1)
+    else()
+      set(LINUX 1)
+    endif()
+  else()
+    set(WINDOWS 1)
+  endif()
+endmacro()
+
 # set default project settings
 macro(imb_set_proj_defaults)
   set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Selected build type")
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index bff81911..ee0962c4 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -211,10 +211,10 @@ set(CAN_USE_ASSEMBLER 1)
 ########################################
 # add OS specific options
 ########################################
-if(CMAKE_HOST_UNIX)
-  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/unix.cmake)
-else()
+if(WINDOWS)
   include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/windows.cmake)
+else()
+  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/unix.cmake)
 endif()
 
 # add user defined cflags
diff --git a/lib/cmake/unix.cmake b/lib/cmake/unix.cmake
index 6e171101..8a7e95de 100644
--- a/lib/cmake/unix.cmake
+++ b/lib/cmake/unix.cmake
@@ -27,7 +27,6 @@
 # IPSec_MB library CMake Unix config
 # ##############################################################################
 
-set(LINUX 1)
 set(LIB IPSec_MB) # 'lib' prefix assumed on Linux
 
 message(STATUS "BUILD_TYPE...              ${CMAKE_BUILD_TYPE}")
diff --git a/lib/cmake/windows.cmake b/lib/cmake/windows.cmake
index 6bd58995..c5bd71ae 100644
--- a/lib/cmake/windows.cmake
+++ b/lib/cmake/windows.cmake
@@ -27,7 +27,6 @@
 # IPSec_MB library CMake Windows config
 # ##############################################################################
 
-set(WINDOWS 1)
 set(LIB libIPSec_MB)
 set(SRC_DEF_FILE ${CMAKE_CURRENT_BINARY_DIR}/${LIB}_lnk.def)
 
diff --git a/perf/CMakeLists.txt b/perf/CMakeLists.txt
index d3a1d676..ea1a6c0a 100644
--- a/perf/CMakeLists.txt
+++ b/perf/CMakeLists.txt
@@ -67,10 +67,10 @@ set(CAN_USE_ASSEMBLER TRUE)
 # set C compiler and NASM options
 ########################################
 # add OS specific options
-if(CMAKE_HOST_UNIX)
-  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/unix.cmake)
-else()
+if(WINDOWS)
   include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/windows.cmake)
+else()
+  include(${CMAKE_CURRENT_SOURCE_DIR}/cmake/unix.cmake)
 endif()
 
 ########################################
diff --git a/perf/cmake/unix.cmake b/perf/cmake/unix.cmake
index aff7ec7c..a85c05da 100644
--- a/perf/cmake/unix.cmake
+++ b/perf/cmake/unix.cmake
@@ -27,7 +27,6 @@
 # Performance application CMake Unix config
 # ##############################################################################
 
-set(LINUX 1)
 set(IPSEC_MB_LIB IPSec_MB)
 
 # set NASM flags
diff --git a/perf/cmake/windows.cmake b/perf/cmake/windows.cmake
index d4ad0df0..6901bc31 100644
--- a/perf/cmake/windows.cmake
+++ b/perf/cmake/windows.cmake
@@ -27,7 +27,6 @@
 # Performance application CMake Windows config
 # ##############################################################################
 
-set(WINDOWS 1)
 set(IPSEC_MB_LIB libIPSec_MB)
 
 # set NASM flags
diff --git a/test/cmake/unix.cmake b/test/cmake/unix.cmake
index cab15839..c29fe4e7 100644
--- a/test/cmake/unix.cmake
+++ b/test/cmake/unix.cmake
@@ -27,7 +27,6 @@
 # Test application CMake Unix config
 # ##############################################################################
 
-set(LINUX 1)
 set(IPSEC_MB_LIB IPSec_MB)
 
 # set NASM flags
diff --git a/test/cmake/windows.cmake b/test/cmake/windows.cmake
index b648dc94..dbd427bf 100644
--- a/test/cmake/windows.cmake
+++ b/test/cmake/windows.cmake
@@ -27,7 +27,6 @@
 # Test application CMake Windows config
 # ##############################################################################
 
-set(WINDOWS 1)
 set(IPSEC_MB_LIB libIPSec_MB)
 
 # set NASM flags
diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index bc4bf8d0..941f73b5 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -91,10 +91,10 @@ set(TEST_APP_SRC_FILES
 # set C compiler and NASM options
 ########################################
 # add OS specific options
-if(CMAKE_HOST_UNIX)
-  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/unix.cmake)
-else()
+if(WINDOWS)
   include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/windows.cmake)
+else()
+  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/unix.cmake)
 endif()
 
 ########################################
diff --git a/test/xvalid-app/CMakeLists.txt b/test/xvalid-app/CMakeLists.txt
index de22046e..926cbbce 100644
--- a/test/xvalid-app/CMakeLists.txt
+++ b/test/xvalid-app/CMakeLists.txt
@@ -62,10 +62,10 @@ set(CAN_USE_ASSEMBLER TRUE)
 # set C compiler and NASM options
 ########################################
 # add OS specific options
-if(CMAKE_HOST_UNIX)
-  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/unix.cmake)
-else()
+if(WINDOWS)
   include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/windows.cmake)
+else()
+  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/unix.cmake)
 endif()
 
 
-- 
GitLab


From abdbbf3c0894a3266b830ff2c5cd90088c9752d7 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 9 May 2023 17:26:25 +0100
Subject: [PATCH 262/332] cmake: add TAGS target

---
 CMakeLists.txt    |  3 +++
 cmake/utils.cmake | 14 ++++++++++++++
 2 files changed, 17 insertions(+)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index db21c7fa..4186af05 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -67,3 +67,6 @@ imb_add_target_print_help("${IPSEC_MB_OPTIONS}")
 
 # style check target
 imb_add_target_style_check()
+
+# TAGS target
+imb_add_target_tags()
diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index 3d99d7f3..3ed35370 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -100,3 +100,17 @@ macro(imb_add_target_style_check)
   include("${CMAKE_CURRENT_SOURCE_DIR}/cmake/clang-format.cmake")
 endmacro()
 
+# add TAGS target
+if(NOT WINDOWS)
+  macro(imb_add_target_tags)
+    add_custom_target(
+      TAGS
+      COMMAND ${CMAKE_COMMAND} -E echo "Building Tags table"
+      COMMAND bash -c "find . -name *.[ch] -print | etags -"
+      COMMAND bash -c "find ./ -name '*.asm'  | etags -a -"
+      COMMAND bash -c "find ./ -name '*.inc'  | etags -a -"
+      WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
+      VERBATIM
+      )
+  endmacro()
+endif()
-- 
GitLab


From ed24f61a19538fc8a4e30cdf1a8e7e27a3ac8238 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Thu, 18 May 2023 10:44:34 +0100
Subject: [PATCH 263/332] test: reduce log output

Reduce log output when --quiet is passed.
---
 test/kat-app/aes_cbcs_test.c           |  3 ++-
 test/kat-app/aes_test.c                | 10 ++++++----
 test/kat-app/ccm_test.c                |  7 +++++--
 test/kat-app/chacha20_poly1305_test.c  |  3 ++-
 test/kat-app/chacha_test.c             |  3 ++-
 test/kat-app/chained_test.c            |  3 ++-
 test/kat-app/cmac_test.c               | 18 ++++++++++++------
 test/kat-app/ctr_test.c                |  4 +++-
 test/kat-app/ecb_test.c                |  3 ++-
 test/kat-app/hmac_md5_test.c           |  4 +++-
 test/kat-app/hmac_sha1_test.c          |  3 ++-
 test/kat-app/hmac_sha256_sha512_test.c |  5 +++--
 test/kat-app/poly1305_test.c           |  3 ++-
 test/kat-app/quic_ecb_test.c           |  3 ++-
 test/kat-app/sha_test.c                |  3 ++-
 test/kat-app/xcbc_test.c               |  3 ++-
 16 files changed, 52 insertions(+), 26 deletions(-)

diff --git a/test/kat-app/aes_cbcs_test.c b/test/kat-app/aes_cbcs_test.c
index df704c37..7ea38835 100644
--- a/test/kat-app/aes_cbcs_test.c
+++ b/test/kat-app/aes_cbcs_test.c
@@ -3642,7 +3642,8 @@ test_aes_vectors(struct IMB_MGR *mb_mgr,
         DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
         DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
 
-	printf("%s (N jobs = %d):\n", banner, num_jobs);
+        if (!quiet_mode)
+	        printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_cnt; vect++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
diff --git a/test/kat-app/aes_test.c b/test/kat-app/aes_test.c
index c3074dd4..80a189df 100644
--- a/test/kat-app/aes_test.c
+++ b/test/kat-app/aes_test.c
@@ -2318,7 +2318,8 @@ test_aes_vectors(struct IMB_MGR *mb_mgr,
         DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
         DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
 
-	printf("%s (N jobs = %d):\n", banner, num_jobs);
+        if (!quiet_mode)
+	        printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_cnt; vect++) {
                 struct test_suite_context *ctx;
 
@@ -2708,7 +2709,8 @@ test_docrc_vectors(struct IMB_MGR *mb_mgr,
         DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
         DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
 
-	printf("%s (N jobs = %d):\n", banner, num_jobs);
+        if (!quiet_mode)
+	        printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_cnt; vect++) {
                 struct test_suite_context *ctx;
 
@@ -2863,8 +2865,8 @@ cfb_test_vectors(struct IMB_MGR *mb_mgr, struct test_suite_context *ctx128,
 {
         unsigned vect;
 
-
-        printf("AES-CFB test vectors (N jobs = %d):\n", num_jobs);
+        if (!quiet_mode)
+                printf("AES-CFB test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 0; vect < DIM(aes_cfb_tab); vect++) {
                 struct test_suite_context *ctx;
 
diff --git a/test/kat-app/ccm_test.c b/test/kat-app/ccm_test.c
index 1b33235a..7bdf32ca 100644
--- a/test/kat-app/ccm_test.c
+++ b/test/kat-app/ccm_test.c
@@ -2444,7 +2444,8 @@ test_ccm_128_std_vectors(struct IMB_MGR *mb_mgr,
 	const int vectors_cnt = sizeof(ccm_vectors) / sizeof(ccm_vectors[0]);
 	int vect;
 
-	printf("AES-CCM-128 standard test vectors (N jobs = %d):\n", num_jobs);
+        if (!quiet_mode)
+	        printf("AES-CCM-128 standard test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
 
@@ -2506,7 +2507,9 @@ test_ccm_256_std_vectors(struct IMB_MGR *mb_mgr,
 	const int vectors_cnt = DIM(ccm_256_vectors);
 	int vect;
 
-	printf("AES-CCM-256 standard test vectors (N jobs = %d):\n", num_jobs);
+        if (!quiet_mode)
+	        printf("AES-CCM-256 standard test vectors (N jobs = %d):\n",
+                       num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
 
diff --git a/test/kat-app/chacha20_poly1305_test.c b/test/kat-app/chacha20_poly1305_test.c
index 518514b2..49f0f669 100644
--- a/test/kat-app/chacha20_poly1305_test.c
+++ b/test/kat-app/chacha20_poly1305_test.c
@@ -588,7 +588,8 @@ test_aead_vectors(struct IMB_MGR *mb_mgr,
 {
 	size_t vect;
 
-	printf("%s (N jobs = %d):\n", banner, num_jobs);
+        if (!quiet_mode)
+	        printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_array_size; vect++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
diff --git a/test/kat-app/chacha_test.c b/test/kat-app/chacha_test.c
index c8a904d3..e15b9ae3 100644
--- a/test/kat-app/chacha_test.c
+++ b/test/kat-app/chacha_test.c
@@ -357,7 +357,8 @@ test_chacha_vectors(struct IMB_MGR *mb_mgr,
         DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
         DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
 
-	printf("%s (N jobs = %d):\n", banner, num_jobs);
+        if (!quiet_mode)
+	        printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_cnt; vect++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
diff --git a/test/kat-app/chained_test.c b/test/kat-app/chained_test.c
index 83a10304..d1e769d0 100644
--- a/test/kat-app/chained_test.c
+++ b/test/kat-app/chained_test.c
@@ -389,7 +389,8 @@ test_chained_vectors(struct IMB_MGR *mb_mgr,
         DECLARE_ALIGNED(uint8_t opad_hash[128], 16);
         unsigned i;
 
-        printf("%s (N jobs = %d):\n", banner, num_jobs);
+        if (!quiet_mode)
+                printf("%s (N jobs = %d):\n", banner, num_jobs);
         for (vect = 0; vect < vec_cnt; vect++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
diff --git a/test/kat-app/cmac_test.c b/test/kat-app/cmac_test.c
index bad7cd23..0eaaba4e 100644
--- a/test/kat-app/cmac_test.c
+++ b/test/kat-app/cmac_test.c
@@ -1329,7 +1329,9 @@ test_cmac_std_vectors(struct IMB_MGR *mb_mgr,
 	const int vectors_cnt = DIM(cmac_vectors);
 	int vect;
 
-	printf("AES-CMAC-128 standard test vectors (N jobs = %d):\n", num_jobs);
+        if (!quiet_mode)
+	        printf("AES-CMAC-128 standard test vectors (N jobs = %d):\n",
+                       num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
 
@@ -1373,7 +1375,9 @@ test_cmac_256_std_vectors(struct IMB_MGR *mb_mgr,
 	const int vectors_cnt = DIM(cmac_256_vectors);
 	int vect;
 
-	printf("AES-CMAC-256 standard test vectors (N jobs = %d):\n", num_jobs);
+        if (!quiet_mode)
+	        printf("AES-CMAC-256 standard test vectors (N jobs = %d):\n",
+                       num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
 
@@ -1416,8 +1420,9 @@ test_cmac_bitlen_std_vectors(struct IMB_MGR *mb_mgr,
 	const int vectors_cnt = sizeof(cmac_vectors) / sizeof(cmac_vectors[0]);
 	int vect;
 
-        printf("AES-CMAC-128 BITLEN standard test vectors "
-               "(N jobs = %d):\n", num_jobs);
+        if (!quiet_mode)
+                printf("AES-CMAC-128 BITLEN standard test vectors "
+                       "(N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
 
@@ -1463,8 +1468,9 @@ test_cmac_bitlen_3gpp_vectors(struct IMB_MGR *mb_mgr,
                 sizeof(cmac_3gpp_vectors) / sizeof(cmac_3gpp_vectors[0]);
 	int vect;
 
-	printf("AES-CMAC-128 BITLEN 3GPP test vectors (N jobs = %d):\n",
-               num_jobs);
+        if (!quiet_mode)
+	        printf("AES-CMAC-128 BITLEN 3GPP test vectors (N jobs = %d):\n",
+                       num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
 
diff --git a/test/kat-app/ctr_test.c b/test/kat-app/ctr_test.c
index 00af1a86..6c701287 100644
--- a/test/kat-app/ctr_test.c
+++ b/test/kat-app/ctr_test.c
@@ -1845,7 +1845,9 @@ test_ctr_vectors_burst(struct IMB_MGR *mb_mgr,
         DECLARE_ALIGNED(uint32_t expkey[4*15], 16);
         DECLARE_ALIGNED(uint32_t dust[4*15], 16);
 
-	printf("AES-CTR standard test vectors - Burst API (N jobs = %u):\n", num_jobs);
+        if (!quiet_mode)
+	        printf("AES-CTR standard test vectors - Burst API (N jobs = %u):\n",
+                       num_jobs);
 	for (vect = 0; vect < vectors_cnt; vect++) {
                 struct test_suite_context *ctx;
 
diff --git a/test/kat-app/ecb_test.c b/test/kat-app/ecb_test.c
index 8312e32a..d0505606 100644
--- a/test/kat-app/ecb_test.c
+++ b/test/kat-app/ecb_test.c
@@ -716,7 +716,8 @@ test_ecb_vectors(struct IMB_MGR *mb_mgr, const int vec_cnt,
         DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
         DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
 
-	printf("%s (N jobs = %d):\n", banner, num_jobs);
+        if (!quiet_mode)
+	        printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_cnt; vect++) {
                 struct test_suite_context *ctx = NULL;
 
diff --git a/test/kat-app/hmac_md5_test.c b/test/kat-app/hmac_md5_test.c
index 5e833e94..e7bc4ec2 100644
--- a/test/kat-app/hmac_md5_test.c
+++ b/test/kat-app/hmac_md5_test.c
@@ -197,7 +197,9 @@ test_hmac_md5_std_vectors(struct IMB_MGR *mb_mgr,
 
         const struct mac_test *v = hmac_md5_test_json;
 
-	printf("HMAC-MD5 standard test vectors (N jobs = %d):\n", num_jobs);
+        if (!quiet_mode)
+	        printf("HMAC-MD5 standard test vectors (N jobs = %d):\n",
+                       num_jobs);
 	for (; v->msg != NULL; v++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
diff --git a/test/kat-app/hmac_sha1_test.c b/test/kat-app/hmac_sha1_test.c
index 73ede2be..a7d74674 100644
--- a/test/kat-app/hmac_sha1_test.c
+++ b/test/kat-app/hmac_sha1_test.c
@@ -425,7 +425,8 @@ test_hmac_sha1_std_vectors(struct IMB_MGR *mb_mgr,
 {
         const struct mac_test *v = hmac_sha1_test_kat_json;
 
-	printf("HMAC-SHA1 standard test vectors (N jobs = %u):\n", num_jobs);
+        if (!quiet_mode)
+	        printf("HMAC-SHA1 standard test vectors (N jobs = %u):\n", num_jobs);
 	while (v->msg != NULL) {
                 if (!quiet_mode) {
 #ifdef DEBUG
diff --git a/test/kat-app/hmac_sha256_sha512_test.c b/test/kat-app/hmac_sha256_sha512_test.c
index 475aecc1..de184399 100644
--- a/test/kat-app/hmac_sha256_sha512_test.c
+++ b/test/kat-app/hmac_sha256_sha512_test.c
@@ -596,8 +596,9 @@ test_hmac_shax_std_vectors(struct IMB_MGR *mb_mgr,
                 v = hmac_sha512_test_kat_json;
                 break;
         }
-	printf("HMAC-SHA%d standard test vectors (N jobs = %u):\n",
-               sha_type, num_jobs);
+        if (!quiet_mode)
+	        printf("HMAC-SHA%d standard test vectors (N jobs = %u):\n",
+                       sha_type, num_jobs);
 	for (; v->msg != NULL; v++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
diff --git a/test/kat-app/poly1305_test.c b/test/kat-app/poly1305_test.c
index 39bb218f..d7fc198d 100644
--- a/test/kat-app/poly1305_test.c
+++ b/test/kat-app/poly1305_test.c
@@ -553,7 +553,8 @@ test_poly1305_vectors(struct IMB_MGR *mb_mgr,
 {
 	size_t vect;
 
-	printf("%s (N jobs = %d):\n", banner, num_jobs);
+        if (!quiet_mode)
+	        printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_array_size; vect++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
diff --git a/test/kat-app/quic_ecb_test.c b/test/kat-app/quic_ecb_test.c
index 5428c80e..fd00a02e 100644
--- a/test/kat-app/quic_ecb_test.c
+++ b/test/kat-app/quic_ecb_test.c
@@ -185,7 +185,8 @@ test_quic_ecb_vectors(struct IMB_MGR *mb_mgr, const int vec_cnt,
         DECLARE_ALIGNED(uint32_t enc_keys[15*4], 16);
         DECLARE_ALIGNED(uint32_t dec_keys[15*4], 16);
 
-	printf("%s (N jobs = %d):\n", banner, num_jobs);
+        if (!quiet_mode)
+	        printf("%s (N jobs = %d):\n", banner, num_jobs);
 	for (vect = 0; vect < vec_cnt; vect++) {
                 struct test_suite_context *ctx = NULL;
 
diff --git a/test/kat-app/sha_test.c b/test/kat-app/sha_test.c
index bcdba8c6..47e9bc1a 100644
--- a/test/kat-app/sha_test.c
+++ b/test/kat-app/sha_test.c
@@ -551,7 +551,8 @@ test_sha_vectors(struct IMB_MGR *mb_mgr,
 	int vect;
         struct test_suite_context *ctx;
 
-	printf("SHA standard test vectors (N jobs = %d):\n", num_jobs);
+        if (!quiet_mode)
+	        printf("SHA standard test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
 
diff --git a/test/kat-app/xcbc_test.c b/test/kat-app/xcbc_test.c
index 05b8e454..3b71bdf2 100644
--- a/test/kat-app/xcbc_test.c
+++ b/test/kat-app/xcbc_test.c
@@ -493,7 +493,8 @@ test_xcbc_std_vectors(struct IMB_MGR *mb_mgr,
 	const int vectors_cnt = DIM(xcbc_vectors);
 	int vect;
 
-	printf("AES-XCBC-128 standard test vectors (N jobs = %d):\n", num_jobs);
+        if (!quiet_mode)
+	        printf("AES-XCBC-128 standard test vectors (N jobs = %d):\n", num_jobs);
 	for (vect = 1; vect <= vectors_cnt; vect++) {
                 const int idx = vect - 1;
 
-- 
GitLab


From 6920ab33bcfd43c816260a510f52772c2319aaa8 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Wed, 17 May 2023 11:57:34 +0100
Subject: [PATCH 264/332] lib: [QUIC] refactor ECB to remove dead code

Last check for 192-bit key size will never be executed,
if SAFE_PARAM is set. With this refactoring, this dead code
is removed.
---
 lib/x86_64/quic_hp_aes_ecb.c | 17 ++++-------------
 1 file changed, 4 insertions(+), 13 deletions(-)

diff --git a/lib/x86_64/quic_hp_aes_ecb.c b/lib/x86_64/quic_hp_aes_ecb.c
index d5e42879..bd8b5697 100644
--- a/lib/x86_64/quic_hp_aes_ecb.c
+++ b/lib/x86_64/quic_hp_aes_ecb.c
@@ -61,21 +61,8 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
                         return;
                 }
         }
-
-        switch (key_size) {
-        case IMB_KEY_128_BYTES:
-        case IMB_KEY_256_BYTES:
-                break;
-        /* AES-192 is not supported by QUIC */
-        case IMB_KEY_192_BYTES:
-        default:
-                imb_set_errno(state, IMB_ERR_KEY_LEN);
-                return;
-        }
 #endif /* SAFE_PARAM */
 
-        imb_set_errno(state, 0);
-
         switch (key_size) {
         case IMB_KEY_128_BYTES:
                 state->aes_ecb_128_quic(src_ptr_array, exp_key_data,
@@ -85,8 +72,12 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
                 state->aes_ecb_256_quic(src_ptr_array, exp_key_data,
                                         dst_ptr_array, num_packets);
                 break;
+        /* AES-192 is not supported by QUIC */
+        case IMB_KEY_192_BYTES:
         default:
                 imb_set_errno(state, IMB_ERR_KEY_LEN);
                 return;
         };
+
+        imb_set_errno(state, 0);
 }
-- 
GitLab


From 4588e0b24fca2067f7af7a3d43771078ca9ac84a Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 8 May 2023 15:31:34 +0100
Subject: [PATCH 265/332] avx2: [MB MGR] remove include of arch_avx512_type2.h
 file

---
 lib/avx2_t1/mb_mgr_avx2_t1.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/lib/avx2_t1/mb_mgr_avx2_t1.c b/lib/avx2_t1/mb_mgr_avx2_t1.c
index 4c7cb33e..db4aa440 100644
--- a/lib/avx2_t1/mb_mgr_avx2_t1.c
+++ b/lib/avx2_t1/mb_mgr_avx2_t1.c
@@ -50,7 +50,6 @@
 #include "include/arch_sse_type1.h" /* poly1305, snow3g */
 #include "include/arch_avx_type1.h"
 #include "include/arch_avx2_type1.h"
-#include "include/arch_avx512_type2.h"
 
 #include "include/ooo_mgr_reset.h"
 
-- 
GitLab


From 138229494bae3c79b73ae191a6d98222182e8805 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Mon, 8 May 2023 15:41:40 +0100
Subject: [PATCH 266/332] avx: [MB MGR] use SSE implementation for aes-gcm,
 aes-gmac and ghash

This is to obsolete AVX gen2 implementations and replace them with SSE ones:
- identical implementation
  - Karatsuba multiply
  - 8 block pipeline
- very small performance difference on new processors
---
 lib/avx_t1/mb_mgr_avx_t1.c | 100 ++++++++++++++++++-------------------
 lib/avx_t2/mb_mgr_avx_t2.c |  95 ++++++++++++++++++-----------------
 2 files changed, 98 insertions(+), 97 deletions(-)

diff --git a/lib/avx_t1/mb_mgr_avx_t1.c b/lib/avx_t1/mb_mgr_avx_t1.c
index 5bdd94f8..92d69894 100644
--- a/lib/avx_t1/mb_mgr_avx_t1.c
+++ b/lib/avx_t1/mb_mgr_avx_t1.c
@@ -44,7 +44,7 @@
 #include "include/cpu_feature.h"
 #include "include/aesni_emu.h"
 #include "include/error.h"
-#include "include/arch_sse_type1.h" /* snow3g */
+#include "include/arch_sse_type1.h" /* snow3g, gcm */
 #include "include/arch_avx_type1.h"
 #include "include/ooo_mgr_reset.h"
 
@@ -78,12 +78,12 @@
 #define SUBMIT_JOB_CIPHER_DEC SUBMIT_JOB_CIPHER_DEC_AVX
 
 /* AES-GCM */
-#define AES_GCM_DEC_IV_128   aes_gcm_dec_var_iv_128_avx_gen2
-#define AES_GCM_ENC_IV_128   aes_gcm_enc_var_iv_128_avx_gen2
-#define AES_GCM_DEC_IV_192   aes_gcm_dec_var_iv_192_avx_gen2
-#define AES_GCM_ENC_IV_192   aes_gcm_enc_var_iv_192_avx_gen2
-#define AES_GCM_DEC_IV_256   aes_gcm_dec_var_iv_256_avx_gen2
-#define AES_GCM_ENC_IV_256   aes_gcm_enc_var_iv_256_avx_gen2
+#define AES_GCM_DEC_IV_128   aes_gcm_dec_var_iv_128_sse
+#define AES_GCM_ENC_IV_128   aes_gcm_enc_var_iv_128_sse
+#define AES_GCM_DEC_IV_192   aes_gcm_dec_var_iv_192_sse
+#define AES_GCM_ENC_IV_192   aes_gcm_enc_var_iv_192_sse
+#define AES_GCM_DEC_IV_256   aes_gcm_dec_var_iv_256_sse
+#define AES_GCM_ENC_IV_256   aes_gcm_enc_var_iv_256_sse
 
 #define SUBMIT_JOB_AES_GCM_DEC submit_job_aes_gcm_dec_avx
 #define SUBMIT_JOB_AES_GCM_ENC submit_job_aes_gcm_enc_avx
@@ -437,49 +437,49 @@ init_mb_mgr_avx_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->chacha20_poly1305_dec_update = update_dec_chacha20_poly1305_avx;
         state->chacha20_poly1305_finalize = finalize_chacha20_poly1305_avx;
 
-        state->gcm128_enc          = aes_gcm_enc_128_avx_gen2;
-        state->gcm192_enc          = aes_gcm_enc_192_avx_gen2;
-        state->gcm256_enc          = aes_gcm_enc_256_avx_gen2;
-        state->gcm128_dec          = aes_gcm_dec_128_avx_gen2;
-        state->gcm192_dec          = aes_gcm_dec_192_avx_gen2;
-        state->gcm256_dec          = aes_gcm_dec_256_avx_gen2;
-        state->gcm128_init         = aes_gcm_init_128_avx_gen2;
-        state->gcm192_init         = aes_gcm_init_192_avx_gen2;
-        state->gcm256_init         = aes_gcm_init_256_avx_gen2;
-        state->gcm128_init_var_iv  = aes_gcm_init_var_iv_128_avx_gen2;
-        state->gcm192_init_var_iv  = aes_gcm_init_var_iv_192_avx_gen2;
-        state->gcm256_init_var_iv  = aes_gcm_init_var_iv_256_avx_gen2;
-        state->gcm128_enc_update   = aes_gcm_enc_128_update_avx_gen2;
-        state->gcm192_enc_update   = aes_gcm_enc_192_update_avx_gen2;
-        state->gcm256_enc_update   = aes_gcm_enc_256_update_avx_gen2;
-        state->gcm128_dec_update   = aes_gcm_dec_128_update_avx_gen2;
-        state->gcm192_dec_update   = aes_gcm_dec_192_update_avx_gen2;
-        state->gcm256_dec_update   = aes_gcm_dec_256_update_avx_gen2;
-        state->gcm128_enc_finalize = aes_gcm_enc_128_finalize_avx_gen2;
-        state->gcm192_enc_finalize = aes_gcm_enc_192_finalize_avx_gen2;
-        state->gcm256_enc_finalize = aes_gcm_enc_256_finalize_avx_gen2;
-        state->gcm128_dec_finalize = aes_gcm_dec_128_finalize_avx_gen2;
-        state->gcm192_dec_finalize = aes_gcm_dec_192_finalize_avx_gen2;
-        state->gcm256_dec_finalize = aes_gcm_dec_256_finalize_avx_gen2;
-        state->gcm128_precomp      = aes_gcm_precomp_128_avx_gen2;
-        state->gcm192_precomp      = aes_gcm_precomp_192_avx_gen2;
-        state->gcm256_precomp      = aes_gcm_precomp_256_avx_gen2;
-        state->gcm128_pre          = aes_gcm_pre_128_avx_gen2;
-        state->gcm192_pre          = aes_gcm_pre_192_avx_gen2;
-        state->gcm256_pre          = aes_gcm_pre_256_avx_gen2;
-
-        state->ghash               = ghash_avx_gen2;
-        state->ghash_pre           = ghash_pre_avx_gen2;
-
-        state->gmac128_init        = imb_aes_gmac_init_128_avx_gen2;
-        state->gmac192_init        = imb_aes_gmac_init_192_avx_gen2;
-        state->gmac256_init        = imb_aes_gmac_init_256_avx_gen2;
-        state->gmac128_update      = imb_aes_gmac_update_128_avx_gen2;
-        state->gmac192_update      = imb_aes_gmac_update_192_avx_gen2;
-        state->gmac256_update      = imb_aes_gmac_update_256_avx_gen2;
-        state->gmac128_finalize    = imb_aes_gmac_finalize_128_avx_gen2;
-        state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen2;
-        state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen2;
+        state->gcm128_enc          = aes_gcm_enc_128_sse;
+        state->gcm192_enc          = aes_gcm_enc_192_sse;
+        state->gcm256_enc          = aes_gcm_enc_256_sse;
+        state->gcm128_dec          = aes_gcm_dec_128_sse;
+        state->gcm192_dec          = aes_gcm_dec_192_sse;
+        state->gcm256_dec          = aes_gcm_dec_256_sse;
+        state->gcm128_init         = aes_gcm_init_128_sse;
+        state->gcm192_init         = aes_gcm_init_192_sse;
+        state->gcm256_init         = aes_gcm_init_256_sse;
+        state->gcm128_init_var_iv  = aes_gcm_init_var_iv_128_sse;
+        state->gcm192_init_var_iv  = aes_gcm_init_var_iv_192_sse;
+        state->gcm256_init_var_iv  = aes_gcm_init_var_iv_256_sse;
+        state->gcm128_enc_update   = aes_gcm_enc_128_update_sse;
+        state->gcm192_enc_update   = aes_gcm_enc_192_update_sse;
+        state->gcm256_enc_update   = aes_gcm_enc_256_update_sse;
+        state->gcm128_dec_update   = aes_gcm_dec_128_update_sse;
+        state->gcm192_dec_update   = aes_gcm_dec_192_update_sse;
+        state->gcm256_dec_update   = aes_gcm_dec_256_update_sse;
+        state->gcm128_enc_finalize = aes_gcm_enc_128_finalize_sse;
+        state->gcm192_enc_finalize = aes_gcm_enc_192_finalize_sse;
+        state->gcm256_enc_finalize = aes_gcm_enc_256_finalize_sse;
+        state->gcm128_dec_finalize = aes_gcm_dec_128_finalize_sse;
+        state->gcm192_dec_finalize = aes_gcm_dec_192_finalize_sse;
+        state->gcm256_dec_finalize = aes_gcm_dec_256_finalize_sse;
+        state->gcm128_precomp      = aes_gcm_precomp_128_sse;
+        state->gcm192_precomp      = aes_gcm_precomp_192_sse;
+        state->gcm256_precomp      = aes_gcm_precomp_256_sse;
+        state->gcm128_pre          = aes_gcm_pre_128_sse;
+        state->gcm192_pre          = aes_gcm_pre_192_sse;
+        state->gcm256_pre          = aes_gcm_pre_256_sse;
+
+        state->ghash               = ghash_sse;
+        state->ghash_pre           = ghash_pre_sse;
+
+        state->gmac128_init        = imb_aes_gmac_init_128_sse;
+        state->gmac192_init        = imb_aes_gmac_init_192_sse;
+        state->gmac256_init        = imb_aes_gmac_init_256_sse;
+        state->gmac128_update      = imb_aes_gmac_update_128_sse;
+        state->gmac192_update      = imb_aes_gmac_update_192_sse;
+        state->gmac256_update      = imb_aes_gmac_update_256_sse;
+        state->gmac128_finalize    = imb_aes_gmac_finalize_128_sse;
+        state->gmac192_finalize    = imb_aes_gmac_finalize_192_sse;
+        state->gmac256_finalize    = imb_aes_gmac_finalize_256_sse;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
diff --git a/lib/avx_t2/mb_mgr_avx_t2.c b/lib/avx_t2/mb_mgr_avx_t2.c
index 39b1ee37..e9ea5020 100644
--- a/lib/avx_t2/mb_mgr_avx_t2.c
+++ b/lib/avx_t2/mb_mgr_avx_t2.c
@@ -49,6 +49,7 @@
 #include "include/arch_sse_type2.h" /* shani */
 #include "include/arch_avx_type1.h"
 #include "include/arch_avx_type2.h"
+#include "include/arch_avx2_type1.h" /* gcm */
 
 #include "include/ooo_mgr_reset.h"
 
@@ -82,12 +83,12 @@
 #define SUBMIT_JOB_CIPHER_DEC SUBMIT_JOB_CIPHER_DEC_AVX_T2
 
 /* AES-GCM */
-#define AES_GCM_DEC_IV_128   aes_gcm_dec_var_iv_128_avx_gen2
-#define AES_GCM_ENC_IV_128   aes_gcm_enc_var_iv_128_avx_gen2
-#define AES_GCM_DEC_IV_192   aes_gcm_dec_var_iv_192_avx_gen2
-#define AES_GCM_ENC_IV_192   aes_gcm_enc_var_iv_192_avx_gen2
-#define AES_GCM_DEC_IV_256   aes_gcm_dec_var_iv_256_avx_gen2
-#define AES_GCM_ENC_IV_256   aes_gcm_enc_var_iv_256_avx_gen2
+#define AES_GCM_DEC_IV_128   aes_gcm_dec_var_iv_128_avx_gen4
+#define AES_GCM_ENC_IV_128   aes_gcm_enc_var_iv_128_avx_gen4
+#define AES_GCM_DEC_IV_192   aes_gcm_dec_var_iv_192_avx_gen4
+#define AES_GCM_ENC_IV_192   aes_gcm_enc_var_iv_192_avx_gen4
+#define AES_GCM_DEC_IV_256   aes_gcm_dec_var_iv_256_avx_gen4
+#define AES_GCM_ENC_IV_256   aes_gcm_enc_var_iv_256_avx_gen4
 
 #define SUBMIT_JOB_AES_GCM_DEC submit_job_aes_gcm_dec_avx
 #define SUBMIT_JOB_AES_GCM_ENC submit_job_aes_gcm_enc_avx
@@ -439,49 +440,49 @@ init_mb_mgr_avx_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->chacha20_poly1305_dec_update = update_dec_chacha20_poly1305_avx;
         state->chacha20_poly1305_finalize = finalize_chacha20_poly1305_avx;
 
-        state->gcm128_enc          = aes_gcm_enc_128_avx_gen2;
-        state->gcm192_enc          = aes_gcm_enc_192_avx_gen2;
-        state->gcm256_enc          = aes_gcm_enc_256_avx_gen2;
-        state->gcm128_dec          = aes_gcm_dec_128_avx_gen2;
-        state->gcm192_dec          = aes_gcm_dec_192_avx_gen2;
-        state->gcm256_dec          = aes_gcm_dec_256_avx_gen2;
-        state->gcm128_init         = aes_gcm_init_128_avx_gen2;
-        state->gcm192_init         = aes_gcm_init_192_avx_gen2;
-        state->gcm256_init         = aes_gcm_init_256_avx_gen2;
-        state->gcm128_init_var_iv  = aes_gcm_init_var_iv_128_avx_gen2;
-        state->gcm192_init_var_iv  = aes_gcm_init_var_iv_192_avx_gen2;
-        state->gcm256_init_var_iv  = aes_gcm_init_var_iv_256_avx_gen2;
-        state->gcm128_enc_update   = aes_gcm_enc_128_update_avx_gen2;
-        state->gcm192_enc_update   = aes_gcm_enc_192_update_avx_gen2;
-        state->gcm256_enc_update   = aes_gcm_enc_256_update_avx_gen2;
-        state->gcm128_dec_update   = aes_gcm_dec_128_update_avx_gen2;
-        state->gcm192_dec_update   = aes_gcm_dec_192_update_avx_gen2;
-        state->gcm256_dec_update   = aes_gcm_dec_256_update_avx_gen2;
-        state->gcm128_enc_finalize = aes_gcm_enc_128_finalize_avx_gen2;
-        state->gcm192_enc_finalize = aes_gcm_enc_192_finalize_avx_gen2;
-        state->gcm256_enc_finalize = aes_gcm_enc_256_finalize_avx_gen2;
-        state->gcm128_dec_finalize = aes_gcm_dec_128_finalize_avx_gen2;
-        state->gcm192_dec_finalize = aes_gcm_dec_192_finalize_avx_gen2;
-        state->gcm256_dec_finalize = aes_gcm_dec_256_finalize_avx_gen2;
-        state->gcm128_precomp      = aes_gcm_precomp_128_avx_gen2;
-        state->gcm192_precomp      = aes_gcm_precomp_192_avx_gen2;
-        state->gcm256_precomp      = aes_gcm_precomp_256_avx_gen2;
-        state->gcm128_pre          = aes_gcm_pre_128_avx_gen2;
-        state->gcm192_pre          = aes_gcm_pre_192_avx_gen2;
-        state->gcm256_pre          = aes_gcm_pre_256_avx_gen2;
-
-        state->ghash               = ghash_avx_gen2;
+        state->gcm128_enc          = aes_gcm_enc_128_avx_gen4;
+        state->gcm192_enc          = aes_gcm_enc_192_avx_gen4;
+        state->gcm256_enc          = aes_gcm_enc_256_avx_gen4;
+        state->gcm128_dec          = aes_gcm_dec_128_avx_gen4;
+        state->gcm192_dec          = aes_gcm_dec_192_avx_gen4;
+        state->gcm256_dec          = aes_gcm_dec_256_avx_gen4;
+        state->gcm128_init         = aes_gcm_init_128_avx_gen4;
+        state->gcm192_init         = aes_gcm_init_192_avx_gen4;
+        state->gcm256_init         = aes_gcm_init_256_avx_gen4;
+        state->gcm128_init_var_iv  = aes_gcm_init_var_iv_128_avx_gen4;
+        state->gcm192_init_var_iv  = aes_gcm_init_var_iv_192_avx_gen4;
+        state->gcm256_init_var_iv  = aes_gcm_init_var_iv_256_avx_gen4;
+        state->gcm128_enc_update   = aes_gcm_enc_128_update_avx_gen4;
+        state->gcm192_enc_update   = aes_gcm_enc_192_update_avx_gen4;
+        state->gcm256_enc_update   = aes_gcm_enc_256_update_avx_gen4;
+        state->gcm128_dec_update   = aes_gcm_dec_128_update_avx_gen4;
+        state->gcm192_dec_update   = aes_gcm_dec_192_update_avx_gen4;
+        state->gcm256_dec_update   = aes_gcm_dec_256_update_avx_gen4;
+        state->gcm128_enc_finalize = aes_gcm_enc_128_finalize_avx_gen4;
+        state->gcm192_enc_finalize = aes_gcm_enc_192_finalize_avx_gen4;
+        state->gcm256_enc_finalize = aes_gcm_enc_256_finalize_avx_gen4;
+        state->gcm128_dec_finalize = aes_gcm_dec_128_finalize_avx_gen4;
+        state->gcm192_dec_finalize = aes_gcm_dec_192_finalize_avx_gen4;
+        state->gcm256_dec_finalize = aes_gcm_dec_256_finalize_avx_gen4;
+        state->gcm128_precomp      = aes_gcm_precomp_128_avx_gen4;
+        state->gcm192_precomp      = aes_gcm_precomp_192_avx_gen4;
+        state->gcm256_precomp      = aes_gcm_precomp_256_avx_gen4;
+        state->gcm128_pre          = aes_gcm_pre_128_avx_gen4;
+        state->gcm192_pre          = aes_gcm_pre_192_avx_gen4;
+        state->gcm256_pre          = aes_gcm_pre_256_avx_gen4;
+
+        state->ghash               = ghash_avx_gen4;
         state->ghash_pre           = ghash_pre_avx_gen2;
 
-        state->gmac128_init        = imb_aes_gmac_init_128_avx_gen2;
-        state->gmac192_init        = imb_aes_gmac_init_192_avx_gen2;
-        state->gmac256_init        = imb_aes_gmac_init_256_avx_gen2;
-        state->gmac128_update      = imb_aes_gmac_update_128_avx_gen2;
-        state->gmac192_update      = imb_aes_gmac_update_192_avx_gen2;
-        state->gmac256_update      = imb_aes_gmac_update_256_avx_gen2;
-        state->gmac128_finalize    = imb_aes_gmac_finalize_128_avx_gen2;
-        state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen2;
-        state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen2;
+        state->gmac128_init        = imb_aes_gmac_init_128_avx_gen4;
+        state->gmac192_init        = imb_aes_gmac_init_192_avx_gen4;
+        state->gmac256_init        = imb_aes_gmac_init_256_avx_gen4;
+        state->gmac128_update      = imb_aes_gmac_update_128_avx_gen4;
+        state->gmac192_update      = imb_aes_gmac_update_192_avx_gen4;
+        state->gmac256_update      = imb_aes_gmac_update_256_avx_gen4;
+        state->gmac128_finalize    = imb_aes_gmac_finalize_128_avx_gen4;
+        state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen4;
+        state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen4;
 
         state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
         state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
-- 
GitLab


From 188e981f570671f9739845c68bcaf8ccd742602b Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 9 May 2023 16:08:08 +0100
Subject: [PATCH 267/332] avx: [aes-gcm] remove AVX implementation of aes-gcm

For compatibility, AVX aes-gcm symbols point to the SSE implementation now.
---
 lib/Makefile                      |    3 +-
 lib/avx_t1/aes128_gcm_by8_avx.asm |   31 -
 lib/avx_t1/aes192_gcm_by8_avx.asm |   31 -
 lib/avx_t1/aes256_gcm_by8_avx.asm |   30 -
 lib/include/gcm.h                 |   15 -
 lib/include/gcm_avx_gen2.inc      | 3310 -----------------------------
 lib/sse_t1/gcm_api_sse.inc        |   15 +
 lib/sse_t1/gcm_gmac_api_sse.inc   |    9 +
 lib/sse_t1/gcm_sgl_api_sse.inc    |   18 +
 lib/sse_t1/gcm_sse.inc            |    6 +
 lib/win_x64.mak                   |    3 -
 lib/x86_64/gcm.c                  |   72 +-
 12 files changed, 64 insertions(+), 3479 deletions(-)
 delete mode 100644 lib/avx_t1/aes128_gcm_by8_avx.asm
 delete mode 100644 lib/avx_t1/aes192_gcm_by8_avx.asm
 delete mode 100644 lib/avx_t1/aes256_gcm_by8_avx.asm
 delete mode 100644 lib/include/gcm_avx_gen2.inc

diff --git a/lib/Makefile b/lib/Makefile
index 9cd75155..59ab2b58 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -720,8 +720,7 @@ asm_sse_gcm_objs := \
 	gcm128_sgl_api_by8_sse.o gcm192_sgl_api_by8_sse.o gcm256_sgl_api_by8_sse.o \
 	gcm128_gmac_api_by8_sse.o gcm192_gmac_api_by8_sse.o gcm256_gmac_api_by8_sse.o
 
-asm_avx_gcm_objs := \
-	aes128_gcm_by8_avx.o aes192_gcm_by8_avx.o aes256_gcm_by8_avx.o
+asm_avx_gcm_objs :=
 
 asm_avx2_gcm_objs := \
 	aes128_gcm_by8_avx2.o aes192_gcm_by8_avx2.o aes256_gcm_by8_avx2.o
diff --git a/lib/avx_t1/aes128_gcm_by8_avx.asm b/lib/avx_t1/aes128_gcm_by8_avx.asm
deleted file mode 100644
index e0c28049..00000000
--- a/lib/avx_t1/aes128_gcm_by8_avx.asm
+++ /dev/null
@@ -1,31 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2022 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%define GCM128_MODE 1
-%include "include/gcm_avx_gen2.inc"
diff --git a/lib/avx_t1/aes192_gcm_by8_avx.asm b/lib/avx_t1/aes192_gcm_by8_avx.asm
deleted file mode 100644
index 4270ccbb..00000000
--- a/lib/avx_t1/aes192_gcm_by8_avx.asm
+++ /dev/null
@@ -1,31 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%define GCM192_MODE 1
-%include "include/gcm_avx_gen2.inc"
diff --git a/lib/avx_t1/aes256_gcm_by8_avx.asm b/lib/avx_t1/aes256_gcm_by8_avx.asm
deleted file mode 100644
index 5d837f1a..00000000
--- a/lib/avx_t1/aes256_gcm_by8_avx.asm
+++ /dev/null
@@ -1,30 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2022 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%define GCM256_MODE 1
-%include "include/gcm_avx_gen2.inc"
diff --git a/lib/include/gcm.h b/lib/include/gcm.h
index 6903ca1e..f13de26e 100644
--- a/lib/include/gcm.h
+++ b/lib/include/gcm.h
@@ -517,7 +517,6 @@ aes_gcm_init_var_iv_256_sse(const struct gcm_key_data *key_data,
                             struct gcm_context_data *context_data,
                             const uint8_t *iv, const uint64_t iv_len,
                             const uint8_t *aad, const uint64_t aad_len);
-
 IMB_DLL_EXPORT void
 aes_gcm_init_var_iv_256_avx_gen2(const struct gcm_key_data *key_data,
                                  struct gcm_context_data *context_data,
@@ -547,20 +546,6 @@ aes_gcm_dec_var_iv_192_sse(IMB_MGR *state, IMB_JOB *job);
 IMB_DLL_LOCAL IMB_JOB *
 aes_gcm_dec_var_iv_256_sse(IMB_MGR *state, IMB_JOB *job);
 
-IMB_DLL_LOCAL IMB_JOB *
-aes_gcm_enc_var_iv_128_avx_gen2(IMB_MGR *state, IMB_JOB *job);
-IMB_DLL_LOCAL IMB_JOB *
-aes_gcm_enc_var_iv_192_avx_gen2(IMB_MGR *state, IMB_JOB *job);
-IMB_DLL_LOCAL IMB_JOB *
-aes_gcm_enc_var_iv_256_avx_gen2(IMB_MGR *state, IMB_JOB *job);
-
-IMB_DLL_LOCAL IMB_JOB *
-aes_gcm_dec_var_iv_128_avx_gen2(IMB_MGR *state, IMB_JOB *job);
-IMB_DLL_LOCAL IMB_JOB *
-aes_gcm_dec_var_iv_192_avx_gen2(IMB_MGR *state, IMB_JOB *job);
-IMB_DLL_LOCAL IMB_JOB *
-aes_gcm_dec_var_iv_256_avx_gen2(IMB_MGR *state, IMB_JOB *job);
-
 IMB_DLL_LOCAL IMB_JOB *
 aes_gcm_enc_var_iv_128_avx_gen4(IMB_MGR *state, IMB_JOB *job);
 IMB_DLL_LOCAL IMB_JOB *
diff --git a/lib/include/gcm_avx_gen2.inc b/lib/include/gcm_avx_gen2.inc
deleted file mode 100644
index fe671e73..00000000
--- a/lib/include/gcm_avx_gen2.inc
+++ /dev/null
@@ -1,3310 +0,0 @@
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2011-2022 Intel Corporation All rights reserved.
-;
-;  Redistribution and use in source and binary forms, with or without
-;  modification, are permitted provided that the following conditions
-;  are met:
-;    * Redistributions of source code must retain the above copyright
-;      notice, this list of conditions and the following disclaimer.
-;    * Redistributions in binary form must reproduce the above copyright
-;      notice, this list of conditions and the following disclaimer in
-;      the documentation and/or other materials provided with the
-;      distribution.
-;    * Neither the name of Intel Corporation nor the names of its
-;      contributors may be used to endorse or promote products derived
-;      from this software without specific prior written permission.
-;
-;  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-;  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-;  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-;  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-;  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-;  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-;  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-;  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-;  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-;  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;
-; Authors:
-;       Erdinc Ozturk
-;       Vinodh Gopal
-;       James Guilford
-;
-;
-; References:
-;       This code was derived and highly optimized from the code described in paper:
-;               Vinodh Gopal et. al. Optimized Galois-Counter-Mode Implementation on Intel Architecture Processors. August, 2010
-;
-;       For the shift-based reductions used in this code, we used the method described in paper:
-;               Shay Gueron, Michael E. Kounavis. Intel Carry-Less Multiplication Instruction and its Usage for Computing the GCM Mode. January, 2010.
-;
-;
-;
-;
-; Assumptions:
-;
-;
-;
-; iv:
-;       0                   1                   2                   3
-;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                             Salt  (From the SA)               |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                     Initialization Vector                     |
-;       |         (This is the sequence number from IPSec header)       |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                              0x1                              |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;
-;
-;
-; AAD:
-;       AAD will be padded with 0 to the next 16byte multiple
-;       for example, assume AAD is a u32 vector
-;
-;       if AAD is 8 bytes:
-;       AAD[3] = {A0, A1};
-;       padded AAD in xmm register = {A1 A0 0 0}
-;
-;       0                   1                   2                   3
-;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                               SPI (A1)                        |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                     32-bit Sequence Number (A0)               |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                              0x0                              |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;
-;                                       AAD Format with 32-bit Sequence Number
-;
-;       if AAD is 12 bytes:
-;       AAD[3] = {A0, A1, A2};
-;       padded AAD in xmm register = {A2 A1 A0 0}
-;
-;       0                   1                   2                   3
-;       0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                               SPI (A2)                        |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                 64-bit Extended Sequence Number {A1,A0}       |
-;       |                                                               |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;       |                              0x0                              |
-;       +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
-;
-;        AAD Format with 64-bit Extended Sequence Number
-;
-;
-; aadLen:
-;       Must be a multiple of 4 bytes and from the definition of the spec.
-;       The code additionally supports any aadLen length.
-;
-; TLen:
-;       from the definition of the spec, TLen can only be 8, 12 or 16 bytes.
-;
-; poly = x^128 + x^127 + x^126 + x^121 + 1
-; throughout the code, one tab and two tab indentations are used. one tab is for GHASH part, two tabs is for AES part.
-;
-
-%include "include/os.inc"
-%include "include/reg_sizes.inc"
-%include "include/clear_regs.inc"
-%include "include/gcm_defines.inc"
-%include "include/gcm_keys_sse_avx.inc"
-%include "include/gcm_common.inc"
-%include "include/memcpy.inc"
-%include "include/cet.inc"
-%include "include/error.inc"
-%include "include/imb_job.inc"
-
-%ifndef GCM128_MODE
-%ifndef GCM192_MODE
-%ifndef GCM256_MODE
-%error "No GCM mode selected for gcm_avx_gen2.inc!"
-%endif
-%endif
-%endif
-
-%ifdef GCM128_MODE
-%define FN_NAME(x,y) aes_gcm_ %+ x %+ _128 %+ y %+ avx_gen2
-%define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _128_ %+ avx_gen2
-%define NROUNDS 9
-%endif
-
-%ifdef GCM192_MODE
-%define FN_NAME(x,y) aes_gcm_ %+ x %+ _192 %+ y %+ avx_gen2
-%define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _192_ %+ avx_gen2
-%define NROUNDS 11
-%endif
-
-%ifdef GCM256_MODE
-%define FN_NAME(x,y) aes_gcm_ %+ x %+ _256 %+ y %+ avx_gen2
-%define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _256_ %+ avx_gen2
-%define NROUNDS 13
-%endif
-
-default rel
-
-; need to store 5 GP registers on stack (align to 16 bytes)
-%define GP_STORAGE 8*6
-
-%define	TMP2	16*0    ; Temporary storage for AES State 2 (State 1 is stored in an XMM register)
-%define	TMP3	16*1    ; Temporary storage for AES State 3
-%define	TMP4	16*2    ; Temporary storage for AES State 4
-%define	TMP5	16*3    ; Temporary storage for AES State 5
-%define	TMP6	16*4    ; Temporary storage for AES State 6
-%define	TMP7	16*5    ; Temporary storage for AES State 7
-%define	TMP8	16*6    ; Temporary storage for AES State 8
-
-%define	LOCAL_STORAGE	16*7
-
-%ifidn __OUTPUT_FORMAT__, win64
-	%define	XMM_STORAGE	16*10
-%else
-	%define	XMM_STORAGE	0
-%endif
-
-%define GP_OFFSET (LOCAL_STORAGE + XMM_STORAGE)
-
-%define	VARIABLE_OFFSET	(GP_STORAGE + LOCAL_STORAGE + XMM_STORAGE)
-
-;; extra memory for GCM context structure
-%define CONTEXT_SIZE    6*16
-%define CONTEXT_OFFSET  VARIABLE_OFFSET
-
-;; Full stack frame layout:
-;;                   RETURN ADDRESS + ARGS
-;; R14 =  + 16*6  -> ---------------------------
-;;                   GCM CONTEXT (JOB API only)
-;;        + 6*8   -> ---------------------------
-;;                   GP STORAGE
-;;        + 16*10 -> --------------------------
-;;                   XMM STORAGE (windows only)
-;;        + 16*7  -> --------------------------
-;;                   LOCAL STORAGE
-;; RSP =          -> --------------------------
-
-mksection .text
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Utility Macros
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GHASH_MUL MACRO to implement: Data*HashKey mod (128,127,126,121,0)
-; Input: A and B (128-bits each, bit-reflected)
-; Output: C = A*B*x mod poly, (i.e. >>1 )
-; To compute GH = GH*HashKey mod poly, give HK = HashKey<<1 mod poly as input
-; GH = GH * HK * x mod poly which is equivalent to GH*HashKey mod poly.
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  GHASH_MUL  7
-%define %%GH %1         ; 16 Bytes
-%define %%HK %2         ; 16 Bytes
-%define %%T1 %3
-%define %%T2 %4
-%define %%T3 %5
-%define %%T4 %6
-%define %%T5 %7
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;; Karatsuba
-        vpshufd         %%T2, %%GH, 01001110b
-        vpshufd         %%T3, %%HK, 01001110b
-        vpxor           %%T2, %%T2, %%GH                ; %%T2 = (a1+a0)
-        vpxor           %%T3, %%T3, %%HK                ; %%T3 = (b1+b0)
-
-        vpclmulqdq      %%T1, %%GH, %%HK, 0x11          ; %%T1 = a1*b1
-        vpclmulqdq      %%GH, %%HK, 0x00                ; %%GH = a0*b0
-        vpclmulqdq      %%T2, %%T3, 0x00                ; %%T2 = (a1+a0)*(b1+b0)
-        vpxor           %%T2, %%T2, %%GH
-        vpxor           %%T2, %%T2, %%T1                ; %%T2 = a0*b1+a1*b0
-
-        vpslldq         %%T3, %%T2, 8                   ; shift-L %%T3 2 DWs
-        vpsrldq         %%T2, %%T2, 8                   ; shift-R %%T2 2 DWs
-        vpxor           %%GH, %%GH, %%T3
-        vpxor           %%T1, %%T1, %%T2                ; <%%T1:%%GH> = %%GH x %%HK
-
-        ;first phase of the reduction
-        vpslld  %%T2, %%GH, 31                          ; packed right shifting << 31
-        vpslld  %%T3, %%GH, 30                          ; packed right shifting shift << 30
-        vpslld  %%T4, %%GH, 25                          ; packed right shifting shift << 25
-
-        vpxor   %%T2, %%T2, %%T3                        ; xor the shifted versions
-        vpxor   %%T2, %%T2, %%T4
-
-        vpsrldq %%T5, %%T2, 4                           ; shift-R %%T5 1 DW
-
-        vpslldq %%T2, %%T2, 12                          ; shift-L %%T2 3 DWs
-        vpxor   %%GH, %%GH, %%T2                        ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        ;second phase of the reduction
-
-        vpsrld  %%T2,%%GH,1                             ; packed left shifting >> 1
-        vpsrld  %%T3,%%GH,2                             ; packed left shifting >> 2
-        vpsrld  %%T4,%%GH,7                             ; packed left shifting >> 7
-        vpxor   %%T2, %%T2, %%T3                        ; xor the shifted versions
-        vpxor   %%T2, %%T2, %%T4
-
-        vpxor   %%T2, %%T2, %%T5
-        vpxor   %%GH, %%GH, %%T2
-        vpxor   %%GH, %%GH, %%T1                        ; the result is in %%GH
-
-%endmacro
-
-%macro PRECOMPUTE 8
-%define %%GDATA %1
-%define %%HK    %2
-%define %%T1    %3
-%define %%T2    %4
-%define %%T3    %5
-%define %%T4    %6
-%define %%T5    %7
-%define %%T6    %8
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Haskey_i_k holds XORed values of the low and high parts of the Haskey_i
-        vmovdqa  %%T5, %%HK
-
-        vpshufd  %%T1, %%T5, 01001110b
-        vpxor    %%T1, %%T5
-        vmovdqu  [%%GDATA + HashKey_k], %%T1
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^2<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_2], %%T5                    ;  [HashKey_2] = HashKey^2<<1 mod poly
-        vpshufd  %%T1, %%T5, 01001110b
-        vpxor    %%T1, %%T5
-        vmovdqu  [%%GDATA + HashKey_2_k], %%T1
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^3<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_3], %%T5
-        vpshufd  %%T1, %%T5, 01001110b
-        vpxor    %%T1, %%T5
-        vmovdqu  [%%GDATA + HashKey_3_k], %%T1
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^4<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_4], %%T5
-        vpshufd  %%T1, %%T5, 01001110b
-        vpxor    %%T1, %%T5
-        vmovdqu  [%%GDATA + HashKey_4_k], %%T1
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^5<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_5], %%T5
-        vpshufd  %%T1, %%T5, 01001110b
-        vpxor    %%T1, %%T5
-        vmovdqu  [%%GDATA + HashKey_5_k], %%T1
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^6<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_6], %%T5
-        vpshufd  %%T1, %%T5, 01001110b
-        vpxor    %%T1, %%T5
-        vmovdqu  [%%GDATA + HashKey_6_k], %%T1
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^7<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_7], %%T5
-        vpshufd  %%T1, %%T5, 01001110b
-        vpxor    %%T1, %%T5
-        vmovdqu  [%%GDATA + HashKey_7_k], %%T1
-
-        GHASH_MUL %%T5, %%HK, %%T1, %%T3, %%T4, %%T6, %%T2      ;  %%T5 = HashKey^8<<1 mod poly
-        vmovdqu  [%%GDATA + HashKey_8], %%T5
-        vpshufd  %%T1, %%T5, 01001110b
-        vpxor    %%T1, %%T5
-        vmovdqu  [%%GDATA + HashKey_8_k], %%T1
-%endmacro
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; CALC_AAD_HASH: Calculates the hash of the data which will not be encrypted.
-; Input: The input data (A_IN), that data's length (A_LEN), and the hash key (HASH_KEY).
-; Output: The hash of the data (AAD_HASH).
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  CALC_AAD_HASH   15
-%define %%A_IN          %1
-%define %%A_LEN         %2
-%define %%AAD_HASH      %3
-%define %%GDATA_KEY     %4
-%define %%XTMP0         %5      ; xmm temp reg 5
-%define %%XTMP1         %6      ; xmm temp reg 5
-%define %%XTMP2         %7
-%define %%XTMP3         %8
-%define %%XTMP4         %9
-%define %%XTMP5         %10     ; xmm temp reg 5
-%define %%T1            %11     ; temp reg 1
-%define %%T2            %12
-%define %%T3            %13
-%define %%T4            %14
-%define %%T5            %15     ; temp reg 5
-
-        mov     %%T1, %%A_IN            ; T1 = AAD
-        mov     %%T2, %%A_LEN           ; T2 = aadLen
-
-%%_get_AAD_loop128:
-        cmp     %%T2, 128
-        jl      %%_exit_AAD_loop128
-
-        vmovdqu         %%XTMP0, [%%T1 + 16*0]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vpxor           %%XTMP0, %%AAD_HASH
-
-        vmovdqu         %%XTMP5, [%%GDATA_KEY + HashKey_8]
-        vpclmulqdq      %%XTMP1, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = a1*b1
-        vpclmulqdq      %%XTMP2, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = a0*b0
-        vpclmulqdq      %%XTMP3, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = a1*b0
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10                 ; %%T4 = a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4                       ; %%T3 = a1*b0 + a0*b1
-
-%assign i 1
-%assign j 7
-%rep 7
-        vmovdqu         %%XTMP0, [%%T1 + 16*i]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vmovdqu         %%XTMP5, [%%GDATA_KEY + HashKey_ %+ j]
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = T1 + a1*b1
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = T2 + a0*b0
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = T3 + a1*b0 + a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-%assign i (i + 1)
-%assign j (j - 1)
-%endrep
-
-        vpslldq         %%XTMP4, %%XTMP3, 8                             ; shift-L 2 DWs
-        vpsrldq         %%XTMP3, %%XTMP3, 8                             ; shift-R 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP3                       ; accumulate the results in %%T1(M):%%T2(L)
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqa         %%XTMP5, [rel POLY2]
-        vpclmulqdq      %%XTMP0, %%XTMP5, %%XTMP2, 0x01
-        vpslldq         %%XTMP0, %%XTMP0, 8                             ; shift-L xmm2 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP0                       ; first phase of the reduction complete
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
-        vpclmulqdq      %%XTMP3, %%XTMP5, %%XTMP2, 0x00
-        vpsrldq         %%XTMP3, %%XTMP3, 4                             ; shift-R 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%XTMP4, %%XTMP5, %%XTMP2, 0x10
-        vpslldq         %%XTMP4, %%XTMP4, 4                             ; shift-L 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%XTMP4, %%XTMP4, %%XTMP3                       ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%AAD_HASH, %%XTMP1, %%XTMP4                    ; the result is in %%T1
-
-        sub     %%T2, 128
-        je      %%_CALC_AAD_done
-
-        add     %%T1, 128
-        jmp     %%_get_AAD_loop128
-
-%%_exit_AAD_loop128:
-        cmp     %%T2, 16
-        jl      %%_get_small_AAD_block
-
-        ;; calculate hash_key position to start with
-        mov     %%T3, %%T2
-        and     %%T3, -16       ; 1 to 7 blocks possible here
-        neg     %%T3
-        add     %%T3, HashKey_1 + 16
-        lea     %%T3, [%%GDATA_KEY + %%T3]
-
-        vmovdqu         %%XTMP0, [%%T1]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vpxor           %%XTMP0, %%AAD_HASH
-
-        vmovdqu         %%XTMP5, [%%T3]
-        vpclmulqdq      %%XTMP1, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = a1*b1
-        vpclmulqdq      %%XTMP2, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = a0*b0
-        vpclmulqdq      %%XTMP3, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = a1*b0
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10                 ; %%T4 = a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4                       ; %%T3 = a1*b0 + a0*b1
-
-        add     %%T3, 16        ; move to next hashkey
-        add     %%T1, 16        ; move to next data block
-        sub     %%T2, 16
-        cmp     %%T2, 16
-        jl      %%_AAD_reduce
-
-%%_AAD_blocks:
-        vmovdqu         %%XTMP0, [%%T1]
-        vpshufb         %%XTMP0, [rel SHUF_MASK]
-
-        vmovdqu         %%XTMP5, [%%T3]
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x11                 ; %%T1 = T1 + a1*b1
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x00                 ; %%T2 = T2 + a0*b0
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x01                 ; %%T3 = T3 + a1*b0 + a0*b1
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-        vpclmulqdq      %%XTMP4, %%XTMP0, %%XTMP5, 0x10
-        vpxor           %%XTMP3, %%XTMP3, %%XTMP4
-
-        add     %%T3, 16        ; move to next hashkey
-        add     %%T1, 16
-        sub     %%T2, 16
-        cmp     %%T2, 16
-        jl      %%_AAD_reduce
-        jmp     %%_AAD_blocks
-
-%%_AAD_reduce:
-        vpslldq         %%XTMP4, %%XTMP3, 8                             ; shift-L 2 DWs
-        vpsrldq         %%XTMP3, %%XTMP3, 8                             ; shift-R 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP4
-        vpxor           %%XTMP1, %%XTMP1, %%XTMP3                       ; accumulate the results in %%T1(M):%%T2(L)
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;first phase of the reduction
-        vmovdqa         %%XTMP5, [rel POLY2]
-        vpclmulqdq      %%XTMP0, %%XTMP5, %%XTMP2, 0x01
-        vpslldq         %%XTMP0, %%XTMP0, 8                             ; shift-L xmm2 2 DWs
-        vpxor           %%XTMP2, %%XTMP2, %%XTMP0                       ; first phase of the reduction complete
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ;second phase of the reduction
-        vpclmulqdq      %%XTMP3, %%XTMP5, %%XTMP2, 0x00
-        vpsrldq         %%XTMP3, %%XTMP3, 4                             ; shift-R 1 DW (Shift-R only 1-DW to obtain 2-DWs shift-R)
-
-        vpclmulqdq      %%XTMP4, %%XTMP5, %%XTMP2, 0x10
-        vpslldq         %%XTMP4, %%XTMP4, 4                             ; shift-L 1 DW (Shift-L 1-DW to obtain result with no shifts)
-
-        vpxor           %%XTMP4, %%XTMP4, %%XTMP3                       ; second phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vpxor           %%AAD_HASH, %%XTMP1, %%XTMP4                    ; the result is in %%T1
-
-%%_get_small_AAD_block:
-        or      %%T2, %%T2
-        je      %%_CALC_AAD_done
-
-        vmovdqu         %%XTMP0, [%%GDATA_KEY + HashKey]
-        READ_SMALL_DATA_INPUT_AVX   %%XTMP1, %%T1, %%T2, %%T3
-        ;byte-reflect the AAD data
-        vpshufb         %%XTMP1, [rel SHUF_MASK]
-        vpxor           %%AAD_HASH, %%XTMP1
-        GHASH_MUL       %%AAD_HASH, %%XTMP0, %%XTMP1, %%XTMP2, %%XTMP3, %%XTMP4, %%XTMP5
-
-%%_CALC_AAD_done:
-
-%endmacro ; CALC_AAD_HASH
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; PARTIAL_BLOCK: Handles encryption/decryption and the tag partial blocks between update calls.
-; Requires the input data be at least 1 byte long.
-; Input:
-;  GDATA_KEY - struct gcm_key_data *
-;  GDATA_CTX - struct gcm_context_data *
-;  PLAIN_CYPH_IN - input text
-;  PLAIN_CYPH_LEN - input text length
-;  DATA_OFFSET - the current data offset
-;  HASH_SUBKEY - the hash subkey
-;  ENC_DEC - whether encoding or decoding
-; Output: A cypher of the first partial block (CYPH_PLAIN_OUT), and updated GDATA_CTX
-; Clobbers rax, r10, r12, r13, r15, xmm0, xmm1, xmm2, xmm3, xmm5, xmm6, xmm9, xmm10, xmm11
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro PARTIAL_BLOCK	8
-%define	%%GDATA_CTX		%1
-%define	%%CYPH_PLAIN_OUT	%2
-%define	%%PLAIN_CYPH_IN		%3
-%define	%%PLAIN_CYPH_LEN	%4
-%define	%%DATA_OFFSET		%5
-%define	%%AAD_HASH		%6
-%define	%%HASH_SUBKEY		%7
-%define	%%ENC_DEC		%8
-	mov	r13, [%%GDATA_CTX + PBlockLen]
-	cmp	r13, 0
-	je	%%_partial_block_done		;Leave Macro if no partial blocks
-
-	cmp	%%PLAIN_CYPH_LEN, 16		;Read in input data without over reading
-	jl	%%_fewer_than_16_bytes
-	VXLDR	xmm1, [%%PLAIN_CYPH_IN]		;If more than 16 bytes of data, just fill the xmm register
-	jmp	%%_data_read
-
-%%_fewer_than_16_bytes:
-	lea	r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, %%PLAIN_CYPH_LEN, rax
-
-%%_data_read:				;Finished reading in data
-
-	vmovdqu	xmm9, [%%GDATA_CTX + PBlockEncKey]	;xmm9 = my_ctx_data.partial_block_enc_key
-
-	lea	r12, [SHIFT_MASK]
-
-	cmp	r13, rax
-	add	r12, r13			; adjust the shuffle mask pointer to be able to shift r13 bytes (16-r13 is the number of bytes in plaintext mod 16)
-	vmovdqu	xmm2, [r12]			; get the appropriate shuffle mask
-	vpshufb	xmm9, xmm2			;shift right r13 bytes
-
-%ifidn	%%ENC_DEC, DEC
-	vmovdqa	xmm3, xmm1
-	vpxor	xmm9, xmm1			; Ciphertext XOR E(K, Yn)
-
-	mov	r15, %%PLAIN_CYPH_LEN
-	add	r15, r13
-	sub	r15, 16				;Set r15 to be the amount of data left in CYPH_PLAIN_IN after filling the block
-	jge	%%_no_extra_mask_1		;Determine if if partial block is not being filled and shift mask accordingly
-	sub	r12, r15
-%%_no_extra_mask_1:
-
-	vmovdqu	xmm1, [r12 + ALL_F-SHIFT_MASK]	; get the appropriate mask to mask out bottom r13 bytes of xmm9
-	vpand	xmm9, xmm1			; mask out bottom r13 bytes of xmm9
-
-	vpand	xmm3, xmm1
-	vpshufb	xmm3, [SHUF_MASK]
-	vpshufb	xmm3, xmm2
-	vpxor	%%AAD_HASH, xmm3
-
-	cmp	r15,0
-	jl	%%_partial_incomplete_1
-
-	GHASH_MUL	%%AAD_HASH, %%HASH_SUBKEY, xmm0, xmm10, xmm11, xmm5, xmm6	;GHASH computation for the last <16 Byte block
-	xor	rax,rax
-	mov	[%%GDATA_CTX + PBlockLen], rax
-	jmp	%%_dec_done
-%%_partial_incomplete_1:
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_CYPH_LEN
-       	add     [%%GDATA_CTX + PBlockLen], rax
-%else
-	add	[%%GDATA_CTX + PBlockLen], %%PLAIN_CYPH_LEN
-%endif
-%%_dec_done:
-	vmovdqu	[%%GDATA_CTX + AadHash], %%AAD_HASH
-
-%else
-	vpxor	xmm9, xmm1	; Plaintext XOR E(K, Yn)
-
-	mov	r15, %%PLAIN_CYPH_LEN
-	add	r15, r13
-	sub	r15, 16				;Set r15 to be the amount of data left in CYPH_PLAIN_IN after filling the block
-	jge	%%_no_extra_mask_2		;Determine if if partial block is not being filled and shift mask accordingly
-	sub	r12, r15
-%%_no_extra_mask_2:
-
-	vmovdqu	xmm1, [r12 + ALL_F-SHIFT_MASK]	; get the appropriate mask to mask out bottom r13 bytes of xmm9
-	vpand	xmm9, xmm1			; mask out bottom r13  bytes of xmm9
-
-	vpshufb	xmm9, [SHUF_MASK]
-	vpshufb	xmm9, xmm2
-	vpxor	%%AAD_HASH, xmm9
-
-	cmp	r15,0
-	jl	%%_partial_incomplete_2
-
-	GHASH_MUL	%%AAD_HASH, %%HASH_SUBKEY, xmm0, xmm10, xmm11, xmm5, xmm6	;GHASH computation for the last <16 Byte block
-	xor	rax,rax
-	mov	[%%GDATA_CTX + PBlockLen], rax
-	jmp	%%_encode_done
-%%_partial_incomplete_2:
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_CYPH_LEN
-       	add     [%%GDATA_CTX + PBlockLen], rax
-%else
-	add     [%%GDATA_CTX + PBlockLen], %%PLAIN_CYPH_LEN
-%endif
-%%_encode_done:
-	vmovdqu	[%%GDATA_CTX + AadHash], %%AAD_HASH
-
-	vpshufb	xmm9, [SHUF_MASK]	; shuffle xmm9 back to output as ciphertext
-	vpshufb	xmm9, xmm2
-%endif
-
-	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-	; output encrypted Bytes
-	cmp	r15,0
-	jl	%%_partial_fill
-	mov	r12, r13
-	mov	r13, 16
-	sub	r13, r12			; Set r13 to be the number of bytes to write out
-	jmp	%%_count_set
-%%_partial_fill:
-	mov	r13, %%PLAIN_CYPH_LEN
-%%_count_set:
-	vmovq	rax, xmm9
-	cmp	r13, 8
-	jle	%%_less_than_8_bytes_left
-
-	mov	[%%CYPH_PLAIN_OUT+ %%DATA_OFFSET], rax
-	add	%%DATA_OFFSET, 8
-	vpsrldq	xmm9, xmm9, 8
-	vmovq	rax, xmm9
-	sub	r13, 8
-%%_less_than_8_bytes_left:
-	mov	BYTE [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], al
-	add	%%DATA_OFFSET, 1
-	shr	rax, 8
-	sub	r13, 1
-	jne	%%_less_than_8_bytes_left
-         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%%_partial_block_done:
-%endmacro ; PARTIAL_BLOCK
-
-; if a = number of total plaintext bytes
-; b = floor(a/16)
-; %%num_initial_blocks = b mod 8;
-; encrypt the initial %%num_initial_blocks blocks and apply ghash on the ciphertext
-; %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r14 are used as a pointer only, not modified.
-; Updated AAD_HASH is returned in %%T3
-
-%macro INITIAL_BLOCKS 24
-%define	%%GDATA_KEY             %1
-%define	%%GDATA_CTX             %2
-%define	%%CYPH_PLAIN_OUT        %3
-%define	%%PLAIN_CYPH_IN         %4
-%define	%%LENGTH                %5
-%define	%%DATA_OFFSET           %6
-%define	%%num_initial_blocks    %7      ; can be 0, 1, 2, 3, 4, 5, 6 or 7
-%define	%%T1		        %8
-%define	%%HASH_KEY	        %9
-%define	%%T3		        %10
-%define	%%T4		        %11
-%define	%%T5		        %12
-%define	%%CTR		        %13
-%define	%%XMM1		        %14
-%define	%%XMM2		        %15
-%define	%%XMM3		        %16
-%define	%%XMM4		        %17
-%define	%%XMM5		        %18
-%define	%%XMM6		        %19
-%define	%%XMM7		        %20
-%define	%%XMM8		        %21
-%define	%%T6		        %22
-%define	%%T_key		        %23
-%define	%%ENC_DEC	        %24
-
-%assign i (8-%%num_initial_blocks)
-	vmovdqu	reg(i), %%XMM8	; move AAD_HASH to temp reg
-	                        ; start AES for %%num_initial_blocks blocks
-	vmovdqu  %%CTR, [%%GDATA_CTX + CurCount]                   ; %%CTR = Y0
-
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-        vpaddd   %%CTR, [ONE]           ; INCR Y0
-        vmovdqa  reg(i), %%CTR
-        vpshufb  reg(i), [SHUF_MASK]     ; perform a 16Byte swap
-%assign i (i+1)
-%endrep
-
-        vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-        vpxor    reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign j 1
-%rep NROUNDS
-        vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-        vaesenc  reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign j (j+1)
-%endrep                         ; NROUNDS
-
-vmovdqu  %%T_key, [%%GDATA_KEY+16*j]
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                vaesenclast      reg(i),%%T_key
-%assign i (i+1)
-%endrep
-
-%assign i (9-%%num_initial_blocks)
-%rep %%num_initial_blocks
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-                vpxor    reg(i), %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], reg(i)            ; write back ciphertext for %%num_initial_blocks blocks
-                add     %%DATA_OFFSET, 16
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  reg(i), %%T1
-                %endif
-                vpshufb  reg(i), [SHUF_MASK]     ; prepare ciphertext for GHASH computations
-%assign i (i+1)
-%endrep
-
-%assign i (8-%%num_initial_blocks)
-%assign j (9-%%num_initial_blocks)
-
-%rep %%num_initial_blocks
-        vpxor    reg(j), reg(i)
-        GHASH_MUL       reg(j), %%HASH_KEY, %%T1, %%T3, %%T4, %%T5, %%T6      ; apply GHASH on %%num_initial_blocks blocks
-%assign i (i+1)
-%assign j (j+1)
-%endrep
-	; %%XMM8 has the current Hash Value
-        vmovdqa  %%T3, %%XMM8
-
-        cmp     %%LENGTH, 128
-        jl      %%_initial_blocks_done
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Prepare 8 counter blocks and perform rounds of AES cipher on them, load plain/cipher text and
-; store cipher/plain text.
-; Keep 8 cipher text blocks for further GHASH computations (XMM1 - XMM8)
-; - combine current GHASH value into block 0 (XMM1)
-
-                vpaddd   %%CTR, [ONE]                   ; INCR Y0
-                vmovdqa  %%XMM1, %%CTR
-                vpshufb  %%XMM1, [SHUF_MASK]             ; perform a 16Byte swap
-
-                vpaddd   %%CTR, [ONE]                   ; INCR Y0
-                vmovdqa  %%XMM2, %%CTR
-                vpshufb  %%XMM2, [SHUF_MASK]             ; perform a 16Byte swap
-
-                vpaddd   %%CTR, [ONE]                   ; INCR Y0
-                vmovdqa  %%XMM3, %%CTR
-                vpshufb  %%XMM3, [SHUF_MASK]             ; perform a 16Byte swap
-
-                vpaddd   %%CTR, [ONE]                   ; INCR Y0
-                vmovdqa  %%XMM4, %%CTR
-                vpshufb  %%XMM4, [SHUF_MASK]             ; perform a 16Byte swap
-
-                vpaddd   %%CTR, [ONE]                   ; INCR Y0
-                vmovdqa  %%XMM5, %%CTR
-                vpshufb  %%XMM5, [SHUF_MASK]             ; perform a 16Byte swap
-
-                vpaddd   %%CTR, [ONE]                   ; INCR Y0
-                vmovdqa  %%XMM6, %%CTR
-                vpshufb  %%XMM6, [SHUF_MASK]             ; perform a 16Byte swap
-
-                vpaddd   %%CTR, [ONE]                   ; INCR Y0
-                vmovdqa  %%XMM7, %%CTR
-                vpshufb  %%XMM7, [SHUF_MASK]             ; perform a 16Byte swap
-
-                vpaddd   %%CTR, [ONE]                   ; INCR Y0
-                vmovdqa  %%XMM8, %%CTR
-                vpshufb  %%XMM8, [SHUF_MASK]             ; perform a 16Byte swap
-
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*0]
-                vpxor    %%XMM1, %%T_key
-                vpxor    %%XMM2, %%T_key
-                vpxor    %%XMM3, %%T_key
-                vpxor    %%XMM4, %%T_key
-                vpxor    %%XMM5, %%T_key
-                vpxor    %%XMM6, %%T_key
-                vpxor    %%XMM7, %%T_key
-                vpxor    %%XMM8, %%T_key
-
-%assign i 1
-%rep    NROUNDS
-                vmovdqu  %%T_key, [%%GDATA_KEY+16*i]
-                vaesenc  %%XMM1, %%T_key
-                vaesenc  %%XMM2, %%T_key
-                vaesenc  %%XMM3, %%T_key
-                vaesenc  %%XMM4, %%T_key
-                vaesenc  %%XMM5, %%T_key
-                vaesenc  %%XMM6, %%T_key
-                vaesenc  %%XMM7, %%T_key
-                vaesenc  %%XMM8, %%T_key
-%assign i (i+1)
-%endrep
-
-                vmovdqu          %%T_key, [%%GDATA_KEY+16*i]
-                vaesenclast      %%XMM1, %%T_key
-                vaesenclast      %%XMM2, %%T_key
-                vaesenclast      %%XMM3, %%T_key
-                vaesenclast      %%XMM4, %%T_key
-                vaesenclast      %%XMM5, %%T_key
-                vaesenclast      %%XMM6, %%T_key
-                vaesenclast      %%XMM7, %%T_key
-                vaesenclast      %%XMM8, %%T_key
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*0]
-                vpxor    %%XMM1, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*0], %%XMM1
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM1, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*1]
-                vpxor    %%XMM2, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*1], %%XMM2
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM2, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*2]
-                vpxor    %%XMM3, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*2], %%XMM3
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM3, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*3]
-                vpxor    %%XMM4, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*3], %%XMM4
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM4, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*4]
-                vpxor    %%XMM5, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*4], %%XMM5
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM5, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*5]
-                vpxor    %%XMM6, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*5], %%XMM6
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM6, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*6]
-                vpxor    %%XMM7, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*6], %%XMM7
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM7, %%T1
-                %endif
-
-                VXLDR  %%T1, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*7]
-                vpxor    %%XMM8, %%T1
-                VXSTR  [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*7], %%XMM8
-                %ifidn  %%ENC_DEC, DEC
-                vmovdqa  %%XMM8, %%T1
-                %endif
-
-                add     %%DATA_OFFSET, 128
-
-                vpshufb  %%XMM1, [SHUF_MASK]             ; perform a 16Byte swap
-                vpxor    %%XMM1, %%T3                   	 ; combine GHASHed value with the corresponding ciphertext
-                vpshufb  %%XMM2, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM3, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM4, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM5, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM6, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM7, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb  %%XMM8, [SHUF_MASK]             ; perform a 16Byte swap
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%%_initial_blocks_done:
-
-%endmacro
-
-; encrypt 8 blocks at a time
-; ghash the 8 previously encrypted ciphertext blocks
-; %%GDATA - (GCM key data), %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN are used as pointers only, not modified
-; r11 is the data offset value
-%macro	GHASH_8_ENCRYPT_8_PARALLEL 22
-%define	%%GDATA			%1
-%define	%%CYPH_PLAIN_OUT	%2
-%define	%%PLAIN_CYPH_IN		%3
-%define	%%DATA_OFFSET		%4
-%define	%%T1	%5
-%define	%%T2	%6
-%define	%%T3	%7
-%define	%%T4	%8
-%define	%%T5	%9
-%define	%%T6	%10
-%define	%%CTR	%11
-%define	%%XMM1	%12
-%define	%%XMM2	%13
-%define	%%XMM3	%14
-%define	%%XMM4	%15
-%define	%%XMM5	%16
-%define	%%XMM6	%17
-%define	%%XMM7	%18
-%define	%%XMM8	%19
-%define	%%T7	%20
-%define	%%loop_idx	%21
-%define	%%ENC_DEC	%22
-
-        vmovdqa %%T2, %%XMM1
-        vmovdqu [rsp + TMP2], %%XMM2
-        vmovdqu [rsp + TMP3], %%XMM3
-        vmovdqu [rsp + TMP4], %%XMM4
-        vmovdqu [rsp + TMP5], %%XMM5
-        vmovdqu [rsp + TMP6], %%XMM6
-        vmovdqu [rsp + TMP7], %%XMM7
-        vmovdqu [rsp + TMP8], %%XMM8
-
-%ifidn %%loop_idx, in_order
-                vpaddd  %%XMM1, %%CTR,  [ONE]           ; INCR CNT
-                vpaddd  %%XMM2, %%XMM1, [ONE]
-                vpaddd  %%XMM3, %%XMM2, [ONE]
-                vpaddd  %%XMM4, %%XMM3, [ONE]
-                vpaddd  %%XMM5, %%XMM4, [ONE]
-                vpaddd  %%XMM6, %%XMM5, [ONE]
-                vpaddd  %%XMM7, %%XMM6, [ONE]
-                vpaddd  %%XMM8, %%XMM7, [ONE]
-                vmovdqa %%CTR, %%XMM8
-
-                vpshufb %%XMM1, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM2, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM3, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM4, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM5, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM6, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM7, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM8, [SHUF_MASK]             ; perform a 16Byte swap
-%else
-                vpaddd  %%XMM1, %%CTR,  [ONEf]                  ; INCR CNT
-                vpaddd  %%XMM2, %%XMM1, [ONEf]
-                vpaddd  %%XMM3, %%XMM2, [ONEf]
-                vpaddd  %%XMM4, %%XMM3, [ONEf]
-                vpaddd  %%XMM5, %%XMM4, [ONEf]
-                vpaddd  %%XMM6, %%XMM5, [ONEf]
-                vpaddd  %%XMM7, %%XMM6, [ONEf]
-                vpaddd  %%XMM8, %%XMM7, [ONEf]
-                vmovdqa %%CTR, %%XMM8
-%endif
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                vmovdqu %%T1, [%%GDATA + 16*0]
-                vpxor   %%XMM1, %%T1
-                vpxor   %%XMM2, %%T1
-                vpxor   %%XMM3, %%T1
-                vpxor   %%XMM4, %%T1
-                vpxor   %%XMM5, %%T1
-                vpxor   %%XMM6, %%T1
-                vpxor   %%XMM7, %%T1
-                vpxor   %%XMM8, %%T1
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                vmovdqu %%T1, [%%GDATA + 16*1]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-                vmovdqu %%T1, [%%GDATA + 16*2]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_8]
-        vpclmulqdq      %%T4, %%T2, %%T5, 0x11                  ; %%T4 = a1*b1
-        vpclmulqdq      %%T7, %%T2, %%T5, 0x00                  ; %%T7 = a0*b0
-
-        vpshufd         %%T6, %%T2, 01001110b
-        vpxor           %%T6, %%T2
-
-        vmovdqu         %%T5, [%%GDATA + HashKey_8_k]
-        vpclmulqdq      %%T6, %%T6, %%T5, 0x00                  ;
-
-                vmovdqu %%T1, [%%GDATA + 16*3]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP2]
-        vmovdqu         %%T5, [%%GDATA + HashKey_7]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpshufd         %%T3, %%T1, 01001110b
-        vpxor           %%T3, %%T1
-        vmovdqu         %%T5, [%%GDATA + HashKey_7_k]
-        vpclmulqdq      %%T3, %%T3, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*4]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vmovdqu         %%T1, [rsp + TMP3]
-        vmovdqu         %%T5, [%%GDATA + HashKey_6]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpshufd         %%T3, %%T1, 01001110b
-        vpxor           %%T3, %%T1
-        vmovdqu         %%T5, [%%GDATA + HashKey_6_k]
-        vpclmulqdq      %%T3, %%T3, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*5]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP4]
-        vmovdqu         %%T5, [%%GDATA + HashKey_5]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpshufd         %%T3, %%T1, 01001110b
-        vpxor           %%T3, %%T1
-        vmovdqu         %%T5, [%%GDATA + HashKey_5_k]
-        vpclmulqdq      %%T3, %%T3, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*6]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP5]
-        vmovdqu         %%T5, [%%GDATA + HashKey_4]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpshufd         %%T3, %%T1, 01001110b
-        vpxor           %%T3, %%T1
-        vmovdqu         %%T5, [%%GDATA + HashKey_4_k]
-        vpclmulqdq      %%T3, %%T3, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*7]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP6]
-        vmovdqu         %%T5, [%%GDATA + HashKey_3]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpshufd         %%T3, %%T1, 01001110b
-        vpxor           %%T3, %%T1
-        vmovdqu         %%T5, [%%GDATA + HashKey_3_k]
-        vpclmulqdq      %%T3, %%T3, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-                vmovdqu %%T1, [%%GDATA + 16*8]
-                vaesenc %%XMM1, %%T1
-                vaesenc %%XMM2, %%T1
-                vaesenc %%XMM3, %%T1
-                vaesenc %%XMM4, %%T1
-                vaesenc %%XMM5, %%T1
-                vaesenc %%XMM6, %%T1
-                vaesenc %%XMM7, %%T1
-                vaesenc %%XMM8, %%T1
-
-        vmovdqu         %%T1, [rsp + TMP7]
-        vmovdqu         %%T5, [%%GDATA + HashKey_2]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpshufd         %%T3, %%T1, 01001110b
-        vpxor           %%T3, %%T1
-        vmovdqu         %%T5, [%%GDATA + HashKey_2_k]
-        vpclmulqdq      %%T3, %%T3, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-                vmovdqu %%T5, [%%GDATA + 16*9]
-                vaesenc %%XMM1, %%T5
-                vaesenc %%XMM2, %%T5
-                vaesenc %%XMM3, %%T5
-                vaesenc %%XMM4, %%T5
-                vaesenc %%XMM5, %%T5
-                vaesenc %%XMM6, %%T5
-                vaesenc %%XMM7, %%T5
-                vaesenc %%XMM8, %%T5
-
-        vmovdqu         %%T1, [rsp + TMP8]
-        vmovdqu         %%T5, [%%GDATA + HashKey]
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x11
-        vpxor           %%T4, %%T4, %%T3
-        vpclmulqdq      %%T3, %%T1, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T3
-
-        vpshufd         %%T3, %%T1, 01001110b
-        vpxor           %%T3, %%T1
-        vmovdqu         %%T5, [%%GDATA + HashKey_k]
-        vpclmulqdq      %%T3, %%T3, %%T5, 0x10
-        vpxor           %%T6, %%T6, %%T3
-
-        vpxor           %%T6, %%T4
-        vpxor           %%T6, %%T7
-
-%ifdef GCM128_MODE
-		vmovdqu         %%T5, [%%GDATA + 16*10]
-%endif
-%ifdef GCM192_MODE
-                vmovdqu		%%T5, [%%GDATA + 16*10]
-		vaesenc	%%XMM1, %%T5
-		vaesenc	%%XMM2, %%T5
-		vaesenc	%%XMM3, %%T5
-		vaesenc	%%XMM4, %%T5
-		vaesenc	%%XMM5, %%T5
-		vaesenc	%%XMM6, %%T5
-		vaesenc	%%XMM7, %%T5
-		vaesenc	%%XMM8, %%T5
-
-		vmovdqu		%%T5, [%%GDATA + 16*11]
-		vaesenc	%%XMM1, %%T5
-		vaesenc	%%XMM2, %%T5
-		vaesenc	%%XMM3, %%T5
-		vaesenc	%%XMM4, %%T5
-		vaesenc	%%XMM5, %%T5
-		vaesenc	%%XMM6, %%T5
-		vaesenc	%%XMM7, %%T5
-		vaesenc	%%XMM8, %%T5
-
-		vmovdqu		%%T5, [%%GDATA + 16*12]
-%endif
-%ifdef GCM256_MODE
-                vmovdqu		%%T5, [%%GDATA + 16*10]
-		vaesenc	%%XMM1, %%T5
-		vaesenc	%%XMM2, %%T5
-		vaesenc	%%XMM3, %%T5
-		vaesenc	%%XMM4, %%T5
-		vaesenc	%%XMM5, %%T5
-		vaesenc	%%XMM6, %%T5
-		vaesenc	%%XMM7, %%T5
-		vaesenc	%%XMM8, %%T5
-
-		vmovdqu		%%T5, [%%GDATA + 16*11]
-		vaesenc	%%XMM1, %%T5
-		vaesenc	%%XMM2, %%T5
-		vaesenc	%%XMM3, %%T5
-		vaesenc	%%XMM4, %%T5
-		vaesenc	%%XMM5, %%T5
-		vaesenc	%%XMM6, %%T5
-		vaesenc	%%XMM7, %%T5
-		vaesenc	%%XMM8, %%T5
-
-		vmovdqu		%%T5, [%%GDATA + 16*12]
-		vaesenc	%%XMM1, %%T5
-		vaesenc	%%XMM2, %%T5
-		vaesenc	%%XMM3, %%T5
-		vaesenc	%%XMM4, %%T5
-		vaesenc	%%XMM5, %%T5
-		vaesenc	%%XMM6, %%T5
-		vaesenc	%%XMM7, %%T5
-		vaesenc	%%XMM8, %%T5
-
-		vmovdqu		%%T5, [%%GDATA + 16*13]
-		vaesenc	%%XMM1, %%T5
-		vaesenc	%%XMM2, %%T5
-		vaesenc	%%XMM3, %%T5
-		vaesenc	%%XMM4, %%T5
-		vaesenc	%%XMM5, %%T5
-		vaesenc	%%XMM6, %%T5
-		vaesenc	%%XMM7, %%T5
-		vaesenc	%%XMM8, %%T5
-
-		vmovdqu		%%T5, [%%GDATA + 16*14]
-%endif
-
-%assign i 0
-%assign j 1
-%rep 8
-
-%ifidn %%ENC_DEC, ENC
-%ifdef	NT_LD
-		VXLDR	%%T2, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*i]
-		vpxor	%%T2, %%T2, %%T5
-%else
-		vpxor   %%T2, %%T5, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*i]
-%endif                          ; NT_LD
-		vaesenclast     reg(j), reg(j), %%T2
-%else
-		VXLDR	%%T2, [%%PLAIN_CYPH_IN + %%DATA_OFFSET + 16*i]
-		vpxor	%%T2, %%T2, %%T5
-		vaesenclast     %%T3, reg(j), %%T2
-		vpxor	reg(j), %%T2, %%T5
-		VXSTR [%%CYPH_PLAIN_OUT + %%DATA_OFFSET + 16*i], %%T3
-%endif                          ; %%ENC_DEC
-
-%assign i (i+1)
-%assign j (j+1)
-%endrep
-
-        vpslldq %%T3, %%T6, 8           ; shift-L %%T3 2 DWs
-        vpsrldq %%T6, %%T6, 8           ; shift-R %%T2 2 DWs
-        vpxor   %%T7, %%T3
-        vpxor   %%T6, %%T4              ; accumulate the results in %%T6:%%T7
-
-        ;first phase of the reduction
-
-        vpslld  %%T2, %%T7, 31                                  ; packed right shifting << 31
-        vpslld  %%T3, %%T7, 30                                  ; packed right shifting shift << 30
-        vpslld  %%T4, %%T7, 25                                  ; packed right shifting shift << 25
-
-        vpxor   %%T2, %%T2, %%T3                                ; xor the shifted versions
-        vpxor   %%T2, %%T2, %%T4
-
-        vpsrldq %%T1, %%T2, 4                                   ; shift-R %%T1 1 DW
-
-        vpslldq %%T2, %%T2, 12                                  ; shift-L %%T2 3 DWs
-        vpxor   %%T7, %%T2                                      ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-		%ifidn %%ENC_DEC, ENC
-		VXSTR	[%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*0], %%XMM1			; Write to the Ciphertext buffer
-		VXSTR	[%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*1], %%XMM2			; Write to the Ciphertext buffer
-		VXSTR	[%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*2], %%XMM3			; Write to the Ciphertext buffer
-		VXSTR	[%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*3], %%XMM4			; Write to the Ciphertext buffer
-		VXSTR	[%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*4], %%XMM5			; Write to the Ciphertext buffer
-		VXSTR	[%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*5], %%XMM6			; Write to the Ciphertext buffer
-		VXSTR	[%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*6], %%XMM7			; Write to the Ciphertext buffer
-		VXSTR	[%%CYPH_PLAIN_OUT+%%DATA_OFFSET+16*7], %%XMM8			; Write to the Ciphertext buffer
-                %endif
-
-        ;second phase of the reduction
-
-        vpsrld  %%T2,%%T7,1                                     ; packed left shifting >> 1
-        vpsrld  %%T3,%%T7,2                                     ; packed left shifting >> 2
-        vpsrld  %%T4,%%T7,7                                     ; packed left shifting >> 7
-        vpxor   %%T2, %%T2,%%T3                                 ; xor the shifted versions
-        vpxor   %%T2, %%T2,%%T4
-
-        vpxor   %%T2, %%T2, %%T1
-        vpxor   %%T7, %%T7, %%T2
-        vpxor   %%T6, %%T6, %%T7                                ; the result is in %%T6
-
-                vpshufb %%XMM1, [SHUF_MASK]             ; perform a 16Byte swap
-                vpshufb %%XMM2, [SHUF_MASK]
-                vpshufb %%XMM3, [SHUF_MASK]
-                vpshufb %%XMM4, [SHUF_MASK]
-                vpshufb %%XMM5, [SHUF_MASK]
-                vpshufb %%XMM6, [SHUF_MASK]
-                vpshufb %%XMM7, [SHUF_MASK]
-                vpshufb %%XMM8, [SHUF_MASK]
-
-        vpxor   %%XMM1, %%T6
-
-%endmacro
-
-; GHASH the last 4 ciphertext blocks.
-; %%GDATA is GCM key data
-%macro	GHASH_LAST_8 16
-%define	%%GDATA	%1
-%define	%%T1	%2
-%define	%%T2	%3
-%define	%%T3	%4
-%define	%%T4	%5
-%define	%%T5	%6
-%define	%%T6	%7
-%define	%%T7	%8
-%define	%%XMM1	%9
-%define	%%XMM2	%10
-%define	%%XMM3	%11
-%define	%%XMM4	%12
-%define	%%XMM5	%13
-%define	%%XMM6	%14
-%define	%%XMM7	%15
-%define	%%XMM8	%16
-        ;; Karatsuba Method
-
-        vpshufd         %%T2, %%XMM1, 01001110b
-        vpxor           %%T2, %%XMM1
-        vmovdqu         %%T5, [%%GDATA + HashKey_8]
-        vpclmulqdq      %%T6, %%XMM1, %%T5, 0x11
-        vpclmulqdq      %%T7, %%XMM1, %%T5, 0x00
-
-        vmovdqu         %%T3, [%%GDATA + HashKey_8_k]
-        vpclmulqdq      %%XMM1, %%T2, %%T3, 0x00
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vpshufd         %%T2, %%XMM2, 01001110b
-        vpxor           %%T2, %%XMM2
-        vmovdqu         %%T5, [%%GDATA + HashKey_7]
-        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM2, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vmovdqu         %%T3, [%%GDATA + HashKey_7_k]
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vpshufd         %%T2, %%XMM3, 01001110b
-        vpxor           %%T2, %%XMM3
-        vmovdqu         %%T5, [%%GDATA + HashKey_6]
-        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM3, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vmovdqu         %%T3, [%%GDATA + HashKey_6_k]
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vpshufd         %%T2, %%XMM4, 01001110b
-        vpxor           %%T2, %%XMM4
-        vmovdqu         %%T5, [%%GDATA + HashKey_5]
-        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM4, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vmovdqu         %%T3, [%%GDATA + HashKey_5_k]
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vpshufd         %%T2, %%XMM5, 01001110b
-        vpxor           %%T2, %%XMM5
-        vmovdqu         %%T5, [%%GDATA + HashKey_4]
-        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM5, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vmovdqu         %%T3, [%%GDATA + HashKey_4_k]
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vpshufd         %%T2, %%XMM6, 01001110b
-        vpxor           %%T2, %%XMM6
-        vmovdqu         %%T5, [%%GDATA + HashKey_3]
-
-        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM6, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vmovdqu         %%T3, [%%GDATA + HashKey_3_k]
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vpshufd         %%T2, %%XMM7, 01001110b
-        vpxor           %%T2, %%XMM7
-        vmovdqu         %%T5, [%%GDATA + HashKey_2]
-        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM7, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vmovdqu         %%T3, [%%GDATA + HashKey_2_k]
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-        vpxor           %%XMM1, %%XMM1, %%T2
-
-        ;;;;;;;;;;;;;;;;;;;;;;
-
-        vpshufd         %%T2, %%XMM8, 01001110b
-        vpxor           %%T2, %%XMM8
-        vmovdqu         %%T5, [%%GDATA + HashKey]
-        vpclmulqdq      %%T4, %%XMM8, %%T5, 0x11
-        vpxor           %%T6, %%T6, %%T4
-
-        vpclmulqdq      %%T4, %%XMM8, %%T5, 0x00
-        vpxor           %%T7, %%T7, %%T4
-
-        vmovdqu         %%T3, [%%GDATA + HashKey_k]
-        vpclmulqdq      %%T2, %%T2, %%T3, 0x00
-
-        vpxor           %%XMM1, %%XMM1, %%T2
-        vpxor           %%XMM1, %%XMM1, %%T6
-        vpxor           %%T2, %%XMM1, %%T7
-
-        vpslldq         %%T4, %%T2, 8
-        vpsrldq         %%T2, %%T2, 8
-
-        vpxor           %%T7, %%T4
-        vpxor           %%T6, %%T2                                      ; <%%T6:%%T7> holds the result of the accumulated carry-less multiplications
-
-        ;first phase of the reduction
-
-        vpslld          %%T2, %%T7, 31                                  ; packed right shifting << 31
-        vpslld          %%T3, %%T7, 30                                  ; packed right shifting shift << 30
-        vpslld          %%T4, %%T7, 25                                  ; packed right shifting shift << 25
-
-        vpxor           %%T2, %%T2, %%T3                                ; xor the shifted versions
-        vpxor           %%T2, %%T2, %%T4
-
-        vpsrldq         %%T1, %%T2, 4                                   ; shift-R %%T1 1 DW
-
-        vpslldq         %%T2, %%T2, 12                                  ; shift-L %%T2 3 DWs
-        vpxor           %%T7, %%T2                                      ; first phase of the reduction complete
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-        ;second phase of the reduction
-
-        vpsrld          %%T2,%%T7,1                                     ; packed left shifting >> 1
-        vpsrld          %%T3,%%T7,2                                     ; packed left shifting >> 2
-        vpsrld          %%T4,%%T7,7                                     ; packed left shifting >> 7
-        vpxor           %%T2, %%T2,%%T3                                 ; xor the shifted versions
-        vpxor           %%T2, %%T2,%%T4
-
-        vpxor           %%T2, %%T2, %%T1
-        vpxor           %%T7, %%T7, %%T2
-        vpxor           %%T6, %%T6, %%T7                                ; the result is in %%T6
-
-%endmacro
-
-; Encryption of a single block
-; %%GDATA is GCM key data
-%macro	ENCRYPT_SINGLE_BLOCK 2
-%define	%%GDATA	%1
-%define	%%XMM0	%2
-
-                vpxor    %%XMM0, [%%GDATA+16*0]
-%assign i 1
-%rep NROUNDS
-                vaesenc  %%XMM0, [%%GDATA+16*i]
-%assign i (i+1)
-%endrep                         ; NROUNDS
-                vaesenclast      %%XMM0, [%%GDATA+16*i]
-%endmacro
-
-;; Start of Stack Setup
-
-%macro FUNC_SAVE 0-1
-	;; Required for Update/GCM_ENC
-        mov     rax, rsp
-
-%if %0 == 0
-	sub     rsp, VARIABLE_OFFSET
-%else
-%ifidni %1, alloc_context
-        sub     rsp, VARIABLE_OFFSET + CONTEXT_SIZE
-%endif
-%endif
-	and     rsp, ~63
-
-        mov     [rsp + GP_OFFSET + 0*8], rax ; original rsp pointer
-        mov     [rsp + GP_OFFSET + 1*8], r12
-        mov     [rsp + GP_OFFSET + 2*8], r13
-        mov     [rsp + GP_OFFSET + 3*8], r14
-        mov     [rsp + GP_OFFSET + 4*8], r15
-        mov     r14, rax
-
-%ifidn __OUTPUT_FORMAT__, win64
-        ; xmm6:xmm15 need to be maintained for Windows
-        vmovdqu [rsp + LOCAL_STORAGE + 0*16], xmm6
-        vmovdqu [rsp + LOCAL_STORAGE + 1*16], xmm7
-        vmovdqu [rsp + LOCAL_STORAGE + 2*16], xmm8
-        vmovdqu [rsp + LOCAL_STORAGE + 3*16], xmm9
-        vmovdqu [rsp + LOCAL_STORAGE + 4*16], xmm10
-        vmovdqu [rsp + LOCAL_STORAGE + 5*16], xmm11
-        vmovdqu [rsp + LOCAL_STORAGE + 6*16], xmm12
-        vmovdqu [rsp + LOCAL_STORAGE + 7*16], xmm13
-        vmovdqu [rsp + LOCAL_STORAGE + 8*16], xmm14
-        vmovdqu [rsp + LOCAL_STORAGE + 9*16], xmm15
-%endif
-%endmacro
-
-%macro FUNC_RESTORE 0
-
-%ifdef SAFE_DATA
-        clear_scratch_xmms_avx_asm
-%endif
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm15, [rsp + LOCAL_STORAGE + 9*16]
-        vmovdqu xmm14, [rsp + LOCAL_STORAGE + 8*16]
-        vmovdqu xmm13, [rsp + LOCAL_STORAGE + 7*16]
-        vmovdqu xmm12, [rsp + LOCAL_STORAGE + 6*16]
-        vmovdqu xmm11, [rsp + LOCAL_STORAGE + 5*16]
-        vmovdqu xmm10, [rsp + LOCAL_STORAGE + 4*16]
-        vmovdqu xmm9,  [rsp + LOCAL_STORAGE + 3*16]
-        vmovdqu xmm8,  [rsp + LOCAL_STORAGE + 2*16]
-        vmovdqu xmm7,  [rsp + LOCAL_STORAGE + 1*16]
-        vmovdqu xmm6,  [rsp + LOCAL_STORAGE + 0*16]
-%endif
-
-        ;; Required for Update/GCM_ENC
-        mov     r12, [rsp + GP_OFFSET + 1*8]
-        mov     r13, [rsp + GP_OFFSET + 2*8]
-        mov     r14, [rsp + GP_OFFSET + 3*8]
-        mov     r15, [rsp + GP_OFFSET + 4*8]
-        mov     rsp, [rsp + GP_OFFSET + 0*8]
-%endmacro
-
-%macro CALC_J0 15
-%define %%KEY           %1 ;; [in] Pointer to GCM KEY structure
-%define %%IV            %2 ;; [in] Pointer to IV
-%define %%IV_LEN        %3 ;; [in] IV length
-%define %%J0            %4 ;; [out] XMM reg to contain J0
-%define %%TMP0          %5 ;; [clobbered] Temporary GP reg
-%define %%TMP1          %6 ;; [clobbered] Temporary GP reg
-%define %%TMP2          %7 ;; [clobbered] Temporary GP reg
-%define %%TMP3          %8 ;; [clobbered] Temporary GP reg
-%define %%TMP4          %9 ;; [clobbered] Temporary GP reg
-%define %%XTMP0         %10 ;; [clobbered] Temporary XMM reg
-%define %%XTMP1         %11 ;; [clobbered] Temporary XMM reg
-%define %%XTMP2         %12 ;; [clobbered] Temporary XMM reg
-%define %%XTMP3         %13 ;; [clobbered] Temporary XMM reg
-%define %%XTMP4         %14 ;; [clobbered] Temporary XMM reg
-%define %%XTMP5         %15 ;; [clobbered] Temporary XMM reg
-
-        ;; J0 = GHASH(IV || 0s+64 || len(IV)64)
-        ;; s = 16 * RoundUp(len(IV)/16) -  len(IV) */
-
-        ;; Calculate GHASH of (IV || 0s)
-        vpxor   %%J0, %%J0
-        CALC_AAD_HASH %%IV, %%IV_LEN, %%J0, %%KEY, %%XTMP0, %%XTMP1, %%XTMP2, \
-                      %%XTMP3, %%XTMP4, %%XTMP5, %%TMP0, %%TMP1, %%TMP2, %%TMP3, %%TMP4
-
-        ;; Calculate GHASH of last 16-byte block (0 || len(IV)64)
-        vmovdqu %%XTMP0, [%%KEY + HashKey]
-        mov     %%TMP2, %%IV_LEN
-        shl     %%TMP2, 3 ;; IV length in bits
-        vmovq   %%XTMP1, %%TMP2
-        vpxor   %%J0, %%XTMP1
-        GHASH_MUL %%J0, %%XTMP0, %%XTMP1, %%XTMP2, %%XTMP3, %%XTMP4, %%XTMP5
-
-        vpshufb %%J0, [rel SHUF_MASK] ; perform a 16Byte swap
-%endmacro
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GCM_INIT initializes a gcm_context_data struct to prepare for encoding/decoding.
-; Input: gcm_key_data * (GDATA_KEY), gcm_context_data *(GDATA_CTX), IV, IV_LEN,
-; Additional Authentication data (A_IN), Additional Data length (A_LEN).
-; Output: Updated GDATA_CTX with the hash of A_IN (AadHash) and initialized other parts of GDATA.
-; Clobbers rax, r10-r13 and xmm0-xmm6
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro  GCM_INIT        5-6
-%define %%GDATA_KEY     %1 ; [in] Pointer to GCM Key data structure
-%define %%GDATA_CTX     %2 ; [in/out] Pointer to GCM Context data structure
-%define %%IV            %3 ; [in] Pointer to IV
-%define %%A_IN	        %4 ; [in] Pointer to AAD
-%define %%A_LEN	        %5 ; [in] AAD length
-%define %%IV_LEN        %6 ; [in] IV length
-
-%define %%AAD_HASH      xmm0
-
-        vpxor   %%AAD_HASH, %%AAD_HASH
-	CALC_AAD_HASH %%A_IN, %%A_LEN, %%AAD_HASH, %%GDATA_KEY, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, r10, r11, r12, r13, rax
-	vpxor	xmm2, xmm3
-	mov	r10, %%A_LEN
-
-	vmovdqu	[%%GDATA_CTX + AadHash], %%AAD_HASH	; ctx_data.aad hash = aad_hash
-	mov	[%%GDATA_CTX + AadLen], r10		; ctx_data.aad_length = aad_length
-	xor	r10, r10
-	mov	[%%GDATA_CTX + InLen], r10		; ctx_data.in_length = 0
-	mov	[%%GDATA_CTX + PBlockLen], r10		; ctx_data.partial_block_length = 0
-	vmovdqu	[%%GDATA_CTX + PBlockEncKey], xmm2	; ctx_data.partial_block_enc_key = 0
-	mov	r10, %%IV
-%if %0 == 6 ;; IV is different than 12 bytes
-        CALC_J0 %%GDATA_KEY, %%IV, %%IV_LEN, xmm2, r10, r11, r12, r13, rax, xmm1, xmm0, \
-                xmm3, xmm4, xmm5, xmm6
-%else ;; IV is 12 bytes
-        vmovdqa xmm2, [rel ONEf]                        ; read 12 IV bytes and pad with 0x00000001
-        vpinsrq xmm2, [r10], 0
-        vpinsrd xmm2, [r10+8], 2
-%endif
-	vmovdqu	[%%GDATA_CTX + OrigIV], xmm2		; ctx_data.orig_IV = iv
-
-	vpshufb xmm2, [rel SHUF_MASK]
-
-	vmovdqu	[%%GDATA_CTX + CurCount], xmm2		; ctx_data.current_counter = iv
-%endmacro
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GCM_ENC_DEC Encodes/Decodes given data. Assumes that the passed gcm_context_data struct
-; has been initialized by GCM_INIT
-; Requires the input data be at least 1 byte long because of READ_SMALL_INPUT_DATA.
-; Input: struct gcm_key_data* (GDATA_KEY), struct gcm_context_data * (GDATA_CTX),
-;        input text (PLAIN_CYPH_IN), input text length (PLAIN_CYPH_LEN),
-; and whether encoding or decoding (ENC_DEC)
-; Output: A cypher of the given plain text (CYPH_PLAIN_OUT), and updated GDATA_CTX
-; Clobbers rax, r10-r15, and xmm0-xmm15
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro	GCM_ENC_DEC 		6
-%define	%%GDATA_KEY		%1
-%define	%%GDATA_CTX		%2
-%define	%%CYPH_PLAIN_OUT	%3
-%define	%%PLAIN_CYPH_IN		%4
-%define	%%PLAIN_CYPH_LEN	%5
-%define	%%ENC_DEC		%6
-%define	%%DATA_OFFSET		r11
-
-; Macro flow:
-; calculate the number of 16byte blocks in the message
-; process (number of 16byte blocks) mod 8 '%%_initial_num_blocks_is_# .. %%_initial_blocks_encrypted'
-; process 8 16 byte blocks at a time until all are done '%%_encrypt_by_8_new .. %%_eight_cipher_left'
-; if there is a block of less than 16 bytes process it '%%_zero_cipher_left .. %%_multiple_of_16_bytes'
-	cmp	%%PLAIN_CYPH_LEN, 0
-	je	%%_multiple_of_16_bytes
-
-	xor     %%DATA_OFFSET, %%DATA_OFFSET
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_CYPH_LEN
-       	add     [%%GDATA_CTX + InLen], rax          ; Update length of data processed
-%else
-	add     [%%GDATA_CTX + InLen], %%PLAIN_CYPH_LEN   ; Update length of data processed
-%endif
-       	vmovdqu  xmm13, [%%GDATA_KEY + HashKey]         ; xmm13 = HashKey
-	vmovdqu xmm8, [%%GDATA_CTX + AadHash]
-
-	PARTIAL_BLOCK %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%PLAIN_CYPH_LEN, %%DATA_OFFSET, xmm8, xmm13, %%ENC_DEC
-
-	mov	r13, %%PLAIN_CYPH_LEN
-	sub	r13, %%DATA_OFFSET
-	mov	r10, r13				; save the amount of data left to process in r10
-	and     r13, -16                                ; r13 = r13 - (r13 mod 16)
-
-        mov     r12, r13
-        shr     r12, 4
-        and     r12, 7
-
-        jz      %%_initial_num_blocks_is_0
-
-        cmp     r12, 7
-        je      %%_initial_num_blocks_is_7
-        cmp     r12, 6
-        je      %%_initial_num_blocks_is_6
-        cmp     r12, 5
-        je      %%_initial_num_blocks_is_5
-        cmp     r12, 4
-        je      %%_initial_num_blocks_is_4
-        cmp     r12, 3
-        je      %%_initial_num_blocks_is_3
-        cmp     r12, 2
-        je      %%_initial_num_blocks_is_2
-
-        jmp     %%_initial_num_blocks_is_1
-
-%%_initial_num_blocks_is_7:
-	INITIAL_BLOCKS	%%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 7, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        sub     r13, 16*7
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_6:
-	INITIAL_BLOCKS	%%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 6, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        sub     r13, 16*6
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_5:
-	INITIAL_BLOCKS	%%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 5, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        sub     r13, 16*5
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_4:
-	INITIAL_BLOCKS	%%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 4, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        sub     r13, 16*4
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_3:
-	INITIAL_BLOCKS	%%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 3, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        sub     r13, 16*3
-        jmp     %%_initial_blocks_encrypted
-%%_initial_num_blocks_is_2:
-	INITIAL_BLOCKS	%%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 2, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        sub     r13, 16*2
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_1:
-	INITIAL_BLOCKS	%%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 1, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-        sub     r13, 16
-        jmp     %%_initial_blocks_encrypted
-
-%%_initial_num_blocks_is_0:
-	INITIAL_BLOCKS	%%GDATA_KEY, %%GDATA_CTX, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, r13, %%DATA_OFFSET, 0, xmm12, xmm13, xmm14, xmm15, xmm11, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm10, xmm0, %%ENC_DEC
-
-%%_initial_blocks_encrypted:
-        cmp     r13, 0
-        je      %%_zero_cipher_left
-
-        sub     r13, 128
-        je      %%_eight_cipher_left
-
-        vmovd    r15d, xmm9
-        and     r15d, 255
-        vpshufb  xmm9, [SHUF_MASK]
-
-%%_encrypt_by_8_new:
-        cmp     r15d, 255-8
-        jg      %%_encrypt_by_8
-
-        add     r15b, 8
-	GHASH_8_ENCRYPT_8_PARALLEL	%%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN, %%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, out_order, %%ENC_DEC
-        add     %%DATA_OFFSET, 128
-        sub     r13, 128
-        jne     %%_encrypt_by_8_new
-
-        vpshufb  xmm9, [SHUF_MASK]
-        jmp     %%_eight_cipher_left
-
-%%_encrypt_by_8:
-        vpshufb  xmm9, [SHUF_MASK]
-        add     r15b, 8
-	GHASH_8_ENCRYPT_8_PARALLEL	%%GDATA_KEY, %%CYPH_PLAIN_OUT, %%PLAIN_CYPH_IN,%%DATA_OFFSET, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm9, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8, xmm15, in_order, %%ENC_DEC
-        vpshufb  xmm9, [SHUF_MASK]
-        add     %%DATA_OFFSET, 128
-        sub     r13, 128
-        jne     %%_encrypt_by_8_new
-
-        vpshufb  xmm9, [SHUF_MASK]
-
-%%_eight_cipher_left:
-	GHASH_LAST_8	%%GDATA_KEY, xmm0, xmm10, xmm11, xmm12, xmm13, xmm14, xmm15, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, xmm8
-
-%%_zero_cipher_left:
-	vmovdqu	[%%GDATA_CTX + AadHash], xmm14		; ctx_data.aad hash = xmm14
-	vmovdqu	[%%GDATA_CTX + CurCount], xmm9		; ctx_data.current_counter = xmm9
-
-        mov     r13, r10
-        and     r13, 15                                 ; r13 = (%%PLAIN_CYPH_LEN mod 16)
-
-        je      %%_multiple_of_16_bytes
-
-	mov	[%%GDATA_CTX + PBlockLen], r13		; ctx_data.partial_blck_length = r13
-        ; handle the last <16 Byte block separately
-
-        vpaddd   xmm9, [ONE]                            ; INCR CNT to get Yn
-        vmovdqu [%%GDATA_CTX + CurCount], xmm9          ; my_ctx_data.current_counter = xmm9
-        vpshufb  xmm9, [SHUF_MASK]
-        ENCRYPT_SINGLE_BLOCK   %%GDATA_KEY, xmm9        ; E(K, Yn)
-	vmovdqu	[%%GDATA_CTX + PBlockEncKey], xmm9	; ctx_data.partial_block_enc_key = xmm9
-
-	cmp	%%PLAIN_CYPH_LEN, 16
-	jge	%%_large_enough_update
-
-	lea	r10, [%%PLAIN_CYPH_IN + %%DATA_OFFSET]
-	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, r13, r12
-	lea	r12, [SHIFT_MASK + 16]
-        sub     r12, r13
-	jmp	%%_data_read
-
-%%_large_enough_update:
-        sub     %%DATA_OFFSET, 16
-        add     %%DATA_OFFSET, r13
-
-        vmovdqu  xmm1, [%%PLAIN_CYPH_IN+%%DATA_OFFSET]	; receive the last <16 Byte block
-
-	sub     %%DATA_OFFSET, r13
-        add     %%DATA_OFFSET, 16
-
-        lea     r12, [SHIFT_MASK + 16]
-        sub     r12, r13                                ; adjust the shuffle mask pointer to be able to shift 16-r13 bytes (r13 is the number of bytes in plaintext mod 16)
-
-        vmovdqu  xmm2, [r12]                             ; get the appropriate shuffle mask
-        vpshufb  xmm1, xmm2                              ; shift right 16-r13 bytes
-%%_data_read:
-%ifidn  %%ENC_DEC, DEC
-        vmovdqa  xmm2, xmm1
-        vpxor    xmm9, xmm1                              ; Plaintext XOR E(K, Yn)
-        vmovdqu  xmm1, [r12 + ALL_F - SHIFT_MASK]        ; get the appropriate mask to mask out top 16-r13 bytes of xmm9
-        vpand    xmm9, xmm1                              ; mask out top 16-r13 bytes of xmm9
-        vpand    xmm2, xmm1
-        vpshufb  xmm2, [SHUF_MASK]
-        vpxor    xmm14, xmm2
-        vmovdqu [%%GDATA_CTX + AadHash], xmm14
-
-%else
-        vpxor    xmm9, xmm1                              ; Plaintext XOR E(K, Yn)
-        vmovdqu  xmm1, [r12 + ALL_F - SHIFT_MASK]        ; get the appropriate mask to mask out top 16-r13 bytes of xmm9
-        vpand    xmm9, xmm1                              ; mask out top 16-r13 bytes of xmm9
-        vpshufb  xmm9, [SHUF_MASK]
-        vpxor    xmm14, xmm9
-	vmovdqu	[%%GDATA_CTX + AadHash], xmm14
-
-        vpshufb  xmm9, [SHUF_MASK]               ; shuffle xmm9 back to output as ciphertext
-%endif
-
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        ; output r13 Bytes
-        vmovq    rax, xmm9
-        cmp     r13, 8
-        jle     %%_less_than_8_bytes_left
-
-        mov     [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], rax
-        add     %%DATA_OFFSET, 8
-        vpsrldq xmm9, xmm9, 8
-        vmovq   rax, xmm9
-        sub     r13, 8
-
-%%_less_than_8_bytes_left:
-        mov     BYTE [%%CYPH_PLAIN_OUT + %%DATA_OFFSET], al
-        add     %%DATA_OFFSET, 1
-        shr     rax, 8
-        sub     r13, 1
-        jne     %%_less_than_8_bytes_left
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-%%_multiple_of_16_bytes:
-
-%endmacro
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; GCM_COMPLETE Finishes Encryption/Decryption of last partial block after GCM_UPDATE finishes.
-; Input: struct gcm_key_data* (GDATA_KEY), struct gcm_context_data *(GDATA_CTX).
-; Output: Authorization Tag (AUTH_TAG) and Authorization Tag length (AUTH_TAG_LEN)
-; Clobbers rax, r10-r12, and xmm0-xmm2, xmm5-xmm6, xmm9-xmm11, xmm13-xmm15
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro	GCM_COMPLETE		4
-%define	%%GDATA_KEY		%1
-%define	%%GDATA_CTX		%2
-%define	%%AUTH_TAG		%3
-%define	%%AUTH_TAG_LEN		%4
-%define	%%PLAIN_CYPH_LEN	rax
-
-	mov	r12, [%%GDATA_CTX + PBlockLen]
-	vmovdqu	xmm14, [%%GDATA_CTX + AadHash]
-	vmovdqu xmm13, [%%GDATA_KEY + HashKey]
-
-	cmp	r12, 0
-
-	je      %%_partial_done
-
-	GHASH_MUL xmm14, xmm13, xmm0, xmm10, xmm11, xmm5, xmm6 ;GHASH computation for the last <16 Byte block
-	vmovdqu [%%GDATA_CTX + AadHash], xmm14
-
-%%_partial_done:
-
-        mov     r12, [%%GDATA_CTX + AadLen]             ; r12 = aadLen (number of bytes)
-	mov	%%PLAIN_CYPH_LEN, [%%GDATA_CTX + InLen]
-
-        shl     r12, 3                                  ; convert into number of bits
-        vmovq   xmm15, r12                              ; len(A) in xmm15
-
-        shl     %%PLAIN_CYPH_LEN, 3                     ; len(C) in bits  (*128)
-        vmovq   xmm1, %%PLAIN_CYPH_LEN
-        vpslldq xmm15, xmm15, 8                         ; xmm15 = len(A)|| 0x0000000000000000
-        vpxor   xmm15, xmm1                             ; xmm15 = len(A)||len(C)
-
-        vpxor   xmm14, xmm15
-        GHASH_MUL       xmm14, xmm13, xmm0, xmm10, xmm11, xmm5, xmm6    ; final GHASH computation
-        vpshufb xmm14, [SHUF_MASK]                      ; perform a 16Byte swap
-
-        vmovdqu xmm9, [%%GDATA_CTX + OrigIV]            ; xmm9 = Y0
-
-        ENCRYPT_SINGLE_BLOCK %%GDATA_KEY, xmm9          ; E(K, Y0)
-
-        vpxor   xmm9, xmm14
-
-%%_return_T:
-        mov     r10, %%AUTH_TAG             ; r10 = authTag
-        mov     r11, %%AUTH_TAG_LEN         ; r11 = auth_tag_len
-
-        cmp     r11, 16
-        je      %%_T_16
-
-        cmp     r11, 12
-        je      %%_T_12
-
-        cmp     r11, 8
-        je      %%_T_8
-
-        simd_store_avx r10, xmm9, r11, r12, rax
-        jmp     %%_return_T_done
-%%_T_8:
-        vmovq   rax, xmm9
-        mov     [r10], rax
-        jmp     %%_return_T_done
-%%_T_12:
-        vmovq   rax, xmm9
-        mov     [r10], rax
-        vpsrldq xmm9, xmm9, 8
-        vmovd   eax, xmm9
-        mov     [r10 + 8], eax
-        jmp     %%_return_T_done
-%%_T_16:
-        vmovdqu  [r10], xmm9
-
-%%_return_T_done:
-
-%ifdef SAFE_DATA
-        ;; Clear sensitive data from context structure
-        vpxor   xmm0, xmm0
-        vmovdqu [%%GDATA_CTX + AadHash], xmm0
-        vmovdqu [%%GDATA_CTX + PBlockEncKey], xmm0
-%endif
-%endmacro ; GCM_COMPLETE
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_precomp_128_avx_gen2
-;        (struct gcm_key_data *key_data);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(precomp,_),function,)
-FN_NAME(precomp,_):
-        endbranch64
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_precomp
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
-        sub     rsp, 1*16
-        ; only xmm6 needs to be maintained
-        vmovdqu [rsp + 0*16], xmm6
-%endif
-
-	vpxor	xmm6, xmm6
-	ENCRYPT_SINGLE_BLOCK	arg1, xmm6		; xmm6 = HashKey
-
-        vpshufb xmm6, [SHUF_MASK]
-        ;;;;;;;;;;;;;;;  PRECOMPUTATION of HashKey<<1 mod poly from the HashKey;;;;;;;;;;;;;;;
-        vmovdqa  xmm2, xmm6
-        vpsllq   xmm6, 1
-        vpsrlq   xmm2, 63
-        vmovdqa  xmm1, xmm2
-        vpslldq  xmm2, xmm2, 8
-        vpsrldq  xmm1, xmm1, 8
-        vpor     xmm6, xmm2
-        ;reduction
-        vpshufd  xmm2, xmm1, 00100100b
-        vpcmpeqd xmm2, [TWOONE]
-        vpand    xmm2, [POLY]
-        vpxor    xmm6, xmm2                             ; xmm6 holds the HashKey<<1 mod poly
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vmovdqu  [arg1 + HashKey], xmm6                  ; store HashKey<<1 mod poly
-
-        PRECOMPUTE arg1, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5
-
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm6, [rsp + 0*16]
-        add     rsp, 1*16
-%endif
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_xmms_avx_asm
-%endif
-exit_precomp:
-
-        ret
-
-%ifdef SAFE_PARAM
-error_precomp:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-
-        jmp exit_precomp
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_init_128_avx_gen2(
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8      *iv,
-;        const   u8 *aad,
-;        u64     aad_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(init,_),function,)
-FN_NAME(init,_):
-        endbranch64
-        push	r12
-	push	r13
-%ifidn __OUTPUT_FORMAT__, win64
-        push    r14
-        push    r15
-        lea     r14, [rsp + 4*8]
-	; xmm6 needs to be maintained for Windows
-	sub	rsp, 1*16
-	vmovdqu	[rsp + 0*16], xmm6
-%endif
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_init
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_init
-
-        ;; Check IV != NULL
-        cmp     arg3, 0
-        jz      error_init
-
-        ;; Check if aad_len == 0
-        cmp     arg5, 0
-        jz      skip_aad_check_init
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg4, 0
-        jz      error_init
-
-skip_aad_check_init:
-%endif
-	GCM_INIT arg1, arg2, arg3, arg4, arg5
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_xmms_avx_asm
-%endif
-exit_init:
-
-%ifidn __OUTPUT_FORMAT__, win64
-	vmovdqu	xmm6 , [rsp + 0*16]
-        add     rsp, 1*16
-        pop     r15
-        pop     r14
-%endif
-        pop	r13
-	pop	r12
-        ret
-
-%ifdef SAFE_PARAM
-error_init:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_IV
-
-        ;; Check if aad_len == 0
-        cmp     arg5, 0
-        jz      skip_aad_check_error_init
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_init:
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_init
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_init_var_iv_128_avx_gen2 / aes_gcm_init_var_iv_192_avx_gen2 /
-;       aes_gcm_init_var_iv_256_avx_gen2 (
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8        *iv,
-;        const u64 iv_len,
-;        const u8  *aad,
-;        const u64 aad_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(init_var_iv,_),function,)
-FN_NAME(init_var_iv,_):
-        endbranch64
-	push	r12
-	push	r13
-%ifidn __OUTPUT_FORMAT__, win64
-        push    r14
-        push    r15
-        lea     r14, [rsp + 4*8]
-	; xmm6 need to be maintained for Windows
-	sub	rsp, 1*16
-	vmovdqu	[rsp + 0*16], xmm6
-%endif
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_init_IV
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_init_IV
-
-        ;; Check IV != NULL
-        cmp     arg3, 0
-        jz      error_init_IV
-
-        ;; Check iv_len != 0
-        cmp     arg4, 0
-        jz      error_init_IV
-
-        ;; Check if aad_len == 0
-        cmp     arg6, 0
-        jz      skip_aad_check_init_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg5, 0
-        jz      error_init_IV
-
-skip_aad_check_init_IV:
-%endif
-        cmp     arg4, 12
-        je      iv_len_12_init_IV
-
-	GCM_INIT arg1, arg2, arg3, arg5, arg6, arg4
-        jmp     skip_iv_len_12_init_IV
-
-iv_len_12_init_IV:
-	GCM_INIT arg1, arg2, arg3, arg5, arg6
-
-skip_iv_len_12_init_IV:
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_xmms_avx_asm
-%endif
-exit_init_IV:
-
-%ifidn __OUTPUT_FORMAT__, win64
-	vmovdqu	xmm6 , [rsp + 0*16]
-        add     rsp, 1*16
-        pop     r15
-        pop     r14
-%endif
-	pop	r13
-	pop	r12
-        ret
-
-%ifdef SAFE_PARAM
-error_init_IV:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_IV
-
-        ;; Check iv_len != 0
-        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_IV_LEN
-
-        ;; Check if aad_len == 0
-        cmp     arg6, 0
-        jz      skip_aad_check_error_init_IV
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg5, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_init_IV:
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_init_IV
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_enc_128_update_avx_gen2(
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8      *out,
-;        const   u8 *in,
-;        u64     msg_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc,_update_),function,)
-FN_NAME(enc,_update_):
-        endbranch64
-	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_update_enc
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_update_enc
-
-        ;; Check if plaintext_len == 0
-        cmp     arg5, 0
-        jz      error_update_enc
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_update_enc
-
-        ;; Check out != NULL (plaintext_len != 0)
-        cmp     arg3, 0
-        jz      error_update_enc
-
-        ;; Check in != NULL (plaintext_len != 0)
-        cmp     arg4, 0
-        jz      error_update_enc
-%endif
-	GCM_ENC_DEC arg1, arg2, arg3, arg4, arg5, ENC
-
-exit_update_enc:
-	FUNC_RESTORE
-
-	ret
-
-%ifdef SAFE_PARAM
-error_update_enc:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check if plaintext_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_update_enc
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (plaintext_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_update_enc:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_update_enc
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_dec_128_update_avx_gen2(
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8      *out,
-;        const   u8 *in,
-;        u64     msg_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec,_update_),function,)
-FN_NAME(dec,_update_):
-        endbranch64
-	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_update_dec
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_update_dec
-
-        ;; Check if plaintext_len == 0
-        cmp     arg5, 0
-        jz      error_update_dec
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_update_dec
-
-        ;; Check out != NULL (plaintext_len != 0)
-        cmp     arg3, 0
-        jz      error_update_dec
-
-        ;; Check in != NULL (plaintext_len != 0)
-        cmp     arg4, 0
-        jz      error_update_dec
-%endif
-
-	GCM_ENC_DEC arg1, arg2, arg3, arg4, arg5, DEC
-
-exit_update_dec:
-	FUNC_RESTORE
-
-	ret
-
-%ifdef SAFE_PARAM
-error_update_dec:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check if plaintext_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_update_dec
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (plaintext_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_update_dec:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_update_dec
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_enc_128_finalize_avx_gen2(
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8      *auth_tag,
-;        u64     auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc,_finalize_),function,)
-FN_NAME(enc,_finalize_):
-        endbranch64
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc_fin
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc_fin
-
-        ;; Check auth_tag != NULL
-        cmp     arg3, 0
-        jz      error_enc_fin
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg4, 0
-        jz      error_enc_fin
-
-        cmp     arg4, 16
-        ja      error_enc_fin
-%endif
-	push r12
-
-%ifidn __OUTPUT_FORMAT__, win64
-	; xmm6:xmm15 need to be maintained for Windows
-	sub	rsp, 7*16
-        vmovdqu	[rsp + 0*16], xmm6
-        vmovdqu	[rsp + 1*16], xmm9
-        vmovdqu	[rsp + 2*16], xmm10
-        vmovdqu	[rsp + 3*16], xmm11
-        vmovdqu	[rsp + 4*16], xmm13
-        vmovdqu	[rsp + 5*16], xmm14
-        vmovdqu	[rsp + 6*16], xmm15
-%endif
-	GCM_COMPLETE	arg1, arg2, arg3, arg4
-
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu	xmm15, [rsp + 6*16]
-        vmovdqu	xmm14, [rsp + 5*16]
-        vmovdqu	xmm13, [rsp + 4*16]
-        vmovdqu	xmm11, [rsp + 3*16]
-        vmovdqu	xmm10, [rsp + 2*16]
-        vmovdqu	xmm9,  [rsp + 1*16]
-        vmovdqu	xmm6,  [rsp + 0*16]
-        add     rsp, 7*16
-%endif
-
-	pop r12
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_xmms_avx_asm
-%endif
-exit_enc_fin:
-        ret
-
-%ifdef SAFE_PARAM
-error_enc_fin:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg4, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc_fin
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_dec_128_finalize_avx_gen2(
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8      *auth_tag,
-;        u64     auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec,_finalize_),function,)
-FN_NAME(dec,_finalize_):
-        endbranch64
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec_fin
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec_fin
-
-        ;; Check auth_tag != NULL
-        cmp     arg3, 0
-        jz      error_dec_fin
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg4, 0
-        jz      error_dec_fin
-
-        cmp     arg4, 16
-        ja      error_dec_fin
-%endif
-
-	push r12
-
-%ifidn __OUTPUT_FORMAT__, win64
-	; xmm6:xmm15 need to be maintained for Windows
-	sub	rsp, 7*16
-        vmovdqu	[rsp + 0*16], xmm6
-        vmovdqu	[rsp + 1*16], xmm9
-        vmovdqu	[rsp + 2*16], xmm10
-        vmovdqu	[rsp + 3*16], xmm11
-        vmovdqu	[rsp + 4*16], xmm13
-        vmovdqu	[rsp + 5*16], xmm14
-        vmovdqu	[rsp + 6*16], xmm15
-%endif
-	GCM_COMPLETE	arg1, arg2, arg3, arg4
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu	xmm15, [rsp + 6*16]
-        vmovdqu	xmm14, [rsp + 5*16]
-        vmovdqu	xmm13, [rsp + 4*16]
-        vmovdqu	xmm11, [rsp + 3*16]
-        vmovdqu	xmm10, [rsp + 2*16]
-        vmovdqu	xmm9,  [rsp + 1*16]
-        vmovdqu	xmm6,  [rsp + 0*16]
-        add     rsp, 7*16
-%endif
-
-	pop r12
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_xmms_avx_asm
-%endif
-exit_dec_fin:
-	ret
-
-%ifdef SAFE_PARAM
-error_dec_fin:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg4, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg4, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec_fin
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_enc_128_avx_gen2(
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8      *out,
-;        const   u8 *in,
-;        u64     msg_len,
-;        u8      *iv,
-;        const   u8 *aad,
-;        u64     aad_len,
-;        u8      *auth_tag,
-;        u64     auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc,_),function,)
-FN_NAME(enc,_):
-        endbranch64
-	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_enc
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_enc
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_enc
-
-        ;; Check auth_tag != NULL
-        cmp     arg9, 0
-        jz      error_enc
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg10, 0
-        jz      error_enc
-
-        cmp     arg10, 16
-        ja      error_enc
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_enc
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_enc
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_enc
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_enc
-
-skip_in_out_check_enc:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_enc
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg7, 0
-        jz      error_enc
-
-skip_aad_check_enc:
-%endif
-	GCM_INIT arg1, arg2, arg6, arg7, arg8
-
-	GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, ENC
-
-	GCM_COMPLETE arg1, arg2, arg9, arg10
-
-exit_enc:
-	FUNC_RESTORE
-
-	ret
-
-%ifdef SAFE_PARAM
-error_enc:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg9, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg10, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg10, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_enc
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_enc:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_error_enc
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg7, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_enc:
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_enc
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   aes_gcm_dec_128_avx_gen2(
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        u8      *out,
-;        const   u8 *in,
-;        u64     msg_len,
-;        u8      *iv,
-;        const   u8 *aad,
-;        u64     aad_len,
-;        u8      *auth_tag,
-;        u64     auth_tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec,_),function,)
-FN_NAME(dec,_):
-        endbranch64
-	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Load max len to reg on windows
-        INIT_GCM_MAX_LENGTH
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_dec
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_dec
-
-        ;; Check IV != NULL
-        cmp     arg6, 0
-        jz      error_dec
-
-        ;; Check auth_tag != NULL
-        cmp     arg9, 0
-        jz      error_dec
-
-        ;; Check auth_tag_len == 0 or > 16
-        cmp     arg10, 0
-        jz      error_dec
-
-        cmp     arg10, 16
-        ja      error_dec
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_dec
-
-        ;; Check if msg_len > max_len
-        cmp     arg5, GCM_MAX_LENGTH
-        ja      error_dec
-
-        ;; Check out != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_dec
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg4, 0
-        jz      error_dec
-
-skip_in_out_check_dec:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_dec
-
-        ;; Check aad != NULL (aad_len != 0)
-        cmp     arg7, 0
-        jz      error_dec
-
-skip_aad_check_dec:
-%endif
-
-	GCM_INIT arg1, arg2, arg6, arg7, arg8
-
-	GCM_ENC_DEC  arg1, arg2, arg3, arg4, arg5, DEC
-
-	GCM_COMPLETE arg1, arg2, arg9, arg10
-
-exit_dec:
-	FUNC_RESTORE
-
-	ret
-
-%ifdef SAFE_PARAM
-error_dec:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check IV != NULL
-        IMB_ERR_CHECK_NULL arg6, rax, IMB_ERR_NULL_IV
-
-        ;; Check auth_tag != NULL
-        IMB_ERR_CHECK_NULL arg9, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check auth_tag_len == 0 or > 16
-        IMB_ERR_CHECK_ZERO arg10, rax, IMB_ERR_AUTH_TAG_LEN
-
-        IMB_ERR_CHECK_ABOVE arg10, 16, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Check if msg_len == 0
-        cmp     arg5, 0
-        jz      skip_in_out_check_error_dec
-
-        ;; Check if msg_len > max_len
-        IMB_ERR_CHECK_ABOVE arg5, GCM_MAX_LENGTH, rax, IMB_ERR_CIPH_LEN
-
-        ;; Check out != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_DST
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_SRC
-
-skip_in_out_check_error_dec:
-        ;; Check if aad_len == 0
-        cmp     arg8, 0
-        jz      skip_aad_check_error_dec
-
-        ;; Check aad != NULL (aad_len != 0)
-        IMB_ERR_CHECK_NULL arg7, rax, IMB_ERR_NULL_AAD
-
-skip_aad_check_error_dec:
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_dec
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;
-; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
-;
-;IMB_JOB *aes_gcm_enc_var_iv_128_avx_gen2 / aes_gcm_enc_var_iv_192_avx_gen2 /
-;       aes_gcm_enc_var_iv_256_avx_gen2(IMB_MGR *state, IMB_JOB *job)
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
-FN_NAME(enc_var_iv,_):
-        endbranch64
-	FUNC_SAVE alloc_context
-
-        mov     arg1, [arg2 + _enc_keys]
-
-        cmp     qword [arg2 + _iv_len_in_bytes], 12
-        je      iv_len_12_enc_IV
-
-        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
-                 {[arg2 + _iv_len_in_bytes]}
-
-        jmp     skip_iv_len_12_enc_IV
-
-iv_len_12_enc_IV:
-	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}
-
-skip_iv_len_12_enc_IV:
-        mov     arg3, [arg2 + _src]
-        add     arg3, [arg2 + _cipher_start_src_offset]
-        mov     arg4, [arg2 + _dst]
-        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
-        mov     arg2, [arg2 + _msg_len_to_cipher]
-	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, ENC
-
-        mov     arg2, [rsp + GP_OFFSET + 5*8]
-        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
-                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}
-
-        ;; mark job complete
-        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
-
-        mov     rax, arg2       ;; return the job
-
-        FUNC_RESTORE
-	ret
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;
-; NOTE: THIS API IS USED BY JOB-API ONLY, NO NEED FOR 2ND SAFE PARAM CHECK
-;
-;IMB_JOB *aes_gcm_dec_var_iv_128_avx_gen2 / aes_gcm_dec_var_iv_192_avx_gen2 /
-;       aes_gcm_dec_var_iv_256_avx_gen2(IMB_MGR *state, IMB_JOB *job)
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
-FN_NAME(dec_var_iv,_):
-        endbranch64
-	FUNC_SAVE alloc_context
-
-        mov     arg1, [arg2 + _dec_keys]
-
-        cmp     qword [arg2 + _iv_len_in_bytes], 12
-        je      iv_len_12_dec_IV
-
-        GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}, \
-                 {[arg2 + _iv_len_in_bytes]}
-
-        jmp     skip_iv_len_12_dec_IV
-
-iv_len_12_dec_IV:
-	GCM_INIT arg1, {rsp + CONTEXT_OFFSET}, {[arg2 + _iv]}, \
-                 {[arg2 + _gcm_aad]}, {[arg2 + _gcm_aad_len]}
-
-skip_iv_len_12_dec_IV:
-        mov     arg3, [arg2 + _src]
-        add     arg3, [arg2 + _cipher_start_src_offset]
-        mov     arg4, [arg2 + _dst]
-        mov     [rsp + GP_OFFSET + 5*8], arg2   ; preserve job pointer
-        mov     arg2, [arg2 + _msg_len_to_cipher]
-	GCM_ENC_DEC  arg1, {rsp + CONTEXT_OFFSET}, arg4, arg3, arg2, DEC
-
-        mov     arg2, [rsp + GP_OFFSET + 5*8]
-        GCM_COMPLETE arg1, {rsp + CONTEXT_OFFSET}, \
-                     {[arg2 + _auth_tag_output]}, {[arg2 + _auth_tag_output_len_in_bytes]}
-
-        ;; mark job complete
-        mov     dword [arg2 + _status], IMB_STATUS_COMPLETED
-
-        mov     rax, arg2       ;; return the job
-
-        FUNC_RESTORE
-	ret
-
-%ifdef GCM128_MODE
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   ghash_pre_avx_gen2
-;       (const void *key, struct gcm_key_data *key_data)
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(ghash_pre_avx_gen2,function,)
-ghash_pre_avx_gen2:
-        endbranch64
-;; Parameter is passed through register
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key != NULL
-        cmp     arg1, 0
-        jz      error_ghash_pre
-
-        ;; Check key_data != NULL
-        cmp     arg2, 0
-        jz      error_ghash_pre
-%endif
-
-%ifidn __OUTPUT_FORMAT__, win64
-        sub     rsp, 1*16
-
-        ; only xmm6 needs to be maintained
-        vmovdqu [rsp + 0*16], xmm6
-%endif
-        vmovdqu  xmm6, [arg1]
-        vpshufb  xmm6, [rel SHUF_MASK]
-        ;;;;;;;;;;;;;;;  PRECOMPUTATION of HashKey<<1 mod poly from the HashKey;;;;;;;;;;;;;;;
-        vmovdqa  xmm2, xmm6
-        vpsllq   xmm6, xmm6, 1
-        vpsrlq   xmm2, xmm2, 63
-        vmovdqa  xmm1, xmm2
-        vpslldq  xmm2, xmm2, 8
-        vpsrldq  xmm1, xmm1, 8
-        vpor     xmm6, xmm6, xmm2
-        ;reduction
-        vpshufd  xmm2, xmm1, 00100100b
-        vpcmpeqd xmm2, [rel TWOONE]
-        vpand    xmm2, xmm2, [rel POLY]
-        vpxor    xmm6, xmm6, xmm2                       ; xmm6 holds the HashKey<<1 mod poly
-        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vmovdqu  [arg2 + HashKey], xmm6                 ; store HashKey<<1 mod poly
-
-        PRECOMPUTE arg2, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5
-
-%ifdef SAFE_DATA
-        clear_scratch_gps_asm
-        clear_scratch_xmms_avx_asm
-%endif
-%ifidn __OUTPUT_FORMAT__, win64
-        vmovdqu xmm6, [rsp + 0*16]
-        add     rsp, 1*16
-%endif
-exit_ghash_pre:
-        ret
-
-%ifdef SAFE_PARAM
-error_ghash_pre:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_KEY
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_ghash_pre
-%endif
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   ghash_avx_gen2
-;        const struct gcm_key_data *key_data,
-;        const void   *in,
-;        const u64    in_len,
-;        void         *io_tag,
-;        const u64    tag_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(ghash_avx_gen2,function,)
-ghash_avx_gen2:
-        endbranch64
-        FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_ghash
-
-        ;; Check in != NULL
-        cmp     arg2, 0
-        jz      error_ghash
-
-        ;; Check in_len != 0
-        cmp     arg3, 0
-        jz      error_ghash
-
-        ;; Check tag != NULL
-        cmp     arg4, 0
-        jz      error_ghash
-
-        ;; Check tag_len != 0
-        cmp     arg5, 0
-        jz      error_ghash
-%endif
-        ;; copy tag to xmm0
-        vmovdqu	xmm0, [arg4]
-        vpshufb xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
-
-        CALC_AAD_HASH arg2, arg3, xmm0, arg1, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, \
-                      r10, r11, r12, r13, rax
-
-        vpshufb xmm0, [rel SHUF_MASK] ; perform a 16Byte swap
-
-        simd_store_avx arg4, xmm0, arg5, r12, rax
-
-exit_ghash:
-        FUNC_RESTORE
-        ret
-
-%ifdef SAFE_PARAM
-error_ghash:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check in != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_SRC
-
-        ;; Check in_len != 0
-        IMB_ERR_CHECK_ZERO arg3, rax, IMB_ERR_AUTH_LEN
-
-        ;; Check tag != NULL
-        IMB_ERR_CHECK_NULL arg4, rax, IMB_ERR_NULL_AUTH
-
-        ;; Check tag_len != 0
-        IMB_ERR_CHECK_ZERO arg5, rax, IMB_ERR_AUTH_TAG_LEN
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-
-        jmp     exit_ghash
-%endif
-
-%endif ;; GCM128_MODE
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; PARTIAL_BLOCK_GMAC: Handles the tag partial blocks between update calls.
-; Requires the input data be at least 1 byte long.
-; Input: gcm_key_data (GDATA_KEY), gcm_context_data (GDATA_CTX), input text (PLAIN_IN),
-; input text length (PLAIN_LEN), hash subkey (HASH_SUBKEY).
-; Output: Updated GDATA_CTX
-; Clobbers rax, r10, r12, r13, r15, xmm0, xmm1, xmm2, xmm3, xmm5, xmm6, xmm9, xmm10, xmm11
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%macro PARTIAL_BLOCK_GMAC	7
-%define	%%GDATA_KEY             %1
-%define	%%GDATA_CTX             %2
-%define	%%PLAIN_IN              %3
-%define	%%PLAIN_LEN             %4
-%define	%%DATA_OFFSET           %5
-%define	%%AAD_HASH              %6
-%define	%%HASH_SUBKEY           %7
-
-	mov	r13, [%%GDATA_CTX + PBlockLen]
-	cmp	r13, 0
-        ; Leave Macro if no partial blocks
-	je	%%_partial_block_done
-
-        ; Read in input data without over reading
-	cmp	%%PLAIN_LEN, 16
-	jl	%%_fewer_than_16_bytes
-        ; If more than 16 bytes of data, just fill the xmm register
-	VXLDR   xmm1, [%%PLAIN_IN]
-	jmp	%%_data_read
-
-%%_fewer_than_16_bytes:
-	lea	r10, [%%PLAIN_IN]
-	READ_SMALL_DATA_INPUT_AVX	xmm1, r10, %%PLAIN_LEN, rax
-
-        ; Finished reading in data
-%%_data_read:
-
-	lea	r12, [rel SHIFT_MASK]
-        ; Adjust the shuffle mask pointer to be able to shift r13 bytes
-        ; (16-r13 is the number of bytes in plaintext mod 16)
-	add	r12, r13
-        ; Get the appropriate shuffle mask
-	vmovdqu	xmm2, [r12]
-	vmovdqa	xmm3, xmm1
-
-	mov	r15, %%PLAIN_LEN
-	add	r15, r13
-        ; Set r15 to be the amount of data left in PLAIN_IN after filling the block
-	sub	r15, 16
-        ; Determine if partial block is not being filled and shift mask accordingly
-	jge	%%_no_extra_mask_1
-	sub	r12, r15
-%%_no_extra_mask_1:
-
-        ; Get the appropriate mask to mask out bottom r13 bytes of xmm3
-	vmovdqu	xmm1, [r12 + ALL_F-SHIFT_MASK]
-
-	vpand	xmm3, xmm1
-	vpshufb	xmm3, [rel SHUF_MASK]
-	vpshufb	xmm3, xmm2
-	vpxor	%%AAD_HASH, xmm3
-
-	cmp	r15,0
-	jl	%%_partial_incomplete_1
-
-        ; GHASH computation for the last <16 Byte block
-	GHASH_MUL	%%AAD_HASH, %%HASH_SUBKEY, xmm0, xmm10, xmm11, xmm5, xmm6
-	xor	rax, rax
-	mov	[%%GDATA_CTX + PBlockLen], rax
-	jmp	%%_ghash_done
-%%_partial_incomplete_1:
-%ifidn __OUTPUT_FORMAT__, win64
-        mov     rax, %%PLAIN_LEN
-        add     [%%GDATA_CTX + PBlockLen], rax
-%else
-        add     [%%GDATA_CTX + PBlockLen], %%PLAIN_LEN
-%endif
-%%_ghash_done:
-	vmovdqu	[%%GDATA_CTX + AadHash], %%AAD_HASH
-
-        cmp     r15, 0
-        jl      %%_partial_fill
-
-        mov     r12, 16
-        ; Set r12 to be the number of bytes to skip after this macro
-        sub     r12, r13
-
-        jmp     %%offset_set
-%%_partial_fill:
-        mov     r12, %%PLAIN_LEN
-%%offset_set:
-        mov     %%DATA_OFFSET, r12
-%%_partial_block_done:
-%endmacro ; PARTIAL_BLOCK_GMAC
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   imb_aes_gmac_update_128_avx_gen2 / imb_aes_gmac_update_192_avx_gen2 /
-;       imb_aes_gmac_update_256_avx_gen2
-;        const struct gcm_key_data *key_data,
-;        struct gcm_context_data *context_data,
-;        const   u8 *in,
-;        const   u64 msg_len);
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-MKGLOBAL(GMAC_FN_NAME(update),function,)
-GMAC_FN_NAME(update):
-        endbranch64
-	FUNC_SAVE
-
-%ifdef SAFE_PARAM
-        ;; Reset imb_errno
-        IMB_ERR_CHECK_RESET
-%endif
-        ;; Check if msg_len == 0
-	cmp	arg4, 0
-	je	exit_gmac_update
-
-%ifdef SAFE_PARAM
-        ;; Check key_data != NULL
-        cmp     arg1, 0
-        jz      error_gmac_update
-
-        ;; Check context_data != NULL
-        cmp     arg2, 0
-        jz      error_gmac_update
-
-        ;; Check in != NULL (msg_len != 0)
-        cmp     arg3, 0
-        jz      error_gmac_update
-%endif
-
-        ; Increment size of "AAD length" for GMAC
-        add     [arg2 + AadLen], arg4
-
-        ;; Deal with previous partial block
-	xor	r11, r11
-	vmovdqu	xmm13, [arg1 + HashKey]
-	vmovdqu	xmm8, [arg2 + AadHash]
-
-	PARTIAL_BLOCK_GMAC arg1, arg2, arg3, arg4, r11, xmm8, xmm13
-
-        ; CALC_AAD_HASH needs to deal with multiple of 16 bytes
-        sub     arg4, r11
-        add     arg3, r11
-
-        vmovq   xmm7, arg4 ; Save remaining length
-        and     arg4, -16 ; Get multiple of 16 bytes
-
-        or      arg4, arg4
-        jz      no_full_blocks
-
-        ;; Calculate GHASH of this segment
-        CALC_AAD_HASH arg3, arg4, xmm8, arg1, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, \
-                      r10, r11, r12, r13, rax
-	vmovdqu	[arg2 + AadHash], xmm8	; ctx_data.aad hash = aad_hash
-
-no_full_blocks:
-        add     arg3, arg4 ; Point at partial block
-
-        vmovq   arg4, xmm7 ; Restore original remaining length
-        and     arg4, 15
-        jz      exit_gmac_update
-
-        ; Save next partial block
-        mov	[arg2 + PBlockLen], arg4
-        READ_SMALL_DATA_INPUT_AVX xmm1, arg3, arg4, r11
-        vpshufb xmm1, [rel SHUF_MASK]
-        vpxor   xmm8, xmm1
-        vmovdqu [arg2 + AadHash], xmm8
-
-exit_gmac_update:
-	FUNC_RESTORE
-
-	ret
-
-%ifdef SAFE_PARAM
-error_gmac_update:
-        ;; Clear reg and imb_errno
-        IMB_ERR_CHECK_START rax
-
-        ;; Check key_data != NULL
-        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_EXP_KEY
-
-        ;; Check context_data != NULL
-        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_CTX
-
-        ;; Check in != NULL (msg_len != 0)
-        IMB_ERR_CHECK_NULL arg3, rax, IMB_ERR_NULL_SRC
-
-        ;; Set imb_errno
-        IMB_ERR_CHECK_END rax
-        jmp     exit_gmac_update
-%endif
-
-mksection stack-noexec
diff --git a/lib/sse_t1/gcm_api_sse.inc b/lib/sse_t1/gcm_api_sse.inc
index 29fa0be5..2ce4a84f 100644
--- a/lib/sse_t1/gcm_api_sse.inc
+++ b/lib/sse_t1/gcm_api_sse.inc
@@ -42,6 +42,9 @@ default rel
 ;void	aes_gcm_precomp_128_sse / aes_gcm_precomp_192_sse / aes_gcm_precomp_256_sse
 ;        (struct gcm_key_data *key_data);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(precomp,_),function,)
+FN_NAME_AVX(precomp,_):
 MKGLOBAL(FN_NAME(precomp,_),function,)
 FN_NAME(precomp,_):
         endbranch64
@@ -122,6 +125,9 @@ error_precomp:
 ;        u8      *auth_tag,
 ;        u64     auth_tag_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(enc,_),function,)
+FN_NAME_AVX(enc,_):
 MKGLOBAL(FN_NAME(enc,_),function,)
 FN_NAME(enc,_):
         endbranch64
@@ -257,6 +263,9 @@ skip_aad_check_error_enc:
 ;        u8      *auth_tag,
 ;        u64     auth_tag_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(dec,_),function,)
+FN_NAME_AVX(dec,_):
 MKGLOBAL(FN_NAME(dec,_),function,)
 FN_NAME(dec,_):
         endbranch64
@@ -388,6 +397,9 @@ skip_aad_check_error_dec:
 ;IMB_JOB *aes_gcm_enc_var_iv_128_sse / aes_gcm_enc_var_iv_192_sse /
 ;       aes_gcm_enc_var_iv_256_sse(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(enc_var_iv,_),function,internal)
+FN_NAME_AVX(enc_var_iv,_):
 MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
 FN_NAME(enc_var_iv,_):
         endbranch64
@@ -435,6 +447,9 @@ skip_iv_len_12_enc_IV:
 ;IMB_JOB *aes_gcm_dec_var_iv_128_sse / aes_gcm_dec_var_iv_192_sse /
 ;       aes_gcm_dec_var_iv_256_sse(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(dec_var_iv,_),function,internal)
+FN_NAME_AVX(dec_var_iv,_):
 MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
 FN_NAME(dec_var_iv,_):
         endbranch64
diff --git a/lib/sse_t1/gcm_gmac_api_sse.inc b/lib/sse_t1/gcm_gmac_api_sse.inc
index 23f20938..9f3a4445 100644
--- a/lib/sse_t1/gcm_gmac_api_sse.inc
+++ b/lib/sse_t1/gcm_gmac_api_sse.inc
@@ -41,7 +41,10 @@ default rel
 ;void   ghash_pre_sse / ghash_sse_no_aesni
 ;       (const void *key, struct gcm_key_data *key_data)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
 %ifndef NO_AESNI
+MKGLOBAL(ghash_pre_avx_gen2,function,)
+ghash_pre_avx_gen2:
 MKGLOBAL(ghash_pre_sse,function,)
 ghash_pre_sse:
 %else
@@ -123,7 +126,10 @@ error_ghash_pre:
 ;        void         *io_tag,
 ;        const u64    tag_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
 %ifndef NO_AESNI
+MKGLOBAL(ghash_avx_gen2,function,)
+ghash_avx_gen2:
 MKGLOBAL(ghash_sse,function,)
 ghash_sse:
 %else
@@ -209,6 +215,9 @@ error_ghash:
 ;        const   u8 *in,
 ;        const   u64 msg_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(GMAC_FN_NAME_AVX(update),function,)
+GMAC_FN_NAME_AVX(update):
 MKGLOBAL(GMAC_FN_NAME(update),function,)
 GMAC_FN_NAME(update):
         endbranch64
diff --git a/lib/sse_t1/gcm_sgl_api_sse.inc b/lib/sse_t1/gcm_sgl_api_sse.inc
index 30c7022c..86dee278 100644
--- a/lib/sse_t1/gcm_sgl_api_sse.inc
+++ b/lib/sse_t1/gcm_sgl_api_sse.inc
@@ -43,6 +43,9 @@ default rel
 ;        const   u8 *aad,
 ;        u64     aad_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(init,_),function,)
+FN_NAME_AVX(init,_):
 MKGLOBAL(FN_NAME(init,_),function,)
 FN_NAME(init,_):
         endbranch64
@@ -139,6 +142,9 @@ skip_aad_check_error_init:
 ;        const u8  *aad,
 ;        const u64 aad_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(init_var_iv,_),function,)
+FN_NAME_AVX(init_var_iv,_):
 MKGLOBAL(FN_NAME(init_var_iv,_),function,)
 FN_NAME(init_var_iv,_):
         endbranch64
@@ -249,6 +255,9 @@ skip_aad_check_error_init_IV:
 ;        const   u8 *in,
 ;        u64     msg_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(enc,_update_),function,)
+FN_NAME_AVX(enc,_update_):
 MKGLOBAL(FN_NAME(enc,_update_),function,)
 FN_NAME(enc,_update_):
         endbranch64
@@ -330,6 +339,9 @@ skip_in_out_check_error_update_enc:
 ;        const   u8 *in,
 ;        u64     msg_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(dec,_update_),function,)
+FN_NAME_AVX(dec,_update_):
 MKGLOBAL(FN_NAME(dec,_update_),function,)
 FN_NAME(dec,_update_):
         endbranch64
@@ -411,6 +423,9 @@ skip_in_out_check_error_update_dec:
 ;        u8      *auth_tag,
 ;        u64     auth_tag_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(enc,_finalize_),function,)
+FN_NAME_AVX(enc,_finalize_):
 MKGLOBAL(FN_NAME(enc,_finalize_),function,)
 FN_NAME(enc,_finalize_):
         endbranch64
@@ -504,6 +519,9 @@ error_enc_fin:
 ;        u8      *auth_tag,
 ;        u64     auth_tag_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+align 32
+MKGLOBAL(FN_NAME_AVX(dec,_finalize_),function,)
+FN_NAME_AVX(dec,_finalize_):
 MKGLOBAL(FN_NAME(dec,_finalize_),function,)
 FN_NAME(dec,_finalize_):
         endbranch64
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index c8137caf..01256413 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -140,18 +140,24 @@
 %ifdef GCM128_MODE
 %define FN_NAME(x,y) aes_gcm_ %+ x %+ _128 %+ y %+ SSE
 %define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _128_ %+ SSE
+%define FN_NAME_AVX(x,y) aes_gcm_ %+ x %+ _128 %+ y %+ avx_gen2
+%define GMAC_FN_NAME_AVX(x) imb_aes_gmac_ %+ x %+ _128_avx_gen2
 %define NROUNDS 9
 %endif
 
 %ifdef GCM192_MODE
 %define FN_NAME(x,y) aes_gcm_ %+ x %+ _192 %+ y %+ SSE
 %define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _192_ %+ SSE
+%define FN_NAME_AVX(x,y) aes_gcm_ %+ x %+ _192 %+ y %+ avx_gen2
+%define GMAC_FN_NAME_AVX(x) imb_aes_gmac_ %+ x %+ _192_avx_gen2
 %define NROUNDS 11
 %endif
 
 %ifdef GCM256_MODE
 %define FN_NAME(x,y) aes_gcm_ %+ x %+ _256 %+ y %+ SSE
 %define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _256_ %+ SSE
+%define FN_NAME_AVX(x,y) aes_gcm_ %+ x %+ _256 %+ y %+ avx_gen2
+%define GMAC_FN_NAME_AVX(x) imb_aes_gmac_ %+ x %+ _256_avx_gen2
 %define NROUNDS 13
 %endif
 
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 63751483..80bd00c6 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -546,19 +546,16 @@ no_aesni_objs = \
 
 gcm_objs = \
 	$(OBJ_DIR)\gcm.obj \
-	$(OBJ_DIR)\aes128_gcm_by8_avx.obj \
 	$(OBJ_DIR)\aes128_gcm_by8_avx2.obj \
 	$(OBJ_DIR)\aes128_gcm_by8_avx512.obj \
 	$(OBJ_DIR)\aes128_gcm_api_vaes_avx512.obj \
 	$(OBJ_DIR)\aes128_gcm_sgl_api_vaes_avx512.obj \
 	$(OBJ_DIR)\aes128_gmac_api_vaes_avx512.obj \
-	$(OBJ_DIR)\aes192_gcm_by8_avx.obj \
 	$(OBJ_DIR)\aes192_gcm_by8_avx2.obj \
 	$(OBJ_DIR)\aes192_gcm_by8_avx512.obj \
 	$(OBJ_DIR)\aes192_gcm_api_vaes_avx512.obj \
 	$(OBJ_DIR)\aes192_gcm_sgl_api_vaes_avx512.obj \
 	$(OBJ_DIR)\aes192_gmac_api_vaes_avx512.obj \
-	$(OBJ_DIR)\aes256_gcm_by8_avx.obj \
 	$(OBJ_DIR)\aes256_gcm_by8_avx2.obj \
 	$(OBJ_DIR)\aes256_gcm_by8_avx512.obj \
 	$(OBJ_DIR)\aes256_gcm_api_vaes_avx512.obj \
diff --git a/lib/x86_64/gcm.c b/lib/x86_64/gcm.c
index 085af4ef..617bb7b2 100644
--- a/lib/x86_64/gcm.c
+++ b/lib/x86_64/gcm.c
@@ -85,21 +85,7 @@ void aes_gcm_pre_128_sse_no_aesni(const void *key,
 
 void aes_gcm_pre_128_avx_gen2(const void *key, struct gcm_key_data *key_data)
 {
-#ifdef SAFE_PARAM
-        /* reset error status */
-        imb_set_errno(NULL, 0);
-
-        if (key == NULL) {
-                imb_set_errno(NULL, IMB_ERR_NULL_KEY);
-                return;
-        }
-        if (key_data == NULL) {
-                imb_set_errno(NULL, IMB_ERR_NULL_EXP_KEY);
-                return;
-        }
-#endif
-        aes_keyexp_128_enc_avx(key, key_data->expanded_keys);
-        aes_gcm_precomp_128_avx_gen2(key_data);
+        aes_gcm_pre_128_sse(key, key_data);
 }
 
 void aes_gcm_pre_128_avx_gen4(const void *key, struct gcm_key_data *key_data)
@@ -202,21 +188,7 @@ void aes_gcm_pre_192_sse_no_aesni(const void *key,
 
 void aes_gcm_pre_192_avx_gen2(const void *key, struct gcm_key_data *key_data)
 {
-#ifdef SAFE_PARAM
-        /* reset error status */
-        imb_set_errno(NULL, 0);
-
-        if (key == NULL) {
-                imb_set_errno(NULL, IMB_ERR_NULL_KEY);
-                return;
-        }
-        if (key_data == NULL) {
-                imb_set_errno(NULL, IMB_ERR_NULL_EXP_KEY);
-                return;
-        }
-#endif
-        aes_keyexp_192_enc_avx(key, key_data->expanded_keys);
-        aes_gcm_precomp_192_avx_gen2(key_data);
+        aes_gcm_pre_192_sse(key, key_data);
 }
 
 void aes_gcm_pre_192_avx_gen4(const void *key, struct gcm_key_data *key_data)
@@ -319,21 +291,7 @@ void aes_gcm_pre_256_sse_no_aesni(const void *key,
 
 void aes_gcm_pre_256_avx_gen2(const void *key, struct gcm_key_data *key_data)
 {
-#ifdef SAFE_PARAM
-        /* reset error status */
-        imb_set_errno(NULL, 0);
-
-        if (key == NULL) {
-                imb_set_errno(NULL, IMB_ERR_NULL_KEY);
-                return;
-        }
-        if (key_data == NULL) {
-                imb_set_errno(NULL, IMB_ERR_NULL_EXP_KEY);
-                return;
-        }
-#endif
-        aes_keyexp_256_enc_avx(key, key_data->expanded_keys);
-        aes_gcm_precomp_256_avx_gen2(key_data);
+        aes_gcm_pre_256_sse(key, key_data);
 }
 
 void aes_gcm_pre_256_avx_gen4(const void *key, struct gcm_key_data *key_data)
@@ -459,8 +417,8 @@ imb_aes_gmac_init_128_avx_gen2(const struct gcm_key_data *key_data,
                                const uint8_t *iv,
                                const uint64_t iv_len)
 {
-        aes_gcm_init_var_iv_128_avx_gen2(key_data, context_data, iv,
-                                         iv_len, NULL, 0);
+        aes_gcm_init_var_iv_128_sse(key_data, context_data, iv,
+                                    iv_len, NULL, 0);
 }
 
 void
@@ -469,8 +427,8 @@ imb_aes_gmac_init_192_avx_gen2(const struct gcm_key_data *key_data,
                                const uint8_t *iv,
                                const uint64_t iv_len)
 {
-        aes_gcm_init_var_iv_192_avx_gen2(key_data, context_data, iv,
-                                         iv_len, NULL, 0);
+        aes_gcm_init_var_iv_192_sse(key_data, context_data, iv,
+                                    iv_len, NULL, 0);
 }
 
 void
@@ -479,8 +437,8 @@ imb_aes_gmac_init_256_avx_gen2(const struct gcm_key_data *key_data,
                                const uint8_t *iv,
                                const uint64_t iv_len)
 {
-        aes_gcm_init_var_iv_256_avx_gen2(key_data, context_data, iv,
-                                         iv_len, NULL, 0);
+        aes_gcm_init_var_iv_256_sse(key_data, context_data, iv,
+                                    iv_len, NULL, 0);
 }
 
 void
@@ -489,8 +447,8 @@ imb_aes_gmac_finalize_128_avx_gen2(const struct gcm_key_data *key_data,
                                    uint8_t *auth_tag,
                                    const uint64_t  auth_tag_len)
 {
-        aes_gcm_enc_128_finalize_avx_gen2(key_data, context_data, auth_tag,
-                                          auth_tag_len);
+        aes_gcm_enc_128_finalize_sse(key_data, context_data, auth_tag,
+                                     auth_tag_len);
 }
 
 void
@@ -499,8 +457,8 @@ imb_aes_gmac_finalize_192_avx_gen2(const struct gcm_key_data *key_data,
                                    uint8_t *auth_tag,
                                    const uint64_t  auth_tag_len)
 {
-        aes_gcm_enc_192_finalize_avx_gen2(key_data, context_data, auth_tag,
-                                          auth_tag_len);
+        aes_gcm_enc_192_finalize_sse(key_data, context_data, auth_tag,
+                                     auth_tag_len);
 }
 
 void
@@ -509,8 +467,8 @@ imb_aes_gmac_finalize_256_avx_gen2(const struct gcm_key_data *key_data,
                                    uint8_t *auth_tag,
                                    const uint64_t  auth_tag_len)
 {
-        aes_gcm_enc_256_finalize_avx_gen2(key_data, context_data, auth_tag,
-                                          auth_tag_len);
+        aes_gcm_enc_256_finalize_sse(key_data, context_data, auth_tag,
+                                     auth_tag_len);
 }
 
 #ifdef AESNI_EMU
-- 
GitLab


From 8aa2408bc9a287e51d4e231674b3ff57eacbcca2 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 9 May 2023 16:50:14 +0100
Subject: [PATCH 268/332] lib: [ghash] add ghash_pre_avx_gen4() and
 ghash_pre_avx512() functions

---
 lib/avx2_t1/mb_mgr_avx2_t1.c               |  2 +-
 lib/avx2_t2/mb_mgr_avx2_t2.c               |  2 +-
 lib/avx2_t3/mb_mgr_avx2_t3.c               |  2 +-
 lib/avx512_t1/mb_mgr_avx512_t1.c           |  2 +-
 lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc |  2 +-
 lib/avx_t2/mb_mgr_avx_t2.c                 |  2 +-
 lib/include/gcm.h                          |  6 ++
 lib/include/gcm_common_avx2_avx512.inc     | 74 ++++++++++++++++++++++
 lib/libIPSec_MB.def                        |  4 +-
 9 files changed, 89 insertions(+), 7 deletions(-)

diff --git a/lib/avx2_t1/mb_mgr_avx2_t1.c b/lib/avx2_t1/mb_mgr_avx2_t1.c
index db4aa440..4440dafe 100644
--- a/lib/avx2_t1/mb_mgr_avx2_t1.c
+++ b/lib/avx2_t1/mb_mgr_avx2_t1.c
@@ -470,7 +470,7 @@ init_mb_mgr_avx2_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gcm256_pre          = aes_gcm_pre_256_avx_gen4;
 
         state->ghash               = ghash_avx_gen4;
-        state->ghash_pre           = ghash_pre_avx_gen2;
+        state->ghash_pre           = ghash_pre_avx_gen4;
 
         state->gmac128_init        = imb_aes_gmac_init_128_avx_gen4;
         state->gmac192_init        = imb_aes_gmac_init_192_avx_gen4;
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index 3714a7f8..48295e53 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -471,7 +471,7 @@ init_mb_mgr_avx2_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gcm256_pre          = aes_gcm_pre_256_avx_gen4;
 
         state->ghash               = ghash_avx_gen4;
-        state->ghash_pre           = ghash_pre_avx_gen2;
+        state->ghash_pre           = ghash_pre_avx_gen4;
 
         state->gmac128_init        = imb_aes_gmac_init_128_avx_gen4;
         state->gmac192_init        = imb_aes_gmac_init_192_avx_gen4;
diff --git a/lib/avx2_t3/mb_mgr_avx2_t3.c b/lib/avx2_t3/mb_mgr_avx2_t3.c
index b53f252d..fcdc516e 100644
--- a/lib/avx2_t3/mb_mgr_avx2_t3.c
+++ b/lib/avx2_t3/mb_mgr_avx2_t3.c
@@ -474,7 +474,7 @@ init_mb_mgr_avx2_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->gcm256_pre          = aes_gcm_pre_256_avx_gen4;
 
         state->ghash               = ghash_avx_gen4;
-        state->ghash_pre           = ghash_pre_avx_gen2;
+        state->ghash_pre           = ghash_pre_avx_gen4;
 
         state->gmac128_init        = imb_aes_gmac_init_128_avx_gen4;
         state->gmac192_init        = imb_aes_gmac_init_192_avx_gen4;
diff --git a/lib/avx512_t1/mb_mgr_avx512_t1.c b/lib/avx512_t1/mb_mgr_avx512_t1.c
index 0e73cd1d..be937952 100644
--- a/lib/avx512_t1/mb_mgr_avx512_t1.c
+++ b/lib/avx512_t1/mb_mgr_avx512_t1.c
@@ -577,7 +577,7 @@ init_mb_mgr_avx512_t1_internal(IMB_MGR *state, const int reset_mgrs)
         state->gcm256_pre          = aes_gcm_pre_256_avx512;
 
         state->ghash               = ghash_avx512;
-        state->ghash_pre           = ghash_pre_avx_gen2;
+        state->ghash_pre           = ghash_pre_avx512;
 
         state->gmac128_init        = imb_aes_gmac_init_128_avx512;
         state->gmac192_init        = imb_aes_gmac_init_192_avx512;
diff --git a/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc b/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
index 40299db2..81f680ec 100644
--- a/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
+++ b/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
@@ -39,7 +39,7 @@ default rel
 
 %ifdef GCM128_MODE
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;void   ghash_pre_avx512
+;void   ghash_pre_vaes_avx512
 ;       (const void *key, struct gcm_key_data *key_data)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 MKGLOBAL(ghash_pre_vaes_avx512,function,)
diff --git a/lib/avx_t2/mb_mgr_avx_t2.c b/lib/avx_t2/mb_mgr_avx_t2.c
index e9ea5020..1d1f1885 100644
--- a/lib/avx_t2/mb_mgr_avx_t2.c
+++ b/lib/avx_t2/mb_mgr_avx_t2.c
@@ -472,7 +472,7 @@ init_mb_mgr_avx_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->gcm256_pre          = aes_gcm_pre_256_avx_gen4;
 
         state->ghash               = ghash_avx_gen4;
-        state->ghash_pre           = ghash_pre_avx_gen2;
+        state->ghash_pre           = ghash_pre_avx_gen4;
 
         state->gmac128_init        = imb_aes_gmac_init_128_avx_gen4;
         state->gmac192_init        = imb_aes_gmac_init_192_avx_gen4;
diff --git a/lib/include/gcm.h b/lib/include/gcm.h
index f13de26e..124d3345 100644
--- a/lib/include/gcm.h
+++ b/lib/include/gcm.h
@@ -638,6 +638,12 @@ ghash_pre_sse(const void *key, struct gcm_key_data *key_data);
 IMB_DLL_EXPORT void
 ghash_pre_avx_gen2(const void *key, struct gcm_key_data *key_data);
 
+IMB_DLL_EXPORT void
+ghash_pre_avx_gen4(const void *key, struct gcm_key_data *key_data);
+
+IMB_DLL_EXPORT void
+ghash_pre_avx512(const void *key, struct gcm_key_data *key_data);
+
 IMB_DLL_EXPORT void
 ghash_pre_vaes_avx512(const void *key, struct gcm_key_data *key_data);
 
diff --git a/lib/include/gcm_common_avx2_avx512.inc b/lib/include/gcm_common_avx2_avx512.inc
index 841480df..4d6d06c4 100644
--- a/lib/include/gcm_common_avx2_avx512.inc
+++ b/lib/include/gcm_common_avx2_avx512.inc
@@ -4185,6 +4185,80 @@ skip_iv_len_12_dec_IV:
 	ret
 
 %ifdef GCM128_MODE
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;void   ghash_pre_avx_gen4 / ghash_pre_avx512
+;       (const void *key, struct gcm_key_data *key_data)
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+MKGLOBAL(GHASH_FN_NAME(ghash_pre),function,)
+GHASH_FN_NAME(ghash_pre):
+        endbranch64
+;; Parameter is passed through register
+%ifdef SAFE_PARAM
+        ;; Reset imb_errno
+        IMB_ERR_CHECK_RESET
+
+        ;; Check key != NULL
+        cmp     arg1, 0
+        jz      error_ghash_pre
+
+        ;; Check key_data != NULL
+        cmp     arg2, 0
+        jz      error_ghash_pre
+%endif
+
+%ifidn __OUTPUT_FORMAT__, win64
+        sub     rsp, 1*16
+
+        ; only xmm6 needs to be maintained
+        vmovdqu [rsp + 0*16], xmm6
+%endif
+        vmovdqu  xmm6, [arg1]
+        vpshufb  xmm6, [rel SHUF_MASK]
+        ;;;;;;;;;;;;;;;  PRECOMPUTATION of HashKey<<1 mod poly from the HashKey;;;;;;;;;;;;;;;
+        vmovdqa  xmm2, xmm6
+        vpsllq   xmm6, xmm6, 1
+        vpsrlq   xmm2, xmm2, 63
+        vmovdqa  xmm1, xmm2
+        vpslldq  xmm2, xmm2, 8
+        vpsrldq  xmm1, xmm1, 8
+        vpor     xmm6, xmm6, xmm2
+        ;reduction
+        vpshufd  xmm2, xmm1, 00100100b
+        vpcmpeqd xmm2, [rel TWOONE]
+        vpand    xmm2, xmm2, [rel POLY]
+        vpxor    xmm6, xmm6, xmm2                       ; xmm6 holds the HashKey<<1 mod poly
+        ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+        vmovdqu  [arg2 + HashKey], xmm6                 ; store HashKey<<1 mod poly
+
+        PRECOMPUTE arg2, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5
+
+%ifdef SAFE_DATA
+        clear_scratch_gps_asm
+        clear_scratch_xmms_avx_asm
+%endif
+%ifidn __OUTPUT_FORMAT__, win64
+        vmovdqu xmm6, [rsp + 0*16]
+        add     rsp, 1*16
+%endif
+exit_ghash_pre:
+        ret
+
+%ifdef SAFE_PARAM
+error_ghash_pre:
+        ;; Clear reg and imb_errno
+        IMB_ERR_CHECK_START rax
+
+        ;; Check key != NULL
+        IMB_ERR_CHECK_NULL arg1, rax, IMB_ERR_NULL_KEY
+
+        ;; Check key_data != NULL
+        IMB_ERR_CHECK_NULL arg2, rax, IMB_ERR_NULL_EXP_KEY
+
+        ;; Set imb_errno
+        IMB_ERR_CHECK_END rax
+        jmp     exit_ghash_pre
+%endif
+
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;void   ghash_avx_gen4 / ghash_avx512 (
 ;        const struct gcm_key_data *key_data,
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index b4b34b1f..6e6bb735 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -1,4 +1,4 @@
-; Copyright (c) 2017-2022, Intel Corporation
+; Copyright (c) 2017-2023, Intel Corporation
 ; 
 ; Redistribution and use in source and binary forms, with or without
 ; modification, are permitted provided that the following conditions are met:
@@ -702,3 +702,5 @@ EXPORTS
     imb_quic_hp_aes_ecb				@676
     imb_hmac_ipad_opad                          @677
     imb_set_session                             @678
+    ghash_pre_avx_gen4                          @679
+    ghash_pre_avx512                            @680
-- 
GitLab


From 1ce2eba6f492a3503ac377f208a58c6b95f99f2f Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 9 May 2023 16:57:24 +0100
Subject: [PATCH 269/332] doc: [aes-gcm/ghash] README and release notes update

---
 README.md        | 14 +++++++-------
 ReleaseNotes.txt |  3 +++
 2 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/README.md b/README.md
index 228d40d5..a54b4186 100644
--- a/README.md
+++ b/README.md
@@ -65,9 +65,9 @@ Table 1. List of supported cipher algorithms and their implementations.
 | Encryption     +-----------------------------------------------------|
 |                | x86_64 | SSE    | AVX    | AVX2   | AVX512 | VAES(5)|
 |----------------+--------+--------+--------+--------+--------+--------|
-| AES128-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
-| AES192-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
-| AES256-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
+| AES128-GCM     | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |
+| AES192-GCM     | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |
+| AES256-GCM     | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |
 | AES128-CCM     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |
 | AES256-CCM     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |
 | AES128-CBC     | N      | Y(1)   | Y(3)   | N      | N      | Y(6)   |
@@ -138,9 +138,9 @@ Table 2. List of supported integrity algorithms and their implementations.
 | SHA2-256          | N      | Y(2)x4 | Y   x4 | Y   x8 | Y  x16 | N      |
 | SHA2-384          | N      | Y   x2 | Y   x2 | Y   x4 | Y   x8 | N      |
 | SHA2-512          | N      | Y   x2 | Y   x2 | Y   x4 | Y   x8 | N      |
-| AES128-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
-| AES192-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
-| AES256-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
+| AES128-GMAC       | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |
+| AES192-GMAC       | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |
+| AES256-GMAC       | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |
 | NULL              | Y      | N      | N      | N      | N      | N      |
 | AES128-CCM        | N      | Y(5)x4 | Y   x8 | N      | N      | Y x16  |
 | AES256-CCM        | N      | Y(5)x4 | Y   x8 | N      | N      | Y x16  |
@@ -155,7 +155,7 @@ Table 2. List of supported integrity algorithms and their implementations.
 | POLY1305          | Y      | N      | N      | Y(9)   | Y      | Y      |
 | POLY1305 AEAD     | Y      | N      | N      | Y(9)   | Y      | Y      |
 | SNOW-V AEAD       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
-| GHASH             | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |
+| GHASH             | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |
 | CRC(6)            | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |
 | PON-CRC-BIP(7)    | N      | Y      | Y      | N      | N      | Y      |
 +-------------------------------------------------------------------------+
diff --git a/ReleaseNotes.txt b/ReleaseNotes.txt
index 95593301..380b647d 100644
--- a/ReleaseNotes.txt
+++ b/ReleaseNotes.txt
@@ -9,6 +9,9 @@ General
 
 Library
 - POLY1305 AVX2 with AVX-IFMA instructions added.
+- Optimized GHASH component in AVX512 VAES (type2) AES-GCM implementation.
+- Implemented a workaround for false load-block condition in SSE and AVX2 AES-GCM implementations.
+- Removed AVX AES-GCM implementation, its API symbols map to the SSE implementation.
 
 v1.3 September 2022
 ========================================================================
-- 
GitLab


From 4be9778d197a2224def6e87bfa6af3b0408ff13a Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 16 May 2023 14:35:40 +0100
Subject: [PATCH 270/332] lib: [self-test] add AES-ECB tests

---
 README.md              |  4 ++
 lib/x86_64/self_test.c | 89 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 93 insertions(+)

diff --git a/README.md b/README.md
index a54b4186..957edebe 100644
--- a/README.md
+++ b/README.md
@@ -786,6 +786,9 @@ ACVP test application located in `test` directory is to support CAVP process. It
 |                     |           | Direction: encrypt and decrypt                           |
 |                     |           | payloadLen: [min = 8, max = 128, increment = 8]          |
 |---------------------+-----------+----------------------------------------------------------|
+| AES-ECB             | SP800-38A | Key size: 128, 192, 256                                  |
+|                     |           | Direction: encrypt and decrypt                           |
+|---------------------+-----------+----------------------------------------------------------|
 | SHA1 (SHA-1)        | FIPS180-4 | messageLength: [min = 0, max = 65528, increment = 8]     |
 |---------------------+-----------+----------------------------------------------------------|
 | SHA224 (SHA2-224)   | FIPS180-4 | messageLength: [min = 0, max = 65528, increment = 8]     |
@@ -840,6 +843,7 @@ The self-test consists of Cryptographic algorithm test (known answer test) on fo
 - AES-CCM  
 - AES-CBC  
 - AES-CTR  
+- AES-ECB  
 - AES-CMAC  
 - SHA1  
 - SHA224  
diff --git a/lib/x86_64/self_test.c b/lib/x86_64/self_test.c
index 490fed36..2c4aa146 100644
--- a/lib/x86_64/self_test.c
+++ b/lib/x86_64/self_test.c
@@ -232,6 +232,89 @@ static const uint8_t aes_ctr_256_cipher_text[] = {
         0x56, 0x08, 0x63, 0xDC, 0x71, 0xE3, 0xE0, 0xC0,
 };
 
+/*
+ * AES-ECB test vectors
+ */
+
+static const uint8_t aes_ecb_128_key[] = {
+        0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6,
+        0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c
+};
+static const uint8_t aes_ecb_128_plain_text[] = {
+        0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
+        0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
+        0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
+        0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
+        0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
+        0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef,
+        0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
+        0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10
+};
+static const uint8_t aes_ecb_128_cipher_text[] = {
+        0x3a, 0xd7, 0x7b, 0xb4, 0x0d, 0x7a, 0x36, 0x60,
+        0xa8, 0x9e, 0xca, 0xf3, 0x24, 0x66, 0xef, 0x97,
+        0xf5, 0xd3, 0xd5, 0x85, 0x03, 0xb9, 0x69, 0x9d,
+        0xe7, 0x85, 0x89, 0x5a, 0x96, 0xfd, 0xba, 0xaf,
+        0x43, 0xb1, 0xcd, 0x7f, 0x59, 0x8e, 0xce, 0x23,
+        0x88, 0x1b, 0x00, 0xe3, 0xed, 0x03, 0x06, 0x88,
+        0x7b, 0x0c, 0x78, 0x5e, 0x27, 0xe8, 0xad, 0x3f,
+        0x82, 0x23, 0x20, 0x71, 0x04, 0x72, 0x5d, 0xd4
+};
+
+static const uint8_t aes_ecb_192_key[] = {
+        0x8e, 0x73, 0xb0, 0xf7, 0xda, 0x0e, 0x64, 0x52,
+        0xc8, 0x10, 0xf3, 0x2b, 0x80, 0x90, 0x79, 0xe5,
+        0x62, 0xf8, 0xea, 0xd2, 0x52, 0x2c, 0x6b, 0x7b
+};
+static const uint8_t aes_ecb_192_plain_text[] = {
+        0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
+        0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
+        0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
+        0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
+        0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
+        0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef,
+        0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
+        0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10
+};
+static const uint8_t aes_ecb_192_cipher_text[] = {
+        0xbd, 0x33, 0x4f, 0x1d, 0x6e, 0x45, 0xf2, 0x5f,
+        0xf7, 0x12, 0xa2, 0x14, 0x57, 0x1f, 0xa5, 0xcc,
+        0x97, 0x41, 0x04, 0x84, 0x6d, 0x0a, 0xd3, 0xad,
+        0x77, 0x34, 0xec, 0xb3, 0xec, 0xee, 0x4e, 0xef,
+        0xef, 0x7a, 0xfd, 0x22, 0x70, 0xe2, 0xe6, 0x0a,
+        0xdc, 0xe0, 0xba, 0x2f, 0xac, 0xe6, 0x44, 0x4e,
+        0x9a, 0x4b, 0x41, 0xba, 0x73, 0x8d, 0x6c, 0x72,
+        0xfb, 0x16, 0x69, 0x16, 0x03, 0xc1, 0x8e, 0x0e
+};
+
+static const uint8_t aes_ecb_256_key[] = {
+        0x60, 0x3d, 0xeb, 0x10, 0x15, 0xca, 0x71, 0xbe,
+        0x2b, 0x73, 0xae, 0xf0, 0x85, 0x7d, 0x77, 0x81,
+        0x1f, 0x35, 0x2c, 0x07, 0x3b, 0x61, 0x08, 0xd7,
+        0x2d, 0x98, 0x10, 0xa3, 0x09, 0x14, 0xdf, 0xf4
+};
+static const uint8_t aes_ecb_256_plain_text[] = {
+        0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
+        0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
+        0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
+        0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
+        0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
+        0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef,
+        0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
+        0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10
+};
+static const uint8_t aes_ecb_256_cipher_text[] = {
+        0xf3, 0xee, 0xd1, 0xbd, 0xb5, 0xd2, 0xa0, 0x3c,
+        0x06, 0x4b, 0x5a, 0x7e, 0x3d, 0xb1, 0x81, 0xf8,
+        0x59, 0x1c, 0xcb, 0x10, 0xd4, 0x10, 0xed, 0x26,
+        0xdc, 0x5b, 0xa7, 0x4a, 0x31, 0x36, 0x28, 0x70,
+        0xb6, 0xed, 0x21, 0xb9, 0x9c, 0xa6, 0xf4, 0xf9,
+        0xf1, 0x53, 0xe7, 0xb1, 0xbe, 0xaf, 0xed, 0x1d,
+        0x23, 0x30, 0x4b, 0x7a, 0x39, 0xf9, 0xf3, 0xff,
+        0x06, 0x7d, 0x8d, 0x8f, 0x9e, 0x24, 0xec, 0xc7
+};
+static const uint8_t null_iv[] = { 0x00 };
+
 
 #define ADD_CIPHER_VECTOR(_cmode,_key,_iv,_plain,_cipher) \
         {_cmode, _key, sizeof(_key), _iv, sizeof(_iv), \
@@ -250,6 +333,12 @@ struct self_test_cipher_vector cipher_vectors[] = {
                           aes_ctr_192_plain_text, aes_ctr_192_cipher_text),
         ADD_CIPHER_VECTOR(IMB_CIPHER_CNTR, aes_ctr_256_key, aes_ctr_256_iv,
                           aes_ctr_256_plain_text, aes_ctr_256_cipher_text),
+        ADD_CIPHER_VECTOR(IMB_CIPHER_ECB, aes_ecb_128_key, null_iv,
+                          aes_ecb_128_plain_text, aes_ecb_128_cipher_text),
+        ADD_CIPHER_VECTOR(IMB_CIPHER_ECB, aes_ecb_192_key, null_iv,
+                          aes_ecb_192_plain_text, aes_ecb_192_cipher_text),
+        ADD_CIPHER_VECTOR(IMB_CIPHER_ECB, aes_ecb_256_key, null_iv,
+                          aes_ecb_256_plain_text, aes_ecb_256_cipher_text),
 };
 
 static int self_test_ciphers(IMB_MGR *p_mgr)
-- 
GitLab


From 5eb869bdf6167880747583d06783f76088c9c41c Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 16 May 2023 15:15:38 +0100
Subject: [PATCH 271/332] lib: [self-test] add TDES-EDE-CBC test

---
 README.md              |   4 ++
 lib/x86_64/self_test.c | 121 +++++++++++++++++++++++++++++++----------
 2 files changed, 97 insertions(+), 28 deletions(-)

diff --git a/README.md b/README.md
index 957edebe..79a1ba1f 100644
--- a/README.md
+++ b/README.md
@@ -789,6 +789,9 @@ ACVP test application located in `test` directory is to support CAVP process. It
 | AES-ECB             | SP800-38A | Key size: 128, 192, 256                                  |
 |                     |           | Direction: encrypt and decrypt                           |
 |---------------------+-----------+----------------------------------------------------------|
+| TDES-EDE-CBC        | SP800-38A | Key size: 192                                            |
+|                     |           | Direction: encrypt and decrypt                           |
+|---------------------+-----------+----------------------------------------------------------|
 | SHA1 (SHA-1)        | FIPS180-4 | messageLength: [min = 0, max = 65528, increment = 8]     |
 |---------------------+-----------+----------------------------------------------------------|
 | SHA224 (SHA2-224)   | FIPS180-4 | messageLength: [min = 0, max = 65528, increment = 8]     |
@@ -844,6 +847,7 @@ The self-test consists of Cryptographic algorithm test (known answer test) on fo
 - AES-CBC  
 - AES-CTR  
 - AES-ECB  
+- TDES-EDE-CBC  
 - AES-CMAC  
 - SHA1  
 - SHA224  
diff --git a/lib/x86_64/self_test.c b/lib/x86_64/self_test.c
index 2c4aa146..3d00889d 100644
--- a/lib/x86_64/self_test.c
+++ b/lib/x86_64/self_test.c
@@ -315,6 +315,28 @@ static const uint8_t aes_ecb_256_cipher_text[] = {
 };
 static const uint8_t null_iv[] = { 0x00 };
 
+/*
+ * Triple DES test vector TDES_EDE_CBC
+ */
+static const uint8_t tdes_ede_cbc_key[] = {
+        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
+        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17
+};
+
+static const uint8_t tdes_ede_cbc_iv[] = {
+        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
+};
+
+static const uint8_t tdes_ede_cbc_plain_text[] = {
+        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
+        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
+};
+
+static const uint8_t tdes_ede_cbc_cipher_text[] = {
+        0x89, 0x4b, 0xc3, 0x08, 0x54, 0x26, 0xa4, 0x41,
+        0xf2, 0x7f, 0x73, 0xae, 0x26, 0xab, 0xbf, 0x74
+};
 
 #define ADD_CIPHER_VECTOR(_cmode,_key,_iv,_plain,_cipher) \
         {_cmode, _key, sizeof(_key), _iv, sizeof(_iv), \
@@ -339,13 +361,27 @@ struct self_test_cipher_vector cipher_vectors[] = {
                           aes_ecb_192_plain_text, aes_ecb_192_cipher_text),
         ADD_CIPHER_VECTOR(IMB_CIPHER_ECB, aes_ecb_256_key, null_iv,
                           aes_ecb_256_plain_text, aes_ecb_256_cipher_text),
+        ADD_CIPHER_VECTOR(IMB_CIPHER_DES3, tdes_ede_cbc_key, tdes_ede_cbc_iv,
+                          tdes_ede_cbc_plain_text, tdes_ede_cbc_cipher_text),
 };
 
+#define DES_KEY_SCHED_WORDS (IMB_DES_KEY_SCHED_SIZE / sizeof(uint64_t))
+
 static int self_test_ciphers(IMB_MGR *p_mgr)
 {
+        union {
+                struct {
+                        DECLARE_ALIGNED(uint32_t expkey_enc[4*15], 16);
+                        DECLARE_ALIGNED(uint32_t expkey_dec[4*15], 16);
+                } aes;
+                struct {
+                        uint64_t key_sched1[DES_KEY_SCHED_WORDS];
+                        uint64_t key_sched2[DES_KEY_SCHED_WORDS];
+                        uint64_t key_sched3[DES_KEY_SCHED_WORDS];
+                        void *keys[3];
+                } tdes;
+        } ks;
         uint8_t scratch[256];
-        DECLARE_ALIGNED(uint32_t expkey_enc[4*15], 16);
-        DECLARE_ALIGNED(uint32_t expkey_dec[4*15], 16);
         unsigned i;
 
         while (IMB_FLUSH_JOB(p_mgr) != NULL)
@@ -360,22 +396,39 @@ static int self_test_ciphers(IMB_MGR *p_mgr)
                 if (v->plain_text_size > sizeof(scratch))
                         return 0;
 
-                switch (v->cipher_key_size) {
-                case IMB_KEY_128_BYTES:
-                        IMB_AES_KEYEXP_128(p_mgr, v->cipher_key,
-                                           expkey_enc, expkey_dec);
-                        break;
-                case IMB_KEY_192_BYTES:
-                        IMB_AES_KEYEXP_192(p_mgr, v->cipher_key,
-                                           expkey_enc, expkey_dec);
-                        break;
-                case IMB_KEY_256_BYTES:
-                        IMB_AES_KEYEXP_256(p_mgr, v->cipher_key,
-                                           expkey_enc, expkey_dec);
-                        break;
-                default:
-                        /* invalid key size */
-                        return 0;
+                if (v->cipher_mode == IMB_CIPHER_DES3) {
+                        if (v->cipher_key_size != IMB_KEY_192_BYTES) {
+                                /* invalid key size */
+                                return 0;
+                        }
+                        des_key_schedule(ks.tdes.key_sched1, &v->cipher_key[0]);
+                        des_key_schedule(ks.tdes.key_sched2, &v->cipher_key[8]);
+                        des_key_schedule(ks.tdes.key_sched3,
+                                         &v->cipher_key[16]);
+                        ks.tdes.keys[0] = ks.tdes.key_sched1;
+                        ks.tdes.keys[1] = ks.tdes.key_sched2;
+                        ks.tdes.keys[2] = ks.tdes.key_sched3;
+                } else {
+                        switch (v->cipher_key_size) {
+                        case IMB_KEY_128_BYTES:
+                                IMB_AES_KEYEXP_128(p_mgr, v->cipher_key,
+                                                   ks.aes.expkey_enc,
+                                                   ks.aes.expkey_dec);
+                                break;
+                        case IMB_KEY_192_BYTES:
+                                IMB_AES_KEYEXP_192(p_mgr, v->cipher_key,
+                                                   ks.aes.expkey_enc,
+                                                   ks.aes.expkey_dec);
+                                break;
+                        case IMB_KEY_256_BYTES:
+                                IMB_AES_KEYEXP_256(p_mgr, v->cipher_key,
+                                                   ks.aes.expkey_enc,
+                                                   ks.aes.expkey_dec);
+                                break;
+                        default:
+                                /* invalid key size */
+                                return 0;
+                        }
                 }
 
                 /* test encrypt direction */
@@ -387,12 +440,18 @@ static int self_test_ciphers(IMB_MGR *p_mgr)
                 job->src = v->plain_text;
                 job->dst = scratch;
                 job->cipher_mode = v->cipher_mode;
-                job->enc_keys = expkey_enc;
-                if (v->cipher_mode != IMB_CIPHER_CNTR)
-                        job->dec_keys = expkey_dec;
+                if (v->cipher_mode == IMB_CIPHER_DES3) {
+                        job->enc_keys = ks.tdes.keys;
+                } else {
+                        job->enc_keys = ks.aes.expkey_enc;
+                        if (v->cipher_mode != IMB_CIPHER_CNTR)
+                                job->dec_keys = ks.aes.expkey_dec;
+                }
                 job->key_len_in_bytes = v->cipher_key_size;
-                job->iv = v->cipher_iv;
-                job->iv_len_in_bytes = v->cipher_iv_size;
+                if (v->cipher_mode != IMB_CIPHER_ECB) {
+                        job->iv = v->cipher_iv;
+                        job->iv_len_in_bytes = v->cipher_iv_size;
+                }
                 job->cipher_start_src_offset_in_bytes = 0;
                 job->msg_len_to_cipher_in_bytes = v->plain_text_size;
 
@@ -415,12 +474,18 @@ static int self_test_ciphers(IMB_MGR *p_mgr)
                 job->src = v->cipher_text;
                 job->dst = scratch;
                 job->cipher_mode = v->cipher_mode;
-                job->dec_keys = expkey_dec;
-                if (v->cipher_mode == IMB_CIPHER_CNTR)
-                        job->enc_keys = expkey_enc;
+                if (v->cipher_mode == IMB_CIPHER_DES3) {
+                        job->dec_keys = ks.tdes.keys;
+                } else {
+                        job->dec_keys = ks.aes.expkey_dec;
+                        if (v->cipher_mode == IMB_CIPHER_CNTR)
+                                job->enc_keys = ks.aes.expkey_enc;
+                }
                 job->key_len_in_bytes = v->cipher_key_size;
-                job->iv = v->cipher_iv;
-                job->iv_len_in_bytes = v->cipher_iv_size;
+                if (v->cipher_mode != IMB_CIPHER_ECB) {
+                        job->iv = v->cipher_iv;
+                        job->iv_len_in_bytes = v->cipher_iv_size;
+                }
                 job->cipher_start_src_offset_in_bytes = 0;
                 job->msg_len_to_cipher_in_bytes = v->plain_text_size;
 
-- 
GitLab


From fd614e5f5a9d62d8472a2568afaf662bac68baab Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 18 May 2023 14:58:12 +0100
Subject: [PATCH 272/332] cmake: add cppcheck, bughunt and spellcheck targets

- cmake: add cppcheck and bughunt targets
- cmake: add spellcheck target
---
 CMakeLists.txt    |  6 ++++
 cmake/utils.cmake | 90 ++++++++++++++++++++++++++++++++++++++++++++---
 2 files changed, 92 insertions(+), 4 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 4186af05..e6f28399 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -70,3 +70,9 @@ imb_add_target_style_check()
 
 # TAGS target
 imb_add_target_tags()
+
+# cppcheck and bughunt targets
+imb_add_target_cppcheck_bughunt()
+
+# spellcheck target
+imb_add_target_spellcheck()
diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index 3ed35370..cfe48ad5 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -101,8 +101,8 @@ macro(imb_add_target_style_check)
 endmacro()
 
 # add TAGS target
-if(NOT WINDOWS)
-  macro(imb_add_target_tags)
+macro(imb_add_target_tags)
+  if(NOT WINDOWS)
     add_custom_target(
       TAGS
       COMMAND ${CMAKE_COMMAND} -E echo "Building Tags table"
@@ -112,5 +112,87 @@ if(NOT WINDOWS)
       WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
       VERBATIM
       )
-  endmacro()
-endif()
+  endif()
+endmacro()
+
+# add cppcheck targets
+macro(imb_add_target_cppcheck_bughunt)
+  if(NOT WINDOWS)
+    # set cppcheck binary name
+    if(NOT CPPCHECK_BIN)
+      set(CPPCHECK_BIN cppcheck)
+    endif()
+
+    find_program(CPPCHECK NAMES ${CPPCHECK_BIN})
+
+    # add targets if cppcheck available
+    if(CPPCHECK)
+      # output compilation database
+      set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
+      execute_process(
+        COMMAND bash -c "getconf _NPROCESSORS_ONLN"
+        OUTPUT_VARIABLE nprocs
+        OUTPUT_STRIP_TRAILING_WHITESPACE)
+
+      # set flags
+      set(CPPCHECK_FLAGS "-j ${nprocs}")
+      set(CPPCHECK_FLAGS1 "--cppcheck-build-dir=.cppcheck ${CPPCHECK_FLAGS}")
+      set(CPPCHECK_FLAGS2 "--cppcheck-build-dir=.bughunt ${CPPCHECK_FLAGS}")
+
+      # add cppcheck target
+      add_custom_target(
+        cppcheck
+        COMMAND ${CMAKE_COMMAND} -E echo "Running cppcheck:"
+        COMMAND bash -c "mkdir -p .cppcheck"
+        COMMAND
+        bash -c
+        "${CPPCHECK} --force --enable=all ${CPPCHECK_FLAGS1} --project=./compile_commands.json"
+        WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
+        VERBATIM)
+
+      # add bughunt target
+      add_custom_target(
+        bughunt
+        COMMAND ${CMAKE_COMMAND} -E echo "Running cppcheck bughunt:"
+        COMMAND bash -c "mkdir -p .bughunt"
+        COMMAND
+        bash -c
+        "${CPPCHECK} --bug-hunting --inconclusive ${CPPCHECK_FLAGS2} --project=./compile_commands.json"
+        WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR}
+        VERBATIM)
+    endif(CPPCHECK)
+  endif(NOT WINDOWS)
+endmacro()
+
+# add spellcheck target
+#
+# Check spelling in the code with codespell. See
+# https://github.com/codespell-project/codespell for more details. Codespell
+# options explained: -d        -- disable colours (emacs colours it anyway) -L
+# -- List of words to be ignored -S <skip> -- skip file types -I FILE   -- File
+# containing words to be ignored
+macro(imb_add_target_spellcheck)
+  # set cppcheck binary name
+  if(NOT CODESPELL_BIN)
+    set(CODESPELL_BIN codespell)
+  endif()
+
+  find_program(CODESPELL NAMES ${CODESPELL_BIN})
+
+  # ignore some needed words
+  set(CS_IGNORE_WORDS "iinclude,struc,fo,ue,od,ba,padd")
+
+  if(CODESPELL)
+    add_custom_target(
+      spellcheck
+      COMMAND ${CMAKE_COMMAND} -E echo "Running spellcheck:"
+      COMMAND
+        bash -c "${CODESPELL} -d -L ${CS_IGNORE_WORDS} \
+	      -S '*.obj,*.o,*.a,*.so,*.lib,*~,*.so,*.so.*,*.d,imb-perf' \
+	      -S 'imb-kat,imb-xvalid' \
+	      ./lib ./perf ./test README.md SECURITY.md CONTRIBUTING \
+	      Makefile win_x64.mak ReleaseNotes.txt LICENSE ${CS_EXTRA_OPTS}"
+      WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}
+      VERBATIM)
+  endif()
+endmacro()
-- 
GitLab


From 09e5e26587def9f3674a090c7a5f7d89c0e23719 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Thu, 18 May 2023 16:35:56 +0100
Subject: [PATCH 273/332] build: [github-actions] update workflows for the new
 nodes

More details can be found here
https://github.blog/changelog/2022-09-22-github-actions-all-actions-will-begin-running-on-node16-instead-of-node12/
---
 .github/workflows/linux_build_shared_clang.yml           | 2 +-
 .github/workflows/linux_build_shared_clang_aesni_emu.yml | 2 +-
 .github/workflows/linux_build_shared_gcc.yml             | 2 +-
 .github/workflows/linux_build_static_clang.yml           | 2 +-
 .github/workflows/linux_build_static_gcc.yml             | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/.github/workflows/linux_build_shared_clang.yml b/.github/workflows/linux_build_shared_clang.yml
index 3c474e07..8e2bfcc6 100644
--- a/.github/workflows/linux_build_shared_clang.yml
+++ b/.github/workflows/linux_build_shared_clang.yml
@@ -13,7 +13,7 @@ jobs:
 
     steps:
     - run: sudo apt-get install -y nasm clang
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
       with:
         repository: intel/intel-ipsec-mb
     - name: make
diff --git a/.github/workflows/linux_build_shared_clang_aesni_emu.yml b/.github/workflows/linux_build_shared_clang_aesni_emu.yml
index 2454c76a..2473b1f3 100644
--- a/.github/workflows/linux_build_shared_clang_aesni_emu.yml
+++ b/.github/workflows/linux_build_shared_clang_aesni_emu.yml
@@ -13,7 +13,7 @@ jobs:
 
     steps:
     - run: sudo apt install -y nasm clang
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
       with:
         repository: intel/intel-ipsec-mb
     - name: make aesni
diff --git a/.github/workflows/linux_build_shared_gcc.yml b/.github/workflows/linux_build_shared_gcc.yml
index 0610ce64..d051c69e 100644
--- a/.github/workflows/linux_build_shared_gcc.yml
+++ b/.github/workflows/linux_build_shared_gcc.yml
@@ -13,7 +13,7 @@ jobs:
 
     steps:
     - run: sudo apt-get install -y nasm
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
       with:
         repository: intel/intel-ipsec-mb
     - name: make
diff --git a/.github/workflows/linux_build_static_clang.yml b/.github/workflows/linux_build_static_clang.yml
index 68e1b204..35f58ea9 100644
--- a/.github/workflows/linux_build_static_clang.yml
+++ b/.github/workflows/linux_build_static_clang.yml
@@ -13,7 +13,7 @@ jobs:
 
     steps:
     - run: sudo apt-get install -y nasm clang
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
       with:
         repository: intel/intel-ipsec-mb
     - name: make static
diff --git a/.github/workflows/linux_build_static_gcc.yml b/.github/workflows/linux_build_static_gcc.yml
index 20af6751..d49a06e4 100644
--- a/.github/workflows/linux_build_static_gcc.yml
+++ b/.github/workflows/linux_build_static_gcc.yml
@@ -13,7 +13,7 @@ jobs:
 
     steps:
     - run: sudo apt-get install -y nasm
-    - uses: actions/checkout@v2
+    - uses: actions/checkout@v3
       with:
         repository: intel/intel-ipsec-mb
     - name: make static
-- 
GitLab


From 970d83bda51d3111af320b4503186f418bb08909 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Fri, 19 May 2023 10:51:03 +0100
Subject: [PATCH 274/332] lib: [noaesni] fix double AVX aes-gcm symbols in
 AESNI emulation build

---
 lib/sse_t1/gcm_api_sse.inc      | 10 ++++++++++
 lib/sse_t1/gcm_gmac_api_sse.inc |  2 ++
 lib/sse_t1/gcm_sgl_api_sse.inc  | 12 ++++++++++++
 lib/sse_t1/gcm_sse.inc          |  6 ++++++
 4 files changed, 30 insertions(+)

diff --git a/lib/sse_t1/gcm_api_sse.inc b/lib/sse_t1/gcm_api_sse.inc
index 2ce4a84f..a4be240d 100644
--- a/lib/sse_t1/gcm_api_sse.inc
+++ b/lib/sse_t1/gcm_api_sse.inc
@@ -43,8 +43,10 @@ default rel
 ;        (struct gcm_key_data *key_data);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(precomp,_),function,)
 FN_NAME_AVX(precomp,_):
+%endif
 MKGLOBAL(FN_NAME(precomp,_),function,)
 FN_NAME(precomp,_):
         endbranch64
@@ -126,8 +128,10 @@ error_precomp:
 ;        u64     auth_tag_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(enc,_),function,)
 FN_NAME_AVX(enc,_):
+%endif
 MKGLOBAL(FN_NAME(enc,_),function,)
 FN_NAME(enc,_):
         endbranch64
@@ -264,8 +268,10 @@ skip_aad_check_error_enc:
 ;        u64     auth_tag_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(dec,_),function,)
 FN_NAME_AVX(dec,_):
+%endif
 MKGLOBAL(FN_NAME(dec,_),function,)
 FN_NAME(dec,_):
         endbranch64
@@ -398,8 +404,10 @@ skip_aad_check_error_dec:
 ;       aes_gcm_enc_var_iv_256_sse(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(enc_var_iv,_),function,internal)
 FN_NAME_AVX(enc_var_iv,_):
+%endif
 MKGLOBAL(FN_NAME(enc_var_iv,_),function,internal)
 FN_NAME(enc_var_iv,_):
         endbranch64
@@ -448,8 +456,10 @@ skip_iv_len_12_enc_IV:
 ;       aes_gcm_dec_var_iv_256_sse(IMB_MGR *state, IMB_JOB *job)
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(dec_var_iv,_),function,internal)
 FN_NAME_AVX(dec_var_iv,_):
+%endif
 MKGLOBAL(FN_NAME(dec_var_iv,_),function,internal)
 FN_NAME(dec_var_iv,_):
         endbranch64
diff --git a/lib/sse_t1/gcm_gmac_api_sse.inc b/lib/sse_t1/gcm_gmac_api_sse.inc
index 9f3a4445..83340f28 100644
--- a/lib/sse_t1/gcm_gmac_api_sse.inc
+++ b/lib/sse_t1/gcm_gmac_api_sse.inc
@@ -216,8 +216,10 @@ error_ghash:
 ;        const   u64 msg_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(GMAC_FN_NAME_AVX(update),function,)
 GMAC_FN_NAME_AVX(update):
+%endif
 MKGLOBAL(GMAC_FN_NAME(update),function,)
 GMAC_FN_NAME(update):
         endbranch64
diff --git a/lib/sse_t1/gcm_sgl_api_sse.inc b/lib/sse_t1/gcm_sgl_api_sse.inc
index 86dee278..b4d5e8d5 100644
--- a/lib/sse_t1/gcm_sgl_api_sse.inc
+++ b/lib/sse_t1/gcm_sgl_api_sse.inc
@@ -44,8 +44,10 @@ default rel
 ;        u64     aad_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(init,_),function,)
 FN_NAME_AVX(init,_):
+%endif
 MKGLOBAL(FN_NAME(init,_),function,)
 FN_NAME(init,_):
         endbranch64
@@ -143,8 +145,10 @@ skip_aad_check_error_init:
 ;        const u64 aad_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(init_var_iv,_),function,)
 FN_NAME_AVX(init_var_iv,_):
+%endif
 MKGLOBAL(FN_NAME(init_var_iv,_),function,)
 FN_NAME(init_var_iv,_):
         endbranch64
@@ -256,8 +260,10 @@ skip_aad_check_error_init_IV:
 ;        u64     msg_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(enc,_update_),function,)
 FN_NAME_AVX(enc,_update_):
+%endif
 MKGLOBAL(FN_NAME(enc,_update_),function,)
 FN_NAME(enc,_update_):
         endbranch64
@@ -340,8 +346,10 @@ skip_in_out_check_error_update_enc:
 ;        u64     msg_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(dec,_update_),function,)
 FN_NAME_AVX(dec,_update_):
+%endif
 MKGLOBAL(FN_NAME(dec,_update_),function,)
 FN_NAME(dec,_update_):
         endbranch64
@@ -424,8 +432,10 @@ skip_in_out_check_error_update_dec:
 ;        u64     auth_tag_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(enc,_finalize_),function,)
 FN_NAME_AVX(enc,_finalize_):
+%endif
 MKGLOBAL(FN_NAME(enc,_finalize_),function,)
 FN_NAME(enc,_finalize_):
         endbranch64
@@ -520,8 +530,10 @@ error_enc_fin:
 ;        u64     auth_tag_len);
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 align 32
+%ifndef NO_AESNI
 MKGLOBAL(FN_NAME_AVX(dec,_finalize_),function,)
 FN_NAME_AVX(dec,_finalize_):
+%endif
 MKGLOBAL(FN_NAME(dec,_finalize_),function,)
 FN_NAME(dec,_finalize_):
         endbranch64
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/sse_t1/gcm_sse.inc
index 01256413..f1b58ac4 100644
--- a/lib/sse_t1/gcm_sse.inc
+++ b/lib/sse_t1/gcm_sse.inc
@@ -140,24 +140,30 @@
 %ifdef GCM128_MODE
 %define FN_NAME(x,y) aes_gcm_ %+ x %+ _128 %+ y %+ SSE
 %define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _128_ %+ SSE
+%ifndef NO_AESNI
 %define FN_NAME_AVX(x,y) aes_gcm_ %+ x %+ _128 %+ y %+ avx_gen2
 %define GMAC_FN_NAME_AVX(x) imb_aes_gmac_ %+ x %+ _128_avx_gen2
+%endif
 %define NROUNDS 9
 %endif
 
 %ifdef GCM192_MODE
 %define FN_NAME(x,y) aes_gcm_ %+ x %+ _192 %+ y %+ SSE
 %define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _192_ %+ SSE
+%ifndef NO_AESNI
 %define FN_NAME_AVX(x,y) aes_gcm_ %+ x %+ _192 %+ y %+ avx_gen2
 %define GMAC_FN_NAME_AVX(x) imb_aes_gmac_ %+ x %+ _192_avx_gen2
+%endif
 %define NROUNDS 11
 %endif
 
 %ifdef GCM256_MODE
 %define FN_NAME(x,y) aes_gcm_ %+ x %+ _256 %+ y %+ SSE
 %define GMAC_FN_NAME(x) imb_aes_gmac_ %+ x %+ _256_ %+ SSE
+%ifndef NO_AESNI
 %define FN_NAME_AVX(x,y) aes_gcm_ %+ x %+ _256 %+ y %+ avx_gen2
 %define GMAC_FN_NAME_AVX(x) imb_aes_gmac_ %+ x %+ _256_avx_gen2
+%endif
 %define NROUNDS 13
 %endif
 
-- 
GitLab


From 288056226a14cb749fa4b4451759b1a8768962ab Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Mon, 8 May 2023 23:33:02 +0100
Subject: [PATCH 275/332] sse: [SHA1] no need to preserve XMM6-15 on sha1_ni_x1

sha1_ni_x1 is called internally from the flush assembly module,
and XMM6-15 are preserved already at C level.
---
 lib/sse_t2/sha1_ni_x1_sse.asm | 12 ------------
 1 file changed, 12 deletions(-)

diff --git a/lib/sse_t2/sha1_ni_x1_sse.asm b/lib/sse_t2/sha1_ni_x1_sse.asm
index 1a2fde4b..c77ff495 100644
--- a/lib/sse_t2/sha1_ni_x1_sse.asm
+++ b/lib/sse_t2/sha1_ni_x1_sse.asm
@@ -64,9 +64,6 @@
 struc frame
 .ABCD_SAVE	reso	1
 .E_SAVE		reso	1
-.ABCD_SAVEb	reso	1
-.E_SAVEb	reso	1
-.XMM_SAVE	reso	3
 .align		resq	1
 endstruc
 
@@ -104,10 +101,6 @@ align 32
 sha1_ni_x1:
 	sub		rsp, frame_size
 
-	movdqa		[rsp + frame.XMM_SAVE], xmm6
-	movdqa		[rsp + frame.XMM_SAVE + 16], xmm14
-	movdqa		[rsp + frame.XMM_SAVE + 16*2], xmm15
-
 	shl		NUM_BLKS, 6	; convert to bytes
 	jz		done_hash
 
@@ -323,13 +316,8 @@ done_hash:
 
         movdqa   [rsp + 0*16], MSG0
         movdqa   [rsp + 1*16], MSG0
-        movdqa   [rsp + 2*16], MSG0
-        movdqa   [rsp + 3*16], MSG0
 %endif
 
-	movdqa		xmm6, [rsp + frame.XMM_SAVE]
-	movdqa		xmm14, [rsp + frame.XMM_SAVE + 16]
-	movdqa		xmm15, [rsp + frame.XMM_SAVE + 16*2]
 	add		rsp, frame_size
 
 	ret
-- 
GitLab


From f1dae8953ab46d8d4a40eef0c694aa63abe8bc5f Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Wed, 10 May 2023 13:15:22 +0100
Subject: [PATCH 276/332] lib: [SHA] move prototypes to internal header file

---
 lib/Makefile                    |   2 +
 lib/avx2_t1/sha_avx2.c          | 115 ++++++++++++++++
 lib/avx512_t1/sha_avx512.c      | 114 ++++++++++++++++
 lib/avx_t1/sha_avx.c            | 112 +---------------
 lib/include/arch_avx2_type1.h   |  16 +++
 lib/include/arch_avx512_type1.h |  16 +++
 lib/include/arch_avx_type1.h    |  16 +++
 lib/include/arch_sse_type1.h    |  16 +++
 lib/intel-ipsec-mb.h            | 226 --------------------------------
 lib/sse_t1/sha_sse.c            |   1 +
 lib/win_x64.mak                 |   2 +
 11 files changed, 299 insertions(+), 337 deletions(-)
 create mode 100644 lib/avx2_t1/sha_avx2.c
 create mode 100644 lib/avx512_t1/sha_avx512.c

diff --git a/lib/Makefile b/lib/Makefile
index 59ab2b58..c3fecec5 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -298,6 +298,8 @@ c_lib_objs := \
 	sha_mb_sse.o \
 	sha_ni_mb_sse.o \
 	sha_avx.o \
+	sha_avx2.o \
+	sha_avx512.o \
 	sha_mb_avx.o \
 	sha_mb_avx2.o \
 	sha_mb_avx512.o \
diff --git a/lib/avx2_t1/sha_avx2.c b/lib/avx2_t1/sha_avx2.c
new file mode 100644
index 00000000..69f77b75
--- /dev/null
+++ b/lib/avx2_t1/sha_avx2.c
@@ -0,0 +1,115 @@
+/*******************************************************************************
+  Copyright (c) 2020-2023, Intel Corporation
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions are met:
+
+      * Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+      * Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+      * Neither the name of Intel Corporation nor the names of its contributors
+        may be used to endorse or promote products derived from this software
+        without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include "include/sha_generic.h"
+#include "include/arch_avx2_type1.h"
+
+/* ========================================================================== */
+/* One block SHA1 computation for IPAD / OPAD usage only */
+void sha1_one_block_avx2(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_AVX, 1 /* SHA1 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA1 API for use in HMAC-SHA1 when key is longer than the block size
+ */
+void sha1_avx2(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_AVX, 1, IMB_SHA1_BLOCK_SIZE,
+                    SHA1_PAD_SIZE);
+}
+
+/* ========================================================================== */
+/* One block SHA224 computation for IPAD / OPAD usage only */
+void sha224_one_block_avx2(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_AVX, 224 /* SHA224 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA224 API for use in HMAC-SHA224 when key is longer than the block size
+ */
+void sha224_avx2(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_AVX, 224,
+                    IMB_SHA_256_BLOCK_SIZE, SHA224_PAD_SIZE);
+}
+
+/* ========================================================================== */
+/* One block SHA256 computation for IPAD / OPAD usage only */
+void sha256_one_block_avx2(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_AVX, 256 /* SHA256 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA256 API for use in HMAC-SHA256 when key is longer than the block size
+ */
+void sha256_avx2(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_AVX, 256,
+                    IMB_SHA_256_BLOCK_SIZE, SHA256_PAD_SIZE);
+}
+
+
+/* ========================================================================== */
+/* One block SHA384 computation for IPAD / OPAD usage only */
+void sha384_one_block_avx2(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_AVX, 384 /* SHA384 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA384 API for use in HMAC-SHA384 when key is longer than the block size
+ */
+void sha384_avx2(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_AVX, 384,
+                    IMB_SHA_384_BLOCK_SIZE, SHA384_PAD_SIZE);
+}
+
+/* ========================================================================== */
+/* One block SHA512 computation for IPAD / OPAD usage only */
+void sha512_one_block_avx2(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_AVX, 512 /* SHA512 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA512 API for use in HMAC-SHA512 when key is longer than the block size
+ */
+void sha512_avx2(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_AVX, 512,
+                    IMB_SHA_512_BLOCK_SIZE, SHA512_PAD_SIZE);
+}
diff --git a/lib/avx512_t1/sha_avx512.c b/lib/avx512_t1/sha_avx512.c
new file mode 100644
index 00000000..39014b21
--- /dev/null
+++ b/lib/avx512_t1/sha_avx512.c
@@ -0,0 +1,114 @@
+/*******************************************************************************
+  Copyright (c) 2020-2023, Intel Corporation
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions are met:
+
+      * Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+      * Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+      * Neither the name of Intel Corporation nor the names of its contributors
+        may be used to endorse or promote products derived from this software
+        without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include "include/sha_generic.h"
+#include "include/arch_avx512_type1.h"
+
+/* ========================================================================== */
+/* One block SHA1 computation for IPAD / OPAD usage only */
+void sha1_one_block_avx512(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_AVX, 1 /* SHA1 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA1 API for use in HMAC-SHA1 when key is longer than the block size
+ */
+void sha1_avx512(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_AVX, 1, IMB_SHA1_BLOCK_SIZE,
+                    SHA1_PAD_SIZE);
+}
+
+/* ========================================================================== */
+/* One block SHA224 computation for IPAD / OPAD usage only */
+void sha224_one_block_avx512(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_AVX, 224 /* SHA224 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA224 API for use in HMAC-SHA224 when key is longer than the block size
+ */
+void sha224_avx512(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_AVX, 224,
+                    IMB_SHA_256_BLOCK_SIZE, SHA224_PAD_SIZE);
+}
+
+/* ========================================================================== */
+/* One block SHA256 computation for IPAD / OPAD usage only */
+void sha256_one_block_avx512(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_AVX, 256 /* SHA256 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA256 API for use in HMAC-SHA256 when key is longer than the block size
+ */
+void sha256_avx512(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_AVX, 256,
+                    IMB_SHA_256_BLOCK_SIZE, SHA256_PAD_SIZE);
+}
+
+/* ========================================================================== */
+/* One block SHA384 computation for IPAD / OPAD usage only */
+void sha384_one_block_avx512(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_AVX, 384 /* SHA384 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA384 API for use in HMAC-SHA384 when key is longer than the block size
+ */
+void sha384_avx512(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_AVX, 384,
+                    IMB_SHA_384_BLOCK_SIZE, SHA384_PAD_SIZE);
+}
+
+/* ========================================================================== */
+/* One block SHA512 computation for IPAD / OPAD usage only */
+void sha512_one_block_avx512(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_AVX, 512 /* SHA512 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA512 API for use in HMAC-SHA512 when key is longer than the block size
+ */
+void sha512_avx512(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_AVX, 512,
+                    IMB_SHA_512_BLOCK_SIZE, SHA512_PAD_SIZE);
+}
diff --git a/lib/avx_t1/sha_avx.c b/lib/avx_t1/sha_avx.c
index 23cbd17a..4b431617 100644
--- a/lib/avx_t1/sha_avx.c
+++ b/lib/avx_t1/sha_avx.c
@@ -26,6 +26,7 @@
 *******************************************************************************/
 
 #include "include/sha_generic.h"
+#include "include/arch_avx_type1.h"
 
 /* ========================================================================== */
 /* One block SHA1 computation for IPAD / OPAD usage only */
@@ -35,17 +36,6 @@ void sha1_one_block_avx(const void *data, void *digest)
         sha_generic_1block(data, digest, 1 /* AVX */, 1 /* SHA1 */);
 }
 
-void sha1_one_block_avx2(const void *data, void *digest)
-{
-        sha_generic_1block(data, digest, 1 /* AVX */, 1 /* SHA1 */);
-}
-
-void sha1_one_block_avx512(const void *data, void *digest)
-{
-        sha_generic_1block(data, digest, 1 /* AVX */, 1 /* SHA1 */);
-}
-
-
 /* ========================================================================== */
 /*
  * SHA1 API for use in HMAC-SHA1 when key is longer than the block size
@@ -57,18 +47,6 @@ void sha1_avx(const void *data, const uint64_t length, void *digest)
                     SHA1_PAD_SIZE);
 }
 
-void sha1_avx2(const void *data, const uint64_t length, void *digest)
-{
-        sha_generic(data, length, digest, 1 /* AVX */, 1, IMB_SHA1_BLOCK_SIZE,
-                    SHA1_PAD_SIZE);
-}
-
-void sha1_avx512(const void *data, const uint64_t length, void *digest)
-{
-        sha_generic(data, length, digest, 1 /* AVX */, 1, IMB_SHA1_BLOCK_SIZE,
-                    SHA1_PAD_SIZE);
-}
-
 /* ========================================================================== */
 /* One block SHA224 computation for IPAD / OPAD usage only */
 
@@ -77,16 +55,6 @@ void sha224_one_block_avx(const void *data, void *digest)
         sha_generic_1block(data, digest, 1 /* AVX */, 224 /* SHA224 */);
 }
 
-void sha224_one_block_avx2(const void *data, void *digest)
-{
-        sha_generic_1block(data, digest, 1 /* AVX */, 224 /* SHA224 */);
-}
-
-void sha224_one_block_avx512(const void *data, void *digest)
-{
-        sha_generic_1block(data, digest, 1 /* AVX */, 224 /* SHA224 */);
-}
-
 /* ========================================================================== */
 /*
  * SHA224 API for use in HMAC-SHA224 when key is longer than the block size
@@ -97,18 +65,6 @@ void sha224_avx(const void *data, const uint64_t length, void *digest)
                     IMB_SHA_256_BLOCK_SIZE, SHA224_PAD_SIZE);
 }
 
-void sha224_avx2(const void *data, const uint64_t length, void *digest)
-{
-        sha_generic(data, length, digest, 1 /* AVX */, 224,
-                    IMB_SHA_256_BLOCK_SIZE, SHA224_PAD_SIZE);
-}
-
-void sha224_avx512(const void *data, const uint64_t length, void *digest)
-{
-        sha_generic(data, length, digest, 1 /* AVX */, 224,
-                    IMB_SHA_256_BLOCK_SIZE, SHA224_PAD_SIZE);
-}
-
 /* ========================================================================== */
 /* One block SHA256 computation for IPAD / OPAD usage only */
 void sha256_one_block_avx(const void *data, void *digest)
@@ -116,16 +72,6 @@ void sha256_one_block_avx(const void *data, void *digest)
         sha_generic_1block(data, digest, 1 /* AVX */, 256 /* SHA256 */);
 }
 
-void sha256_one_block_avx2(const void *data, void *digest)
-{
-        sha_generic_1block(data, digest, 1 /* AVX */, 256 /* SHA256 */);
-}
-
-void sha256_one_block_avx512(const void *data, void *digest)
-{
-        sha_generic_1block(data, digest, 1 /* AVX */, 256 /* SHA256 */);
-}
-
 /* ========================================================================== */
 /*
  * SHA256 API for use in HMAC-SHA256 when key is longer than the block size
@@ -136,18 +82,6 @@ void sha256_avx(const void *data, const uint64_t length, void *digest)
                     IMB_SHA_256_BLOCK_SIZE, SHA256_PAD_SIZE);
 }
 
-void sha256_avx2(const void *data, const uint64_t length, void *digest)
-{
-        sha_generic(data, length, digest, 1 /* AVX */, 256,
-                    IMB_SHA_256_BLOCK_SIZE, SHA256_PAD_SIZE);
-}
-
-void sha256_avx512(const void *data, const uint64_t length, void *digest)
-{
-        sha_generic(data, length, digest, 1 /* AVX */, 256,
-                    IMB_SHA_256_BLOCK_SIZE, SHA256_PAD_SIZE);
-}
-
 /* ========================================================================== */
 /* One block SHA384 computation for IPAD / OPAD usage only */
 void sha384_one_block_avx(const void *data, void *digest)
@@ -155,16 +89,6 @@ void sha384_one_block_avx(const void *data, void *digest)
         sha_generic_1block(data, digest, 1 /* AVX */, 384 /* SHA384 */);
 }
 
-void sha384_one_block_avx2(const void *data, void *digest)
-{
-        sha_generic_1block(data, digest, 1 /* AVX */, 384 /* SHA384 */);
-}
-
-void sha384_one_block_avx512(const void *data, void *digest)
-{
-        sha_generic_1block(data, digest, 1 /* AVX */, 384 /* SHA384 */);
-}
-
 /* ========================================================================== */
 /*
  * SHA384 API for use in HMAC-SHA384 when key is longer than the block size
@@ -175,18 +99,6 @@ void sha384_avx(const void *data, const uint64_t length, void *digest)
                     IMB_SHA_384_BLOCK_SIZE, SHA384_PAD_SIZE);
 }
 
-void sha384_avx2(const void *data, const uint64_t length, void *digest)
-{
-        sha_generic(data, length, digest, 1 /* AVX */, 384,
-                    IMB_SHA_384_BLOCK_SIZE, SHA384_PAD_SIZE);
-}
-
-void sha384_avx512(const void *data, const uint64_t length, void *digest)
-{
-        sha_generic(data, length, digest, 1 /* AVX */, 384,
-                    IMB_SHA_384_BLOCK_SIZE, SHA384_PAD_SIZE);
-}
-
 /* ========================================================================== */
 /* One block SHA512 computation for IPAD / OPAD usage only */
 void sha512_one_block_avx(const void *data, void *digest)
@@ -194,16 +106,6 @@ void sha512_one_block_avx(const void *data, void *digest)
         sha_generic_1block(data, digest, 1 /* AVX */, 512 /* SHA512 */);
 }
 
-void sha512_one_block_avx2(const void *data, void *digest)
-{
-        sha_generic_1block(data, digest, 1 /* AVX */, 512 /* SHA512 */);
-}
-
-void sha512_one_block_avx512(const void *data, void *digest)
-{
-        sha_generic_1block(data, digest, 1 /* AVX */, 512 /* SHA512 */);
-}
-
 /* ========================================================================== */
 /*
  * SHA512 API for use in HMAC-SHA512 when key is longer than the block size
@@ -213,15 +115,3 @@ void sha512_avx(const void *data, const uint64_t length, void *digest)
         sha_generic(data, length, digest, 1 /* AVX */, 512,
                     IMB_SHA_512_BLOCK_SIZE, SHA512_PAD_SIZE);
 }
-
-void sha512_avx2(const void *data, const uint64_t length, void *digest)
-{
-        sha_generic(data, length, digest, 1 /* AVX */, 512,
-                    IMB_SHA_512_BLOCK_SIZE, SHA512_PAD_SIZE);
-}
-
-void sha512_avx512(const void *data, const uint64_t length, void *digest)
-{
-        sha_generic(data, length, digest, 1 /* AVX */, 512,
-                    IMB_SHA_512_BLOCK_SIZE, SHA512_PAD_SIZE);
-}
diff --git a/lib/include/arch_avx2_type1.h b/lib/include/arch_avx2_type1.h
index a7cb5512..9a347862 100644
--- a/lib/include/arch_avx2_type1.h
+++ b/lib/include/arch_avx2_type1.h
@@ -38,6 +38,22 @@ void call_sha1_x8_avx2_from_c(SHA1_ARGS *args, uint32_t size_in_blocks);
 void call_sha256_oct_avx2_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 void call_sha512_x4_avx2_from_c(SHA512_ARGS *args, uint64_t size_in_blocks);
 
+IMB_DLL_EXPORT void sha1_avx2(const void *data, const uint64_t length,
+                              void *digest);
+IMB_DLL_EXPORT void sha1_one_block_avx2(const void *data, void *digest);
+IMB_DLL_EXPORT void sha224_avx2(const void *data, const uint64_t length,
+                                void *digest);
+IMB_DLL_EXPORT void sha224_one_block_avx2(const void *data, void *digest);
+IMB_DLL_EXPORT void sha256_avx2(const void *data, const uint64_t length,
+                                void *digest);
+IMB_DLL_EXPORT void sha256_one_block_avx2(const void *data, void *digest);
+IMB_DLL_EXPORT void sha384_avx2(const void *data, const uint64_t length,
+                                void *digest);
+IMB_DLL_EXPORT void sha384_one_block_avx2(const void *data, void *digest);
+IMB_DLL_EXPORT void sha512_avx2(const void *data, const uint64_t length,
+                                void *digest);
+IMB_DLL_EXPORT void sha512_one_block_avx2(const void *data, void *digest);
+
 /*AES-CFB*/
 IMB_DLL_EXPORT void aes_cfb_128_one_avx2(void *out, const void *in,
                                          const void *iv, const void *keys,
diff --git a/lib/include/arch_avx512_type1.h b/lib/include/arch_avx512_type1.h
index e92d0689..66b924d6 100644
--- a/lib/include/arch_avx512_type1.h
+++ b/lib/include/arch_avx512_type1.h
@@ -156,6 +156,22 @@ void call_sha1_x16_avx512_from_c(SHA1_ARGS *args, uint32_t size_in_blocks);
 void call_sha256_x16_avx512_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 void call_sha512_x8_avx512_from_c(SHA512_ARGS *args, uint64_t size_in_blocks);
 
+IMB_DLL_EXPORT void sha1_avx512(const void *data, const uint64_t length,
+                                 void *digest);
+IMB_DLL_EXPORT void sha1_one_block_avx512(const void *data, void *digest);
+IMB_DLL_EXPORT void sha224_avx512(const void *data, const uint64_t length,
+                                  void *digest);
+IMB_DLL_EXPORT void sha224_one_block_avx512(const void *data, void *digest);
+IMB_DLL_EXPORT void sha256_avx512(const void *data, const uint64_t length,
+                                  void *digest);
+IMB_DLL_EXPORT void sha256_one_block_avx512(const void *data, void *digest);
+IMB_DLL_EXPORT void sha384_avx512(const void *data, const uint64_t length,
+                                  void *digest);
+IMB_DLL_EXPORT void sha384_one_block_avx512(const void *data, void *digest);
+IMB_DLL_EXPORT void sha512_avx512(const void *data, const uint64_t length,
+                                  void *digest);
+IMB_DLL_EXPORT void sha512_one_block_avx512(const void *data, void *digest);
+
 /* AES-CFB */
 IMB_DLL_EXPORT void aes_cfb_128_one_avx512(void *out, const void *in,
                                            const void *iv, const void *keys,
diff --git a/lib/include/arch_avx_type1.h b/lib/include/arch_avx_type1.h
index 89be0d5b..0e0307ac 100644
--- a/lib/include/arch_avx_type1.h
+++ b/lib/include/arch_avx_type1.h
@@ -255,6 +255,22 @@ void call_sha1_mult_avx_from_c(SHA1_ARGS *args, uint32_t size_in_blocks);
 void call_sha_256_mult_avx_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 void call_sha512_x2_avx_from_c(SHA512_ARGS *args, uint64_t size_in_blocks);
 
+IMB_DLL_EXPORT void sha1_avx(const void *data, const uint64_t length,
+                             void *digest);
+IMB_DLL_EXPORT void sha1_one_block_avx(const void *data, void *digest);
+IMB_DLL_EXPORT void sha224_avx(const void *data, const uint64_t length,
+                               void *digest);
+IMB_DLL_EXPORT void sha224_one_block_avx(const void *data, void *digest);
+IMB_DLL_EXPORT void sha256_avx(const void *data, const uint64_t length,
+                               void *digest);
+IMB_DLL_EXPORT void sha256_one_block_avx(const void *data, void *digest);
+IMB_DLL_EXPORT void sha384_avx(const void *data, const uint64_t length,
+                               void *digest);
+IMB_DLL_EXPORT void sha384_one_block_avx(const void *data, void *digest);
+IMB_DLL_EXPORT void sha512_avx(const void *data, const uint64_t length,
+                               void *digest);
+IMB_DLL_EXPORT void sha512_one_block_avx(const void *data, void *digest);
+
 IMB_DLL_EXPORT void set_suite_id_avx_t1(IMB_MGR *state, IMB_JOB *job);
 
 #endif /* IMB_ASM_AVX_T1_H */
diff --git a/lib/include/arch_sse_type1.h b/lib/include/arch_sse_type1.h
index 763e1b53..d7e7ce5a 100644
--- a/lib/include/arch_sse_type1.h
+++ b/lib/include/arch_sse_type1.h
@@ -133,6 +133,22 @@ void call_sha1_mult_sse_from_c(SHA1_ARGS *args, uint32_t size_in_blocks);
 void call_sha_256_mult_sse_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 void call_sha512_x2_sse_from_c(SHA512_ARGS *args, uint64_t size_in_blocks);
 
+IMB_DLL_EXPORT void sha1_sse(const void *data, const uint64_t length,
+                             void *digest);
+IMB_DLL_EXPORT void sha1_one_block_sse(const void *data, void *digest);
+IMB_DLL_EXPORT void sha224_sse(const void *data, const uint64_t length,
+                               void *digest);
+IMB_DLL_EXPORT void sha224_one_block_sse(const void *data, void *digest);
+IMB_DLL_EXPORT void sha256_sse(const void *data, const uint64_t length,
+                               void *digest);
+IMB_DLL_EXPORT void sha256_one_block_sse(const void *data, void *digest);
+IMB_DLL_EXPORT void sha384_sse(const void *data, const uint64_t length,
+                               void *digest);
+IMB_DLL_EXPORT void sha384_one_block_sse(const void *data, void *digest);
+IMB_DLL_EXPORT void sha512_sse(const void *data, const uint64_t length,
+                               void *digest);
+IMB_DLL_EXPORT void sha512_one_block_sse(const void *data, void *digest);
+
 /* moved from MB MGR */
 IMB_JOB *submit_job_aes128_enc_sse(MB_MGR_AES_OOO *state,
                                    IMB_JOB *job);
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index aa03f0d7..edaa65a6 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -2746,232 +2746,6 @@ IMB_DLL_EXPORT void
 des_cfb_one(void *out, const void *in, const uint64_t *iv,
             const uint64_t *ks, const int len);
 
-/**
- * Authenticate variable sized data with SHA1.
- *
- * @param[in] data    Data buffer
- * @param[in] length  Length of data in bytes for authentication.
- * @param[out] digest Digest output (20 bytes)
- */
-IMB_DLL_EXPORT void sha1_sse(const void *data, const uint64_t length,
-                             void *digest);
-
-/**
- * @copydoc sha1_sse
- */
-IMB_DLL_EXPORT void sha1_avx(const void *data, const uint64_t length,
-                             void *digest);
-/**
- * @copydoc sha1_sse
- */
-IMB_DLL_EXPORT void sha1_avx2(const void *data, const uint64_t length,
-                              void *digest);
-/**
- * @copydoc sha1_sse
- */
-IMB_DLL_EXPORT void sha1_avx512(const void *data, const uint64_t length,
-                                 void *digest);
-
-/**
- * Authenticate 64-byte data buffer with SHA1.
- *
- * @param[in] data    64-byte data buffer
- * @param[out] digest Digest output (20 bytes)
- */
-IMB_DLL_EXPORT void sha1_one_block_sse(const void *data, void *digest);
-/**
- * @copydoc sha1_one_block_sse
- */
-IMB_DLL_EXPORT void sha1_one_block_avx(const void *data, void *digest);
-/**
- * @copydoc sha1_one_block_sse
- */
-IMB_DLL_EXPORT void sha1_one_block_avx2(const void *data, void *digest);
-/**
- * @copydoc sha1_one_block_sse
- */
-IMB_DLL_EXPORT void sha1_one_block_avx512(const void *data, void *digest);
-
-/**
- * Authenticate variable sized data with SHA224.
- *
- * @param[in] data    Data buffer
- * @param[in] length  Length of data in bytes for authentication.
- * @param[out] digest Digest output (28 bytes)
- */
-IMB_DLL_EXPORT void sha224_sse(const void *data, const uint64_t length,
-                               void *digest);
-/**
- * @copydoc sha224_sse
- */
-IMB_DLL_EXPORT void sha224_avx(const void *data, const uint64_t length,
-                               void *digest);
-/**
- * @copydoc sha224_sse
- */
-IMB_DLL_EXPORT void sha224_avx2(const void *data, const uint64_t length,
-                                void *digest);
-/**
- * @copydoc sha224_sse
- */
-IMB_DLL_EXPORT void sha224_avx512(const void *data, const uint64_t length,
-                                  void *digest);
-
-/**
- * Authenticate 64-byte data buffer with SHA224.
- *
- * @param[in] data    64-byte data buffer
- * @param[out] digest Digest output (28 bytes)
- */
-IMB_DLL_EXPORT void sha224_one_block_sse(const void *data, void *digest);
-/**
- * @copydoc sha224_one_block_sse
- */
-IMB_DLL_EXPORT void sha224_one_block_avx(const void *data, void *digest);
-/**
- * @copydoc sha224_one_block_sse
- */
-IMB_DLL_EXPORT void sha224_one_block_avx2(const void *data, void *digest);
-/**
- * @copydoc sha224_one_block_sse
- */
-IMB_DLL_EXPORT void sha224_one_block_avx512(const void *data, void *digest);
-
-/**
- * Authenticate variable sized data with SHA256.
- *
- * @param[in] data    Data buffer
- * @param[in] length  Length of data in bytes for authentication.
- * @param[out] digest Digest output (32 bytes)
- */
-IMB_DLL_EXPORT void sha256_sse(const void *data, const uint64_t length,
-                               void *digest);
-/**
- * @copydoc sha256_sse
- */
-IMB_DLL_EXPORT void sha256_avx(const void *data, const uint64_t length,
-                               void *digest);
-/**
- * @copydoc sha256_sse
- */
-IMB_DLL_EXPORT void sha256_avx2(const void *data, const uint64_t length,
-                                void *digest);
-/**
- * @copydoc sha256_sse
- */
-IMB_DLL_EXPORT void sha256_avx512(const void *data, const uint64_t length,
-                                  void *digest);
-
-/**
- * Authenticate 64-byte data buffer with SHA256.
- *
- * @param[in] data    64-byte data buffer
- * @param[out] digest Digest output (32 bytes)
- */
-IMB_DLL_EXPORT void sha256_one_block_sse(const void *data, void *digest);
-/**
- * @copydoc sha256_one_block_sse
- */
-IMB_DLL_EXPORT void sha256_one_block_avx(const void *data, void *digest);
-/**
- * @copydoc sha256_one_block_sse
- */
-IMB_DLL_EXPORT void sha256_one_block_avx2(const void *data, void *digest);
-/**
- * @copydoc sha256_one_block_sse
- */
-IMB_DLL_EXPORT void sha256_one_block_avx512(const void *data, void *digest);
-
-/**
- * Authenticate variable sized data with SHA384.
- *
- * @param[in] data    Data buffer
- * @param[in] length  Length of data in bytes for authentication.
- * @param[out] digest Digest output (48 bytes)
- */
-IMB_DLL_EXPORT void sha384_sse(const void *data, const uint64_t length,
-                               void *digest);
-/**
- * @copydoc sha384_sse
- */
-IMB_DLL_EXPORT void sha384_avx(const void *data, const uint64_t length,
-                               void *digest);
-/**
- * @copydoc sha384_sse
- */
-IMB_DLL_EXPORT void sha384_avx2(const void *data, const uint64_t length,
-                                void *digest);
-/**
- * @copydoc sha384_sse
- */
-IMB_DLL_EXPORT void sha384_avx512(const void *data, const uint64_t length,
-                                  void *digest);
-
-/**
- * Authenticate 128-byte data buffer with SHA384.
- *
- * @param[in] data    64-byte data buffer
- * @param[out] digest Digest output (48 bytes)
- */
-IMB_DLL_EXPORT void sha384_one_block_sse(const void *data, void *digest);
-/**
- * @copydoc sha384_one_block_sse
- */
-IMB_DLL_EXPORT void sha384_one_block_avx(const void *data, void *digest);
-/**
- * @copydoc sha384_one_block_sse
- */
-IMB_DLL_EXPORT void sha384_one_block_avx2(const void *data, void *digest);
-/**
- * @copydoc sha384_one_block_sse
- */
-IMB_DLL_EXPORT void sha384_one_block_avx512(const void *data, void *digest);
-
-/**
- * Authenticate variable sized data with SHA512.
- *
- * @param[in] data    Data buffer
- * @param[in] length  Length of data in bytes for authentication.
- * @param[out] digest Digest output (64 bytes)
- */
-IMB_DLL_EXPORT void sha512_sse(const void *data, const uint64_t length,
-                               void *digest);
-/**
- * @copydoc sha512_sse
- */
-IMB_DLL_EXPORT void sha512_avx(const void *data, const uint64_t length,
-                               void *digest);
-/**
- * @copydoc sha512_sse
- */
-IMB_DLL_EXPORT void sha512_avx2(const void *data, const uint64_t length,
-                                void *digest);
-/**
- * @copydoc sha512_sse
- */
-IMB_DLL_EXPORT void sha512_avx512(const void *data, const uint64_t length,
-                                  void *digest);
-
-/**
- * Authenticate 64-byte data buffer with SHA512.
- *
- * @param[in] data    128-byte data buffer
- * @param[out] digest Digest output (64 bytes)
- */
-IMB_DLL_EXPORT void sha512_one_block_sse(const void *data, void *digest);
-/**
- * @copydoc sha512_one_block_sse
- */
-IMB_DLL_EXPORT void sha512_one_block_avx(const void *data, void *digest);
-/**
- * @copydoc sha512_one_block_sse
- */
-IMB_DLL_EXPORT void sha512_one_block_avx2(const void *data, void *digest);
-/**
- * @copydoc sha512_one_block_sse
- */
-IMB_DLL_EXPORT void sha512_one_block_avx512(const void *data, void *digest);
-
 /**
  * Authenticate 64-byte data buffer with MD5.
  *
diff --git a/lib/sse_t1/sha_sse.c b/lib/sse_t1/sha_sse.c
index 40ba89c7..c43a3b96 100644
--- a/lib/sse_t1/sha_sse.c
+++ b/lib/sse_t1/sha_sse.c
@@ -26,6 +26,7 @@
 *******************************************************************************/
 
 #include "include/sha_generic.h"
+#include "include/arch_sse_type1.h"
 
 /* ========================================================================== */
 /* One block SHA1 computation for IPAD / OPAD usage only */
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 80bd00c6..6d8b3ea0 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -281,6 +281,8 @@ lib_objs1 = \
 	$(OBJ_DIR)\md5_one_block.obj \
 	$(OBJ_DIR)\sha_sse.obj \
 	$(OBJ_DIR)\sha_avx.obj \
+	$(OBJ_DIR)\sha_avx2.obj \
+	$(OBJ_DIR)\sha_avx512.obj \
 	$(OBJ_DIR)\sha_mb_sse.obj \
 	$(OBJ_DIR)\sha_ni_mb_sse.obj \
 	$(OBJ_DIR)\sha_mb_avx.obj \
-- 
GitLab


From 4d6c9bb8889f85c03b6e8aaf866071a0656d0f06 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Mon, 8 May 2023 23:34:03 +0100
Subject: [PATCH 277/332] sse: [SHA1] add SHA-NI single block implementation

---
 lib/Makefile                         |   2 +
 lib/avx2_t2/mb_mgr_avx2_t2.c         |   4 +-
 lib/avx2_t3/mb_mgr_avx2_t3.c         |   4 +-
 lib/avx512_t2/mb_mgr_avx512_t2.c     |   5 +-
 lib/avx_t1/sha_avx.c                 |  20 +-
 lib/avx_t2/mb_mgr_avx_t2.c           |   4 +-
 lib/include/arch_sse_type2.h         |   4 +
 lib/include/sha_generic.h            |  40 ++--
 lib/libIPSec_MB.def                  |   2 +
 lib/sse_t1/sha_sse.c                 |  20 +-
 lib/sse_t2/mb_mgr_sse_t2.c           |   4 +-
 lib/sse_t2/sha1_ni_one_block_sse.asm | 291 +++++++++++++++++++++++++++
 lib/sse_t2/sha_ni_sse.c              |  48 +++++
 lib/sse_t3/mb_mgr_sse_t3.c           |   4 +-
 lib/win_x64.mak                      |   2 +
 15 files changed, 406 insertions(+), 48 deletions(-)
 create mode 100644 lib/sse_t2/sha1_ni_one_block_sse.asm
 create mode 100644 lib/sse_t2/sha_ni_sse.c

diff --git a/lib/Makefile b/lib/Makefile
index c3fecec5..51fb468d 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -295,6 +295,7 @@ c_lib_objs := \
 	aes_xcbc_expand_key.o \
 	md5_one_block.o \
 	sha_sse.o \
+	sha_ni_sse.o \
 	sha_mb_sse.o \
 	sha_ni_mb_sse.o \
 	sha_avx.o \
@@ -457,6 +458,7 @@ asm_sse_lib_objs := \
 	sha256_one_block_sse.o \
 	sha384_one_block_sse.o \
 	sha512_one_block_sse.o \
+	sha1_ni_one_block_sse.o \
 	sha512_x2_sse.o \
 	sha256_mult_sse.o \
 	sha1_ni_x2_sse.o \
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index 48295e53..d2837875 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -373,8 +373,8 @@ init_mb_mgr_avx2_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->xcbc_keyexp         = aes_xcbc_expand_key_avx2;
         state->des_key_sched       = des_key_schedule;
 
-        state->sha1_one_block      = sha1_one_block_avx2;
-        state->sha1                = sha1_avx2;
+        state->sha1_one_block      = sha1_one_block_sse_shani;
+        state->sha1                = sha1_sse_shani;
         state->sha224_one_block    = sha224_one_block_avx2;
         state->sha224              = sha224_avx2;
         state->sha256_one_block    = sha256_one_block_avx2;
diff --git a/lib/avx2_t3/mb_mgr_avx2_t3.c b/lib/avx2_t3/mb_mgr_avx2_t3.c
index fcdc516e..052a7fde 100644
--- a/lib/avx2_t3/mb_mgr_avx2_t3.c
+++ b/lib/avx2_t3/mb_mgr_avx2_t3.c
@@ -374,8 +374,8 @@ init_mb_mgr_avx2_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->xcbc_keyexp         = aes_xcbc_expand_key_avx2;
         state->des_key_sched       = des_key_schedule;
 
-        state->sha1_one_block      = sha1_one_block_avx2;
-        state->sha1                = sha1_avx2;
+        state->sha1_one_block      = sha1_one_block_sse_shani;
+        state->sha1                = sha1_sse_shani;
         state->sha224_one_block    = sha224_one_block_avx2;
         state->sha224              = sha224_avx2;
         state->sha256_one_block    = sha256_one_block_avx2;
diff --git a/lib/avx512_t2/mb_mgr_avx512_t2.c b/lib/avx512_t2/mb_mgr_avx512_t2.c
index 84ba0ca1..638975e7 100644
--- a/lib/avx512_t2/mb_mgr_avx512_t2.c
+++ b/lib/avx512_t2/mb_mgr_avx512_t2.c
@@ -48,6 +48,7 @@
 #include "include/aesni_emu.h"
 #include "include/error.h"
 
+#include "include/arch_sse_type2.h" /* SHA-NI */
 #include "include/arch_avx_type1.h" /* AESNI */
 #include "include/arch_avx2_type1.h" /* MD5 */
 #include "include/arch_avx512_type1.h"
@@ -484,8 +485,8 @@ init_mb_mgr_avx512_t2_internal(IMB_MGR *state, const int reset_mgrs)
 
         state->des_key_sched       = des_key_schedule;
 
-        state->sha1_one_block      = sha1_one_block_avx512;
-        state->sha1                = sha1_avx512;
+        state->sha1_one_block      = sha1_one_block_sse_shani;
+        state->sha1                = sha1_sse_shani;
         state->sha224_one_block    = sha224_one_block_avx512;
         state->sha224              = sha224_avx512;
         state->sha256_one_block    = sha256_one_block_avx512;
diff --git a/lib/avx_t1/sha_avx.c b/lib/avx_t1/sha_avx.c
index 4b431617..8827c5e7 100644
--- a/lib/avx_t1/sha_avx.c
+++ b/lib/avx_t1/sha_avx.c
@@ -33,7 +33,7 @@
 
 void sha1_one_block_avx(const void *data, void *digest)
 {
-        sha_generic_1block(data, digest, 1 /* AVX */, 1 /* SHA1 */);
+        sha_generic_1block(data, digest, ARCH_AVX, 1 /* SHA1 */);
 }
 
 /* ========================================================================== */
@@ -43,7 +43,7 @@ void sha1_one_block_avx(const void *data, void *digest)
 
 void sha1_avx(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, 1 /* AVX */, 1, IMB_SHA1_BLOCK_SIZE,
+        sha_generic(data, length, digest, ARCH_AVX, 1, IMB_SHA1_BLOCK_SIZE,
                     SHA1_PAD_SIZE);
 }
 
@@ -52,7 +52,7 @@ void sha1_avx(const void *data, const uint64_t length, void *digest)
 
 void sha224_one_block_avx(const void *data, void *digest)
 {
-        sha_generic_1block(data, digest, 1 /* AVX */, 224 /* SHA224 */);
+        sha_generic_1block(data, digest, ARCH_AVX, 224 /* SHA224 */);
 }
 
 /* ========================================================================== */
@@ -61,7 +61,7 @@ void sha224_one_block_avx(const void *data, void *digest)
  */
 void sha224_avx(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, 1 /* AVX */, 224,
+        sha_generic(data, length, digest, ARCH_AVX, 224,
                     IMB_SHA_256_BLOCK_SIZE, SHA224_PAD_SIZE);
 }
 
@@ -69,7 +69,7 @@ void sha224_avx(const void *data, const uint64_t length, void *digest)
 /* One block SHA256 computation for IPAD / OPAD usage only */
 void sha256_one_block_avx(const void *data, void *digest)
 {
-        sha_generic_1block(data, digest, 1 /* AVX */, 256 /* SHA256 */);
+        sha_generic_1block(data, digest, ARCH_AVX, 256 /* SHA256 */);
 }
 
 /* ========================================================================== */
@@ -78,7 +78,7 @@ void sha256_one_block_avx(const void *data, void *digest)
  */
 void sha256_avx(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, 1 /* AVX */, 256,
+        sha_generic(data, length, digest, ARCH_AVX, 256,
                     IMB_SHA_256_BLOCK_SIZE, SHA256_PAD_SIZE);
 }
 
@@ -86,7 +86,7 @@ void sha256_avx(const void *data, const uint64_t length, void *digest)
 /* One block SHA384 computation for IPAD / OPAD usage only */
 void sha384_one_block_avx(const void *data, void *digest)
 {
-        sha_generic_1block(data, digest, 1 /* AVX */, 384 /* SHA384 */);
+        sha_generic_1block(data, digest, ARCH_AVX, 384 /* SHA384 */);
 }
 
 /* ========================================================================== */
@@ -95,7 +95,7 @@ void sha384_one_block_avx(const void *data, void *digest)
  */
 void sha384_avx(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, 1 /* AVX */, 384,
+        sha_generic(data, length, digest, ARCH_AVX, 384,
                     IMB_SHA_384_BLOCK_SIZE, SHA384_PAD_SIZE);
 }
 
@@ -103,7 +103,7 @@ void sha384_avx(const void *data, const uint64_t length, void *digest)
 /* One block SHA512 computation for IPAD / OPAD usage only */
 void sha512_one_block_avx(const void *data, void *digest)
 {
-        sha_generic_1block(data, digest, 1 /* AVX */, 512 /* SHA512 */);
+        sha_generic_1block(data, digest, ARCH_AVX, 512 /* SHA512 */);
 }
 
 /* ========================================================================== */
@@ -112,6 +112,6 @@ void sha512_one_block_avx(const void *data, void *digest)
  */
 void sha512_avx(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, 1 /* AVX */, 512,
+        sha_generic(data, length, digest, ARCH_AVX, 512,
                     IMB_SHA_512_BLOCK_SIZE, SHA512_PAD_SIZE);
 }
diff --git a/lib/avx_t2/mb_mgr_avx_t2.c b/lib/avx_t2/mb_mgr_avx_t2.c
index 1d1f1885..1f6af071 100644
--- a/lib/avx_t2/mb_mgr_avx_t2.c
+++ b/lib/avx_t2/mb_mgr_avx_t2.c
@@ -374,8 +374,8 @@ init_mb_mgr_avx_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->xcbc_keyexp         = aes_xcbc_expand_key_avx;
         state->des_key_sched       = des_key_schedule;
 
-        state->sha1_one_block      = sha1_one_block_avx;
-        state->sha1                = sha1_avx;
+        state->sha1_one_block      = sha1_one_block_sse_shani;
+        state->sha1                = sha1_sse_shani;
         state->sha224_one_block    = sha224_one_block_avx;
         state->sha224              = sha224_avx;
         state->sha256_one_block    = sha256_one_block_avx;
diff --git a/lib/include/arch_sse_type2.h b/lib/include/arch_sse_type2.h
index aecca65d..2d4ee88d 100644
--- a/lib/include/arch_sse_type2.h
+++ b/lib/include/arch_sse_type2.h
@@ -38,6 +38,10 @@ void call_sha1_ni_x2_sse_from_c(SHA1_ARGS *args, uint32_t size_in_blocks);
 void call_sha224_ni_x2_sse_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 void call_sha256_ni_x2_sse_from_c(SHA256_ARGS *args, uint32_t size_in_blocks);
 
+IMB_DLL_EXPORT void sha1_sse_shani(const void *data, const uint64_t length,
+                                   void *digest);
+IMB_DLL_EXPORT void sha1_one_block_sse_shani(const void *data, void *digest);
+
 /* Moved from MB MGR */
 
 IMB_JOB *submit_job_hmac_ni_sse(MB_MGR_HMAC_SHA_1_OOO *state,
diff --git a/lib/include/sha_generic.h b/lib/include/sha_generic.h
index 9329da22..eaec749a 100644
--- a/lib/include/sha_generic.h
+++ b/lib/include/sha_generic.h
@@ -39,6 +39,7 @@
 
 extern void sha1_block_sse(const void *, void *);
 extern void sha1_block_avx(const void *, void *);
+extern void sha1_ni_block_sse(const void *, void *);
 
 extern void sha224_block_sse(const void *, void *);
 extern void sha224_block_avx(const void *, void *);
@@ -52,6 +53,11 @@ extern void sha384_block_avx(const void *, void *);
 extern void sha512_block_sse(const void *, void *);
 extern void sha512_block_avx(const void *, void *);
 
+enum arch_type {
+        ARCH_SSE = 0,
+        ARCH_SSE_SHANI,
+        ARCH_AVX
+};
 
 /* ========================================================================== */
 /*
@@ -116,30 +122,32 @@ void copy_bswap8_array(void *dst, const void *src, const size_t num)
 __forceinline
 void
 sha_generic_one_block(const void *inp, void *digest,
-                      const int is_avx, const int sha_type)
+                      const enum arch_type arch, const int sha_type)
 {
         if (sha_type == 1) {
-                if (is_avx)
+                if (arch == ARCH_AVX)
                         sha1_block_avx(inp, digest);
-                else
+                else if (arch == ARCH_SSE)
                         sha1_block_sse(inp, digest);
+                else /* arch == ARCH_SSE_SHANI */
+                        sha1_ni_block_sse(inp, digest);
         } else if (sha_type == 224) {
-                if (is_avx)
+                if (arch == ARCH_AVX)
                         sha224_block_avx(inp, digest);
                 else
                         sha224_block_sse(inp, digest);
         } else if (sha_type == 256) {
-                if (is_avx)
+                if (arch == ARCH_AVX)
                         sha256_block_avx(inp, digest);
                 else
                         sha256_block_sse(inp, digest);
         } else if (sha_type == 384) {
-                if (is_avx)
+                if (arch == ARCH_AVX)
                         sha384_block_avx(inp, digest);
                 else
                         sha384_block_sse(inp, digest);
         } else if (sha_type == 512) {
-                if (is_avx)
+                if (arch == ARCH_AVX)
                         sha512_block_avx(inp, digest);
                 else
                         sha512_block_sse(inp, digest);
@@ -252,8 +260,8 @@ void sha_generic_write_digest(void *dst, const void *src, const int sha_type)
 __forceinline
 void
 sha_generic(const void *data, const uint64_t length, void *digest,
-            const int is_avx, const int sha_type, const uint64_t blk_size,
-            const uint64_t pad_size)
+            const enum arch_type arch, const int sha_type,
+            const uint64_t blk_size, const uint64_t pad_size)
 {
 #ifdef SAFE_PARAM
         imb_set_errno(NULL, 0);
@@ -279,7 +287,7 @@ sha_generic(const void *data, const uint64_t length, void *digest,
         sha_generic_init(ld, sha_type);
 
         for (idx = 0; (idx + blk_size) <= length; idx += blk_size)
-                sha_generic_one_block(&inp[idx], ld, is_avx, sha_type);
+                sha_generic_one_block(&inp[idx], ld, arch, sha_type);
 
         r = length % blk_size;
 
@@ -289,19 +297,19 @@ sha_generic(const void *data, const uint64_t length, void *digest,
 
         if (r >= (blk_size - pad_size)) {
                 /* length will be encoded in the next block */
-                sha_generic_one_block(cb, ld, is_avx, sha_type);
+                sha_generic_one_block(cb, ld, arch, sha_type);
                 memset(cb, 0, sizeof(cb));
         }
 
         store8_be(&cb[blk_size - 8], length * 8 /* bit length */);
-        sha_generic_one_block(cb, ld, is_avx, sha_type);
+        sha_generic_one_block(cb, ld, arch, sha_type);
 
         sha_generic_write_digest(digest, ld, sha_type);
 #ifdef SAFE_DATA
         clear_mem(cb, sizeof(cb));
         clear_mem(&local_digest, sizeof(local_digest));
         clear_scratch_gps();
-        if (is_avx)
+        if (arch == ARCH_AVX)
                 clear_scratch_xmms_avx();
         else
                 clear_scratch_xmms_sse();
@@ -310,7 +318,7 @@ sha_generic(const void *data, const uint64_t length, void *digest,
 
 __forceinline
 void sha_generic_1block(const void *data, void *digest,
-                        const int is_avx, const int sha_type)
+                        const enum arch_type arch, const int sha_type)
 {
 #ifdef SAFE_PARAM
         imb_set_errno(NULL, 0);
@@ -324,10 +332,10 @@ void sha_generic_1block(const void *data, void *digest,
         }
 #endif
         sha_generic_init(digest, sha_type);
-        sha_generic_one_block(data, digest, is_avx, sha_type);
+        sha_generic_one_block(data, digest, arch, sha_type);
 #ifdef SAFE_DATA
         clear_scratch_gps();
-        if (is_avx)
+        if (arch == ARCH_AVX)
                 clear_scratch_xmms_avx();
         else
                 clear_scratch_xmms_sse();
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index 6e6bb735..e4619216 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -704,3 +704,5 @@ EXPORTS
     imb_set_session                             @678
     ghash_pre_avx_gen4                          @679
     ghash_pre_avx512                            @680
+    sha1_sse_shani                              @681
+    sha1_one_block_sse_shani                    @682
diff --git a/lib/sse_t1/sha_sse.c b/lib/sse_t1/sha_sse.c
index c43a3b96..277ac97b 100644
--- a/lib/sse_t1/sha_sse.c
+++ b/lib/sse_t1/sha_sse.c
@@ -33,7 +33,7 @@
 
 void sha1_one_block_sse(const void *data, void *digest)
 {
-        sha_generic_1block(data, digest, 0 /* SSE */, 1 /* SHA1 */);
+        sha_generic_1block(data, digest, ARCH_SSE, 1 /* SHA1 */);
 }
 
 /* ========================================================================== */
@@ -43,7 +43,7 @@ void sha1_one_block_sse(const void *data, void *digest)
 
 void sha1_sse(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, 0 /* SSE */, 1, IMB_SHA1_BLOCK_SIZE,
+        sha_generic(data, length, digest, ARCH_SSE, 1, IMB_SHA1_BLOCK_SIZE,
                     SHA1_PAD_SIZE);
 }
 
@@ -52,7 +52,7 @@ void sha1_sse(const void *data, const uint64_t length, void *digest)
 
 void sha224_one_block_sse(const void *data, void *digest)
 {
-        sha_generic_1block(data, digest, 0 /* SSE */, 224 /* SHA224 */);
+        sha_generic_1block(data, digest, ARCH_SSE, 224 /* SHA224 */);
 }
 
 /* ========================================================================== */
@@ -61,7 +61,7 @@ void sha224_one_block_sse(const void *data, void *digest)
  */
 void sha224_sse(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, 0 /* SSE */, 224,
+        sha_generic(data, length, digest, ARCH_SSE, 224,
                     IMB_SHA_256_BLOCK_SIZE, SHA224_PAD_SIZE);
 }
 
@@ -70,7 +70,7 @@ void sha224_sse(const void *data, const uint64_t length, void *digest)
 
 void sha256_one_block_sse(const void *data, void *digest)
 {
-        sha_generic_1block(data, digest, 0 /* SSE */, 256 /* SHA256 */);
+        sha_generic_1block(data, digest, ARCH_SSE, 256 /* SHA256 */);
 }
 
 /* ========================================================================== */
@@ -79,7 +79,7 @@ void sha256_one_block_sse(const void *data, void *digest)
  */
 void sha256_sse(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, 0 /* SSE */, 256,
+        sha_generic(data, length, digest, ARCH_SSE, 256,
                     IMB_SHA_256_BLOCK_SIZE, SHA256_PAD_SIZE);
 }
 
@@ -88,7 +88,7 @@ void sha256_sse(const void *data, const uint64_t length, void *digest)
 
 void sha384_one_block_sse(const void *data, void *digest)
 {
-        sha_generic_1block(data, digest, 0 /* SSE */, 384 /* SHA384 */);
+        sha_generic_1block(data, digest, ARCH_SSE, 384 /* SHA384 */);
 }
 
 /* ========================================================================== */
@@ -97,7 +97,7 @@ void sha384_one_block_sse(const void *data, void *digest)
  */
 void sha384_sse(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, 0 /* SSE */, 384,
+        sha_generic(data, length, digest, ARCH_SSE, 384,
                     IMB_SHA_384_BLOCK_SIZE, SHA384_PAD_SIZE);
 }
 
@@ -106,7 +106,7 @@ void sha384_sse(const void *data, const uint64_t length, void *digest)
 
 void sha512_one_block_sse(const void *data, void *digest)
 {
-        sha_generic_1block(data, digest, 0 /* SSE */, 512 /* SHA512 */);
+        sha_generic_1block(data, digest, ARCH_SSE, 512 /* SHA512 */);
 }
 
 /* ========================================================================== */
@@ -115,6 +115,6 @@ void sha512_one_block_sse(const void *data, void *digest)
  */
 void sha512_sse(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, 0 /* SSE */, 512,
+        sha_generic(data, length, digest, ARCH_SSE, 512,
                     IMB_SHA_512_BLOCK_SIZE, SHA512_PAD_SIZE);
 }
diff --git a/lib/sse_t2/mb_mgr_sse_t2.c b/lib/sse_t2/mb_mgr_sse_t2.c
index f28c9c53..8f52d218 100644
--- a/lib/sse_t2/mb_mgr_sse_t2.c
+++ b/lib/sse_t2/mb_mgr_sse_t2.c
@@ -377,8 +377,8 @@ init_mb_mgr_sse_t2_internal(IMB_MGR *state, const int reset_mgrs)
         state->xcbc_keyexp         = aes_xcbc_expand_key_sse;
         state->des_key_sched       = des_key_schedule;
 
-        state->sha1_one_block      = sha1_one_block_sse;
-        state->sha1                = sha1_sse;
+        state->sha1_one_block      = sha1_one_block_sse_shani;
+        state->sha1                = sha1_sse_shani;
         state->sha224_one_block    = sha224_one_block_sse;
         state->sha224              = sha224_sse;
         state->sha256_one_block    = sha256_one_block_sse;
diff --git a/lib/sse_t2/sha1_ni_one_block_sse.asm b/lib/sse_t2/sha1_ni_one_block_sse.asm
new file mode 100644
index 00000000..ef9e9093
--- /dev/null
+++ b/lib/sse_t2/sha1_ni_one_block_sse.asm
@@ -0,0 +1,291 @@
+;;
+;; Copyright (c) 2023, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+
+%include "include/os.inc"
+%ifdef LINUX
+%define INP	rdi ; 1st arg
+%define CTX     rsi ; 2nd arg
+%define REG3	edx
+%define REG4	ecx
+%else
+%define INP	rcx ; 1st arg
+%define CTX     rdx ; 2nd arg
+%define REG3	edi
+%define REG4	esi
+%endif
+
+struc frame
+.ABCD_SAVE	reso	1
+.E_SAVE		reso	1
+.XMM_SAVE	reso	3
+.align		resq	1
+endstruc
+
+%define ABCD		xmm0
+%define E0		xmm1	; Need two E's b/c they ping pong
+%define E1		xmm2
+%define MSG0		xmm3
+%define MSG1		xmm4
+%define MSG2		xmm5
+%define MSG3		xmm6
+
+%define SHUF_MASK	xmm14
+%define E_MASK		xmm15
+
+mksection .rodata
+default rel
+align 64
+PSHUFFLE_BYTE_FLIP_MASK: ;ddq 0x000102030405060708090a0b0c0d0e0f
+	dq 0x08090a0b0c0d0e0f, 0x0001020304050607
+UPPER_WORD_MASK:         ;ddq 0xFFFFFFFF000000000000000000000000
+	dq 0x0000000000000000, 0xFFFFFFFF00000000
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; void sha1_ni_block_sse(void *input_data, UINT32 digest[5])
+;; arg 1 : (in) pointer to one block of data
+;; arg 2 : (in/out) pointer to read/write digest
+
+mksection .text
+MKGLOBAL(sha1_ni_block_sse,function,internal)
+align 32
+sha1_ni_block_sse:
+	sub		rsp, frame_size
+
+%ifndef LINUX
+	movdqa		[rsp + frame.XMM_SAVE], xmm6
+	movdqa		[rsp + frame.XMM_SAVE + 16], xmm14
+	movdqa		[rsp + frame.XMM_SAVE + 16*2], xmm15
+%endif
+
+	;; load initial digest
+        movdqu          ABCD, [CTX]
+        pxor            E0, E0
+        pinsrd          E0, [CTX + 16], 3
+	pshufd		ABCD, ABCD, 0x1B
+
+	movdqa		SHUF_MASK, [rel PSHUFFLE_BYTE_FLIP_MASK]
+	movdqa		E_MASK, [rel UPPER_WORD_MASK]
+
+	;; Copy digests
+	movdqa		[rsp + frame.ABCD_SAVE], ABCD
+	movdqa		[rsp + frame.E_SAVE],    E0
+
+	;; Only needed if not using sha1nexte for rounds 0-3
+	pand		E0,   E_MASK
+
+	;; Rounds 0-3
+	movdqu		MSG0, [INP + 0*16]
+	pshufb		MSG0, SHUF_MASK
+	paddd		E0, MSG0
+	movdqa		E1, ABCD
+	sha1rnds4	ABCD, E0, 0
+
+	;; Rounds 4-7
+	movdqu		MSG1, [INP + 1*16]
+	pshufb		MSG1, SHUF_MASK
+	sha1nexte	E1, MSG1
+	movdqa		E0, ABCD
+	sha1rnds4	ABCD, E1, 0
+	sha1msg1	MSG0, MSG1
+
+	;; Rounds 8-11
+	movdqu		MSG2, [INP + 2*16]
+	pshufb		MSG2, SHUF_MASK
+	sha1nexte	E0, MSG2
+	movdqa		E1, ABCD
+	sha1rnds4	ABCD, E0, 0
+	sha1msg1	MSG1, MSG2
+	pxor		MSG0, MSG2
+
+	;; Rounds 12-15
+	movdqu		MSG3, [INP + 3*16]
+	pshufb		MSG3, SHUF_MASK
+	sha1nexte	E1, MSG3
+	movdqa		E0, ABCD
+	sha1msg2	MSG0, MSG3
+	sha1rnds4	ABCD, E1, 0
+	sha1msg1	MSG2, MSG3
+	pxor		MSG1, MSG3
+
+	;; Rounds 16-19
+	sha1nexte	E0, MSG0
+	movdqa		E1, ABCD
+	sha1msg2	MSG1, MSG0
+	sha1rnds4	ABCD, E0, 0
+	sha1msg1	MSG3, MSG0
+	pxor		MSG2, MSG0
+
+	;; Rounds 20-23
+	sha1nexte	E1, MSG1
+	movdqa		E0, ABCD
+	sha1msg2	MSG2, MSG1
+	sha1rnds4	ABCD, E1, 1
+	sha1msg1	MSG0, MSG1
+	pxor		MSG3, MSG1
+
+	;; Rounds 24-27
+	sha1nexte	E0, MSG2
+	movdqa		E1, ABCD
+	sha1msg2	MSG3, MSG2
+	sha1rnds4	ABCD, E0, 1
+	sha1msg1	MSG1, MSG2
+	pxor		MSG0, MSG2
+
+	;; Rounds 28-31
+	sha1nexte	E1, MSG3
+	movdqa		E0, ABCD
+	sha1msg2	MSG0, MSG3
+	sha1rnds4	ABCD, E1, 1
+	sha1msg1	MSG2, MSG3
+	pxor		MSG1, MSG3
+
+	;; Rounds 32-35
+	sha1nexte	E0, MSG0
+	movdqa		E1, ABCD
+	sha1msg2	MSG1, MSG0
+	sha1rnds4	ABCD, E0, 1
+	sha1msg1	MSG3, MSG0
+	pxor		MSG2, MSG0
+
+	;; Rounds 36-39
+	sha1nexte	E1, MSG1
+	movdqa		E0, ABCD
+	sha1msg2	MSG2, MSG1
+	sha1rnds4	ABCD, E1, 1
+	sha1msg1	MSG0, MSG1
+	pxor		MSG3, MSG1
+
+	;; Rounds 40-43
+	sha1nexte	E0, MSG2
+	movdqa		E1, ABCD
+	sha1msg2	MSG3, MSG2
+	sha1rnds4	ABCD, E0, 2
+	sha1msg1	MSG1, MSG2
+	pxor		MSG0, MSG2
+
+	;; Rounds 44-47
+	sha1nexte	E1, MSG3
+	movdqa		E0, ABCD
+	sha1msg2	MSG0, MSG3
+	sha1rnds4	ABCD, E1, 2
+	sha1msg1	MSG2, MSG3
+	pxor		MSG1, MSG3
+
+	;; Rounds 48-51
+	sha1nexte	E0, MSG0
+	movdqa		E1, ABCD
+	sha1msg2	MSG1, MSG0
+	sha1rnds4	ABCD, E0, 2
+	sha1msg1	MSG3, MSG0
+	pxor		MSG2, MSG0
+
+	;; Rounds 52-55
+	sha1nexte	E1, MSG1
+	movdqa		E0, ABCD
+	sha1msg2	MSG2, MSG1
+	sha1rnds4	ABCD, E1, 2
+	sha1msg1	MSG0, MSG1
+	pxor		MSG3, MSG1
+
+	;; Rounds 56-59
+	sha1nexte	E0, MSG2
+	movdqa		E1, ABCD
+	sha1msg2	MSG3, MSG2
+	sha1rnds4	ABCD, E0, 2
+	sha1msg1	MSG1, MSG2
+	pxor		MSG0, MSG2
+
+	;; Rounds 60-63
+	sha1nexte	E1, MSG3
+	movdqa		E0, ABCD
+	sha1msg2	MSG0, MSG3
+	sha1rnds4	ABCD, E1, 3
+	sha1msg1	MSG2, MSG3
+	pxor		MSG1, MSG3
+
+	;; Rounds 64-67
+	sha1nexte	E0, MSG0
+	movdqa		E1, ABCD
+	sha1msg2	MSG1, MSG0
+	sha1rnds4	ABCD, E0, 3
+	sha1msg1	MSG3, MSG0
+	pxor		MSG2, MSG0
+
+	;; Rounds 68-71
+	sha1nexte	E1, MSG1
+	movdqa		E0, ABCD
+	sha1msg2	MSG2, MSG1
+	sha1rnds4	ABCD, E1, 3
+	pxor		MSG3, MSG1
+
+	;; Rounds 72-75
+	sha1nexte	E0, MSG2
+	movdqa		E1, ABCD
+	sha1msg2	MSG3, MSG2
+	sha1rnds4	ABCD, E0, 3
+
+	;; Rounds 76-79
+	sha1nexte	E1, MSG3
+	movdqa		E0, ABCD
+	sha1rnds4	ABCD, E1, 3
+
+	;; Need to rotate E left by 30
+	movdqa		E1, E0
+	pslld		E0, 30
+	psrld		E1, 2
+	pxor		E0, E1
+
+	paddd		ABCD, [rsp + frame.ABCD_SAVE]
+	paddd		E0,   [rsp + frame.E_SAVE]
+
+	;; write out digests
+	pshufd		ABCD, ABCD, 0x1B
+        movdqu          [CTX], ABCD
+        pextrd          [CTX + 16], E0, 3
+
+        ;; Clear stack frame (4*16 bytes)
+%ifdef SAFE_DATA
+        pxor    MSG0, MSG0
+        pxor    MSG1, MSG1
+        pxor    MSG2, MSG2
+        pxor    MSG3, MSG3
+
+        movdqa   [rsp + frame.ABCD_SAVE], MSG0
+        movdqa   [rsp + frame.E_SAVE], MSG0
+%endif
+
+%ifndef LINUX
+	movdqa		xmm6, [rsp + frame.XMM_SAVE]
+	movdqa		xmm14, [rsp + frame.XMM_SAVE + 16]
+	movdqa		xmm15, [rsp + frame.XMM_SAVE + 16*2]
+%endif
+	add		rsp, frame_size
+
+	ret
+
+mksection stack-noexec
diff --git a/lib/sse_t2/sha_ni_sse.c b/lib/sse_t2/sha_ni_sse.c
new file mode 100644
index 00000000..0c789d1d
--- /dev/null
+++ b/lib/sse_t2/sha_ni_sse.c
@@ -0,0 +1,48 @@
+/*******************************************************************************
+  Copyright (c) 2023, Intel Corporation
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions are met:
+
+      * Redistributions of source code must retain the above copyright notice,
+        this list of conditions and the following disclaimer.
+      * Redistributions in binary form must reproduce the above copyright
+        notice, this list of conditions and the following disclaimer in the
+        documentation and/or other materials provided with the distribution.
+      * Neither the name of Intel Corporation nor the names of its contributors
+        may be used to endorse or promote products derived from this software
+        without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+  DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+  FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+  DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+  SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*******************************************************************************/
+
+#include "include/sha_generic.h"
+#include "include/arch_sse_type2.h"
+
+/* ========================================================================== */
+/* One block SHA1 computation for IPAD / OPAD usage only */
+
+void sha1_one_block_sse_shani(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_SSE_SHANI, 1 /* SHA1 */);
+}
+
+/* ========================================================================== */
+/*
+ * SHA1 API for use in HMAC-SHA1 when key is longer than the block size
+ */
+
+void sha1_sse_shani(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_SSE_SHANI, 1, IMB_SHA1_BLOCK_SIZE,
+                    SHA1_PAD_SIZE);
+}
diff --git a/lib/sse_t3/mb_mgr_sse_t3.c b/lib/sse_t3/mb_mgr_sse_t3.c
index 7a674c82..ad757a16 100644
--- a/lib/sse_t3/mb_mgr_sse_t3.c
+++ b/lib/sse_t3/mb_mgr_sse_t3.c
@@ -378,8 +378,8 @@ init_mb_mgr_sse_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->xcbc_keyexp         = aes_xcbc_expand_key_sse;
         state->des_key_sched       = des_key_schedule;
 
-        state->sha1_one_block      = sha1_one_block_sse;
-        state->sha1                = sha1_sse;
+        state->sha1_one_block      = sha1_one_block_sse_shani;
+        state->sha1                = sha1_sse_shani;
         state->sha224_one_block    = sha224_one_block_sse;
         state->sha224              = sha224_sse;
         state->sha256_one_block    = sha256_one_block_sse;
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 6d8b3ea0..96e62fd0 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -228,6 +228,7 @@ lib_objs1 = \
 	$(OBJ_DIR)\sha1_ni_x1_sse.obj \
 	$(OBJ_DIR)\sha1_one_block_avx.obj \
 	$(OBJ_DIR)\sha1_one_block_sse.obj \
+	$(OBJ_DIR)\sha1_ni_one_block_sse.obj \
 	$(OBJ_DIR)\sha1_x8_avx2.obj \
 	$(OBJ_DIR)\sha1_x16_avx512.obj \
 	$(OBJ_DIR)\sha224_one_block_avx.obj \
@@ -280,6 +281,7 @@ lib_objs1 = \
 	$(OBJ_DIR)\aes_xcbc_expand_key.obj \
 	$(OBJ_DIR)\md5_one_block.obj \
 	$(OBJ_DIR)\sha_sse.obj \
+	$(OBJ_DIR)\sha_ni_sse.obj \
 	$(OBJ_DIR)\sha_avx.obj \
 	$(OBJ_DIR)\sha_avx2.obj \
 	$(OBJ_DIR)\sha_avx512.obj \
-- 
GitLab


From 08c66c1586993092b31820d600bbc1c5d45c9903 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Wed, 10 May 2023 17:34:38 +0100
Subject: [PATCH 278/332] sse: [SHA256] add SHA-NI single block implementation

---
 lib/Makefile                           |   1 +
 lib/avx2_t2/mb_mgr_avx2_t2.c           |   8 +-
 lib/avx2_t3/mb_mgr_avx2_t3.c           |   8 +-
 lib/avx512_t2/mb_mgr_avx512_t2.c       |   8 +-
 lib/avx_t2/mb_mgr_avx_t2.c             |   8 +-
 lib/include/arch_sse_type2.h           |   8 +
 lib/include/sha_generic.h              |  10 +-
 lib/libIPSec_MB.def                    |   4 +
 lib/sse_t2/mb_mgr_sse_t2.c             |   8 +-
 lib/sse_t2/sha256_ni_one_block_sse.asm | 323 +++++++++++++++++++++++++
 lib/sse_t2/sha256_ni_x1_sse.asm        |   2 +-
 lib/sse_t2/sha_ni_sse.c                |  34 +++
 lib/sse_t3/mb_mgr_sse_t3.c             |   8 +-
 lib/win_x64.mak                        |   1 +
 14 files changed, 404 insertions(+), 27 deletions(-)
 create mode 100644 lib/sse_t2/sha256_ni_one_block_sse.asm

diff --git a/lib/Makefile b/lib/Makefile
index 51fb468d..1aaaaad5 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -459,6 +459,7 @@ asm_sse_lib_objs := \
 	sha384_one_block_sse.o \
 	sha512_one_block_sse.o \
 	sha1_ni_one_block_sse.o \
+	sha256_ni_one_block_sse.o \
 	sha512_x2_sse.o \
 	sha256_mult_sse.o \
 	sha1_ni_x2_sse.o \
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index d2837875..a265ff40 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -375,10 +375,10 @@ init_mb_mgr_avx2_t2_internal(IMB_MGR *state, const int reset_mgrs)
 
         state->sha1_one_block      = sha1_one_block_sse_shani;
         state->sha1                = sha1_sse_shani;
-        state->sha224_one_block    = sha224_one_block_avx2;
-        state->sha224              = sha224_avx2;
-        state->sha256_one_block    = sha256_one_block_avx2;
-        state->sha256              = sha256_avx2;
+        state->sha224_one_block    = sha224_one_block_sse_shani;
+        state->sha224              = sha224_sse_shani;
+        state->sha256_one_block    = sha256_one_block_sse_shani;
+        state->sha256              = sha256_sse_shani;
         state->sha384_one_block    = sha384_one_block_avx2;
         state->sha384              = sha384_avx2;
         state->sha512_one_block    = sha512_one_block_avx2;
diff --git a/lib/avx2_t3/mb_mgr_avx2_t3.c b/lib/avx2_t3/mb_mgr_avx2_t3.c
index 052a7fde..1b7c85f8 100644
--- a/lib/avx2_t3/mb_mgr_avx2_t3.c
+++ b/lib/avx2_t3/mb_mgr_avx2_t3.c
@@ -376,10 +376,10 @@ init_mb_mgr_avx2_t3_internal(IMB_MGR *state, const int reset_mgrs)
 
         state->sha1_one_block      = sha1_one_block_sse_shani;
         state->sha1                = sha1_sse_shani;
-        state->sha224_one_block    = sha224_one_block_avx2;
-        state->sha224              = sha224_avx2;
-        state->sha256_one_block    = sha256_one_block_avx2;
-        state->sha256              = sha256_avx2;
+        state->sha224_one_block    = sha224_one_block_sse_shani;
+        state->sha224              = sha224_sse_shani;
+        state->sha256_one_block    = sha256_one_block_sse_shani;
+        state->sha256              = sha256_sse_shani;
         state->sha384_one_block    = sha384_one_block_avx2;
         state->sha384              = sha384_avx2;
         state->sha512_one_block    = sha512_one_block_avx2;
diff --git a/lib/avx512_t2/mb_mgr_avx512_t2.c b/lib/avx512_t2/mb_mgr_avx512_t2.c
index 638975e7..48c1b0af 100644
--- a/lib/avx512_t2/mb_mgr_avx512_t2.c
+++ b/lib/avx512_t2/mb_mgr_avx512_t2.c
@@ -487,10 +487,10 @@ init_mb_mgr_avx512_t2_internal(IMB_MGR *state, const int reset_mgrs)
 
         state->sha1_one_block      = sha1_one_block_sse_shani;
         state->sha1                = sha1_sse_shani;
-        state->sha224_one_block    = sha224_one_block_avx512;
-        state->sha224              = sha224_avx512;
-        state->sha256_one_block    = sha256_one_block_avx512;
-        state->sha256              = sha256_avx512;
+        state->sha224_one_block    = sha224_one_block_sse_shani;
+        state->sha224              = sha224_sse_shani;
+        state->sha256_one_block    = sha256_one_block_sse_shani;
+        state->sha256              = sha256_sse_shani;
         state->sha384_one_block    = sha384_one_block_avx512;
         state->sha384              = sha384_avx512;
         state->sha512_one_block    = sha512_one_block_avx512;
diff --git a/lib/avx_t2/mb_mgr_avx_t2.c b/lib/avx_t2/mb_mgr_avx_t2.c
index 1f6af071..352a26ab 100644
--- a/lib/avx_t2/mb_mgr_avx_t2.c
+++ b/lib/avx_t2/mb_mgr_avx_t2.c
@@ -376,10 +376,10 @@ init_mb_mgr_avx_t2_internal(IMB_MGR *state, const int reset_mgrs)
 
         state->sha1_one_block      = sha1_one_block_sse_shani;
         state->sha1                = sha1_sse_shani;
-        state->sha224_one_block    = sha224_one_block_avx;
-        state->sha224              = sha224_avx;
-        state->sha256_one_block    = sha256_one_block_avx;
-        state->sha256              = sha256_avx;
+        state->sha224_one_block    = sha224_one_block_sse_shani;
+        state->sha224              = sha224_sse_shani;
+        state->sha256_one_block    = sha256_one_block_sse_shani;
+        state->sha256              = sha256_sse_shani;
         state->sha384_one_block    = sha384_one_block_avx;
         state->sha384              = sha384_avx;
         state->sha512_one_block    = sha512_one_block_avx;
diff --git a/lib/include/arch_sse_type2.h b/lib/include/arch_sse_type2.h
index 2d4ee88d..af5df55a 100644
--- a/lib/include/arch_sse_type2.h
+++ b/lib/include/arch_sse_type2.h
@@ -42,6 +42,14 @@ IMB_DLL_EXPORT void sha1_sse_shani(const void *data, const uint64_t length,
                                    void *digest);
 IMB_DLL_EXPORT void sha1_one_block_sse_shani(const void *data, void *digest);
 
+IMB_DLL_EXPORT void sha224_sse_shani(const void *data, const uint64_t length,
+                                   void *digest);
+IMB_DLL_EXPORT void sha224_one_block_sse_shani(const void *data, void *digest);
+
+IMB_DLL_EXPORT void sha256_sse_shani(const void *data, const uint64_t length,
+                                   void *digest);
+IMB_DLL_EXPORT void sha256_one_block_sse_shani(const void *data, void *digest);
+
 /* Moved from MB MGR */
 
 IMB_JOB *submit_job_hmac_ni_sse(MB_MGR_HMAC_SHA_1_OOO *state,
diff --git a/lib/include/sha_generic.h b/lib/include/sha_generic.h
index eaec749a..d71946f4 100644
--- a/lib/include/sha_generic.h
+++ b/lib/include/sha_generic.h
@@ -46,6 +46,7 @@ extern void sha224_block_avx(const void *, void *);
 
 extern void sha256_block_sse(const void *, void *);
 extern void sha256_block_avx(const void *, void *);
+extern void sha256_ni_block_sse(const void *, void *);
 
 extern void sha384_block_sse(const void *, void *);
 extern void sha384_block_avx(const void *, void *);
@@ -134,13 +135,18 @@ sha_generic_one_block(const void *inp, void *digest,
         } else if (sha_type == 224) {
                 if (arch == ARCH_AVX)
                         sha224_block_avx(inp, digest);
-                else
+                else if (arch == ARCH_SSE)
                         sha224_block_sse(inp, digest);
+                else /* arch == ARCH_SSE_SHANI */
+                        /* Same as SHA-224 */
+                        sha256_ni_block_sse(inp, digest);
         } else if (sha_type == 256) {
                 if (arch == ARCH_AVX)
                         sha256_block_avx(inp, digest);
-                else
+                else if (arch == ARCH_SSE)
                         sha256_block_sse(inp, digest);
+                else /* arch == ARCH_SSE_SHANI */
+                        sha256_ni_block_sse(inp, digest);
         } else if (sha_type == 384) {
                 if (arch == ARCH_AVX)
                         sha384_block_avx(inp, digest);
diff --git a/lib/libIPSec_MB.def b/lib/libIPSec_MB.def
index e4619216..97a31cdb 100644
--- a/lib/libIPSec_MB.def
+++ b/lib/libIPSec_MB.def
@@ -706,3 +706,7 @@ EXPORTS
     ghash_pre_avx512                            @680
     sha1_sse_shani                              @681
     sha1_one_block_sse_shani                    @682
+    sha224_sse_shani                            @683
+    sha224_one_block_sse_shani                  @684
+    sha256_sse_shani                            @685
+    sha256_one_block_sse_shani                  @686
diff --git a/lib/sse_t2/mb_mgr_sse_t2.c b/lib/sse_t2/mb_mgr_sse_t2.c
index 8f52d218..ae47fa3e 100644
--- a/lib/sse_t2/mb_mgr_sse_t2.c
+++ b/lib/sse_t2/mb_mgr_sse_t2.c
@@ -379,10 +379,10 @@ init_mb_mgr_sse_t2_internal(IMB_MGR *state, const int reset_mgrs)
 
         state->sha1_one_block      = sha1_one_block_sse_shani;
         state->sha1                = sha1_sse_shani;
-        state->sha224_one_block    = sha224_one_block_sse;
-        state->sha224              = sha224_sse;
-        state->sha256_one_block    = sha256_one_block_sse;
-        state->sha256              = sha256_sse;
+        state->sha224_one_block    = sha224_one_block_sse_shani;
+        state->sha224              = sha224_sse_shani;
+        state->sha256_one_block    = sha256_one_block_sse_shani;
+        state->sha256              = sha256_sse_shani;
         state->sha384_one_block    = sha384_one_block_sse;
         state->sha384              = sha384_sse;
         state->sha512_one_block    = sha512_one_block_sse;
diff --git a/lib/sse_t2/sha256_ni_one_block_sse.asm b/lib/sse_t2/sha256_ni_one_block_sse.asm
new file mode 100644
index 00000000..9d100160
--- /dev/null
+++ b/lib/sse_t2/sha256_ni_one_block_sse.asm
@@ -0,0 +1,323 @@
+;
+;; Copyright (c) 2023, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+
+%include "include/os.inc"
+%include "include/clear_regs.inc"
+
+; resdq = res0 => 16 bytes
+struc frame
+.ABEF_SAVE	reso	1
+.CDGH_SAVE	reso	1
+.XMM_SAVE	reso	3
+.align		resq	1
+endstruc
+
+%ifdef LINUX
+%define INP	rdi ; 1st arg
+%define CTX     rsi ; 2nd arg
+%define REG3	edx
+%define REG4	ecx
+%else
+%define INP	rcx ; 1st arg
+%define CTX     rdx ; 2nd arg
+%define REG3	edi
+%define REG4	esi
+%endif
+
+;; MSG MUST be xmm0 (implicit argument)
+%define MSG		xmm0
+%define STATE0		xmm1
+%define STATE1		xmm2
+%define MSGTMP0		xmm3
+%define MSGTMP1		xmm4
+%define MSGTMP2		xmm5
+%define MSGTMP3		xmm6
+%define MSGTMP4		xmm7
+%define MSGTMP		xmm14
+%define SHUF_MASK	xmm15
+
+mksection .rodata
+default rel
+
+extern K256
+
+align 64
+PSHUFFLE_BYTE_FLIP_MASK:
+	dq 0x0405060700010203, 0x0c0d0e0f08090a0b
+
+mksection .text
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; void sha256_ni_block_sse(void *input_data, UINT32 digest[8])
+;; arg 1 : (in) pointer to one block of data
+;; arg 2 : (in/out) pointer to read/write digest
+
+MKGLOBAL(sha256_ni_block_sse,function,internal)
+align 32
+sha256_ni_block_sse:
+	sub		rsp, frame_size
+
+%ifndef LINUX
+	movdqa		[rsp + frame.XMM_SAVE], xmm6
+	movdqa		[rsp + frame.XMM_SAVE + 16], xmm14
+	movdqa		[rsp + frame.XMM_SAVE + 16*2], xmm15
+%endif
+
+	;; load initial digest
+	;; Probably need to reorder these appropriately
+	;; DCBA, HGFE -> ABEF, CDGH
+	movdqu		STATE0, [CTX]
+	movdqu		STATE1,	[CTX + 16]
+
+	pshufd		STATE0, STATE0, 0xB1	; CDAB
+	pshufd		STATE1, STATE1, 0x1B	; EFGH
+	movdqa		MSGTMP4, STATE0
+	palignr		STATE0, STATE1, 8	; ABEF
+	pblendw		STATE1, MSGTMP4, 0xF0	; CDGH
+
+	movdqa		SHUF_MASK, [rel PSHUFFLE_BYTE_FLIP_MASK]
+
+	;; Save digests
+	movdqa		[rsp + frame.ABEF_SAVE], STATE0
+	movdqa		[rsp + frame.CDGH_SAVE], STATE1
+
+	;; Rounds 0-3
+	movdqu		MSG, [INP + 0*16]
+	pshufb		MSG, SHUF_MASK
+	movdqa		MSGTMP0, MSG
+	paddd		MSG, [rel K256 + 0*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+
+	;; Rounds 4-7
+	movdqu		MSG, [INP + 1*16]
+	pshufb		MSG, SHUF_MASK
+	movdqa		MSGTMP1, MSG
+	paddd		MSG, [rel K256 + 1*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP0, MSGTMP1
+
+	;; Rounds 8-11
+	movdqu		MSG, [INP + 2*16]
+	pshufb		MSG, SHUF_MASK
+	movdqa		MSGTMP2, MSG
+	paddd		MSG, [rel K256 + 2*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP1, MSGTMP2
+
+	;; Rounds 12-15
+	movdqu		MSG, [INP + 3*16]
+	pshufb		MSG, SHUF_MASK
+	movdqa		MSGTMP3, MSG
+	paddd		MSG, [rel K256 + 3*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP3
+	palignr		MSGTMP, MSGTMP2, 4
+	paddd		MSGTMP0, MSGTMP
+	sha256msg2	MSGTMP0, MSGTMP3
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP2, MSGTMP3
+
+	;; Rounds 16-19
+	movdqa		MSG, MSGTMP0
+	paddd		MSG, [rel K256 + 4*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP0
+	palignr		MSGTMP, MSGTMP3, 4
+	paddd		MSGTMP1, MSGTMP
+	sha256msg2	MSGTMP1, MSGTMP0
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP3, MSGTMP0
+
+	;; Rounds 20-23
+	movdqa		MSG, MSGTMP1
+	paddd		MSG, [rel K256 + 5*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP1
+	palignr		MSGTMP, MSGTMP0, 4
+	paddd		MSGTMP2, MSGTMP
+	sha256msg2	MSGTMP2, MSGTMP1
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP0, MSGTMP1
+
+	;; Rounds 24-27
+	movdqa		MSG, MSGTMP2
+	paddd		MSG, [rel K256 + 6*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP2
+	palignr		MSGTMP, MSGTMP1, 4
+	paddd		MSGTMP3, MSGTMP
+	sha256msg2	MSGTMP3, MSGTMP2
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP1, MSGTMP2
+
+	;; Rounds 28-31
+	movdqa		MSG, MSGTMP3
+	paddd		MSG, [rel K256 + 7*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP3
+	palignr		MSGTMP, MSGTMP2, 4
+	paddd		MSGTMP0, MSGTMP
+	sha256msg2	MSGTMP0, MSGTMP3
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP2, MSGTMP3
+
+	;; Rounds 32-35
+	movdqa		MSG, MSGTMP0
+	paddd		MSG, [rel K256 + 8*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP0
+	palignr		MSGTMP, MSGTMP3, 4
+	paddd		MSGTMP1, MSGTMP
+	sha256msg2	MSGTMP1, MSGTMP0
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP3, MSGTMP0
+
+	;; Rounds 36-39
+        movdqa		MSG, MSGTMP1
+	paddd		MSG, [rel K256 + 9*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP1
+	palignr		MSGTMP, MSGTMP0, 4
+	paddd		MSGTMP2, MSGTMP
+	sha256msg2	MSGTMP2, MSGTMP1
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP0, MSGTMP1
+
+	;; Rounds 40-43
+	movdqa		MSG, MSGTMP2
+	paddd		MSG, [rel K256 + 10*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP2
+	palignr		MSGTMP, MSGTMP1, 4
+	paddd		MSGTMP3, MSGTMP
+	sha256msg2	MSGTMP3, MSGTMP2
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP1, MSGTMP2
+
+	;; Rounds 44-47
+	movdqa		MSG, MSGTMP3
+	paddd		MSG, [rel K256 + 11*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP3
+	palignr		MSGTMP, MSGTMP2, 4
+	paddd		MSGTMP0, MSGTMP
+	sha256msg2	MSGTMP0, MSGTMP3
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP2, MSGTMP3
+
+	;; Rounds 48-51
+	movdqa		MSG, MSGTMP0
+	paddd		MSG, [rel K256 + 12*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP0
+	palignr		MSGTMP, MSGTMP3, 4
+	paddd		MSGTMP1, MSGTMP
+	sha256msg2	MSGTMP1, MSGTMP0
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+	sha256msg1	MSGTMP3, MSGTMP0
+
+	;; Rounds 52-55
+	movdqa		MSG, MSGTMP1
+	paddd		MSG, [rel K256 + 13*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP1
+	palignr		MSGTMP, MSGTMP0, 4
+	paddd		MSGTMP2, MSGTMP
+	sha256msg2	MSGTMP2, MSGTMP1
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+
+	;; Rounds 56-59
+	movdqa		MSG, MSGTMP2
+	paddd		MSG, [rel K256 + 14*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	movdqa		MSGTMP, MSGTMP2
+	palignr		MSGTMP, MSGTMP1, 4
+	paddd		MSGTMP3, MSGTMP
+	sha256msg2	MSGTMP3, MSGTMP2
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+
+	;; Rounds 60-63
+	movdqa		MSG, MSGTMP3
+	paddd		MSG, [rel K256 + 15*16]
+	sha256rnds2	STATE1, STATE0, MSG	; MSG is implicit argument
+	pshufd 		MSG, MSG, 0x0E
+	sha256rnds2	STATE0, STATE1, MSG	; MSG is implicit argument
+
+	paddd		STATE0, [rsp + frame.ABEF_SAVE]
+	paddd		STATE1, [rsp + frame.CDGH_SAVE]
+
+	; Reorder for writeback
+	pshufd		STATE0, STATE0, 0x1B	; FEBA
+	pshufd		STATE1, STATE1, 0xB1	; DCHG
+	movdqa		MSGTMP4, STATE0
+	pblendw		STATE0, STATE1,  0xF0	; DCBA
+	palignr		STATE1, MSGTMP4,  8	; HGFE
+
+	;; update digests
+	movdqu		[CTX], STATE0
+	movdqu		[CTX + 16], STATE1
+
+        ;; Clear stack frame (2*16 bytes)
+%ifdef SAFE_DATA
+        pxor            MSGTMP0, MSGTMP0
+        pxor            MSGTMP1, MSGTMP1
+        pxor            MSGTMP2, MSGTMP2
+        pxor            MSGTMP3, MSGTMP3
+        pxor            MSGTMP4, MSGTMP4
+        pxor            MSGTMP, MSGTMP
+
+        movdqa          [rsp + frame.ABEF_SAVE], MSGTMP0
+        movdqa          [rsp + frame.CDGH_SAVE], MSGTMP0
+%endif
+
+%ifndef LINUX
+	movdqa		xmm6, [rsp + frame.XMM_SAVE]
+	movdqa		xmm14, [rsp + frame.XMM_SAVE + 16]
+	movdqa		xmm15, [rsp + frame.XMM_SAVE + 16*2]
+%endif
+        add		rsp, frame_size
+	ret
+
+mksection stack-noexec
diff --git a/lib/sse_t2/sha256_ni_x1_sse.asm b/lib/sse_t2/sha256_ni_x1_sse.asm
index bec568bd..2f86eefd 100644
--- a/lib/sse_t2/sha256_ni_x1_sse.asm
+++ b/lib/sse_t2/sha256_ni_x1_sse.asm
@@ -403,7 +403,7 @@ sha256_ni_x1:
 
 done_hash:
 
-        ;; Clear stack frame (4*16 bytes)
+        ;; Clear stack frame (2*16 bytes)
 %ifdef SAFE_DATA
         clear_all_xmms_sse_asm
         movdqa [rsp + frame.ABEF_SAVE], xmm0
diff --git a/lib/sse_t2/sha_ni_sse.c b/lib/sse_t2/sha_ni_sse.c
index 0c789d1d..e86880c6 100644
--- a/lib/sse_t2/sha_ni_sse.c
+++ b/lib/sse_t2/sha_ni_sse.c
@@ -36,6 +36,21 @@ void sha1_one_block_sse_shani(const void *data, void *digest)
         sha_generic_1block(data, digest, ARCH_SSE_SHANI, 1 /* SHA1 */);
 }
 
+/* ========================================================================== */
+/* One block SHA224 computation for IPAD / OPAD usage only */
+void sha224_one_block_sse_shani(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_SSE_SHANI, 224 /* SHA224 */);
+}
+
+/* ========================================================================== */
+/* ========================================================================== */
+/* One block SHA256 computation for IPAD / OPAD usage only */
+void sha256_one_block_sse_shani(const void *data, void *digest)
+{
+        sha_generic_1block(data, digest, ARCH_SSE_SHANI, 256 /* SHA256 */);
+}
+
 /* ========================================================================== */
 /*
  * SHA1 API for use in HMAC-SHA1 when key is longer than the block size
@@ -46,3 +61,22 @@ void sha1_sse_shani(const void *data, const uint64_t length, void *digest)
         sha_generic(data, length, digest, ARCH_SSE_SHANI, 1, IMB_SHA1_BLOCK_SIZE,
                     SHA1_PAD_SIZE);
 }
+
+/* ========================================================================== */
+/*
+ * SHA224 API for use in HMAC-SHA224 when key is longer than the block size
+ */
+void sha224_sse_shani(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_SSE_SHANI, 224, IMB_SHA_256_BLOCK_SIZE,
+                    SHA224_PAD_SIZE);
+}
+/* ========================================================================== */
+/*
+ * SHA256 API for use in HMAC-SHA256 when key is longer than the block size
+ */
+void sha256_sse_shani(const void *data, const uint64_t length, void *digest)
+{
+        sha_generic(data, length, digest, ARCH_SSE_SHANI, 256, IMB_SHA_256_BLOCK_SIZE,
+                    SHA256_PAD_SIZE);
+}
diff --git a/lib/sse_t3/mb_mgr_sse_t3.c b/lib/sse_t3/mb_mgr_sse_t3.c
index ad757a16..ff54d190 100644
--- a/lib/sse_t3/mb_mgr_sse_t3.c
+++ b/lib/sse_t3/mb_mgr_sse_t3.c
@@ -380,10 +380,10 @@ init_mb_mgr_sse_t3_internal(IMB_MGR *state, const int reset_mgrs)
 
         state->sha1_one_block      = sha1_one_block_sse_shani;
         state->sha1                = sha1_sse_shani;
-        state->sha224_one_block    = sha224_one_block_sse;
-        state->sha224              = sha224_sse;
-        state->sha256_one_block    = sha256_one_block_sse;
-        state->sha256              = sha256_sse;
+        state->sha224_one_block    = sha224_one_block_sse_shani;
+        state->sha224              = sha224_sse_shani;
+        state->sha256_one_block    = sha256_one_block_sse_shani;
+        state->sha256              = sha256_sse_shani;
         state->sha384_one_block    = sha384_one_block_sse;
         state->sha384              = sha384_sse;
         state->sha512_one_block    = sha512_one_block_sse;
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 96e62fd0..1bba2281 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -236,6 +236,7 @@ lib_objs1 = \
 	$(OBJ_DIR)\sha256_oct_avx2.obj \
 	$(OBJ_DIR)\sha256_one_block_avx.obj \
 	$(OBJ_DIR)\sha256_one_block_sse.obj \
+	$(OBJ_DIR)\sha256_ni_one_block_sse.obj \
 	$(OBJ_DIR)\sha256_ni_x2_sse.obj \
 	$(OBJ_DIR)\sha256_ni_x1_sse.obj \
 	$(OBJ_DIR)\sha256_x16_avx512.obj \
-- 
GitLab


From 9e0fa55af56fb19c1dd82a81f1dcd4307c41b5ce Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 17 May 2023 15:54:41 +0100
Subject: [PATCH 279/332] lib: [quic] remove AES-GCM-192 support in the QUIC
 API - it is not part of the standard

---
 ReleaseNotes.txt          |  2 ++
 lib/x86_64/quic_aes_gcm.c | 31 ++++---------------------------
 test/kat-app/gcm_test.c   |  9 +--------
 3 files changed, 7 insertions(+), 35 deletions(-)

diff --git a/ReleaseNotes.txt b/ReleaseNotes.txt
index 380b647d..18637768 100644
--- a/ReleaseNotes.txt
+++ b/ReleaseNotes.txt
@@ -12,6 +12,8 @@ Library
 - Optimized GHASH component in AVX512 VAES (type2) AES-GCM implementation.
 - Implemented a workaround for false load-block condition in SSE and AVX2 AES-GCM implementations.
 - Removed AVX AES-GCM implementation, its API symbols map to the SSE implementation.
+- QUIC header protection API added
+- QUIC AES-GCM-128/256 AEAD API added
 
 v1.3 September 2022
 ========================================================================
diff --git a/lib/x86_64/quic_aes_gcm.c b/lib/x86_64/quic_aes_gcm.c
index f0d13daa..5e7c6dbd 100644
--- a/lib/x86_64/quic_aes_gcm.c
+++ b/lib/x86_64/quic_aes_gcm.c
@@ -97,9 +97,10 @@ imb_quic_aes_gcm(IMB_MGR *state,
         }
         switch (key_size) {
         case IMB_KEY_128_BYTES:
-        case IMB_KEY_192_BYTES:
         case IMB_KEY_256_BYTES:
                 break;
+        case IMB_KEY_192_BYTES:
+                /* AES-192 is not supported by QUIC */
         default:
                 imb_set_errno(state, IMB_ERR_KEY_LEN);
                 return;
@@ -127,7 +128,7 @@ imb_quic_aes_gcm(IMB_MGR *state,
 						   tag_ptr_array[n],
 						   tag_len);
 			}
-		} else if (key_size == IMB_KEY_256_BYTES) {
+		} else /* assume 256-bits key */ {
 			for (n = 0; n < num_packets; n++) {
 				IMB_AES256_GCM_ENC(state, key_data, &ctx,
 						   dst_ptr_array[n],
@@ -139,18 +140,6 @@ imb_quic_aes_gcm(IMB_MGR *state,
 						   tag_ptr_array[n],
 						   tag_len);
 			}
-		} else /* assume 192-bits key */ {
-			for (n = 0; n < num_packets; n++) {
-				IMB_AES192_GCM_ENC(state, key_data, &ctx,
-						   dst_ptr_array[n],
-						   src_ptr_array[n],
-						   len_array[n],
-						   iv_ptr_array[n],
-						   aad_ptr_array[n],
-						   aad_len,
-						   tag_ptr_array[n],
-						   tag_len);
-			}
 		}
 	} else /* decrypt direction */ {
 		if (key_size == IMB_KEY_128_BYTES) {
@@ -165,7 +154,7 @@ imb_quic_aes_gcm(IMB_MGR *state,
 						   tag_ptr_array[n],
 						   tag_len);
 			}
-		} else if (key_size == IMB_KEY_256_BYTES) {
+		} else /* assume 256-bits key */ {
 			for (n = 0; n < num_packets; n++) {
 				IMB_AES256_GCM_DEC(state, key_data, &ctx,
 						   dst_ptr_array[n],
@@ -177,18 +166,6 @@ imb_quic_aes_gcm(IMB_MGR *state,
 						   tag_ptr_array[n],
 						   tag_len);
 			}
-		} else /* assume 192-bits key */ {
-			for (n = 0; n < num_packets; n++) {
-				IMB_AES192_GCM_DEC(state, key_data, &ctx,
-						   dst_ptr_array[n],
-						   src_ptr_array[n],
-						   len_array[n],
-						   iv_ptr_array[n],
-						   aad_ptr_array[n],
-						   aad_len,
-						   tag_ptr_array[n],
-						   tag_len);
-			}
 		}
 	}
 }
diff --git a/test/kat-app/gcm_test.c b/test/kat-app/gcm_test.c
index adb4716d..68c7fa1c 100644
--- a/test/kat-app/gcm_test.c
+++ b/test/kat-app/gcm_test.c
@@ -2349,14 +2349,7 @@ test_gcm_std_vectors(struct test_suite_context *ts128,
                                                        burst_aes_gcm_enc,
                                                        burst_aes_gcm_dec,
                                                        ts192);
-                                test_gcm_vectors(&vectors[vect],
-						 quic_aes_gcm_enc,
-						 quic_aes_gcm_dec,
-						 ts192);
-                                test_gcm_vectors_burst(&vectors[vect],
-                                                       burst_quic_gcm_enc,
-                                                       burst_quic_gcm_dec,
-                                                       ts192);
+                                /* AES-192 is not supported by QUIC */
                         }
                         break;
                 case IMB_KEY_256_BYTES:
-- 
GitLab


From 1a7c1fa46bb43156f5c3f6425ed510f0724ad37e Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 22 May 2023 22:41:31 +0100
Subject: [PATCH 280/332] avx2_t3: add missing function ptrs for quic api

---
 lib/avx2_t3/mb_mgr_avx2_t3.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/lib/avx2_t3/mb_mgr_avx2_t3.c b/lib/avx2_t3/mb_mgr_avx2_t3.c
index 1b7c85f8..4f16e98d 100644
--- a/lib/avx2_t3/mb_mgr_avx2_t3.c
+++ b/lib/avx2_t3/mb_mgr_avx2_t3.c
@@ -485,6 +485,9 @@ init_mb_mgr_avx2_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->gmac128_finalize    = imb_aes_gmac_finalize_128_avx_gen4;
         state->gmac192_finalize    = imb_aes_gmac_finalize_192_avx_gen4;
         state->gmac256_finalize    = imb_aes_gmac_finalize_256_avx_gen4;
+
+        state->aes_ecb_128_quic    = aes_ecb_quic_enc_128_avx;
+        state->aes_ecb_256_quic    = aes_ecb_quic_enc_256_avx;
 }
 
 #include "mb_mgr_code.h"
-- 
GitLab


From 1f32b1c923b96e3aac6f976770d0545fc59e6f35 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 22 May 2023 13:27:43 +0100
Subject: [PATCH 281/332] test: build wycheproof app with cmake

---
 test/CMakeLists.txt                |  3 ++
 test/wycheproof-app/CMakeLists.txt | 87 ++++++++++++++++++++++++++++++
 2 files changed, 90 insertions(+)
 create mode 100644 test/wycheproof-app/CMakeLists.txt

diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index 0c8bff5e..f4a3a42e 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -37,3 +37,6 @@ add_subdirectory(kat-app)
 # build imb-xvalid application
 add_subdirectory(xvalid-app)
 
+# build imb-wycheproof application
+add_subdirectory(wycheproof-app)
+
diff --git a/test/wycheproof-app/CMakeLists.txt b/test/wycheproof-app/CMakeLists.txt
new file mode 100644
index 00000000..2e40658a
--- /dev/null
+++ b/test/wycheproof-app/CMakeLists.txt
@@ -0,0 +1,87 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+cmake_minimum_required(VERSION 3.16)
+project(intel-ipsec-mb)
+
+# Ensure building entire project
+if(NOT FULL_PROJECT_BUILD)
+  message(FATAL_ERROR "Please run CMake from project root directory")
+endif()
+
+########################################
+# set app and library names
+########################################
+set(WYCHEPROOF_APP imb-wycheproof)
+set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../lib)
+set(TEST_INCLUDE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../include)
+
+########################################
+# set imb-wycheproof source files
+########################################
+set(WYCHEPROOF_APP_SRC_FILES_C
+  ${CMAKE_CURRENT_SOURCE_DIR}/aes_gcm_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/aes_ccm_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/chacha20_poly1305_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/aes_cmac_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/gmac_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/gmac_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha1_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha224_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha256_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha384_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/hmac_sha512_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/wycheproof.c
+)
+
+########################################
+# set C compiler and NASM options
+########################################
+# add OS specific options
+if(WINDOWS)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/windows.cmake)
+else()
+  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/unix.cmake)
+endif()
+
+
+########################################
+# add targets
+########################################
+include_directories(${LIB_DIR} ${TEST_INCLUDE_DIR})
+link_directories(${LIB_DIR})
+
+add_executable(${WYCHEPROOF_APP} ${WYCHEPROOF_APP_SRC_FILES_C})
+target_link_libraries(${WYCHEPROOF_APP} PRIVATE ${IPSEC_MB_LIB})
+target_compile_definitions(${WYCHEPROOF_APP} PRIVATE ${APP_DEFINES})
+
+########################################
+# add tests
+########################################
+
+add_test(WYCHEPROOF ${WYCHEPROOF_APP})
+add_test(WYCHEPROOF-SHANI-OFF ${WYCHEPROOF_APP} --shani-off)
+add_test(WYCHEPROOF-GFNI-OFF ${WYCHEPROOF_APP} --gfni-off)
+
-- 
GitLab


From 875ba5289cd5fc8674b642d73aed060d650c4a3a Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 22 May 2023 14:33:33 +0100
Subject: [PATCH 282/332] cmake: add option to place all binaries in bin dir

---
 cmake/utils.cmake | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index cfe48ad5..14ad3eac 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -56,6 +56,15 @@ macro(imb_set_proj_defaults)
 
   # flag to force full project build
   set(FULL_PROJECT_BUILD TRUE)
+
+  # place all binaries in a single bin directory
+  if(USE_BIN_DIR)
+    set(BIN_DIR "${PROJECT_BINARY_DIR}/bin")
+    message(STATUS "BINARY DIRECTORY...        ${BIN_DIR}")
+    set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${BIN_DIR})
+    set(CMAKE_LIBRARY_OUTPUT_DIRECTORY ${BIN_DIR})
+    set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${BIN_DIR})
+  endif()
 endmacro()
 
 # compiler checks
-- 
GitLab


From c04566e2e16701c0dd519319497ccc145b7e0c2c Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 24 May 2023 11:23:35 +0100
Subject: [PATCH 283/332] test: Adds missing '-I' option in case library is
 installed. Fixes issue #123.

---
 test/common/common.mk | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/test/common/common.mk b/test/common/common.mk
index 06423c00..07350a34 100644
--- a/test/common/common.mk
+++ b/test/common/common.mk
@@ -80,10 +80,11 @@ LDLIBS = -lIPSec_MB
 
 ifeq ("$(shell test -r $(INSTPATH) && echo -n yes)","yes")
 # library installed
-CFLAGS +=
+$(info INFO: Using system installed library version.)
+CFLAGS += -I../include/
 else
 # library not installed
-CFLAGS +=  -I../../lib/include -I../../lib -I../include/
+CFLAGS += -I../../lib -I../include/
 LDFLAGS += -L$(LIB_DIR)
 endif
 
-- 
GitLab


From 979dd7b7cea5c9083f1dda829a197a97f2075120 Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 24 May 2023 13:41:53 +0100
Subject: [PATCH 284/332] build: remove v0.53 (and older) compile compatibility
 option - see issue #119.

---
 README.md                     |  16 ++---
 ReleaseNotes.txt              |   5 +-
 lib/CMakeLists.txt            |   9 +--
 lib/Makefile                  |   2 +-
 lib/api_doxygen.conf          |   2 +-
 lib/intel-ipsec-mb.h          | 114 ----------------------------------
 lib/win_x64.mak               |   2 +-
 perf/Makefile                 |   2 +-
 perf/cmake/unix.cmake         |   2 +-
 perf/cmake/windows.cmake      |   2 +-
 perf/win_x64.mak              |   2 +-
 test/cmake/unix.cmake         |   2 +-
 test/cmake/windows.cmake      |   2 +-
 test/common/common.mk         |   2 +-
 test/common/win_x64_common.mk |   2 +-
 15 files changed, 21 insertions(+), 145 deletions(-)

diff --git a/README.md b/README.md
index 79a1ba1f..054ceb41 100644
--- a/README.md
+++ b/README.md
@@ -704,18 +704,14 @@ If you want to change install location then define PREFIX (default C:\Program Fi
 9\. Backwards compatibility
 ===========================
 
-In version 0.54, some symbols have been renamed to avoid too generic names (such as cipher modes or
-hash algorithms).
+In version 1.4, backward compile time symbol compatibility with
+library version 0.53 has been removed.
 
-When building an application and linking it against the IPSec Multi Buffer library,
-by default the old symbols (up to v0.53) are exported, to maintain backwards compatibility.
+Applications are encouraged to use new symbol names introduced in version 0.54.
 
-Applications should move to the new API as soon as possible, as the old symbols
-are marked as deprecated and will be removed in a future release.
-
-For applications which face symbol conflicts due to these old generic names,
-they should be compiled with the flag -DNO_COMPAT_IMB_API_053, which will
-not export the old symbols.
+If required, compatibility symbol mapping can be implemented in the application.
+See compatibility symbol mapping in v1.3 header file:
+https://github.com/intel/intel-ipsec-mb/blob/v1.3/lib/intel-ipsec-mb.h#L246
 
 10\. Disclaimer (ZUC, KASUMI, SNOW3G)
 ====================================
diff --git a/ReleaseNotes.txt b/ReleaseNotes.txt
index 18637768..e10ede53 100644
--- a/ReleaseNotes.txt
+++ b/ReleaseNotes.txt
@@ -12,8 +12,9 @@ Library
 - Optimized GHASH component in AVX512 VAES (type2) AES-GCM implementation.
 - Implemented a workaround for false load-block condition in SSE and AVX2 AES-GCM implementations.
 - Removed AVX AES-GCM implementation, its API symbols map to the SSE implementation.
-- QUIC header protection API added
-- QUIC AES-GCM-128/256 AEAD API added
+- QUIC header protection API added.
+- QUIC AES-GCM-128/256 AEAD API added.
+- Removed v0.53 (and older) compatibility symbol mapping (NO_COMPAT_IMB_API_053 not defined).
 
 v1.3 September 2022
 ========================================================================
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index ee0962c4..2df06e22 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -40,7 +40,6 @@ option(SAFE_PARAM "API input parameter checking" ON)
 option(SAFE_DATA "Sensitive data cleared from registers and memory at operation end" ON)
 option(SAFE_LOOKUP "Lookups depending on sensitive data are constant time" ON)
 option(SAFE_OPTIONS "Enable all safe options" ON)
-option(NO_COMPAT_IMB_API_053 "Disable compatibility with v0.53" ON)
 option(BUILD_SHARED_LIBS "Build shared library" ON)
 option(CMAKE_VERBOSE_MAKEFILE "Verbose build output" OFF)
 set(EXTRA_CFLAGS "" CACHE STRING "Extra compiler flags")
@@ -48,7 +47,7 @@ set(EXTRA_CFLAGS "" CACHE STRING "Extra compiler flags")
 # add library options to options list (used by print_help target)
 list(APPEND IPSEC_MB_OPTIONS
   AESNI_EMU SAFE_PARAM SAFE_DATA SAFE_LOOKUP
-  SAFE_OPTIONS NO_COMPAT_IMB_API_053 BUILD_SHARED_LIBS
+  SAFE_OPTIONS BUILD_SHARED_LIBS
   CMAKE_VERBOSE_MAKEFILE EXTRA_CFLAGS
 )
 set(IPSEC_MB_OPTIONS ${IPSEC_MB_OPTIONS} PARENT_SCOPE)
@@ -162,7 +161,6 @@ message(STATUS "SAFE_DATA...               ${SAFE_DATA}")
 message(STATUS "SAFE_LOOKUP...             ${SAFE_LOOKUP}")
 message(STATUS "BUILD_SHARED_LIBS...       ${BUILD_SHARED_LIBS}")
 message(STATUS "EXTRA_CFLAGS...            ${EXTRA_CFLAGS}")
-message(STATUS "NO_COMPAT_IMB_API_053...   ${NO_COMPAT_IMB_API_053}")
 message(STATUS "CMAKE_GENERATOR...         ${CMAKE_GENERATOR}")
 message(STATUS "PLATFORM...                ${CMAKE_GENERATOR_PLATFORM}")
 
@@ -189,11 +187,6 @@ if(AESNI_EMU)
   string(APPEND CMAKE_ASM_NASM_FLAGS " -DAESNI_EMU")
 endif()
 
-# enable backward compatibility
-if(NO_COMPAT_IMB_API_053)
-  list(APPEND LIB_DEFINES NO_COMPAT_IMB_API_053)
-endif()
-
 # enable AVX IFMA support
 if(AVX_IFMA)
   list(APPEND LIB_DEFINES AVX_IFMA)
diff --git a/lib/Makefile b/lib/Makefile
index 1aaaaad5..1b2a77f1 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -113,7 +113,7 @@ CC_HAS_CET = $(and $(shell $(CC) --target-help 2> /dev/null | grep -m1 -e "-z ib
 	$(shell $(CC) --help=common 2> /dev/null | grep -m1 -e "-fcf-protection" | wc -l))
 CET_LDFLAGS=-r -z ibt -z shstk
 endif
-CFLAGS := -fPIC -DNO_COMPAT_IMB_API_053 $(EXTRA_CFLAGS) $(INCLUDES) \
+CFLAGS := -fPIC $(EXTRA_CFLAGS) $(INCLUDES) \
 	-W -Wall -Wextra -Wmissing-declarations -Wpointer-arith \
 	-Wcast-qual -Wundef -Wwrite-strings  \
 	-Wformat -Wformat-security \
diff --git a/lib/api_doxygen.conf b/lib/api_doxygen.conf
index 6324903b..202c99f5 100644
--- a/lib/api_doxygen.conf
+++ b/lib/api_doxygen.conf
@@ -1950,7 +1950,7 @@ INCLUDE_FILE_PATTERNS  =
 # recursively expanded use the := operator instead of the = operator.
 # This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
 
-PREDEFINED             = NO_COMPAT_IMB_API_053
+PREDEFINED             = 
 
 # If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
 # tag can be used to specify a list of macro names that should be expanded. The
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index edaa65a6..4fea2196 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -258,120 +258,6 @@ typedef enum {
 #endif
 #endif
 
-/**
- * Define enums from API v0.53, so applications that were using this version
- * will still be compiled successfully.
- * Note: this list has been extended with new names after version 0.55.
- * This list does not need to be extended for new enums.
- */
-#ifndef NO_COMPAT_IMB_API_053
-/* Previous cipher mode enums */
-#define CBC                     IMB_CIPHER_CBC
-#define CNTR                    IMB_CIPHER_CNTR
-#define NULL_CIPHER             IMB_CIPHER_NULL
-#define DOCSIS_SEC_BPI          IMB_CIPHER_DOCSIS_SEC_BPI
-#define GCM                     IMB_CIPHER_GCM
-#define CUSTOM_CIPHER           IMB_CIPHER_CUSTOM
-#define DES                     IMB_CIPHER_DES
-#define DOCSIS_DES              IMB_CIPHER_DOCSIS_DES
-#define CCM                     IMB_CIPHER_CCM
-#define DES3                    IMB_CIPHER_DES3
-#define PON_AES_CNTR            IMB_CIPHER_PON_AES_CNTR
-#define ECB                     IMB_CIPHER_ECB
-#define CNTR_BITLEN             IMB_CIPHER_CNTR_BITLEN
-
-/* Previous hash algo enums */
-#define SHA1                    IMB_AUTH_HMAC_SHA_1
-#define SHA_224                 IMB_AUTH_HMAC_SHA_224
-#define SHA_256                 IMB_AUTH_HMAC_SHA_256
-#define SHA_384                 IMB_AUTH_HMAC_SHA_384
-#define SHA_512                 IMB_AUTH_HMAC_SHA_512
-#define AES_XCBC                IMB_AUTH_AES_XCBC
-#define MD5                     IMB_AUTH_MD5
-#define NULL_HASH               IMB_AUTH_NULL
-#define AES_GMAC                IMB_AUTH_AES_GMAC
-#define CUSTOM_HASH             IMB_AUTH_CUSTOM
-#define AES_CCM                 IMB_AUTH_AES_CCM
-#define AES_CMAC                IMB_AUTH_AES_CMAC
-#define PLAIN_SHA1              IMB_AUTH_SHA_1
-#define PLAIN_SHA_224           IMB_AUTH_SHA_224
-#define PLAIN_SHA_256           IMB_AUTH_SHA_256
-#define PLAIN_SHA_384           IMB_AUTH_SHA_384
-#define PLAIN_SHA_512           IMB_AUTH_SHA_512
-#define AES_CMAC_BITLEN         IMB_AUTH_AES_CMAC_BITLEN
-#define PON_CRC_BIP             IMB_AUTH_PON_CRC_BIP
-
-/* Previous cipher direction enums */
-#define ENCRYPT                 IMB_DIR_ENCRYPT
-#define DECRYPT                 IMB_DIR_DECRYPT
-
-/* Previous chain order enums */
-#define HASH_CIPHER             IMB_ORDER_HASH_CIPHER
-#define CIPHER_HASH             IMB_ORDER_CIPHER_HASH
-
-/* Previous key size enums */
-#define AES_128_BYTES           IMB_KEY_128_BYTES
-#define AES_192_BYTES           IMB_KEY_192_BYTES
-#define AES_256_BYTES           IMB_KEY_256_BYTES
-#define IMB_KEY_AES_128_BYTES   IMB_KEY_128_BYTES
-#define IMB_KEY_AES_192_BYTES   IMB_KEY_192_BYTES
-#define IMB_KEY_AES_256_BYTES   IMB_KEY_256_BYTES
-#define AES_KEY_SIZE_BYTES      IMB_KEY_SIZE_BYTES
-
-#define MB_MGR                  IMB_MGR
-#define JOB_AES_HMAC            IMB_JOB
-#define JOB_STS                 IMB_STATUS
-#define IMB_JOB_STS             IMB_STATUS
-#define JOB_CIPHER_MODE         IMB_CIPHER_MODE
-#define JOB_CIPHER_DIRECTION    IMB_CIPHER_DIRECTION
-#define JOB_HASH_ALG            IMB_HASH_ALG
-#define JOB_CHAIN_ORDER         IMB_CHAIN_ORDER
-#define MAX_JOBS                IMB_MAX_JOBS
-
-#define STS_BEING_PROCESSED     IMB_STATUS_BEING_PROCESSED
-#define STS_COMPLETED_AES       IMB_STATUS_COMPLETED_CIPHER
-#define STS_COMPLETED_HMAC      IMB_STATUS_COMPLETED_AUTH
-#define STS_COMPLETED           IMB_STATUS_COMPLETED
-#define STS_INVALID_ARGS        IMB_STATUS_INVALID_ARGS
-#define STS_INTERNAL_ERROR      IMB_STATUS_INTERNAL_ERROR
-#define STS_ERROR               IMB_STATUS_ERROR
-
-#define MAX_TAG_LEN             IMB_MAX_TAG_LEN
-#define GCM_IV_DATA_LEN         IMB_GCM_IV_DATA_LEN
-#define GCM_128_KEY_LEN         IMB_GCM_128_KEY_LEN
-#define GCM_192_KEY_LEN         IMB_GCM_192_KEY_LEN
-#define GCM_256_KEY_LEN         IMB_GCM_256_KEY_LEN
-
-#define DES_KEY_SCHED_SIZE      IMB_DES_KEY_SCHED_SIZE
-#define DES_BLOCK_SIZE          IMB_DES_BLOCK_SIZE
-
-#define AES_BLOCK_SIZE          IMB_AES_BLOCK_SIZE
-
-#define SHA1_DIGEST_SIZE_IN_BYTES   IMB_SHA1_DIGEST_SIZE_IN_BYTES
-#define SHA224_DIGEST_SIZE_IN_BYTES IMB_SHA224_DIGEST_SIZE_IN_BYTES
-#define SHA256_DIGEST_SIZE_IN_BYTES IMB_SHA256_DIGEST_SIZE_IN_BYTES
-#define SHA384_DIGEST_SIZE_IN_BYTES IMB_SHA384_DIGEST_SIZE_IN_BYTES
-#define SHA512_DIGEST_SIZE_IN_BYTES IMB_SHA512_DIGEST_SIZE_IN_BYTES
-
-#define SHA1_BLOCK_SIZE    IMB_SHA1_BLOCK_SIZE
-#define SHA_256_BLOCK_SIZE IMB_SHA_256_BLOCK_SIZE
-#define SHA_384_BLOCK_SIZE IMB_SHA_384_BLOCK_SIZE
-#define SHA_512_BLOCK_SIZE IMB_SHA_512_BLOCK_SIZE
-
-#define KASUMI_KEY_SIZE    IMB_KASUMI_KEY_SIZE
-#define KASUMI_IV_SIZE     IMB_KASUMI_IV_SIZE
-#define KASUMI_BLOCK_SIZE  IMB_KASUMI_BLOCK_SIZE
-#define KASUMI_DIGEST_SIZE IMB_KASUMI_DIGEST_SIZE
-
-#define DOCSIS_CRC32_MIN_ETH_PDU_SIZE IMB_DOCSIS_CRC32_MIN_ETH_PDU_SIZE
-#define DOCSIS_CRC32_TAG_SIZE         IMB_DOCSIS_CRC32_TAG_SIZE
-
-/* Previous fields in IMB_JOB/JOB_AES_HMAC */
-#define aes_enc_key_expanded enc_keys
-#define aes_dec_key_expanded dec_keys
-#define aes_key_len_in_bytes key_len_in_bytes
-#endif /* !NO_COMPAT_IMB_API_053 */
-
 typedef enum {
         IMB_CIPHER_CBC = 1,
         IMB_CIPHER_CNTR,
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index 1bba2281..ac99ed6a 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -112,7 +112,7 @@ DAFLAGS = $(DAFLAGS) -DAESNI_EMU
 
 CC = cl
 
-CFLAGS_ALL = $(EXTRA_CFLAGS) /DNO_COMPAT_IMB_API_053 /I. /Iinclude /Ino-aesni \
+CFLAGS_ALL = $(EXTRA_CFLAGS) /I. /Iinclude /Ino-aesni \
 	/nologo /Y- /W3 /WX- /Gm- /fp:precise /EHsc /Z7 /std:c11
 
 CFLAGS = $(CFLAGS_ALL) $(OPT) $(DCFLAGS)
diff --git a/perf/Makefile b/perf/Makefile
index 7aa198a6..67026025 100644
--- a/perf/Makefile
+++ b/perf/Makefile
@@ -30,7 +30,7 @@ NASM ?= nasm
 
 MINGW ?= $(shell $(CC) -dM -E - < /dev/null | grep -i mingw | wc -l | sed 's/^ *//')
 
-CFLAGS = -D_GNU_SOURCE -DNO_COMPAT_IMB_API_053 $(INCLUDES) \
+CFLAGS = -D_GNU_SOURCE $(INCLUDES) \
 	-W -Wall -Wextra -Wmissing-declarations -Wpointer-arith \
 	-Wcast-qual -Wundef -Wwrite-strings  \
 	-Wformat -Wformat-security \
diff --git a/perf/cmake/unix.cmake b/perf/cmake/unix.cmake
index a85c05da..58a64ad2 100644
--- a/perf/cmake/unix.cmake
+++ b/perf/cmake/unix.cmake
@@ -33,7 +33,7 @@ set(IPSEC_MB_LIB IPSec_MB)
 set(CMAKE_ASM_NASM_FLAGS "-Werror -felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
 
 # set compiler definitions
-set(APP_DEFINES LINUX _GNU_SOURCE NO_COMPAT_IMB_API_053)
+set(APP_DEFINES LINUX _GNU_SOURCE)
 
 # set C compiler flags
 set(CMAKE_C_FLAGS
diff --git a/perf/cmake/windows.cmake b/perf/cmake/windows.cmake
index 6901bc31..4117bf69 100644
--- a/perf/cmake/windows.cmake
+++ b/perf/cmake/windows.cmake
@@ -38,7 +38,7 @@ endif()
 
 # set C compiler flags
 set(CMAKE_C_FLAGS
-    "/nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc /std:c11 ${EXTRA_CFLAGS}"
+    "/nologo /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc /std:c11 ${EXTRA_CFLAGS}"
 )
 set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
 set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
diff --git a/perf/win_x64.mak b/perf/win_x64.mak
index bff4f40d..68b00a0e 100644
--- a/perf/win_x64.mak
+++ b/perf/win_x64.mak
@@ -63,7 +63,7 @@ DLFLAGS =
 CC = cl
 
 # _CRT_SECURE_NO_WARNINGS disables warning C4996 about insecure strtok() being used
-CFLAGS = /nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR) /std:c11
+CFLAGS = /nologo /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR) /std:c11
 
 LNK = link
 LFLAGS = /out:$(APP).exe $(DLFLAGS)
diff --git a/test/cmake/unix.cmake b/test/cmake/unix.cmake
index c29fe4e7..9154995a 100644
--- a/test/cmake/unix.cmake
+++ b/test/cmake/unix.cmake
@@ -33,7 +33,7 @@ set(IPSEC_MB_LIB IPSec_MB)
 set(CMAKE_ASM_NASM_FLAGS "-felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
 
 # set compiler definitions
-set(APP_DEFINES LINUX _GNU_SOURCE NO_COMPAT_IMB_API_053)
+set(APP_DEFINES LINUX _GNU_SOURCE)
 
 # set C compiler flags
 set(CMAKE_C_FLAGS
diff --git a/test/cmake/windows.cmake b/test/cmake/windows.cmake
index dbd427bf..5982eee0 100644
--- a/test/cmake/windows.cmake
+++ b/test/cmake/windows.cmake
@@ -33,7 +33,7 @@ set(IPSEC_MB_LIB libIPSec_MB)
 set(CMAKE_ASM_NASM_FLAGS "-Werror -fwin64 -Xvc -DWIN_ABI")
 
 # set C compiler flags
-set(CMAKE_C_FLAGS "/nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc /std:c11 ${EXTRA_CFLAGS}")
+set(CMAKE_C_FLAGS "/nologo /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc /std:c11 ${EXTRA_CFLAGS}")
 set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
 set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
 set(CMAKE_EXE_LINKER_FLAGS_DEBUG "/debug")
diff --git a/test/common/common.mk b/test/common/common.mk
index 07350a34..d741c000 100644
--- a/test/common/common.mk
+++ b/test/common/common.mk
@@ -34,7 +34,7 @@ NASM ?= nasm
 
 MINGW ?= $(shell $(CC) -dM -E - < /dev/null | grep -i mingw | wc -l | sed 's/^ *//')
 
-CFLAGS = -MMD -D_GNU_SOURCE -DNO_COMPAT_IMB_API_053 \
+CFLAGS = -MMD -D_GNU_SOURCE \
 	-W -Wall -Wextra -Wmissing-declarations -Wpointer-arith \
 	-Wcast-qual -Wundef -Wwrite-strings  \
 	-Wformat -Wformat-security \
diff --git a/test/common/win_x64_common.mk b/test/common/win_x64_common.mk
index b010fca4..ab18d15f 100644
--- a/test/common/win_x64_common.mk
+++ b/test/common/win_x64_common.mk
@@ -58,7 +58,7 @@ DLFLAGS =
 CC = cl
 
 # _CRT_SECURE_NO_WARNINGS disables warning C4996 about insecure snprintf() being used
-CFLAGS = /nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR) /std:c11
+CFLAGS = /nologo /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR) /std:c11
 
 #linker
 LNK = link
-- 
GitLab


From 4a065a3d8acbb297e7e46c87ab2d4cd38d9237c5 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Tue, 23 May 2023 17:17:04 +0100
Subject: [PATCH 285/332] test: [POLY1305] Unify test vectors

---
 test/kat-app/CMakeLists.txt       |   1 +
 test/kat-app/Makefile             |   2 +-
 test/kat-app/poly1305_test.c      | 415 ++----------------------------
 test/kat-app/poly1305_test.json.c | 139 ++++++++++
 test/kat-app/win_x64.mak          |   2 +-
 5 files changed, 163 insertions(+), 396 deletions(-)
 create mode 100644 test/kat-app/poly1305_test.json.c

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 941f73b5..28d3a275 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -84,6 +84,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/hmac_md5.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/gmac_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/ghash_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/poly1305_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
 )
 
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index c03d7baf..4843499e 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -38,7 +38,7 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	hec_test.c xcbc_test.c aes_cbcs_test.c crc_test.c chacha_test.c poly1305_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
 	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c hmac_sha512.json.c \
-	hmac_md5.json.c gmac_test.json.c ghash_test.c ghash_test.json.c\
+	hmac_md5.json.c gmac_test.json.c ghash_test.c ghash_test.json.c poly1305_test.json.c \
 	gmac_test.c
 OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
diff --git a/test/kat-app/poly1305_test.c b/test/kat-app/poly1305_test.c
index d7fc198d..8fb79d1f 100644
--- a/test/kat-app/poly1305_test.c
+++ b/test/kat-app/poly1305_test.c
@@ -32,383 +32,15 @@
 
 #include <intel-ipsec-mb.h>
 #include "utils.h"
+#include "mac_test.h"
 
 int poly1305_test(struct IMB_MGR *mb_mgr);
 
-/*
- * Test vectors from RFC7539 https://tools.ietf.org/html/rfc7539
- */
-
-/* 2.5.2 Poly1305 Example and Test Vector */
-static const uint8_t msg_vec0[] = {
-        0x43, 0x72, 0x79, 0x70, 0x74, 0x6f, 0x67, 0x72,
-        0x61, 0x70, 0x68, 0x69, 0x63, 0x20, 0x46, 0x6f,
-        0x72, 0x75, 0x6d, 0x20, 0x52, 0x65, 0x73, 0x65,
-        0x61, 0x72, 0x63, 0x68, 0x20, 0x47, 0x72, 0x6f,
-        0x75, 0x70
-};
-
-static const uint8_t key_vec0[32] = {
-        0x85, 0xd6, 0xbe, 0x78, 0x57, 0x55, 0x6d, 0x33,
-        0x7f, 0x44, 0x52, 0xfe, 0x42, 0xd5, 0x06, 0xa8,
-        0x01, 0x03, 0x80, 0x8a, 0xfb, 0x0d, 0xb2, 0xfd,
-        0x4a, 0xbf, 0xf6, 0xaf, 0x41, 0x49, 0xf5, 0x1b
-};
-
-static const uint8_t tag_vec0[16] = {
-        0xa8, 0x06, 0x1d, 0xc1, 0x30, 0x51, 0x36, 0xc6,
-        0xc2, 0x2b, 0x8b, 0xaf, 0x0c, 0x01, 0x27, 0xa9
-};
-
-/* A.3. Poly1305 Message Authentication Code */
-
-/* Test Vector #1 */
-static const uint8_t msg_vec1[] = {
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-static const uint8_t key_vec1[32] = {
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-static const uint8_t tag_vec1[16] = {
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-/* Test Vector #2 */
-static const uint8_t key_vec2[32] = {
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x36, 0xe5, 0xf6, 0xb5, 0xc5, 0xe0, 0x60, 0x70,
-        0xf0, 0xef, 0xca, 0x96, 0x22, 0x7a, 0x86, 0x3e
-};
-
-static const uint8_t msg_vec2[] = {
-        0x41, 0x6e, 0x79, 0x20, 0x73, 0x75, 0x62, 0x6d,
-        0x69, 0x73, 0x73, 0x69, 0x6f, 0x6e, 0x20, 0x74,
-        0x6f, 0x20, 0x74, 0x68, 0x65, 0x20, 0x49, 0x45,
-        0x54, 0x46, 0x20, 0x69, 0x6e, 0x74, 0x65, 0x6e,
-        0x64, 0x65, 0x64, 0x20, 0x62, 0x79, 0x20, 0x74,
-        0x68, 0x65, 0x20, 0x43, 0x6f, 0x6e, 0x74, 0x72,
-        0x69, 0x62, 0x75, 0x74, 0x6f, 0x72, 0x20, 0x66,
-        0x6f, 0x72, 0x20, 0x70, 0x75, 0x62, 0x6c, 0x69,
-        0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x20, 0x61,
-        0x73, 0x20, 0x61, 0x6c, 0x6c, 0x20, 0x6f, 0x72,
-        0x20, 0x70, 0x61, 0x72, 0x74, 0x20, 0x6f, 0x66,
-        0x20, 0x61, 0x6e, 0x20, 0x49, 0x45, 0x54, 0x46,
-        0x20, 0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65,
-        0x74, 0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x20,
-        0x6f, 0x72, 0x20, 0x52, 0x46, 0x43, 0x20, 0x61,
-        0x6e, 0x64, 0x20, 0x61, 0x6e, 0x79, 0x20, 0x73,
-        0x74, 0x61, 0x74, 0x65, 0x6d, 0x65, 0x6e, 0x74,
-        0x20, 0x6d, 0x61, 0x64, 0x65, 0x20, 0x77, 0x69,
-        0x74, 0x68, 0x69, 0x6e, 0x20, 0x74, 0x68, 0x65,
-        0x20, 0x63, 0x6f, 0x6e, 0x74, 0x65, 0x78, 0x74,
-        0x20, 0x6f, 0x66, 0x20, 0x61, 0x6e, 0x20, 0x49,
-        0x45, 0x54, 0x46, 0x20, 0x61, 0x63, 0x74, 0x69,
-        0x76, 0x69, 0x74, 0x79, 0x20, 0x69, 0x73, 0x20,
-        0x63, 0x6f, 0x6e, 0x73, 0x69, 0x64, 0x65, 0x72,
-        0x65, 0x64, 0x20, 0x61, 0x6e, 0x20, 0x22, 0x49,
-        0x45, 0x54, 0x46, 0x20, 0x43, 0x6f, 0x6e, 0x74,
-        0x72, 0x69, 0x62, 0x75, 0x74, 0x69, 0x6f, 0x6e,
-        0x22, 0x2e, 0x20, 0x53, 0x75, 0x63, 0x68, 0x20,
-        0x73, 0x74, 0x61, 0x74, 0x65, 0x6d, 0x65, 0x6e,
-        0x74, 0x73, 0x20, 0x69, 0x6e, 0x63, 0x6c, 0x75,
-        0x64, 0x65, 0x20, 0x6f, 0x72, 0x61, 0x6c, 0x20,
-        0x73, 0x74, 0x61, 0x74, 0x65, 0x6d, 0x65, 0x6e,
-        0x74, 0x73, 0x20, 0x69, 0x6e, 0x20, 0x49, 0x45,
-        0x54, 0x46, 0x20, 0x73, 0x65, 0x73, 0x73, 0x69,
-        0x6f, 0x6e, 0x73, 0x2c, 0x20, 0x61, 0x73, 0x20,
-        0x77, 0x65, 0x6c, 0x6c, 0x20, 0x61, 0x73, 0x20,
-        0x77, 0x72, 0x69, 0x74, 0x74, 0x65, 0x6e, 0x20,
-        0x61, 0x6e, 0x64, 0x20, 0x65, 0x6c, 0x65, 0x63,
-        0x74, 0x72, 0x6f, 0x6e, 0x69, 0x63, 0x20, 0x63,
-        0x6f, 0x6d, 0x6d, 0x75, 0x6e, 0x69, 0x63, 0x61,
-        0x74, 0x69, 0x6f, 0x6e, 0x73, 0x20, 0x6d, 0x61,
-        0x64, 0x65, 0x20, 0x61, 0x74, 0x20, 0x61, 0x6e,
-        0x79, 0x20, 0x74, 0x69, 0x6d, 0x65, 0x20, 0x6f,
-        0x72, 0x20, 0x70, 0x6c, 0x61, 0x63, 0x65, 0x2c,
-        0x20, 0x77, 0x68, 0x69, 0x63, 0x68, 0x20, 0x61,
-        0x72, 0x65, 0x20, 0x61, 0x64, 0x64, 0x72, 0x65,
-        0x73, 0x73, 0x65, 0x64, 0x20, 0x74, 0x6f
-};
-
-static const uint8_t tag_vec2[16] = {
-        0x36, 0xe5, 0xf6, 0xb5, 0xc5, 0xe0, 0x60, 0x70,
-        0xf0, 0xef, 0xca, 0x96, 0x22, 0x7a, 0x86, 0x3e
-};
-
-/* Test Vector #3 */
-static const uint8_t key_vec3[32] = {
-        0x36, 0xe5, 0xf6, 0xb5, 0xc5, 0xe0, 0x60, 0x70,
-        0xf0, 0xef, 0xca, 0x96, 0x22, 0x7a, 0x86, 0x3e,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-static const uint8_t msg_vec3[] = {
-        0x41, 0x6e, 0x79, 0x20, 0x73, 0x75, 0x62, 0x6d,
-        0x69, 0x73, 0x73, 0x69, 0x6f, 0x6e, 0x20, 0x74,
-        0x6f, 0x20, 0x74, 0x68, 0x65, 0x20, 0x49, 0x45,
-        0x54, 0x46, 0x20, 0x69, 0x6e, 0x74, 0x65, 0x6e,
-        0x64, 0x65, 0x64, 0x20, 0x62, 0x79, 0x20, 0x74,
-        0x68, 0x65, 0x20, 0x43, 0x6f, 0x6e, 0x74, 0x72,
-        0x69, 0x62, 0x75, 0x74, 0x6f, 0x72, 0x20, 0x66,
-        0x6f, 0x72, 0x20, 0x70, 0x75, 0x62, 0x6c, 0x69,
-        0x63, 0x61, 0x74, 0x69, 0x6f, 0x6e, 0x20, 0x61,
-        0x73, 0x20, 0x61, 0x6c, 0x6c, 0x20, 0x6f, 0x72,
-        0x20, 0x70, 0x61, 0x72, 0x74, 0x20, 0x6f, 0x66,
-        0x20, 0x61, 0x6e, 0x20, 0x49, 0x45, 0x54, 0x46,
-        0x20, 0x49, 0x6e, 0x74, 0x65, 0x72, 0x6e, 0x65,
-        0x74, 0x2d, 0x44, 0x72, 0x61, 0x66, 0x74, 0x20,
-        0x6f, 0x72, 0x20, 0x52, 0x46, 0x43, 0x20, 0x61,
-        0x6e, 0x64, 0x20, 0x61, 0x6e, 0x79, 0x20, 0x73,
-        0x74, 0x61, 0x74, 0x65, 0x6d, 0x65, 0x6e, 0x74,
-        0x20, 0x6d, 0x61, 0x64, 0x65, 0x20, 0x77, 0x69,
-        0x74, 0x68, 0x69, 0x6e, 0x20, 0x74, 0x68, 0x65,
-        0x20, 0x63, 0x6f, 0x6e, 0x74, 0x65, 0x78, 0x74,
-        0x20, 0x6f, 0x66, 0x20, 0x61, 0x6e, 0x20, 0x49,
-        0x45, 0x54, 0x46, 0x20, 0x61, 0x63, 0x74, 0x69,
-        0x76, 0x69, 0x74, 0x79, 0x20, 0x69, 0x73, 0x20,
-        0x63, 0x6f, 0x6e, 0x73, 0x69, 0x64, 0x65, 0x72,
-        0x65, 0x64, 0x20, 0x61, 0x6e, 0x20, 0x22, 0x49,
-        0x45, 0x54, 0x46, 0x20, 0x43, 0x6f, 0x6e, 0x74,
-        0x72, 0x69, 0x62, 0x75, 0x74, 0x69, 0x6f, 0x6e,
-        0x22, 0x2e, 0x20, 0x53, 0x75, 0x63, 0x68, 0x20,
-        0x73, 0x74, 0x61, 0x74, 0x65, 0x6d, 0x65, 0x6e,
-        0x74, 0x73, 0x20, 0x69, 0x6e, 0x63, 0x6c, 0x75,
-        0x64, 0x65, 0x20, 0x6f, 0x72, 0x61, 0x6c, 0x20,
-        0x73, 0x74, 0x61, 0x74, 0x65, 0x6d, 0x65, 0x6e,
-        0x74, 0x73, 0x20, 0x69, 0x6e, 0x20, 0x49, 0x45,
-        0x54, 0x46, 0x20, 0x73, 0x65, 0x73, 0x73, 0x69,
-        0x6f, 0x6e, 0x73, 0x2c, 0x20, 0x61, 0x73, 0x20,
-        0x77, 0x65, 0x6c, 0x6c, 0x20, 0x61, 0x73, 0x20,
-        0x77, 0x72, 0x69, 0x74, 0x74, 0x65, 0x6e, 0x20,
-        0x61, 0x6e, 0x64, 0x20, 0x65, 0x6c, 0x65, 0x63,
-        0x74, 0x72, 0x6f, 0x6e, 0x69, 0x63, 0x20, 0x63,
-        0x6f, 0x6d, 0x6d, 0x75, 0x6e, 0x69, 0x63, 0x61,
-        0x74, 0x69, 0x6f, 0x6e, 0x73, 0x20, 0x6d, 0x61,
-        0x64, 0x65, 0x20, 0x61, 0x74, 0x20, 0x61, 0x6e,
-        0x79, 0x20, 0x74, 0x69, 0x6d, 0x65, 0x20, 0x6f,
-        0x72, 0x20, 0x70, 0x6c, 0x61, 0x63, 0x65, 0x2c,
-        0x20, 0x77, 0x68, 0x69, 0x63, 0x68, 0x20, 0x61,
-        0x72, 0x65, 0x20, 0x61, 0x64, 0x64, 0x72, 0x65,
-        0x73, 0x73, 0x65, 0x64, 0x20, 0x74, 0x6f
-};
-
-static const uint8_t tag_vec3[16] = {
-        0xf3, 0x47, 0x7e, 0x7c, 0xd9, 0x54, 0x17, 0xaf,
-        0x89, 0xa6, 0xb8, 0x79, 0x4c, 0x31, 0x0c, 0xf0
-};
-
-/* Test Vector #4 */
-static const uint8_t key_vec4[32] = {
-        0x1c, 0x92, 0x40, 0xa5, 0xeb, 0x55, 0xd3, 0x8a,
-        0xf3, 0x33, 0x88, 0x86, 0x04, 0xf6, 0xb5, 0xf0,
-        0x47, 0x39, 0x17, 0xc1, 0x40, 0x2b, 0x80, 0x09,
-        0x9d, 0xca, 0x5c, 0xbc, 0x20, 0x70, 0x75, 0xc0
-};
-
-static const uint8_t msg_vec4[] = {
-        0x27, 0x54, 0x77, 0x61, 0x73, 0x20, 0x62, 0x72,
-        0x69, 0x6c, 0x6c, 0x69, 0x67, 0x2c, 0x20, 0x61,
-        0x6e, 0x64, 0x20, 0x74, 0x68, 0x65, 0x20, 0x73,
-        0x6c, 0x69, 0x74, 0x68, 0x79, 0x20, 0x74, 0x6f,
-        0x76, 0x65, 0x73, 0x0a, 0x44, 0x69, 0x64, 0x20,
-        0x67, 0x79, 0x72, 0x65, 0x20, 0x61, 0x6e, 0x64,
-        0x20, 0x67, 0x69, 0x6d, 0x62, 0x6c, 0x65, 0x20,
-        0x69, 0x6e, 0x20, 0x74, 0x68, 0x65, 0x20, 0x77,
-        0x61, 0x62, 0x65, 0x3a, 0x0a, 0x41, 0x6c, 0x6c,
-        0x20, 0x6d, 0x69, 0x6d, 0x73, 0x79, 0x20, 0x77,
-        0x65, 0x72, 0x65, 0x20, 0x74, 0x68, 0x65, 0x20,
-        0x62, 0x6f, 0x72, 0x6f, 0x67, 0x6f, 0x76, 0x65,
-        0x73, 0x2c, 0x0a, 0x41, 0x6e, 0x64, 0x20, 0x74,
-        0x68, 0x65, 0x20, 0x6d, 0x6f, 0x6d, 0x65, 0x20,
-        0x72, 0x61, 0x74, 0x68, 0x73, 0x20, 0x6f, 0x75,
-        0x74, 0x67, 0x72, 0x61, 0x62, 0x65, 0x2e
-};
-
-static const uint8_t tag_vec4[16] = {
-        0x45, 0x41, 0x66, 0x9a, 0x7e, 0xaa, 0xee, 0x61,
-        0xe7, 0x08, 0xdc, 0x7c, 0xbc, 0xc5, 0xeb, 0x62
-};
-
-/* Test Vector #5 */
-static const uint8_t key_vec5[32] = {
-        0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-static const uint8_t msg_vec5[] = {
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
-};
-
-static const uint8_t tag_vec5[16] = {
-        0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-/* Test Vector #6 */
-static const uint8_t key_vec6[32] = {
-        0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
-};
-
-static const uint8_t msg_vec6[] = {
-        0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-};
-
-static const uint8_t tag_vec6[16] = {
-        0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-/* Test Vector #7 */
-static const uint8_t key_vec7[32] = {
-        0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-};
-
-static const uint8_t msg_vec7[] = {
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-static const uint8_t tag_vec7[16] = {
-        0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-/* Test Vector #8 */
-static const uint8_t key_vec8[32] = {
-        0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-static const uint8_t msg_vec8[] = {
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xfb, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe,
-        0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe,
-        0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
-        0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01
-};
-
-static const uint8_t tag_vec8[16] = {
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-/* Test Vector #9 */
-static const uint8_t key_vec9[32] = {
-        0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-static const uint8_t msg_vec9[] = {
-        0xfd, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
-};
-
-static const uint8_t tag_vec9[16] = {
-        0xfa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
-        0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff
-};
-
-/* Test Vector #10 */
-static const uint8_t key_vec10[32] = {
-        0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-static const uint8_t msg_vec10[] = {
-        0xE3, 0x35, 0x94, 0xD7, 0x50, 0x5E, 0x43, 0xB9,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x33, 0x94, 0xD7, 0x50, 0x5E, 0x43, 0x79, 0xCD,
-        0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-};
-
-static const uint8_t tag_vec10[16] = {
-        0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x55, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-/* Test Vector #11 */
-static const uint8_t key_vec11[32] = {
-        0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-static const uint8_t msg_vec11[] = {
-        0xE3, 0x35, 0x94, 0xD7, 0x50, 0x5E, 0x43, 0xB9,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x33, 0x94, 0xD7, 0x50, 0x5E, 0x43, 0x79, 0xCD,
-        0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-};
-
-static const uint8_t tag_vec11[16] = {
-        0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-
-struct poly1305_vector {
-        const uint8_t *msg;
-        size_t msg_len;
-        const uint8_t *key;
-        const uint8_t *tag;
-} rfc7539_vectors[] = {
-        {msg_vec0, sizeof(msg_vec0), key_vec0, tag_vec0},
-        {msg_vec1, sizeof(msg_vec1), key_vec1, tag_vec1},
-        {msg_vec2, sizeof(msg_vec2), key_vec2, tag_vec2},
-        {msg_vec3, sizeof(msg_vec3), key_vec3, tag_vec3},
-        {msg_vec4, sizeof(msg_vec4), key_vec4, tag_vec4},
-        {msg_vec5, sizeof(msg_vec5), key_vec5, tag_vec5},
-        {msg_vec6, sizeof(msg_vec6), key_vec6, tag_vec6},
-        {msg_vec7, sizeof(msg_vec7), key_vec7, tag_vec7},
-        {msg_vec8, sizeof(msg_vec8), key_vec8, tag_vec8},
-        {msg_vec9, sizeof(msg_vec9), key_vec9, tag_vec9},
-        {msg_vec10, sizeof(msg_vec10), key_vec10, tag_vec10},
-        {msg_vec11, sizeof(msg_vec11), key_vec11, tag_vec11},
-};
+extern const struct mac_test poly1305_test_json[];
 
 static int
 poly1305_job_ok(struct IMB_MGR *mb_mgr,
-                const struct poly1305_vector *vec,
+                const struct mac_test *vec,
                 const struct IMB_JOB *job,
                 const uint8_t *auth,
                 const uint8_t *padding,
@@ -439,11 +71,11 @@ poly1305_job_ok(struct IMB_MGR *mb_mgr,
                 return 0;
         }
 
-        if (memcmp(vec->tag, &auth[sizeof_padding], auth_len)) {
+        if (memcmp((const void *) vec->tag, &auth[sizeof_padding], auth_len)) {
                 printf("hash mismatched\n");
                 hexdump(stderr, "Received", &auth[sizeof_padding],
                         auth_len);
-                hexdump(stderr, "Expected", vec->tag,
+                hexdump(stderr, "Expected", (const void *) vec->tag,
                         auth_len);
                 return 0;
         }
@@ -452,7 +84,7 @@ poly1305_job_ok(struct IMB_MGR *mb_mgr,
 
 static int
 test_poly1305(struct IMB_MGR *mb_mgr,
-              const struct poly1305_vector *vec,
+              const struct mac_test *vec,
               const int dir,
               const int num_jobs)
 {
@@ -494,8 +126,8 @@ test_poly1305(struct IMB_MGR *mb_mgr,
                 job->hash_alg = IMB_AUTH_POLY1305;
 
                 job->u.POLY1305._key = vec->key;
-                job->src = vec->msg;
-                job->msg_len_to_hash_in_bytes = vec->msg_len;
+                job->src = (const void *) vec->msg;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->hash_start_src_offset_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
                 job->auth_tag_output_len_in_bytes = 16;
@@ -546,36 +178,35 @@ test_poly1305(struct IMB_MGR *mb_mgr,
 static void
 test_poly1305_vectors(struct IMB_MGR *mb_mgr,
                       const int num_jobs,
-                      const struct poly1305_vector *vec_array,
-                      const size_t vec_array_size,
                       struct test_suite_context *ctx,
                       const char *banner)
 {
-	size_t vect;
+	const struct mac_test *v = poly1305_test_json;
 
         if (!quiet_mode)
 	        printf("%s (N jobs = %d):\n", banner, num_jobs);
-	for (vect = 0; vect < vec_array_size; vect++) {
+	for (; v->msg != NULL; v++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("Vector [%d/%d], M len: %d\n",
-                               (int) vect + 1, (int) vec_array_size,
-                               (int) vec_array[vect].msg_len);
+                        printf("RFC7539 Test Case %zu key_len:%zu "
+                        "data_len:%zu digest_len:%zu\n",
+                        v->tcId,
+                        v->keySize,
+                        v->msgSize / 8,
+                        v->tagSize);
 #else
                         printf(".");
 #endif
                 }
 
-                if (test_poly1305(mb_mgr, &vec_array[vect],
-                                  IMB_DIR_ENCRYPT, num_jobs)) {
-                        printf("error #%d encrypt\n", (int) vect + 1);
+                if (test_poly1305(mb_mgr, v, IMB_DIR_ENCRYPT, num_jobs)) {
+                        printf("error #%zu encrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else
                         test_suite_update(ctx, 1, 0);
 
-                if (test_poly1305(mb_mgr, &vec_array[vect],
-                                  IMB_DIR_DECRYPT, num_jobs)) {
-                        printf("error #%d decrypt\n", (int) vect + 1);
+                if (test_poly1305(mb_mgr, v, IMB_DIR_DECRYPT, num_jobs)) {
+                        printf("error #%zu decrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else
                         test_suite_update(ctx, 1, 0);
@@ -593,11 +224,7 @@ poly1305_test(struct IMB_MGR *mb_mgr)
 
         test_suite_start(&ctx, "POLY1305");
         for (i = 1; i < 20; i++)
-                test_poly1305_vectors(mb_mgr, i, rfc7539_vectors,
-                                      DIM(rfc7539_vectors),
-                                      &ctx,
-                                      "Poly1305 RFC7539 vectors");
-
+                test_poly1305_vectors(mb_mgr, i, &ctx, "Poly1305 RFC7539 vectors");
         errors = test_suite_end(&ctx);
 
 	return errors;
diff --git a/test/kat-app/poly1305_test.json.c b/test/kat-app/poly1305_test.json.c
new file mode 100644
index 00000000..1a479108
--- /dev/null
+++ b/test/kat-app/poly1305_test.json.c
@@ -0,0 +1,139 @@
+/* POLY1305, RFC7539 */
+#include "mac_test.h"
+
+const struct mac_test poly1305_test_json[] = {
+    /* Vectors from https://tools.ietf.org/html/rfc7539 */
+    {256, 128, 1,
+     "\x85\xd6\xbe\x78\x57\x55\x6d\x33\x7f\x44\x52\xfe\x42\xd5\x06\xa8\x01\x03"
+     "\x80\x8a\xfb\x0d\xb2\xfd\x4a\xbf\xf6\xaf\x41\x49\xf5\x1b",
+     "\x43\x72\x79\x70\x74\x6f\x67\x72\x61\x70\x68\x69\x63\x20\x46\x6f\x72\x75"
+     "\x6d\x20\x52\x65\x73\x65\x61\x72\x63\x68\x20\x47\x72\x6f\x75\x70",
+     "\xa8\x06\x1d\xc1\x30\x51\x36\xc6\xc2\x2b\x8b\xaf\x0c\x01\x27\xa9", 1, 272,
+     NULL, 0},
+    {256, 128, 2,
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 1, 512,
+     NULL, 0},
+    {256, 128, 3,
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x36\xe5"
+     "\xf6\xb5\xc5\xe0\x60\x70\xf0\xef\xca\x96\x22\x7a\x86\x3e",
+     "\x41\x6e\x79\x20\x73\x75\x62\x6d\x69\x73\x73\x69\x6f\x6e\x20\x74\x6f\x20"
+     "\x74\x68\x65\x20\x49\x45\x54\x46\x20\x69\x6e\x74\x65\x6e\x64\x65\x64\x20"
+     "\x62\x79\x20\x74\x68\x65\x20\x43\x6f\x6e\x74\x72\x69\x62\x75\x74\x6f\x72"
+     "\x20\x66\x6f\x72\x20\x70\x75\x62\x6c\x69\x63\x61\x74\x69\x6f\x6e\x20\x61"
+     "\x73\x20\x61\x6c\x6c\x20\x6f\x72\x20\x70\x61\x72\x74\x20\x6f\x66\x20\x61"
+     "\x6e\x20\x49\x45\x54\x46\x20\x49\x6e\x74\x65\x72\x6e\x65\x74\x2d\x44\x72"
+     "\x61\x66\x74\x20\x6f\x72\x20\x52\x46\x43\x20\x61\x6e\x64\x20\x61\x6e\x79"
+     "\x20\x73\x74\x61\x74\x65\x6d\x65\x6e\x74\x20\x6d\x61\x64\x65\x20\x77\x69"
+     "\x74\x68\x69\x6e\x20\x74\x68\x65\x20\x63\x6f\x6e\x74\x65\x78\x74\x20\x6f"
+     "\x66\x20\x61\x6e\x20\x49\x45\x54\x46\x20\x61\x63\x74\x69\x76\x69\x74\x79"
+     "\x20\x69\x73\x20\x63\x6f\x6e\x73\x69\x64\x65\x72\x65\x64\x20\x61\x6e\x20"
+     "\x22\x49\x45\x54\x46\x20\x43\x6f\x6e\x74\x72\x69\x62\x75\x74\x69\x6f\x6e"
+     "\x22\x2e\x20\x53\x75\x63\x68\x20\x73\x74\x61\x74\x65\x6d\x65\x6e\x74\x73"
+     "\x20\x69\x6e\x63\x6c\x75\x64\x65\x20\x6f\x72\x61\x6c\x20\x73\x74\x61\x74"
+     "\x65\x6d\x65\x6e\x74\x73\x20\x69\x6e\x20\x49\x45\x54\x46\x20\x73\x65\x73"
+     "\x73\x69\x6f\x6e\x73\x2c\x20\x61\x73\x20\x77\x65\x6c\x6c\x20\x61\x73\x20"
+     "\x77\x72\x69\x74\x74\x65\x6e\x20\x61\x6e\x64\x20\x65\x6c\x65\x63\x74\x72"
+     "\x6f\x6e\x69\x63\x20\x63\x6f\x6d\x6d\x75\x6e\x69\x63\x61\x74\x69\x6f\x6e"
+     "\x73\x20\x6d\x61\x64\x65\x20\x61\x74\x20\x61\x6e\x79\x20\x74\x69\x6d\x65"
+     "\x20\x6f\x72\x20\x70\x6c\x61\x63\x65\x2c\x20\x77\x68\x69\x63\x68\x20\x61"
+     "\x72\x65\x20\x61\x64\x64\x72\x65\x73\x73\x65\x64\x20\x74\x6f",
+     "\x36\xe5\xf6\xb5\xc5\xe0\x60\x70\xf0\xef\xca\x96\x22\x7a\x86\x3e", 1,
+     3000, NULL, 0},
+    {256, 128, 4,
+     "\x36\xe5\xf6\xb5\xc5\xe0\x60\x70\xf0\xef\xca\x96\x22\x7a\x86\x3e\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\x41\x6e\x79\x20\x73\x75\x62\x6d\x69\x73\x73\x69\x6f\x6e\x20\x74\x6f\x20"
+     "\x74\x68\x65\x20\x49\x45\x54\x46\x20\x69\x6e\x74\x65\x6e\x64\x65\x64\x20"
+     "\x62\x79\x20\x74\x68\x65\x20\x43\x6f\x6e\x74\x72\x69\x62\x75\x74\x6f\x72"
+     "\x20\x66\x6f\x72\x20\x70\x75\x62\x6c\x69\x63\x61\x74\x69\x6f\x6e\x20\x61"
+     "\x73\x20\x61\x6c\x6c\x20\x6f\x72\x20\x70\x61\x72\x74\x20\x6f\x66\x20\x61"
+     "\x6e\x20\x49\x45\x54\x46\x20\x49\x6e\x74\x65\x72\x6e\x65\x74\x2d\x44\x72"
+     "\x61\x66\x74\x20\x6f\x72\x20\x52\x46\x43\x20\x61\x6e\x64\x20\x61\x6e\x79"
+     "\x20\x73\x74\x61\x74\x65\x6d\x65\x6e\x74\x20\x6d\x61\x64\x65\x20\x77\x69"
+     "\x74\x68\x69\x6e\x20\x74\x68\x65\x20\x63\x6f\x6e\x74\x65\x78\x74\x20\x6f"
+     "\x66\x20\x61\x6e\x20\x49\x45\x54\x46\x20\x61\x63\x74\x69\x76\x69\x74\x79"
+     "\x20\x69\x73\x20\x63\x6f\x6e\x73\x69\x64\x65\x72\x65\x64\x20\x61\x6e\x20"
+     "\x22\x49\x45\x54\x46\x20\x43\x6f\x6e\x74\x72\x69\x62\x75\x74\x69\x6f\x6e"
+     "\x22\x2e\x20\x53\x75\x63\x68\x20\x73\x74\x61\x74\x65\x6d\x65\x6e\x74\x73"
+     "\x20\x69\x6e\x63\x6c\x75\x64\x65\x20\x6f\x72\x61\x6c\x20\x73\x74\x61\x74"
+     "\x65\x6d\x65\x6e\x74\x73\x20\x69\x6e\x20\x49\x45\x54\x46\x20\x73\x65\x73"
+     "\x73\x69\x6f\x6e\x73\x2c\x20\x61\x73\x20\x77\x65\x6c\x6c\x20\x61\x73\x20"
+     "\x77\x72\x69\x74\x74\x65\x6e\x20\x61\x6e\x64\x20\x65\x6c\x65\x63\x74\x72"
+     "\x6f\x6e\x69\x63\x20\x63\x6f\x6d\x6d\x75\x6e\x69\x63\x61\x74\x69\x6f\x6e"
+     "\x73\x20\x6d\x61\x64\x65\x20\x61\x74\x20\x61\x6e\x79\x20\x74\x69\x6d\x65"
+     "\x20\x6f\x72\x20\x70\x6c\x61\x63\x65\x2c\x20\x77\x68\x69\x63\x68\x20\x61"
+     "\x72\x65\x20\x61\x64\x64\x72\x65\x73\x73\x65\x64\x20\x74\x6f",
+     "\xf3\x47\x7e\x7c\xd9\x54\x17\xaf\x89\xa6\xb8\x79\x4c\x31\x0c\xf0", 1,
+     3000, NULL, 0},
+    {256, 128, 5,
+     "\x1c\x92\x40\xa5\xeb\x55\xd3\x8a\xf3\x33\x88\x86\x04\xf6\xb5\xf0\x47\x39"
+     "\x17\xc1\x40\x2b\x80\x09\x9d\xca\x5c\xbc\x20\x70\x75\xc0",
+     "\x27\x54\x77\x61\x73\x20\x62\x72\x69\x6c\x6c\x69\x67\x2c\x20\x61\x6e\x64"
+     "\x20\x74\x68\x65\x20\x73\x6c\x69\x74\x68\x79\x20\x74\x6f\x76\x65\x73\x0a"
+     "\x44\x69\x64\x20\x67\x79\x72\x65\x20\x61\x6e\x64\x20\x67\x69\x6d\x62\x6c"
+     "\x65\x20\x69\x6e\x20\x74\x68\x65\x20\x77\x61\x62\x65\x3a\x0a\x41\x6c\x6c"
+     "\x20\x6d\x69\x6d\x73\x79\x20\x77\x65\x72\x65\x20\x74\x68\x65\x20\x62\x6f"
+     "\x72\x6f\x67\x6f\x76\x65\x73\x2c\x0a\x41\x6e\x64\x20\x74\x68\x65\x20\x6d"
+     "\x6f\x6d\x65\x20\x72\x61\x74\x68\x73\x20\x6f\x75\x74\x67\x72\x61\x62\x65"
+     "\x2e",
+     "\x45\x41\x66\x9a\x7e\xaa\xee\x61\xe7\x08\xdc\x7c\xbc\xc5\xeb\x62", 1,
+     1016, NULL, 0},
+    {256, 128, 6,
+     "\x02\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff",
+     "\x03\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 1, 128,
+     NULL, 0},
+    {256, 128, 7,
+     "\x02\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\xff\xff"
+     "\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff",
+     "\x02\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\x03\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 1, 128,
+     NULL, 0},
+    {256, 128, 8,
+     "\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xf0\xff"
+     "\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\x11\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\x05\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 1, 384,
+     NULL, 0},
+    {256, 128, 9,
+     "\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfb\xfe"
+     "\xfe\xfe\xfe\xfe\xfe\xfe\xfe\xfe\xfe\xfe\xfe\xfe\xfe\xfe\x01\x01\x01\x01"
+     "\x01\x01\x01\x01\x01\x01\x01\x01\x01\x01\x01\x01",
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 1, 384,
+     NULL, 0},
+    {256, 128, 10,
+     "\x02\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\xfd\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff",
+     "\xfa\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff", 1, 128,
+     NULL, 0},
+    {256, 128, 11,
+     "\x01\x00\x00\x00\x00\x00\x00\x00\x04\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\xe3\x35\x94\xd7\x50\x5e\x43\xb9\x00\x00\x00\x00\x00\x00\x00\x00\x33\x94"
+     "\xd7\x50\x5e\x43\x79\xcd\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x01\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\x14\x00\x00\x00\x00\x00\x00\x00\x55\x00\x00\x00\x00\x00\x00\x00", 1, 512,
+     NULL, 0},
+    {256, 128, 12,
+     "\x01\x00\x00\x00\x00\x00\x00\x00\x04\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\xe3\x35\x94\xd7\x50\x5e\x43\xb9\x00\x00\x00\x00\x00\x00\x00\x00\x33\x94"
+     "\xd7\x50\x5e\x43\x79\xcd\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+     "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+     "\x13\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 1, 384,
+     NULL, 0},
+    {0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0}
+};
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index d635f22b..eb2d183b 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj ghash_test.json.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj ghash_test.json.obj poly1305_test.json.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
-- 
GitLab


From f7cfc4d8a798f8bf007464c1ab5842ff236e7ebb Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Mon, 29 May 2023 11:02:01 +0100
Subject: [PATCH 286/332] test: [CMAC] Unify test vectors

---
 test/kat-app/CMakeLists.txt   |    1 +
 test/kat-app/Makefile         |    1 +
 test/kat-app/cmac_test.c      | 1366 ++++++---------------------------
 test/kat-app/cmac_test.json.c |  393 ++++++++++
 test/kat-app/win_x64.mak      |    2 +-
 5 files changed, 645 insertions(+), 1118 deletions(-)
 create mode 100644 test/kat-app/cmac_test.json.c

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 28d3a275..d5557f59 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -85,6 +85,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/gmac_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/ghash_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/poly1305_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/cmac_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
 )
 
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index 4843499e..32bba6bc 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -39,6 +39,7 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
 	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c hmac_sha512.json.c \
 	hmac_md5.json.c gmac_test.json.c ghash_test.c ghash_test.json.c poly1305_test.json.c \
+	cmac_test.json.c \
 	gmac_test.c
 OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
diff --git a/test/kat-app/cmac_test.c b/test/kat-app/cmac_test.c
index 0eaaba4e..a6f28405 100644
--- a/test/kat-app/cmac_test.c
+++ b/test/kat-app/cmac_test.c
@@ -33,6 +33,7 @@
 #include <intel-ipsec-mb.h>
 #include "gcm_ctr_vectors_test.h"
 #include "utils.h"
+#include "mac_test.h"
 
 enum cmac_type {
         CMAC_128 = 0,
@@ -42,1041 +43,197 @@ enum cmac_type {
 
 int cmac_test(struct IMB_MGR *mb_mgr);
 
-/*
- * Test vectors from https://tools.ietf.org/html/rfc4493
- */
-
-/*
- *  Subkey Generation
- *  K              2b7e1516 28aed2a6 abf71588 09cf4f3c
- *  AES-128(key,0) 7df76b0c 1ab899b3 3e42f047 b91b546f
- *  K1             fbeed618 35713366 7c85e08f 7236a8de
- *  K2             f7ddac30 6ae266cc f90bc11e e46d513b
- */
-static const uint8_t key[16] = {
-        0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6,
-        0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c
-};
-static const uint8_t sub_key1[16] = {
-        0xfb, 0xee, 0xd6, 0x18, 0x35, 0x71, 0x33, 0x66,
-        0x7c, 0x85, 0xe0, 0x8f, 0x72, 0x36, 0xa8, 0xde
-};
-static const uint8_t sub_key2[16] = {
-        0xf7, 0xdd, 0xac, 0x30, 0x6a, 0xe2, 0x66, 0xcc,
-        0xf9, 0x0b, 0xc1, 0x1e, 0xe4, 0x6d, 0x51, 0x3b
-};
-
-/*
- *  Example 1: len = 0
- *  M              <empty string>
- *  AES-CMAC       bb1d6929 e9593728 7fa37d12 9b756746
- */
-static const uint8_t T_1[16] = {
-        0xbb, 0x1d, 0x69, 0x29, 0xe9, 0x59, 0x37, 0x28,
-        0x7f, 0xa3, 0x7d, 0x12, 0x9b, 0x75, 0x67, 0x46
-};
-
-/*
- *  Example 2: len = 16
- *  M              6bc1bee2 2e409f96 e93d7e11 7393172a
- *  AES-CMAC       070a16b4 6b4d4144 f79bdd9d d04a287c
- */
-static const uint8_t T_2[16] = {
-        0x07, 0x0a, 0x16, 0xb4, 0x6b, 0x4d, 0x41, 0x44,
-        0xf7, 0x9b, 0xdd, 0x9d, 0xd0, 0x4a, 0x28, 0x7c
-};
-
-/*
- *  Example 3: len = 40
- *  M              6bc1bee2 2e409f96 e93d7e11 7393172a
- *                 ae2d8a57 1e03ac9c 9eb76fac 45af8e51
- *                 30c81c46 a35ce411
- *  AES-CMAC       dfa66747 de9ae630 30ca3261 1497c827
- */
-static const uint8_t T_3[16] = {
-        0xdf, 0xa6, 0x67, 0x47, 0xde, 0x9a, 0xe6, 0x30,
-        0x30, 0xca, 0x32, 0x61, 0x14, 0x97, 0xc8, 0x27
-};
-
-/*
- *  Example 4: len = 64
- *  M              6bc1bee2 2e409f96 e93d7e11 7393172a
- *                 ae2d8a57 1e03ac9c 9eb76fac 45af8e51
- *                 30c81c46 a35ce411 e5fbc119 1a0a52ef
- *                 f69f2445 df4f9b17 ad2b417b e66c3710
- *  AES-CMAC       51f0bebf 7e3b9d92 fc497417 79363cfe
- */
-static const uint8_t T_4[16] = {
-        0x51, 0xf0, 0xbe, 0xbf, 0x7e, 0x3b, 0x9d, 0x92,
-        0xfc, 0x49, 0x74, 0x17, 0x79, 0x36, 0x3c, 0xfe
-};
-
-/*
- *  Custom Vector
- *
- *  Example 5: len = 8
- *  M              6bc1bee2 2e409f96
- *  AES-CMAC       dc87cdcf 77a2f182 9e012c4d 31af2f8b
- */
-static const uint8_t T_5[16] = {
-        0xdc, 0x87, 0xcd, 0xcf, 0x77, 0xa2, 0xf1, 0x82,
-        0x9e, 0x01, 0x2c, 0x4d, 0x31, 0xaf, 0x2f, 0x8b
-};
-
-static const uint8_t M[64] = {
-        0x6b, 0xc1, 0xbe, 0xe2, 0x2e, 0x40, 0x9f, 0x96,
-        0xe9, 0x3d, 0x7e, 0x11, 0x73, 0x93, 0x17, 0x2a,
-        0xae, 0x2d, 0x8a, 0x57, 0x1e, 0x03, 0xac, 0x9c,
-        0x9e, 0xb7, 0x6f, 0xac, 0x45, 0xaf, 0x8e, 0x51,
-        0x30, 0xc8, 0x1c, 0x46, 0xa3, 0x5c, 0xe4, 0x11,
-        0xe5, 0xfb, 0xc1, 0x19, 0x1a, 0x0a, 0x52, 0xef,
-        0xf6, 0x9f, 0x24, 0x45, 0xdf, 0x4f, 0x9b, 0x17,
-        0xad, 0x2b, 0x41, 0x7b, 0xe6, 0x6c, 0x37, 0x10
-};
-
-/*
- * 3GPP 33.401 C.2.1 Test Case 1
- *
- * CMAC(K,M):
- *   K         = (hex) 2bd6459f 82c5b300 952c4910 4881ff48
- *   Mlen      = 122 (bits)
- *   M         = (hex) 38a6f056 c0000000 33323462 63393840
- *
- * Subkey generation:
- *   K1        = (hex) dc84c270 b5bf83f9 6f90be18 8d3f6418
- *   K2        = (hex) b90984e1 6b7f07f2 df217c31 1a7ec8b7
- *
- * MAC generation:
- *   C1        = (hex) 118c6eb8 b775144b 0b831110 54c96eb6
- *   MACT      = (hex) 118c6eb8
- */
-static const uint8_t EIA2_128_K_1[16] = {
-        0x2b, 0xd6, 0x45, 0x9f, 0x82, 0xc5, 0xb3, 0x00,
-        0x95, 0x2c, 0x49, 0x10, 0x48, 0x81, 0xff, 0x48
-};
-
-static const uint8_t EIA2_128_SK1_1[16] = {
-        0xdc, 0x84, 0xc2, 0x70, 0xb5, 0xbf, 0x83, 0xf9,
-        0x6f, 0x90, 0xbe, 0x18, 0x8d, 0x3f, 0x64, 0x18
-};
-
-static const uint8_t EIA2_128_SK2_1[16] = {
-        0xb9, 0x09, 0x84, 0xe1, 0x6b, 0x7f, 0x07, 0xf2,
-        0xdf, 0x21, 0x7c, 0x31, 0x1a, 0x7e, 0xc8, 0xb7
-};
-
-static const uint8_t EIA2_128_T_1[4] = {
-        0x11, 0x8c, 0x6e, 0xb8
-};
-
-static const uint8_t EIA2_128_M_1[16] = {
-        0x38, 0xa6, 0xf0, 0x56, 0xc0, 0x00, 0x00, 0x00,
-        0x33, 0x32, 0x34, 0x62, 0x63, 0x39, 0x38, 0x40 /* 0x40 = 0100 0000 */
-};
-
-/*
- * 3GPP 33.401 C.2.1 Test Case 2
- *
- * CMAC(K, M):
- *   K         = d3c5d592 327fb11c 4035c668 0af8c6d1
- *   Mlen      = 128
- *   M         = 398a59b4 d4000000 484583d5 afe082ae
- *
- * Subkey Generation:
- *   L         = 9b71f299 132915d3 605211b5 e5df8632
- *   K1        = 36e3e532 26522ba6 c0a4236b cbbf0ce3
- *   K2        = 6dc7ca64 4ca4574d 814846d7 977e19c6
- *
- * MAC generation:
- *   C1        = b93787e6 493ff113 ad73d3e0 1e826d73
- *   MACT      = b93787e6
- */
-static const uint8_t EIA2_128_K_2[16] = {
-        0xd3, 0xc5, 0xd5, 0x92, 0x32, 0x7f, 0xb1, 0x1c,
-        0x40, 0x35, 0xc6, 0x68, 0x0a, 0xf8, 0xc6, 0xd1
-};
-
-static const uint8_t EIA2_128_SK1_2[16] = {
-        0x36, 0xe3, 0xe5, 0x32, 0x26, 0x52, 0x2b, 0xa6,
-        0xc0, 0xa4, 0x23, 0x6b, 0xcb, 0xbf, 0x0c, 0xe3
-};
-
-static const uint8_t EIA2_128_SK2_2[16] = {
-        0x6d, 0xc7, 0xca, 0x64, 0x4c, 0xa4, 0x57, 0x4d,
-        0x81, 0x48, 0x46, 0xd7, 0x97, 0x7e, 0x19, 0xc6
-};
-
-static const uint8_t EIA2_128_T_2[4] = {
-        0xb9, 0x37, 0x87, 0xe6
-};
-
-static const uint8_t EIA2_128_M_2[16] = {
-        0x39, 0x8a, 0x59, 0xb4, 0xd4, 0x00, 0x00, 0x00,
-        0x48, 0x45, 0x83, 0xd5, 0xaf, 0xe0, 0x82, 0xae
-};
-
-/*
- * 3GPP 33.401 C.2.1 Test Case 3
- *
- * CMAC(K, M):
- *   K         = 7e5e9443 1e11d738 28d739cc 6ced4573
- *   Mlen      = 318
- *   M         = 36af6144 c4000000 b3d3c917 0a4e1632 f60f8610 13d22d84 b726b6a2
- *               78d802d1 eeaf1321 ba5929dc
- *
- * Subkey Generation:
- *   L         = d78b4628 35781e79 d2255f8d 309a60ef
- *   K1        = af168c50 6af03cf3 a44abf1a 6134c159
- *   K2        = 5e2d18a0 d5e079e7 48957e34 c2698235
- *
- * MAC generation:
- *   C3        = 1f60b01d e05aa666 3bda32c6 1771e70b
- *   MACT      = 1f60b01d
- */
-static const uint8_t EIA2_128_K_3[16] = {
-        0x7e, 0x5e, 0x94, 0x43, 0x1e, 0x11, 0xd7, 0x38,
-        0x28, 0xd7, 0x39, 0xcc, 0x6c, 0xed, 0x45, 0x73
-};
-
-static const uint8_t EIA2_128_SK1_3[16] = {
-        0xaf, 0x16, 0x8c, 0x50, 0x6a, 0xf0, 0x3c, 0xf3,
-        0xa4, 0x4a, 0xbf, 0x1a, 0x61, 0x34, 0xc1, 0x59
-};
-
-static const uint8_t EIA2_128_SK2_3[16] = {
-        0x5e, 0x2d, 0x18, 0xa0, 0xd5, 0xe0, 0x79, 0xe7,
-        0x48, 0x95, 0x7e, 0x34, 0xc2, 0x69, 0x82, 0x35
-};
-
-static const uint8_t EIA2_128_T_3[4] = {
-        0x1f, 0x60, 0xb0, 0x1d
-};
-
-static const uint8_t EIA2_128_M_3[40] = {
-        0x36, 0xaf, 0x61, 0x44, 0xc4, 0x00, 0x00, 0x00,
-        0xb3, 0xd3, 0xc9, 0x17, 0x0a, 0x4e, 0x16, 0x32,
-        0xf6, 0x0f, 0x86, 0x10, 0x13, 0xd2, 0x2d, 0x84,
-        0xb7, 0x26, 0xb6, 0xa2, 0x78, 0xd8, 0x02, 0xd1,
-        0xee, 0xaf, 0x13, 0x21, 0xba, 0x59, 0x29, 0xdc
-};
-
-/*
- * 3GPP 33.401 C.2.1 Test Case 4
- *
- * CMAC(K, M):
- *   K         = d3419be8 21087acd 02123a92 48033359
- *   Mlen      = 575
- *   M         = c7590ea9 b8000000 bbb05703 8809496b
- *               cff86d6f bc8ce5b1 35a06b16 6054f2d5
- *               65be8ace 75dc851e 0bcdd8f0 7141c495
- *               872fb5d8 c0c66a8b 6da55666 3e4e4612
- *               05d84580 bee5bc7e
- *
- * Subkey Generation:
- *   L         = 054dd008 2d9ecd21 a3f32b0a a7369be4
- *   K1        = 0a9ba010 5b3d9a43 47e65615 4e6d37c8
- *   K2        = 15374020 b67b3486 8fccac2a 9cda6f90
- *
- * MAC generation:
- *   C5        = 6846a2f0 a0b6be7a 4fb26a15 7e914c53
- *   MACT      = 6846a2f0
- */
-static const uint8_t EIA2_128_K_4[16] = {
-        0xd3, 0x41, 0x9b, 0xe8, 0x21, 0x08, 0x7a, 0xcd,
-        0x02, 0x12, 0x3a, 0x92, 0x48, 0x03, 0x33, 0x59
-};
-
-static const uint8_t EIA2_128_SK1_4[16] = {
-        0x0a, 0x9b, 0xa0, 0x10, 0x5b, 0x3d, 0x9a, 0x43,
-        0x47, 0xe6, 0x56, 0x15, 0x4e, 0x6d, 0x37, 0xc8
-};
-
-static const uint8_t EIA2_128_SK2_4[16] = {
-        0x15, 0x37, 0x40, 0x20, 0xb6, 0x7b, 0x34, 0x86,
-        0x8f, 0xcc, 0xac, 0x2a, 0x9c, 0xda, 0x6f, 0x90
-};
-
-static const uint8_t EIA2_128_T_4[4] = {
-        0x68, 0x46, 0xa2, 0xf0
-};
-
-static const uint8_t EIA2_128_M_4[72] = {
-        0xc7, 0x59, 0x0e, 0xa9, 0xb8, 0x00, 0x00, 0x00,
-        0xbb, 0xb0, 0x57, 0x03, 0x88, 0x09, 0x49, 0x6b,
-        0xcf, 0xf8, 0x6d, 0x6f, 0xbc, 0x8c, 0xe5, 0xb1,
-        0x35, 0xa0, 0x6b, 0x16, 0x60, 0x54, 0xf2, 0xd5,
-        0x65, 0xbe, 0x8a, 0xce, 0x75, 0xdc, 0x85, 0x1e,
-        0x0b, 0xcd, 0xd8, 0xf0, 0x71, 0x41, 0xc4, 0x95,
-        0x87, 0x2f, 0xb5, 0xd8, 0xc0, 0xc6, 0x6a, 0x8b,
-        0x6d, 0xa5, 0x56, 0x66, 0x3e, 0x4e, 0x46, 0x12,
-        0x05, 0xd8, 0x45, 0x80, 0xbe, 0xe5, 0xbc, 0x7e
-};
-
-/*
- * 3GPP 33.401 C.2.1 Test Case 5
- *
- * CMAC(K, M):
- *   K         = 83fd23a2 44a74cf3 58da3019 f1722635
- *   Mlen      = 832
- *   M         = 36af6144 7c000000 35c68716 633c66fb
- *               750c2668 65d53c11 ea05b1e9 fa49c839
- *               8d48e1ef a5909d39 47902837 f5ae96d5
- *               a05bc8d6 1ca8dbef 1b13a4b4 abfe4fb1
- *               006045b6 74bb5472 9304c382 be53a5af
- *               05556176 f6eaa2ef 1d05e4b0 83181ee6
- *               74cda5a4 85f74d7a
- *
- * Subkey Generation:
- *   L         = 9df61c57 3c86acac 704db9d5 b0dea444
- *   K1        = 3bec38ae 790d5958 e09b73ab 61bd480f
- *   K2        = 77d8715c f21ab2b1 c136e756 c37a901e
- *
- * MAC generation:
- *   C7        = e657e182 5298f2fa ee2ca1e0 7373bc7e
- *   MACT      = e657e182
- */
-static const uint8_t EIA2_128_K_5[16] = {
-        0x83, 0xfd, 0x23, 0xa2, 0x44, 0xa7, 0x4c, 0xf3,
-        0x58, 0xda, 0x30, 0x19, 0xf1, 0x72, 0x26, 0x35
-};
-
-static const uint8_t EIA2_128_SK1_5[16] = {
-        0x3b, 0xec, 0x38, 0xae, 0x79, 0x0d, 0x59, 0x58,
-        0xe0, 0x9b, 0x73, 0xab, 0x61, 0xbd, 0x48, 0x0f
-};
-
-static const uint8_t EIA2_128_SK2_5[16] = {
-        0x77, 0xd8, 0x71, 0x5c, 0xf2, 0x1a, 0xb2, 0xb1,
-        0xc1, 0x36, 0xe7, 0x56, 0xc3, 0x7a, 0x90, 0x1e
-};
-
-static const uint8_t EIA2_128_T_5[4] = {
-        0xe6, 0x57, 0xe1, 0x82
-};
-
-static const uint8_t EIA2_128_M_5[104] = {
-        0x36, 0xaf, 0x61, 0x44, 0x7c, 0x00, 0x00, 0x00,
-        0x35, 0xc6, 0x87, 0x16, 0x63, 0x3c, 0x66, 0xfb,
-        0x75, 0x0c, 0x26, 0x68, 0x65, 0xd5, 0x3c, 0x11,
-        0xea, 0x05, 0xb1, 0xe9, 0xfa, 0x49, 0xc8, 0x39,
-        0x8d, 0x48, 0xe1, 0xef, 0xa5, 0x90, 0x9d, 0x39,
-        0x47, 0x90, 0x28, 0x37, 0xf5, 0xae, 0x96, 0xd5,
-        0xa0, 0x5b, 0xc8, 0xd6, 0x1c, 0xa8, 0xdb, 0xef,
-        0x1b, 0x13, 0xa4, 0xb4, 0xab, 0xfe, 0x4f, 0xb1,
-        0x00, 0x60, 0x45, 0xb6, 0x74, 0xbb, 0x54, 0x72,
-        0x93, 0x04, 0xc3, 0x82, 0xbe, 0x53, 0xa5, 0xaf,
-        0x05, 0x55, 0x61, 0x76, 0xf6, 0xea, 0xa2, 0xef,
-        0x1d, 0x05, 0xe4, 0xb0, 0x83, 0x18, 0x1e, 0xe6,
-        0x74, 0xcd, 0xa5, 0xa4, 0x85, 0xf7, 0x4d, 0x7a
-};
-
-/*
- * 3GPP 33.401 C.2.1 Test Case 6
- *
- * CMAC(K, M):
- *   K         = 6832a65c ff447362 1ebdd4ba 26a921fe
- *   Mlen      = 447
- *   M         = 36af6144 c0000000 d3c53839 62682071
- *               77656676 20323837 63624098 1ba6824c
- *               1bfb1ab4 85472029 b71d808c e33e2cc3
- *               c0b5fc1f 3de8a6dc
- *
- * Subkey Generation:
- *   L         = e50123c3 87e13fd6 8d8bf0d0 a4581685
- *   K1        = ca024787 0fc27fad 1b17e1a1 48b02d8d
- *   K2        = 94048f0e 1f84ff5a 362fc342 91605b9d
- *
- * MAC generation:
- *   C4        = f0668c1e 4197300b 1243f834 25d06c25
- *   MACT      = f0668c1e
- */
-static const uint8_t EIA2_128_K_6[16] = {
-        0x68, 0x32, 0xa6, 0x5c, 0xff, 0x44, 0x73, 0x62,
-        0x1e, 0xbd, 0xd4, 0xba, 0x26, 0xa9, 0x21, 0xfe
-};
-
-static const uint8_t EIA2_128_SK1_6[16] = {
-        0xca, 0x02, 0x47, 0x87, 0x0f, 0xc2, 0x7f, 0xad,
-        0x1b, 0x17, 0xe1, 0xa1, 0x48, 0xb0, 0x2d, 0x8d
-};
-
-static const uint8_t EIA2_128_SK2_6[16] = {
-        0x94, 0x04, 0x8f, 0x0e, 0x1f, 0x84, 0xff, 0x5a,
-        0x36, 0x2f, 0xc3, 0x42, 0x91, 0x60, 0x5b, 0x9d
-};
-
-static const uint8_t EIA2_128_T_6[4] = {
-        0xf0, 0x66, 0x8c, 0x1e
-};
-
-static const uint8_t EIA2_128_M_6[56] = {
-        0x36, 0xaf, 0x61, 0x44, 0xc0, 0x00, 0x00, 0x00,
-        0xd3, 0xc5, 0x38, 0x39, 0x62, 0x68, 0x20, 0x71,
-        0x77, 0x65, 0x66, 0x76, 0x20, 0x32, 0x38, 0x37,
-        0x63, 0x62, 0x40, 0x98, 0x1b, 0xa6, 0x82, 0x4c,
-        0x1b, 0xfb, 0x1a, 0xb4, 0x85, 0x47, 0x20, 0x29,
-        0xb7, 0x1d, 0x80, 0x8c, 0xe3, 0x3e, 0x2c, 0xc3,
-        0xc0, 0xb5, 0xfc, 0x1f, 0x3d, 0xe8, 0xa6, 0xdc
-};
-
-/*
- * 3GPP 33.401 C.2.1 Test Case 7
- *
- * CMAC(K, M):
- *   K         = 5d0a80d8 134ae196 77824b67 1e838af4
- *   Mlen      = 2622
- *   M         = 7827fab2 2c000000 70dedf2d c42c5cbd
- *               3a96f8a0 b11418b3 608d5733 604a2cd3
- *               6aabc70c e3193bb5 153be2d3 c06dfdb2
- *               d16e9c35 7158be6a 41d6b861 e491db3f
- *               bfeb518e fcf048d7 d5895373 0ff30c9e
- *               c470ffcd 663dc342 01c36add c0111c35
- *               b38afee7 cfdb582e 3731f8b4 baa8d1a8
- *               9c06e811 99a97162 27be344e fcb436dd
- *               d0f096c0 64c3b5e2 c399993f c77394f9
- *               e09720a8 11850ef2 3b2ee05d 9e617360
- *               9d86e1c0 c18ea51a 012a00bb 413b9cb8
- *               188a703c d6bae31c c67b34b1 b00019e6
- *               a2b2a690 f02671fe 7c9ef8de c0094e53
- *               3763478d 58d2c5f5 b827a014 8c5948a9
- *               6931acf8 4f465a64 e62ce740 07e991e3
- *               7ea823fa 0fb21923 b79905b7 33b631e6
- *               c7d6860a 3831ac35 1a9c730c 52ff72d9
- *               d308eedb ab21fde1 43a0ea17 e23edc1f
- *               74cbb363 8a2033aa a15464ea a733385d
- *               bbeb6fd7 3509b857 e6a419dc a1d8907a
- *               f977fbac 4dfa35ec
- *
- * Subkey Generation:
- *   L         = 9832e229 fbb93970 bcf7b282 3ee4fe5d
- *   K1        = 3065c453 f77272e1 79ef6504 7dc9fc3d
- *   K2        = 60cb88a7 eee4e5c2 f3deca08 fb93f87a
- *
- * MAC generation:
- *   C21       = f4cc8fa3 59e6e2e7 6e09c45d 6ea5e0de
- *   MACT      = f4cc8fa3
- */
-static const uint8_t EIA2_128_K_7[16] = {
-        0x5d, 0x0a, 0x80, 0xd8, 0x13, 0x4a, 0xe1, 0x96,
-        0x77, 0x82, 0x4b, 0x67, 0x1e, 0x83, 0x8a, 0xf4
-};
-
-static const uint8_t EIA2_128_SK1_7[16] = {
-        0x30, 0x65, 0xc4, 0x53, 0xf7, 0x72, 0x72, 0xe1,
-        0x79, 0xef, 0x65, 0x04, 0x7d, 0xc9, 0xfc, 0x3d
-};
-
-static const uint8_t EIA2_128_SK2_7[16] = {
-        0x60, 0xcb, 0x88, 0xa7, 0xee, 0xe4, 0xe5, 0xc2,
-        0xf3, 0xde, 0xca, 0x08, 0xfb, 0x93, 0xf8, 0x7a
-};
-
-static const uint8_t EIA2_128_T_7[4] = {
-        0xf4, 0xcc, 0x8f, 0xa3
-};
-
-static const uint8_t EIA2_128_M_7[328] = {
-        0x78, 0x27, 0xfa, 0xb2, 0x2c, 0x00, 0x00, 0x00,
-        0x70, 0xde, 0xdf, 0x2d, 0xc4, 0x2c, 0x5c, 0xbd,
-        0x3a, 0x96, 0xf8, 0xa0, 0xb1, 0x14, 0x18, 0xb3,
-        0x60, 0x8d, 0x57, 0x33, 0x60, 0x4a, 0x2c, 0xd3,
-        0x6a, 0xab, 0xc7, 0x0c, 0xe3, 0x19, 0x3b, 0xb5,
-        0x15, 0x3b, 0xe2, 0xd3, 0xc0, 0x6d, 0xfd, 0xb2,
-        0xd1, 0x6e, 0x9c, 0x35, 0x71, 0x58, 0xbe, 0x6a,
-        0x41, 0xd6, 0xb8, 0x61, 0xe4, 0x91, 0xdb, 0x3f,
-        0xbf, 0xeb, 0x51, 0x8e, 0xfc, 0xf0, 0x48, 0xd7,
-        0xd5, 0x89, 0x53, 0x73, 0x0f, 0xf3, 0x0c, 0x9e,
-        0xc4, 0x70, 0xff, 0xcd, 0x66, 0x3d, 0xc3, 0x42,
-        0x01, 0xc3, 0x6a, 0xdd, 0xc0, 0x11, 0x1c, 0x35,
-        0xb3, 0x8a, 0xfe, 0xe7, 0xcf, 0xdb, 0x58, 0x2e,
-        0x37, 0x31, 0xf8, 0xb4, 0xba, 0xa8, 0xd1, 0xa8,
-        0x9c, 0x06, 0xe8, 0x11, 0x99, 0xa9, 0x71, 0x62,
-        0x27, 0xbe, 0x34, 0x4e, 0xfc, 0xb4, 0x36, 0xdd,
-        0xd0, 0xf0, 0x96, 0xc0, 0x64, 0xc3, 0xb5, 0xe2,
-        0xc3, 0x99, 0x99, 0x3f, 0xc7, 0x73, 0x94, 0xf9,
-        0xe0, 0x97, 0x20, 0xa8, 0x11, 0x85, 0x0e, 0xf2,
-        0x3b, 0x2e, 0xe0, 0x5d, 0x9e, 0x61, 0x73, 0x60,
-        0x9d, 0x86, 0xe1, 0xc0, 0xc1, 0x8e, 0xa5, 0x1a,
-        0x01, 0x2a, 0x00, 0xbb, 0x41, 0x3b, 0x9c, 0xb8,
-        0x18, 0x8a, 0x70, 0x3c, 0xd6, 0xba, 0xe3, 0x1c,
-        0xc6, 0x7b, 0x34, 0xb1, 0xb0, 0x00, 0x19, 0xe6,
-        0xa2, 0xb2, 0xa6, 0x90, 0xf0, 0x26, 0x71, 0xfe,
-        0x7c, 0x9e, 0xf8, 0xde, 0xc0, 0x09, 0x4e, 0x53,
-        0x37, 0x63, 0x47, 0x8d, 0x58, 0xd2, 0xc5, 0xf5,
-        0xb8, 0x27, 0xa0, 0x14, 0x8c, 0x59, 0x48, 0xa9,
-        0x69, 0x31, 0xac, 0xf8, 0x4f, 0x46, 0x5a, 0x64,
-        0xe6, 0x2c, 0xe7, 0x40, 0x07, 0xe9, 0x91, 0xe3,
-        0x7e, 0xa8, 0x23, 0xfa, 0x0f, 0xb2, 0x19, 0x23,
-        0xb7, 0x99, 0x05, 0xb7, 0x33, 0xb6, 0x31, 0xe6,
-        0xc7, 0xd6, 0x86, 0x0a, 0x38, 0x31, 0xac, 0x35,
-        0x1a, 0x9c, 0x73, 0x0c, 0x52, 0xff, 0x72, 0xd9,
-        0xd3, 0x08, 0xee, 0xdb, 0xab, 0x21, 0xfd, 0xe1,
-        0x43, 0xa0, 0xea, 0x17, 0xe2, 0x3e, 0xdc, 0x1f,
-        0x74, 0xcb, 0xb3, 0x63, 0x8a, 0x20, 0x33, 0xaa,
-        0xa1, 0x54, 0x64, 0xea, 0xa7, 0x33, 0x38, 0x5d,
-        0xbb, 0xeb, 0x6f, 0xd7, 0x35, 0x09, 0xb8, 0x57,
-        0xe6, 0xa4, 0x19, 0xdc, 0xa1, 0xd8, 0x90, 0x7a,
-        0xf9, 0x77, 0xfb, 0xac, 0x4d, 0xfa, 0x35, 0xec
-};
-
-/*
- * 3GPP 33.401 C.2.1 Test Case 8
- *
- * CMAC(K, M):
- *   K         = b3120ffd b2cf6af4 e73eaf2e f4ebec69
- *   Mlen      = 16512
- *   M         = 296f393c 5c000000 00000000 00000000
- *               01010101 01010101 e0958045 f3a0bba4
- *               e3968346 f0a3b8a7 c02a018a e6407652
- *               26b987c9 13e6cbf0 83570016 cf83efbc
- *               61c08251 3e21561a 427c009d 28c298ef
- *               ace78ed6 d56c2d45 05ad032e 9c04dc60
- *               e73a8169 6da665c6 c48603a5 7b45ab33
- *               221585e6 8ee31691 87fb0239 528632dd
- *               656c807e a3248b7b 46d002b2 b5c7458e
- *               b85b9ce9 5879e034 0859055e 3b0abbc3
- *               eace8719 caa80265 c97205d5 dc4bcc90
- *               2fe18396 29ed7132 8a0f0449 f588557e
- *               6898860e 042aecd8 4b2404c2 12c9222d
- *               a5bf8a89 ef679787 0cf50771 a60f66a2
- *               ee628536 57addf04 cdde07fa 414e11f1
- *               2b4d81b9 b4e8ac53 8ea30666 688d881f
- *               6c348421 992f31b9 4f8806ed 8fccff4c
- *               9123b896 42527ad6 13b109bf 75167485
- *               f1268bf8 84b4cd23 d29a0934 925703d6
- *               34098f77 67f1be74 91e708a8 bb949a38
- *               73708aef 4a36239e 50cc0823 5cd5ed6b
- *               be578668 a17b58c1 171d0b90 e813a9e4
- *               f58a89d7 19b11042 d6360b1b 0f52deb7
- *               30a58d58 faf46315 954b0a87 26914759
- *               77dc88c0 d733feff 54600a0c c1d0300a
- *               aaeb9457 2c6e95b0 1ae90de0 4f1dce47
- *               f87e8fa7 bebf77e1 dbc20d6b a85cb914
- *               3d518b28 5dfa04b6 98bf0cf7 819f20fa
- *               7a288eb0 703d995c 59940c7c 66de57a9
- *               b70f8237 9b70e203 1e450fcf d2181326
- *               fcd28d88 23baaa80 df6e0f44 35596475
- *               39fd8907 c0ffd9d7 9c130ed8 1c9afd9b
- *               7e848c9f ed38443d 5d380e53 fbdb8ac8
- *               c3d3f068 76054f12 2461107d e92fea09
- *               c6f6923a 188d53af e54a10f6 0e6e9d5a
- *               03d996b5 fbc820f8 a637116a 27ad04b4
- *               44a0932d d60fbd12 671c11e1 c0ec73e7
- *               89879faa 3d42c64d 20cd1252 742a3768
- *               c25a9015 85888ece e1e612d9 936b403b
- *               0775949a 66cdfd99 a29b1345 baa8d9d5
- *               400c9102 4b0a6073 63b013ce 5de9ae86
- *               9d3b8d95 b0570b3c 2d391422 d32450cb
- *               cfae9665 2286e96d ec1214a9 34652798
- *               0a8192ea c1c39a3a af6f1535 1da6be76
- *               4df89772 ec0407d0 6e4415be fae7c925
- *               80df9bf5 07497c8f 2995160d 4e218daa
- *               cb02944a bf83340c e8be1686 a960faf9
- *               0e2d90c5 5cc6475b abc3171a 80a36317
- *               4954955d 7101dab1 6ae81791 67e21444
- *               b443a9ea aa7c91de 36d118c3 9d389f8d
- *               d4469a84 6c9a262b f7fa1848 7a79e8de
- *               11699e0b 8fdf557c b48719d4 53ba7130
- *               56109b93 a218c896 75ac195f b4fb0663
- *               9b379714 4955b3c9 327d1aec 003d42ec
- *               d0ea98ab f19ffb4a f3561a67 e77c35bf
- *               15c59c24 12da881d b02b1bfb cebfac51
- *               52bc99bc 3f1d15f7 71001b70 29fedb02
- *               8f8b852b c4407eb8 3f891c9c a733254f
- *               dd1e9edb 56919ce9 fea21c17 4072521c
- *               18319a54 b5d4efbe bddf1d8b 69b1cbf2
- *               5f489fcc 98137254 7cf41d00 8ef0bca1
- *               926f934b 735e090b 3b251eb3 3a36f82e
- *               d9b29cf4 cb944188 fa0e1e38 dd778f7d
- *               1c9d987b 28d132df b9731fa4 f4b41693
- *               5be49de3 0516af35 78581f2f 13f561c0
- *               66336194 1eab249a 4bc123f8 d15cd711
- *               a956a1bf 20fe6eb7 8aea2373 361da042
- *               6c79a530 c3bb1de0 c99722ef 1fde39ac
- *               2b00a0a8 ee7c800a 08bc2264 f89f4eff
- *               e627ac2f 0531fb55 4f6d21d7 4c590a70
- *               adfaa390 bdfbb3d6 8e46215c ab187d23
- *               68d5a71f 5ebec081 cd3b20c0 82dbe4cd
- *               2faca287 73795d6b 0c10204b 659a939e
- *               f29bbe10 88243624 429927a7 eb576dd3
- *               a00ea5e0 1af5d475 83b2272c 0c161a80
- *               6521a16f f9b0a722 c0cf26b0 25d5836e
- *               2258a4f7 d4773ac8 01e4263b c294f43d
- *               ef7fa870 3f3a4197 46352588 7652b0b2
- *               a4a2a7cf 87f00914 871e2503 9113c7e1
- *               618da340 64b57a43 c463249f b8d05e0f
- *               26f4a6d8 4972e7a9 05482414 5f91295c
- *               dbe39a6f 920facc6 59712b46 a54ba295
- *               bbe6a901 54e91b33 985a2bcd 420ad5c6
- *               7ec9ad8e b7ac6864 db272a51 6bc94c28
- *               39b0a816 9a6bf58e 1a0c2ada 8c883b7b
- *               f497a491 71268ed1 5ddd2969 384e7ff4
- *               bf4aab2e c9ecc652 9cf629e2 df0f08a7
- *               7a65afa1 2aa9b505 df8b287e f6cc9149
- *               3d1caa39 076e28ef 1ea028f5 118de61a
- *               e02bb6ae fc3343a0 50292f19 9f401857
- *               b2bead5e 6ee2a1f1 91022f92 78016f04
- *               7791a9d1 8da7d2a6 d27f2e0e 51c2f6ea
- *               30e8ac49 a0604f4c 13542e85 b68381b9
- *               fdcfa0ce 4b2d3413 54852d36 0245c536
- *               b612af71 f3e77c90 95ae2dbd e504b265
- *               733dabfe 10a20fc7 d6d32c21 ccc72b8b
- *               3444ae66 3d65922d 17f82caa 2b865cd8
- *               8913d291 a6589902 6ea13284 39723c19
- *               8c36b0c3 c8d085bf af8a320f de334b4a
- *               4919b44c 2b95f6e8 ecf73393 f7f0d2a4
- *               0e60b1d4 06526b02 2ddc3318 10b1a5f7
- *               c347bd53 ed1f105d 6a0d30ab a477e178
- *               889ab2ec 55d558de ab263020 4336962b
- *               4db5b663 b6902b89 e85b31bc 6af50fc5
- *               0accb3fb 9b57b663 29703137 8db47896
- *               d7fbaf6c 600add2c 67f936db 037986db
- *               856eb49c f2db3f7d a6d23650 e438f188
- *               4041b013 119e4c2a e5af37cc cdfb6866
- *               0738b58b 3c59d1c0 24843747 2aba1f35
- *               ca1fb90c d714aa9f 635534f4 9e7c5bba
- *               81c2b6b3 6fdee21c a27e347f 793d2ce9
- *               44edb23c 8c9b914b e10335e3 50feb507
- *               0394b7a4 a15c0ca1 20283568 b7bfc254
- *               fe838b13 7a2147ce 7c113a3a 4d65499d
- *               9e86b87d bcc7f03b bd3a3ab1 aa243ece
- *               5ba9bcf2 5f82836c fe473b2d 83e7a720
- *               1cd0b96a 72451e86 3f6c3ba6 64a6d073
- *               d1f7b5ed 990865d9 78bd3815 d06094fc
- *               9a2aba52 21c22d5a b996389e 3721e3af
- *               5f05bedd c2875e0d faeb3902 1ee27a41
- *               187cbb45 ef40c3e7 3bc03989 f9a30d12
- *               c54ba7d2 141da8a8 75493e65 776ef35f
- *               97debc22 86cc4af9 b4623eee 902f840c
- *               52f1b8ad 658939ae f71f3f72 b9ec1de2
- *               1588bd35 484ea444 36343ff9 5ead6ab1
- *               d8afb1b2 a303df1b 71e53c4a ea6b2e3e
- *               9372be0d 1bc99798 b0ce3cc1 0d2a596d
- *               565dba82 f88ce4cf f3b33d5d 24e9c083
- *               1124bf1a d54b7925 32983dd6 c3a8b7d0
- *
- * Subkey Generation:
- *   L         = 2c645dcd 72114961 d8b9c864 7aac2c5b
- *   K1        = 58c8bb9a e42292c3 b17390c8 f55858b6
- *   K2        = b1917735 c8452587 62e72191 eab0b16c
- *
- * MAC generation:
- *   C129      = ebd5ccb0 b61ca905 29138303 f3377d22
- *   MACT      = ebd5ccb0
- */
-static const uint8_t EIA2_128_K_8[16] = {
-        0xb3, 0x12, 0x0f, 0xfd, 0xb2, 0xcf, 0x6a, 0xf4,
-        0xe7, 0x3e, 0xaf, 0x2e, 0xf4, 0xeb, 0xec, 0x69
-};
-
-static const uint8_t EIA2_128_SK1_8[16] = {
-        0x58, 0xc8, 0xbb, 0x9a, 0xe4, 0x22, 0x92, 0xc3,
-        0xb1, 0x73, 0x90, 0xc8, 0xf5, 0x58, 0x58, 0xb6
-};
-
-static const uint8_t EIA2_128_SK2_8[16] = {
-        0xb1, 0x91, 0x77, 0x35, 0xc8, 0x45, 0x25, 0x87,
-        0x62, 0xe7, 0x21, 0x91, 0xea, 0xb0, 0xb1, 0x6c
-};
-
-static const uint8_t EIA2_128_T_8[4] = {
-        0xeb, 0xd5, 0xcc, 0xb0
-};
-
-static const uint8_t EIA2_128_M_8[2064] = {
-        0x29, 0x6f, 0x39, 0x3c, 0x5c, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
-        0xe0, 0x95, 0x80, 0x45, 0xf3, 0xa0, 0xbb, 0xa4,
-        0xe3, 0x96, 0x83, 0x46, 0xf0, 0xa3, 0xb8, 0xa7,
-        0xc0, 0x2a, 0x01, 0x8a, 0xe6, 0x40, 0x76, 0x52,
-        0x26, 0xb9, 0x87, 0xc9, 0x13, 0xe6, 0xcb, 0xf0,
-        0x83, 0x57, 0x00, 0x16, 0xcf, 0x83, 0xef, 0xbc,
-        0x61, 0xc0, 0x82, 0x51, 0x3e, 0x21, 0x56, 0x1a,
-        0x42, 0x7c, 0x00, 0x9d, 0x28, 0xc2, 0x98, 0xef,
-        0xac, 0xe7, 0x8e, 0xd6, 0xd5, 0x6c, 0x2d, 0x45,
-        0x05, 0xad, 0x03, 0x2e, 0x9c, 0x04, 0xdc, 0x60,
-        0xe7, 0x3a, 0x81, 0x69, 0x6d, 0xa6, 0x65, 0xc6,
-        0xc4, 0x86, 0x03, 0xa5, 0x7b, 0x45, 0xab, 0x33,
-        0x22, 0x15, 0x85, 0xe6, 0x8e, 0xe3, 0x16, 0x91,
-        0x87, 0xfb, 0x02, 0x39, 0x52, 0x86, 0x32, 0xdd,
-        0x65, 0x6c, 0x80, 0x7e, 0xa3, 0x24, 0x8b, 0x7b,
-        0x46, 0xd0, 0x02, 0xb2, 0xb5, 0xc7, 0x45, 0x8e,
-        0xb8, 0x5b, 0x9c, 0xe9, 0x58, 0x79, 0xe0, 0x34,
-        0x08, 0x59, 0x05, 0x5e, 0x3b, 0x0a, 0xbb, 0xc3,
-        0xea, 0xce, 0x87, 0x19, 0xca, 0xa8, 0x02, 0x65,
-        0xc9, 0x72, 0x05, 0xd5, 0xdc, 0x4b, 0xcc, 0x90,
-        0x2f, 0xe1, 0x83, 0x96, 0x29, 0xed, 0x71, 0x32,
-        0x8a, 0x0f, 0x04, 0x49, 0xf5, 0x88, 0x55, 0x7e,
-        0x68, 0x98, 0x86, 0x0e, 0x04, 0x2a, 0xec, 0xd8,
-        0x4b, 0x24, 0x04, 0xc2, 0x12, 0xc9, 0x22, 0x2d,
-        0xa5, 0xbf, 0x8a, 0x89, 0xef, 0x67, 0x97, 0x87,
-        0x0c, 0xf5, 0x07, 0x71, 0xa6, 0x0f, 0x66, 0xa2,
-        0xee, 0x62, 0x85, 0x36, 0x57, 0xad, 0xdf, 0x04,
-        0xcd, 0xde, 0x07, 0xfa, 0x41, 0x4e, 0x11, 0xf1,
-        0x2b, 0x4d, 0x81, 0xb9, 0xb4, 0xe8, 0xac, 0x53,
-        0x8e, 0xa3, 0x06, 0x66, 0x68, 0x8d, 0x88, 0x1f,
-        0x6c, 0x34, 0x84, 0x21, 0x99, 0x2f, 0x31, 0xb9,
-        0x4f, 0x88, 0x06, 0xed, 0x8f, 0xcc, 0xff, 0x4c,
-        0x91, 0x23, 0xb8, 0x96, 0x42, 0x52, 0x7a, 0xd6,
-        0x13, 0xb1, 0x09, 0xbf, 0x75, 0x16, 0x74, 0x85,
-        0xf1, 0x26, 0x8b, 0xf8, 0x84, 0xb4, 0xcd, 0x23,
-        0xd2, 0x9a, 0x09, 0x34, 0x92, 0x57, 0x03, 0xd6,
-        0x34, 0x09, 0x8f, 0x77, 0x67, 0xf1, 0xbe, 0x74,
-        0x91, 0xe7, 0x08, 0xa8, 0xbb, 0x94, 0x9a, 0x38,
-        0x73, 0x70, 0x8a, 0xef, 0x4a, 0x36, 0x23, 0x9e,
-        0x50, 0xcc, 0x08, 0x23, 0x5c, 0xd5, 0xed, 0x6b,
-        0xbe, 0x57, 0x86, 0x68, 0xa1, 0x7b, 0x58, 0xc1,
-        0x17, 0x1d, 0x0b, 0x90, 0xe8, 0x13, 0xa9, 0xe4,
-        0xf5, 0x8a, 0x89, 0xd7, 0x19, 0xb1, 0x10, 0x42,
-        0xd6, 0x36, 0x0b, 0x1b, 0x0f, 0x52, 0xde, 0xb7,
-        0x30, 0xa5, 0x8d, 0x58, 0xfa, 0xf4, 0x63, 0x15,
-        0x95, 0x4b, 0x0a, 0x87, 0x26, 0x91, 0x47, 0x59,
-        0x77, 0xdc, 0x88, 0xc0, 0xd7, 0x33, 0xfe, 0xff,
-        0x54, 0x60, 0x0a, 0x0c, 0xc1, 0xd0, 0x30, 0x0a,
-        0xaa, 0xeb, 0x94, 0x57, 0x2c, 0x6e, 0x95, 0xb0,
-        0x1a, 0xe9, 0x0d, 0xe0, 0x4f, 0x1d, 0xce, 0x47,
-        0xf8, 0x7e, 0x8f, 0xa7, 0xbe, 0xbf, 0x77, 0xe1,
-        0xdb, 0xc2, 0x0d, 0x6b, 0xa8, 0x5c, 0xb9, 0x14,
-        0x3d, 0x51, 0x8b, 0x28, 0x5d, 0xfa, 0x04, 0xb6,
-        0x98, 0xbf, 0x0c, 0xf7, 0x81, 0x9f, 0x20, 0xfa,
-        0x7a, 0x28, 0x8e, 0xb0, 0x70, 0x3d, 0x99, 0x5c,
-        0x59, 0x94, 0x0c, 0x7c, 0x66, 0xde, 0x57, 0xa9,
-        0xb7, 0x0f, 0x82, 0x37, 0x9b, 0x70, 0xe2, 0x03,
-        0x1e, 0x45, 0x0f, 0xcf, 0xd2, 0x18, 0x13, 0x26,
-        0xfc, 0xd2, 0x8d, 0x88, 0x23, 0xba, 0xaa, 0x80,
-        0xdf, 0x6e, 0x0f, 0x44, 0x35, 0x59, 0x64, 0x75,
-        0x39, 0xfd, 0x89, 0x07, 0xc0, 0xff, 0xd9, 0xd7,
-        0x9c, 0x13, 0x0e, 0xd8, 0x1c, 0x9a, 0xfd, 0x9b,
-        0x7e, 0x84, 0x8c, 0x9f, 0xed, 0x38, 0x44, 0x3d,
-        0x5d, 0x38, 0x0e, 0x53, 0xfb, 0xdb, 0x8a, 0xc8,
-        0xc3, 0xd3, 0xf0, 0x68, 0x76, 0x05, 0x4f, 0x12,
-        0x24, 0x61, 0x10, 0x7d, 0xe9, 0x2f, 0xea, 0x09,
-        0xc6, 0xf6, 0x92, 0x3a, 0x18, 0x8d, 0x53, 0xaf,
-        0xe5, 0x4a, 0x10, 0xf6, 0x0e, 0x6e, 0x9d, 0x5a,
-        0x03, 0xd9, 0x96, 0xb5, 0xfb, 0xc8, 0x20, 0xf8,
-        0xa6, 0x37, 0x11, 0x6a, 0x27, 0xad, 0x04, 0xb4,
-        0x44, 0xa0, 0x93, 0x2d, 0xd6, 0x0f, 0xbd, 0x12,
-        0x67, 0x1c, 0x11, 0xe1, 0xc0, 0xec, 0x73, 0xe7,
-        0x89, 0x87, 0x9f, 0xaa, 0x3d, 0x42, 0xc6, 0x4d,
-        0x20, 0xcd, 0x12, 0x52, 0x74, 0x2a, 0x37, 0x68,
-        0xc2, 0x5a, 0x90, 0x15, 0x85, 0x88, 0x8e, 0xce,
-        0xe1, 0xe6, 0x12, 0xd9, 0x93, 0x6b, 0x40, 0x3b,
-        0x07, 0x75, 0x94, 0x9a, 0x66, 0xcd, 0xfd, 0x99,
-        0xa2, 0x9b, 0x13, 0x45, 0xba, 0xa8, 0xd9, 0xd5,
-        0x40, 0x0c, 0x91, 0x02, 0x4b, 0x0a, 0x60, 0x73,
-        0x63, 0xb0, 0x13, 0xce, 0x5d, 0xe9, 0xae, 0x86,
-        0x9d, 0x3b, 0x8d, 0x95, 0xb0, 0x57, 0x0b, 0x3c,
-        0x2d, 0x39, 0x14, 0x22, 0xd3, 0x24, 0x50, 0xcb,
-        0xcf, 0xae, 0x96, 0x65, 0x22, 0x86, 0xe9, 0x6d,
-        0xec, 0x12, 0x14, 0xa9, 0x34, 0x65, 0x27, 0x98,
-        0x0a, 0x81, 0x92, 0xea, 0xc1, 0xc3, 0x9a, 0x3a,
-        0xaf, 0x6f, 0x15, 0x35, 0x1d, 0xa6, 0xbe, 0x76,
-        0x4d, 0xf8, 0x97, 0x72, 0xec, 0x04, 0x07, 0xd0,
-        0x6e, 0x44, 0x15, 0xbe, 0xfa, 0xe7, 0xc9, 0x25,
-        0x80, 0xdf, 0x9b, 0xf5, 0x07, 0x49, 0x7c, 0x8f,
-        0x29, 0x95, 0x16, 0x0d, 0x4e, 0x21, 0x8d, 0xaa,
-        0xcb, 0x02, 0x94, 0x4a, 0xbf, 0x83, 0x34, 0x0c,
-        0xe8, 0xbe, 0x16, 0x86, 0xa9, 0x60, 0xfa, 0xf9,
-        0x0e, 0x2d, 0x90, 0xc5, 0x5c, 0xc6, 0x47, 0x5b,
-        0xab, 0xc3, 0x17, 0x1a, 0x80, 0xa3, 0x63, 0x17,
-        0x49, 0x54, 0x95, 0x5d, 0x71, 0x01, 0xda, 0xb1,
-        0x6a, 0xe8, 0x17, 0x91, 0x67, 0xe2, 0x14, 0x44,
-        0xb4, 0x43, 0xa9, 0xea, 0xaa, 0x7c, 0x91, 0xde,
-        0x36, 0xd1, 0x18, 0xc3, 0x9d, 0x38, 0x9f, 0x8d,
-        0xd4, 0x46, 0x9a, 0x84, 0x6c, 0x9a, 0x26, 0x2b,
-        0xf7, 0xfa, 0x18, 0x48, 0x7a, 0x79, 0xe8, 0xde,
-        0x11, 0x69, 0x9e, 0x0b, 0x8f, 0xdf, 0x55, 0x7c,
-        0xb4, 0x87, 0x19, 0xd4, 0x53, 0xba, 0x71, 0x30,
-        0x56, 0x10, 0x9b, 0x93, 0xa2, 0x18, 0xc8, 0x96,
-        0x75, 0xac, 0x19, 0x5f, 0xb4, 0xfb, 0x06, 0x63,
-        0x9b, 0x37, 0x97, 0x14, 0x49, 0x55, 0xb3, 0xc9,
-        0x32, 0x7d, 0x1a, 0xec, 0x00, 0x3d, 0x42, 0xec,
-        0xd0, 0xea, 0x98, 0xab, 0xf1, 0x9f, 0xfb, 0x4a,
-        0xf3, 0x56, 0x1a, 0x67, 0xe7, 0x7c, 0x35, 0xbf,
-        0x15, 0xc5, 0x9c, 0x24, 0x12, 0xda, 0x88, 0x1d,
-        0xb0, 0x2b, 0x1b, 0xfb, 0xce, 0xbf, 0xac, 0x51,
-        0x52, 0xbc, 0x99, 0xbc, 0x3f, 0x1d, 0x15, 0xf7,
-        0x71, 0x00, 0x1b, 0x70, 0x29, 0xfe, 0xdb, 0x02,
-        0x8f, 0x8b, 0x85, 0x2b, 0xc4, 0x40, 0x7e, 0xb8,
-        0x3f, 0x89, 0x1c, 0x9c, 0xa7, 0x33, 0x25, 0x4f,
-        0xdd, 0x1e, 0x9e, 0xdb, 0x56, 0x91, 0x9c, 0xe9,
-        0xfe, 0xa2, 0x1c, 0x17, 0x40, 0x72, 0x52, 0x1c,
-        0x18, 0x31, 0x9a, 0x54, 0xb5, 0xd4, 0xef, 0xbe,
-        0xbd, 0xdf, 0x1d, 0x8b, 0x69, 0xb1, 0xcb, 0xf2,
-        0x5f, 0x48, 0x9f, 0xcc, 0x98, 0x13, 0x72, 0x54,
-        0x7c, 0xf4, 0x1d, 0x00, 0x8e, 0xf0, 0xbc, 0xa1,
-        0x92, 0x6f, 0x93, 0x4b, 0x73, 0x5e, 0x09, 0x0b,
-        0x3b, 0x25, 0x1e, 0xb3, 0x3a, 0x36, 0xf8, 0x2e,
-        0xd9, 0xb2, 0x9c, 0xf4, 0xcb, 0x94, 0x41, 0x88,
-        0xfa, 0x0e, 0x1e, 0x38, 0xdd, 0x77, 0x8f, 0x7d,
-        0x1c, 0x9d, 0x98, 0x7b, 0x28, 0xd1, 0x32, 0xdf,
-        0xb9, 0x73, 0x1f, 0xa4, 0xf4, 0xb4, 0x16, 0x93,
-        0x5b, 0xe4, 0x9d, 0xe3, 0x05, 0x16, 0xaf, 0x35,
-        0x78, 0x58, 0x1f, 0x2f, 0x13, 0xf5, 0x61, 0xc0,
-        0x66, 0x33, 0x61, 0x94, 0x1e, 0xab, 0x24, 0x9a,
-        0x4b, 0xc1, 0x23, 0xf8, 0xd1, 0x5c, 0xd7, 0x11,
-        0xa9, 0x56, 0xa1, 0xbf, 0x20, 0xfe, 0x6e, 0xb7,
-        0x8a, 0xea, 0x23, 0x73, 0x36, 0x1d, 0xa0, 0x42,
-        0x6c, 0x79, 0xa5, 0x30, 0xc3, 0xbb, 0x1d, 0xe0,
-        0xc9, 0x97, 0x22, 0xef, 0x1f, 0xde, 0x39, 0xac,
-        0x2b, 0x00, 0xa0, 0xa8, 0xee, 0x7c, 0x80, 0x0a,
-        0x08, 0xbc, 0x22, 0x64, 0xf8, 0x9f, 0x4e, 0xff,
-        0xe6, 0x27, 0xac, 0x2f, 0x05, 0x31, 0xfb, 0x55,
-        0x4f, 0x6d, 0x21, 0xd7, 0x4c, 0x59, 0x0a, 0x70,
-        0xad, 0xfa, 0xa3, 0x90, 0xbd, 0xfb, 0xb3, 0xd6,
-        0x8e, 0x46, 0x21, 0x5c, 0xab, 0x18, 0x7d, 0x23,
-        0x68, 0xd5, 0xa7, 0x1f, 0x5e, 0xbe, 0xc0, 0x81,
-        0xcd, 0x3b, 0x20, 0xc0, 0x82, 0xdb, 0xe4, 0xcd,
-        0x2f, 0xac, 0xa2, 0x87, 0x73, 0x79, 0x5d, 0x6b,
-        0x0c, 0x10, 0x20, 0x4b, 0x65, 0x9a, 0x93, 0x9e,
-        0xf2, 0x9b, 0xbe, 0x10, 0x88, 0x24, 0x36, 0x24,
-        0x42, 0x99, 0x27, 0xa7, 0xeb, 0x57, 0x6d, 0xd3,
-        0xa0, 0x0e, 0xa5, 0xe0, 0x1a, 0xf5, 0xd4, 0x75,
-        0x83, 0xb2, 0x27, 0x2c, 0x0c, 0x16, 0x1a, 0x80,
-        0x65, 0x21, 0xa1, 0x6f, 0xf9, 0xb0, 0xa7, 0x22,
-        0xc0, 0xcf, 0x26, 0xb0, 0x25, 0xd5, 0x83, 0x6e,
-        0x22, 0x58, 0xa4, 0xf7, 0xd4, 0x77, 0x3a, 0xc8,
-        0x01, 0xe4, 0x26, 0x3b, 0xc2, 0x94, 0xf4, 0x3d,
-        0xef, 0x7f, 0xa8, 0x70, 0x3f, 0x3a, 0x41, 0x97,
-        0x46, 0x35, 0x25, 0x88, 0x76, 0x52, 0xb0, 0xb2,
-        0xa4, 0xa2, 0xa7, 0xcf, 0x87, 0xf0, 0x09, 0x14,
-        0x87, 0x1e, 0x25, 0x03, 0x91, 0x13, 0xc7, 0xe1,
-        0x61, 0x8d, 0xa3, 0x40, 0x64, 0xb5, 0x7a, 0x43,
-        0xc4, 0x63, 0x24, 0x9f, 0xb8, 0xd0, 0x5e, 0x0f,
-        0x26, 0xf4, 0xa6, 0xd8, 0x49, 0x72, 0xe7, 0xa9,
-        0x05, 0x48, 0x24, 0x14, 0x5f, 0x91, 0x29, 0x5c,
-        0xdb, 0xe3, 0x9a, 0x6f, 0x92, 0x0f, 0xac, 0xc6,
-        0x59, 0x71, 0x2b, 0x46, 0xa5, 0x4b, 0xa2, 0x95,
-        0xbb, 0xe6, 0xa9, 0x01, 0x54, 0xe9, 0x1b, 0x33,
-        0x98, 0x5a, 0x2b, 0xcd, 0x42, 0x0a, 0xd5, 0xc6,
-        0x7e, 0xc9, 0xad, 0x8e, 0xb7, 0xac, 0x68, 0x64,
-        0xdb, 0x27, 0x2a, 0x51, 0x6b, 0xc9, 0x4c, 0x28,
-        0x39, 0xb0, 0xa8, 0x16, 0x9a, 0x6b, 0xf5, 0x8e,
-        0x1a, 0x0c, 0x2a, 0xda, 0x8c, 0x88, 0x3b, 0x7b,
-        0xf4, 0x97, 0xa4, 0x91, 0x71, 0x26, 0x8e, 0xd1,
-        0x5d, 0xdd, 0x29, 0x69, 0x38, 0x4e, 0x7f, 0xf4,
-        0xbf, 0x4a, 0xab, 0x2e, 0xc9, 0xec, 0xc6, 0x52,
-        0x9c, 0xf6, 0x29, 0xe2, 0xdf, 0x0f, 0x08, 0xa7,
-        0x7a, 0x65, 0xaf, 0xa1, 0x2a, 0xa9, 0xb5, 0x05,
-        0xdf, 0x8b, 0x28, 0x7e, 0xf6, 0xcc, 0x91, 0x49,
-        0x3d, 0x1c, 0xaa, 0x39, 0x07, 0x6e, 0x28, 0xef,
-        0x1e, 0xa0, 0x28, 0xf5, 0x11, 0x8d, 0xe6, 0x1a,
-        0xe0, 0x2b, 0xb6, 0xae, 0xfc, 0x33, 0x43, 0xa0,
-        0x50, 0x29, 0x2f, 0x19, 0x9f, 0x40, 0x18, 0x57,
-        0xb2, 0xbe, 0xad, 0x5e, 0x6e, 0xe2, 0xa1, 0xf1,
-        0x91, 0x02, 0x2f, 0x92, 0x78, 0x01, 0x6f, 0x04,
-        0x77, 0x91, 0xa9, 0xd1, 0x8d, 0xa7, 0xd2, 0xa6,
-        0xd2, 0x7f, 0x2e, 0x0e, 0x51, 0xc2, 0xf6, 0xea,
-        0x30, 0xe8, 0xac, 0x49, 0xa0, 0x60, 0x4f, 0x4c,
-        0x13, 0x54, 0x2e, 0x85, 0xb6, 0x83, 0x81, 0xb9,
-        0xfd, 0xcf, 0xa0, 0xce, 0x4b, 0x2d, 0x34, 0x13,
-        0x54, 0x85, 0x2d, 0x36, 0x02, 0x45, 0xc5, 0x36,
-        0xb6, 0x12, 0xaf, 0x71, 0xf3, 0xe7, 0x7c, 0x90,
-        0x95, 0xae, 0x2d, 0xbd, 0xe5, 0x04, 0xb2, 0x65,
-        0x73, 0x3d, 0xab, 0xfe, 0x10, 0xa2, 0x0f, 0xc7,
-        0xd6, 0xd3, 0x2c, 0x21, 0xcc, 0xc7, 0x2b, 0x8b,
-        0x34, 0x44, 0xae, 0x66, 0x3d, 0x65, 0x92, 0x2d,
-        0x17, 0xf8, 0x2c, 0xaa, 0x2b, 0x86, 0x5c, 0xd8,
-        0x89, 0x13, 0xd2, 0x91, 0xa6, 0x58, 0x99, 0x02,
-        0x6e, 0xa1, 0x32, 0x84, 0x39, 0x72, 0x3c, 0x19,
-        0x8c, 0x36, 0xb0, 0xc3, 0xc8, 0xd0, 0x85, 0xbf,
-        0xaf, 0x8a, 0x32, 0x0f, 0xde, 0x33, 0x4b, 0x4a,
-        0x49, 0x19, 0xb4, 0x4c, 0x2b, 0x95, 0xf6, 0xe8,
-        0xec, 0xf7, 0x33, 0x93, 0xf7, 0xf0, 0xd2, 0xa4,
-        0x0e, 0x60, 0xb1, 0xd4, 0x06, 0x52, 0x6b, 0x02,
-        0x2d, 0xdc, 0x33, 0x18, 0x10, 0xb1, 0xa5, 0xf7,
-        0xc3, 0x47, 0xbd, 0x53, 0xed, 0x1f, 0x10, 0x5d,
-        0x6a, 0x0d, 0x30, 0xab, 0xa4, 0x77, 0xe1, 0x78,
-        0x88, 0x9a, 0xb2, 0xec, 0x55, 0xd5, 0x58, 0xde,
-        0xab, 0x26, 0x30, 0x20, 0x43, 0x36, 0x96, 0x2b,
-        0x4d, 0xb5, 0xb6, 0x63, 0xb6, 0x90, 0x2b, 0x89,
-        0xe8, 0x5b, 0x31, 0xbc, 0x6a, 0xf5, 0x0f, 0xc5,
-        0x0a, 0xcc, 0xb3, 0xfb, 0x9b, 0x57, 0xb6, 0x63,
-        0x29, 0x70, 0x31, 0x37, 0x8d, 0xb4, 0x78, 0x96,
-        0xd7, 0xfb, 0xaf, 0x6c, 0x60, 0x0a, 0xdd, 0x2c,
-        0x67, 0xf9, 0x36, 0xdb, 0x03, 0x79, 0x86, 0xdb,
-        0x85, 0x6e, 0xb4, 0x9c, 0xf2, 0xdb, 0x3f, 0x7d,
-        0xa6, 0xd2, 0x36, 0x50, 0xe4, 0x38, 0xf1, 0x88,
-        0x40, 0x41, 0xb0, 0x13, 0x11, 0x9e, 0x4c, 0x2a,
-        0xe5, 0xaf, 0x37, 0xcc, 0xcd, 0xfb, 0x68, 0x66,
-        0x07, 0x38, 0xb5, 0x8b, 0x3c, 0x59, 0xd1, 0xc0,
-        0x24, 0x84, 0x37, 0x47, 0x2a, 0xba, 0x1f, 0x35,
-        0xca, 0x1f, 0xb9, 0x0c, 0xd7, 0x14, 0xaa, 0x9f,
-        0x63, 0x55, 0x34, 0xf4, 0x9e, 0x7c, 0x5b, 0xba,
-        0x81, 0xc2, 0xb6, 0xb3, 0x6f, 0xde, 0xe2, 0x1c,
-        0xa2, 0x7e, 0x34, 0x7f, 0x79, 0x3d, 0x2c, 0xe9,
-        0x44, 0xed, 0xb2, 0x3c, 0x8c, 0x9b, 0x91, 0x4b,
-        0xe1, 0x03, 0x35, 0xe3, 0x50, 0xfe, 0xb5, 0x07,
-        0x03, 0x94, 0xb7, 0xa4, 0xa1, 0x5c, 0x0c, 0xa1,
-        0x20, 0x28, 0x35, 0x68, 0xb7, 0xbf, 0xc2, 0x54,
-        0xfe, 0x83, 0x8b, 0x13, 0x7a, 0x21, 0x47, 0xce,
-        0x7c, 0x11, 0x3a, 0x3a, 0x4d, 0x65, 0x49, 0x9d,
-        0x9e, 0x86, 0xb8, 0x7d, 0xbc, 0xc7, 0xf0, 0x3b,
-        0xbd, 0x3a, 0x3a, 0xb1, 0xaa, 0x24, 0x3e, 0xce,
-        0x5b, 0xa9, 0xbc, 0xf2, 0x5f, 0x82, 0x83, 0x6c,
-        0xfe, 0x47, 0x3b, 0x2d, 0x83, 0xe7, 0xa7, 0x20,
-        0x1c, 0xd0, 0xb9, 0x6a, 0x72, 0x45, 0x1e, 0x86,
-        0x3f, 0x6c, 0x3b, 0xa6, 0x64, 0xa6, 0xd0, 0x73,
-        0xd1, 0xf7, 0xb5, 0xed, 0x99, 0x08, 0x65, 0xd9,
-        0x78, 0xbd, 0x38, 0x15, 0xd0, 0x60, 0x94, 0xfc,
-        0x9a, 0x2a, 0xba, 0x52, 0x21, 0xc2, 0x2d, 0x5a,
-        0xb9, 0x96, 0x38, 0x9e, 0x37, 0x21, 0xe3, 0xaf,
-        0x5f, 0x05, 0xbe, 0xdd, 0xc2, 0x87, 0x5e, 0x0d,
-        0xfa, 0xeb, 0x39, 0x02, 0x1e, 0xe2, 0x7a, 0x41,
-        0x18, 0x7c, 0xbb, 0x45, 0xef, 0x40, 0xc3, 0xe7,
-        0x3b, 0xc0, 0x39, 0x89, 0xf9, 0xa3, 0x0d, 0x12,
-        0xc5, 0x4b, 0xa7, 0xd2, 0x14, 0x1d, 0xa8, 0xa8,
-        0x75, 0x49, 0x3e, 0x65, 0x77, 0x6e, 0xf3, 0x5f,
-        0x97, 0xde, 0xbc, 0x22, 0x86, 0xcc, 0x4a, 0xf9,
-        0xb4, 0x62, 0x3e, 0xee, 0x90, 0x2f, 0x84, 0x0c,
-        0x52, 0xf1, 0xb8, 0xad, 0x65, 0x89, 0x39, 0xae,
-        0xf7, 0x1f, 0x3f, 0x72, 0xb9, 0xec, 0x1d, 0xe2,
-        0x15, 0x88, 0xbd, 0x35, 0x48, 0x4e, 0xa4, 0x44,
-        0x36, 0x34, 0x3f, 0xf9, 0x5e, 0xad, 0x6a, 0xb1,
-        0xd8, 0xaf, 0xb1, 0xb2, 0xa3, 0x03, 0xdf, 0x1b,
-        0x71, 0xe5, 0x3c, 0x4a, 0xea, 0x6b, 0x2e, 0x3e,
-        0x93, 0x72, 0xbe, 0x0d, 0x1b, 0xc9, 0x97, 0x98,
-        0xb0, 0xce, 0x3c, 0xc1, 0x0d, 0x2a, 0x59, 0x6d,
-        0x56, 0x5d, 0xba, 0x82, 0xf8, 0x8c, 0xe4, 0xcf,
-        0xf3, 0xb3, 0x3d, 0x5d, 0x24, 0xe9, 0xc0, 0x83,
-        0x11, 0x24, 0xbf, 0x1a, 0xd5, 0x4b, 0x79, 0x25,
-        0x32, 0x98, 0x3d, 0xd6, 0xc3, 0xa8, 0xb7, 0xd0
-};
-
-/*
- * AES-CMAC-256 vectors
- */
-
-/*
- *  Subkey Generation
- *  K              603DEB10 15CA71BE 2B73AEF0 857D7781
- *                 1F352C07 3B6108D7 2D9810A3 0914DFF4
- *  AES-256(key,0) E568F681 94CF76D6 174D4CC0 4310A854
- *  K1             CAD1ED03 299EEDAC 2E9A9980 8621502F
- *  K2             95A3DA06 533DDB58 5D353301 0C42A0D9
- */
-static const uint8_t cmac_256_key[32] = {
-        0x60, 0x3D, 0xEB, 0x10, 0x15, 0xCA, 0x71, 0xBE,
-        0x2B, 0x73, 0xAE, 0xF0, 0x85, 0x7D, 0x77, 0x81,
-        0x1F, 0x35, 0x2C, 0x07, 0x3B, 0x61, 0x08, 0xD7,
-        0x2D, 0x98, 0x10, 0xA3, 0x09, 0x14, 0xDF, 0xF4
-};
-static const uint8_t cmac_256_sub_key1[16] = {
-        0xCA, 0xD1, 0xED, 0x03, 0x29, 0x9E, 0xED, 0xAC,
-        0x2E, 0x9A, 0x99, 0x80, 0x86, 0x21, 0x50, 0x2F
-};
-static const uint8_t cmac_256_sub_key2[16] = {
-        0x95, 0xA3, 0xDA, 0x06, 0x53, 0x3D, 0xDB, 0x58,
-        0x5D, 0x35, 0x33, 0x01, 0x0C, 0x42, 0xA0, 0xD9
-};
-
-/*
- *  Example 1: len = 0
- *  M              <empty string>
- *  AES-CMAC       028962F6 1B7BF89E FC6B551F 4667D983
- */
-static const uint8_t CMAC_256_T_1[16] = {
-        0x02, 0x89, 0x62, 0xF6, 0x1B, 0x7B, 0xF8, 0x9E,
-        0xFC, 0x6B, 0x55, 0x1F, 0x46, 0x67, 0xD9, 0x83
-};
-
-/*
- *  Example 2: len = 16
- *  M              6BC1BEE2 2E409F96 E93D7E11 7393172A
- *  AES-CMAC       28A7023F 452E8F82 BD4BF28D 8C37C35C
- */
-static const uint8_t CMAC_256_T_2[16] = {
-        0x28, 0xA7, 0x02, 0x3F, 0x45, 0x2E, 0x8F, 0x82,
-        0xBD, 0x4B, 0xF2, 0x8D, 0x8C, 0x37, 0xC3, 0x5C
-};
-
-/*
- *  Example 3: len = 20
- *  M              6BC1BEE2 2E409F96 E93D7E11 7393172A
- *                 AE2D8A57
- *  AES-CMAC       156727DC 0878944A 023C1FE0 3BAD6D93
- */
-static const uint8_t CMAC_256_T_3[16] = {
-        0x15, 0x67, 0x27, 0xDC, 0x08, 0x78, 0x94, 0x4A,
-        0x02, 0x3C, 0x1F, 0xE0, 0x3B, 0xAD, 0x6D, 0x93
-};
-
-/*
- *  Example 4: len = 64
- *  M              6BC1BEE2 2E409F96 E93D7E11 7393172A
- *                 AE2D8A57 1E03AC9C 9EB76FAC 45AF8E51
- *                 30C81C46 A35CE411 E5FBC119 1A0A52EF
- *                 F69F2445 DF4F9B17 AD2B417B E66C3710
- *  AES-CMAC       E1992190 549F6ED5 696A2C05 6C315410
- */
-static const uint8_t CMAC_256_T_4[16] = {
-        0xE1, 0x99, 0x21, 0x90, 0x54, 0x9F, 0x6E, 0xD5,
-        0x69, 0x6A, 0x2C, 0x05, 0x6C, 0x31, 0x54, 0x10
+extern const struct mac_test cmac_128_test_json[];
+extern const struct mac_test cmac_256_test_json[];
+extern const struct mac_test cmac_3gpp_test_json[];
+
+static const struct cmac_subkeys {
+        const char *key;
+        const char *sub_key1;
+        const char *sub_key2;
+} cmac_128_subkeys[] = {
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        {
+                "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+                "\xfb\xee\xd6\x18\x35\x71\x33\x66\x7c\x85\xe0\x8f\x72\x36\xa8\xde",
+                "\xf7\xdd\xac\x30\x6a\xe2\x66\xcc\xf9\x0b\xc1\x1e\xe4\x6d\x51\x3b"
+        },
+        { NULL, NULL, NULL }
+};
+
+static const struct cmac_subkeys cmac_256_subkeys[] = {
+        {
+                "\x60\x3d\xeb\x10\x15\xca\x71\xbe\x2b\x73\xae\xf0\x85\x7d\x77\x81\x1f\x35\x2c\x07\x3b\x61\x08\xd7\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+                "\xca\xd1\xed\x03\x29\x9e\xed\xac\x2e\x9a\x99\x80\x86\x21\x50\x2f",
+                "\x95\xa3\xda\x06\x53\x3d\xdb\x58\x5d\x35\x33\x01\x0c\x42\xa0\xd9"
+        },
+        {
+                "\x60\x3d\xeb\x10\x15\xca\x71\xbe\x2b\x73\xae\xf0\x85\x7d\x77\x81\x1f\x35\x2c\x07\x3b\x61\x08\xd7\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+                "\xca\xd1\xed\x03\x29\x9e\xed\xac\x2e\x9a\x99\x80\x86\x21\x50\x2f",
+                "\x95\xa3\xda\x06\x53\x3d\xdb\x58\x5d\x35\x33\x01\x0c\x42\xa0\xd9"
+        },
+        {
+                "\x60\x3d\xeb\x10\x15\xca\x71\xbe\x2b\x73\xae\xf0\x85\x7d\x77\x81\x1f\x35\x2c\x07\x3b\x61\x08\xd7\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+                "\xca\xd1\xed\x03\x29\x9e\xed\xac\x2e\x9a\x99\x80\x86\x21\x50\x2f",
+                "\x95\xa3\xda\x06\x53\x3d\xdb\x58\x5d\x35\x33\x01\x0c\x42\xa0\xd9"
+        },
+        {
+                "\x60\x3d\xeb\x10\x15\xca\x71\xbe\x2b\x73\xae\xf0\x85\x7d\x77\x81\x1f\x35\x2c\x07\x3b\x61\x08\xd7\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+                "\xca\xd1\xed\x03\x29\x9e\xed\xac\x2e\x9a\x99\x80\x86\x21\x50\x2f",
+                "\x95\xa3\xda\x06\x53\x3d\xdb\x58\x5d\x35\x33\x01\x0c\x42\xa0\xd9"
+        },
+        {NULL, NULL, NULL}
+};
+
+static const struct cmac_subkeys cmac_3gpp_subkeys[] = {
+        {
+                "\x2b\xd6\x45\x9f\x82\xc5\xb3\x00\x95\x2c\x49\x10\x48\x81\xff\x48",
+                "\xdc\x84\xc2\x70\xb5\xbf\x83\xf9\x6f\x90\xbe\x18\x8d\x3f\x64\x18",
+                "\xb9\x09\x84\xe1\x6b\x7f\x07\xf2\xdf\x21\x7c\x31\x1a\x7e\xc8\xb7"
+        },
+        {
+                "\xd3\xc5\xd5\x92\x32\x7f\xb1\x1c\x40\x35\xc6\x68\x0a\xf8\xc6\xd1",
+                "\x36\xe3\xe5\x32\x26\x52\x2b\xa6\xc0\xa4\x23\x6b\xcb\xbf\x0c\xe3",
+                "\x6d\xc7\xca\x64\x4c\xa4\x57\x4d\x81\x48\x46\xd7\x97\x7e\x19\xc6"
+        },
+        {
+                "\x7e\x5e\x94\x43\x1e\x11\xd7\x38\x28\xd7\x39\xcc\x6c\xed\x45\x73",
+                "\xaf\x16\x8c\x50\x6a\xf0\x3c\xf3\xa4\x4a\xbf\x1a\x61\x34\xc1\x59",
+                "\x5e\x2d\x18\xa0\xd5\xe0\x79\xe7\x48\x95\x7e\x34\xc2\x69\x82\x35"
+        },
+        {
+                "\xd3\x41\x9b\xe8\x21\x08\x7a\xcd\x02\x12\x3a\x92\x48\x03\x33\x59",
+                "\x0a\x9b\xa0\x10\x5b\x3d\x9a\x43\x47\xe6\x56\x15\x4e\x6d\x37\xc8",
+                "\x15\x37\x40\x20\xb6\x7b\x34\x86\x8f\xcc\xac\x2a\x9c\xda\x6f\x90"
+        },
+        {
+                "\x83\xfd\x23\xa2\x44\xa7\x4c\xf3\x58\xda\x30\x19\xf1\x72\x26\x35",
+                "\x3b\xec\x38\xae\x79\x0d\x59\x58\xe0\x9b\x73\xab\x61\xbd\x48\x0f",
+                "\x77\xd8\x71\x5c\xf2\x1a\xb2\xb1\xc1\x36\xe7\x56\xc3\x7a\x90\x1e"
+        },
+        {
+                "\x68\x32\xa6\x5c\xff\x44\x73\x62\x1e\xbd\xd4\xba\x26\xa9\x21\xfe",
+                "\xca\x02\x47\x87\x0f\xc2\x7f\xad\x1b\x17\xe1\xa1\x48\xb0\x2d\x8d",
+                "\x94\x04\x8f\x0e\x1f\x84\xff\x5a\x36\x2f\xc3\x42\x91\x60\x5b\x9d"
+        },
+        {
+                "\x5d\x0a\x80\xd8\x13\x4a\xe1\x96\x77\x82\x4b\x67\x1e\x83\x8a\xf4",
+                "\x30\x65\xc4\x53\xf7\x72\x72\xe1\x79\xef\x65\x04\x7d\xc9\xfc\x3d",
+                "\x60\xcb\x88\xa7\xee\xe4\xe5\xc2\xf3\xde\xca\x08\xfb\x93\xf8\x7a"
+        },
+        {
+                "\xb3\x12\x0f\xfd\xb2\xcf\x6a\xf4\xe7\x3e\xaf\x2e\xf4\xeb\xec\x69",
+                "\x58\xc8\xbb\x9a\xe4\x22\x92\xc3\xb1\x73\x90\xc8\xf5\x58\x58\xb6",
+                "\xb1\x91\x77\x35\xc8\x45\x25\x87\x62\xe7\x21\x91\xea\xb0\xb1\x6c"
+        },
+        {NULL, NULL, NULL}
 };
 
+static int
+cmac_subkey_test(const struct cmac_subkeys *skeys,
+                 uint32_t *skey1, uint32_t *skey2)
+{
+        uint32_t sub_key_size = sizeof(skey1);
 
-static const struct cmac_rfc4493_vector {
-        const uint8_t *key;
-        const uint8_t *sub_key1;
-        const uint8_t *sub_key2;
-        const uint8_t *M;
-        size_t len;
-        const uint8_t *T;
-        size_t T_len;
-        enum cmac_type type; /* vector type - std or 3gpp */
-} cmac_vectors[] = {
-        { key, sub_key1, sub_key2, M, 0,  T_1, 16, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 16, T_2, 16, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 40, T_3, 16, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 64, T_4, 16, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 0,  T_1, 15, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 16, T_2, 15, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 40, T_3, 15, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 64, T_4, 15, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 0,  T_1, 12, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 16, T_2, 12, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 40, T_3, 12, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 64, T_4, 12, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 0,  T_1, 4, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 16, T_2, 4, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 40, T_3, 4, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 64, T_4, 4, CMAC_128 },
-        { key, sub_key1, sub_key2, M, 8,  T_5, 16, CMAC_128 },
-};
+        if (memcmp(skeys->sub_key1, skey1, sub_key_size)) {
+                printf("sub-key1 mismatched\n");
+                hexdump(stderr, "Received", &skey1, sub_key_size);
+                hexdump(stderr, "Expected", (const void *) skeys->sub_key1, sub_key_size);
+                return 0;
+        }
 
-static const struct cmac_rfc4493_vector cmac_256_vectors[] = {
-        { cmac_256_key, cmac_256_sub_key1, cmac_256_sub_key2, M, 0,
-          CMAC_256_T_1, 16, CMAC_256 },
-        { cmac_256_key, cmac_256_sub_key1, cmac_256_sub_key2, M, 16,
-          CMAC_256_T_2, 16, CMAC_256 },
-        { cmac_256_key, cmac_256_sub_key1, cmac_256_sub_key2, M, 20,
-          CMAC_256_T_3, 16, CMAC_256 },
-        { cmac_256_key, cmac_256_sub_key1, cmac_256_sub_key2, M, 64,
-          CMAC_256_T_4, 16, CMAC_256 },
-};
+        sub_key_size = sizeof(skey2);
 
-static const struct cmac_rfc4493_vector cmac_3gpp_vectors[] = {
-        { EIA2_128_K_1, EIA2_128_SK1_1, EIA2_128_SK2_1,
-          EIA2_128_M_1, 122, EIA2_128_T_1, 4, CMAC_128_BITLEN },
-        { EIA2_128_K_2, EIA2_128_SK1_2, EIA2_128_SK2_2,
-          EIA2_128_M_2, 128, EIA2_128_T_2, 4, CMAC_128_BITLEN },
-        { EIA2_128_K_3, EIA2_128_SK1_3, EIA2_128_SK2_3,
-          EIA2_128_M_3, 318, EIA2_128_T_3, 4, CMAC_128_BITLEN },
-        { EIA2_128_K_4, EIA2_128_SK1_4, EIA2_128_SK2_4,
-          EIA2_128_M_4, 575, EIA2_128_T_4, 4, CMAC_128_BITLEN },
-        { EIA2_128_K_5, EIA2_128_SK1_5, EIA2_128_SK2_5,
-          EIA2_128_M_5, 832, EIA2_128_T_5, 4, CMAC_128_BITLEN },
-        { EIA2_128_K_6, EIA2_128_SK1_6, EIA2_128_SK2_6,
-          EIA2_128_M_6, 447, EIA2_128_T_6, 4, CMAC_128_BITLEN },
-        { EIA2_128_K_7, EIA2_128_SK1_7, EIA2_128_SK2_7,
-          EIA2_128_M_7, 2622, EIA2_128_T_7, 4, CMAC_128_BITLEN },
-        { EIA2_128_K_8, EIA2_128_SK1_8, EIA2_128_SK2_8,
-          EIA2_128_M_8, 16512, EIA2_128_T_8, 4, CMAC_128_BITLEN },
-};
+        if (memcmp(skeys->sub_key2, skey2, sub_key_size)) {
+                printf("sub-key2 mismatched\n");
+                hexdump(stderr, "Received", &skey2, sub_key_size);
+                hexdump(stderr, "Expected", (const void *) skeys->sub_key2, sub_key_size);
+                return 0;
+        }
+        return 1;
+}
 
 static int
-cmac_job_ok(const struct cmac_rfc4493_vector *vec,
+cmac_job_ok(const struct mac_test *vec,
             const struct IMB_JOB *job,
             const uint8_t *auth,
             const uint8_t *padding,
@@ -1104,11 +261,11 @@ cmac_job_ok(const struct cmac_rfc4493_vector *vec,
                 return 0;
         }
 
-        if (memcmp(vec->T, &auth[sizeof_padding], auth_len)) {
+        if (memcmp(vec->tag, &auth[sizeof_padding], auth_len)) {
                 printf("hash mismatched\n");
                 hexdump(stderr, "Received", &auth[sizeof_padding],
                         auth_len);
-                hexdump(stderr, "Expected", vec->T,
+                hexdump(stderr, "Expected", vec->tag,
                         auth_len);
                 return 0;
         }
@@ -1117,7 +274,8 @@ cmac_job_ok(const struct cmac_rfc4493_vector *vec,
 
 static int
 test_cmac(struct IMB_MGR *mb_mgr,
-          const struct cmac_rfc4493_vector *vec,
+          const struct mac_test *vec,
+          const struct cmac_subkeys *subKeys,
           const int dir,
           const int num_jobs,
           const enum cmac_type type)
@@ -1156,19 +314,8 @@ test_cmac(struct IMB_MGR *mb_mgr,
                 IMB_AES_CMAC_SUBKEY_GEN_256(mb_mgr, expkey, skey1, skey2);
         }
 
-        if (memcmp(vec->sub_key1, skey1, sizeof(skey1))) {
-                printf("sub-key1 mismatched\n");
-                hexdump(stderr, "Received", &skey1[0], sizeof(skey1));
-                hexdump(stderr, "Expected", vec->sub_key1, sizeof(skey1));
-		goto end;
-        }
-
-        if (memcmp(vec->sub_key2, skey2, sizeof(skey2))) {
-                printf("sub-key2 mismatched\n");
-                hexdump(stderr, "Received", &skey2[0], sizeof(skey2));
-                hexdump(stderr, "Expected", vec->sub_key2, sizeof(skey2));
-		goto end;
-        }
+        if (!cmac_subkey_test(subKeys, skey1, skey2))
+                goto end;
 
         while (IMB_FLUSH_JOB(mb_mgr) != NULL)
                 ;
@@ -1185,20 +332,17 @@ test_cmac(struct IMB_MGR *mb_mgr,
                 switch (type) {
                 case CMAC_128:
                         job->hash_alg = IMB_AUTH_AES_CMAC;
-                        job->msg_len_to_hash_in_bytes = vec->len;
+                        job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                         break;
                 case CMAC_128_BITLEN:
                         job->hash_alg = IMB_AUTH_AES_CMAC_BITLEN;
                         /* check for std or 3gpp vectors
                            scale len if necessary */
-                        if (vec->type == CMAC_128)
-                                job->msg_len_to_hash_in_bits = vec->len * 8;
-                        else
-                                job->msg_len_to_hash_in_bits = vec->len;
+                        job->msg_len_to_hash_in_bits = vec->msgSize;
                         break;
                 case CMAC_256:
                         job->hash_alg = IMB_AUTH_AES_CMAC_256;
-                        job->msg_len_to_hash_in_bytes = vec->len;
+                        job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                         break;
                 default:
                         printf("Invalid CMAC type specified\n");
@@ -1207,10 +351,10 @@ test_cmac(struct IMB_MGR *mb_mgr,
                 job->u.CMAC._key_expanded = expkey;
                 job->u.CMAC._skey1 = skey1;
                 job->u.CMAC._skey2 = skey2;
-                job->src = vec->M;
+                job->src = (const void *) vec->msg;
                 job->hash_start_src_offset_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = vec->T_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize / 8;
 
                 job->user_data = auths[i];
 
@@ -1257,20 +401,17 @@ test_cmac(struct IMB_MGR *mb_mgr,
                 switch (type) {
                 case CMAC_128:
                         job->hash_alg = IMB_AUTH_AES_CMAC;
-                        job->msg_len_to_hash_in_bytes = vec->len;
+                        job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                         break;
                 case CMAC_128_BITLEN:
                         job->hash_alg = IMB_AUTH_AES_CMAC_BITLEN;
                         /* check for std or 3gpp vectors
                            scale len if necessary */
-                        if (vec->type == CMAC_128)
-                                job->msg_len_to_hash_in_bits = vec->len * 8;
-                        else
-                                job->msg_len_to_hash_in_bits = vec->len;
+                        job->msg_len_to_hash_in_bits = vec->msgSize;
                         break;
                 case CMAC_256:
                         job->hash_alg = IMB_AUTH_AES_CMAC_256;
-                        job->msg_len_to_hash_in_bytes = vec->len;
+                        job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                         break;
                 default:
                         printf("Invalid CMAC type specified\n");
@@ -1279,10 +420,10 @@ test_cmac(struct IMB_MGR *mb_mgr,
                 job->u.CMAC._key_expanded = expkey;
                 job->u.CMAC._skey1 = skey1;
                 job->u.CMAC._skey2 = skey2;
-                job->src = vec->M;
+                job->src = (const void *) vec->msg;
                 job->hash_start_src_offset_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = vec->T_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize / 8;
 
                 job->user_data = auths[i];
 
@@ -1326,38 +467,36 @@ test_cmac_std_vectors(struct IMB_MGR *mb_mgr,
                       struct test_suite_context *ctx,
                       const int num_jobs)
 {
-	const int vectors_cnt = DIM(cmac_vectors);
-	int vect;
+	const struct mac_test *v = cmac_128_test_json;
+        const struct cmac_subkeys *sk = cmac_128_subkeys;
 
         if (!quiet_mode)
 	        printf("AES-CMAC-128 standard test vectors (N jobs = %d):\n",
                        num_jobs);
-	for (vect = 1; vect <= vectors_cnt; vect++) {
-                const int idx = vect - 1;
-
+	for (; v->msg != NULL; v++, sk++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("Standard CMAC-128 vector [%d/%d] M len: %d, "
-                               "T len:%d\n",
-                               vect, vectors_cnt,
-                               (int) cmac_vectors[idx].len,
-                               (int) cmac_vectors[idx].T_len);
+                        printf("Standard CMAC-128 vector %zu Message length: %zu, "
+                               "Tag length:%zu\n",
+                               v->tcId,
+                               v->msgSize / 8,
+                               v->tagSize / 8);
 #else
                         printf(".");
 #endif
                 }
 
-                if (test_cmac(mb_mgr, &cmac_vectors[idx],
+                if (test_cmac(mb_mgr, v, sk,
                               IMB_DIR_ENCRYPT, num_jobs, CMAC_128)) {
-                        printf("error #%d encrypt\n", vect);
+                        printf("error #%zu encrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
                 }
 
-                if (test_cmac(mb_mgr, &cmac_vectors[idx],
+                if (test_cmac(mb_mgr, v, sk,
                               IMB_DIR_DECRYPT, num_jobs, CMAC_128)) {
-                        printf("error #%d decrypt\n", vect);
+                        printf("error #%zu decrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
@@ -1372,37 +511,35 @@ test_cmac_256_std_vectors(struct IMB_MGR *mb_mgr,
                           struct test_suite_context *ctx,
                           const int num_jobs)
 {
-	const int vectors_cnt = DIM(cmac_256_vectors);
-	int vect;
+	const struct mac_test *v = cmac_256_test_json;
+        const struct cmac_subkeys *sk = cmac_256_subkeys;
 
         if (!quiet_mode)
 	        printf("AES-CMAC-256 standard test vectors (N jobs = %d):\n",
                        num_jobs);
-	for (vect = 1; vect <= vectors_cnt; vect++) {
-                const int idx = vect - 1;
-
+	for (; v->msg != NULL; v++, sk++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("Standard CMAC-256 vector [%d/%d] M len: %d, "
-                               "T len:%d\n",
-                               vect, vectors_cnt,
-                               (int) cmac_256_vectors[idx].len,
-                               (int) cmac_256_vectors[idx].T_len);
+                        printf("Standard CMAC-256 vector %zu Message length: %zu, "
+                               "Tag length:%zu\n",
+                               v->tcId,
+                               v->msgSize / 8,
+                               v->tagSize / 8);
 #else
                         printf(".");
 #endif
                 }
 
-                if (test_cmac(mb_mgr, &cmac_256_vectors[idx],
+                if (test_cmac(mb_mgr, v, sk,
                               IMB_DIR_ENCRYPT, num_jobs, CMAC_256)) {
-                        printf("error #%d encrypt\n", vect);
+                        printf("error #%zu encrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
                 }
-                if (test_cmac(mb_mgr, &cmac_256_vectors[idx],
+                if (test_cmac(mb_mgr, v, sk,
                               IMB_DIR_DECRYPT, num_jobs, CMAC_256)) {
-                        printf("error #%d decrypt\n", vect);
+                        printf("error #%zu decrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
@@ -1417,38 +554,36 @@ test_cmac_bitlen_std_vectors(struct IMB_MGR *mb_mgr,
                              struct test_suite_context *ctx,
                              const int num_jobs)
 {
-	const int vectors_cnt = sizeof(cmac_vectors) / sizeof(cmac_vectors[0]);
-	int vect;
+	const struct mac_test *v = cmac_128_test_json;
+        const struct cmac_subkeys *sk = cmac_128_subkeys;
 
         if (!quiet_mode)
                 printf("AES-CMAC-128 BITLEN standard test vectors "
                        "(N jobs = %d):\n", num_jobs);
-	for (vect = 1; vect <= vectors_cnt; vect++) {
-                const int idx = vect - 1;
-
+	for (; v->msg != NULL; v++, sk++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("Standard vector [%d/%d] M len: %d (bits), "
-                               "T len:%d\n",
-                               vect, vectors_cnt,
-                               (int) cmac_vectors[idx].len * 8,
-                               (int) cmac_vectors[idx].T_len);
+                        printf("Standard bit length vector %zu Message length (bits): %zu, "
+                               "Tag length:%zu\n",
+                               v->tcId,
+                               v->msgSize,
+                               v->tagSize / 8);
 #else
                         printf(".");
 #endif
                 }
 
-                if (test_cmac(mb_mgr, &cmac_vectors[idx],
+                if (test_cmac(mb_mgr, v, sk,
                               IMB_DIR_ENCRYPT, num_jobs, CMAC_128_BITLEN)) {
-                        printf("error #%d encrypt\n", vect);
+                        printf("error #%zu encrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
                 }
 
-                if (test_cmac(mb_mgr, &cmac_vectors[idx],
+                if (test_cmac(mb_mgr, v, sk,
                               IMB_DIR_DECRYPT, num_jobs, CMAC_128_BITLEN)) {
-                        printf("error #%d decrypt\n", vect);
+                        printf("error #%zu decrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
@@ -1464,39 +599,36 @@ test_cmac_bitlen_3gpp_vectors(struct IMB_MGR *mb_mgr,
                               struct test_suite_context *ctx,
                               const int num_jobs)
 {
-	const int vectors_cnt =
-                sizeof(cmac_3gpp_vectors) / sizeof(cmac_3gpp_vectors[0]);
-	int vect;
+	const struct mac_test *v = cmac_3gpp_test_json;
+        const struct cmac_subkeys *sk = cmac_3gpp_subkeys;
 
         if (!quiet_mode)
 	        printf("AES-CMAC-128 BITLEN 3GPP test vectors (N jobs = %d):\n",
                        num_jobs);
-	for (vect = 1; vect <= vectors_cnt; vect++) {
-                const int idx = vect - 1;
-
+	for (; v->msg != NULL; v++, sk++) {
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("3GPP vector [%d/%d] M len: %d (bits), "
-                               "T len:%d (bytes)\n",
-                               vect, vectors_cnt,
-                               (int) cmac_3gpp_vectors[idx].len,
-                               (int) cmac_3gpp_vectors[idx].T_len);
+                        printf("3gpp vector %zu Message length (bits): %zu, "
+                               "Tag length:%zu\n",
+                               v->tcId,
+                               v->msgSize,
+                               v->tagSize / 8);
 #else
                         printf(".");
 #endif
                 }
 
-                if (test_cmac(mb_mgr, &cmac_3gpp_vectors[idx],
+                if (test_cmac(mb_mgr, v, sk,
                               IMB_DIR_ENCRYPT, num_jobs, CMAC_128_BITLEN)) {
-                        printf("error #%d encrypt\n", vect);
+                        printf("error #%zu encrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
                 }
 
-                if (test_cmac(mb_mgr, &cmac_3gpp_vectors[idx],
+                if (test_cmac(mb_mgr, v, sk,
                               IMB_DIR_DECRYPT, num_jobs, CMAC_128_BITLEN)) {
-                        printf("error #%d decrypt\n", vect);
+                        printf("error #%zu decrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
diff --git a/test/kat-app/cmac_test.json.c b/test/kat-app/cmac_test.json.c
new file mode 100644
index 00000000..e0b8abba
--- /dev/null
+++ b/test/kat-app/cmac_test.json.c
@@ -0,0 +1,393 @@
+/*****************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************/
+
+/* CMAC, RFC4493 */
+#include "mac_test.h"
+
+const struct mac_test cmac_128_test_json[] = {
+    /* Vectors from https://tools.ietf.org/html/rfc4493 */
+    {128, 128, 1,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\xbb\x1d\x69\x29\xe9\x59\x37\x28\x7f\xa3\x7d\x12\x9b\x75\x67\x46", 1, 0,
+     NULL, 0},
+    {128, 128, 2,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x07\x0a\x16\xb4\x6b\x4d\x41\x44\xf7\x9b\xdd\x9d\xd0\x4a\x28\x7c", 1, 128,
+     NULL, 0},
+    {128, 128, 3,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\xdf\xa6\x67\x47\xde\x9a\xe6\x30\x30\xca\x32\x61\x14\x97\xc8\x27", 1, 320,
+     NULL, 0},
+    {128, 128, 4,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x51\xf0\xbe\xbf\x7e\x3b\x9d\x92\xfc\x49\x74\x17\x79\x36\x3c\xfe", 1, 512,
+     NULL, 0},
+    {128, 120, 5,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\xbb\x1d\x69\x29\xe9\x59\x37\x28\x7f\xa3\x7d\x12\x9b\x75\x67\x46", 1, 0,
+     NULL, 0},
+    {128, 120, 6,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x07\x0a\x16\xb4\x6b\x4d\x41\x44\xf7\x9b\xdd\x9d\xd0\x4a\x28\x7c", 1, 128,
+     NULL, 0},
+    {128, 120, 7,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\xdf\xa6\x67\x47\xde\x9a\xe6\x30\x30\xca\x32\x61\x14\x97\xc8\x27", 1, 320,
+     NULL, 0},
+    {128, 120, 8,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x51\xf0\xbe\xbf\x7e\x3b\x9d\x92\xfc\x49\x74\x17\x79\x36\x3c\xfe", 1, 512,
+     NULL, 0},
+    {128, 96, 9,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\xbb\x1d\x69\x29\xe9\x59\x37\x28\x7f\xa3\x7d\x12\x9b\x75\x67\x46", 1, 0,
+     NULL, 0},
+    {128, 96, 10,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x07\x0a\x16\xb4\x6b\x4d\x41\x44\xf7\x9b\xdd\x9d\xd0\x4a\x28\x7c", 1, 128,
+     NULL, 0},
+    {128, 96, 11,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\xdf\xa6\x67\x47\xde\x9a\xe6\x30\x30\xca\x32\x61\x14\x97\xc8\x27", 1, 320,
+     NULL, 0},
+    {128, 96, 12,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x51\xf0\xbe\xbf\x7e\x3b\x9d\x92\xfc\x49\x74\x17\x79\x36\x3c\xfe", 1, 512,
+     NULL, 0},
+    {128, 32, 13,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\xbb\x1d\x69\x29\xe9\x59\x37\x28\x7f\xa3\x7d\x12\x9b\x75\x67\x46", 1, 0,
+     NULL, 0},
+    {128, 32, 14,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x07\x0a\x16\xb4\x6b\x4d\x41\x44\xf7\x9b\xdd\x9d\xd0\x4a\x28\x7c", 1, 128,
+     NULL, 0},
+    {128, 32, 15,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\xdf\xa6\x67\x47\xde\x9a\xe6\x30\x30\xca\x32\x61\x14\x97\xc8\x27", 1, 320,
+     NULL, 0},
+    {128, 32, 16,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x51\xf0\xbe\xbf\x7e\x3b\x9d\x92\xfc\x49\x74\x17\x79\x36\x3c\xfe", 1, 512,
+     NULL, 0},
+    {128, 128, 17,
+     "\x2b\x7e\x15\x16\x28\xae\xd2\xa6\xab\xf7\x15\x88\x09\xcf\x4f\x3c",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\xdc\x87\xcd\xcf\x77\xa2\xf1\x82\x9e\x01\x2c\x4d\x31\xaf\x2f\x8b", 1, 64,
+     NULL, 0},
+    {0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0}
+  };
+
+const struct mac_test cmac_256_test_json[] = {
+    /* Vectors from https://tools.ietf.org/html/rfc4493 */
+    {256, 128, 1,
+     "\x60\x3d\xeb\x10\x15\xca\x71\xbe\x2b\x73\xae\xf0\x85\x7d\x77\x81\x1f\x35"
+     "\x2c\x07\x3b\x61\x08\xd7\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x02\x89\x62\xf6\x1b\x7b\xf8\x9e\xfc\x6b\x55\x1f\x46\x67\xd9\x83", 1, 0,
+     NULL, 0},
+    {256, 128, 2,
+     "\x60\x3d\xeb\x10\x15\xca\x71\xbe\x2b\x73\xae\xf0\x85\x7d\x77\x81\x1f\x35"
+     "\x2c\x07\x3b\x61\x08\xd7\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x28\xa7\x02\x3f\x45\x2e\x8f\x82\xbd\x4b\xf2\x8d\x8c\x37\xc3\x5c", 1, 128,
+     NULL, 0},
+    {256, 128, 3,
+     "\x60\x3d\xeb\x10\x15\xca\x71\xbe\x2b\x73\xae\xf0\x85\x7d\x77\x81\x1f\x35"
+     "\x2c\x07\x3b\x61\x08\xd7\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\x15\x67\x27\xdc\x08\x78\x94\x4a\x02\x3c\x1f\xe0\x3b\xad\x6d\x93", 1, 160,
+     NULL, 0},
+    {256, 128, 4,
+     "\x60\x3d\xeb\x10\x15\xca\x71\xbe\x2b\x73\xae\xf0\x85\x7d\x77\x81\x1f\x35"
+     "\x2c\x07\x3b\x61\x08\xd7\x2d\x98\x10\xa3\x09\x14\xdf\xf4",
+     "\x6b\xc1\xbe\xe2\x2e\x40\x9f\x96\xe9\x3d\x7e\x11\x73\x93\x17\x2a\xae\x2d"
+     "\x8a\x57\x1e\x03\xac\x9c\x9e\xb7\x6f\xac\x45\xaf\x8e\x51\x30\xc8\x1c\x46"
+     "\xa3\x5c\xe4\x11\xe5\xfb\xc1\x19\x1a\x0a\x52\xef\xf6\x9f\x24\x45\xdf\x4f"
+     "\x9b\x17\xad\x2b\x41\x7b\xe6\x6c\x37\x10",
+     "\xe1\x99\x21\x90\x54\x9f\x6e\xd5\x69\x6a\x2c\x05\x6c\x31\x54\x10", 1, 512,
+     NULL, 0},
+    {0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0}
+  };
+
+const struct mac_test cmac_3gpp_test_json[] = {
+    /* Vectors from https://tools.ietf.org/html/rfc4493 */
+    {128, 32, 1,
+     "\x2b\xd6\x45\x9f\x82\xc5\xb3\x00\x95\x2c\x49\x10\x48\x81\xff\x48",
+     "\x38\xa6\xf0\x56\xc0\x00\x00\x00\x33\x32\x34\x62\x63\x39\x38\x40",
+     "\x11\x8c\x6e\xb8", 1, 122, NULL, 0},
+    {128, 32, 2,
+     "\xd3\xc5\xd5\x92\x32\x7f\xb1\x1c\x40\x35\xc6\x68\x0a\xf8\xc6\xd1",
+     "\x39\x8a\x59\xb4\xd4\x00\x00\x00\x48\x45\x83\xd5\xaf\xe0\x82\xae",
+     "\xb9\x37\x87\xe6", 1, 128, NULL, 0},
+    {128, 32, 3,
+     "\x7e\x5e\x94\x43\x1e\x11\xd7\x38\x28\xd7\x39\xcc\x6c\xed\x45\x73",
+     "\x36\xaf\x61\x44\xc4\x00\x00\x00\xb3\xd3\xc9\x17\x0a\x4e\x16\x32\xf6\x0f"
+     "\x86\x10\x13\xd2\x2d\x84\xb7\x26\xb6\xa2\x78\xd8\x02\xd1\xee\xaf\x13\x21"
+     "\xba\x59\x29\xdc",
+     "\x1f\x60\xb0\x1d", 1, 318, NULL, 0},
+    {128, 32, 4,
+     "\xd3\x41\x9b\xe8\x21\x08\x7a\xcd\x02\x12\x3a\x92\x48\x03\x33\x59",
+     "\xc7\x59\x0e\xa9\xb8\x00\x00\x00\xbb\xb0\x57\x03\x88\x09\x49\x6b\xcf\xf8"
+     "\x6d\x6f\xbc\x8c\xe5\xb1\x35\xa0\x6b\x16\x60\x54\xf2\xd5\x65\xbe\x8a\xce"
+     "\x75\xdc\x85\x1e\x0b\xcd\xd8\xf0\x71\x41\xc4\x95\x87\x2f\xb5\xd8\xc0\xc6"
+     "\x6a\x8b\x6d\xa5\x56\x66\x3e\x4e\x46\x12\x05\xd8\x45\x80\xbe\xe5\xbc\x7e",
+     "\x68\x46\xa2\xf0", 1, 575, NULL, 0},
+    {128, 32, 5,
+     "\x83\xfd\x23\xa2\x44\xa7\x4c\xf3\x58\xda\x30\x19\xf1\x72\x26\x35",
+     "\x36\xaf\x61\x44\x7c\x00\x00\x00\x35\xc6\x87\x16\x63\x3c\x66\xfb\x75\x0c"
+     "\x26\x68\x65\xd5\x3c\x11\xea\x05\xb1\xe9\xfa\x49\xc8\x39\x8d\x48\xe1\xef"
+     "\xa5\x90\x9d\x39\x47\x90\x28\x37\xf5\xae\x96\xd5\xa0\x5b\xc8\xd6\x1c\xa8"
+     "\xdb\xef\x1b\x13\xa4\xb4\xab\xfe\x4f\xb1\x00\x60\x45\xb6\x74\xbb\x54\x72"
+     "\x93\x04\xc3\x82\xbe\x53\xa5\xaf\x05\x55\x61\x76\xf6\xea\xa2\xef\x1d\x05"
+     "\xe4\xb0\x83\x18\x1e\xe6\x74\xcd\xa5\xa4\x85\xf7\x4d\x7a",
+     "\xe6\x57\xe1\x82", 1, 832, NULL, 0},
+    {128, 32, 6,
+     "\x68\x32\xa6\x5c\xff\x44\x73\x62\x1e\xbd\xd4\xba\x26\xa9\x21\xfe",
+     "\x36\xaf\x61\x44\xc0\x00\x00\x00\xd3\xc5\x38\x39\x62\x68\x20\x71\x77\x65"
+     "\x66\x76\x20\x32\x38\x37\x63\x62\x40\x98\x1b\xa6\x82\x4c\x1b\xfb\x1a\xb4"
+     "\x85\x47\x20\x29\xb7\x1d\x80\x8c\xe3\x3e\x2c\xc3\xc0\xb5\xfc\x1f\x3d\xe8"
+     "\xa6\xdc",
+     "\xf0\x66\x8c\x1e", 1, 447, NULL, 0},
+    {128, 32, 7,
+     "\x5d\x0a\x80\xd8\x13\x4a\xe1\x96\x77\x82\x4b\x67\x1e\x83\x8a\xf4",
+     "\x78\x27\xfa\xb2\x2c\x00\x00\x00\x70\xde\xdf\x2d\xc4\x2c\x5c\xbd\x3a\x96"
+     "\xf8\xa0\xb1\x14\x18\xb3\x60\x8d\x57\x33\x60\x4a\x2c\xd3\x6a\xab\xc7\x0c"
+     "\xe3\x19\x3b\xb5\x15\x3b\xe2\xd3\xc0\x6d\xfd\xb2\xd1\x6e\x9c\x35\x71\x58"
+     "\xbe\x6a\x41\xd6\xb8\x61\xe4\x91\xdb\x3f\xbf\xeb\x51\x8e\xfc\xf0\x48\xd7"
+     "\xd5\x89\x53\x73\x0f\xf3\x0c\x9e\xc4\x70\xff\xcd\x66\x3d\xc3\x42\x01\xc3"
+     "\x6a\xdd\xc0\x11\x1c\x35\xb3\x8a\xfe\xe7\xcf\xdb\x58\x2e\x37\x31\xf8\xb4"
+     "\xba\xa8\xd1\xa8\x9c\x06\xe8\x11\x99\xa9\x71\x62\x27\xbe\x34\x4e\xfc\xb4"
+     "\x36\xdd\xd0\xf0\x96\xc0\x64\xc3\xb5\xe2\xc3\x99\x99\x3f\xc7\x73\x94\xf9"
+     "\xe0\x97\x20\xa8\x11\x85\x0e\xf2\x3b\x2e\xe0\x5d\x9e\x61\x73\x60\x9d\x86"
+     "\xe1\xc0\xc1\x8e\xa5\x1a\x01\x2a\x00\xbb\x41\x3b\x9c\xb8\x18\x8a\x70\x3c"
+     "\xd6\xba\xe3\x1c\xc6\x7b\x34\xb1\xb0\x00\x19\xe6\xa2\xb2\xa6\x90\xf0\x26"
+     "\x71\xfe\x7c\x9e\xf8\xde\xc0\x09\x4e\x53\x37\x63\x47\x8d\x58\xd2\xc5\xf5"
+     "\xb8\x27\xa0\x14\x8c\x59\x48\xa9\x69\x31\xac\xf8\x4f\x46\x5a\x64\xe6\x2c"
+     "\xe7\x40\x07\xe9\x91\xe3\x7e\xa8\x23\xfa\x0f\xb2\x19\x23\xb7\x99\x05\xb7"
+     "\x33\xb6\x31\xe6\xc7\xd6\x86\x0a\x38\x31\xac\x35\x1a\x9c\x73\x0c\x52\xff"
+     "\x72\xd9\xd3\x08\xee\xdb\xab\x21\xfd\xe1\x43\xa0\xea\x17\xe2\x3e\xdc\x1f"
+     "\x74\xcb\xb3\x63\x8a\x20\x33\xaa\xa1\x54\x64\xea\xa7\x33\x38\x5d\xbb\xeb"
+     "\x6f\xd7\x35\x09\xb8\x57\xe6\xa4\x19\xdc\xa1\xd8\x90\x7a\xf9\x77\xfb\xac"
+     "\x4d\xfa\x35\xec",
+     "\xf4\xcc\x8f\xa3", 1, 2622, NULL, 0},
+    {128, 32, 8,
+     "\xb3\x12\x0f\xfd\xb2\xcf\x6a\xf4\xe7\x3e\xaf\x2e\xf4\xeb\xec\x69",
+     "\x29\x6f\x39\x3c\x5c\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x01\x01"
+     "\x01\x01\x01\x01\x01\x01\xe0\x95\x80\x45\xf3\xa0\xbb\xa4\xe3\x96\x83\x46"
+     "\xf0\xa3\xb8\xa7\xc0\x2a\x01\x8a\xe6\x40\x76\x52\x26\xb9\x87\xc9\x13\xe6"
+     "\xcb\xf0\x83\x57\x00\x16\xcf\x83\xef\xbc\x61\xc0\x82\x51\x3e\x21\x56\x1a"
+     "\x42\x7c\x00\x9d\x28\xc2\x98\xef\xac\xe7\x8e\xd6\xd5\x6c\x2d\x45\x05\xad"
+     "\x03\x2e\x9c\x04\xdc\x60\xe7\x3a\x81\x69\x6d\xa6\x65\xc6\xc4\x86\x03\xa5"
+     "\x7b\x45\xab\x33\x22\x15\x85\xe6\x8e\xe3\x16\x91\x87\xfb\x02\x39\x52\x86"
+     "\x32\xdd\x65\x6c\x80\x7e\xa3\x24\x8b\x7b\x46\xd0\x02\xb2\xb5\xc7\x45\x8e"
+     "\xb8\x5b\x9c\xe9\x58\x79\xe0\x34\x08\x59\x05\x5e\x3b\x0a\xbb\xc3\xea\xce"
+     "\x87\x19\xca\xa8\x02\x65\xc9\x72\x05\xd5\xdc\x4b\xcc\x90\x2f\xe1\x83\x96"
+     "\x29\xed\x71\x32\x8a\x0f\x04\x49\xf5\x88\x55\x7e\x68\x98\x86\x0e\x04\x2a"
+     "\xec\xd8\x4b\x24\x04\xc2\x12\xc9\x22\x2d\xa5\xbf\x8a\x89\xef\x67\x97\x87"
+     "\x0c\xf5\x07\x71\xa6\x0f\x66\xa2\xee\x62\x85\x36\x57\xad\xdf\x04\xcd\xde"
+     "\x07\xfa\x41\x4e\x11\xf1\x2b\x4d\x81\xb9\xb4\xe8\xac\x53\x8e\xa3\x06\x66"
+     "\x68\x8d\x88\x1f\x6c\x34\x84\x21\x99\x2f\x31\xb9\x4f\x88\x06\xed\x8f\xcc"
+     "\xff\x4c\x91\x23\xb8\x96\x42\x52\x7a\xd6\x13\xb1\x09\xbf\x75\x16\x74\x85"
+     "\xf1\x26\x8b\xf8\x84\xb4\xcd\x23\xd2\x9a\x09\x34\x92\x57\x03\xd6\x34\x09"
+     "\x8f\x77\x67\xf1\xbe\x74\x91\xe7\x08\xa8\xbb\x94\x9a\x38\x73\x70\x8a\xef"
+     "\x4a\x36\x23\x9e\x50\xcc\x08\x23\x5c\xd5\xed\x6b\xbe\x57\x86\x68\xa1\x7b"
+     "\x58\xc1\x17\x1d\x0b\x90\xe8\x13\xa9\xe4\xf5\x8a\x89\xd7\x19\xb1\x10\x42"
+     "\xd6\x36\x0b\x1b\x0f\x52\xde\xb7\x30\xa5\x8d\x58\xfa\xf4\x63\x15\x95\x4b"
+     "\x0a\x87\x26\x91\x47\x59\x77\xdc\x88\xc0\xd7\x33\xfe\xff\x54\x60\x0a\x0c"
+     "\xc1\xd0\x30\x0a\xaa\xeb\x94\x57\x2c\x6e\x95\xb0\x1a\xe9\x0d\xe0\x4f\x1d"
+     "\xce\x47\xf8\x7e\x8f\xa7\xbe\xbf\x77\xe1\xdb\xc2\x0d\x6b\xa8\x5c\xb9\x14"
+     "\x3d\x51\x8b\x28\x5d\xfa\x04\xb6\x98\xbf\x0c\xf7\x81\x9f\x20\xfa\x7a\x28"
+     "\x8e\xb0\x70\x3d\x99\x5c\x59\x94\x0c\x7c\x66\xde\x57\xa9\xb7\x0f\x82\x37"
+     "\x9b\x70\xe2\x03\x1e\x45\x0f\xcf\xd2\x18\x13\x26\xfc\xd2\x8d\x88\x23\xba"
+     "\xaa\x80\xdf\x6e\x0f\x44\x35\x59\x64\x75\x39\xfd\x89\x07\xc0\xff\xd9\xd7"
+     "\x9c\x13\x0e\xd8\x1c\x9a\xfd\x9b\x7e\x84\x8c\x9f\xed\x38\x44\x3d\x5d\x38"
+     "\x0e\x53\xfb\xdb\x8a\xc8\xc3\xd3\xf0\x68\x76\x05\x4f\x12\x24\x61\x10\x7d"
+     "\xe9\x2f\xea\x09\xc6\xf6\x92\x3a\x18\x8d\x53\xaf\xe5\x4a\x10\xf6\x0e\x6e"
+     "\x9d\x5a\x03\xd9\x96\xb5\xfb\xc8\x20\xf8\xa6\x37\x11\x6a\x27\xad\x04\xb4"
+     "\x44\xa0\x93\x2d\xd6\x0f\xbd\x12\x67\x1c\x11\xe1\xc0\xec\x73\xe7\x89\x87"
+     "\x9f\xaa\x3d\x42\xc6\x4d\x20\xcd\x12\x52\x74\x2a\x37\x68\xc2\x5a\x90\x15"
+     "\x85\x88\x8e\xce\xe1\xe6\x12\xd9\x93\x6b\x40\x3b\x07\x75\x94\x9a\x66\xcd"
+     "\xfd\x99\xa2\x9b\x13\x45\xba\xa8\xd9\xd5\x40\x0c\x91\x02\x4b\x0a\x60\x73"
+     "\x63\xb0\x13\xce\x5d\xe9\xae\x86\x9d\x3b\x8d\x95\xb0\x57\x0b\x3c\x2d\x39"
+     "\x14\x22\xd3\x24\x50\xcb\xcf\xae\x96\x65\x22\x86\xe9\x6d\xec\x12\x14\xa9"
+     "\x34\x65\x27\x98\x0a\x81\x92\xea\xc1\xc3\x9a\x3a\xaf\x6f\x15\x35\x1d\xa6"
+     "\xbe\x76\x4d\xf8\x97\x72\xec\x04\x07\xd0\x6e\x44\x15\xbe\xfa\xe7\xc9\x25"
+     "\x80\xdf\x9b\xf5\x07\x49\x7c\x8f\x29\x95\x16\x0d\x4e\x21\x8d\xaa\xcb\x02"
+     "\x94\x4a\xbf\x83\x34\x0c\xe8\xbe\x16\x86\xa9\x60\xfa\xf9\x0e\x2d\x90\xc5"
+     "\x5c\xc6\x47\x5b\xab\xc3\x17\x1a\x80\xa3\x63\x17\x49\x54\x95\x5d\x71\x01"
+     "\xda\xb1\x6a\xe8\x17\x91\x67\xe2\x14\x44\xb4\x43\xa9\xea\xaa\x7c\x91\xde"
+     "\x36\xd1\x18\xc3\x9d\x38\x9f\x8d\xd4\x46\x9a\x84\x6c\x9a\x26\x2b\xf7\xfa"
+     "\x18\x48\x7a\x79\xe8\xde\x11\x69\x9e\x0b\x8f\xdf\x55\x7c\xb4\x87\x19\xd4"
+     "\x53\xba\x71\x30\x56\x10\x9b\x93\xa2\x18\xc8\x96\x75\xac\x19\x5f\xb4\xfb"
+     "\x06\x63\x9b\x37\x97\x14\x49\x55\xb3\xc9\x32\x7d\x1a\xec\x00\x3d\x42\xec"
+     "\xd0\xea\x98\xab\xf1\x9f\xfb\x4a\xf3\x56\x1a\x67\xe7\x7c\x35\xbf\x15\xc5"
+     "\x9c\x24\x12\xda\x88\x1d\xb0\x2b\x1b\xfb\xce\xbf\xac\x51\x52\xbc\x99\xbc"
+     "\x3f\x1d\x15\xf7\x71\x00\x1b\x70\x29\xfe\xdb\x02\x8f\x8b\x85\x2b\xc4\x40"
+     "\x7e\xb8\x3f\x89\x1c\x9c\xa7\x33\x25\x4f\xdd\x1e\x9e\xdb\x56\x91\x9c\xe9"
+     "\xfe\xa2\x1c\x17\x40\x72\x52\x1c\x18\x31\x9a\x54\xb5\xd4\xef\xbe\xbd\xdf"
+     "\x1d\x8b\x69\xb1\xcb\xf2\x5f\x48\x9f\xcc\x98\x13\x72\x54\x7c\xf4\x1d\x00"
+     "\x8e\xf0\xbc\xa1\x92\x6f\x93\x4b\x73\x5e\x09\x0b\x3b\x25\x1e\xb3\x3a\x36"
+     "\xf8\x2e\xd9\xb2\x9c\xf4\xcb\x94\x41\x88\xfa\x0e\x1e\x38\xdd\x77\x8f\x7d"
+     "\x1c\x9d\x98\x7b\x28\xd1\x32\xdf\xb9\x73\x1f\xa4\xf4\xb4\x16\x93\x5b\xe4"
+     "\x9d\xe3\x05\x16\xaf\x35\x78\x58\x1f\x2f\x13\xf5\x61\xc0\x66\x33\x61\x94"
+     "\x1e\xab\x24\x9a\x4b\xc1\x23\xf8\xd1\x5c\xd7\x11\xa9\x56\xa1\xbf\x20\xfe"
+     "\x6e\xb7\x8a\xea\x23\x73\x36\x1d\xa0\x42\x6c\x79\xa5\x30\xc3\xbb\x1d\xe0"
+     "\xc9\x97\x22\xef\x1f\xde\x39\xac\x2b\x00\xa0\xa8\xee\x7c\x80\x0a\x08\xbc"
+     "\x22\x64\xf8\x9f\x4e\xff\xe6\x27\xac\x2f\x05\x31\xfb\x55\x4f\x6d\x21\xd7"
+     "\x4c\x59\x0a\x70\xad\xfa\xa3\x90\xbd\xfb\xb3\xd6\x8e\x46\x21\x5c\xab\x18"
+     "\x7d\x23\x68\xd5\xa7\x1f\x5e\xbe\xc0\x81\xcd\x3b\x20\xc0\x82\xdb\xe4\xcd"
+     "\x2f\xac\xa2\x87\x73\x79\x5d\x6b\x0c\x10\x20\x4b\x65\x9a\x93\x9e\xf2\x9b"
+     "\xbe\x10\x88\x24\x36\x24\x42\x99\x27\xa7\xeb\x57\x6d\xd3\xa0\x0e\xa5\xe0"
+     "\x1a\xf5\xd4\x75\x83\xb2\x27\x2c\x0c\x16\x1a\x80\x65\x21\xa1\x6f\xf9\xb0"
+     "\xa7\x22\xc0\xcf\x26\xb0\x25\xd5\x83\x6e\x22\x58\xa4\xf7\xd4\x77\x3a\xc8"
+     "\x01\xe4\x26\x3b\xc2\x94\xf4\x3d\xef\x7f\xa8\x70\x3f\x3a\x41\x97\x46\x35"
+     "\x25\x88\x76\x52\xb0\xb2\xa4\xa2\xa7\xcf\x87\xf0\x09\x14\x87\x1e\x25\x03"
+     "\x91\x13\xc7\xe1\x61\x8d\xa3\x40\x64\xb5\x7a\x43\xc4\x63\x24\x9f\xb8\xd0"
+     "\x5e\x0f\x26\xf4\xa6\xd8\x49\x72\xe7\xa9\x05\x48\x24\x14\x5f\x91\x29\x5c"
+     "\xdb\xe3\x9a\x6f\x92\x0f\xac\xc6\x59\x71\x2b\x46\xa5\x4b\xa2\x95\xbb\xe6"
+     "\xa9\x01\x54\xe9\x1b\x33\x98\x5a\x2b\xcd\x42\x0a\xd5\xc6\x7e\xc9\xad\x8e"
+     "\xb7\xac\x68\x64\xdb\x27\x2a\x51\x6b\xc9\x4c\x28\x39\xb0\xa8\x16\x9a\x6b"
+     "\xf5\x8e\x1a\x0c\x2a\xda\x8c\x88\x3b\x7b\xf4\x97\xa4\x91\x71\x26\x8e\xd1"
+     "\x5d\xdd\x29\x69\x38\x4e\x7f\xf4\xbf\x4a\xab\x2e\xc9\xec\xc6\x52\x9c\xf6"
+     "\x29\xe2\xdf\x0f\x08\xa7\x7a\x65\xaf\xa1\x2a\xa9\xb5\x05\xdf\x8b\x28\x7e"
+     "\xf6\xcc\x91\x49\x3d\x1c\xaa\x39\x07\x6e\x28\xef\x1e\xa0\x28\xf5\x11\x8d"
+     "\xe6\x1a\xe0\x2b\xb6\xae\xfc\x33\x43\xa0\x50\x29\x2f\x19\x9f\x40\x18\x57"
+     "\xb2\xbe\xad\x5e\x6e\xe2\xa1\xf1\x91\x02\x2f\x92\x78\x01\x6f\x04\x77\x91"
+     "\xa9\xd1\x8d\xa7\xd2\xa6\xd2\x7f\x2e\x0e\x51\xc2\xf6\xea\x30\xe8\xac\x49"
+     "\xa0\x60\x4f\x4c\x13\x54\x2e\x85\xb6\x83\x81\xb9\xfd\xcf\xa0\xce\x4b\x2d"
+     "\x34\x13\x54\x85\x2d\x36\x02\x45\xc5\x36\xb6\x12\xaf\x71\xf3\xe7\x7c\x90"
+     "\x95\xae\x2d\xbd\xe5\x04\xb2\x65\x73\x3d\xab\xfe\x10\xa2\x0f\xc7\xd6\xd3"
+     "\x2c\x21\xcc\xc7\x2b\x8b\x34\x44\xae\x66\x3d\x65\x92\x2d\x17\xf8\x2c\xaa"
+     "\x2b\x86\x5c\xd8\x89\x13\xd2\x91\xa6\x58\x99\x02\x6e\xa1\x32\x84\x39\x72"
+     "\x3c\x19\x8c\x36\xb0\xc3\xc8\xd0\x85\xbf\xaf\x8a\x32\x0f\xde\x33\x4b\x4a"
+     "\x49\x19\xb4\x4c\x2b\x95\xf6\xe8\xec\xf7\x33\x93\xf7\xf0\xd2\xa4\x0e\x60"
+     "\xb1\xd4\x06\x52\x6b\x02\x2d\xdc\x33\x18\x10\xb1\xa5\xf7\xc3\x47\xbd\x53"
+     "\xed\x1f\x10\x5d\x6a\x0d\x30\xab\xa4\x77\xe1\x78\x88\x9a\xb2\xec\x55\xd5"
+     "\x58\xde\xab\x26\x30\x20\x43\x36\x96\x2b\x4d\xb5\xb6\x63\xb6\x90\x2b\x89"
+     "\xe8\x5b\x31\xbc\x6a\xf5\x0f\xc5\x0a\xcc\xb3\xfb\x9b\x57\xb6\x63\x29\x70"
+     "\x31\x37\x8d\xb4\x78\x96\xd7\xfb\xaf\x6c\x60\x0a\xdd\x2c\x67\xf9\x36\xdb"
+     "\x03\x79\x86\xdb\x85\x6e\xb4\x9c\xf2\xdb\x3f\x7d\xa6\xd2\x36\x50\xe4\x38"
+     "\xf1\x88\x40\x41\xb0\x13\x11\x9e\x4c\x2a\xe5\xaf\x37\xcc\xcd\xfb\x68\x66"
+     "\x07\x38\xb5\x8b\x3c\x59\xd1\xc0\x24\x84\x37\x47\x2a\xba\x1f\x35\xca\x1f"
+     "\xb9\x0c\xd7\x14\xaa\x9f\x63\x55\x34\xf4\x9e\x7c\x5b\xba\x81\xc2\xb6\xb3"
+     "\x6f\xde\xe2\x1c\xa2\x7e\x34\x7f\x79\x3d\x2c\xe9\x44\xed\xb2\x3c\x8c\x9b"
+     "\x91\x4b\xe1\x03\x35\xe3\x50\xfe\xb5\x07\x03\x94\xb7\xa4\xa1\x5c\x0c\xa1"
+     "\x20\x28\x35\x68\xb7\xbf\xc2\x54\xfe\x83\x8b\x13\x7a\x21\x47\xce\x7c\x11"
+     "\x3a\x3a\x4d\x65\x49\x9d\x9e\x86\xb8\x7d\xbc\xc7\xf0\x3b\xbd\x3a\x3a\xb1"
+     "\xaa\x24\x3e\xce\x5b\xa9\xbc\xf2\x5f\x82\x83\x6c\xfe\x47\x3b\x2d\x83\xe7"
+     "\xa7\x20\x1c\xd0\xb9\x6a\x72\x45\x1e\x86\x3f\x6c\x3b\xa6\x64\xa6\xd0\x73"
+     "\xd1\xf7\xb5\xed\x99\x08\x65\xd9\x78\xbd\x38\x15\xd0\x60\x94\xfc\x9a\x2a"
+     "\xba\x52\x21\xc2\x2d\x5a\xb9\x96\x38\x9e\x37\x21\xe3\xaf\x5f\x05\xbe\xdd"
+     "\xc2\x87\x5e\x0d\xfa\xeb\x39\x02\x1e\xe2\x7a\x41\x18\x7c\xbb\x45\xef\x40"
+     "\xc3\xe7\x3b\xc0\x39\x89\xf9\xa3\x0d\x12\xc5\x4b\xa7\xd2\x14\x1d\xa8\xa8"
+     "\x75\x49\x3e\x65\x77\x6e\xf3\x5f\x97\xde\xbc\x22\x86\xcc\x4a\xf9\xb4\x62"
+     "\x3e\xee\x90\x2f\x84\x0c\x52\xf1\xb8\xad\x65\x89\x39\xae\xf7\x1f\x3f\x72"
+     "\xb9\xec\x1d\xe2\x15\x88\xbd\x35\x48\x4e\xa4\x44\x36\x34\x3f\xf9\x5e\xad"
+     "\x6a\xb1\xd8\xaf\xb1\xb2\xa3\x03\xdf\x1b\x71\xe5\x3c\x4a\xea\x6b\x2e\x3e"
+     "\x93\x72\xbe\x0d\x1b\xc9\x97\x98\xb0\xce\x3c\xc1\x0d\x2a\x59\x6d\x56\x5d"
+     "\xba\x82\xf8\x8c\xe4\xcf\xf3\xb3\x3d\x5d\x24\xe9\xc0\x83\x11\x24\xbf\x1a"
+     "\xd5\x4b\x79\x25\x32\x98\x3d\xd6\xc3\xa8\xb7\xd0",
+     "\xeb\xd5\xcc\xb0", 1, 16512, NULL, 0},
+    {0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0}
+  };
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index eb2d183b..4964bde8 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj ghash_test.json.obj poly1305_test.json.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj ghash_test.json.obj poly1305_test.json.obj cmac_test.json.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
-- 
GitLab


From 86a718030746b19cb5f9178bf7b115f7ffefb353 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 23 May 2023 14:03:26 +0100
Subject: [PATCH 287/332] cmake: fix setting default build

---
 cmake/utils.cmake | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index 14ad3eac..0a1e4d73 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -45,7 +45,16 @@ endmacro()
 
 # set default project settings
 macro(imb_set_proj_defaults)
-  set(CMAKE_BUILD_TYPE "Release" CACHE STRING "Selected build type")
+  # set default build type if not specified and not a multi-config generator
+  get_property(multi_config_gen GLOBAL PROPERTY GENERATOR_IS_MULTI_CONFIG)
+  if(NOT CMAKE_BUILD_TYPE
+     AND NOT CMAKE_CONFIGURATION_TYPES
+     AND NOT multi_config_gen)
+    set(CMAKE_BUILD_TYPE
+        "Release"
+        CACHE STRING "Selected build type" FORCE)
+  endif()
+
   # clear default release build C Compiler Flags
   set(CMAKE_C_FLAGS_RELEASE "" CACHE STRING "" FORCE)
   # clear default debug build C Compiler Flags
-- 
GitLab


From 3e0043ab1bb5d70d2fb19e6d54f8ea485f21b123 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 23 May 2023 14:10:22 +0100
Subject: [PATCH 288/332] cmake: refactor top level CMakeLists.txt

This is required to set CMAKE_EXPORT_COMPILE_COMMANDS before
configuring lib and app targets to generate cppcheck database
---
 CMakeLists.txt | 43 ++++++++++++++++++++++++++-----------------
 1 file changed, 26 insertions(+), 17 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index e6f28399..76f6eaee 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -34,6 +34,9 @@ cmake_minimum_required(VERSION 3.16)
 project(intel-ipsec-mb VERSION ${IPSEC_MB_VERSION}
     DESCRIPTION "Intel(R) IPsec Multi-Buffer library")
 
+# add testing support
+include(CTest)
+
 # detect OS
 imb_detect_os()
 
@@ -43,8 +46,28 @@ imb_set_proj_defaults()
 # do compiler checks
 imb_compiler_check()
 
-# add testing support
-include(CTest)
+#######################################
+# configure pre gen custom targets
+#######################################
+
+# add custom target to uninstall library
+imb_add_target_uninstall("${CMAKE_CURRENT_SOURCE_DIR}/lib/cmake/uninstall.cmake.in")
+
+# style check target
+imb_add_target_style_check()
+
+# TAGS target
+imb_add_target_tags()
+
+# spellcheck target
+imb_add_target_spellcheck()
+
+# cppcheck and bughunt targets
+imb_add_target_cppcheck_bughunt()
+
+#######################################
+# configure main project targets
+#######################################
 
 # build library
 add_subdirectory(lib)
@@ -56,23 +79,9 @@ add_subdirectory(perf)
 add_subdirectory(test)
 
 #######################################
-# configure custom targets
+# configure post gen custom targets
 #######################################
 
-# add custom target to uninstall library
-imb_add_target_uninstall("${CMAKE_CURRENT_SOURCE_DIR}/lib/cmake/uninstall.cmake.in")
-
 # add custom target to print help information
 imb_add_target_print_help("${IPSEC_MB_OPTIONS}")
 
-# style check target
-imb_add_target_style_check()
-
-# TAGS target
-imb_add_target_tags()
-
-# cppcheck and bughunt targets
-imb_add_target_cppcheck_bughunt()
-
-# spellcheck target
-imb_add_target_spellcheck()
-- 
GitLab


From e670e88c6dcd39c24f2eec666a93441e3518e8ef Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 22 May 2023 15:47:20 +0100
Subject: [PATCH 289/332] test: update KAT cmake tests for higher coverage

---
 test/kat-app/CMakeLists.txt | 48 ++++++++++++-------------------------
 1 file changed, 15 insertions(+), 33 deletions(-)

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index d5557f59..5b646e4b 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -113,37 +113,19 @@ target_compile_definitions(${TEST_APP} PRIVATE ${APP_DEFINES})
 # add tests
 ########################################
 
-add_test(KAT ${TEST_APP} --test-type KAT)
-add_test(DO_TEST ${TEST_APP} --test-type DO_TEST)
-add_test(CTR ${TEST_APP} --test-type CTR)
-add_test(PON ${TEST_APP} --test-type PON)
-add_test(XCBC ${TEST_APP} --test-type XCBC)
-add_test(GCM ${TEST_APP} --test-type GCM)
-add_test(CUSTOMOP ${TEST_APP} --test-type CUSTOMOP)
-add_test(DES ${TEST_APP} --test-type DES)
-add_test(CCM ${TEST_APP} --test-type CCM)
-add_test(CMAC ${TEST_APP} --test-type CMAC)
-add_test(ZUC ${TEST_APP} --test-type ZUC)
-add_test(KASUMI ${TEST_APP} --test-type KASUMI)
-add_test(SNOW3G ${TEST_APP} --test-type SNOW3G)
-add_test(HMAC_SHA1 ${TEST_APP} --test-type HMAC_SHA1)
-add_test(HMAC_SHA256 ${TEST_APP} --test-type HMAC_SHA256)
-add_test(HMAC_MD5 ${TEST_APP} --test-type HMAC_MD5)
-add_test(AES ${TEST_APP} --test-type AES)
-add_test(ECB ${TEST_APP} --test-type ECB)
-add_test(SHA ${TEST_APP} --test-type SHA)
-add_test(CHAINED ${TEST_APP} --test-type CHAINED)
-add_test(HEC ${TEST_APP} --test-type HEC)
-add_test(AES_CBCS ${TEST_APP} --test-type AES_CBCS)
-add_test(CHACHA ${TEST_APP} --test-type CHACHA)
-add_test(POLY1305 ${TEST_APP} --test-type POLY1305)
-add_test(API ${TEST_APP} --test-type API)
-add_test(DIRECT_API ${TEST_APP} --test-type DIRECT_API)
-add_test(CLEAR_MEM ${TEST_APP} --test-type CLEAR_MEM)
-add_test(CRC ${TEST_APP} --test-type CRC)
-add_test(CHACHA20_POLY1305 ${TEST_APP} --test-type CHACHA20_POLY1305)
-add_test(NULL ${TEST_APP} --test-type NULL)
-add_test(SNOW_V ${TEST_APP} --test-type SNOW_V)
-add_test(DIRECT_API_PARAM ${TEST_APP} --test-type DIRECT_API_PARAM)
-add_test(QUIC ${TEST_APP} --test-type QUIC)
+# set arch options
+set(ARCH_SSE "--no-avx --no-avx2 --no-avx512")
+set(ARCH_AVX "--no-sse --no-avx2 --no-avx512")
+set(ARCH_AVX2 "--no-sse --no-avx --no-avx512")
+set(ARCH_AVX512 "--no-sse --no-avx --no-avx2")
+
+add_test(KAT-SSE-T1 ${TEST_APP} ${ARCH_SSE} --shani-off)
+add_test(KAT-SSE-T2 ${TEST_APP} ${ARCH_SSE} --gfni-off)
+add_test(KAT-SSE-T3 ${TEST_APP} ${ARCH_SSE})
+add_test(KAT-AVX-T1 ${TEST_APP} ${ARCH_AVX} --shani-off)
+add_test(KAT-AVX-T2 ${TEST_APP} ${ARCH_AVX})
+add_test(KAT-AVX2-T1 ${TEST_APP} ${ARCH_AVX2} --shani-off --gfni-off)
+add_test(KAT-AVX2-T2 ${TEST_APP} ${ARCH_AVX2})
+add_test(KAT-AVX512-T1 ${TEST_APP} ${ARCH_AVX512} --shani-off --gfni-off)
+add_test(KAT-AVX512-T2 ${TEST_APP} ${ARCH_AVX512})
 
-- 
GitLab


From eb4b7e6ca4d585a8f55b5b1fc44f913f3a044430 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 23 May 2023 16:44:23 +0100
Subject: [PATCH 290/332] test: add xvalid-app cmake tests

---
 test/xvalid-app/CMakeLists.txt | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

diff --git a/test/xvalid-app/CMakeLists.txt b/test/xvalid-app/CMakeLists.txt
index 926cbbce..db93f7ae 100644
--- a/test/xvalid-app/CMakeLists.txt
+++ b/test/xvalid-app/CMakeLists.txt
@@ -79,3 +79,17 @@ add_executable(${XVALID_APP} ${XVALID_APP_SRC_FILES_C} ${XVALID_APP_SRC_FILES_AS
 target_link_libraries(${XVALID_APP} PRIVATE ${IPSEC_MB_LIB})
 target_compile_definitions(${XVALID_APP} PRIVATE ${APP_DEFINES})
 
+########################################
+# add tests
+########################################
+
+add_test(NAME XVALID-64B
+  COMMAND ${XVALID_APP} --job-size 64)
+
+# run safe check only when SAFE_DATA is enabled and only run on release build
+if (SAFE_DATA)
+  add_test(NAME XVALID-64B-SAFE-CHECK
+    COMMAND ${XVALID_APP} --safe-check --job-size 64
+    CONFIGURATIONS Release)
+endif()
+
-- 
GitLab


From 90acd177baa170b4ace23edcc095ec2194e93893 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 24 May 2023 10:57:29 +0100
Subject: [PATCH 291/332] test: extend cmake KAT tests with sde

---
 test/kat-app/CMakeLists.txt | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 5b646e4b..adf4cd20 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -129,3 +129,10 @@ add_test(KAT-AVX2-T2 ${TEST_APP} ${ARCH_AVX2})
 add_test(KAT-AVX512-T1 ${TEST_APP} ${ARCH_AVX512} --shani-off --gfni-off)
 add_test(KAT-AVX512-T2 ${TEST_APP} ${ARCH_AVX512})
 
+find_program(SDE64 NAMES sde64)
+# find_program(SDE NAMES sde)
+if(SDE64)
+  add_test(NAME KAT-AVX-T3
+    COMMAND ${SDE64} -cmt -- ./${TEST_APP} ${ARCH_AVX}
+    WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR})
+endif()
-- 
GitLab


From 060041505384f2a2be2cb818c55db355e56a83be Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 24 May 2023 11:01:37 +0100
Subject: [PATCH 292/332] cmake: set project defaults before setting project

---
 CMakeLists.txt    | 7 ++++---
 cmake/utils.cmake | 2 +-
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 76f6eaee..ecf14403 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -31,6 +31,10 @@ imb_get_version("${CMAKE_CURRENT_SOURCE_DIR}/lib/intel-ipsec-mb.h")
 message(STATUS "Project Version: ${IPSEC_MB_VERSION_FULL}")
 
 cmake_minimum_required(VERSION 3.16)
+
+# set default project values
+imb_set_proj_defaults()
+
 project(intel-ipsec-mb VERSION ${IPSEC_MB_VERSION}
     DESCRIPTION "Intel(R) IPsec Multi-Buffer library")
 
@@ -40,9 +44,6 @@ include(CTest)
 # detect OS
 imb_detect_os()
 
-# set default project values
-imb_set_proj_defaults()
-
 # do compiler checks
 imb_compiler_check()
 
diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index 0a1e4d73..acd9eb03 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -52,7 +52,7 @@ macro(imb_set_proj_defaults)
      AND NOT multi_config_gen)
     set(CMAKE_BUILD_TYPE
         "Release"
-        CACHE STRING "Selected build type" FORCE)
+        CACHE STRING "Selected build type")
   endif()
 
   # clear default release build C Compiler Flags
-- 
GitLab


From e3c02681a321f08c67cbf2608c7347851d0544c0 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 24 May 2023 13:39:06 +0100
Subject: [PATCH 293/332] cmake: allow to specify binary output directory

---
 CMakeLists.txt    |  3 +++
 cmake/utils.cmake | 18 +++++++++++-------
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index ecf14403..1fda17a0 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -41,6 +41,9 @@ project(intel-ipsec-mb VERSION ${IPSEC_MB_VERSION}
 # add testing support
 include(CTest)
 
+# set binary output directory if specified
+imb_set_binary_dir()
+
 # detect OS
 imb_detect_os()
 
diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index acd9eb03..4b568cc0 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -66,13 +66,17 @@ macro(imb_set_proj_defaults)
   # flag to force full project build
   set(FULL_PROJECT_BUILD TRUE)
 
-  # place all binaries in a single bin directory
-  if(USE_BIN_DIR)
-    set(BIN_DIR "${PROJECT_BINARY_DIR}/bin")
-    message(STATUS "BINARY DIRECTORY...        ${BIN_DIR}")
-    set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${BIN_DIR})
-    set(CMAKE_LIBRARY_OUTPUT_DIRECTORY ${BIN_DIR})
-    set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${BIN_DIR})
+endmacro()
+
+# set binary output directory if specified
+macro(imb_set_binary_dir)
+  # place all binaries in ${IMB_BIN_DIR}
+  if(IMB_BIN_DIR)
+    message(STATUS "BINARY DIRECTORY...        ${IMB_BIN_DIR}")
+    get_property(multi_config_gen GLOBAL PROPERTY GENERATOR_IS_MULTI_CONFIG)
+    set(CMAKE_ARCHIVE_OUTPUT_DIRECTORY ${IMB_BIN_DIR})
+    set(CMAKE_LIBRARY_OUTPUT_DIRECTORY ${IMB_BIN_DIR})
+    set(CMAKE_RUNTIME_OUTPUT_DIRECTORY ${IMB_BIN_DIR})
   endif()
 endmacro()
 
-- 
GitLab


From e1629695e3f66459b96d609feb5677cef1015a85 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 24 May 2023 15:22:07 +0100
Subject: [PATCH 294/332] cmake: remove project setting in applications

---
 perf/CMakeLists.txt                | 3 ---
 test/CMakeLists.txt                | 3 ---
 test/kat-app/CMakeLists.txt        | 3 ---
 test/wycheproof-app/CMakeLists.txt | 3 ---
 test/xvalid-app/CMakeLists.txt     | 3 ---
 5 files changed, 15 deletions(-)

diff --git a/perf/CMakeLists.txt b/perf/CMakeLists.txt
index ea1a6c0a..fd3d24c2 100644
--- a/perf/CMakeLists.txt
+++ b/perf/CMakeLists.txt
@@ -23,9 +23,6 @@
 # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-cmake_minimum_required(VERSION 3.16)
-project(intel-ipsec-mb)
-
 # Ensure building entire project
 if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index f4a3a42e..050b556d 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -23,9 +23,6 @@
 # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-cmake_minimum_required(VERSION 3.16)
-project(intel-ipsec-mb)
-
 # Ensure building entire project
 if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index adf4cd20..2220c76e 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -23,9 +23,6 @@
 # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-cmake_minimum_required(VERSION 3.16)
-project(intel-ipsec-mb)
-
 # Ensure building entire project
 if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
diff --git a/test/wycheproof-app/CMakeLists.txt b/test/wycheproof-app/CMakeLists.txt
index 2e40658a..e9ebf7a3 100644
--- a/test/wycheproof-app/CMakeLists.txt
+++ b/test/wycheproof-app/CMakeLists.txt
@@ -23,9 +23,6 @@
 # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-cmake_minimum_required(VERSION 3.16)
-project(intel-ipsec-mb)
-
 # Ensure building entire project
 if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
diff --git a/test/xvalid-app/CMakeLists.txt b/test/xvalid-app/CMakeLists.txt
index db93f7ae..5599d464 100644
--- a/test/xvalid-app/CMakeLists.txt
+++ b/test/xvalid-app/CMakeLists.txt
@@ -23,9 +23,6 @@
 # OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 
-cmake_minimum_required(VERSION 3.16)
-project(intel-ipsec-mb)
-
 # Ensure building entire project
 if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
-- 
GitLab


From 0ced235583b292720b545f776d3a14094fef39de Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 24 May 2023 15:23:45 +0100
Subject: [PATCH 295/332] cmake: configure cmake tests to execute in bin dir

---
 test/kat-app/CMakeLists.txt        | 66 +++++++++++++++++++++++-------
 test/wycheproof-app/CMakeLists.txt |  6 +--
 2 files changed, 55 insertions(+), 17 deletions(-)

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 2220c76e..631d3615 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -110,26 +110,64 @@ target_compile_definitions(${TEST_APP} PRIVATE ${APP_DEFINES})
 # add tests
 ########################################
 
+# set working directory for tests
+if(IMB_BIN_DIR)
+  set(TEST_APP_BIN_DIR "${IMB_BIN_DIR}")
+else()
+  set(TEST_APP_BIN_DIR "${CMAKE_CURRENT_BINARY_DIR}")
+endif()
+
+# append config type for multi-config generators
+get_property(multi_config_gen GLOBAL PROPERTY GENERATOR_IS_MULTI_CONFIG)
+if (multi_config_gen)
+  STRING(APPEND TEST_APP_BIN_DIR "/$<IF:$<CONFIG:Debug>,Debug,Release>")
+endif()
+
 # set arch options
 set(ARCH_SSE "--no-avx --no-avx2 --no-avx512")
 set(ARCH_AVX "--no-sse --no-avx2 --no-avx512")
 set(ARCH_AVX2 "--no-sse --no-avx --no-avx512")
 set(ARCH_AVX512 "--no-sse --no-avx --no-avx2")
 
-add_test(KAT-SSE-T1 ${TEST_APP} ${ARCH_SSE} --shani-off)
-add_test(KAT-SSE-T2 ${TEST_APP} ${ARCH_SSE} --gfni-off)
-add_test(KAT-SSE-T3 ${TEST_APP} ${ARCH_SSE})
-add_test(KAT-AVX-T1 ${TEST_APP} ${ARCH_AVX} --shani-off)
-add_test(KAT-AVX-T2 ${TEST_APP} ${ARCH_AVX})
-add_test(KAT-AVX2-T1 ${TEST_APP} ${ARCH_AVX2} --shani-off --gfni-off)
-add_test(KAT-AVX2-T2 ${TEST_APP} ${ARCH_AVX2})
-add_test(KAT-AVX512-T1 ${TEST_APP} ${ARCH_AVX512} --shani-off --gfni-off)
-add_test(KAT-AVX512-T2 ${TEST_APP} ${ARCH_AVX512})
+# check for SDE
+if (WINDOWS)
+  find_program(SDE NAMES sde)
+else()
+  find_program(SDE NAMES sde64)
+endif()
 
-find_program(SDE64 NAMES sde64)
-# find_program(SDE NAMES sde)
-if(SDE64)
+add_test(NAME KAT-SSE-T1
+  COMMAND ${TEST_APP} ${ARCH_SSE} --shani-off
+  WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
+add_test(NAME KAT-SSE-T2
+  COMMAND ${TEST_APP} ${ARCH_SSE} --gfni-off
+  WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
+add_test(NAME KAT-SSE-T3
+  COMMAND ${TEST_APP} ${ARCH_SSE}
+  WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
+add_test(NAME KAT-AVX-T1
+  COMMAND ${TEST_APP} ${ARCH_AVX} --shani-off
+  WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
+add_test(NAME KAT-AVX-T2
+  COMMAND ${TEST_APP} ${ARCH_AVX}
+  WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
+add_test(NAME KAT-AVX2-T1
+  COMMAND ${TEST_APP} ${ARCH_AVX2} --shani-off --gfni-off
+  WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
+add_test(NAME KAT-AVX2-T2
+  COMMAND ${TEST_APP} ${ARCH_AVX2}
+  WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
+add_test(NAME KAT-AVX512-T1
+  COMMAND ${TEST_APP} ${ARCH_AVX512} --shani-off --gfni-off
+  WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
+add_test(NAME KAT-AVX512-T2
+  COMMAND ${TEST_APP} ${ARCH_AVX512}
+  WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
+
+# SDE tests
+if(SDE)
   add_test(NAME KAT-AVX-T3
-    COMMAND ${SDE64} -cmt -- ./${TEST_APP} ${ARCH_AVX}
-    WORKING_DIRECTORY ${CMAKE_CURRENT_BINARY_DIR})
+    COMMAND ${SDE} -cmt -- ./${TEST_APP} ${ARCH_AVX}
+    WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
 endif()
+
diff --git a/test/wycheproof-app/CMakeLists.txt b/test/wycheproof-app/CMakeLists.txt
index e9ebf7a3..eb16016f 100644
--- a/test/wycheproof-app/CMakeLists.txt
+++ b/test/wycheproof-app/CMakeLists.txt
@@ -78,7 +78,7 @@ target_compile_definitions(${WYCHEPROOF_APP} PRIVATE ${APP_DEFINES})
 # add tests
 ########################################
 
-add_test(WYCHEPROOF ${WYCHEPROOF_APP})
-add_test(WYCHEPROOF-SHANI-OFF ${WYCHEPROOF_APP} --shani-off)
-add_test(WYCHEPROOF-GFNI-OFF ${WYCHEPROOF_APP} --gfni-off)
+add_test(NAME WYCHEPROOF COMMAND ${WYCHEPROOF_APP})
+add_test(NAME WYCHEPROOF-SHANI-OFF COMMAND ${WYCHEPROOF_APP} --shani-off)
+add_test(NAME WYCHEPROOF-GFNI-OFF COMMAND ${WYCHEPROOF_APP} --gfni-off)
 
-- 
GitLab


From 75a70a4049b9309918fe11b3ac421b8f63419dd5 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 25 May 2023 10:02:03 +0100
Subject: [PATCH 296/332] cmake: move project settings to utils module

---
 cmake/utils.cmake       | 57 +++++++++++++++++++++++++++++++++++++----
 lib/CMakeLists.txt      | 41 -----------------------------
 lib/cmake/unix.cmake    |  3 ---
 lib/cmake/windows.cmake |  3 ---
 4 files changed, 52 insertions(+), 52 deletions(-)

diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index 4b568cc0..1f551125 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -45,6 +45,9 @@ endmacro()
 
 # set default project settings
 macro(imb_set_proj_defaults)
+  # flag to force full project build
+  set(FULL_PROJECT_BUILD TRUE)
+
   # set default build type if not specified and not a multi-config generator
   get_property(multi_config_gen GLOBAL PROPERTY GENERATOR_IS_MULTI_CONFIG)
   if(NOT CMAKE_BUILD_TYPE
@@ -55,16 +58,60 @@ macro(imb_set_proj_defaults)
         CACHE STRING "Selected build type")
   endif()
 
+  #######################################
+  # set default library options
+  #######################################
+  option(AESNI_EMU "AESNI emulation support" OFF)
+  option(SAFE_PARAM "API input parameter checking" ON)
+  option(SAFE_DATA "Sensitive data cleared from registers and memory at operation end" ON)
+  option(SAFE_LOOKUP "Lookups depending on sensitive data are constant time" ON)
+  option(SAFE_OPTIONS "Enable all safe options" ON)
+  option(NO_COMPAT_IMB_API_053 "Disable compatibility with v0.53" ON)
+  option(BUILD_SHARED_LIBS "Build shared library" ON)
+  option(CMAKE_VERBOSE_MAKEFILE "Verbose build output" OFF)
+  set(EXTRA_CFLAGS "" CACHE STRING "Extra compiler flags")
+
+  # disable all SAFE options when SAFE_OPTIONS false
+  if(NOT SAFE_OPTIONS)
+    message(STATUS "SAFE_OPTIONS disabled")
+    set(SAFE_PARAM OFF)
+    set(SAFE_DATA OFF)
+    set(SAFE_LOOKUP OFF)
+  endif()
+
+  # project options list (used by print_help target)
+  set(IPSEC_MB_OPTIONS CMAKE_BUILD_TYPE IPSEC_MB_OPTIONS
+    AESNI_EMU SAFE_PARAM SAFE_DATA SAFE_LOOKUP
+    SAFE_OPTIONS NO_COMPAT_IMB_API_053 BUILD_SHARED_LIBS
+    CMAKE_VERBOSE_MAKEFILE EXTRA_CFLAGS
+    )
+
   # clear default release build C Compiler Flags
   set(CMAKE_C_FLAGS_RELEASE "" CACHE STRING "" FORCE)
   # clear default debug build C Compiler Flags
   set(CMAKE_C_FLAGS_DEBUG "" CACHE STRING "" FORCE)
 
-  # project options list (used by print_help target)
-  set(IPSEC_MB_OPTIONS CMAKE_BUILD_TYPE)
-
-  # flag to force full project build
-  set(FULL_PROJECT_BUILD TRUE)
+  ########################################
+  # print build information
+  ########################################
+  message(STATUS "AESNI emulation support... ${AESNI_EMU}")
+  message(STATUS "SAFE_OPTIONS...            ${SAFE_OPTIONS}")
+  message(STATUS "SAFE_PARAM...              ${SAFE_PARAM}")
+  message(STATUS "SAFE_DATA...               ${SAFE_DATA}")
+  message(STATUS "SAFE_LOOKUP...             ${SAFE_LOOKUP}")
+  message(STATUS "BUILD_SHARED_LIBS...       ${BUILD_SHARED_LIBS}")
+  message(STATUS "NO_COMPAT_IMB_API_053...   ${NO_COMPAT_IMB_API_053}")
+  message(STATUS "CMAKE_GENERATOR...         ${CMAKE_GENERATOR}")
+  if(${CMAKE_GENERATOR_PLATFORM})
+    message(STATUS "GENERATOR PLATFORM...      ${CMAKE_GENERATOR_PLATFORM}")
+  endif()
+  if (NOT multi_config_gen)
+    message(STATUS "BUILD_TYPE...              ${CMAKE_BUILD_TYPE}")
+    message(STATUS "CMAKE_VERBOSE_MAKEFILE...  ${CMAKE_VERBOSE_MAKEFILE}")
+  endif()
+  if (EXTRA_CFLAGS)
+    message(STATUS "EXTRA_CFLAGS...            ${EXTRA_CFLAGS}")
+  endif()
 
 endmacro()
 
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index 2df06e22..7f9e8d5f 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -32,34 +32,6 @@ if(NOT FULL_PROJECT_BUILD)
   message(FATAL_ERROR "Please run CMake from project root directory")
 endif()
 
-#######################################
-# set default library options
-#######################################
-option(AESNI_EMU "AESNI emulation support" OFF)
-option(SAFE_PARAM "API input parameter checking" ON)
-option(SAFE_DATA "Sensitive data cleared from registers and memory at operation end" ON)
-option(SAFE_LOOKUP "Lookups depending on sensitive data are constant time" ON)
-option(SAFE_OPTIONS "Enable all safe options" ON)
-option(BUILD_SHARED_LIBS "Build shared library" ON)
-option(CMAKE_VERBOSE_MAKEFILE "Verbose build output" OFF)
-set(EXTRA_CFLAGS "" CACHE STRING "Extra compiler flags")
-
-# add library options to options list (used by print_help target)
-list(APPEND IPSEC_MB_OPTIONS
-  AESNI_EMU SAFE_PARAM SAFE_DATA SAFE_LOOKUP
-  SAFE_OPTIONS BUILD_SHARED_LIBS
-  CMAKE_VERBOSE_MAKEFILE EXTRA_CFLAGS
-)
-set(IPSEC_MB_OPTIONS ${IPSEC_MB_OPTIONS} PARENT_SCOPE)
-
-# disable all SAFE options when SAFE_OPTIONS false
-if(NOT SAFE_OPTIONS)
-  message(STATUS "SAFE_OPTIONS disabled")
-  set(SAFE_PARAM OFF)
-  set(SAFE_DATA OFF)
-  set(SAFE_LOOKUP OFF)
-endif()
-
 #######################################
 # set library directories
 #######################################
@@ -151,19 +123,6 @@ endforeach()
 
 list(SORT SRC_FILES_ASM)
 
-########################################
-# print build information
-########################################
-message(STATUS "AESNI emulation support... ${AESNI_EMU}")
-message(STATUS "SAFE_OPTIONS...            ${SAFE_OPTIONS}")
-message(STATUS "SAFE_PARAM...              ${SAFE_PARAM}")
-message(STATUS "SAFE_DATA...               ${SAFE_DATA}")
-message(STATUS "SAFE_LOOKUP...             ${SAFE_LOOKUP}")
-message(STATUS "BUILD_SHARED_LIBS...       ${BUILD_SHARED_LIBS}")
-message(STATUS "EXTRA_CFLAGS...            ${EXTRA_CFLAGS}")
-message(STATUS "CMAKE_GENERATOR...         ${CMAKE_GENERATOR}")
-message(STATUS "PLATFORM...                ${CMAKE_GENERATOR_PLATFORM}")
-
 ########################################
 # set C compiler options
 ########################################
diff --git a/lib/cmake/unix.cmake b/lib/cmake/unix.cmake
index 8a7e95de..78aafaee 100644
--- a/lib/cmake/unix.cmake
+++ b/lib/cmake/unix.cmake
@@ -29,9 +29,6 @@
 
 set(LIB IPSec_MB) # 'lib' prefix assumed on Linux
 
-message(STATUS "BUILD_TYPE...              ${CMAKE_BUILD_TYPE}")
-message(STATUS "CMAKE_VERBOSE_MAKEFILE...  ${CMAKE_VERBOSE_MAKEFILE}")
-
 # set compiler definitions
 list(APPEND LIB_DEFINES LINUX)
 
diff --git a/lib/cmake/windows.cmake b/lib/cmake/windows.cmake
index c5bd71ae..740e500c 100644
--- a/lib/cmake/windows.cmake
+++ b/lib/cmake/windows.cmake
@@ -34,9 +34,6 @@ if(CMAKE_GENERATOR MATCHES "Visual Studio")
   if(NOT (${CMAKE_GENERATOR_PLATFORM} MATCHES "x64"))
     message(FATAL_ERROR "Only 64-bit platform supported. Re-run with '-A x64' option.")
   endif()
-else()
-  message(STATUS "BUILD_TYPE...              ${CMAKE_BUILD_TYPE}")
-  message(STATUS "CMAKE_VERBOSE_MAKEFILE...  ${CMAKE_VERBOSE_MAKEFILE}")
 endif()
 
 # set NASM flags
-- 
GitLab


From 157e50a400026b80c69e1de9daafbc9facccb19e Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 25 May 2023 15:52:12 +0100
Subject: [PATCH 297/332] cmake: fix MSVC AESNI_EMU compilation on windows

---
 lib/cmake/windows.cmake | 15 +++++++++++----
 1 file changed, 11 insertions(+), 4 deletions(-)

diff --git a/lib/cmake/windows.cmake b/lib/cmake/windows.cmake
index 740e500c..92e8e0fc 100644
--- a/lib/cmake/windows.cmake
+++ b/lib/cmake/windows.cmake
@@ -44,24 +44,31 @@ set_source_files_properties(${SRC_FILES_ASM} PROPERTIES
 # set C compiler flags
 set(CMAKE_C_FLAGS "/nologo /Y- /W3 /WX- /Gm- /fp:precise /EHsc /std:c11")
 set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
-set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
 set(CMAKE_SHARED_LINKER_FLAGS "/nologo")
 set(CMAKE_SHARED_LINKER_FLAGS_RELEASE "/RELEASE /DEBUG /OPT:REF /OPT:ICF /INCREMENTAL:NO")
 set(CMAKE_SHARED_LINKER_FLAGS_DEBUG "/DEBUG /INCREMENTAL:NO")
 set(CMAKE_STATIC_LINKER_FLAGS "/nologo /nodefaultlib")
+
+# set compiler optimizaton flags
 set_source_files_properties(
   ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
   ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
   ${SRC_FILES_AVX2_T3} ${SRC_FILES_AVX512_T1}
   ${SRC_FILES_AVX512_T2}
-  PPROPERTIES COMPILE_FLAGS
-  "${CMAKE_C_FLAGS} /arch:AVX")
+  PROPERTIES COMPILE_FLAGS
+  "/arch:AVX $<$<CONFIG:RELEASE>:/Oi /O2>")
+
+set_source_files_properties(
+  ${SRC_FILES_SSE_T1} ${SRC_FILES_SSE_T2}
+  ${SRC_FILES_SSE_T3} ${SRC_FILES_X86_64}
+  PROPERTIES COMPILE_FLAGS
+  "$<$<CONFIG:RELEASE>:/Oi /O2>")
 
 # set AESNI_EMU specific compiler flags
 foreach(FILE ${SRC_FILES_NO_AESNI})
   set_source_files_properties(${FILE} PROPERTIES
     COMPILE_DEFINITIONS "${LIB_DEFINES}"
-    COMPILE_OPTIONS "$<$<CONFIG:RELEASE>:/Od>")
+    COMPILE_FLAGS "$<$<CONFIG:RELEASE>:/Od /Oi>")
 endforeach()
 
 # generate windows DEF file
-- 
GitLab


From a0855ca2de56ac4dde59cb66244ec2df4d6510bc Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 26 May 2023 10:47:15 +0100
Subject: [PATCH 298/332] cmake: remove NO_COMPAT_IMB_API_053 flag support

---
 cmake/utils.cmake       | 4 +---
 lib/cmake/windows.cmake | 2 +-
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index 1f551125..218cf65e 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -66,7 +66,6 @@ macro(imb_set_proj_defaults)
   option(SAFE_DATA "Sensitive data cleared from registers and memory at operation end" ON)
   option(SAFE_LOOKUP "Lookups depending on sensitive data are constant time" ON)
   option(SAFE_OPTIONS "Enable all safe options" ON)
-  option(NO_COMPAT_IMB_API_053 "Disable compatibility with v0.53" ON)
   option(BUILD_SHARED_LIBS "Build shared library" ON)
   option(CMAKE_VERBOSE_MAKEFILE "Verbose build output" OFF)
   set(EXTRA_CFLAGS "" CACHE STRING "Extra compiler flags")
@@ -82,7 +81,7 @@ macro(imb_set_proj_defaults)
   # project options list (used by print_help target)
   set(IPSEC_MB_OPTIONS CMAKE_BUILD_TYPE IPSEC_MB_OPTIONS
     AESNI_EMU SAFE_PARAM SAFE_DATA SAFE_LOOKUP
-    SAFE_OPTIONS NO_COMPAT_IMB_API_053 BUILD_SHARED_LIBS
+    SAFE_OPTIONS BUILD_SHARED_LIBS
     CMAKE_VERBOSE_MAKEFILE EXTRA_CFLAGS
     )
 
@@ -100,7 +99,6 @@ macro(imb_set_proj_defaults)
   message(STATUS "SAFE_DATA...               ${SAFE_DATA}")
   message(STATUS "SAFE_LOOKUP...             ${SAFE_LOOKUP}")
   message(STATUS "BUILD_SHARED_LIBS...       ${BUILD_SHARED_LIBS}")
-  message(STATUS "NO_COMPAT_IMB_API_053...   ${NO_COMPAT_IMB_API_053}")
   message(STATUS "CMAKE_GENERATOR...         ${CMAKE_GENERATOR}")
   if(${CMAKE_GENERATOR_PLATFORM})
     message(STATUS "GENERATOR PLATFORM...      ${CMAKE_GENERATOR_PLATFORM}")
diff --git a/lib/cmake/windows.cmake b/lib/cmake/windows.cmake
index 92e8e0fc..02d39a1d 100644
--- a/lib/cmake/windows.cmake
+++ b/lib/cmake/windows.cmake
@@ -49,7 +49,7 @@ set(CMAKE_SHARED_LINKER_FLAGS_RELEASE "/RELEASE /DEBUG /OPT:REF /OPT:ICF /INCREM
 set(CMAKE_SHARED_LINKER_FLAGS_DEBUG "/DEBUG /INCREMENTAL:NO")
 set(CMAKE_STATIC_LINKER_FLAGS "/nologo /nodefaultlib")
 
-# set compiler optimizaton flags
+# set compiler optimization flags
 set_source_files_properties(
   ${SRC_FILES_AVX_T1} ${SRC_FILES_AVX_T2}
   ${SRC_FILES_AVX2_T1} ${SRC_FILES_AVX2_T2}
-- 
GitLab


From 8fd9fdb04f6a108ed9987755c70ac9edca2b9e0a Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Tue, 30 May 2023 13:51:09 +0100
Subject: [PATCH 299/332] test: fix KAT-AVX2-T3 cmake test definition

---
 test/kat-app/CMakeLists.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 631d3615..28b634c7 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -166,8 +166,8 @@ add_test(NAME KAT-AVX512-T2
 
 # SDE tests
 if(SDE)
-  add_test(NAME KAT-AVX-T3
-    COMMAND ${SDE} -cmt -- ./${TEST_APP} ${ARCH_AVX}
+  add_test(NAME KAT-AVX2-T3
+    COMMAND ${SDE} -cmt -- ./${TEST_APP} ${ARCH_AVX2}
     WORKING_DIRECTORY ${TEST_APP_BIN_DIR})
 endif()
 
-- 
GitLab


From 7043a639285f2e434926814f22966bbdd99e91e1 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 26 May 2023 14:01:39 +0100
Subject: [PATCH 300/332] cmake: add doxy target to generate documentation

---
 CMakeLists.txt    |  3 +++
 cmake/utils.cmake | 12 ++++++++++++
 2 files changed, 15 insertions(+)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 1fda17a0..105ca33a 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -69,6 +69,9 @@ imb_add_target_spellcheck()
 # cppcheck and bughunt targets
 imb_add_target_cppcheck_bughunt()
 
+# doxy target to generate documentation
+imb_add_target_doxy()
+
 #######################################
 # configure main project targets
 #######################################
diff --git a/cmake/utils.cmake b/cmake/utils.cmake
index 218cf65e..a4243901 100644
--- a/cmake/utils.cmake
+++ b/cmake/utils.cmake
@@ -263,3 +263,15 @@ macro(imb_add_target_spellcheck)
       VERBATIM)
   endif()
 endmacro()
+
+# add doxy target
+macro(imb_add_target_doxy)
+  if(NOT WINDOWS)
+    add_custom_target(
+      doxy
+      COMMAND ${CMAKE_COMMAND} -E echo "Generating documentation..."
+      COMMAND bash -c "doxygen api_doxygen.conf"
+      WORKING_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/lib
+      VERBATIM)
+  endif()
+endmacro()
-- 
GitLab


From 258becdc227a4ab8ff370b3a2beb635a659caf43 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 26 May 2023 14:18:47 +0100
Subject: [PATCH 301/332] lib: move sse .inc files to include directory

---
 lib/{sse_t1 => include}/gcm_api_sse.inc               | 2 +-
 lib/{sse_t1 => include}/gcm_gmac_api_sse.inc          | 2 +-
 lib/{sse_t1 => include}/gcm_sgl_api_sse.inc           | 2 +-
 lib/{sse_t1 => include}/gcm_sse.inc                   | 0
 lib/{sse_t1 => include}/snow3g_uea2_by4_sse.inc       | 0
 lib/sse_t1/gcm128_api_by8_sse.asm                     | 2 +-
 lib/sse_t1/gcm128_gmac_api_by8_sse.asm                | 2 +-
 lib/sse_t1/gcm128_sgl_api_by8_sse.asm                 | 2 +-
 lib/sse_t1/gcm192_api_by8_sse.asm                     | 2 +-
 lib/sse_t1/gcm192_gmac_api_by8_sse.asm                | 2 +-
 lib/sse_t1/gcm192_sgl_api_by8_sse.asm                 | 2 +-
 lib/sse_t1/gcm256_api_by8_sse.asm                     | 2 +-
 lib/sse_t1/gcm256_gmac_api_by8_sse.asm                | 2 +-
 lib/sse_t1/gcm256_sgl_api_by8_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm | 2 +-
 16 files changed, 14 insertions(+), 14 deletions(-)
 rename lib/{sse_t1 => include}/gcm_api_sse.inc (99%)
 rename lib/{sse_t1 => include}/gcm_gmac_api_sse.inc (99%)
 rename lib/{sse_t1 => include}/gcm_sgl_api_sse.inc (99%)
 rename lib/{sse_t1 => include}/gcm_sse.inc (100%)
 rename lib/{sse_t1 => include}/snow3g_uea2_by4_sse.inc (100%)

diff --git a/lib/sse_t1/gcm_api_sse.inc b/lib/include/gcm_api_sse.inc
similarity index 99%
rename from lib/sse_t1/gcm_api_sse.inc
rename to lib/include/gcm_api_sse.inc
index a4be240d..87403397 100644
--- a/lib/sse_t1/gcm_api_sse.inc
+++ b/lib/include/gcm_api_sse.inc
@@ -29,7 +29,7 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;
 
-%include "sse_t1/gcm_sse.inc"
+%include "include/gcm_sse.inc"
 %include "include/imb_job.inc"
 
 %ifndef GCM_API_SSE_INC
diff --git a/lib/sse_t1/gcm_gmac_api_sse.inc b/lib/include/gcm_gmac_api_sse.inc
similarity index 99%
rename from lib/sse_t1/gcm_gmac_api_sse.inc
rename to lib/include/gcm_gmac_api_sse.inc
index 83340f28..98e4c2d8 100644
--- a/lib/sse_t1/gcm_gmac_api_sse.inc
+++ b/lib/include/gcm_gmac_api_sse.inc
@@ -27,7 +27,7 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%include "sse_t1/gcm_sse.inc"
+%include "include/gcm_sse.inc"
 %include "include/gcm_common.inc"
 
 %ifndef GCM_GMAC_API_SSE_INC
diff --git a/lib/sse_t1/gcm_sgl_api_sse.inc b/lib/include/gcm_sgl_api_sse.inc
similarity index 99%
rename from lib/sse_t1/gcm_sgl_api_sse.inc
rename to lib/include/gcm_sgl_api_sse.inc
index b4d5e8d5..63449bc9 100644
--- a/lib/sse_t1/gcm_sgl_api_sse.inc
+++ b/lib/include/gcm_sgl_api_sse.inc
@@ -27,7 +27,7 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%include "sse_t1/gcm_sse.inc"
+%include "include/gcm_sse.inc"
 
 %ifndef GCM_SGL_API_SSE_INC
 %define GCM_SGL_API_SSE_INC
diff --git a/lib/sse_t1/gcm_sse.inc b/lib/include/gcm_sse.inc
similarity index 100%
rename from lib/sse_t1/gcm_sse.inc
rename to lib/include/gcm_sse.inc
diff --git a/lib/sse_t1/snow3g_uea2_by4_sse.inc b/lib/include/snow3g_uea2_by4_sse.inc
similarity index 100%
rename from lib/sse_t1/snow3g_uea2_by4_sse.inc
rename to lib/include/snow3g_uea2_by4_sse.inc
diff --git a/lib/sse_t1/gcm128_api_by8_sse.asm b/lib/sse_t1/gcm128_api_by8_sse.asm
index 96e7a340..adbfc880 100644
--- a/lib/sse_t1/gcm128_api_by8_sse.asm
+++ b/lib/sse_t1/gcm128_api_by8_sse.asm
@@ -27,4 +27,4 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %define GCM128_MODE 1
-%include "sse_t1/gcm_api_sse.inc"
+%include "include/gcm_api_sse.inc"
diff --git a/lib/sse_t1/gcm128_gmac_api_by8_sse.asm b/lib/sse_t1/gcm128_gmac_api_by8_sse.asm
index e222cf4e..32fbbb42 100644
--- a/lib/sse_t1/gcm128_gmac_api_by8_sse.asm
+++ b/lib/sse_t1/gcm128_gmac_api_by8_sse.asm
@@ -27,4 +27,4 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %define GCM128_MODE 1
-%include "sse_t1/gcm_gmac_api_sse.inc"
+%include "include/gcm_gmac_api_sse.inc"
diff --git a/lib/sse_t1/gcm128_sgl_api_by8_sse.asm b/lib/sse_t1/gcm128_sgl_api_by8_sse.asm
index f6df66f7..5c839cbd 100644
--- a/lib/sse_t1/gcm128_sgl_api_by8_sse.asm
+++ b/lib/sse_t1/gcm128_sgl_api_by8_sse.asm
@@ -27,4 +27,4 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %define GCM128_MODE 1
-%include "sse_t1/gcm_sgl_api_sse.inc"
+%include "include/gcm_sgl_api_sse.inc"
diff --git a/lib/sse_t1/gcm192_api_by8_sse.asm b/lib/sse_t1/gcm192_api_by8_sse.asm
index 13cf48d4..89a6ae56 100644
--- a/lib/sse_t1/gcm192_api_by8_sse.asm
+++ b/lib/sse_t1/gcm192_api_by8_sse.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM192_MODE 1
-%include "sse_t1/gcm_api_sse.inc"
+%include "include/gcm_api_sse.inc"
diff --git a/lib/sse_t1/gcm192_gmac_api_by8_sse.asm b/lib/sse_t1/gcm192_gmac_api_by8_sse.asm
index 5c9967e0..40bcdd61 100644
--- a/lib/sse_t1/gcm192_gmac_api_by8_sse.asm
+++ b/lib/sse_t1/gcm192_gmac_api_by8_sse.asm
@@ -27,4 +27,4 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 %define GCM192_MODE 1
-%include "sse_t1/gcm_gmac_api_sse.inc"
+%include "include/gcm_gmac_api_sse.inc"
diff --git a/lib/sse_t1/gcm192_sgl_api_by8_sse.asm b/lib/sse_t1/gcm192_sgl_api_by8_sse.asm
index 6b6a8357..59058ca9 100644
--- a/lib/sse_t1/gcm192_sgl_api_by8_sse.asm
+++ b/lib/sse_t1/gcm192_sgl_api_by8_sse.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM192_MODE 1
-%include "sse_t1/gcm_sgl_api_sse.inc"
+%include "include/gcm_sgl_api_sse.inc"
diff --git a/lib/sse_t1/gcm256_api_by8_sse.asm b/lib/sse_t1/gcm256_api_by8_sse.asm
index fdffe34b..87d01028 100644
--- a/lib/sse_t1/gcm256_api_by8_sse.asm
+++ b/lib/sse_t1/gcm256_api_by8_sse.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM256_MODE 1
-%include "sse_t1/gcm_api_sse.inc"
+%include "include/gcm_api_sse.inc"
diff --git a/lib/sse_t1/gcm256_gmac_api_by8_sse.asm b/lib/sse_t1/gcm256_gmac_api_by8_sse.asm
index 5f8dc21e..4674fa12 100644
--- a/lib/sse_t1/gcm256_gmac_api_by8_sse.asm
+++ b/lib/sse_t1/gcm256_gmac_api_by8_sse.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM256_MODE 1
-%include "sse_t1/gcm_gmac_api_sse.inc"
+%include "include/gcm_gmac_api_sse.inc"
diff --git a/lib/sse_t1/gcm256_sgl_api_by8_sse.asm b/lib/sse_t1/gcm256_sgl_api_by8_sse.asm
index 304b3cb1..244b4da6 100644
--- a/lib/sse_t1/gcm256_sgl_api_by8_sse.asm
+++ b/lib/sse_t1/gcm256_sgl_api_by8_sse.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM256_MODE 1
-%include "sse_t1/gcm_sgl_api_sse.inc"
+%include "include/gcm_sgl_api_sse.inc"
diff --git a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
index ef82a397..bdf16375 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
@@ -29,7 +29,7 @@
 %include "include/imb_job.inc"
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.inc"
-%include "sse_t1/snow3g_uea2_by4_sse.inc"
+%include "include/snow3g_uea2_by4_sse.inc"
 
 %define SUBMIT_JOB_SNOW3G_UEA2 submit_job_snow3g_uea2_sse
 %define FLUSH_JOB_SNOW3G_UEA2 flush_job_snow3g_uea2_sse
diff --git a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
index 9ecdb404..473bcb71 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
@@ -30,7 +30,7 @@
 %include "include/mb_mgr_datastruct.inc"
 %include "include/reg_sizes.inc"
 %include "include/clear_regs.inc"
-%include "sse_t1/snow3g_uea2_by4_sse.inc"
+%include "include/snow3g_uea2_by4_sse.inc"
 
 %define SUBMIT_JOB_SNOW3G_UIA2 submit_job_snow3g_uia2_sse
 %define FLUSH_JOB_SNOW3G_UIA2 flush_job_snow3g_uia2_sse
-- 
GitLab


From 4a94cbd67b394e923a488835fb4e72f537c5d572 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 26 May 2023 14:25:55 +0100
Subject: [PATCH 302/332] lib: move avx512 .inc files to include directory

---
 lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm                  | 2 +-
 lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm              | 2 +-
 lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm                 | 2 +-
 lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm                  | 2 +-
 lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm              | 2 +-
 lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm                 | 2 +-
 lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm                  | 2 +-
 lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm              | 2 +-
 lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm                 | 2 +-
 lib/avx512_t2/aes_cntr_api_by16_vaes_avx512.asm               | 2 +-
 lib/avx512_t2/aes_cntr_bit_api_by16_vaes_avx512.asm           | 2 +-
 lib/avx512_t2/aes_cntr_ccm_api_by16_vaes_avx512.asm           | 2 +-
 lib/avx512_t2/aes_cntr_pon_api_by16_vaes_avx512.asm           | 2 +-
 lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm | 2 +-
 lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm | 2 +-
 lib/{avx512_t2 => include}/aes_cntr_by16_vaes_avx512.inc      | 0
 lib/{avx512_t2 => include}/gcm_api_vaes_avx512.inc            | 2 +-
 lib/{avx512_t2 => include}/gcm_gmac_api_vaes_avx512.inc       | 2 +-
 lib/{avx512_t2 => include}/gcm_sgl_api_vaes_avx512.inc        | 2 +-
 lib/{avx512_t2 => include}/gcm_vaes_avx512.inc                | 0
 lib/{avx512_t2 => include}/snow3g_uea2_by16_vaes_avx512.inc   | 0
 21 files changed, 18 insertions(+), 18 deletions(-)
 rename lib/{avx512_t2 => include}/aes_cntr_by16_vaes_avx512.inc (100%)
 rename lib/{avx512_t2 => include}/gcm_api_vaes_avx512.inc (99%)
 rename lib/{avx512_t2 => include}/gcm_gmac_api_vaes_avx512.inc (99%)
 rename lib/{avx512_t2 => include}/gcm_sgl_api_vaes_avx512.inc (99%)
 rename lib/{avx512_t2 => include}/gcm_vaes_avx512.inc (100%)
 rename lib/{avx512_t2 => include}/snow3g_uea2_by16_vaes_avx512.inc (100%)

diff --git a/lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm b/lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm
index 90dbca2a..3a3aa938 100644
--- a/lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM128_MODE 1
-%include "avx512_t2/gcm_api_vaes_avx512.inc"
+%include "include/gcm_api_vaes_avx512.inc"
diff --git a/lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm b/lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm
index cd55ad0c..b4521311 100644
--- a/lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM128_MODE 1
-%include "avx512_t2/gcm_sgl_api_vaes_avx512.inc"
+%include "include/gcm_sgl_api_vaes_avx512.inc"
diff --git a/lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm b/lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm
index 7915728b..6b2fb721 100644
--- a/lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM128_MODE 1
-%include "avx512_t2/gcm_gmac_api_vaes_avx512.inc"
+%include "include/gcm_gmac_api_vaes_avx512.inc"
diff --git a/lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm b/lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm
index 05693ed9..011f7cfa 100644
--- a/lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM192_MODE 1
-%include "avx512_t2/gcm_api_vaes_avx512.inc"
+%include "include/gcm_api_vaes_avx512.inc"
diff --git a/lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm b/lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm
index f48c2aaa..fa315411 100644
--- a/lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM192_MODE 1
-%include "avx512_t2/gcm_sgl_api_vaes_avx512.inc"
+%include "include/gcm_sgl_api_vaes_avx512.inc"
diff --git a/lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm b/lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm
index 71d785fd..505fbdf0 100644
--- a/lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM192_MODE 1
-%include "avx512_t2/gcm_gmac_api_vaes_avx512.inc"
+%include "include/gcm_gmac_api_vaes_avx512.inc"
diff --git a/lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm b/lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm
index b302958c..c3591419 100644
--- a/lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM256_MODE 1
-%include "avx512_t2/gcm_api_vaes_avx512.inc"
+%include "include/gcm_api_vaes_avx512.inc"
diff --git a/lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm b/lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm
index bf705eb8..30563a89 100644
--- a/lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM256_MODE 1
-%include "avx512_t2/gcm_sgl_api_vaes_avx512.inc"
+%include "include/gcm_sgl_api_vaes_avx512.inc"
diff --git a/lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm b/lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm
index bf648ffb..3e68cdba 100644
--- a/lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm
@@ -28,4 +28,4 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 %define GCM256_MODE 1
-%include "avx512_t2/gcm_gmac_api_vaes_avx512.inc"
+%include "include/gcm_gmac_api_vaes_avx512.inc"
diff --git a/lib/avx512_t2/aes_cntr_api_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cntr_api_by16_vaes_avx512.asm
index 62df455b..311f9cf4 100644
--- a/lib/avx512_t2/aes_cntr_api_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cntr_api_by16_vaes_avx512.asm
@@ -27,7 +27,7 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%include "avx512_t2/aes_cntr_by16_vaes_avx512.inc"
+%include "include/aes_cntr_by16_vaes_avx512.inc"
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;void aes_cntr_128_submit_vaes_avx512 (IMB_JOB *job)
diff --git a/lib/avx512_t2/aes_cntr_bit_api_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cntr_bit_api_by16_vaes_avx512.asm
index 431a8119..18aaf5e4 100644
--- a/lib/avx512_t2/aes_cntr_bit_api_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cntr_bit_api_by16_vaes_avx512.asm
@@ -27,7 +27,7 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%include "avx512_t2/aes_cntr_by16_vaes_avx512.inc"
+%include "include/aes_cntr_by16_vaes_avx512.inc"
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;void aes_cntr_bit_128_submit_vaes_avx512 (IMB_JOB *job)
diff --git a/lib/avx512_t2/aes_cntr_ccm_api_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cntr_ccm_api_by16_vaes_avx512.asm
index 6dca7572..3c0e65f7 100644
--- a/lib/avx512_t2/aes_cntr_ccm_api_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cntr_ccm_api_by16_vaes_avx512.asm
@@ -27,7 +27,7 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%include "avx512_t2/aes_cntr_by16_vaes_avx512.inc"
+%include "include/aes_cntr_by16_vaes_avx512.inc"
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;IMB_JOB * aes_cntr_ccm_128_vaes_avx512(IMB_JOB *job)
diff --git a/lib/avx512_t2/aes_cntr_pon_api_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cntr_pon_api_by16_vaes_avx512.asm
index 74d59b4c..9812b010 100644
--- a/lib/avx512_t2/aes_cntr_pon_api_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cntr_pon_api_by16_vaes_avx512.asm
@@ -28,7 +28,7 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
 
-%include "avx512_t2/aes_cntr_by16_vaes_avx512.inc"
+%include "include/aes_cntr_by16_vaes_avx512.inc"
 
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 ;void aes_cntr_pon_enc_128_vaes_avx512 (void *src, void *dst, void *iv, void *keys, uint64_t length, uint32_t *bip)
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
index 028cff26..9e09dbc3 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
@@ -32,7 +32,7 @@
 %include "include/os.inc"
 %include "include/clear_regs.inc"
 
-%include "avx512_t2/snow3g_uea2_by16_vaes_avx512.inc"
+%include "include/snow3g_uea2_by16_vaes_avx512.inc"
 
 %ifndef SUBMIT_JOB_SNOW3G_UEA2
 %define SUBMIT_JOB_SNOW3G_UEA2_GEN2 submit_job_snow3g_uea2_vaes_avx512
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
index 6c4c3490..317d1cee 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
@@ -32,7 +32,7 @@
 %include "include/reg_sizes.inc"
 %include "include/const.inc"
 %include "include/clear_regs.inc"
-%include "avx512_t2/snow3g_uea2_by16_vaes_avx512.inc"
+%include "include/snow3g_uea2_by16_vaes_avx512.inc"
 
 %ifndef SUBMIT_JOB_SNOW3G_UIA2
 %define SUBMIT_JOB_SNOW3G_UIA2_GEN2     submit_job_snow3g_uia2_vaes_avx512
diff --git a/lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc b/lib/include/aes_cntr_by16_vaes_avx512.inc
similarity index 100%
rename from lib/avx512_t2/aes_cntr_by16_vaes_avx512.inc
rename to lib/include/aes_cntr_by16_vaes_avx512.inc
diff --git a/lib/avx512_t2/gcm_api_vaes_avx512.inc b/lib/include/gcm_api_vaes_avx512.inc
similarity index 99%
rename from lib/avx512_t2/gcm_api_vaes_avx512.inc
rename to lib/include/gcm_api_vaes_avx512.inc
index 5ba50f2b..770756db 100644
--- a/lib/avx512_t2/gcm_api_vaes_avx512.inc
+++ b/lib/include/gcm_api_vaes_avx512.inc
@@ -27,7 +27,7 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%include "avx512_t2/gcm_vaes_avx512.inc"
+%include "include/gcm_vaes_avx512.inc"
 %include "include/error.inc"
 %include "include/os.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc b/lib/include/gcm_gmac_api_vaes_avx512.inc
similarity index 99%
rename from lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
rename to lib/include/gcm_gmac_api_vaes_avx512.inc
index 81f680ec..e0c63294 100644
--- a/lib/avx512_t2/gcm_gmac_api_vaes_avx512.inc
+++ b/lib/include/gcm_gmac_api_vaes_avx512.inc
@@ -27,7 +27,7 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%include "avx512_t2/gcm_vaes_avx512.inc"
+%include "include/gcm_vaes_avx512.inc"
 %include "include/error.inc"
 %include "include/clear_regs.inc"
 
diff --git a/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc b/lib/include/gcm_sgl_api_vaes_avx512.inc
similarity index 99%
rename from lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
rename to lib/include/gcm_sgl_api_vaes_avx512.inc
index 53f05e07..2ac2c43f 100644
--- a/lib/avx512_t2/gcm_sgl_api_vaes_avx512.inc
+++ b/lib/include/gcm_sgl_api_vaes_avx512.inc
@@ -27,7 +27,7 @@
 ;  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
 
-%include "avx512_t2/gcm_vaes_avx512.inc"
+%include "include/gcm_vaes_avx512.inc"
 %include "include/error.inc"
 %include "include/os.inc"
 %include "include/clear_regs.inc"
diff --git a/lib/avx512_t2/gcm_vaes_avx512.inc b/lib/include/gcm_vaes_avx512.inc
similarity index 100%
rename from lib/avx512_t2/gcm_vaes_avx512.inc
rename to lib/include/gcm_vaes_avx512.inc
diff --git a/lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.inc b/lib/include/snow3g_uea2_by16_vaes_avx512.inc
similarity index 100%
rename from lib/avx512_t2/snow3g_uea2_by16_vaes_avx512.inc
rename to lib/include/snow3g_uea2_by16_vaes_avx512.inc
-- 
GitLab


From 4129831b64067420f98f59e91267450b7b32564b Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Mon, 29 May 2023 12:18:57 +0100
Subject: [PATCH 303/332] lib: fix style issues in gcm_vaes_avx512.inc

---
 lib/include/gcm_vaes_avx512.inc | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/lib/include/gcm_vaes_avx512.inc b/lib/include/gcm_vaes_avx512.inc
index 95168650..a8791a43 100644
--- a/lib/include/gcm_vaes_avx512.inc
+++ b/lib/include/gcm_vaes_avx512.inc
@@ -771,8 +771,8 @@
 
         ;; calculate HashKeyK = HashKey x POLY
         vpclmulqdq      %%ZT1, %%ZT7, [rel POLY], 0x10
-        vpshufd         %%ZT2, %%ZT7, 01001110b   
-        vpxorq          %%ZT1, %%ZT1, %%ZT2  
+        vpshufd         %%ZT2, %%ZT7, 01001110b
+        vpxorq          %%ZT1, %%ZT1, %%ZT2
         vmovdqu64       [%%GDATA + HashKeyK_4], %%ZT1
         ;; **ZT1 amd ZT2 to be cleared (hash key)
 
@@ -787,8 +787,8 @@
 
         ;; calculate HashKeyX = HashKey x POLY
         vpclmulqdq      %%ZT1, %%ZT7, [rel POLY], 0x10
-        vpshufd         %%ZT2, %%ZT7, 01001110b   
-        vpxorq          %%ZT1, %%ZT1, %%ZT2  
+        vpshufd         %%ZT2, %%ZT7, 01001110b
+        vpxorq          %%ZT1, %%ZT1, %%ZT2
         vmovdqu64       [%%GDATA + HashKeyK_8], %%ZT1
 
         vshufi64x2      %%ZT5, %%ZT7, %%ZT7, 0x00       ;; broadcast HashKey^8 across all ZT5
@@ -803,8 +803,8 @@
 
         ;; calculate HashKeyK = HashKey x POLY
         vpclmulqdq      %%ZT1, %%ZT8, [rel POLY], 0x10
-        vpshufd         %%ZT2, %%ZT8, 01001110b   
-        vpxorq          %%ZT1, %%ZT1, %%ZT2  
+        vpshufd         %%ZT2, %%ZT8, 01001110b
+        vpxorq          %%ZT1, %%ZT1, %%ZT2
         vmovdqu64       [%%GDATA + HashKeyK_ %+ i], %%ZT1
 
 %assign i (i + 4)
@@ -815,8 +815,8 @@
 
         ;; calculate HashKeyK = HashKey x POLY
         vpclmulqdq      %%ZT1, %%ZT7, [rel POLY], 0x10
-        vpshufd         %%ZT2, %%ZT7, 01001110b   
-        vpxorq          %%ZT1, %%ZT1, %%ZT2  
+        vpshufd         %%ZT2, %%ZT7, 01001110b
+        vpxorq          %%ZT1, %%ZT1, %%ZT2
         vmovdqu64       [%%GDATA + HashKeyK_ %+ i], %%ZT1
 
 %assign i (i + 4)
@@ -3450,7 +3450,7 @@
         ;; **ZTMP9 may include sensitive data
 
         ;; fall through here: handling of the rest is identical in both cases
-        
+
 %%_message_below_32_blocks:
         ;; 32 > number of blocks > 16
 
-- 
GitLab


From 00cf6c194f8f00aa4f2d2fb14f15eb1b88df72fe Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Fri, 5 May 2023 13:24:10 +0100
Subject: [PATCH 304/332] examples: add burst sample application

The goal of this application is to showcase
how to use the ipsec-mb API by encrypting
several buffers with AES-GCM, using the new burst API.
---
 .gitignore                        |   1 +
 CMakeLists.txt                    |   3 +
 Makefile                          |   5 +
 examples/CMakeLists.txt           |  32 ++++
 examples/Makefile                 |  71 +++++++++
 examples/burst-app/CMakeLists.txt |  65 ++++++++
 examples/burst-app/Makefile       |  73 +++++++++
 examples/burst-app/README.md      |  20 +++
 examples/burst-app/main.c         | 249 ++++++++++++++++++++++++++++++
 examples/burst-app/win_x64.mak    |  79 ++++++++++
 examples/cmake/unix.cmake         |  55 +++++++
 examples/cmake/windows.cmake      |  41 +++++
 examples/win_x64.mak              |  32 ++++
 13 files changed, 726 insertions(+)
 create mode 100644 examples/CMakeLists.txt
 create mode 100644 examples/Makefile
 create mode 100644 examples/burst-app/CMakeLists.txt
 create mode 100644 examples/burst-app/Makefile
 create mode 100644 examples/burst-app/README.md
 create mode 100644 examples/burst-app/main.c
 create mode 100644 examples/burst-app/win_x64.mak
 create mode 100644 examples/cmake/unix.cmake
 create mode 100644 examples/cmake/windows.cmake
 create mode 100644 examples/win_x64.mak

diff --git a/.gitignore b/.gitignore
index 366f3cdd..c357b271 100644
--- a/.gitignore
+++ b/.gitignore
@@ -16,6 +16,7 @@ imb-xvalid*
 imb-fuzz-*
 imb-acvp*
 imb-wycheproof*
+imb-burst*
 *_lnk.def
 TAGS
 !wycheproof.c
diff --git a/CMakeLists.txt b/CMakeLists.txt
index 105ca33a..3a445f7b 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -85,6 +85,9 @@ add_subdirectory(perf)
 # build test applications
 add_subdirectory(test)
 
+# build example applications
+add_subdirectory(examples)
+
 #######################################
 # configure post gen custom targets
 #######################################
diff --git a/Makefile b/Makefile
index 54be948f..3792af36 100644
--- a/Makefile
+++ b/Makefile
@@ -31,16 +31,19 @@ all:
 	$(MAKE) -C lib
 	$(MAKE) -C test
 	$(MAKE) -C perf
+	$(MAKE) -C examples
 
 clean:
 	$(MAKE) -C lib clean
 	$(MAKE) -C test clean
 	$(MAKE) -C perf clean
+	$(MAKE) -C examples clean
 
 style:
 	$(MAKE) -C lib style
 	$(MAKE) -C test style
 	$(MAKE) -C perf style
+	$(MAKE) -C examples style
 
 install:
 	$(MAKE) -C lib install
@@ -84,9 +87,11 @@ cppcheck:
 	$(MAKE) -C lib cppcheck
 	$(MAKE) -C test cppcheck
 	$(MAKE) -C perf cppcheck
+	$(MAKE) -C examples cppcheck
 
 # cppcheck bughunt analysis check
 bughunt:
 	$(MAKE) -C lib bughunt
 	$(MAKE) -C test bughunt
 	$(MAKE) -C perf bughunt
+	$(MAKE) -C examples bughunt
diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
new file mode 100644
index 00000000..65a2c999
--- /dev/null
+++ b/examples/CMakeLists.txt
@@ -0,0 +1,32 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# Ensure building entire project
+if(NOT FULL_PROJECT_BUILD)
+  message(FATAL_ERROR "Please run CMake from project root directory")
+endif()
+
+# build imb-burst application
+add_subdirectory(burst-app)
diff --git a/examples/Makefile b/examples/Makefile
new file mode 100644
index 00000000..7eab0c8d
--- /dev/null
+++ b/examples/Makefile
@@ -0,0 +1,71 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+BURST_APP := burst-app
+
+# targets come here
+all: $(BURST_APP)
+
+.PHONY: $(BURST_APP)
+
+$(BURST_APP):
+	$(MAKE) -C burst-app
+.PHONY: clean
+clean:
+	$(MAKE) -C burst-app clean
+
+# style check section
+CHECKPATCH?=checkpatch.pl
+CHECKPATCH_FLAGS = --no-tree --no-signoff --emacs --no-color --max-line-length=100 --ignore CODE_INDENT,INITIALISED_STATIC,LEADING_SPACE,SPLIT_STRING,UNSPECIFIED_INT,ARRAY_SIZE,BLOCK_COMMENT_STYLE,GLOBAL_INITIALISERS,AVOID_EXTERNS,COMPLEX_MACRO,USE_FUNC,CONSTANT_COMPARISON,MISSING_SPACE,NEW_TYPEDEFS
+
+%.c_style_check : %.c
+	$(CHECKPATCH) $(CHECKPATCH_FLAGS) -f $<
+
+BURST_APP_SOURCES := $(wildcard $(BURST_APP)/*.[c])
+SOURCES_ALL := $(BURST_APP_SOURCES)
+SOURCES_STYLE := $(foreach infile,$(SOURCES_ALL),$(infile)_style_check)
+
+.PHONY: style
+style: $(SOURCES_STYLE)
+
+# cppcheck analysis check
+CPPCHECK ?= cppcheck
+CPPCHECK_OPTS ?= -I./ -I../lib
+CPPCHECK_FLAGS ?= -j $(shell getconf _NPROCESSORS_ONLN)
+CPPCHECK_FLAGS1 ?= --cppcheck-build-dir=.cppcheck $(CPPCHECK_FLAGS)
+CPPCHECK_FLAGS2 ?= --cppcheck-build-dir=.bughunt $(CPPCHECK_FLAGS)
+.PHONY: cppcheck
+cppcheck:
+	mkdir -p .cppcheck
+	$(CPPCHECK) --force --enable=all $(CPPCHECK_FLAGS1) $(CPPCHECK_OPTS) \
+		./burst-app
+
+.PHONY: bughunt
+bughunt:
+	mkdir -p .bughunt
+	$(CPPCHECK) --bug-hunting --inconclusive $(CPPCHECK_FLAGS2) $(CPPCHECK_OPTS) \
+		./burst-app
diff --git a/examples/burst-app/CMakeLists.txt b/examples/burst-app/CMakeLists.txt
new file mode 100644
index 00000000..de391d81
--- /dev/null
+++ b/examples/burst-app/CMakeLists.txt
@@ -0,0 +1,65 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# Ensure building entire project
+if(NOT FULL_PROJECT_BUILD)
+  message(FATAL_ERROR "Please run CMake from project root directory")
+endif()
+
+########################################
+# set app and library names
+########################################
+set(SAMPLE_APP imb-burst)
+set(LIB_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../lib)
+set(TEST_INCLUDE_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../include)
+
+########################################
+# set imb-burst source files
+########################################
+set(SAMPLE_APP_SRC_FILES_C
+  ${CMAKE_CURRENT_SOURCE_DIR}/main.c
+)
+
+########################################
+# set C compiler options
+########################################
+# add OS specific options
+if(CMAKE_HOST_UNIX)
+  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/unix.cmake)
+else()
+  include(${CMAKE_CURRENT_SOURCE_DIR}/../cmake/windows.cmake)
+endif()
+
+
+########################################
+# add targets
+########################################
+include_directories(${LIB_DIR})
+link_directories(${LIB_DIR})
+
+add_executable(${SAMPLE_APP} ${SAMPLE_APP_SRC_FILES_C})
+target_link_libraries(${SAMPLE_APP} PRIVATE ${IPSEC_MB_LIB})
+target_compile_definitions(${SAMPLE_APP} PRIVATE ${APP_DEFINES})
+
diff --git a/examples/burst-app/Makefile b/examples/burst-app/Makefile
new file mode 100644
index 00000000..102819f9
--- /dev/null
+++ b/examples/burst-app/Makefile
@@ -0,0 +1,73 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+APP := imb-burst
+INSTPATH ?= /usr/include/intel-ipsec-mb.h
+LIB_DIR ?= ../../lib
+
+CFLAGS = -D_GNU_SOURCE -DNO_COMPAT_IMB_API_053 $(INCLUDES) \
+	-W -Wall -Wextra -Wmissing-declarations -Wpointer-arith \
+	-Wcast-qual -Wundef -Wwrite-strings  \
+	-Wformat -Wformat-security \
+	-Wunreachable-code -Wmissing-noreturn -Wsign-compare -Wno-endif-labels \
+	-Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition \
+	-pthread -fno-delete-null-pointer-checks -fwrapv -std=c99
+
+# -fno-strict-overflow is not supported by clang
+ifneq ($(CC),clang)
+CFLAGS += -fno-strict-overflow
+endif
+
+LDLIBS = -lIPSec_MB
+
+# imb-burst modules
+SOURCES := main.c
+OBJECTS := $(SOURCES:%.c=%.o)
+
+ifeq ("$(shell test -e $(INSTPATH) && echo -n yes)","yes")
+# library installed
+CFLAGS +=
+else
+# library not installed
+CFLAGS += -I$(LIB_DIR)
+LDFLAGS += -L$(LIB_DIR)
+endif
+
+# targets come here
+all: $(APP)
+
+$(APP): $(OBJECTS)
+	$(CC) $(CFLAGS) $(LDFLAGS) $^ $(LDLIBS) -o $@
+
+.PHONY: clean
+clean:
+	-rm -f $(DEP_FILES) $(OBJECTS) $(APP)
+
+# if target not clean then make dependencies
+ifneq ($(MAKECMDGOALS),clean)
+-include $(wildcard *.d)
+endif
diff --git a/examples/burst-app/README.md b/examples/burst-app/README.md
new file mode 100644
index 00000000..7d577172
--- /dev/null
+++ b/examples/burst-app/README.md
@@ -0,0 +1,20 @@
+# Intel(R) Multi-Buffer Crypto for IPsec Library - Basic Sample Application
+
+## Contents
+
+- Overview
+- Usage
+
+
+## Overview
+
+The basic sample application showcases how to use the library API,
+encrypting several buffers with AES-128-GCM using the burst API,
+with all steps required, minimizing the number of lines of code needed,
+so it can serve as a skeleton app for developers to
+start building their application.
+
+## Usage
+
+Usage:
+    `./imb-burst`
diff --git a/examples/burst-app/main.c b/examples/burst-app/main.c
new file mode 100644
index 00000000..90857b78
--- /dev/null
+++ b/examples/burst-app/main.c
@@ -0,0 +1,249 @@
+/**********************************************************************
+  Copyright(c) 2023 Intel Corporation All rights reserved.
+
+  Redistribution and use in source and binary forms, with or without
+  modification, are permitted provided that the following conditions
+  are met:
+    * Redistributions of source code must retain the above copyright
+      notice, this list of conditions and the following disclaimer.
+    * Redistributions in binary form must reproduce the above copyright
+      notice, this list of conditions and the following disclaimer in
+      the documentation and/or other materials provided with the
+      distribution.
+    * Neither the name of Intel Corporation nor the names of its
+      contributors may be used to endorse or promote products derived
+      from this software without specific prior written permission.
+
+  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**********************************************************************/
+
+#include <stdio.h>
+#include <string.h>
+
+#include <intel-ipsec-mb.h>
+
+#define NUM_BUFS IMB_MAX_JOBS
+#define BURST_SIZE 32
+#define BUF_SIZE 2048
+#define KEY_SIZE 16
+#define IV_SIZE 16
+#define AAD_SIZE 12
+#define DIGEST_SIZE 16
+#define TOTAL_NUM_JOBS 10000UL
+
+/*
+ * Fill AES-128-GCM job to be submitted with IMB_SUBMIT_BURST
+ */
+static void
+fill_job(IMB_JOB *job, const void *src_buf, void *dst_buf, const void *iv,
+         const struct gcm_key_data *key, const void *aad, void *auth_tag)
+{
+        /* General parameters */
+        job->src = src_buf;
+        job->dst = dst_buf;
+        job->chain_order = IMB_ORDER_CIPHER_HASH;
+
+        /* Cipher parameters */
+        job->cipher_mode = IMB_CIPHER_GCM;
+        job->cipher_direction = IMB_DIR_ENCRYPT;
+        job->enc_keys = key;
+        job->dec_keys = key;
+        job->key_len_in_bytes = KEY_SIZE;
+        job->iv = iv;
+        job->iv_len_in_bytes = IV_SIZE;
+        job->msg_len_to_cipher_in_bytes = BUF_SIZE;
+        job->cipher_start_src_offset_in_bytes = 0;
+
+        /* Authentication parameters */
+        job->hash_alg = IMB_AUTH_AES_GMAC;
+        job->u.GCM.aad = aad;
+        job->u.GCM.aad_len_in_bytes = AAD_SIZE;
+        job->msg_len_to_hash_in_bytes = BUF_SIZE;
+        job->hash_start_src_offset_in_bytes = 0;
+        job->auth_tag_output = auth_tag;
+        job->auth_tag_output_len_in_bytes = DIGEST_SIZE;
+}
+
+static int
+allocate_array(void **array, const unsigned num_elems,
+               const size_t elem_size)
+{
+        unsigned i;
+
+        for (i = 0; i < num_elems; i++) {
+                array[i] = malloc(elem_size);
+                if (array[i] == NULL)
+                        return -1;
+        }
+
+        return 0;
+}
+
+int main(void)
+{
+        unsigned i;
+        IMB_MGR *mb_mgr = NULL;
+        int exit_status = EXIT_FAILURE;
+
+        /* Allocate buffers and authentication tags */
+        void *src_bufs[NUM_BUFS];
+        void *dst_bufs[NUM_BUFS];
+        void *auth_tags[NUM_BUFS];
+
+        memset(src_bufs, 0, sizeof(src_bufs));
+        memset(dst_bufs, 0, sizeof(dst_bufs));
+        memset(auth_tags, 0, sizeof(auth_tags));
+
+        if (allocate_array(src_bufs, NUM_BUFS, BUF_SIZE) < 0) {
+                printf("Could not allocate memory for source buffer\n");
+                goto exit;
+        }
+        if (allocate_array(dst_bufs, NUM_BUFS, BUF_SIZE) < 0) {
+                printf("Could not allocate memory for destination buffer\n");
+                goto exit;
+        }
+        if (allocate_array(auth_tags, NUM_BUFS, DIGEST_SIZE) < 0) {
+                printf("Could not allocate memory for authentication tag\n");
+                goto exit;
+        }
+
+        /* IMB API: Allocate MB_MGR */
+        mb_mgr = alloc_mb_mgr(0);
+
+        if (mb_mgr == NULL) {
+                printf("Could not allocate memory for IMB_MGR\n");
+                goto exit;
+        }
+
+        /* IMB API: Initialize MB_MGR, detecting best implementation to use */
+        init_mb_mgr_auto(mb_mgr, NULL);
+
+        /* Prepare GCM keys (common for all buffers) */
+        uint8_t key[KEY_SIZE];
+	struct gcm_key_data gdata_key;
+
+        /* IMB API: Expand AES keys and precompute GHASH keys for AES-GCM */
+        IMB_AES128_GCM_PRE(mb_mgr, key, &gdata_key);
+
+        /* Allocate memory for IV and AAD */
+        uint8_t iv[BURST_SIZE][IV_SIZE];
+        uint8_t aad[BURST_SIZE][AAD_SIZE];
+
+        /* Prepare IMB_JOB's (one job per buffer) */
+        IMB_JOB *jobs[BURST_SIZE];
+        unsigned completed_jobs;
+        unsigned total_jobs_rx = 0;
+        unsigned n_jobs_left = TOTAL_NUM_JOBS;
+
+        printf("Encrypting %lu buffers with AES-GCM\n", TOTAL_NUM_JOBS);
+        while (n_jobs_left != 0) {
+                const unsigned burst_size = (n_jobs_left < BURST_SIZE) ?
+                                       n_jobs_left : BURST_SIZE;
+
+                /* IMB API: Get next burst of IMB_JOB's */
+                const unsigned n_jobs = IMB_GET_NEXT_BURST(mb_mgr, burst_size, jobs);
+
+                /* If no jobs available, the manager needs to be flushed, to get some jobs out */
+                if (n_jobs == 0) {
+                        completed_jobs = IMB_FLUSH_BURST(mb_mgr, BURST_SIZE, jobs);
+
+                        total_jobs_rx += completed_jobs;
+                        n_jobs_left -= completed_jobs;
+#ifdef DEBUG
+                        for (i = 0; i < completed_jobs; i++) {
+                                if (jobs[i]->status != IMB_STATUS_COMPLETED) {
+                                        printf("Some jobs were not successful\n");
+                                        goto exit;
+                                }
+                        }
+#endif
+                        continue;
+                }
+
+                /* Prepare jobs */
+                for (i = 0; i < n_jobs; i++) {
+                        /* Index for next buffer in src_bufs/dst_bufs arrays */
+                        const unsigned buf_idx = (TOTAL_NUM_JOBS - n_jobs_left + i) % NUM_BUFS;
+
+                        fill_job(jobs[i], src_bufs[buf_idx], dst_bufs[buf_idx],
+                                 iv[i], &gdata_key, aad[i], auth_tags[buf_idx]);
+#if IMB_VERSION(1, 3, 0) < IMB_VERSION_NUM
+                        imb_set_session(mb_mgr, jobs[i]);
+#endif
+                }
+
+#ifdef DEBUG
+                /* IMB API: Submit jobs (internally checks if job fields are correct) */
+                completed_jobs = IMB_SUBMIT_BURST(mb_mgr, n_jobs, jobs);
+
+                /* IMB API: Get error number set (0 = all correct) */
+                const int err = imb_get_errno(mb_mgr);
+
+                /* IMB API: Get string for the error */
+                if (err != 0) {
+                        printf("submit_burst error %d : '%s'\n", err,
+                               imb_get_strerror(err));
+                        goto exit;
+                }
+
+                for (i = 0; i < completed_jobs; i++) {
+                        if (jobs[i]->status != IMB_STATUS_COMPLETED) {
+                                printf("Some jobs were not successful\n");
+                                goto exit;
+                        }
+                }
+#else
+                /* IMB API: Submit jobs (does not check the job fields, so it is faster API) */
+                completed_jobs = IMB_SUBMIT_BURST_NOCHECK(mb_mgr, n_jobs, jobs);
+
+#endif
+                n_jobs_left -= n_jobs;
+                total_jobs_rx += completed_jobs;
+        }
+
+        if (total_jobs_rx != TOTAL_NUM_JOBS) {
+                /* IMB API: Flush jobs (processes jobs not completed previously with
+                 *          IMB_SUBMIT_BURST/IMB_SUBMIT_BURST_NOCHECK) */
+                completed_jobs = IMB_FLUSH_BURST(mb_mgr, BURST_SIZE, jobs);
+
+                total_jobs_rx += completed_jobs;
+#ifdef DEBUG
+                for (i = 0; i < completed_jobs; i++) {
+                        if (jobs[i]->status != IMB_STATUS_COMPLETED) {
+                                printf("Some jobs were not successful\n");
+                                goto exit;
+                        }
+                }
+
+#endif
+        }
+
+        if (total_jobs_rx != TOTAL_NUM_JOBS) {
+                printf("Not all jobs could be completed (expected %lu, got %u)\n",
+                       TOTAL_NUM_JOBS, total_jobs_rx);
+                goto exit;
+        }
+
+        exit_status = EXIT_SUCCESS;
+
+        printf("All buffers were successfully encrypted\n");
+exit:
+        for (i = 0; i < NUM_BUFS; i++) {
+                free(src_bufs[i]);
+                free(dst_bufs[i]);
+                free(auth_tags[i]);
+        }
+        free_mb_mgr(mb_mgr);
+
+        return exit_status;
+}
diff --git a/examples/burst-app/win_x64.mak b/examples/burst-app/win_x64.mak
new file mode 100644
index 00000000..17b8e44c
--- /dev/null
+++ b/examples/burst-app/win_x64.mak
@@ -0,0 +1,79 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+APP = imb-burst
+
+INSTNAME = intel-ipsec-mb
+
+!if !defined(PREFIX)
+PREFIX = C:\Program Files
+!endif
+
+!if exist("$(PREFIX)\$(INSTNAME)\libIPSec_MB.lib")
+IPSECLIB = "$(PREFIX)\$(INSTNAME)\libIPSec_MB.lib"
+INCDIR = -I"$(PREFIX)\$(INSTNAME)"
+!else
+!if !defined(LIB_DIR)
+LIB_DIR = ..\lib
+!endif
+IPSECLIB = "$(LIB_DIR)\libIPSec_MB.lib"
+INCDIR = -I$(LIB_DIR) -I.\
+!endif
+
+!if !defined(DEBUG_OPT)
+DEBUG_OPT = /Od
+!endif
+
+!ifdef DEBUG
+DCFLAGS = $(DEBUG_OPT) /DDEBUG /Z7
+DLFLAGS = /debug
+!else
+DCFLAGS = /O2 /Oi
+DLFLAGS =
+!endif
+
+CC = cl
+
+# _CRT_SECURE_NO_WARNINGS disables warning C4996 about insecure strtok() being used
+CFLAGS = /nologo /DNO_COMPAT_IMB_API_053 /D_CRT_SECURE_NO_WARNINGS $(DCFLAGS) /Y- /W3 /WX- /Gm- /fp:precise /EHsc $(EXTRA_CFLAGS) $(INCDIR) /std:c11
+
+LNK = link
+LFLAGS = /out:$(APP).exe $(DLFLAGS)
+
+OBJECTS = main.obj
+
+all: $(APP).exe
+
+$(APP).exe: $(OBJECTS) $(IPSECLIB)
+        $(LNK) $(LFLAGS) $(OBJECTS) $(IPSECLIB)
+
+.c.obj:
+	$(CC) /c $(CFLAGS) $<
+        $(DEPTOOL) $< $@ "$(DEPFLAGS)" > $@.dep
+
+clean:
+	del /q $(OBJECTS) $(APP).exe $(APP).pdb $(APP).ilk
diff --git a/examples/cmake/unix.cmake b/examples/cmake/unix.cmake
new file mode 100644
index 00000000..e60c8572
--- /dev/null
+++ b/examples/cmake/unix.cmake
@@ -0,0 +1,55 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice, this
+#   list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright notice,
+#   this list of conditions and the following disclaimer in the documentation
+#   and/or other materials provided with the distribution.
+# * Neither the name of Intel Corporation nor the names of its contributors may
+#   be used to endorse or promote products derived from this software without
+#   specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# ##############################################################################
+# Test application CMake Unix config
+# ##############################################################################
+
+set(LINUX 1)
+set(IPSEC_MB_LIB IPSec_MB)
+
+# set NASM flags
+set(CMAKE_ASM_NASM_FLAGS "-felf64 -Xgnu -gdwarf -DLINUX -D__linux__")
+
+# set compiler definitions
+set(APP_DEFINES LINUX _GNU_SOURCE)
+
+# set C compiler flags
+set(CMAKE_C_FLAGS
+    "-W -Wall -Wextra -Wmissing-declarations \
+-Wpointer-arith -Wcast-qual -Wundef -Wwrite-strings -Wformat \
+-Wformat-security -Wunreachable-code -Wmissing-noreturn -Wsign-compare \
+-Wno-endif-labels -Wstrict-prototypes -Wmissing-prototypes \
+-Wold-style-definition -fno-delete-null-pointer-checks -fwrapv -std=c99")
+set(CMAKE_C_FLAGS_DEBUG "-O0 -DDEBUG -g")
+set(CMAKE_C_FLAGS_RELEASE "-O3")
+set(CMAKE_EXE_LINKER_FLAGS "-fPIE -z noexecstack -z relro -z now")
+set(CMAKE_EXE_LINKER_FLAGS_DEBUG "-g")
+
+# -fno-strict-overflow is not supported by clang
+if(CMAKE_COMPILER_IS_GNUCC)
+  string(APPEND CMAKE_C_FLAGS " -fno-strict-overflow")
+endif()
+
diff --git a/examples/cmake/windows.cmake b/examples/cmake/windows.cmake
new file mode 100644
index 00000000..df70a01b
--- /dev/null
+++ b/examples/cmake/windows.cmake
@@ -0,0 +1,41 @@
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+# * Redistributions of source code must retain the above copyright notice, this
+#   list of conditions and the following disclaimer.
+# * Redistributions in binary form must reproduce the above copyright notice,
+#   this list of conditions and the following disclaimer in the documentation
+#   and/or other materials provided with the distribution.
+# * Neither the name of Intel Corporation nor the names of its contributors may
+#   be used to endorse or promote products derived from this software without
+#   specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+# ##############################################################################
+# Test application CMake Windows config
+# ##############################################################################
+
+set(WINDOWS 1)
+set(IPSEC_MB_LIB libIPSec_MB)
+
+# set NASM flags
+set(CMAKE_ASM_NASM_FLAGS "-Werror -fwin64 -Xvc -DWIN_ABI")
+
+# set C compiler flags
+set(CMAKE_C_FLAGS "/nologo /D_CRT_SECURE_NO_WARNINGS /Y- /W3 /WX- /Gm- /fp:precise /EHsc /std:c11 ${EXTRA_CFLAGS}")
+set(CMAKE_C_FLAGS_DEBUG "/Od /DDEBUG /Z7")
+set(CMAKE_C_FLAGS_RELEASE "/O2 /Oi")
+set(CMAKE_EXE_LINKER_FLAGS_DEBUG "/debug")
+
diff --git a/examples/win_x64.mak b/examples/win_x64.mak
new file mode 100644
index 00000000..3bb29c86
--- /dev/null
+++ b/examples/win_x64.mak
@@ -0,0 +1,32 @@
+#
+# Copyright (c) 2023, Intel Corporation
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are met:
+#
+#     * Redistributions of source code must retain the above copyright notice,
+#       this list of conditions and the following disclaimer.
+#     * Redistributions in binary form must reproduce the above copyright
+#       notice, this list of conditions and the following disclaimer in the
+#       documentation and/or other materials provided with the distribution.
+#     * Neither the name of Intel Corporation nor the names of its contributors
+#       may be used to endorse or promote products derived from this software
+#       without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+# AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+#
+
+all:
+	cd burst-app & $(MAKE) /f win_x64.mak
+
+clean:
+	cd burst-app & $(MAKE) /f win_x64.mak clean
-- 
GitLab


From 15bc4039f3986ab4e6e96df9f40667733bfe2f42 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Thu, 1 Jun 2023 11:00:05 +0100
Subject: [PATCH 305/332] avx2: [ZUC] use always keygen with GFNI when
 available

Keystream generation function using GFNI was not always
used when GFNI instructions are available.
---
 lib/avx2_t1/zuc_top_avx2.c | 50 ++++++++++++--------------------------
 1 file changed, 16 insertions(+), 34 deletions(-)

diff --git a/lib/avx2_t1/zuc_top_avx2.c b/lib/avx2_t1/zuc_top_avx2.c
index d3f77ec9..4781b434 100644
--- a/lib/avx2_t1/zuc_top_avx2.c
+++ b/lib/avx2_t1/zuc_top_avx2.c
@@ -79,15 +79,19 @@ keygen_8(ZucState8_t *state, uint32_t **pKeyStrArr,
                         asm_ZucGenKeystream4B_8_gfni_avx2(state, pKeyStrArr);
                 else if (numKeyStrBytes == 8)
                         asm_ZucGenKeystream8B_8_gfni_avx2(state, pKeyStrArr);
-                else /* 16 */
+                else if (numKeyStrBytes == 16)
                         asm_ZucGenKeystream16B_8_gfni_avx2(state, pKeyStrArr);
+                else /* 32 */
+                        asm_ZucGenKeystream32B_8_gfni_avx2(state, pKeyStrArr);
         } else {
                 if (numKeyStrBytes == 4)
                         asm_ZucGenKeystream4B_8_avx2(state, pKeyStrArr);
                 else if (numKeyStrBytes == 8)
                         asm_ZucGenKeystream8B_8_avx2(state, pKeyStrArr);
-                else /* 16 */
+                else if (numKeyStrBytes == 16)
                         asm_ZucGenKeystream16B_8_avx2(state, pKeyStrArr);
+                else /* 32 */
+                        asm_ZucGenKeystream32B_8_avx2(state, pKeyStrArr);
         }
 }
 
@@ -788,13 +792,7 @@ void _zuc_eia3_8_buffer_job(const void * const pKey[NUM_AVX2_BUFS],
         init_8(&keys, ivs, &state, 128, 0, NULL, use_gfni);
 
         /* Generate 32 bytes at a time */
-        if (use_gfni) {
-                /* Generate 32 bytes at a time */
-                asm_ZucGenKeystream32B_8_gfni_avx2(&state, pKeyStrArr);
-        } else {
-                /* Generate 32 bytes at a time */
-                asm_ZucGenKeystream32B_8_avx2(&state, pKeyStrArr);
-        }
+        keygen_8(&state, pKeyStrArr, 32, use_gfni);
 
         /* Point at the next 32 bytes of the key */
         for (i = 0; i < NUM_AVX2_BUFS; i++)
@@ -804,21 +802,11 @@ void _zuc_eia3_8_buffer_job(const void * const pKey[NUM_AVX2_BUFS],
                 remainCommonBits -= keyStreamLengthInBits;
                 numKeyStr++;
                 /* Generate the next key stream 8 bytes or 32 bytes */
-                if (use_gfni) {
-                        if (!remainCommonBits && allCommonBits)
-                                asm_ZucGenKeystream8B_8_gfni_avx2(&state,
-                                                                 pKeyStrArr);
-                        else
-                                asm_ZucGenKeystream32B_8_gfni_avx2(&state,
-                                                                  pKeyStrArr);
-                } else {
-                        if (!remainCommonBits && allCommonBits)
-                                asm_ZucGenKeystream8B_8_avx2(&state,
-                                                            pKeyStrArr);
-                        else
-                                asm_ZucGenKeystream32B_8_avx2(&state,
-                                                             pKeyStrArr);
-                }
+                if (!remainCommonBits && allCommonBits)
+                        keygen_8(&state, pKeyStrArr, 8, use_gfni);
+                else
+                        keygen_8(&state, pKeyStrArr, 32, use_gfni);
+
                 for (i = 0; i < NUM_AVX2_BUFS; i++) {
                         if (job_in_lane[i] == NULL)
                                 continue;
@@ -958,12 +946,7 @@ void _zuc256_eia3_8_buffer_job(const void * const pKey[NUM_AVX2_BUFS],
         init_8(&keys, ivs, &state, 256, tag_size, T, use_gfni);
 
         /* Generate 32 bytes at a time */
-        if (use_gfni)
-                /* Generate 32 bytes at a time */
-                asm_ZucGenKeystream32B_8_gfni_avx2(&state, pKeyStrArr);
-        else
-                /* Generate 32 bytes at a time */
-                asm_ZucGenKeystream32B_8_avx2(&state, pKeyStrArr);
+        keygen_8(&state, pKeyStrArr, 32, use_gfni);
 
         /* Point at the next 32 bytes of the key */
         for (i = 0; i < NUM_AVX2_BUFS; i++)
@@ -973,11 +956,10 @@ void _zuc256_eia3_8_buffer_job(const void * const pKey[NUM_AVX2_BUFS],
                 remainCommonBits -= keyStreamLengthInBits;
                 numKeyStr++;
                 /* Generate the next key stream 4/8/16 bytes or 32 bytes */
-                if (!remainCommonBits && allCommonBits) {
+                if (!remainCommonBits && allCommonBits)
                         keygen_8(&state, pKeyStrArr, tag_size, use_gfni);
-                } else
-                        asm_ZucGenKeystream32B_8_avx2(&state,
-                                                      (uint32_t **)pKeyStrArr);
+                else
+                        keygen_8(&state, (uint32_t **)pKeyStrArr, 32, use_gfni);
                 for (i = 0; i < NUM_AVX2_BUFS; i++) {
                         void *tag = (void *) &T[i*tag_size];
 
-- 
GitLab


From 6ca8c6c60ac054f205036b17542e73ffea736f19 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Wed, 31 May 2023 12:05:44 +0100
Subject: [PATCH 306/332] test: [XCBC] Unify test vectors

---
 test/kat-app/CMakeLists.txt   |   1 +
 test/kat-app/Makefile         |   2 +-
 test/kat-app/win_x64.mak      |   2 +-
 test/kat-app/xcbc_test.c      | 314 +++-------------------------------
 test/kat-app/xcbc_test.json.c | 111 ++++++++++++
 5 files changed, 138 insertions(+), 292 deletions(-)
 create mode 100644 test/kat-app/xcbc_test.json.c

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 28b634c7..686c48b9 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -83,6 +83,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/ghash_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/poly1305_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/cmac_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/xcbc_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
 )
 
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index 32bba6bc..1df4d7e2 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -39,7 +39,7 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
 	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c hmac_sha512.json.c \
 	hmac_md5.json.c gmac_test.json.c ghash_test.c ghash_test.json.c poly1305_test.json.c \
-	cmac_test.json.c \
+	cmac_test.json.c xcbc_test.json.c\
 	gmac_test.c
 OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index 4964bde8..07ea4bf1 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj ghash_test.json.obj poly1305_test.json.obj cmac_test.json.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj ghash_test.json.obj poly1305_test.json.obj cmac_test.json.obj xcbc_test.json.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
diff --git a/test/kat-app/xcbc_test.c b/test/kat-app/xcbc_test.c
index 3b71bdf2..a9debc4f 100644
--- a/test/kat-app/xcbc_test.c
+++ b/test/kat-app/xcbc_test.c
@@ -33,278 +33,14 @@
 #include <intel-ipsec-mb.h>
 #include "gcm_ctr_vectors_test.h"
 #include "utils.h"
-
+#include "mac_test.h"
 
 int xcbc_test(struct IMB_MGR *mb_mgr);
 
-/*
- * Test vectors from https://tools.ietf.org/html/rfc3566
- */
-
-static const uint8_t key[16] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
-};
-
-/**
- * Test Case #1   : AES-XCBC-MAC-96 with 0-byte input
- * Key (K)        : 000102030405060708090a0b0c0d0e0f
- * Message (M)    : <empty string>
- * AES-XCBC-MAC   : 75f0251d528ac01c4573dfd584d79f29
- * AES-XCBC-MAC-96: 75f0251d528ac01c4573dfd5
- */
-static const uint8_t M_1[] = {0};
-
-static const uint8_t T_1[12] = {
-        0x75, 0xf0, 0x25, 0x1d, 0x52, 0x8a, 0xc0, 0x1c,
-        0x45, 0x73, 0xdf, 0xd5
-};
-
-/**
- * Test Case #2   : AES-XCBC-MAC-96 with 3-byte input
- * Key (K)        : 000102030405060708090a0b0c0d0e0f
- * Message (M)    : 000102
- * AES-XCBC-MAC   : 5b376580ae2f19afe7219ceef172756f
- * AES-XCBC-MAC-96: 5b376580ae2f19afe7219cee
- */
-static const uint8_t M_2[3] = {
-        0x00, 0x01, 0x02
-};
-static const uint8_t T_2[12] = {
-        0x5b, 0x37, 0x65, 0x80, 0xae, 0x2f, 0x19, 0xaf,
-        0xe7, 0x21, 0x9c, 0xee
-};
-
-/**
- * Test Case #3   : AES-XCBC-MAC-96 with 16-byte input
- * Key (K)        : 000102030405060708090a0b0c0d0e0f
- * Message (M)    : 000102030405060708090a0b0c0d0e0f
- * AES-XCBC-MAC   : d2a246fa349b68a79998a4394ff7a263
- * AES-XCBC-MAC-96: d2a246fa349b68a79998a439
- */
-static const uint8_t M_3[16] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f
-};
-static const uint8_t T_3[12] = {
-        0xd2, 0xa2, 0x46, 0xfa, 0x34, 0x9b, 0x68, 0xa7,
-        0x99, 0x98, 0xa4, 0x39
-};
-
-/**
- * Test Case #4   : AES-XCBC-MAC-96 with 20-byte input
- * Key (K)        : 000102030405060708090a0b0c0d0e0f
- * Message (M)    : 000102030405060708090a0b0c0d0e0f10111213
- * AES-XCBC-MAC   : 47f51b4564966215b8985c63055ed308
- * AES-XCBC-MAC-96: 47f51b4564966215b8985c63
- */
-static const uint8_t M_4[20] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-        0x10, 0x11, 0x12, 0x13
-};
-static const uint8_t T_4[12] = {
-        0x47, 0xf5, 0x1b, 0x45, 0x64, 0x96, 0x62, 0x15,
-        0xb8, 0x98, 0x5c, 0x63
-};
-
-/**
- * Test Case #5   : AES-XCBC-MAC-96 with 32-byte input
- * Key (K)        : 000102030405060708090a0b0c0d0e0f
- * Message (M)    : 000102030405060708090a0b0c0d0e0f10111213141516171819
- *                  1a1b1c1d1e1f
- * AES-XCBC-MAC   : f54f0ec8d2b9f3d36807734bd5283fd4
- * AES-XCBC-MAC-96: f54f0ec8d2b9f3d36807734b
- */
-static const uint8_t M_5[32] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f
-};
-static const uint8_t T_5[12] = {
-        0xf5, 0x4f, 0x0e, 0xc8, 0xd2, 0xb9, 0xf3, 0xd3,
-        0x68, 0x07, 0x73, 0x4b
-};
-
-/**
- * Test Case #6   : AES-XCBC-MAC-96 with 34-byte input
- * Key (K)        : 000102030405060708090a0b0c0d0e0f
- * Message (M)    : 000102030405060708090a0b0c0d0e0f10111213141516171819
- *                  1a1b1c1d1e1f2021
- * AES-XCBC-MAC   : becbb3bccdb518a30677d5481fb6b4d8
- * AES-XCBC-MAC-96: becbb3bccdb518a30677d548
- */
-static const uint8_t M_6[34] = {
-        0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
-        0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
-        0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
-        0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 0x1e, 0x1f,
-        0x20, 0x21
-};
-static const uint8_t T_6[12] = {
-        0xbe, 0xcb, 0xb3, 0xbc, 0xcd, 0xb5, 0x18, 0xa3,
-        0x06, 0x77, 0xd5, 0x48
-};
-
-/**
- * Test Case #7   : AES-XCBC-MAC-96 with 1000-byte input
- * Key (K)        : 000102030405060708090a0b0c0d0e0f
- * Message (M)    : 00000000000000000000 ... 00000000000000000000
- *                  [1000 bytes]
- * AES-XCBC-MAC   : f0dafee895db30253761103b5d84528f
- * AES-XCBC-MAC-96: f0dafee895db30253761103b
- */
-static const uint8_t M_7[1000] = {
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-        0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
-};
-static const uint8_t T_7[12] = {
-        0xf0, 0xda, 0xfe, 0xe8, 0x95, 0xdb, 0x30, 0x25,
-        0x37, 0x61, 0x10, 0x3b
-};
-
-static const struct xcbc_rfc3566_vector {
-        const uint8_t *key;
-        const uint8_t *M;
-        size_t len;
-        const uint8_t *T;
-        size_t T_len;
-} xcbc_vectors[] = {
-        { key, M_1, 0,    T_1, 12 },
-        { key, M_2, 3,    T_2, 12 },
-        { key, M_3, 16,   T_3, 12 },
-        { key, M_4, 20,   T_4, 12 },
-        { key, M_5, 32,   T_5, 12 },
-        { key, M_6, 34,   T_6, 12 },
-        { key, M_7, 1000, T_7, 12 },
-};
+extern const struct mac_test xcbc_test_json[];
 
 static int
-xcbc_job_ok(const struct xcbc_rfc3566_vector *vec,
+xcbc_job_ok(const struct mac_test *vec,
             const struct IMB_JOB *job,
             const uint8_t *auth,
             const uint8_t *padding,
@@ -332,11 +68,11 @@ xcbc_job_ok(const struct xcbc_rfc3566_vector *vec,
                 return 0;
         }
 
-        if (memcmp(vec->T, &auth[sizeof_padding], auth_len)) {
+        if (memcmp((const void *) vec->tag, &auth[sizeof_padding], auth_len)) {
                 printf("hash mismatched\n");
                 hexdump(stderr, "Received", &auth[sizeof_padding],
                         auth_len);
-                hexdump(stderr, "Expected", vec->T,
+                hexdump(stderr, "Expected", (const void *) vec->tag,
                         auth_len);
                 return 0;
         }
@@ -345,7 +81,7 @@ xcbc_job_ok(const struct xcbc_rfc3566_vector *vec,
 
 static int
 test_xcbc(struct IMB_MGR *mb_mgr,
-          const struct xcbc_rfc3566_vector *vec,
+          const struct mac_test *vec,
           const int dir,
           const int num_jobs)
 {
@@ -374,7 +110,7 @@ test_xcbc(struct IMB_MGR *mb_mgr,
                 memset(auths[i], -1, 16 + (sizeof(padding) * 2));
         }
 
-        IMB_AES_XCBC_KEYEXP(mb_mgr, vec->key, k1_exp, k2, k3);
+        IMB_AES_XCBC_KEYEXP(mb_mgr, (const void *) vec->key, k1_exp, k2, k3);
 
         while (IMB_FLUSH_JOB(mb_mgr) != NULL)
                 ;
@@ -388,14 +124,14 @@ test_xcbc(struct IMB_MGR *mb_mgr,
                 job->chain_order = IMB_ORDER_HASH_CIPHER;
                 job->cipher_mode = IMB_CIPHER_NULL;
                 job->hash_alg = IMB_AUTH_AES_XCBC;
-                job->msg_len_to_hash_in_bytes = vec->len;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->u.XCBC._k1_expanded = k1_exp;
                 job->u.XCBC._k2 = k2;
                 job->u.XCBC._k3 = k3;
-                job->src = vec->M;
+                job->src = (const void *) vec->msg;
                 job->hash_start_src_offset_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = vec->T_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize / 8;
 
                 job->user_data = auths[i];
 
@@ -439,14 +175,14 @@ test_xcbc(struct IMB_MGR *mb_mgr,
                 job->chain_order = IMB_ORDER_HASH_CIPHER;
                 job->cipher_mode = IMB_CIPHER_NULL;
                 job->hash_alg = IMB_AUTH_AES_XCBC;
-                job->msg_len_to_hash_in_bytes = vec->len;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->u.XCBC._k1_expanded = k1_exp;
                 job->u.XCBC._k2 = k2;
                 job->u.XCBC._k3 = k3;
-                job->src = vec->M;
+                job->src = (const void *) vec->msg;
                 job->hash_start_src_offset_in_bytes = 0;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = vec->T_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize / 8;
 
                 job->user_data = auths[i];
 
@@ -490,37 +226,35 @@ test_xcbc_std_vectors(struct IMB_MGR *mb_mgr,
                       struct test_suite_context *ctx,
                       const int num_jobs)
 {
-	const int vectors_cnt = DIM(xcbc_vectors);
-	int vect;
+        const struct mac_test *v = xcbc_test_json;
 
         if (!quiet_mode)
 	        printf("AES-XCBC-128 standard test vectors (N jobs = %d):\n", num_jobs);
-	for (vect = 1; vect <= vectors_cnt; vect++) {
-                const int idx = vect - 1;
+	for (; v->msg != NULL; v++) {
 
                 if (!quiet_mode) {
 #ifdef DEBUG
-                        printf("Standard XCBC-128 vector [%d/%d] M len: %d, "
-                               "T len:%d\n",
-                               vect, vectors_cnt,
-                               (int) xcbc_vectors[idx].len,
-                               (int) xcbc_vectors[idx].T_len);
+                        printf("Standard XCBC-128 vector %zu Msg len: %zu, "
+                               "Tag len:%zu\n",
+                               v->tcId,
+                               v->msgSize / 8,
+                               v->tagSize / 8);
 #else
                         printf(".");
 #endif
                 }
 
-                if (test_xcbc(mb_mgr, &xcbc_vectors[idx],
+                if (test_xcbc(mb_mgr, v,
                               IMB_DIR_ENCRYPT, num_jobs)) {
-                        printf("error #%d encrypt\n", vect);
+                        printf("error #%zu encrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
                 }
 
-                if (test_xcbc(mb_mgr, &xcbc_vectors[idx],
+                if (test_xcbc(mb_mgr, v,
                               IMB_DIR_DECRYPT, num_jobs)) {
-                        printf("error #%d decrypt\n", vect);
+                        printf("error #%zu decrypt\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
diff --git a/test/kat-app/xcbc_test.json.c b/test/kat-app/xcbc_test.json.c
new file mode 100644
index 00000000..78a5913f
--- /dev/null
+++ b/test/kat-app/xcbc_test.json.c
@@ -0,0 +1,111 @@
+/*****************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************/
+
+/* XCBC, RFC3566 */
+#include "mac_test.h"
+
+const struct mac_test xcbc_test_json[] = {
+        /* Vectors from https://tools.ietf.org/html/rfc3566 */
+        { 128, 96, 1, "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f", "",
+          "\x75\xf0\x25\x1d\x52\x8a\xc0\x1c\x45\x73\xdf\xd5", 1, 0, NULL, 0 },
+        { 128, 96, 2, "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+          "\x00\x01\x02", "\x5b\x37\x65\x80\xae\x2f\x19\xaf\xe7\x21\x9c\xee", 1, 24, NULL, 0 },
+        { 128, 96, 3, "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+          "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+          "\xd2\xa2\x46\xfa\x34\x9b\x68\xa7\x99\x98\xa4\x39", 1, 128, NULL, 0 },
+        { 128, 96, 4, "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+          "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11"
+          "\x12\x13",
+          "\x47\xf5\x1b\x45\x64\x96\x62\x15\xb8\x98\x5c\x63", 1, 160, NULL, 0 },
+        { 128, 96, 5, "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+          "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11"
+          "\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f",
+          "\xf5\x4f\x0e\xc8\xd2\xb9\xf3\xd3\x68\x07\x73\x4b", 1, 256, NULL, 0 },
+        { 128, 96, 6, "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+          "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f\x10\x11"
+          "\x12\x13\x14\x15\x16\x17\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f\x20\x21",
+          "\xbe\xcb\xb3\xbc\xcd\xb5\x18\xa3\x06\x77\xd5\x48", 1, 272, NULL, 0 },
+        { 128, 96, 7, "\x00\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f",
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
+          "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00",
+          "\xf0\xda\xfe\xe8\x95\xdb\x30\x25\x37\x61\x10\x3b", 1, 8000, NULL, 0 },
+        { 0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0 }
+};
-- 
GitLab


From 899f66ea8c904aba86eb979f227493a549bf1b15 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 1 Jun 2023 10:37:46 +0100
Subject: [PATCH 307/332] lib: fix style issues

---
 lib/Makefile                     |  2 +-
 lib/avx2_t3/mb_mgr_avx2_t3.c     | 12 ++++++++----
 lib/avx512_t1/mb_mgr_avx512_t1.c | 20 ++++++++++++-------
 lib/avx512_t2/mb_mgr_avx512_t2.c | 29 ++++++++++++++++++----------
 lib/sse_t2/sha256_ni_x1_sse.asm  |  2 +-
 lib/sse_t2/sha_ni_mb_sse.c       |  2 +-
 lib/sse_t2/sha_ni_sse.c          | 12 ++++++------
 lib/x86_64/alloc.c               |  6 ++++--
 lib/x86_64/chacha20_poly1305.c   | 33 +++++++++++++++++++-------------
 lib/x86_64/cpu_feature.c         |  4 +++-
 lib/x86_64/hmac_ipad_opad.c      |  5 ++++-
 lib/x86_64/mb_mgr_auto.c         |  3 ++-
 lib/x86_64/ooo_mgr_reset.c       | 20 +++++++++----------
 lib/x86_64/quic_aes_gcm.c        |  7 +++++--
 lib/x86_64/self_test.c           | 15 +++++++++------
 lib/x86_64/snow3g_iv.c           |  4 +++-
 16 files changed, 109 insertions(+), 67 deletions(-)

diff --git a/lib/Makefile b/lib/Makefile
index 1b2a77f1..c89e2a90 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -1120,7 +1120,7 @@ CHECKPATCH_FLAGS = --no-tree --no-signoff --emacs --no-color --ignore CODE_INDEN
 	$(CHECKPATCH) $(CHECKPATCH_FLAGS) -f $<
 
 SOURCES_DIRS := . sse avx avx2 avx512 include no-aesni
-SOURCES := $(foreach dir,$(SOURCES_DIRS),$(wildcard $(dir)/*.[ch]) $(wildcard $(dir)/*.asm) $(wildcard $(dir)/*.inc))
+SOURCES := $(foreach dir,$(SOURCES_DIRS),$(wildcard $(dir)/**/*.[ch]) $(wildcard $(dir)/**/*.asm) $(wildcard $(dir)/**/*.inc))
 SOURCES_STYLE := $(foreach infile,$(SOURCES),$(infile)_style_check)
 
 .PHONY: style
diff --git a/lib/avx2_t3/mb_mgr_avx2_t3.c b/lib/avx2_t3/mb_mgr_avx2_t3.c
index 4f16e98d..10229312 100644
--- a/lib/avx2_t3/mb_mgr_avx2_t3.c
+++ b/lib/avx2_t3/mb_mgr_avx2_t3.c
@@ -436,10 +436,14 @@ init_mb_mgr_avx2_t3_internal(IMB_MGR *state, const int reset_mgrs)
         state->crc8_wimax_ofdma_hcs = crc8_wimax_ofdma_hcs_avx;
 
 #ifdef AVX_IFMA
-        state->chacha20_poly1305_init = init_chacha20_poly1305_fma_avx2;
-        state->chacha20_poly1305_enc_update = update_enc_chacha20_poly1305_fma_avx2;
-        state->chacha20_poly1305_dec_update = update_dec_chacha20_poly1305_fma_avx2;
-        state->chacha20_poly1305_finalize = finalize_chacha20_poly1305_fma_avx2;
+        state->chacha20_poly1305_init =
+                init_chacha20_poly1305_fma_avx2;
+        state->chacha20_poly1305_enc_update =
+                update_enc_chacha20_poly1305_fma_avx2;
+        state->chacha20_poly1305_dec_update =
+                update_dec_chacha20_poly1305_fma_avx2;
+        state->chacha20_poly1305_finalize =
+                finalize_chacha20_poly1305_fma_avx2;
 #endif
 
         state->gcm128_enc          = aes_gcm_enc_128_avx_gen4;
diff --git a/lib/avx512_t1/mb_mgr_avx512_t1.c b/lib/avx512_t1/mb_mgr_avx512_t1.c
index be937952..7bec3e61 100644
--- a/lib/avx512_t1/mb_mgr_avx512_t1.c
+++ b/lib/avx512_t1/mb_mgr_avx512_t1.c
@@ -335,12 +335,18 @@ submit_aes_docsis256_dec_crc32_avx512(MB_MGR_DOCSIS_AES_OOO *state,
         return job;
 }
 
-#define SUBMIT_JOB_DOCSIS128_SEC_CRC_ENC submit_job_aes_docsis128_enc_crc32_avx512
-#define SUBMIT_JOB_DOCSIS256_SEC_CRC_ENC submit_job_aes_docsis256_enc_crc32_avx512
-#define FLUSH_JOB_DOCSIS128_SEC_CRC_ENC flush_job_aes_docsis128_enc_crc32_avx512
-#define FLUSH_JOB_DOCSIS256_SEC_CRC_ENC flush_job_aes_docsis256_enc_crc32_avx512
-#define SUBMIT_JOB_DOCSIS128_SEC_CRC_DEC submit_aes_docsis128_dec_crc32_avx512
-#define SUBMIT_JOB_DOCSIS256_SEC_CRC_DEC submit_aes_docsis256_dec_crc32_avx512
+#define SUBMIT_JOB_DOCSIS128_SEC_CRC_ENC \
+        submit_job_aes_docsis128_enc_crc32_avx512
+#define SUBMIT_JOB_DOCSIS256_SEC_CRC_ENC \
+        submit_job_aes_docsis256_enc_crc32_avx512
+#define FLUSH_JOB_DOCSIS128_SEC_CRC_ENC \
+        flush_job_aes_docsis128_enc_crc32_avx512
+#define FLUSH_JOB_DOCSIS256_SEC_CRC_ENC \
+        flush_job_aes_docsis256_enc_crc32_avx512
+#define SUBMIT_JOB_DOCSIS128_SEC_CRC_DEC \
+        submit_aes_docsis128_dec_crc32_avx512
+#define SUBMIT_JOB_DOCSIS256_SEC_CRC_DEC \
+        submit_aes_docsis256_dec_crc32_avx512
 
 /* ====================================================================== */
 
@@ -351,7 +357,7 @@ reset_ooo_mgrs(IMB_MGR *state)
         ooo_mgr_aes_reset(state->aes128_ooo, 8);
         ooo_mgr_aes_reset(state->aes192_ooo, 8);
         ooo_mgr_aes_reset(state->aes256_ooo, 8);
-        
+
         /* DOCSIS SEC BPI (AES CBC + AES CFB for partial block)
          * uses same settings as AES CBC.
          */
diff --git a/lib/avx512_t2/mb_mgr_avx512_t2.c b/lib/avx512_t2/mb_mgr_avx512_t2.c
index 48c1b0af..ef40c0e8 100644
--- a/lib/avx512_t2/mb_mgr_avx512_t2.c
+++ b/lib/avx512_t2/mb_mgr_avx512_t2.c
@@ -120,10 +120,13 @@
 #define AES_CBC_DEC_256       aes_cbc_dec_256_vaes_avx512
 
 /* AES-CBCS */
-#define SUBMIT_JOB_AES128_CBCS_1_9_ENC submit_job_aes128_cbcs_1_9_enc_vaes_avx512
-#define FLUSH_JOB_AES128_CBCS_1_9_ENC  flush_job_aes128_cbcs_1_9_enc_vaes_avx512
-#define SUBMIT_JOB_AES128_CBCS_1_9_DEC submit_job_aes128_cbcs_1_9_dec_vaes_avx512
-#define AES_CBCS_1_9_DEC_128           aes_cbcs_1_9_dec_128_vaes_avx512
+#define SUBMIT_JOB_AES128_CBCS_1_9_ENC \
+        submit_job_aes128_cbcs_1_9_enc_vaes_avx512
+#define FLUSH_JOB_AES128_CBCS_1_9_ENC  \
+        flush_job_aes128_cbcs_1_9_enc_vaes_avx512
+#define SUBMIT_JOB_AES128_CBCS_1_9_DEC \
+        submit_job_aes128_cbcs_1_9_dec_vaes_avx512
+#define AES_CBCS_1_9_DEC_128 aes_cbcs_1_9_dec_128_vaes_avx512
 
 /* AES-ECB */
 #define SUBMIT_JOB_AES_ECB_128_ENC submit_job_aes_ecb_128_enc_avx512
@@ -341,12 +344,18 @@ submit_job_docsis256_sec_crc_dec_vaes_avx512(MB_MGR_DOCSIS_AES_OOO *state,
         return job;
 }
 
-#define SUBMIT_JOB_DOCSIS128_SEC_CRC_ENC submit_job_aes_docsis128_enc_crc32_vaes_avx512
-#define SUBMIT_JOB_DOCSIS256_SEC_CRC_ENC submit_job_aes_docsis256_enc_crc32_vaes_avx512
-#define FLUSH_JOB_DOCSIS128_SEC_CRC_ENC flush_job_aes_docsis128_enc_crc32_vaes_avx512
-#define FLUSH_JOB_DOCSIS256_SEC_CRC_ENC flush_job_aes_docsis256_enc_crc32_vaes_avx512
-#define SUBMIT_JOB_DOCSIS128_SEC_CRC_DEC submit_job_docsis128_sec_crc_dec_vaes_avx512
-#define SUBMIT_JOB_DOCSIS256_SEC_CRC_DEC submit_job_docsis256_sec_crc_dec_vaes_avx512
+#define SUBMIT_JOB_DOCSIS128_SEC_CRC_ENC \
+        submit_job_aes_docsis128_enc_crc32_vaes_avx512
+#define SUBMIT_JOB_DOCSIS256_SEC_CRC_ENC \
+        submit_job_aes_docsis256_enc_crc32_vaes_avx512
+#define FLUSH_JOB_DOCSIS128_SEC_CRC_ENC \
+        flush_job_aes_docsis128_enc_crc32_vaes_avx512
+#define FLUSH_JOB_DOCSIS256_SEC_CRC_ENC \
+        flush_job_aes_docsis256_enc_crc32_vaes_avx512
+#define SUBMIT_JOB_DOCSIS128_SEC_CRC_DEC \
+        submit_job_docsis128_sec_crc_dec_vaes_avx512
+#define SUBMIT_JOB_DOCSIS256_SEC_CRC_DEC \
+        submit_job_docsis256_sec_crc_dec_vaes_avx512
 
 /* ====================================================================== */
 
diff --git a/lib/sse_t2/sha256_ni_x1_sse.asm b/lib/sse_t2/sha256_ni_x1_sse.asm
index 2f86eefd..87a6bf31 100644
--- a/lib/sse_t2/sha256_ni_x1_sse.asm
+++ b/lib/sse_t2/sha256_ni_x1_sse.asm
@@ -184,7 +184,7 @@ sha256_ni_x1:
         shl             lane, 5
 	movdqu		STATE0, [args + lane]
 	movdqu		STATE1,	[args + lane + 16]
- 
+
 	pshufd		STATE0, STATE0, 0xB1	; CDAB
 	pshufd		STATE1, STATE1, 0x1B	; EFGH
 	movdqa		MSGTMP4, STATE0
diff --git a/lib/sse_t2/sha_ni_mb_sse.c b/lib/sse_t2/sha_ni_mb_sse.c
index 5a6cbec8..fa280f8c 100644
--- a/lib/sse_t2/sha_ni_mb_sse.c
+++ b/lib/sse_t2/sha_ni_mb_sse.c
@@ -89,4 +89,4 @@ IMB_JOB *flush_job_sha256_ni_sse(MB_MGR_SHA_256_OOO *state, IMB_JOB *job)
         return submit_flush_job_sha_256(state, job, 2, 0, 256,
                                         IMB_SHA_256_BLOCK_SIZE, SHA256_PAD_SIZE,
                                         call_sha256_ni_x2_sse_from_c, 1);
-}
\ No newline at end of file
+}
diff --git a/lib/sse_t2/sha_ni_sse.c b/lib/sse_t2/sha_ni_sse.c
index e86880c6..b3efb20e 100644
--- a/lib/sse_t2/sha_ni_sse.c
+++ b/lib/sse_t2/sha_ni_sse.c
@@ -58,8 +58,8 @@ void sha256_one_block_sse_shani(const void *data, void *digest)
 
 void sha1_sse_shani(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, ARCH_SSE_SHANI, 1, IMB_SHA1_BLOCK_SIZE,
-                    SHA1_PAD_SIZE);
+        sha_generic(data, length, digest, ARCH_SSE_SHANI, 1,
+                    IMB_SHA1_BLOCK_SIZE, SHA1_PAD_SIZE);
 }
 
 /* ========================================================================== */
@@ -68,8 +68,8 @@ void sha1_sse_shani(const void *data, const uint64_t length, void *digest)
  */
 void sha224_sse_shani(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, ARCH_SSE_SHANI, 224, IMB_SHA_256_BLOCK_SIZE,
-                    SHA224_PAD_SIZE);
+        sha_generic(data, length, digest, ARCH_SSE_SHANI, 224,
+                    IMB_SHA_256_BLOCK_SIZE, SHA224_PAD_SIZE);
 }
 /* ========================================================================== */
 /*
@@ -77,6 +77,6 @@ void sha224_sse_shani(const void *data, const uint64_t length, void *digest)
  */
 void sha256_sse_shani(const void *data, const uint64_t length, void *digest)
 {
-        sha_generic(data, length, digest, ARCH_SSE_SHANI, 256, IMB_SHA_256_BLOCK_SIZE,
-                    SHA256_PAD_SIZE);
+        sha_generic(data, length, digest, ARCH_SSE_SHANI, 256,
+                    IMB_SHA_256_BLOCK_SIZE, SHA256_PAD_SIZE);
 }
diff --git a/lib/x86_64/alloc.c b/lib/x86_64/alloc.c
index 422ee1f1..14128dbe 100644
--- a/lib/x86_64/alloc.c
+++ b/lib/x86_64/alloc.c
@@ -166,7 +166,8 @@ static void set_ooo_mgr_road_block(IMB_MGR *mgr)
  *     IMB_FLAG_SHANI_OFF - disable use (and detection) of SHA extensions,
  *                          currently SHANI is only available for SSE
  *     IMB_FLAG_AESNI_OFF - disable use (and detection) of AES extensions.
- *     IMB_FLAG_GFNI_OFF - disable use (and detection) of Galois Field extensions.
+ *     IMB_FLAG_GFNI_OFF - disable use (and detection) of
+ *                         Galois Field extensions.
  *
  * @param reset_mgr if 0, IMB_MGR structure is not cleared, else it is.
  *
@@ -276,7 +277,8 @@ free_mem(void *ptr)
  *     IMB_FLAG_SHANI_OFF - disable use (and detection) of SHA extensions,
  *                          currently SHANI is only available for SSE
  *     IMB_FLAG_AESNI_OFF - disable use (and detection) of AES extensions.
- *     IMB_FLAG_GFNI_OFF - disable use (and detection) of Galois Field extensions.
+ *     IMB_FLAG_GFNI_OFF - disable use (and detection) of
+ *                         Galois Field extensions.
  *
  * @return Pointer to allocated memory for MB_MGR structure
  * @retval NULL on allocation error
diff --git a/lib/x86_64/chacha20_poly1305.c b/lib/x86_64/chacha20_poly1305.c
index 47903817..06a0c6e0 100644
--- a/lib/x86_64/chacha20_poly1305.c
+++ b/lib/x86_64/chacha20_poly1305.c
@@ -556,11 +556,13 @@ IMB_JOB *aead_chacha20_poly1305_sgl(IMB_JOB *job, const IMB_ARCH arch,
                 break;
         case IMB_SGL_ALL:
         default:
-                init_chacha20_poly1305_direct(job->enc_keys,
-                                              ctx,
-                                              job->iv, job->u.CHACHA20_POLY1305.aad,
-                                              job->u.CHACHA20_POLY1305.aad_len_in_bytes,
-                                              arch, 0, ifma);
+                init_chacha20_poly1305_direct(
+                                      job->enc_keys,
+                                      ctx,
+                                      job->iv,
+                                      job->u.CHACHA20_POLY1305.aad,
+                                      job->u.CHACHA20_POLY1305.aad_len_in_bytes,
+                                      arch, 0, ifma);
                 for (i = 0; i < job->num_sgl_io_segs; i++)
                         update_chacha20_poly1305_direct(job->enc_keys,
                                                         ctx,
@@ -572,9 +574,9 @@ IMB_JOB *aead_chacha20_poly1305_sgl(IMB_JOB *job, const IMB_ARCH arch,
                                                         0, ifma);
 
                 finalize_chacha20_poly1305_direct(ctx,
-                                                  job->auth_tag_output,
-                                                  job->auth_tag_output_len_in_bytes,
-                                                  arch, 0, ifma);
+                                              job->auth_tag_output,
+                                              job->auth_tag_output_len_in_bytes,
+                                              arch, 0, ifma);
                 /* Clear sensitive data from the context */
 #ifdef SAFE_DATA
                 clear_mem(ctx->last_ks, sizeof(ctx->last_ks));
@@ -931,26 +933,31 @@ void update_dec_chacha20_poly1305_fma_avx512(const void *key,
 void finalize_chacha20_poly1305_sse(struct chacha20_poly1305_context_data *ctx,
                                     void *tag, const uint64_t tag_len)
 {
-        finalize_chacha20_poly1305_direct(ctx, tag, tag_len, IMB_ARCH_SSE, 1, 0);
+        finalize_chacha20_poly1305_direct(ctx, tag, tag_len,
+                                          IMB_ARCH_SSE, 1, 0);
 }
 
 void finalize_chacha20_poly1305_avx(struct chacha20_poly1305_context_data *ctx,
                                     void *tag, const uint64_t tag_len)
 {
-        finalize_chacha20_poly1305_direct(ctx, tag, tag_len, IMB_ARCH_AVX, 1, 0);
+        finalize_chacha20_poly1305_direct(ctx, tag, tag_len,
+                                          IMB_ARCH_AVX, 1, 0);
 }
 
 void finalize_chacha20_poly1305_avx2(struct chacha20_poly1305_context_data *ctx,
                                          void *tag, const uint64_t tag_len)
 {
-        finalize_chacha20_poly1305_direct(ctx, tag, tag_len, IMB_ARCH_AVX2, 1, 0);
+        finalize_chacha20_poly1305_direct(ctx, tag, tag_len,
+                                          IMB_ARCH_AVX2, 1, 0);
 }
 
 #ifdef AVX_IFMA
-void finalize_chacha20_poly1305_fma_avx2(struct chacha20_poly1305_context_data *ctx,
+void finalize_chacha20_poly1305_fma_avx2(struct
+                                         chacha20_poly1305_context_data *ctx,
                                          void *tag, const uint64_t tag_len)
 {
-        finalize_chacha20_poly1305_direct(ctx, tag, tag_len, IMB_ARCH_AVX2, 1, 1);
+        finalize_chacha20_poly1305_direct(ctx, tag, tag_len,
+                                          IMB_ARCH_AVX2, 1, 1);
 }
 #endif
 
diff --git a/lib/x86_64/cpu_feature.c b/lib/x86_64/cpu_feature.c
index 19c11814..cd54ae6f 100644
--- a/lib/x86_64/cpu_feature.c
+++ b/lib/x86_64/cpu_feature.c
@@ -48,7 +48,9 @@ static struct cpuid_regs cpuid_7_1;
  *    [in] subleaf - CPUID sub-leaf number (ECX)
  *    [out] out    - registers structure to store results of CPUID into
  */
-void mbcpuid(const unsigned leaf, const unsigned subleaf, struct cpuid_regs *out);
+void mbcpuid(const unsigned leaf,
+             const unsigned subleaf,
+             struct cpuid_regs *out);
 
 static uint32_t detect_shani(void)
 {
diff --git a/lib/x86_64/hmac_ipad_opad.c b/lib/x86_64/hmac_ipad_opad.c
index c47d2a99..88ef3c60 100644
--- a/lib/x86_64/hmac_ipad_opad.c
+++ b/lib/x86_64/hmac_ipad_opad.c
@@ -78,7 +78,10 @@ imb_hmac_ipad_opad(struct IMB_MGR *mb_mgr, const IMB_HASH_ALG sha_type,
                 if (key_len <= IMB_MD5_BLOCK_SIZE)
                         local_key_len = key_len;
                 else {
-                        /* Key lengths longer than MD5 block size not supported */
+                        /**
+                         * Key lengths longer than MD5 block
+                         * size not supported
+                         */
                         imb_set_errno(NULL, IMB_ERR_KEY_LEN);
                         return;
                 }
diff --git a/lib/x86_64/mb_mgr_auto.c b/lib/x86_64/mb_mgr_auto.c
index 60e11dc4..b623ca92 100644
--- a/lib/x86_64/mb_mgr_auto.c
+++ b/lib/x86_64/mb_mgr_auto.c
@@ -74,7 +74,8 @@ init_mb_mgr_auto(IMB_MGR *state, IMB_ARCH *arch)
         }
 
 #ifdef AESNI_EMU
-        if ((state->features & IMB_CPUFLAGS_NO_AESNI) == IMB_CPUFLAGS_NO_AESNI) {
+        if ((state->features & IMB_CPUFLAGS_NO_AESNI)
+            == IMB_CPUFLAGS_NO_AESNI) {
                 init_mb_mgr_sse_no_aesni(state);
                 arch_detected = IMB_ARCH_NOAESNI;
                 goto init_mb_mgr_auto_ret;
diff --git a/lib/x86_64/ooo_mgr_reset.c b/lib/x86_64/ooo_mgr_reset.c
index 8889a9a3..32cc132c 100644
--- a/lib/x86_64/ooo_mgr_reset.c
+++ b/lib/x86_64/ooo_mgr_reset.c
@@ -104,7 +104,7 @@ void ooo_mgr_aes_xcbc_reset(void *p_ooo_mgr, const unsigned num_lanes)
 {
         MB_MGR_AES_XCBC_OOO *p_mgr = (MB_MGR_AES_XCBC_OOO *) p_ooo_mgr;
         unsigned i;
-        
+
         memset(p_mgr, 0, offsetof(MB_MGR_AES_XCBC_OOO,road_block));
         memset(p_mgr->lens, 0xff, sizeof(p_mgr->lens));
 
@@ -124,7 +124,7 @@ void ooo_mgr_hmac_sha1_reset(void *p_ooo_mgr, const unsigned num_lanes)
 {
         MB_MGR_HMAC_SHA_1_OOO *p_mgr = (MB_MGR_HMAC_SHA_1_OOO *) p_ooo_mgr;
         unsigned i;
-        
+
         memset(p_mgr, 0, offsetof(MB_MGR_HMAC_SHA_1_OOO,road_block));
         memset(p_mgr->lens, 0xff, sizeof(p_mgr->lens));
 
@@ -154,7 +154,7 @@ void ooo_mgr_hmac_sha224_reset(void *p_ooo_mgr, const unsigned num_lanes)
 {
         MB_MGR_HMAC_SHA_256_OOO *p_mgr = (MB_MGR_HMAC_SHA_256_OOO *) p_ooo_mgr;
         unsigned i;
-        
+
         memset(p_mgr, 0, offsetof(MB_MGR_HMAC_SHA_256_OOO,road_block));
         memset(p_mgr->lens, 0xff, sizeof(p_mgr->lens));
 
@@ -184,7 +184,7 @@ void ooo_mgr_hmac_sha256_reset(void *p_ooo_mgr, const unsigned num_lanes)
 {
         MB_MGR_HMAC_SHA_256_OOO *p_mgr = (MB_MGR_HMAC_SHA_256_OOO *) p_ooo_mgr;
         unsigned i;
-        
+
         memset(p_mgr, 0, offsetof(MB_MGR_HMAC_SHA_256_OOO,road_block));
         memset(p_mgr->lens, 0xff, sizeof(p_mgr->lens));
 
@@ -214,7 +214,7 @@ void ooo_mgr_hmac_sha384_reset(void *p_ooo_mgr, const unsigned num_lanes)
 {
         MB_MGR_HMAC_SHA_512_OOO *p_mgr = (MB_MGR_HMAC_SHA_512_OOO *) p_ooo_mgr;
         unsigned i;
-        
+
         memset(p_mgr, 0, offsetof(MB_MGR_HMAC_SHA_512_OOO,road_block));
         memset(p_mgr->lens, 0xff, sizeof(p_mgr->lens));
 
@@ -250,7 +250,7 @@ void ooo_mgr_hmac_sha512_reset(void *p_ooo_mgr, const unsigned num_lanes)
 {
         MB_MGR_HMAC_SHA_512_OOO *p_mgr = (MB_MGR_HMAC_SHA_512_OOO *) p_ooo_mgr;
         unsigned i;
-        
+
         memset(p_mgr, 0, offsetof(MB_MGR_HMAC_SHA_512_OOO,road_block));
         memset(p_mgr->lens, 0xff, sizeof(p_mgr->lens));
 
@@ -286,7 +286,7 @@ void ooo_mgr_hmac_md5_reset(void *p_ooo_mgr, const unsigned num_lanes)
 {
         MB_MGR_HMAC_MD5_OOO *p_mgr = (MB_MGR_HMAC_MD5_OOO *) p_ooo_mgr;
         unsigned i;
-        
+
         memset(p_mgr, 0, offsetof(MB_MGR_HMAC_MD5_OOO,road_block));
         memset(p_mgr->lens, 0xff, sizeof(p_mgr->lens));
 
@@ -310,7 +310,7 @@ IMB_DLL_LOCAL
 void ooo_mgr_zuc_reset(void *p_ooo_mgr, const unsigned num_lanes)
 {
         MB_MGR_ZUC_OOO *p_mgr = (MB_MGR_ZUC_OOO *) p_ooo_mgr;
-        
+
         memset(p_mgr, 0, offsetof(MB_MGR_ZUC_OOO,road_block));
         memset(p_mgr->lens, 0xff, sizeof(p_mgr->lens));
 
@@ -330,7 +330,7 @@ IMB_DLL_LOCAL
 void ooo_mgr_sha1_reset(void *p_ooo_mgr, const unsigned num_lanes)
 {
         MB_MGR_SHA_1_OOO *p_mgr = (MB_MGR_SHA_1_OOO *) p_ooo_mgr;
-        
+
         memset(p_mgr, 0, offsetof(MB_MGR_SHA_1_OOO,road_block));
 
         if (num_lanes == 2)
@@ -379,7 +379,7 @@ IMB_DLL_LOCAL
 void ooo_mgr_des_reset(void *p_ooo_mgr, const unsigned num_lanes)
 {
         MB_MGR_DES_OOO *p_mgr = (MB_MGR_DES_OOO *) p_ooo_mgr;
-        
+
         memset(p_mgr, 0, offsetof(MB_MGR_DES_OOO,road_block));
 
         if (num_lanes == 16)
diff --git a/lib/x86_64/quic_aes_gcm.c b/lib/x86_64/quic_aes_gcm.c
index 5e7c6dbd..c9f5c30f 100644
--- a/lib/x86_64/quic_aes_gcm.c
+++ b/lib/x86_64/quic_aes_gcm.c
@@ -43,8 +43,11 @@ imb_quic_aes_gcm(IMB_MGR *state,
                  const uint64_t tag_len,
                  const uint64_t num_packets)
 {
-	/* @note 12 byte IV is assumed */
-	/* @note it can be out of place operation but AAD needs to be copied by the caller */
+        /**
+         * @note 12 byte IV is assumed
+         * @note it can be out of place operation
+         * but AAD needs to be copied by the caller
+         */
 	struct gcm_context_data ctx;
 	uint64_t n;
 
diff --git a/lib/x86_64/self_test.c b/lib/x86_64/self_test.c
index 3d00889d..2b270ce8 100644
--- a/lib/x86_64/self_test.c
+++ b/lib/x86_64/self_test.c
@@ -47,7 +47,7 @@ static int process_job(IMB_MGR *p_mgr)
 
                 /* flush to get the job processed */
                 job = IMB_FLUSH_JOB(p_mgr);
-                
+
                 /* if flush returns nothing then it's an error */
                 if (!job)
                         return 0;
@@ -498,7 +498,7 @@ static int self_test_ciphers(IMB_MGR *p_mgr)
                 /* check for plain text mismatch */
                 if (memcmp(scratch, v->plain_text, v->plain_text_size))
                         return 0;
-                
+
         } /* for(cipher_vectors) */
 
         return 1;
@@ -940,13 +940,15 @@ static int self_test_hash(IMB_MGR *p_mgr)
                 if (v->hash_mode >= IMB_AUTH_HMAC_SHA_1 &&
                     v->hash_mode <= IMB_AUTH_HMAC_SHA_512) {
                         imb_hmac_ipad_opad(p_mgr, v->hash_mode, v->hash_key,
-                                           v->hash_key_size, hmac_ipad, hmac_opad);
+                                           v->hash_key_size,
+                                           hmac_ipad, hmac_opad);
                         job->u.HMAC._hashed_auth_key_xor_ipad = hmac_ipad;
                         job->u.HMAC._hashed_auth_key_xor_opad = hmac_opad;
                 }
                 if (v->hash_mode == IMB_AUTH_AES_CMAC) {
                         IMB_AES_KEYEXP_128(p_mgr, v->hash_key, expkey, dust);
-                        IMB_AES_CMAC_SUBKEY_GEN_128(p_mgr, expkey, skey1, skey2);
+                        IMB_AES_CMAC_SUBKEY_GEN_128(p_mgr, expkey,
+                                                    skey1, skey2);
                         job->u.CMAC._key_expanded = expkey;
                         job->u.CMAC._skey1 = skey1;
                         job->u.CMAC._skey2 = skey2;
@@ -954,7 +956,8 @@ static int self_test_hash(IMB_MGR *p_mgr)
 
                 if (v->hash_mode == IMB_AUTH_AES_CMAC_256) {
                         IMB_AES_KEYEXP_256(p_mgr, v->hash_key, expkey, dust);
-                        IMB_AES_CMAC_SUBKEY_GEN_256(p_mgr, expkey, skey1, skey2);
+                        IMB_AES_CMAC_SUBKEY_GEN_256(p_mgr, expkey,
+                                                    skey1, skey2);
                         job->u.CMAC._key_expanded = expkey;
                         job->u.CMAC._skey1 = skey1;
                         job->u.CMAC._skey2 = skey2;
@@ -966,7 +969,7 @@ static int self_test_hash(IMB_MGR *p_mgr)
                         job->u.GMAC._iv = v->hash_iv;
                         job->u.GMAC.iv_len_in_bytes = v->hash_iv_size;
                 }
-                
+
                 if (v->hash_mode == IMB_AUTH_AES_GMAC_192) {
                         IMB_AES192_GCM_PRE(p_mgr, v->hash_key, &gmac_key);
                         job->u.GMAC._key = &gmac_key;
diff --git a/lib/x86_64/snow3g_iv.c b/lib/x86_64/snow3g_iv.c
index 0db18bf5..aac9190b 100644
--- a/lib/x86_64/snow3g_iv.c
+++ b/lib/x86_64/snow3g_iv.c
@@ -83,10 +83,12 @@ snow3g_f9_iv_gen(const uint32_t count, const uint32_t fresh,
          */
         /* IV[3] = FRESH ^ (DIRECTION[0] << 17) */
         const uint32_t dir_b15 = dir ? (1UL << 15) : 0;
-        iv32[3] = bswap4(fresh ^ dir_b15);
 
         /* IV[2] = DIRECTION[0] ^ COUNT[0-31] */
         const uint32_t dir_b31 = dir ? (1UL << 31) : 0;
+
+        iv32[3] = bswap4(fresh ^ dir_b15);
+
         iv32[2] = bswap4(count ^ dir_b31);
 
         /* IV[1] = FRESH */
-- 
GitLab


From d2adc0b0686773050a6e3c7fe5fd9c1de965fe5c Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Fri, 26 May 2023 14:41:53 +0100
Subject: [PATCH 308/332] doc: modify SECURITY.md to cover newest versions

---
 SECURITY.md | 16 +++++++++-------
 1 file changed, 9 insertions(+), 7 deletions(-)

diff --git a/SECURITY.md b/SECURITY.md
index d117b210..2b5b6921 100644
--- a/SECURITY.md
+++ b/SECURITY.md
@@ -4,12 +4,14 @@
 
 Versions of the library that are currently being supported with security updates.
 
-| Version | Supported          |
-| ------- | ------------------ |
-| 0.53    | :white_check_mark: |
-| 0.52    | :x:                |
-| 0.51    | :white_check_mark: |
-| < 0.51  | :x:                |
+| Version | Supported          | Frameworks using this version       |
+| ------- | ------------------ | ----------------------------------- |
+| 1.4     | :white_check_mark: | DPDK 23.07                          |
+| 1.3     | :white_check_mark: | DPDK 22.11, OpenSSL QAT Engine, VPP |
+| 1.2     | :x:                | -                                   |
+| 1.1     | :x:                | -                                   |
+| 1.0     | :white_check_mark: | DPDK 21.11                          |
+| < 1.0   | :x:                | -                                   |
 
 ## Reporting a Vulnerability
 
@@ -20,6 +22,6 @@ Timeline for providing an update depends on development complexity.
 
 ## Security Considerations & Options for Increased Security
 
-Please refer to [Section of README](https://github.com/intel/intel-ipsec-mb#6-security-considerations--options-for-increased-security) for the details on this topic.
+Please refer to [Section of README](https://github.com/intel/intel-ipsec-mb#7-security-considerations--options-for-increased-security) for the details on this topic.
 
 
-- 
GitLab


From f80350f748d959827e967860b4b566b859eca95a Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Mon, 29 May 2023 11:56:49 +0100
Subject: [PATCH 309/332] avx2: [POLY1305] remove unused macro

---
 lib/avx2_t3/poly_fma_avx2.asm | 103 ++--------------------------------
 1 file changed, 5 insertions(+), 98 deletions(-)

diff --git a/lib/avx2_t3/poly_fma_avx2.asm b/lib/avx2_t3/poly_fma_avx2.asm
index 9fdebb2f..cc9f84f2 100644
--- a/lib/avx2_t3/poly_fma_avx2.asm
+++ b/lib/avx2_t3/poly_fma_avx2.asm
@@ -264,99 +264,6 @@ mksection .text
         adc     DWORD(%%A2), 0
 %endmacro
 
-;; =============================================================================
-;; =============================================================================
-;; Computes hash for 4 16-byte message blocks,
-;; and adds new message blocks to accumulator.
-;;
-;; It first multiplies all 4 blocks with powers of R:
-;;
-;;      a2      a1      a0
-;; ×    b2      b1      b0
-;; ---------------------------------------
-;;     a2×b0   a1×b0   a0×b0
-;; +   a1×b1   a0×b1 5×a2×b1
-;; +   a0×b2 5×a2×b2 5×a1×b2
-;; ---------------------------------------
-;;        p2      p1      p0
-;;
-;; Then, it propagates the carry (higher bits after bit 43) from lower limbs into higher limbs,
-;; multiplying by 5 in case of the carry of p2.
-;;
-%macro POLY1305_MUL_REDUCE_VEC 15
-%define %%A0      %1  ; [in/out] YMM register containing 1st 44-bit limb of the 4 blocks
-%define %%A1      %2  ; [in/out] YMM register containing 2nd 44-bit limb of the 4 blocks
-%define %%A2      %3  ; [in/out] YMM register containing 3rd 44-bit limb of the 4 blocks
-%define %%R0      %4  ; [in] YMM register (R0) to include the 1st limb of R
-%define %%R1      %5  ; [in] YMM register (R1) to include the 2nd limb of R
-%define %%R2      %6  ; [in] YMM register (R2) to include the 3rd limb of R
-%define %%R1P     %7  ; [in] YMM register (R1') to include the 2nd limb of R (multiplied by 5)
-%define %%R2P     %8  ; [in] YMM register (R2') to include the 3rd limb of R (multiplied by 5)
-%define %%P0_L    %9  ; [clobbered] YMM register to contain p[0] of the 4 blocks
-%define %%P0_H    %10 ; [clobbered] YMM register to contain p[0] of the 4 blocks
-%define %%P1_L    %11 ; [clobbered] YMM register to contain p[1] of the 4 blocks
-%define %%P1_H    %12 ; [clobbered] YMM register to contain p[1] of the 4 blocks
-%define %%P2_L    %13 ; [clobbered] YMM register to contain p[2] of the 4 blocks
-%define %%P2_H    %14 ; [clobbered] YMM register to contain p[2] of the 4 blocks
-%define %%YTMP1   %15 ; [clobbered] Temporary YMM register
-
-        ;; Reset accumulator
-        vpxor   %%P0_L, %%P0_L
-        vpxor   %%P0_H, %%P0_H
-        vpxor   %%P1_L, %%P1_L
-        vpxor   %%P1_H, %%P1_H
-        vpxor   %%P2_L, %%P2_L
-        vpxor   %%P2_H, %%P2_H
-
-        ; Reset accumulator and calculate products
-        vpmadd52luq %%P0_L, %%A2, %%R1P
-        vpmadd52huq %%P0_H, %%A2, %%R1P
-        vpmadd52luq %%P1_L, %%A2, %%R2P
-        vpmadd52huq %%P1_H, %%A2, %%R2P
-        vpmadd52luq %%P2_L, %%A2, %%R0
-        vpmadd52huq %%P2_H, %%A2, %%R0
-
-        vpmadd52luq %%P1_L, %%A0, %%R1
-        vpmadd52huq %%P1_H, %%A0, %%R1
-        vpmadd52luq %%P2_L, %%A0, %%R2
-        vpmadd52huq %%P2_H, %%A0, %%R2
-        vpmadd52luq %%P0_L, %%A0, %%R0
-        vpmadd52huq %%P0_H, %%A0, %%R0
-
-        vpmadd52luq %%P0_L, %%A1, %%R2P
-        vpmadd52huq %%P0_H, %%A1, %%R2P
-        vpmadd52luq %%P1_L, %%A1, %%R0
-        vpmadd52huq %%P1_H, %%A1, %%R0
-        vpmadd52luq %%P2_L, %%A1, %%R1
-        vpmadd52huq %%P2_H, %%A1, %%R1
-
-        ; Carry propagation (first pass)
-        vpsrlq  %%YTMP1, %%P0_L, 44
-        vpand   %%A0, %%P0_L, [rel mask_44] ; Clear top 20 bits
-        vpsllq  %%P0_H, 8
-        vpaddq  %%P0_H, %%YTMP1
-        vpaddq  %%P1_L, %%P0_H
-        vpand   %%A1, %%P1_L, [rel mask_44] ; Clear top 20 bits
-        vpsrlq  %%YTMP1, %%P1_L, 44
-        vpsllq  %%P1_H, 8
-        vpaddq  %%P1_H, %%YTMP1
-        vpaddq  %%P2_L, %%P1_H
-        vpand   %%A2, %%P2_L, [rel mask_42] ; Clear top 22 bits
-        vpsrlq  %%YTMP1, %%P2_L, 42
-        vpsllq  %%P2_H, 10
-        vpaddq  %%P2_H, %%YTMP1
-
-        ; Carry propagation (second pass)
-
-        ; Multiply by 5 the highest bits (above 130 bits)
-        vpaddq  %%A0, %%P2_H
-        vpsllq  %%P2_H, 2
-        vpaddq  %%A0, %%P2_H
-        vpsrlq  %%YTMP1, %%A0, 44
-        vpand   %%A0, [rel mask_44]
-        vpaddq  %%A1, %%YTMP1
-%endmacro
-
 ;; =============================================================================
 ;; =============================================================================
 ;; Computes hash for 4 16-byte message blocks,
@@ -522,11 +429,11 @@ mksection .text
 %define %%A0      %1  ; [in/out] YMM register containing 1st 44-bit limb of the 4 blocks
 %define %%A1      %2  ; [in/out] YMM register containing 2nd 44-bit limb of the 4 blocks
 %define %%A2      %3  ; [in/out] YMM register containing 3rd 44-bit limb of the 4 blocks
-%define %%R0      %4  ; [in] YMM register (R0) to include the 1st limb in IDX
-%define %%R1      %5  ; [in] YMM register (R1) to include the 2nd limb in IDX
-%define %%R2      %6  ; [in] YMM register (R2) to include the 3rd limb in IDX
-%define %%R1P     %7  ; [in] YMM register (R1') to include the 2nd limb (multiplied by 5) in IDX
-%define %%R2P     %8  ; [in] YMM register (R2') to include the 3rd limb (multiplied by 5) in IDX
+%define %%R0      %4  ; [in] YMM register/memory (R0) to include the 1st limb of R
+%define %%R1      %5  ; [in] YMM register/memory (R1) to include the 2nd limb of R
+%define %%R2      %6  ; [in] YMM register/memory (R2) to include the 3rd limb of R
+%define %%R1P     %7  ; [in] YMM register/memory (R1') to include the 2nd limb of R (multiplied by 5)
+%define %%R2P     %8  ; [in] YMM register/memory (R2') to include the 3rd limb of R (multiplied by 5)
 %define %%P0_L    %9  ; [clobbered] YMM register to contain p[0] of the 4 blocks
 %define %%P0_H    %10 ; [clobbered] YMM register to contain p[0] of the 4 blocks
 %define %%P1_L    %11 ; [clobbered] YMM register to contain p[1] of the 4 blocks
-- 
GitLab


From acd1aec0dd37bb2bcfa8d59a487a5aa316e8b403 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Mon, 29 May 2023 11:57:41 +0100
Subject: [PATCH 310/332] avx512: [POLY1305] fix wrong comment

---
 lib/avx512_t2/poly_fma_avx512.asm | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/lib/avx512_t2/poly_fma_avx512.asm b/lib/avx512_t2/poly_fma_avx512.asm
index db7b46eb..d4a1e3dc 100644
--- a/lib/avx512_t2/poly_fma_avx512.asm
+++ b/lib/avx512_t2/poly_fma_avx512.asm
@@ -666,16 +666,16 @@ mksection .text
 %define %%B0      %4  ; [in/out] ZMM register containing 1st 44-bit limb of the 8 blocks
 %define %%B1      %5  ; [in/out] ZMM register containing 2nd 44-bit limb of the 8 blocks
 %define %%B2      %6  ; [in/out] ZMM register containing 3rd 44-bit limb of the 8 blocks
-%define %%R0      %7  ; [in] ZMM register (R0) to include the 1st limb in IDX
-%define %%R1      %8  ; [in] ZMM register (R1) to include the 2nd limb in IDX
-%define %%R2      %9  ; [in] ZMM register (R2) to include the 3rd limb in IDX
-%define %%R1P     %10 ; [in] ZMM register (R1') to include the 2nd limb (multiplied by 5) in IDX
-%define %%R2P     %11 ; [in] ZMM register (R2') to include the 3rd limb (multiplied by 5) in IDX
-%define %%S0      %12 ; [in] ZMM register (R0) to include the 1st limb in IDX
-%define %%S1      %13 ; [in] ZMM register (R1) to include the 2nd limb in IDX
-%define %%S2      %14 ; [in] ZMM register (R2) to include the 3rd limb in IDX
-%define %%S1P     %15 ; [in] ZMM register (R1') to include the 2nd limb (multiplied by 5) in IDX
-%define %%S2P     %16 ; [in] ZMM register (R2') to include the 3rd limb (multiplied by 5) in IDX
+%define %%R0      %7  ; [in] ZMM register (R0) to include the 1st limb in R
+%define %%R1      %8  ; [in] ZMM register (R1) to include the 2nd limb in R
+%define %%R2      %9  ; [in] ZMM register (R2) to include the 3rd limb in R
+%define %%R1P     %10 ; [in] ZMM register (R1') to include the 2nd limb (multiplied by 5) in R
+%define %%R2P     %11 ; [in] ZMM register (R2') to include the 3rd limb (multiplied by 5) in R
+%define %%S0      %12 ; [in] ZMM register (S0) to include the 1st limb in S
+%define %%S1      %13 ; [in] ZMM register (S1) to include the 2nd limb in S
+%define %%S2      %14 ; [in] ZMM register (S2) to include the 3rd limb in S
+%define %%S1P     %15 ; [in] ZMM register (S1') to include the 2nd limb (multiplied by 5) in S
+%define %%S2P     %16 ; [in] ZMM register (S2') to include the 3rd limb (multiplied by 5) in S
 %define %%P0_L    %17 ; [clobbered] ZMM register to contain p[0] of the 8 blocks
 %define %%P0_H    %18 ; [clobbered] ZMM register to contain p[0] of the 8 blocks
 %define %%P1_L    %19 ; [clobbered] ZMM register to contain p[1] of the 8 blocks
-- 
GitLab


From d7265d8c076cef7973e9b4a08de0eec482d829ad Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 30 May 2023 10:23:39 +0100
Subject: [PATCH 311/332] avx512: [GCM] remove duplicated macros

---
 lib/include/gcm_api_vaes_avx512.inc      |  2 +-
 lib/include/gcm_gmac_api_vaes_avx512.inc |  2 +-
 lib/include/gcm_keys_vaes_avx512.inc     |  2 --
 lib/include/gcm_vaes_avx512.inc          | 12 ++++++------
 4 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/lib/include/gcm_api_vaes_avx512.inc b/lib/include/gcm_api_vaes_avx512.inc
index 770756db..14378b10 100644
--- a/lib/include/gcm_api_vaes_avx512.inc
+++ b/lib/include/gcm_api_vaes_avx512.inc
@@ -78,7 +78,7 @@ FN_NAME(precomp,_):
         vpand    xmm2, xmm2, [rel POLY]
         vpxor    xmm6, xmm6, xmm2                       ; xmm6 holds the HashKey<<1 mod poly
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vmovdqu  [arg1 + HashKey], xmm6                 ; store HashKey<<1 mod poly
+        vmovdqu  [arg1 + HashKey_1], xmm6               ; store HashKey<<1 mod poly
 
         PRECOMPUTE arg1, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm7, xmm8
 
diff --git a/lib/include/gcm_gmac_api_vaes_avx512.inc b/lib/include/gcm_gmac_api_vaes_avx512.inc
index e0c63294..c8c23b1b 100644
--- a/lib/include/gcm_gmac_api_vaes_avx512.inc
+++ b/lib/include/gcm_gmac_api_vaes_avx512.inc
@@ -77,7 +77,7 @@ ghash_pre_vaes_avx512:
         vpand    xmm2, xmm2, [rel POLY]
         vpxor    xmm6, xmm6, xmm2                       ; xmm6 holds the HashKey<<1 mod poly
         ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-        vmovdqu  [arg2 + HashKey], xmm6                 ; store HashKey<<1 mod poly
+        vmovdqu  [arg2 + HashKey_1], xmm6                 ; store HashKey<<1 mod poly
 
         PRECOMPUTE arg2, xmm6, xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm7, xmm8
 %ifdef SAFE_DATA
diff --git a/lib/include/gcm_keys_vaes_avx512.inc b/lib/include/gcm_keys_vaes_avx512.inc
index 740333d7..84560774 100644
--- a/lib/include/gcm_keys_vaes_avx512.inc
+++ b/lib/include/gcm_keys_vaes_avx512.inc
@@ -66,7 +66,6 @@
 %xdefine HashKey_3      ((16 * 29) + HKeyStart) ; HashKey^3 <<1 mod poly
 %xdefine HashKey_2      ((16 * 30) + HKeyStart) ; HashKey^2 <<1 mod poly
 %xdefine HashKey_1      ((16 * 31) + HKeyStart) ; HashKey <<1 mod poly
-%xdefine HashKey        ((16 * 31) + HKeyStart) ; HashKey <<1 mod poly
 
 %xdefine HKeyGap (16 * 32)
 ;; (HashKey^n mode POLY) x POLY constants
@@ -103,6 +102,5 @@
 %xdefine HashKeyK_3     (HashKey_3 + HKeyGap)  ; (HashKey^3 <<1 mod poly) x POLY
 %xdefine HashKeyK_2     (HashKey_2 + HKeyGap)  ; (HashKey^2 <<1 mod poly) x POLY
 %xdefine HashKeyK_1     (HashKey_1 + HKeyGap)  ; (HashKey <<1 mod poly) x POLY
-%xdefine HashKeyK       (HashKey + HKeyGap)    ; (HashKey <<1 mod poly) x POLY
 
 %endif ; GCM_KEYS_VAES_AVX512_INCLUDED
diff --git a/lib/include/gcm_vaes_avx512.inc b/lib/include/gcm_vaes_avx512.inc
index a8791a43..a122c5b2 100644
--- a/lib/include/gcm_vaes_avx512.inc
+++ b/lib/include/gcm_vaes_avx512.inc
@@ -1171,8 +1171,8 @@
 
         ;; XTMP1 = my_ctx_data.partial_block_enc_key
         vmovdqu64       %%XTMP1, [%%GDATA_CTX + PBlockEncKey]
-        vmovdqu64       %%XTMP2, [%%GDATA_KEY + HashKey]
-        vmovdqu64       %%XTMP9, [%%GDATA_KEY + HashKey + HKeyGap]
+        vmovdqu64       %%XTMP2, [%%GDATA_KEY + HashKey_1]
+        vmovdqu64       %%XTMP9, [%%GDATA_KEY + HashKey_1 + HKeyGap]
 
         ;; adjust the shuffle mask pointer to be able to shift right %%LENGTH bytes
         ;; (16 - %%LENGTH) is the number of bytes in plaintext mod 16)
@@ -3678,8 +3678,8 @@
 
         ;; @note: xmm14 is hardcoded for hash input in singe_call case
 
-        vmovdqu         xmm13, [%%GDATA_KEY + HashKey]
-        vmovdqu         xmm6, [%%GDATA_KEY + HashKey + HKeyGap]
+        vmovdqu         xmm13, [%%GDATA_KEY + HashKey_1]
+        vmovdqu         xmm6, [%%GDATA_KEY + HashKey_1 + HKeyGap]
         ;; **xmm13 and xmm6 contain authentication key
 
         ;; Start AES as early as possible
@@ -3798,8 +3798,8 @@
         READ_SMALL_DATA_INPUT_LEN_BT16_AVX512   %%XTMP4, %%PLAIN_IN, %%PLAIN_LEN, \
                                                 %%IA0, %%IA1, %%MASKREG
 
-        vmovdqu64       %%XTMP2, [%%GDATA_KEY + HashKey]
-        vmovdqu64       %%XTMP7, [%%GDATA_KEY + HashKey + HKeyGap]
+        vmovdqu64       %%XTMP2, [%%GDATA_KEY + HashKey_1]
+        vmovdqu64       %%XTMP7, [%%GDATA_KEY + HashKey_1 + HKeyGap]
 
         ;; adjust the shuffle mask pointer to be able to shift right %%LENGTH bytes
         ;; (16 - %%LENGTH) is the number of bytes in plaintext mod 16)
-- 
GitLab


From b60e2f55ca303fe33c0bf0ea253ddc87de3ac256 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 30 May 2023 10:28:30 +0100
Subject: [PATCH 312/332] avx512: [GCM] reorder parameters to have following
 TLL-TLH-THL-THH order

---
 lib/include/gcm_vaes_avx512.inc | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/lib/include/gcm_vaes_avx512.inc b/lib/include/gcm_vaes_avx512.inc
index a122c5b2..02e6c536 100644
--- a/lib/include/gcm_vaes_avx512.inc
+++ b/lib/include/gcm_vaes_avx512.inc
@@ -1687,17 +1687,17 @@
 %define %%B08_11                %14 ; [clobbered] temporary ZMM
 %define %%B12_15                %15 ; [clobbered] temporary ZMM
 %define %%GHKEY3                %16 ; [clobbered] temporary ZMM
-%define %%THL1                  %17 ; [clobbered] temporary ZMM
-%define %%TLH1                  %18 ; [clobbered] temporary ZMM
-%define %%TLL1                  %19 ; [clobbered] temporary ZMM
-%define %%THH2                  %20 ; [clobbered] temporary ZMM
-%define %%THL2                  %21 ; [clobbered] temporary ZMM
-%define %%TLH2                  %22 ; [clobbered] temporary ZMM
-%define %%TLL2                  %23 ; [clobbered] temporary ZMM
-%define %%THH3                  %24 ; [clobbered] temporary ZMM
+%define %%TLL1                  %17 ; [clobbered] temporary ZMM
+%define %%TLL2                  %18 ; [clobbered] temporary ZMM
+%define %%TLL3                  %19 ; [clobbered] temporary ZMM
+%define %%TLH1                  %20 ; [clobbered] temporary ZMM
+%define %%TLH2                  %21 ; [clobbered] temporary ZMM
+%define %%TLH3                  %22 ; [clobbered] temporary ZMM
+%define %%THL1                  %23 ; [clobbered] temporary ZMM
+%define %%THL2                  %24 ; [clobbered] temporary ZMM
 %define %%THL3                  %25 ; [clobbered] temporary ZMM
-%define %%TLH3                  %26 ; [clobbered] temporary ZMM
-%define %%TLL3                  %27 ; [clobbered] temporary ZMM
+%define %%THH2                  %26 ; [clobbered] temporary ZMM
+%define %%THH3                  %27 ; [clobbered] temporary ZMM
 %define %%AESKEY1               %28 ; [clobbered**] temporary ZMM
 %define %%AESKEY2               %29 ; [clobbered**] temporary ZMM
 %define %%GHKEY1                %30 ; [clobbered] temporary ZMM
-- 
GitLab


From 405c0d7a98c00654a73079b88438c1ad4a0d2704 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 31 May 2023 13:58:30 +0100
Subject: [PATCH 313/332] test: create README.md in test directory

---
 test/README.md | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)
 create mode 100644 test/README.md

diff --git a/test/README.md b/test/README.md
new file mode 100644
index 00000000..9fe9f9fd
--- /dev/null
+++ b/test/README.md
@@ -0,0 +1,24 @@
+# Intel(R) Multi-Buffer Crypto for IPsec Library - Test Applications
+
+## Contents
+
+- Overview
+- Library installation
+
+## Overview
+
+The test directory contains multiple applications for testing the Intel(R) Multi-Buffer Crypto for IPsec Library.
+Applications perform various types of testing such as Known Answer Tests (KAT), API input validation, fuzz testing and more.
+Test application usage is documented in their README files, and assume the library installed.
+For instructions to install the library, see the Library Installation section below.
+
+## Library Installation
+
+### Linux
+- Use standard OS installer to install the "intel-ipsec-mb" package (`apt`, `dnf` etc.)
+- Alternatively, install the library from source by following the instructions in the [README](https://github.com/intel/intel-ipsec-mb/#8-installation)
+
+
+### Windows
+- Install the library from source following the instructions in the [README](https://github.com/intel/intel-ipsec-mb\#8-installation)
+
-- 
GitLab


From 395fd3ea07f2c7c66d1711f57b6652ef7286f272 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 31 May 2023 15:35:27 +0100
Subject: [PATCH 314/332] kat-app: update README.md

kat-app: improve README.md format
---
 test/kat-app/README.md | 36 ++++++++++++++++++++++++++++++------
 1 file changed, 30 insertions(+), 6 deletions(-)

diff --git a/test/kat-app/README.md b/test/kat-app/README.md
index 6d1232a3..c0be7ec6 100644
--- a/test/kat-app/README.md
+++ b/test/kat-app/README.md
@@ -9,13 +9,37 @@
 ## Overview
 
 The KAT application validates correct algorithm implementations by passing
-predefined inputs to the library API and verifying the generated output
-against a known correct result.
-
+predefined inputs to the library API and verifying the generated output against a
+known correct result. By default, the application will test all algorithms across all
+architectures e.g. SSE, AVX, AVX2, AVX512 and prints overall test result "PASS" or "FAIL".
 
 ## Usage
 
-Usage:
-    `./imb-kat --help`   This option will display extensive help page.
-    Please refer to "--help" option for usage details
+Before running the application, ensure the library is installed by following the instructions
+in the [README](https://github.com/intel/intel-ipsec-mb/tree/main/test#library-installation).
+
+### Linux
+To test all algorithms across all architectures:  
+`./imb-kat`  
+
+To test all algorithms on SSE architecture only:  
+`./imb-kat --no-avx --no-avx2 --no-avx512`  
+
+To test AES-GCM on AVX512 architecture only:  
+`./imb-kat --no-sse --no-avx --no-avx2 --test-type GCM`  
+
+To display an extensive help page:  
+`./imb-kat --help`   
+
+### Windows
+To test all algorithms across all architectures:  
+`imb-kat.exe`  
+
+To test all algorithms on SSE architecture only:  
+`imb-kat.exe --no-avx --no-avx2 --no-avx512`  
+
+To test AES-GCM on AVX512 architecture only:  
+`imb-kat.exe --no-sse --no-avx --no-avx2 --test-type GCM`  
 
+To display an extensive help page:  
+`imb-kat.exe --help`   
-- 
GitLab


From ec466dfe6ee2b9a9413b7bac0fdaa731a57e5a92 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 31 May 2023 16:49:19 +0100
Subject: [PATCH 315/332] xvalid-app: update README.md

---
 test/xvalid-app/README.md | 54 ++++++++++++++++++++++++++++++++++-----
 1 file changed, 48 insertions(+), 6 deletions(-)

diff --git a/test/xvalid-app/README.md b/test/xvalid-app/README.md
index f1998f8d..644e913d 100644
--- a/test/xvalid-app/README.md
+++ b/test/xvalid-app/README.md
@@ -8,13 +8,55 @@
 
 ## Overview
 
-The cross validation application validates correct algorithm implementations by
-passing randomly generated inputs to various implementations and comparing all
-generated outputs.
+The cross validation application validates correct algorithm implementation by encrypting
+randomly generated data with one architectural implementation and decrypting with another.
+The decrypted data is verified by comparing against the original. By default, the
+tool will cross validate all algorithms across all combinations of architectures.
+
+For release builds of the library with the SAFE_DATA option enabled (default setting),
+the cross validation application can be used to check all sensitive data has been cleared
+from processor registers and memory.
+
 
 ## Usage
 
-Usage:
-    `./imb-xvalid --help`   This option will display extensive help page.
-    Please refer to "--help" option for usage details
+Before running the application, ensure the library is installed by following the instructions
+in the [README](https://github.com/intel/intel-ipsec-mb/tree/main/test#library-installation).
+
+### Linux
+To cross validate all algorithms across all architectures:  
+`./imb-xvalid`  
+
+To validate all SSE algorithm implementations against AVX512:  
+`./imb-xvalid --enc-arch SSE --dec-arch AVX512`  
+
+To validate AES-CBC-128 AVX algorithm implementation against SSE:  
+`./imb-xvalid --enc-arch AVX --dec-arch SSE --cipher-algo aes-cbc-128`  
+
+To validate AES-GCM-128 using only 512 byte buffers:  
+`./imb-xvalid --aead-algo aes-gcm-128 --job-size 512`  
+
+To check for sensitive data left in registers or memory:  
+`./imb-xvalid --safe-check` 
+
+To display an extensive help page:  
+`./imb-xvalid --help`   
+
+### Windows
+To cross validate all algorithms across all architectures:  
+`imb-xvalid.exe`  
+
+To validate all SSE algorithm implementations against AVX512:  
+`imb-xvalid.exe --enc-arch SSE --dec-arch AVX512`  
+
+To validate AES-CBC-128 AVX algorithm implementation against SSE:  
+`imb-xvalid.exe --enc-arch AVX --dec-arch SSE --cipher-algo aes-cbc-128`  
+
+To validate AES-GCM-128 using only 512 byte buffers:  
+`imb-xvalid.exe --aead-algo aes-gcm-128 --job-size 512`  
+
+To check for sensitive data left in registers or memory:  
+`imb-xvalid.exe --safe-check` 
 
+To display an extensive help page:  
+`imb-xvalid.exe --help`  
-- 
GitLab


From ca1f56b21e9da646d4ec0a37f42d909cbecdaa00 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 31 May 2023 17:10:33 +0100
Subject: [PATCH 316/332] fuzz-app: update README.md

---
 test/fuzz-app/README.md | 28 ++++++++++++++++++++--------
 1 file changed, 20 insertions(+), 8 deletions(-)

diff --git a/test/fuzz-app/README.md b/test/fuzz-app/README.md
index e4d452f3..99b229f9 100644
--- a/test/fuzz-app/README.md
+++ b/test/fuzz-app/README.md
@@ -9,11 +9,10 @@
 
 ## Overview
 
-The fuzz test applications aim to discover defects in the library by passing
-randomly generated data to the library API's. Currently there are two fuzzing
-applications:
-- imb-fuzz-direct-api: Targets direct API's
-- imb-fuzz-api: Targets job and burst API's
+The fuzz test applications aim to discover defects in the library by passing randomly
+generated data to the library API's. Currently there are two fuzzing applications, the
+`imb-fuzz-api` application targets job and burst API and `imb-fuzz-direct-api` targets
+the direct API.
 
 
 ## Dependencies
@@ -22,6 +21,19 @@ applications:
 
 ## Usage
 
-Usage:
-    `./imb-fuzz-api`
-    `./imb-fuzz-direct-api`
+Before running the application, ensure the library is installed by following the instructions
+in the [README](https://github.com/intel/intel-ipsec-mb/tree/main/test#library-installation).  
+**Note:** The library must be compiled with SAFE_PARAM option enabled (default setting).
+
+### Linux
+To fuzz the library job and burst API:  
+`./imb-fuzz-api`  
+
+To fuzz the library direct API:  
+`./imb-fuzz-direct-api`  
+
+To display an extensive help page for libfuzzer options:  
+`./imb-fuzz-api -help=1`   
+
+### Windows
+Not currently supported.
-- 
GitLab


From b15fdc9ffc1a9fd66a360722025d6e0d4b5e575a Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 31 May 2023 17:25:32 +0100
Subject: [PATCH 317/332] wycheproof-app: update README.md

---
 test/wycheproof-app/README.md | 29 +++++++++++++++++++++++++----
 1 file changed, 25 insertions(+), 4 deletions(-)

diff --git a/test/wycheproof-app/README.md b/test/wycheproof-app/README.md
index 81235f32..9a05c4ec 100644
--- a/test/wycheproof-app/README.md
+++ b/test/wycheproof-app/README.md
@@ -8,11 +8,32 @@
 
 ## Overview
 
-TBD
+The wycheproof test application verifies supported algorithm implementations against
+[Project Wycheproof](https://github.com/google/wycheproof) test vectors. Project Wycheproof
+provides a set of vectors to check for expected behaviors and detect known weaknesses for
+specific algorithms.
 
 ## Usage
 
-Usage:
-    `./imb-wycheproof --help`   This option will display extensive help page.
-    Please refer to "--help" option for usage details
+Before running the application, ensure the library is installed by following the instructions
+in the [README](https://github.com/intel/intel-ipsec-mb/tree/main/test#library-installation).
 
+### Linux
+To test all supported algorithms on all architectures:  
+`./imb-wycheproof`  
+
+To test all supported algorithms on AVX512 architecture only:  
+`./imb-wycheproof --avx512`  
+
+To display an extensive help page:  
+`./imb-wycheproof --help`   
+
+### Windows
+To test all supported algorithms on all architectures:  
+`imb-wycheproof.exe`  
+
+To test all supported algorithms on AVX512 architecture only:  
+`imb-wycheproof.exe --avx512`  
+
+To display an extensive help page:  
+`imb-wycheproof.exe --help`
-- 
GitLab


From 47d55d5d5ab9deb6f982f5ee6f4b85f1ec10e193 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Wed, 31 May 2023 21:15:37 +0100
Subject: [PATCH 318/332] acvp-app: update README.md

---
 test/acvp-app/README.md | 22 ++++++++++++++++++----
 1 file changed, 18 insertions(+), 4 deletions(-)

diff --git a/test/acvp-app/README.md b/test/acvp-app/README.md
index d194a7d9..b8cdeb89 100644
--- a/test/acvp-app/README.md
+++ b/test/acvp-app/README.md
@@ -8,12 +8,26 @@
 
 ## Overview
 
-TBD
+The [ACVP](https://pages.nist.gov/ACVP/draft-fussell-acvp-spec.html)
+(Automated Cryptographic Validation Protocol) test application performs
+validation of NIST-approved cryptographic algorithms as part of the
+[CAVP](https://csrc.nist.gov/projects/cryptographic-algorithm-validation-program)
+(Cryptographic Algorithm Validation Program).
 
 ## Usage
 
-Usage:
-    `./imb-acvp --help`   This option will display extensive help page.
-    Please refer to "--help" option for usage details
+Before running the application, ensure the library is installed by following the instructions
+in the [README](https://github.com/intel/intel-ipsec-mb/tree/main/test#library-installation).
 
+### Linux
+To perform AES-GCM validation:  
+`./imb-acvp --req AES-GCM-req.json --resp AES-GCM-resp.json`  
 
+To perform AES-GCM validation for AVX512 architecture only:  
+`./imb-acvp --req AES-GCM-req.json --resp AES-GCM-resp.json --arch AVX512`  
+
+To display an extensive help page:  
+`./imb-acvp --help` 
+
+### Windows
+Not currently supported.
-- 
GitLab


From 6bc371c6624b2ad61f17ca8a9527c69bd2e17a88 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Thu, 1 Jun 2023 17:13:37 +0100
Subject: [PATCH 319/332] test: add dependency link to README files

Co-authored-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
---
 test/README.md          | 2 +-
 test/acvp-app/README.md | 4 +++-
 test/fuzz-app/README.md | 2 +-
 3 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/test/README.md b/test/README.md
index 9fe9f9fd..4c8475fc 100644
--- a/test/README.md
+++ b/test/README.md
@@ -9,7 +9,7 @@
 
 The test directory contains multiple applications for testing the Intel(R) Multi-Buffer Crypto for IPsec Library.
 Applications perform various types of testing such as Known Answer Tests (KAT), API input validation, fuzz testing and more.
-Test application usage is documented in their README files, and assume the library installed.
+Test application usage is documented in their README files, and assume the library is installed.
 For instructions to install the library, see the Library Installation section below.
 
 ## Library Installation
diff --git a/test/acvp-app/README.md b/test/acvp-app/README.md
index b8cdeb89..7432c5a4 100644
--- a/test/acvp-app/README.md
+++ b/test/acvp-app/README.md
@@ -13,12 +13,14 @@ The [ACVP](https://pages.nist.gov/ACVP/draft-fussell-acvp-spec.html)
 validation of NIST-approved cryptographic algorithms as part of the
 [CAVP](https://csrc.nist.gov/projects/cryptographic-algorithm-validation-program)
 (Cryptographic Algorithm Validation Program).
+[libacvp](https://github.com/cisco/libacvp) is used as the client-side implementation [ACVP protocol](github.com/usnistgov/ACVP).
+See intel-ipsec-mb [README](https://github.com/intel/intel-ipsec-mb/blob/main/README.md#12-fips-compliance) for details about exercised algorithms and their parameters.
 
 ## Usage
 
 Before running the application, ensure the library is installed by following the instructions
 in the [README](https://github.com/intel/intel-ipsec-mb/tree/main/test#library-installation).
-
+Installation of [libacvp](https://github.com/cisco/libacvp) is also required. Please follow its build and install instructions.
 ### Linux
 To perform AES-GCM validation:  
 `./imb-acvp --req AES-GCM-req.json --resp AES-GCM-resp.json`  
diff --git a/test/fuzz-app/README.md b/test/fuzz-app/README.md
index 99b229f9..657fdb25 100644
--- a/test/fuzz-app/README.md
+++ b/test/fuzz-app/README.md
@@ -24,7 +24,7 @@ the direct API.
 Before running the application, ensure the library is installed by following the instructions
 in the [README](https://github.com/intel/intel-ipsec-mb/tree/main/test#library-installation).  
 **Note:** The library must be compiled with SAFE_PARAM option enabled (default setting).
-
+[CLANG/LLVM libFuzzer](https://llvm.org/docs/LibFuzzer.html) package is required for building and running the fuzz applications.
 ### Linux
 To fuzz the library job and burst API:  
 `./imb-fuzz-api`  
-- 
GitLab


From fe74f83361ee6d419238340aa05feae9291185b3 Mon Sep 17 00:00:00 2001
From: "Kania, Iwo" <iwo.kania@intel.com>
Date: Wed, 31 May 2023 09:45:20 +0100
Subject: [PATCH 320/332] test: [SHA] Unify test vectors

---
 test/kat-app/CMakeLists.txt  |   1 +
 test/kat-app/Makefile        |   3 +-
 test/kat-app/sha_test.c      | 435 ++++-------------------------------
 test/kat-app/sha_test.json.c | 184 +++++++++++++++
 test/kat-app/win_x64.mak     |   2 +-
 5 files changed, 229 insertions(+), 396 deletions(-)
 create mode 100644 test/kat-app/sha_test.json.c

diff --git a/test/kat-app/CMakeLists.txt b/test/kat-app/CMakeLists.txt
index 686c48b9..e3d15672 100644
--- a/test/kat-app/CMakeLists.txt
+++ b/test/kat-app/CMakeLists.txt
@@ -84,6 +84,7 @@ set(TEST_APP_SRC_FILES
   ${CMAKE_CURRENT_SOURCE_DIR}/poly1305_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/cmac_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/xcbc_test.json.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/sha_test.json.c
   ${CMAKE_CURRENT_SOURCE_DIR}/../common/utils.c
 )
 
diff --git a/test/kat-app/Makefile b/test/kat-app/Makefile
index 1df4d7e2..66367384 100644
--- a/test/kat-app/Makefile
+++ b/test/kat-app/Makefile
@@ -39,8 +39,7 @@ SOURCES := main.c gcm_test.c ctr_test.c customop_test.c des_test.c ccm_test.c \
 	chacha20_poly1305_test.c null_test.c snow_v_test.c direct_api_param_test.c quic_ecb_test.c \
 	hmac_sha1.json.c hmac_sha224.json.c hmac_sha256.json.c hmac_sha384.json.c hmac_sha512.json.c \
 	hmac_md5.json.c gmac_test.json.c ghash_test.c ghash_test.json.c poly1305_test.json.c \
-	cmac_test.json.c xcbc_test.json.c\
-	gmac_test.c
+	cmac_test.json.c xcbc_test.json.c sha_test.json.c gmac_test.c
 OBJECTS := $(SOURCES:%.c=%.o) utils.o
 
 # targets come here
diff --git a/test/kat-app/sha_test.c b/test/kat-app/sha_test.c
index 47e9bc1a..2146aee8 100644
--- a/test/kat-app/sha_test.c
+++ b/test/kat-app/sha_test.c
@@ -33,367 +33,14 @@
 #include <intel-ipsec-mb.h>
 #include "gcm_ctr_vectors_test.h"
 #include "utils.h"
+#include "mac_test.h"
 
 int sha_test(struct IMB_MGR *mb_mgr);
 
-/*
- * Test vectors come from this NIST document:
- *
- * https://csrc.nist.gov/csrc/media/projects/
- *     cryptographic-standards-and-guidelines/documents/examples/sha_all.pdf
- */
-static const char message1[] = "abc";
-#define message1_len 3
-
-static const char message2[] = "";
-#define message2_len 0
-
-static const char message3[] =
-        "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq";
-#define message3_len 56
-
-static const char message4[] =
-        "abcdefghbcdefghicdefghijdefghijkefghijklfghijklmghijklmnhijklmnoijklmn"
-        "opjklmnopqklmnopqrlmnopqrsmnopqrstnopqrstu";
-#define message4_len 112
-
-/* macro converts one 32-bit word into four 8-bit word */
-#define CONVERT_UINT32_TO_4xUINT8(v)                            \
-        (((v) >> 24) & 0xff), (((v) >> 16) & 0xff),             \
-                (((v) >> 8) & 0xff), (((v) >> 0) & 0xff)
-
-/* macro converts one 64-bit word into eight 8-bit word */
-#define CONVERT_UINT64_TO_8xUINT8(v)                            \
-        (((v) >> 56) & 0xff), (((v) >> 48) & 0xff),             \
-                (((v) >> 40) & 0xff), (((v) >> 32) & 0xff),     \
-                (((v) >> 24) & 0xff), (((v) >> 16) & 0xff),     \
-                (((v) >> 8) & 0xff), (((v) >> 0) & 0xff)
-
-static const char test_case1[] = "SHA-1 MSG1";
-#define data1 ((const uint8_t *)message1)
-#define data_len1 message1_len
-static const uint8_t digest1[] = {
-        /* a9993e36 4706816a ba3e2571 7850c26c 9cd0d89d */
-         CONVERT_UINT32_TO_4xUINT8(0xa9993e36),
-         CONVERT_UINT32_TO_4xUINT8(0x4706816a),
-         CONVERT_UINT32_TO_4xUINT8(0xba3e2571),
-         CONVERT_UINT32_TO_4xUINT8(0x7850c26c),
-         CONVERT_UINT32_TO_4xUINT8(0x9cd0d89d)
-};
-#define digest_len1 sizeof(digest1)
-
-static const char test_case2[] = "SHA-224 MSG1";
-#define data2 ((const uint8_t *)message1)
-#define data_len2 message1_len
-static const uint8_t digest2[] = {
-        /* 23097d22 3405d822 8642a477 bda255b3 */
-        /* 2aadbce4 bda0b3f7 e36c9da7 */
-        CONVERT_UINT32_TO_4xUINT8(0x23097d22),
-        CONVERT_UINT32_TO_4xUINT8(0x3405d822),
-        CONVERT_UINT32_TO_4xUINT8(0x8642a477),
-        CONVERT_UINT32_TO_4xUINT8(0xbda255b3),
-        CONVERT_UINT32_TO_4xUINT8(0x2aadbce4),
-        CONVERT_UINT32_TO_4xUINT8(0xbda0b3f7),
-        CONVERT_UINT32_TO_4xUINT8(0xe36c9da7)
-};
-#define digest_len2 sizeof(digest2)
-
-static const char test_case3[] = "SHA-256 MSG1";
-#define data3 ((const uint8_t *)message1)
-#define data_len3 message1_len
-static const uint8_t digest3[] = {
-        /* ba7816bf 8f01cfea 414140de 5dae2223 */
-        /* b00361a3 96177a9c b410ff61 f20015ad */
-        CONVERT_UINT32_TO_4xUINT8(0xba7816bf),
-        CONVERT_UINT32_TO_4xUINT8(0x8f01cfea),
-        CONVERT_UINT32_TO_4xUINT8(0x414140de),
-        CONVERT_UINT32_TO_4xUINT8(0x5dae2223),
-        CONVERT_UINT32_TO_4xUINT8(0xb00361a3),
-        CONVERT_UINT32_TO_4xUINT8(0x96177a9c),
-        CONVERT_UINT32_TO_4xUINT8(0xb410ff61),
-        CONVERT_UINT32_TO_4xUINT8(0xf20015ad)
-};
-#define digest_len3 sizeof(digest3)
-
-static const char test_case4[] = "SHA-384 MSG1";
-#define data4 ((const uint8_t *)message1)
-#define data_len4 message1_len
-static const uint8_t digest4[] = {
-        /* cb00753f45a35e8b b5a03d699ac65007 */
-        /* 272c32ab0eded163 1a8b605a43ff5bed */
-        /* 8086072ba1e7cc23 58baeca134c825a7 */
-        CONVERT_UINT64_TO_8xUINT8(0xcb00753f45a35e8b),
-        CONVERT_UINT64_TO_8xUINT8(0xb5a03d699ac65007),
-        CONVERT_UINT64_TO_8xUINT8(0x272c32ab0eded163),
-        CONVERT_UINT64_TO_8xUINT8(0x1a8b605a43ff5bed),
-        CONVERT_UINT64_TO_8xUINT8(0x8086072ba1e7cc23),
-        CONVERT_UINT64_TO_8xUINT8(0x58baeca134c825a7)
-};
-#define digest_len4 sizeof(digest4)
-
-static const char test_case5[] = "SHA-512 MSG1";
-#define data5 ((const uint8_t *)message1)
-#define data_len5 message1_len
-static const uint8_t digest5[] = {
-        /* ddaf35a193617aba cc417349ae204131 */
-        /* 12e6fa4e89a97ea2 0a9eeee64b55d39a */
-        /* 2192992a274fc1a8 36ba3c23a3feebbd */
-        /* 454d4423643ce80e 2a9ac94fa54ca49f */
-        CONVERT_UINT64_TO_8xUINT8(0xddaf35a193617aba),
-        CONVERT_UINT64_TO_8xUINT8(0xcc417349ae204131),
-        CONVERT_UINT64_TO_8xUINT8(0x12e6fa4e89a97ea2),
-        CONVERT_UINT64_TO_8xUINT8(0x0a9eeee64b55d39a),
-        CONVERT_UINT64_TO_8xUINT8(0x2192992a274fc1a8),
-        CONVERT_UINT64_TO_8xUINT8(0x36ba3c23a3feebbd),
-        CONVERT_UINT64_TO_8xUINT8(0x454d4423643ce80e),
-        CONVERT_UINT64_TO_8xUINT8(0x2a9ac94fa54ca49f)
-};
-#define digest_len5 sizeof(digest5)
-
-static const char test_case10[] = "SHA-1 MSG2";
-#define data10 ((const uint8_t *)message2)
-#define data_len10 message2_len
-static const uint8_t digest10[] = {
-        CONVERT_UINT32_TO_4xUINT8(0xda39a3ee),
-        CONVERT_UINT32_TO_4xUINT8(0x5e6b4b0d),
-        CONVERT_UINT32_TO_4xUINT8(0x3255bfef),
-        CONVERT_UINT32_TO_4xUINT8(0x95601890),
-        CONVERT_UINT32_TO_4xUINT8(0xafd80709)
-};
-#define digest_len10 sizeof(digest10)
-
-static const char test_case11[] = "SHA-224 MSG2";
-#define data11 ((const uint8_t *)message2)
-#define data_len11 message2_len
-static const uint8_t digest11[] = {
-        CONVERT_UINT32_TO_4xUINT8(0xd14a028c),
-        CONVERT_UINT32_TO_4xUINT8(0x2a3a2bc9),
-        CONVERT_UINT32_TO_4xUINT8(0x476102bb),
-        CONVERT_UINT32_TO_4xUINT8(0x288234c4),
-        CONVERT_UINT32_TO_4xUINT8(0x15a2b01f),
-        CONVERT_UINT32_TO_4xUINT8(0x828ea62a),
-        CONVERT_UINT32_TO_4xUINT8(0xc5b3e42f)
-};
-#define digest_len11 sizeof(digest11)
-
-static const char test_case12[] = "SHA-256 MSG2";
-#define data12 ((const uint8_t *)message2)
-#define data_len12 message2_len
-static const uint8_t digest12[] = {
-        CONVERT_UINT32_TO_4xUINT8(0xe3b0c442),
-        CONVERT_UINT32_TO_4xUINT8(0x98fc1c14),
-        CONVERT_UINT32_TO_4xUINT8(0x9afbf4c8),
-        CONVERT_UINT32_TO_4xUINT8(0x996fb924),
-        CONVERT_UINT32_TO_4xUINT8(0x27ae41e4),
-        CONVERT_UINT32_TO_4xUINT8(0x649b934c),
-        CONVERT_UINT32_TO_4xUINT8(0xa495991b),
-        CONVERT_UINT32_TO_4xUINT8(0x7852b855)
-};
-#define digest_len12 sizeof(digest12)
-
-static const char test_case13[] = "SHA-384 MSG2";
-#define data13 ((const uint8_t *)message2)
-#define data_len13 message2_len
-static const uint8_t digest13[] = {
-        CONVERT_UINT64_TO_8xUINT8(0x38b060a751ac9638),
-        CONVERT_UINT64_TO_8xUINT8(0x4cd9327eb1b1e36a),
-        CONVERT_UINT64_TO_8xUINT8(0x21fdb71114be0743),
-        CONVERT_UINT64_TO_8xUINT8(0x4c0cc7bf63f6e1da),
-        CONVERT_UINT64_TO_8xUINT8(0x274edebfe76f65fb),
-        CONVERT_UINT64_TO_8xUINT8(0xd51ad2f14898b95b)
-};
-#define digest_len13 sizeof(digest13)
-
-static const char test_case14[] = "SHA-512 MSG2";
-#define data14 ((const uint8_t *)message2)
-#define data_len14 message2_len
-static const uint8_t digest14[] = {
-        CONVERT_UINT64_TO_8xUINT8(0xcf83e1357eefb8bd),
-        CONVERT_UINT64_TO_8xUINT8(0xf1542850d66d8007),
-        CONVERT_UINT64_TO_8xUINT8(0xd620e4050b5715dc),
-        CONVERT_UINT64_TO_8xUINT8(0x83f4a921d36ce9ce),
-        CONVERT_UINT64_TO_8xUINT8(0x47d0d13c5d85f2b0),
-        CONVERT_UINT64_TO_8xUINT8(0xff8318d2877eec2f),
-        CONVERT_UINT64_TO_8xUINT8(0x63b931bd47417a81),
-        CONVERT_UINT64_TO_8xUINT8(0xa538327af927da3e)
-};
-#define digest_len14 sizeof(digest14)
-
-static const char test_case20[] = "SHA-1 MSG3";
-#define data20 ((const uint8_t *)message3)
-#define data_len20 message3_len
-static const uint8_t digest20[] = {
-        CONVERT_UINT32_TO_4xUINT8(0x84983e44),
-        CONVERT_UINT32_TO_4xUINT8(0x1c3bd26e),
-        CONVERT_UINT32_TO_4xUINT8(0xbaae4aa1),
-        CONVERT_UINT32_TO_4xUINT8(0xf95129e5),
-        CONVERT_UINT32_TO_4xUINT8(0xe54670f1)
-};
-#define digest_len20 sizeof(digest20)
-
-static const char test_case21[] = "SHA-224 MSG3";
-#define data21 ((const uint8_t *)message3)
-#define data_len21 message3_len
-static const uint8_t digest21[] = {
-        CONVERT_UINT32_TO_4xUINT8(0x75388b16),
-        CONVERT_UINT32_TO_4xUINT8(0x512776cc),
-        CONVERT_UINT32_TO_4xUINT8(0x5dba5da1),
-        CONVERT_UINT32_TO_4xUINT8(0xfd890150),
-        CONVERT_UINT32_TO_4xUINT8(0xb0c6455c),
-        CONVERT_UINT32_TO_4xUINT8(0xb4f58b19),
-        CONVERT_UINT32_TO_4xUINT8(0x52522525)
-};
-#define digest_len21 sizeof(digest21)
-
-static const char test_case22[] = "SHA-256 MSG3";
-#define data22 ((const uint8_t *)message3)
-#define data_len22 message3_len
-static const uint8_t digest22[] = {
-        CONVERT_UINT32_TO_4xUINT8(0x248d6a61),
-        CONVERT_UINT32_TO_4xUINT8(0xd20638b8),
-        CONVERT_UINT32_TO_4xUINT8(0xe5c02693),
-        CONVERT_UINT32_TO_4xUINT8(0x0c3e6039),
-        CONVERT_UINT32_TO_4xUINT8(0xa33ce459),
-        CONVERT_UINT32_TO_4xUINT8(0x64ff2167),
-        CONVERT_UINT32_TO_4xUINT8(0xf6ecedd4),
-        CONVERT_UINT32_TO_4xUINT8(0x19db06c1)
-};
-#define digest_len22 sizeof(digest22)
-
-static const char test_case23[] = "SHA-384 MSG3";
-#define data23 ((const uint8_t *)message3)
-#define data_len23 message3_len
-static const uint8_t digest23[] = {
-        CONVERT_UINT64_TO_8xUINT8(0x3391fdddfc8dc739),
-        CONVERT_UINT64_TO_8xUINT8(0x3707a65b1b470939),
-        CONVERT_UINT64_TO_8xUINT8(0x7cf8b1d162af05ab),
-        CONVERT_UINT64_TO_8xUINT8(0xfe8f450de5f36bc6),
-        CONVERT_UINT64_TO_8xUINT8(0xb0455a8520bc4e6f),
-        CONVERT_UINT64_TO_8xUINT8(0x5fe95b1fe3c8452b)
-};
-#define digest_len23 sizeof(digest23)
-
-static const char test_case24[] = "SHA-512 MSG3";
-#define data24 ((const uint8_t *)message3)
-#define data_len24 message3_len
-static const uint8_t digest24[] = {
-        CONVERT_UINT64_TO_8xUINT8(0x204a8fc6dda82f0a),
-        CONVERT_UINT64_TO_8xUINT8(0x0ced7beb8e08a416),
-        CONVERT_UINT64_TO_8xUINT8(0x57c16ef468b228a8),
-        CONVERT_UINT64_TO_8xUINT8(0x279be331a703c335),
-        CONVERT_UINT64_TO_8xUINT8(0x96fd15c13b1b07f9),
-        CONVERT_UINT64_TO_8xUINT8(0xaa1d3bea57789ca0),
-        CONVERT_UINT64_TO_8xUINT8(0x31ad85c7a71dd703),
-        CONVERT_UINT64_TO_8xUINT8(0x54ec631238ca3445)
-};
-#define digest_len24 sizeof(digest24)
-
-static const char test_case30[] = "SHA-1 MSG4";
-#define data30 ((const uint8_t *)message4)
-#define data_len30 message4_len
-static const uint8_t digest30[] = {
-        CONVERT_UINT32_TO_4xUINT8(0xa49b2446),
-        CONVERT_UINT32_TO_4xUINT8(0xa02c645b),
-        CONVERT_UINT32_TO_4xUINT8(0xf419f995),
-        CONVERT_UINT32_TO_4xUINT8(0xb6709125),
-        CONVERT_UINT32_TO_4xUINT8(0x3a04a259)
-};
-#define digest_len30 sizeof(digest30)
-
-static const char test_case31[] = "SHA-224 MSG4";
-#define data31 ((const uint8_t *)message4)
-#define data_len31 message4_len
-static const uint8_t digest31[] = {
-        CONVERT_UINT32_TO_4xUINT8(0xc97ca9a5),
-        CONVERT_UINT32_TO_4xUINT8(0x59850ce9),
-        CONVERT_UINT32_TO_4xUINT8(0x7a04a96d),
-        CONVERT_UINT32_TO_4xUINT8(0xef6d99a9),
-        CONVERT_UINT32_TO_4xUINT8(0xe0e0e2ab),
-        CONVERT_UINT32_TO_4xUINT8(0x14e6b8df),
-        CONVERT_UINT32_TO_4xUINT8(0x265fc0b3)
-};
-#define digest_len31 sizeof(digest31)
-
-static const char test_case32[] = "SHA-256 MSG4";
-#define data32 ((const uint8_t *)message4)
-#define data_len32 message4_len
-static const uint8_t digest32[] = {
-        CONVERT_UINT32_TO_4xUINT8(0xcf5b16a7),
-        CONVERT_UINT32_TO_4xUINT8(0x78af8380),
-        CONVERT_UINT32_TO_4xUINT8(0x036ce59e),
-        CONVERT_UINT32_TO_4xUINT8(0x7b049237),
-        CONVERT_UINT32_TO_4xUINT8(0x0b249b11),
-        CONVERT_UINT32_TO_4xUINT8(0xe8f07a51),
-        CONVERT_UINT32_TO_4xUINT8(0xafac4503),
-        CONVERT_UINT32_TO_4xUINT8(0x7afee9d1)
-};
-#define digest_len32 sizeof(digest32)
-
-static const char test_case33[] = "SHA-384 MSG4";
-#define data33 ((const uint8_t *)message4)
-#define data_len33 message4_len
-static const uint8_t digest33[] = {
-        CONVERT_UINT64_TO_8xUINT8(0x09330c33f71147e8),
-        CONVERT_UINT64_TO_8xUINT8(0x3d192fc782cd1b47),
-        CONVERT_UINT64_TO_8xUINT8(0x53111b173b3b05d2),
-        CONVERT_UINT64_TO_8xUINT8(0x2fa08086e3b0f712),
-        CONVERT_UINT64_TO_8xUINT8(0xfcc7c71a557e2db9),
-        CONVERT_UINT64_TO_8xUINT8(0x66c3e9fa91746039)
-};
-#define digest_len33 sizeof(digest33)
-
-static const char test_case34[] = "SHA-512 MSG4";
-#define data34 ((const uint8_t *)message4)
-#define data_len34 message4_len
-static const uint8_t digest34[] = {
-        CONVERT_UINT64_TO_8xUINT8(0x8e959b75dae313da),
-        CONVERT_UINT64_TO_8xUINT8(0x8cf4f72814fc143f),
-        CONVERT_UINT64_TO_8xUINT8(0x8f7779c6eb9f7fa1),
-        CONVERT_UINT64_TO_8xUINT8(0x7299aeadb6889018),
-        CONVERT_UINT64_TO_8xUINT8(0x501d289e4900f7e4),
-        CONVERT_UINT64_TO_8xUINT8(0x331b99dec4b5433a),
-        CONVERT_UINT64_TO_8xUINT8(0xc7d329eeb6dd2654),
-        CONVERT_UINT64_TO_8xUINT8(0x5e96e55b874be909)
-};
-#define digest_len34 sizeof(digest34)
-
-#define SHA_TEST_VEC(num, size)                                         \
-        { test_case##num, size,                                         \
-                        (const uint8_t *) data##num, data_len##num,     \
-                        (const uint8_t *) digest##num, digest_len##num }
-
-static const struct sha_vector {
-        const char *test_case;
-        int sha_type;           /* 1, 224, 256, 384 or 512 */
-        const uint8_t *data;
-        size_t data_len;
-        const uint8_t *digest;
-        size_t digest_len;
-} sha_vectors[] = {
-        SHA_TEST_VEC(1, 1),
-        SHA_TEST_VEC(2, 224),
-        SHA_TEST_VEC(3, 256),
-        SHA_TEST_VEC(4, 384),
-        SHA_TEST_VEC(5, 512),
-        SHA_TEST_VEC(10, 1),
-        SHA_TEST_VEC(11, 224),
-        SHA_TEST_VEC(12, 256),
-        SHA_TEST_VEC(13, 384),
-        SHA_TEST_VEC(14, 512),
-        SHA_TEST_VEC(20, 1),
-        SHA_TEST_VEC(21, 224),
-        SHA_TEST_VEC(22, 256),
-        SHA_TEST_VEC(23, 384),
-        SHA_TEST_VEC(24, 512),
-        SHA_TEST_VEC(30, 1),
-        SHA_TEST_VEC(31, 224),
-        SHA_TEST_VEC(32, 256),
-        SHA_TEST_VEC(33, 384),
-        SHA_TEST_VEC(34, 512)
-};
+extern const struct mac_test sha_test_json[];
 
 static int
-sha_job_ok(const struct sha_vector *vec,
+sha_job_ok(const struct mac_test *vec,
            const struct IMB_JOB *job,
            const uint8_t *auth,
            const uint8_t *padding,
@@ -405,11 +52,11 @@ sha_job_ok(const struct sha_vector *vec,
         }
 
         /* hash checks */
-        if (memcmp(padding, &auth[sizeof_padding + vec->digest_len],
+        if (memcmp(padding, &auth[sizeof_padding + (vec->tagSize / 8)],
                    sizeof_padding)) {
                 printf("hash overwrite tail\n");
                 hexdump(stderr, "Target",
-                        &auth[sizeof_padding + vec->digest_len],
+                        &auth[sizeof_padding + (vec->tagSize / 8)],
                         sizeof_padding);
                 return 0;
         }
@@ -420,13 +67,13 @@ sha_job_ok(const struct sha_vector *vec,
                 return 0;
         }
 
-        if (memcmp(vec->digest, &auth[sizeof_padding],
-                   vec->digest_len)) {
+        if (memcmp((const void *) vec->tag, &auth[sizeof_padding],
+                   vec->tagSize / 8)) {
                 printf("hash mismatched\n");
                 hexdump(stderr, "Received", &auth[sizeof_padding],
-                        vec->digest_len);
-                hexdump(stderr, "Expected", vec->digest,
-                        vec->digest_len);
+                        vec->tagSize / 8);
+                hexdump(stderr, "Expected", (const void *) vec->tag,
+                        vec->tagSize / 8);
                 return 0;
         }
         return 1;
@@ -434,8 +81,9 @@ sha_job_ok(const struct sha_vector *vec,
 
 static int
 test_sha(struct IMB_MGR *mb_mgr,
-         const struct sha_vector *vec,
-         const int num_jobs)
+         const struct mac_test *vec,
+         const int num_jobs,
+         const int sha_type)
 {
         struct IMB_JOB *job;
         uint8_t padding[16];
@@ -452,7 +100,7 @@ test_sha(struct IMB_MGR *mb_mgr,
 
         for (i = 0; i < num_jobs; i++) {
                 const size_t alloc_len =
-                        vec->digest_len + (sizeof(padding) * 2);
+                        vec->tagSize / 8 + (sizeof(padding) * 2);
 
                 auths[i] = malloc(alloc_len);
                 if (auths[i] == NULL) {
@@ -473,11 +121,11 @@ test_sha(struct IMB_MGR *mb_mgr,
                 job->cipher_direction = IMB_DIR_ENCRYPT;
                 job->chain_order = IMB_ORDER_HASH_CIPHER;
                 job->auth_tag_output = auths[i] + sizeof(padding);
-                job->auth_tag_output_len_in_bytes = vec->digest_len;
-                job->src = vec->data;
-                job->msg_len_to_hash_in_bytes = vec->data_len;
+                job->auth_tag_output_len_in_bytes = vec->tagSize / 8;
+                job->src = (const void *) vec->msg;
+                job->msg_len_to_hash_in_bytes = vec->msgSize / 8;
                 job->cipher_mode = IMB_CIPHER_NULL;
-                switch (vec->sha_type) {
+                switch (sha_type) {
                 case 1:
                         job->hash_alg = IMB_AUTH_SHA_1;
                         break;
@@ -546,49 +194,50 @@ test_sha_vectors(struct IMB_MGR *mb_mgr,
                  struct test_suite_context *sha512_ctx,
                  const int num_jobs)
 {
-	const int vectors_cnt =
-                sizeof(sha_vectors) / sizeof(sha_vectors[0]);
-	int vect;
         struct test_suite_context *ctx;
+        const struct mac_test *v = sha_test_json;
+        int sha_type;
 
         if (!quiet_mode)
 	        printf("SHA standard test vectors (N jobs = %d):\n", num_jobs);
-	for (vect = 1; vect <= vectors_cnt; vect++) {
-                const int idx = vect - 1;
+	for (; v->msg != NULL; v++) {
 
-#ifdef DEBUG
-                if (!quiet_mode) {
-                        printf("[%d/%d] SHA%d Test Case %s data_len:%d "
-                               "digest_len:%d\n",
-                               vect, vectors_cnt,
-                               sha_vectors[idx].sha_type,
-                               sha_vectors[idx].test_case,
-                               (int) sha_vectors[idx].data_len,
-                               (int) sha_vectors[idx].digest_len);
-                }
-#endif
-
-                switch (sha_vectors[idx].sha_type) {
-                case 1:
+                switch (v->tagSize) {
+                case 160:
                         ctx = sha1_ctx;
+                        sha_type = 1;
                         break;
                 case 224:
                         ctx = sha224_ctx;
+                        sha_type = 224;
                         break;
                 case 256:
                         ctx = sha256_ctx;
+                        sha_type = 256;
                         break;
                 case 384:
                         ctx = sha384_ctx;
+                        sha_type = 384;
                         break;
                 case 512:
-                default:
                         ctx = sha512_ctx;
+                        sha_type = 512;
                         break;
+                default:
+                        ctx = sha1_ctx;
+                        printf("error #%zu, invalid tag size\n", v->tcId);
+                        test_suite_update(ctx, 0, 1);
+                        continue;
                 }
-
-                if (test_sha(mb_mgr, &sha_vectors[idx], num_jobs)) {
-                        printf("error #%d\n", vect);
+#ifdef DEBUG
+                if (!quiet_mode) {
+                        printf("SHA%d Test Case %zu "
+                        "data_len:%zu digest_len:%zu\n",
+                        sha_type, v->tcId, v->msgSize / 8, v->tagSize / 8);
+                }
+#endif
+                if (test_sha(mb_mgr, v, num_jobs, sha_type)) {
+                        printf("error #%zu\n", v->tcId);
                         test_suite_update(ctx, 0, 1);
                 } else {
                         test_suite_update(ctx, 1, 0);
diff --git a/test/kat-app/sha_test.json.c b/test/kat-app/sha_test.json.c
new file mode 100644
index 00000000..27526734
--- /dev/null
+++ b/test/kat-app/sha_test.json.c
@@ -0,0 +1,184 @@
+/*****************************************************************************
+ Copyright (c) 2023, Intel Corporation
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+     * Redistributions of source code must retain the above copyright notice,
+       this list of conditions and the following disclaimer.
+     * Redistributions in binary form must reproduce the above copyright
+       notice, this list of conditions and the following disclaimer in the
+       documentation and/or other materials provided with the distribution.
+     * Neither the name of Intel Corporation nor the names of its contributors
+       may be used to endorse or promote products derived from this software
+       without specific prior written permission.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*****************************************************************************/
+
+/* SHA1, SHA2 */
+#include "mac_test.h"
+
+const struct mac_test sha_test_json[] = {
+        /*
+         * Vectors from https://csrc.nist.gov/csrc/media/projects/
+         * cryptographic-standards-and-guidelines/documents/examples/sha_all.pdf
+         */
+        { 0, 160, 1, NULL, "\x61\x62\x63",
+          "\xa9\x99\x3e\x36\x47\x06\x81\x6a\xba\x3e\x25\x71\x78\x50\xc2\x6c\x9c\xd0"
+          "\xd8\x9d",
+          1, 24, NULL, 0 },
+        { 0, 224, 2, NULL, "\x61\x62\x63",
+          "\x23\x09\x7d\x22\x34\x05\xd8\x22\x86\x42\xa4\x77\xbd\xa2\x55\xb3\x2a\xad"
+          "\xbc\xe4\xbd\xa0\xb3\xf7\xe3\x6c\x9d\xa7",
+          1, 24, NULL, 0 },
+        { 0, 256, 3, NULL, "\x61\x62\x63",
+          "\xba\x78\x16\xbf\x8f\x01\xcf\xea\x41\x41\x40\xde\x5d\xae\x22\x23\xb0\x03"
+          "\x61\xa3\x96\x17\x7a\x9c\xb4\x10\xff\x61\xf2\x00\x15\xad",
+          1, 24, NULL, 0 },
+        { 0, 384, 4, NULL, "\x61\x62\x63",
+          "\xcb\x00\x75\x3f\x45\xa3\x5e\x8b\xb5\xa0\x3d\x69\x9a\xc6\x50\x07\x27\x2c"
+          "\x32\xab\x0e\xde\xd1\x63\x1a\x8b\x60\x5a\x43\xff\x5b\xed\x80\x86\x07\x2b"
+          "\xa1\xe7\xcc\x23\x58\xba\xec\xa1\x34\xc8\x25\xa7",
+          1, 24, NULL, 0 },
+        { 0, 512, 5, NULL, "\x61\x62\x63",
+          "\xdd\xaf\x35\xa1\x93\x61\x7a\xba\xcc\x41\x73\x49\xae\x20\x41\x31\x12\xe6"
+          "\xfa\x4e\x89\xa9\x7e\xa2\x0a\x9e\xee\xe6\x4b\x55\xd3\x9a\x21\x92\x99\x2a"
+          "\x27\x4f\xc1\xa8\x36\xba\x3c\x23\xa3\xfe\xeb\xbd\x45\x4d\x44\x23\x64\x3c"
+          "\xe8\x0e\x2a\x9a\xc9\x4f\xa5\x4c\xa4\x9f",
+          1, 24, NULL, 0 },
+        { 0, 160, 6, NULL, "",
+          "\xda\x39\xa3\xee\x5e\x6b\x4b\x0d\x32\x55\xbf\xef\x95\x60\x18\x90\xaf\xd8"
+          "\x07\x09",
+          1, 0, NULL, 0 },
+        { 0, 224, 7, NULL, "",
+          "\xd1\x4a\x02\x8c\x2a\x3a\x2b\xc9\x47\x61\x02\xbb\x28\x82\x34\xc4\x15\xa2"
+          "\xb0\x1f\x82\x8e\xa6\x2a\xc5\xb3\xe4\x2f",
+          1, 0, NULL, 0 },
+        { 0, 256, 8, NULL, "",
+          "\xe3\xb0\xc4\x42\x98\xfc\x1c\x14\x9a\xfb\xf4\xc8\x99\x6f\xb9\x24\x27\xae"
+          "\x41\xe4\x64\x9b\x93\x4c\xa4\x95\x99\x1b\x78\x52\xb8\x55",
+          1, 0, NULL, 0 },
+        { 0, 384, 9, NULL, "",
+          "\x38\xb0\x60\xa7\x51\xac\x96\x38\x4c\xd9\x32\x7e\xb1\xb1\xe3\x6a\x21\xfd"
+          "\xb7\x11\x14\xbe\x07\x43\x4c\x0c\xc7\xbf\x63\xf6\xe1\xda\x27\x4e\xde\xbf"
+          "\xe7\x6f\x65\xfb\xd5\x1a\xd2\xf1\x48\x98\xb9\x5b",
+          1, 0, NULL, 0 },
+        { 0, 512, 10, NULL, "",
+          "\xcf\x83\xe1\x35\x7e\xef\xb8\xbd\xf1\x54\x28\x50\xd6\x6d\x80\x07\xd6\x20"
+          "\xe4\x05\x0b\x57\x15\xdc\x83\xf4\xa9\x21\xd3\x6c\xe9\xce\x47\xd0\xd1\x3c"
+          "\x5d\x85\xf2\xb0\xff\x83\x18\xd2\x87\x7e\xec\x2f\x63\xb9\x31\xbd\x47\x41"
+          "\x7a\x81\xa5\x38\x32\x7a\xf9\x27\xda\x3e",
+          1, 0, NULL, 0 },
+        { 0, 160, 11, NULL,
+          "\x61\x62\x63\x64\x62\x63\x64\x65\x63\x64\x65\x66\x64\x65\x66\x67\x65\x66"
+          "\x67\x68\x66\x67\x68\x69\x67\x68\x69\x6a\x68\x69\x6a\x6b\x69\x6a\x6b\x6c"
+          "\x6a\x6b\x6c\x6d\x6b\x6c\x6d\x6e\x6c\x6d\x6e\x6f\x6d\x6e\x6f\x70\x6e\x6f"
+          "\x70\x71",
+          "\x84\x98\x3e\x44\x1c\x3b\xd2\x6e\xba\xae\x4a\xa1\xf9\x51\x29\xe5\xe5\x46"
+          "\x70\xf1",
+          1, 448, NULL, 0 },
+        { 0, 224, 12, NULL,
+          "\x61\x62\x63\x64\x62\x63\x64\x65\x63\x64\x65\x66\x64\x65\x66\x67\x65\x66"
+          "\x67\x68\x66\x67\x68\x69\x67\x68\x69\x6a\x68\x69\x6a\x6b\x69\x6a\x6b\x6c"
+          "\x6a\x6b\x6c\x6d\x6b\x6c\x6d\x6e\x6c\x6d\x6e\x6f\x6d\x6e\x6f\x70\x6e\x6f"
+          "\x70\x71",
+          "\x75\x38\x8b\x16\x51\x27\x76\xcc\x5d\xba\x5d\xa1\xfd\x89\x01\x50\xb0\xc6"
+          "\x45\x5c\xb4\xf5\x8b\x19\x52\x52\x25\x25",
+          1, 448, NULL, 0 },
+        { 0, 256, 13, NULL,
+          "\x61\x62\x63\x64\x62\x63\x64\x65\x63\x64\x65\x66\x64\x65\x66\x67\x65\x66"
+          "\x67\x68\x66\x67\x68\x69\x67\x68\x69\x6a\x68\x69\x6a\x6b\x69\x6a\x6b\x6c"
+          "\x6a\x6b\x6c\x6d\x6b\x6c\x6d\x6e\x6c\x6d\x6e\x6f\x6d\x6e\x6f\x70\x6e\x6f"
+          "\x70\x71",
+          "\x24\x8d\x6a\x61\xd2\x06\x38\xb8\xe5\xc0\x26\x93\x0c\x3e\x60\x39\xa3\x3c"
+          "\xe4\x59\x64\xff\x21\x67\xf6\xec\xed\xd4\x19\xdb\x06\xc1",
+          1, 448, NULL, 0 },
+        { 0, 384, 14, NULL,
+          "\x61\x62\x63\x64\x62\x63\x64\x65\x63\x64\x65\x66\x64\x65\x66\x67\x65\x66"
+          "\x67\x68\x66\x67\x68\x69\x67\x68\x69\x6a\x68\x69\x6a\x6b\x69\x6a\x6b\x6c"
+          "\x6a\x6b\x6c\x6d\x6b\x6c\x6d\x6e\x6c\x6d\x6e\x6f\x6d\x6e\x6f\x70\x6e\x6f"
+          "\x70\x71",
+          "\x33\x91\xfd\xdd\xfc\x8d\xc7\x39\x37\x07\xa6\x5b\x1b\x47\x09\x39\x7c\xf8"
+          "\xb1\xd1\x62\xaf\x05\xab\xfe\x8f\x45\x0d\xe5\xf3\x6b\xc6\xb0\x45\x5a\x85"
+          "\x20\xbc\x4e\x6f\x5f\xe9\x5b\x1f\xe3\xc8\x45\x2b",
+          1, 448, NULL, 0 },
+        { 0, 512, 15, NULL,
+          "\x61\x62\x63\x64\x62\x63\x64\x65\x63\x64\x65\x66\x64\x65\x66\x67\x65\x66"
+          "\x67\x68\x66\x67\x68\x69\x67\x68\x69\x6a\x68\x69\x6a\x6b\x69\x6a\x6b\x6c"
+          "\x6a\x6b\x6c\x6d\x6b\x6c\x6d\x6e\x6c\x6d\x6e\x6f\x6d\x6e\x6f\x70\x6e\x6f"
+          "\x70\x71",
+          "\x20\x4a\x8f\xc6\xdd\xa8\x2f\x0a\x0c\xed\x7b\xeb\x8e\x08\xa4\x16\x57\xc1"
+          "\x6e\xf4\x68\xb2\x28\xa8\x27\x9b\xe3\x31\xa7\x03\xc3\x35\x96\xfd\x15\xc1"
+          "\x3b\x1b\x07\xf9\xaa\x1d\x3b\xea\x57\x78\x9c\xa0\x31\xad\x85\xc7\xa7\x1d"
+          "\xd7\x03\x54\xec\x63\x12\x38\xca\x34\x45",
+          1, 448, NULL, 0 },
+        { 0, 160, 16, NULL,
+          "\x61\x62\x63\x64\x65\x66\x67\x68\x62\x63\x64\x65\x66\x67\x68\x69\x63\x64"
+          "\x65\x66\x67\x68\x69\x6a\x64\x65\x66\x67\x68\x69\x6a\x6b\x65\x66\x67\x68"
+          "\x69\x6a\x6b\x6c\x66\x67\x68\x69\x6a\x6b\x6c\x6d\x67\x68\x69\x6a\x6b\x6c"
+          "\x6d\x6e\x68\x69\x6a\x6b\x6c\x6d\x6e\x6f\x69\x6a\x6b\x6c\x6d\x6e\x6f\x70"
+          "\x6a\x6b\x6c\x6d\x6e\x6f\x70\x71\x6b\x6c\x6d\x6e\x6f\x70\x71\x72\x6c\x6d"
+          "\x6e\x6f\x70\x71\x72\x73\x6d\x6e\x6f\x70\x71\x72\x73\x74\x6e\x6f\x70\x71"
+          "\x72\x73\x74\x75",
+          "\xa4\x9b\x24\x46\xa0\x2c\x64\x5b\xf4\x19\xf9\x95\xb6\x70\x91\x25\x3a\x04"
+          "\xa2\x59",
+          1, 896, NULL, 0 },
+        { 0, 224, 17, NULL,
+          "\x61\x62\x63\x64\x65\x66\x67\x68\x62\x63\x64\x65\x66\x67\x68\x69\x63\x64"
+          "\x65\x66\x67\x68\x69\x6a\x64\x65\x66\x67\x68\x69\x6a\x6b\x65\x66\x67\x68"
+          "\x69\x6a\x6b\x6c\x66\x67\x68\x69\x6a\x6b\x6c\x6d\x67\x68\x69\x6a\x6b\x6c"
+          "\x6d\x6e\x68\x69\x6a\x6b\x6c\x6d\x6e\x6f\x69\x6a\x6b\x6c\x6d\x6e\x6f\x70"
+          "\x6a\x6b\x6c\x6d\x6e\x6f\x70\x71\x6b\x6c\x6d\x6e\x6f\x70\x71\x72\x6c\x6d"
+          "\x6e\x6f\x70\x71\x72\x73\x6d\x6e\x6f\x70\x71\x72\x73\x74\x6e\x6f\x70\x71"
+          "\x72\x73\x74\x75",
+          "\xc9\x7c\xa9\xa5\x59\x85\x0c\xe9\x7a\x04\xa9\x6d\xef\x6d\x99\xa9\xe0\xe0"
+          "\xe2\xab\x14\xe6\xb8\xdf\x26\x5f\xc0\xb3",
+          1, 896, NULL, 0 },
+        { 0, 256, 18, NULL,
+          "\x61\x62\x63\x64\x65\x66\x67\x68\x62\x63\x64\x65\x66\x67\x68\x69\x63\x64"
+          "\x65\x66\x67\x68\x69\x6a\x64\x65\x66\x67\x68\x69\x6a\x6b\x65\x66\x67\x68"
+          "\x69\x6a\x6b\x6c\x66\x67\x68\x69\x6a\x6b\x6c\x6d\x67\x68\x69\x6a\x6b\x6c"
+          "\x6d\x6e\x68\x69\x6a\x6b\x6c\x6d\x6e\x6f\x69\x6a\x6b\x6c\x6d\x6e\x6f\x70"
+          "\x6a\x6b\x6c\x6d\x6e\x6f\x70\x71\x6b\x6c\x6d\x6e\x6f\x70\x71\x72\x6c\x6d"
+          "\x6e\x6f\x70\x71\x72\x73\x6d\x6e\x6f\x70\x71\x72\x73\x74\x6e\x6f\x70\x71"
+          "\x72\x73\x74\x75",
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+          "\x9b\x11\xe8\xf0\x7a\x51\xaf\xac\x45\x03\x7a\xfe\xe9\xd1",
+          1, 896, NULL, 0 },
+        { 0, 384, 19, NULL,
+          "\x61\x62\x63\x64\x65\x66\x67\x68\x62\x63\x64\x65\x66\x67\x68\x69\x63\x64"
+          "\x65\x66\x67\x68\x69\x6a\x64\x65\x66\x67\x68\x69\x6a\x6b\x65\x66\x67\x68"
+          "\x69\x6a\x6b\x6c\x66\x67\x68\x69\x6a\x6b\x6c\x6d\x67\x68\x69\x6a\x6b\x6c"
+          "\x6d\x6e\x68\x69\x6a\x6b\x6c\x6d\x6e\x6f\x69\x6a\x6b\x6c\x6d\x6e\x6f\x70"
+          "\x6a\x6b\x6c\x6d\x6e\x6f\x70\x71\x6b\x6c\x6d\x6e\x6f\x70\x71\x72\x6c\x6d"
+          "\x6e\x6f\x70\x71\x72\x73\x6d\x6e\x6f\x70\x71\x72\x73\x74\x6e\x6f\x70\x71"
+          "\x72\x73\x74\x75",
+          "\x09\x33\x0c\x33\xf7\x11\x47\xe8\x3d\x19\x2f\xc7\x82\xcd\x1b\x47\x53\x11"
+          "\x1b\x17\x3b\x3b\x05\xd2\x2f\xa0\x80\x86\xe3\xb0\xf7\x12\xfc\xc7\xc7\x1a"
+          "\x55\x7e\x2d\xb9\x66\xc3\xe9\xfa\x91\x74\x60\x39",
+          1, 896, NULL, 0 },
+        { 0, 512, 20, NULL,
+          "\x61\x62\x63\x64\x65\x66\x67\x68\x62\x63\x64\x65\x66\x67\x68\x69\x63\x64"
+          "\x65\x66\x67\x68\x69\x6a\x64\x65\x66\x67\x68\x69\x6a\x6b\x65\x66\x67\x68"
+          "\x69\x6a\x6b\x6c\x66\x67\x68\x69\x6a\x6b\x6c\x6d\x67\x68\x69\x6a\x6b\x6c"
+          "\x6d\x6e\x68\x69\x6a\x6b\x6c\x6d\x6e\x6f\x69\x6a\x6b\x6c\x6d\x6e\x6f\x70"
+          "\x6a\x6b\x6c\x6d\x6e\x6f\x70\x71\x6b\x6c\x6d\x6e\x6f\x70\x71\x72\x6c\x6d"
+          "\x6e\x6f\x70\x71\x72\x73\x6d\x6e\x6f\x70\x71\x72\x73\x74\x6e\x6f\x70\x71"
+          "\x72\x73\x74\x75",
+          "\x8e\x95\x9b\x75\xda\xe3\x13\xda\x8c\xf4\xf7\x28\x14\xfc\x14\x3f\x8f\x77"
+          "\x79\xc6\xeb\x9f\x7f\xa1\x72\x99\xae\xad\xb6\x88\x90\x18\x50\x1d\x28\x9e"
+          "\x49\x00\xf7\xe4\x33\x1b\x99\xde\xc4\xb5\x43\x3a\xc7\xd3\x29\xee\xb6\xdd"
+          "\x26\x54\x5e\x96\xe5\x5b\x87\x4b\xe9\x09",
+          1, 896, NULL, 0 },
+        { 0, 0, 0, NULL, NULL, NULL, 0, 0, NULL, 0 }
+};
diff --git a/test/kat-app/win_x64.mak b/test/kat-app/win_x64.mak
index 07ea4bf1..0fcedb30 100644
--- a/test/kat-app/win_x64.mak
+++ b/test/kat-app/win_x64.mak
@@ -29,7 +29,7 @@ APP = imb-kat
 
 include ..\common\win_x64_common.mk
 
-TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj ghash_test.json.obj poly1305_test.json.obj cmac_test.json.obj xcbc_test.json.obj
+TEST_OBJS = utils.obj main.obj gcm_test.obj ctr_test.obj customop_test.obj des_test.obj ccm_test.obj cmac_test.obj hmac_sha1_test.obj hmac_sha256_sha512_test.obj hmac_md5_test.obj aes_test.obj sha_test.obj chained_test.obj api_test.obj pon_test.obj ecb_test.obj zuc_test.obj kasumi_test.obj snow3g_test.obj direct_api_test.obj clear_mem_test.obj hec_test.obj xcbc_test.obj aes_cbcs_test.obj crc_test.obj chacha_test.obj poly1305_test.obj chacha20_poly1305_test.obj null_test.obj snow_v_test.obj direct_api_param_test.obj quic_ecb_test.obj hmac_sha1.json.obj hmac_sha224.json.obj hmac_sha256.json.obj hmac_sha384.json.obj hmac_sha512.json.obj hmac_md5.json.obj gmac_test.obj gmac_test.json.obj ghash_test.obj ghash_test.json.obj poly1305_test.json.obj cmac_test.json.obj xcbc_test.json.obj sha_test.json.obj
 TEST_LFLAGS = /out:$(APP).exe $(DLFLAGS)
 
 all: $(APP).exe tests.dep
-- 
GitLab


From cf07f42fcb4e701c5dbf0dbfb571f66c417c1f78 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 2 Jun 2023 17:04:09 +0100
Subject: [PATCH 321/332] docs: update github pages documentation for v1.4

---
 docs/README_8md.html                          |   30 +-
 docs/annotated.html                           |   38 +-
 docs/bc_sd.png                                |  Bin 0 -> 635 bytes
 docs/bdwn.png                                 |  Bin 147 -> 0 bytes
 docs/classes.html                             |   30 +-
 docs/doc.png                                  |  Bin 746 -> 0 bytes
 docs/doc.svg                                  |   12 +
 docs/docd.svg                                 |   12 +
 docs/doxygen.css                              | 1010 ++--
 docs/doxygen.png                              |  Bin 3779 -> 0 bytes
 docs/doxygen.svg                              |    4 +-
 docs/dynsections.js                           |    2 +
 docs/files.html                               |   30 +-
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 docs/folderclosed.svg                         |   11 +
 docs/folderclosedd.svg                        |   11 +
 docs/folderopen.png                           |  Bin 597 -> 0 bytes
 docs/folderopen.svg                           |   17 +
 docs/folderopend.svg                          |   12 +
 docs/functions.html                           |   30 +-
 docs/functions_a.html                         |   33 +-
 docs/functions_c.html                         |   30 +-
 docs/functions_d.html                         |   30 +-
 docs/functions_e.html                         |   30 +-
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 docs/functions_g.html                         |   31 +-
 docs/functions_h.html                         |   30 +-
 docs/functions_i.html                         |   30 +-
 docs/functions_j.html                         |   30 +-
 docs/functions_k.html                         |   30 +-
 docs/functions_l.html                         |   30 +-
 docs/functions_m.html                         |   30 +-
 docs/functions_n.html                         |   30 +-
 docs/functions_o.html                         |   30 +-
 docs/functions_p.html                         |   30 +-
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 docs/functions_u.html                         |   30 +-
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 docs/functions_vars.html                      |   32 +-
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 docs/functions_z.html                         |   30 +-
 docs/globals.html                             |   30 +-
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 docs/globals_defs.js                          |    7 +
 ...lobals_func_d.html => globals_defs_d.html} |   36 +-
 docs/globals_defs_i.html                      |  317 ++
 ...lobals_func_k.html => globals_defs_k.html} |   37 +-
 docs/globals_dup.js                           |    1 +
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 docs/globals_eval.html                        |   39 +-
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 docs/intel-ipsec-mb_8h.js                     |   88 +-
 docs/intel-ipsec-mb_8h_source.html            | 4791 ++++++++--------
 docs/jquery.js                                |    7 +-
 docs/md__home_eurquhar_ipsec-mb_README.html   |  566 --
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 docs/menudata.js                              |  126 -
 docs/nav_fd.png                               |  Bin 0 -> 169 bytes
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 docs/navtree.css                              |   21 +-
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+++ b/docs/doc.svg
@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN"
+ "https://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
+<svg version="1.1" width="16" height="24" viewBox="0 0 80 60" id="doc" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xml:space="preserve">
+<g style="fill:#4665A2">
+<path d="m 14,-1.1445312 c -2.824372,0 -5.1445313,2.320159 -5.1445312,5.1445312 v 72 c 0,2.824372 2.3201592,5.144531 5.1445312,5.144531 h 52 c 2.824372,0 5.144531,-2.320159 5.144531,-5.144531 V 23.699219 a 1.1447968,1.1447968 0 0 0 -0.01563,-0.1875 C 70.977847,22.605363 70.406495,21.99048 70.007812,21.591797 L 48.208984,-0.20898438 C 47.606104,-0.81186474 46.804652,-1.1445313 46,-1.1445312 Z m 1.144531,6.2890624 H 42.855469 V 24 c 0,1.724372 1.420159,3.144531 3.144531,3.144531 H 64.855469 V 74.855469 H 15.144531 Z m 34,4.4179688 L 60.4375,20.855469 H 49.144531 Z"/>
+</g>
+<g style="fill:#D8DFEE;stroke-width:0">
+<path d="M 3.0307167,13.993174 V 7.0307167 h 2.7576792 2.7576792 v 1.8826151 c 0,1.2578262 0.0099,1.9287572 0.029818,2.0216512 0.03884,0.181105 0.168631,0.348218 0.33827,0.43554 l 0.1355017,0.06975 1.9598092,0.0079 1.959809,0.0078 v 4.749829 4.749829 H 8 3.0307167 Z" transform="matrix(5,0,0,5,0,-30)" />
+<path d="M 9.8293515,9.0581469 V 7.9456453 l 1.1058025,1.1055492 c 0.608191,0.6080521 1.105802,1.1086775 1.105802,1.1125015 0,0.0038 -0.497611,0.007 -1.105802,0.007 H 9.8293515 Z" transform="matrix(5,0,0,5,0,-30)" />
+</g>
+</svg>
diff --git a/docs/docd.svg b/docs/docd.svg
new file mode 100644
index 00000000..ac18b275
--- /dev/null
+++ b/docs/docd.svg
@@ -0,0 +1,12 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN"
+ "https://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
+<svg version="1.1" width="16" height="24" viewBox="0 0 80 60" id="doc" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink" xml:space="preserve">
+<g style="fill:#C4CFE5">
+<path d="m 14,-1.1445312 c -2.824372,0 -5.1445313,2.320159 -5.1445312,5.1445312 v 72 c 0,2.824372 2.3201592,5.144531 5.1445312,5.144531 h 52 c 2.824372,0 5.144531,-2.320159 5.144531,-5.144531 V 23.699219 a 1.1447968,1.1447968 0 0 0 -0.01563,-0.1875 C 70.977847,22.605363 70.406495,21.99048 70.007812,21.591797 L 48.208984,-0.20898438 C 47.606104,-0.81186474 46.804652,-1.1445313 46,-1.1445312 Z m 1.144531,6.2890624 H 42.855469 V 24 c 0,1.724372 1.420159,3.144531 3.144531,3.144531 H 64.855469 V 74.855469 H 15.144531 Z m 34,4.4179688 L 60.4375,20.855469 H 49.144531 Z"/>
+</g>
+<g style="fill:#4665A2;stroke-width:0">
+<path d="M 3.0307167,13.993174 V 7.0307167 h 2.7576792 2.7576792 v 1.8826151 c 0,1.2578262 0.0099,1.9287572 0.029818,2.0216512 0.03884,0.181105 0.168631,0.348218 0.33827,0.43554 l 0.1355017,0.06975 1.9598092,0.0079 1.959809,0.0078 v 4.749829 4.749829 H 8 3.0307167 Z" transform="matrix(5,0,0,5,0,-30)" />
+<path d="M 9.8293515,9.0581469 V 7.9456453 l 1.1058025,1.1055492 c 0.608191,0.6080521 1.105802,1.1086775 1.105802,1.1125015 0,0.0038 -0.497611,0.007 -1.105802,0.007 H 9.8293515 Z" transform="matrix(5,0,0,5,0,-30)" />
+</g>
+</svg>
diff --git a/docs/doxygen.css b/docs/doxygen.css
index d32e583c..0caa19b2 100644
--- a/docs/doxygen.css
+++ b/docs/doxygen.css
@@ -1,29 +1,368 @@
-/* The standard CSS for doxygen 1.9.5 */
-
-body, table, div, p, dl {
-	font: 400 14px/22px Roboto,sans-serif;
+/* The standard CSS for doxygen 1.9.7*/
+
+html {
+/* page base colors */
+--page-background-color: white;
+--page-foreground-color: black;
+--page-link-color: #3D578C;
+--page-visited-link-color: #4665A2;
+
+/* index */
+--index-odd-item-bg-color: #F8F9FC;
+--index-even-item-bg-color: white;
+--index-header-color: black;
+--index-separator-color: #A0A0A0;
+
+/* header */
+--header-background-color: #F9FAFC;
+--header-separator-color: #C4CFE5;
+--header-gradient-image: url('nav_h.png');
+--group-header-separator-color: #879ECB;
+--group-header-color: #354C7B;
+--inherit-header-color: gray;
+
+--footer-foreground-color: #2A3D61;
+--footer-logo-width: 104px;
+--citation-label-color: #334975;
+--glow-color: cyan;
+
+--title-background-color: white;
+--title-separator-color: #5373B4;
+--directory-separator-color: #9CAFD4;
+--separator-color: #4A6AAA;
+
+--blockquote-background-color: #F7F8FB;
+--blockquote-border-color: #9CAFD4;
+
+--scrollbar-thumb-color: #9CAFD4;
+--scrollbar-background-color: #F9FAFC;
+
+--icon-background-color: #728DC1;
+--icon-foreground-color: white;
+--icon-doc-image: url('doc.svg');
+--icon-folder-open-image: url('folderopen.svg');
+--icon-folder-closed-image: url('folderclosed.svg');
+
+/* brief member declaration list */
+--memdecl-background-color: #F9FAFC;
+--memdecl-separator-color: #DEE4F0;
+--memdecl-foreground-color: #555;
+--memdecl-template-color: #4665A2;
+
+/* detailed member list */
+--memdef-border-color: #A8B8D9;
+--memdef-title-background-color: #E2E8F2;
+--memdef-title-gradient-image: url('nav_f.png');
+--memdef-proto-background-color: #DFE5F1;
+--memdef-proto-text-color: #253555;
+--memdef-proto-text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9);
+--memdef-doc-background-color: white;
+--memdef-param-name-color: #602020;
+--memdef-template-color: #4665A2;
+
+/* tables */
+--table-cell-border-color: #2D4068;
+--table-header-background-color: #374F7F;
+--table-header-foreground-color: #FFFFFF;
+
+/* labels */
+--label-background-color: #728DC1;
+--label-left-top-border-color: #5373B4;
+--label-right-bottom-border-color: #C4CFE5;
+--label-foreground-color: white;
+
+/** navigation bar/tree/menu */
+--nav-background-color: #F9FAFC;
+--nav-foreground-color: #364D7C;
+--nav-gradient-image: url('tab_b.png');
+--nav-gradient-hover-image: url('tab_h.png');
+--nav-gradient-active-image: url('tab_a.png');
+--nav-gradient-active-image-parent: url("../tab_a.png");
+--nav-separator-image: url('tab_s.png');
+--nav-breadcrumb-image: url('bc_s.png');
+--nav-breadcrumb-border-color: #C2CDE4;
+--nav-splitbar-image: url('splitbar.png');
+--nav-font-size-level1: 13px;
+--nav-font-size-level2: 10px;
+--nav-font-size-level3: 9px;
+--nav-text-normal-color: #283A5D;
+--nav-text-hover-color: white;
+--nav-text-active-color: white;
+--nav-text-normal-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9);
+--nav-text-hover-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0);
+--nav-text-active-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0);
+--nav-menu-button-color: #364D7C;
+--nav-menu-background-color: white;
+--nav-menu-foreground-color: #555555;
+--nav-menu-toggle-color: rgba(255, 255, 255, 0.5);
+--nav-arrow-color: #9CAFD4;
+--nav-arrow-selected-color: #9CAFD4;
+
+/* table of contents */
+--toc-background-color: #F4F6FA;
+--toc-border-color: #D8DFEE;
+--toc-header-color: #4665A2;
+--toc-down-arrow-image: url("data:image/svg+xml;utf8,<svg xmlns='http://www.w3.org/2000/svg' version='1.1' height='10px' width='5px' fill='grey'><text x='0' y='5' font-size='10'>&%238595;</text></svg>");
+
+/** search field */
+--search-background-color: white;
+--search-foreground-color: #909090;
+--search-magnification-image: url('mag.svg');
+--search-magnification-select-image: url('mag_sel.svg');
+--search-active-color: black;
+--search-filter-background-color: #F9FAFC;
+--search-filter-foreground-color: black;
+--search-filter-border-color: #90A5CE;
+--search-filter-highlight-text-color: white;
+--search-filter-highlight-bg-color: #3D578C;
+--search-results-foreground-color: #425E97;
+--search-results-background-color: #EEF1F7;
+--search-results-border-color: black;
+--search-box-shadow: inset 0.5px 0.5px 3px 0px #555;
+
+/** code fragments */
+--code-keyword-color: #008000;
+--code-type-keyword-color: #604020;
+--code-flow-keyword-color: #E08000;
+--code-comment-color: #800000;
+--code-preprocessor-color: #806020;
+--code-string-literal-color: #002080;
+--code-char-literal-color: #008080;
+--code-xml-cdata-color: black;
+--code-vhdl-digit-color: #FF00FF;
+--code-vhdl-char-color: #000000;
+--code-vhdl-keyword-color: #700070;
+--code-vhdl-logic-color: #FF0000;
+--code-link-color: #4665A2;
+--code-external-link-color: #4665A2;
+--fragment-foreground-color: black;
+--fragment-background-color: #FBFCFD;
+--fragment-border-color: #C4CFE5;
+--fragment-lineno-border-color: #00FF00;
+--fragment-lineno-background-color: #E8E8E8;
+--fragment-lineno-foreground-color: black;
+--fragment-lineno-link-fg-color: #4665A2;
+--fragment-lineno-link-bg-color: #D8D8D8;
+--fragment-lineno-link-hover-fg-color: #4665A2;
+--fragment-lineno-link-hover-bg-color: #C8C8C8;
+--tooltip-foreground-color: black;
+--tooltip-background-color: white;
+--tooltip-border-color: gray;
+--tooltip-doc-color: grey;
+--tooltip-declaration-color: #006318;
+--tooltip-link-color: #4665A2;
+--tooltip-shadow: 1px 1px 7px gray;
+
+/** font-family */
+--font-family-normal: Roboto,sans-serif;
+--font-family-monospace: 'JetBrains Mono',Consolas,Monaco,'Andale Mono','Ubuntu Mono',monospace,fixed;
+--font-family-nav: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif;
+--font-family-title: Tahoma,Arial,sans-serif;
+--font-family-toc: Verdana,'DejaVu Sans',Geneva,sans-serif;
+--font-family-search: Arial,Verdana,sans-serif;
+--font-family-icon: Arial,Helvetica;
+--font-family-tooltip: Roboto,sans-serif;
+
+}
+
+@media (prefers-color-scheme: dark) {
+  html:not(.dark-mode) {
+    color-scheme: dark;
+
+/* page base colors */
+--page-background-color: black;
+--page-foreground-color: #C9D1D9;
+--page-link-color: #90A5CE;
+--page-visited-link-color: #A3B4D7;
+
+/* index */
+--index-odd-item-bg-color: #0B101A;
+--index-even-item-bg-color: black;
+--index-header-color: #C4CFE5;
+--index-separator-color: #334975;
+
+/* header */
+--header-background-color: #070B11;
+--header-separator-color: #141C2E;
+--header-gradient-image: url('nav_hd.png');
+--group-header-separator-color: #283A5D;
+--group-header-color: #90A5CE;
+--inherit-header-color: #A0A0A0;
+
+--footer-foreground-color: #5B7AB7;
+--footer-logo-width: 60px;
+--citation-label-color: #90A5CE;
+--glow-color: cyan;
+
+--title-background-color: #090D16;
+--title-separator-color: #354C79;
+--directory-separator-color: #283A5D;
+--separator-color: #283A5D;
+
+--blockquote-background-color: #101826;
+--blockquote-border-color: #283A5D;
+
+--scrollbar-thumb-color: #283A5D;
+--scrollbar-background-color: #070B11;
+
+--icon-background-color: #334975;
+--icon-foreground-color: #C4CFE5;
+--icon-doc-image: url('docd.svg');
+--icon-folder-open-image: url('folderopend.svg');
+--icon-folder-closed-image: url('folderclosedd.svg');
+
+/* brief member declaration list */
+--memdecl-background-color: #0B101A;
+--memdecl-separator-color: #2C3F65;
+--memdecl-foreground-color: #BBB;
+--memdecl-template-color: #7C95C6;
+
+/* detailed member list */
+--memdef-border-color: #233250;
+--memdef-title-background-color: #1B2840;
+--memdef-title-gradient-image: url('nav_fd.png');
+--memdef-proto-background-color: #19243A;
+--memdef-proto-text-color: #9DB0D4;
+--memdef-proto-text-shadow: 0px 1px 1px rgba(0, 0, 0, 0.9);
+--memdef-doc-background-color: black;
+--memdef-param-name-color: #D28757;
+--memdef-template-color: #7C95C6;
+
+/* tables */
+--table-cell-border-color: #283A5D;
+--table-header-background-color: #283A5D;
+--table-header-foreground-color: #C4CFE5;
+
+/* labels */
+--label-background-color: #354C7B;
+--label-left-top-border-color: #4665A2;
+--label-right-bottom-border-color: #283A5D;
+--label-foreground-color: #CCCCCC;
+
+/** navigation bar/tree/menu */
+--nav-background-color: #101826;
+--nav-foreground-color: #364D7C;
+--nav-gradient-image: url('tab_bd.png');
+--nav-gradient-hover-image: url('tab_hd.png');
+--nav-gradient-active-image: url('tab_ad.png');
+--nav-gradient-active-image-parent: url("../tab_ad.png");
+--nav-separator-image: url('tab_sd.png');
+--nav-breadcrumb-image: url('bc_sd.png');
+--nav-breadcrumb-border-color: #2A3D61;
+--nav-splitbar-image: url('splitbard.png');
+--nav-font-size-level1: 13px;
+--nav-font-size-level2: 10px;
+--nav-font-size-level3: 9px;
+--nav-text-normal-color: #B6C4DF;
+--nav-text-hover-color: #DCE2EF;
+--nav-text-active-color: #DCE2EF;
+--nav-text-normal-shadow: 0px 1px 1px black;
+--nav-text-hover-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0);
+--nav-text-active-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0);
+--nav-menu-button-color: #B6C4DF;
+--nav-menu-background-color: #05070C;
+--nav-menu-foreground-color: #BBBBBB;
+--nav-menu-toggle-color: rgba(255, 255, 255, 0.2);
+--nav-arrow-color: #334975;
+--nav-arrow-selected-color: #90A5CE;
+
+/* table of contents */
+--toc-background-color: #151E30;
+--toc-border-color: #202E4A;
+--toc-header-color: #A3B4D7;
+--toc-down-arrow-image: url("data:image/svg+xml;utf8,<svg xmlns='http://www.w3.org/2000/svg' version='1.1' height='10px' width='5px'><text x='0' y='5' font-size='10' fill='grey'>&%238595;</text></svg>");
+
+/** search field */
+--search-background-color: black;
+--search-foreground-color: #C5C5C5;
+--search-magnification-image: url('mag_d.svg');
+--search-magnification-select-image: url('mag_seld.svg');
+--search-active-color: #C5C5C5;
+--search-filter-background-color: #101826;
+--search-filter-foreground-color: #90A5CE;
+--search-filter-border-color: #7C95C6;
+--search-filter-highlight-text-color: #BCC9E2;
+--search-filter-highlight-bg-color: #283A5D;
+--search-results-background-color: #101826;
+--search-results-foreground-color: #90A5CE;
+--search-results-border-color: #7C95C6;
+--search-box-shadow: inset 0.5px 0.5px 3px 0px #2F436C;
+
+/** code fragments */
+--code-keyword-color: #CC99CD;
+--code-type-keyword-color: #AB99CD;
+--code-flow-keyword-color: #E08000;
+--code-comment-color: #717790;
+--code-preprocessor-color: #65CABE;
+--code-string-literal-color: #7EC699;
+--code-char-literal-color: #00E0F0;
+--code-xml-cdata-color: #C9D1D9;
+--code-vhdl-digit-color: #FF00FF;
+--code-vhdl-char-color: #000000;
+--code-vhdl-keyword-color: #700070;
+--code-vhdl-logic-color: #FF0000;
+--code-link-color: #79C0FF;
+--code-external-link-color: #79C0FF;
+--fragment-foreground-color: #C9D1D9;
+--fragment-background-color: black;
+--fragment-border-color: #30363D;
+--fragment-lineno-border-color: #30363D;
+--fragment-lineno-background-color: black;
+--fragment-lineno-foreground-color: #6E7681;
+--fragment-lineno-link-fg-color: #6E7681;
+--fragment-lineno-link-bg-color: #303030;
+--fragment-lineno-link-hover-fg-color: #8E96A1;
+--fragment-lineno-link-hover-bg-color: #505050;
+--tooltip-foreground-color: #C9D1D9;
+--tooltip-background-color: #202020;
+--tooltip-border-color: #C9D1D9;
+--tooltip-doc-color: #D9E1E9;
+--tooltip-declaration-color: #20C348;
+--tooltip-link-color: #79C0FF;
+--tooltip-shadow: none;
+
+/** font-family */
+--font-family-normal: Roboto,sans-serif;
+--font-family-monospace: 'JetBrains Mono',Consolas,Monaco,'Andale Mono','Ubuntu Mono',monospace,fixed;
+--font-family-nav: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif;
+--font-family-title: Tahoma,Arial,sans-serif;
+--font-family-toc: Verdana,'DejaVu Sans',Geneva,sans-serif;
+--font-family-search: Arial,Verdana,sans-serif;
+--font-family-icon: Arial,Helvetica;
+--font-family-tooltip: Roboto,sans-serif;
+
+}}
+body {
+    background-color: var(--page-background-color);
+    color: var(--page-foreground-color);
 }
 
-p.reference, p.definition {
-	font: 400 14px/22px Roboto,sans-serif;
+body, table, div, p, dl {
+	font-weight: 400;
+	font-size: 14px;
+	font-family: var(--font-family-normal);
+	line-height: 22px;
 }
 
 /* @group Heading Levels */
 
-h1.groupheader {
-	font-size: 150%;
-}
-
 .title {
-	font: 400 14px/28px Roboto,sans-serif;
+	font-weight: 400;
+	font-size: 14px;
+	font-family: var(--font-family-normal);
+	line-height: 28px;
 	font-size: 150%;
 	font-weight: bold;
 	margin: 10px 2px;
 }
 
+h1.groupheader {
+	font-size: 150%;
+}
+
 h2.groupheader {
-	border-bottom: 1px solid #879ECB;
-	color: #354C7B;
+	border-bottom: 1px solid var(--group-header-separator-color);
+	color: var(--group-header-color);
 	font-size: 150%;
 	font-weight: normal;
 	margin-top: 1.75em;
@@ -46,22 +385,13 @@ h1, h2, h3, h4, h5, h6 {
 }
 
 h1.glow, h2.glow, h3.glow, h4.glow, h5.glow, h6.glow {
-	text-shadow: 0 0 15px cyan;
+	text-shadow: 0 0 15px var(--glow-color);
 }
 
 dt {
 	font-weight: bold;
 }
 
-ul.multicol {
-	-moz-column-gap: 1em;
-	-webkit-column-gap: 1em;
-	column-gap: 1em;
-	-moz-column-count: 3;
-	-webkit-column-count: 3;
-	column-count: 3;
-}
-
 p.startli, p.startdd {
 	margin-top: 2px;
 }
@@ -113,7 +443,6 @@ h3.version {
 }
 
 div.navtab {
-	border-right: 1px solid #A3B4D7;
 	padding-right: 15px;
 	text-align: right;
 	line-height: 110%;
@@ -127,16 +456,17 @@ td.navtab {
 	padding-right: 6px;
 	padding-left: 6px;
 }
+
 td.navtabHL {
-	background-image: url('tab_a.png');
+	background-image: var(--nav-gradient-active-image);
 	background-repeat:repeat-x;
 	padding-right: 6px;
 	padding-left: 6px;
 }
 
 td.navtabHL a, td.navtabHL a:visited {
-	color: #fff;
-	text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0);
+	color: var(--nav-text-hover-color);
+	text-shadow: var(--nav-text-hover-shadow);
 }
 
 a.navtab {
@@ -148,7 +478,7 @@ div.qindex{
 	width: 100%;
 	line-height: 140%;
 	font-size: 130%;
-	color: #A0A0A0;
+	color: var(--index-separator-color);
 }
 
 dt.alphachar{
@@ -157,7 +487,7 @@ dt.alphachar{
 }
 
 .alphachar a{
-	color: black;
+	color: var(--index-header-color);
 }
 
 .alphachar a:hover, .alphachar a:visited{
@@ -176,8 +506,12 @@ dt.alphachar{
 	line-height: 1.15em;
 }
 
+.classindex dl.even {
+	background-color: var(--index-even-item-bg-color);
+}
+
 .classindex dl.odd {
-	background-color: #F8F9FC;
+	background-color: var(--index-odd-item-bg-color);
 }
 
 @media(min-width: 1120px) {
@@ -196,23 +530,19 @@ dt.alphachar{
 /* @group Link Styling */
 
 a {
-	color: #3D578C;
+	color: var(--page-link-color);
 	font-weight: normal;
 	text-decoration: none;
 }
 
 .contents a:visited {
-	color: #4665A2;
+	color: var(--page-visited-link-color);
 }
 
 a:hover {
 	text-decoration: underline;
 }
 
-.contents a.qindexHL:visited {
-        color: #FFFFFF;
-}
-
 a.el {
 	font-weight: bold;
 }
@@ -221,11 +551,11 @@ a.elRef {
 }
 
 a.code, a.code:visited, a.line, a.line:visited {
-	color: #4665A2; 
+	color: var(--code-link-color);
 }
 
 a.codeRef, a.codeRef:visited, a.lineRef, a.lineRef:visited {
-	color: #4665A2; 
+	color: var(--code-external-link-color);
 }
 
 a.code.hl_class { /* style for links to class names in code snippets */ }
@@ -265,6 +595,16 @@ ul {
   overflow: visible;
 }
 
+ul.multicol {
+        -moz-column-gap: 1em;
+        -webkit-column-gap: 1em;
+        column-gap: 1em;
+        -moz-column-count: 3;
+        -webkit-column-count: 3;
+        column-count: 3;
+        list-style-type: none;
+}
+
 #side-nav ul {
   overflow: visible; /* reset ul rule for scroll bar in GENERATE_TREEVIEW window */
 }
@@ -281,30 +621,32 @@ ul {
 }
 
 pre.fragment {
-        border: 1px solid #C4CFE5;
-        background-color: #FBFCFD;
+        border: 1px solid var(--fragment-border-color);
+        background-color: var(--fragment-background-color);
+	color: var(--fragment-foreground-color);
         padding: 4px 6px;
         margin: 4px 8px 4px 2px;
         overflow: auto;
         word-wrap: break-word;
         font-size:  9pt;
         line-height: 125%;
-        font-family: monospace, fixed;
+        font-family: var(--font-family-monospace);
         font-size: 105%;
 }
 
 div.fragment {
-  padding: 0 0 1px 0; /*Fixed: last line underline overlap border*/
-  margin: 4px 8px 4px 2px;
-	background-color: #FBFCFD;
-	border: 1px solid #C4CFE5;
+	padding: 0 0 1px 0; /*Fixed: last line underline overlap border*/
+	margin: 4px 8px 4px 2px;
+	color: var(--fragment-foreground-color);
+	background-color: var(--fragment-background-color);
+	border: 1px solid var(--fragment-border-color);
 }
 
 div.line {
-	font-family: monospace, fixed;
+	font-family: var(--font-family-monospace);
         font-size: 13px;
 	min-height: 13px;
-	line-height: 1.0;
+	line-height: 1.2;
 	text-wrap: unrestricted;
 	white-space: -moz-pre-wrap; /* Moz */
 	white-space: -pre-wrap;     /* Opera 4-6 */
@@ -333,8 +675,8 @@ div.line:after {
 }
 
 div.line.glow {
-	background-color: cyan;
-	box-shadow: 0 0 10px cyan;
+	background-color: var(--glow-color);
+	box-shadow: 0 0 10px var(--glow-color);
 }
 
 
@@ -342,16 +684,19 @@ span.lineno {
 	padding-right: 4px;
         margin-right: 9px;
 	text-align: right;
-	border-right: 2px solid #0F0;
-	background-color: #E8E8E8;
+	border-right: 2px solid var(--fragment-lineno-border-color);
+	color: var(--fragment-lineno-foreground-color);
+	background-color: var(--fragment-lineno-background-color);
         white-space: pre;
 }
-span.lineno a {
-	background-color: #D8D8D8;
+span.lineno a, span.lineno a:visited {
+	color: var(--fragment-lineno-link-fg-color);
+	background-color: var(--fragment-lineno-link-bg-color);
 }
 
 span.lineno a:hover {
-	background-color: #C8C8C8;
+	color: var(--fragment-lineno-link-hover-fg-color);
+	background-color: var(--fragment-lineno-link-hover-bg-color);
 }
 
 .lineno {
@@ -363,24 +708,6 @@ span.lineno a:hover {
 	user-select: none;
 }
 
-div.ah, span.ah {
-	background-color: black;
-	font-weight: bold;
-	color: #FFFFFF;
-	margin-bottom: 3px;
-	margin-top: 3px;
-	padding: 0.2em;
-	border: solid thin #333;
-	border-radius: 0.5em;
-	-webkit-border-radius: .5em;
-	-moz-border-radius: .5em;
-	box-shadow: 2px 2px 3px #999;
-	-webkit-box-shadow: 2px 2px 3px #999;
-	-moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px;
-	background-image: -webkit-gradient(linear, left top, left bottom, from(#eee), to(#000),color-stop(0.3, #444));
-	background-image: -moz-linear-gradient(center top, #eee 0%, #444 40%, #000 110%);
-}
-
 div.classindex ul {
         list-style: none;
         padding-left: 0;
@@ -402,8 +729,7 @@ div.groupText {
 }
 
 body {
-	background-color: white;
-	color: black;
+	color: var(--page-foreground-color);
         margin: 0;
 }
 
@@ -413,29 +739,15 @@ div.contents {
 	margin-right: 8px;
 }
 
-td.indexkey {
-	background-color: #EBEFF6;
-	font-weight: bold;
-	border: 1px solid #C4CFE5;
-	margin: 2px 0px 2px 0;
-	padding: 2px 10px;
-        white-space: nowrap;
-        vertical-align: top;
-}
-
-td.indexvalue {
-	background-color: #EBEFF6;
-	border: 1px solid #C4CFE5;
-	padding: 2px 10px;
-	margin: 2px 0px;
+p.formulaDsp {
+	text-align: center;
 }
 
-tr.memlist {
-	background-color: #EEF1F7;
+img.dark-mode-visible {
+	display: none;
 }
-
-p.formulaDsp {
-	text-align: center;
+img.light-mode-visible {
+	display: none;
 }
 
 img.formulaDsp {
@@ -465,10 +777,11 @@ address.footer {
 img.footer {
 	border: 0px;
 	vertical-align: middle;
+	width: var(--footer-logo-width);
 }
 
 .compoundTemplParams {
-	color: #4665A2;
+	color: var(--memdecl-template-color);
 	font-size: 80%;
 	line-height: 120%;
 }
@@ -476,84 +789,62 @@ img.footer {
 /* @group Code Colorization */
 
 span.keyword {
-	color: #008000
+	color: var(--code-keyword-color);
 }
 
 span.keywordtype {
-	color: #604020
+	color: var(--code-type-keyword-color);
 }
 
 span.keywordflow {
-	color: #e08000
+	color: var(--code-flow-keyword-color);
 }
 
 span.comment {
-	color: #800000
+	color: var(--code-comment-color);
 }
 
 span.preprocessor {
-	color: #806020
+	color: var(--code-preprocessor-color);
 }
 
 span.stringliteral {
-	color: #002080
+	color: var(--code-string-literal-color);
 }
 
 span.charliteral {
-	color: #008080
+	color: var(--code-char-literal-color);
+}
+
+span.xmlcdata {
+	color: var(--code-xml-cdata-color);
 }
 
 span.vhdldigit { 
-	color: #ff00ff 
+	color: var(--code-vhdl-digit-color);
 }
 
 span.vhdlchar { 
-	color: #000000 
+	color: var(--code-vhdl-char-color);
 }
 
 span.vhdlkeyword { 
-	color: #700070 
+	color: var(--code-vhdl-keyword-color);
 }
 
 span.vhdllogic { 
-	color: #ff0000 
+	color: var(--code-vhdl-logic-color);
 }
 
 blockquote {
-        background-color: #F7F8FB;
-        border-left: 2px solid #9CAFD4;
+        background-color: var(--blockquote-background-color);
+        border-left: 2px solid var(--blockquote-border-color);
         margin: 0 24px 0 4px;
         padding: 0 12px 0 16px;
 }
 
-blockquote.DocNodeRTL {
-   border-left: 0;
-   border-right: 2px solid #9CAFD4;
-   margin: 0 4px 0 24px;
-   padding: 0 16px 0 12px;
-}
-
 /* @end */
 
-/*
-.search {
-	color: #003399;
-	font-weight: bold;
-}
-
-form.search {
-	margin-bottom: 0px;
-	margin-top: 0px;
-}
-
-input.search {
-	font-size: 75%;
-	color: #000080;
-	font-weight: normal;
-	background-color: #e8eef2;
-}
-*/
-
 td.tiny {
 	font-size: 75%;
 }
@@ -561,18 +852,19 @@ td.tiny {
 .dirtab {
 	padding: 4px;
 	border-collapse: collapse;
-	border: 1px solid #A3B4D7;
+	border: 1px solid var(--table-cell-border-color);
 }
 
 th.dirtab {
-	background: #EBEFF6;
+	background-color: var(--table-header-background-color);
+	color: var(--table-header-foreground-color);
 	font-weight: bold;
 }
 
 hr {
 	height: 0px;
 	border: none;
-	border-top: 1px solid #4A6AAA;
+	border-top: 1px solid var(--separator-color);
 }
 
 hr.footer {
@@ -600,14 +892,14 @@ table.memberdecls {
 }
 
 .memberdecls td.glow, .fieldtable tr.glow {
-	background-color: cyan;
-	box-shadow: 0 0 15px cyan;
+	background-color: var(--glow-color);
+	box-shadow: 0 0 15px var(--glow-color);
 }
 
 .mdescLeft, .mdescRight,
 .memItemLeft, .memItemRight,
 .memTemplItemLeft, .memTemplItemRight, .memTemplParams {
-	background-color: #F9FAFC;
+	background-color: var(--memdecl-background-color);
 	border: none;
 	margin: 4px;
 	padding: 1px 0 0 8px;
@@ -615,11 +907,11 @@ table.memberdecls {
 
 .mdescLeft, .mdescRight {
 	padding: 0px 8px 4px 8px;
-	color: #555;
+	color: var(--memdecl-foreground-color);
 }
 
 .memSeparator {
-        border-bottom: 1px solid #DEE4F0;
+        border-bottom: 1px solid var(--memdecl-separator-color);
         line-height: 1px;
         margin: 0px;
         padding: 0px;
@@ -634,7 +926,7 @@ table.memberdecls {
 }
 
 .memTemplParams {
-	color: #4665A2;
+	color: var(--memdecl-template-color);
         white-space: nowrap;
 	font-size: 80%;
 }
@@ -647,15 +939,15 @@ table.memberdecls {
 
 .memtitle {
 	padding: 8px;
-	border-top: 1px solid #A8B8D9;
-	border-left: 1px solid #A8B8D9;
-	border-right: 1px solid #A8B8D9;
+	border-top: 1px solid var(--memdef-border-color);
+	border-left: 1px solid var(--memdef-border-color);
+	border-right: 1px solid var(--memdef-border-color);
 	border-top-right-radius: 4px;
 	border-top-left-radius: 4px;
 	margin-bottom: -1px;
-	background-image: url('nav_f.png');
+	background-image: var(--memdef-title-gradient-image);
 	background-repeat: repeat-x;
-	background-color: #E2E8F2;
+	background-color: var(--memdef-title-background-color);
 	line-height: 1.25;
 	font-weight: 300;
 	float:left;
@@ -670,20 +962,11 @@ table.memberdecls {
 
 .memtemplate {
 	font-size: 80%;
-	color: #4665A2;
+	color: var(--memdef-template-color);
 	font-weight: normal;
 	margin-left: 9px;
 }
 
-.memnav {
-	background-color: #EBEFF6;
-	border: 1px solid #A3B4D7;
-	text-align: center;
-	margin: 2px;
-	margin-right: 15px;
-	padding: 2px;
-}
-
 .mempage {
 	width: 100%;
 }
@@ -702,7 +985,7 @@ table.memberdecls {
 }
 
 .memitem.glow {
-         box-shadow: 0 0 15px cyan;
+         box-shadow: 0 0 15px var(--glow-color);
 }
 
 .memname {
@@ -715,41 +998,32 @@ table.memberdecls {
 }
 
 .memproto, dl.reflist dt {
-        border-top: 1px solid #A8B8D9;
-        border-left: 1px solid #A8B8D9;
-        border-right: 1px solid #A8B8D9;
+        border-top: 1px solid var(--memdef-border-color);
+        border-left: 1px solid var(--memdef-border-color);
+        border-right: 1px solid var(--memdef-border-color);
         padding: 6px 0px 6px 0px;
-        color: #253555;
+        color: var(--memdef-proto-text-color);
         font-weight: bold;
-        text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9);
-        background-color: #DFE5F1;
-        /* opera specific markup */
+        text-shadow: var(--memdef-proto-text-shadow);
+        background-color: var(--memdef-proto-background-color);
         box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15);
         border-top-right-radius: 4px;
-        /* firefox specific markup */
-        -moz-box-shadow: rgba(0, 0, 0, 0.15) 5px 5px 5px;
-        -moz-border-radius-topright: 4px;
-        /* webkit specific markup */
-        -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15);
-        -webkit-border-top-right-radius: 4px;
-
 }
 
 .overload {
-        font-family: "courier new",courier,monospace;
+        font-family: var(--font-family-monospace);
 	font-size: 65%;
 }
 
 .memdoc, dl.reflist dd {
-        border-bottom: 1px solid #A8B8D9;      
-        border-left: 1px solid #A8B8D9;      
-        border-right: 1px solid #A8B8D9; 
+        border-bottom: 1px solid var(--memdef-border-color);
+        border-left: 1px solid var(--memdef-border-color);
+        border-right: 1px solid var(--memdef-border-color);
         padding: 6px 10px 2px 10px;
-        background-color: #FBFCFD;
         border-top-width: 0;
         background-image:url('nav_g.png');
         background-repeat:repeat-x;
-        background-color: #FFFFFF;
+        background-color: var(--memdef-doc-background-color);
         /* opera specific markup */
         border-bottom-left-radius: 4px;
         border-bottom-right-radius: 4px;
@@ -782,7 +1056,7 @@ dl.reflist dd {
 }
 
 .paramname {
-	color: #602020;
+	color: var(--memdef-param-name-color);
 	white-space: nowrap;
 }
 .paramname em {
@@ -795,20 +1069,20 @@ dl.reflist dd {
 .params, .retval, .exception, .tparams {
         margin-left: 0px;
         padding-left: 0px;
-}       
+}
 
 .params .paramname, .retval .paramname, .tparams .paramname, .exception .paramname {
         font-weight: bold;
         vertical-align: top;
 }
-        
+
 .params .paramtype, .tparams .paramtype {
         font-style: italic;
         vertical-align: top;
-}       
-        
+}
+
 .params .paramdir, .tparams .paramdir {
-        font-family: "courier new",courier,monospace;
+        font-family: var(--font-family-monospace);
         vertical-align: top;
 }
 
@@ -832,13 +1106,13 @@ span.mlabels {
 }
 
 span.mlabel {
-        background-color: #728DC1;
-        border-top:1px solid #5373B4;
-        border-left:1px solid #5373B4;
-        border-right:1px solid #C4CFE5;
-        border-bottom:1px solid #C4CFE5;
+        background-color: var(--label-background-color);
+        border-top:1px solid var(--label-left-top-border-color);
+        border-left:1px solid var(--label-left-top-border-color);
+        border-right:1px solid var(--label-right-bottom-border-color);
+        border-bottom:1px solid var(--label-right-bottom-border-color);
 	text-shadow: none;
-	color: white;
+	color: var(--label-foreground-color);
 	margin-right: 4px;
 	padding: 2px 3px;
 	border-radius: 3px;
@@ -855,8 +1129,8 @@ span.mlabel {
 
 div.directory {
         margin: 10px 0px;
-        border-top: 1px solid #9CAFD4;
-        border-bottom: 1px solid #9CAFD4;
+        border-top: 1px solid var(--directory-separator-color);
+        border-bottom: 1px solid var(--directory-separator-color);
         width: 100%;
 }
 
@@ -892,9 +1166,14 @@ div.directory {
 	border-left: 1px solid rgba(0,0,0,0.05);
 }
 
+.directory tr.odd {
+	padding-left: 6px;
+	background-color: var(--index-odd-item-bg-color);
+}
+
 .directory tr.even {
 	padding-left: 6px;
-	background-color: #F7F8FB;
+	background-color: var(--index-even-item-bg-color);
 }
 
 .directory img {
@@ -912,11 +1191,11 @@ div.directory {
         cursor: pointer;
         padding-left: 2px;
         padding-right: 2px;
-	color: #3D578C;
+	color: var(--page-link-color);
 }
 
 .arrow {
-    color: #9CAFD4;
+    color: var(--nav-arrow-color);
     -webkit-user-select: none;
     -khtml-user-select: none;
     -moz-user-select: none;
@@ -930,14 +1209,15 @@ div.directory {
 }
 
 .icon {
-    font-family: Arial, Helvetica;
+    font-family: var(--font-family-icon);
+    line-height: normal;
     font-weight: bold;
     font-size: 12px;
     height: 14px;
     width: 16px;
     display: inline-block;
-    background-color: #728DC1;
-    color: white;
+    background-color: var(--icon-background-color);
+    color: var(--icon-foreground-color);
     text-align: center;
     border-radius: 4px;
     margin-left: 2px;
@@ -954,8 +1234,7 @@ div.directory {
     width: 24px;
     height: 18px;
     margin-bottom: 4px;
-    background-image:url('folderopen.png');
-    background-position: 0px -4px;
+    background-image:var(--icon-folder-open-image);
     background-repeat: repeat-y;
     vertical-align:top;
     display: inline-block;
@@ -965,8 +1244,7 @@ div.directory {
     width: 24px;
     height: 18px;
     margin-bottom: 4px;
-    background-image:url('folderclosed.png');
-    background-position: 0px -4px;
+    background-image:var(--icon-folder-closed-image);
     background-repeat: repeat-y;
     vertical-align:top;
     display: inline-block;
@@ -976,17 +1254,13 @@ div.directory {
     width: 24px;
     height: 18px;
     margin-bottom: 4px;
-    background-image:url('doc.png');
+    background-image:var(--icon-doc-image);
     background-position: 0px -4px;
     background-repeat: repeat-y;
     vertical-align:top;
     display: inline-block;
 }
 
-table.directory {
-    font: 400 14px Roboto,sans-serif;
-}
-
 /* @end */
 
 div.dynheader {
@@ -1001,7 +1275,7 @@ div.dynheader {
 
 address {
 	font-style: normal;
-	color: #2A3D61;
+	color: var(--footer-foreground-color);
 }
 
 table.doxtable caption {
@@ -1015,28 +1289,23 @@ table.doxtable {
 }
 
 table.doxtable td, table.doxtable th {
-	border: 1px solid #2D4068;
+	border: 1px solid var(--table-cell-border-color);
 	padding: 3px 7px 2px;
 }
 
 table.doxtable th {
-	background-color: #374F7F;
-	color: #FFFFFF;
+	background-color: var(--table-header-background-color);
+	color: var(--table-header-foreground-color);
 	font-size: 110%;
 	padding-bottom: 4px;
 	padding-top: 5px;
 }
 
 table.fieldtable {
-        /*width: 100%;*/
         margin-bottom: 10px;
-        border: 1px solid #A8B8D9;
+        border: 1px solid var(--memdef-border-color);
         border-spacing: 0px;
-        -moz-border-radius: 4px;
-        -webkit-border-radius: 4px;
         border-radius: 4px;
-        -moz-box-shadow: rgba(0, 0, 0, 0.15) 2px 2px 2px;
-        -webkit-box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15);
         box-shadow: 2px 2px 2px rgba(0, 0, 0, 0.15);
 }
 
@@ -1046,8 +1315,8 @@ table.fieldtable {
 
 .fieldtable td.fieldtype, .fieldtable td.fieldname {
         white-space: nowrap;
-        border-right: 1px solid #A8B8D9;
-        border-bottom: 1px solid #A8B8D9;
+        border-right: 1px solid var(--memdef-border-color);
+        border-bottom: 1px solid var(--memdef-border-color);
         vertical-align: top;
 }
 
@@ -1056,14 +1325,13 @@ table.fieldtable {
 }
 
 .fieldtable td.fielddoc {
-        border-bottom: 1px solid #A8B8D9;
-        /*width: 100%;*/
+        border-bottom: 1px solid var(--memdef-border-color);
 }
 
 .fieldtable td.fielddoc p:first-child {
         margin-top: 0px;
-}       
-        
+}
+
 .fieldtable td.fielddoc p:last-child {
         margin-bottom: 2px;
 }
@@ -1073,22 +1341,18 @@ table.fieldtable {
 }
 
 .fieldtable th {
-        background-image:url('nav_f.png');
+        background-image: var(--memdef-title-gradient-image);
         background-repeat:repeat-x;
-        background-color: #E2E8F2;
+        background-color: var(--memdef-title-background-color);
         font-size: 90%;
-        color: #253555;
+        color: var(--memdef-proto-text-color);
         padding-bottom: 4px;
         padding-top: 5px;
         text-align:left;
         font-weight: 400;
-        -moz-border-radius-topleft: 4px;
-        -moz-border-radius-topright: 4px;
-        -webkit-border-top-left-radius: 4px;
-        -webkit-border-top-right-radius: 4px;
         border-top-left-radius: 4px;
         border-top-right-radius: 4px;
-        border-bottom: 1px solid #A8B8D9;
+        border-bottom: 1px solid var(--memdef-border-color);
 }
 
 
@@ -1096,7 +1360,7 @@ table.fieldtable {
 	top: 0px;
 	left: 10px;
 	height: 36px;
-	background-image: url('tab_b.png');
+	background-image: var(--nav-gradient-image);
 	z-index: 101;
 	overflow: hidden;
 	font-size: 13px;
@@ -1105,13 +1369,13 @@ table.fieldtable {
 .navpath ul
 {
 	font-size: 11px;
-	background-image:url('tab_b.png');
+	background-image: var(--nav-gradient-image);
 	background-repeat:repeat-x;
 	background-position: 0 -5px;
 	height:30px;
 	line-height:30px;
-	color:#8AA0CC;
-	border:solid 1px #C2CDE4;
+	color:var(--nav-text-normal-color);
+	border:solid 1px var(--nav-breadcrumb-border-color);
 	overflow:hidden;
 	margin:0px;
 	padding:0px;
@@ -1123,10 +1387,10 @@ table.fieldtable {
 	float:left;
 	padding-left:10px;
 	padding-right:15px;
-	background-image:url('bc_s.png');
+	background-image:var(--nav-breadcrumb-image);
 	background-repeat:no-repeat;
 	background-position:right;
-	color:#364D7C;
+	color: var(--nav-foreground-color);
 }
 
 .navpath li.navelem a
@@ -1135,15 +1399,16 @@ table.fieldtable {
 	display:block;
 	text-decoration: none;
 	outline: none;
-	color: #283A5D;
-	font-family: 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif;
-	text-shadow: 0px 1px 1px rgba(255, 255, 255, 0.9);
-	text-decoration: none;        
+	color: var(--nav-text-normal-color);
+	font-family: var(--font-family-nav);
+	text-shadow: var(--nav-text-normal-shadow);
+	text-decoration: none;
 }
 
 .navpath li.navelem a:hover
 {
-	color:#6884BD;
+	color: var(--nav-text-hover-color);
+	text-shadow: var(--nav-text-hover-shadow);
 }
 
 .navpath li.footer
@@ -1155,7 +1420,7 @@ table.fieldtable {
         background-image:none;
         background-repeat:no-repeat;
         background-position:right;
-        color:#364D7C;
+        color: var(--footer-foreground-color);
         font-size: 8pt;
 }
 
@@ -1167,7 +1432,7 @@ div.summary
 	padding-right: 5px;
 	width: 50%;
 	text-align: right;
-}       
+}
 
 div.summary a
 {
@@ -1182,7 +1447,7 @@ table.classindex
         margin-right: 3%;
         width: 94%;
         border: 0;
-        border-spacing: 0; 
+        border-spacing: 0;
         padding: 0;
 }
 
@@ -1200,11 +1465,11 @@ div.ingroups a
 
 div.header
 {
-        background-image:url('nav_h.png');
+        background-image: var(--header-gradient-image);
         background-repeat:repeat-x;
-	background-color: #F9FAFC;
+	background-color: var(--header-background-color);
 	margin:  0px;
-	border-bottom: 1px solid #C4CFE5;
+	border-bottom: 1px solid var(--header-separator-color);
 }
 
 div.headertitle
@@ -1227,11 +1492,6 @@ dl.section {
 	padding-left: 0px;
 }
 
-dl.section.DocNodeRTL {
-  margin-right: 0px;
-  padding-right: 0px;
-}
-
 dl.note {
   margin-left: -7px;
   padding-left: 3px;
@@ -1239,16 +1499,6 @@ dl.note {
   border-color: #D0C000;
 }
 
-dl.note.DocNodeRTL {
-  margin-left: 0;
-  padding-left: 0;
-  border-left: 0;
-  margin-right: -7px;
-  padding-right: 3px;
-  border-right: 4px solid;
-  border-color: #D0C000;
-}
-
 dl.warning, dl.attention {
   margin-left: -7px;
   padding-left: 3px;
@@ -1256,16 +1506,6 @@ dl.warning, dl.attention {
   border-color: #FF0000;
 }
 
-dl.warning.DocNodeRTL, dl.attention.DocNodeRTL {
-  margin-left: 0;
-  padding-left: 0;
-  border-left: 0;
-  margin-right: -7px;
-  padding-right: 3px;
-  border-right: 4px solid;
-  border-color: #FF0000;
-}
-
 dl.pre, dl.post, dl.invariant {
   margin-left: -7px;
   padding-left: 3px;
@@ -1273,16 +1513,6 @@ dl.pre, dl.post, dl.invariant {
   border-color: #00D000;
 }
 
-dl.pre.DocNodeRTL, dl.post.DocNodeRTL, dl.invariant.DocNodeRTL {
-  margin-left: 0;
-  padding-left: 0;
-  border-left: 0;
-  margin-right: -7px;
-  padding-right: 3px;
-  border-right: 4px solid;
-  border-color: #00D000;
-}
-
 dl.deprecated {
   margin-left: -7px;
   padding-left: 3px;
@@ -1290,16 +1520,6 @@ dl.deprecated {
   border-color: #505050;
 }
 
-dl.deprecated.DocNodeRTL {
-  margin-left: 0;
-  padding-left: 0;
-  border-left: 0;
-  margin-right: -7px;
-  padding-right: 3px;
-  border-right: 4px solid;
-  border-color: #505050;
-}
-
 dl.todo {
   margin-left: -7px;
   padding-left: 3px;
@@ -1307,16 +1527,6 @@ dl.todo {
   border-color: #00C0E0;
 }
 
-dl.todo.DocNodeRTL {
-  margin-left: 0;
-  padding-left: 0;
-  border-left: 0;
-  margin-right: -7px;
-  padding-right: 3px;
-  border-right: 4px solid;
-  border-color: #00C0E0;
-}
-
 dl.test {
   margin-left: -7px;
   padding-left: 3px;
@@ -1324,16 +1534,6 @@ dl.test {
   border-color: #3030E0;
 }
 
-dl.test.DocNodeRTL {
-  margin-left: 0;
-  padding-left: 0;
-  border-left: 0;
-  margin-right: -7px;
-  padding-right: 3px;
-  border-right: 4px solid;
-  border-color: #3030E0;
-}
-
 dl.bug {
   margin-left: -7px;
   padding-left: 3px;
@@ -1341,16 +1541,6 @@ dl.bug {
   border-color: #C08050;
 }
 
-dl.bug.DocNodeRTL {
-  margin-left: 0;
-  padding-left: 0;
-  border-left: 0;
-  margin-right: -7px;
-  padding-right: 3px;
-  border-right: 4px solid;
-  border-color: #C08050;
-}
-
 dl.section dd {
 	margin-bottom: 6px;
 }
@@ -1381,21 +1571,24 @@ dl.section dd {
 
 #projectname
 {
-	font: 200% Tahoma, Arial,sans-serif;
+	font-size: 200%;
+	font-family: var(--font-family-title);
 	margin: 0px;
 	padding: 2px 0px;
 }
-    
+
 #projectbrief
 {
-	font: 90% Tahoma, Arial,sans-serif;
+	font-size: 90%;
+        font-family: var(--font-family-title);
 	margin: 0px;
 	padding: 0px;
 }
 
 #projectnumber
 {
-	font: 50% Tahoma, Arial,sans-serif;
+	font-size: 50%;
+	font-family: 50% var(--font-family-title);
 	margin: 0px;
 	padding: 0px;
 }
@@ -1405,7 +1598,8 @@ dl.section dd {
 	padding: 0px;
 	margin: 0px;
 	width: 100%;
-	border-bottom: 1px solid #5373B4;
+	border-bottom: 1px solid var(--title-separator-color);
+	background-color: var(--title-background-color);
 }
 
 .image
@@ -1438,17 +1632,12 @@ dl.section dd {
 	font-weight: bold;
 }
 
-div.zoom
-{
-	border: 1px solid #90A5CE;
-}
-
 dl.citelist {
         margin-bottom:50px;
 }
 
 dl.citelist dt {
-        color:#334975;
+        color:var(--citation-label-color);
         float:left;
         font-weight:bold;
         margin-right:10px;
@@ -1464,8 +1653,8 @@ dl.citelist dd {
 
 div.toc {
         padding: 14px 25px;
-        background-color: #F4F6FA;
-        border: 1px solid #D8DFEE;
+        background-color: var(--toc-background-color);
+        border: 1px solid var(--toc-border-color);
         border-radius: 7px 7px 7px 7px;
         float: right;
         height: auto;
@@ -1473,28 +1662,17 @@ div.toc {
         width: 200px;
 }
 
-.PageDocRTL-title div.toc {
-  float: left !important;
-  text-align: right;
-}
-
 div.toc li {
-        background: url("bdwn.png") no-repeat scroll 0 5px transparent;
-        font: 10px/1.2 Verdana,DejaVu Sans,Geneva,sans-serif;
+        background: var(--toc-down-arrow-image) no-repeat scroll 0 5px transparent;
+        font: 10px/1.2 var(--font-family-toc);
         margin-top: 5px;
         padding-left: 10px;
         padding-top: 2px;
 }
 
-.PageDocRTL-title div.toc li {
-  background-position-x: right !important;
-  padding-left: 0 !important;
-  padding-right: 10px;
-}
-
 div.toc h3 {
-        font: bold 12px/1.2 Arial,FreeSans,sans-serif;
-	color: #4665A2;
+        font: bold 12px/1.2 var(--font-family-toc);
+	color: var(--toc-header-color);
         border-bottom: 0 none;
         margin: 0;
 }
@@ -1503,7 +1681,7 @@ div.toc ul {
         list-style: none outside none;
         border: medium none;
         padding: 0px;
-}       
+}
 
 div.toc li.level1 {
         margin-left: 0px;
@@ -1514,11 +1692,11 @@ div.toc li.level2 {
 }
 
 div.toc li.level3 {
-        margin-left: 30px;
+        margin-left: 15px;
 }
 
 div.toc li.level4 {
-        margin-left: 45px;
+        margin-left: 15px;
 }
 
 span.emoji {
@@ -1531,29 +1709,9 @@ span.obfuscator {
   display: none;
 }
 
-.PageDocRTL-title div.toc li.level1 {
-  margin-left: 0 !important;
-  margin-right: 0;
-}
-
-.PageDocRTL-title div.toc li.level2 {
-  margin-left: 0 !important;
-  margin-right: 15px;
-}
-
-.PageDocRTL-title div.toc li.level3 {
-  margin-left: 0 !important;
-  margin-right: 30px;
-}
-
-.PageDocRTL-title div.toc li.level4 {
-  margin-left: 0 !important;
-  margin-right: 45px;
-}
-
 .inherit_header {
         font-weight: bold;
-        color: gray;
+        color: var(--inherit-header-color);
         cursor: pointer;
 	-webkit-touch-callout: none;
 	-webkit-user-select: none;
@@ -1586,10 +1744,11 @@ tr.heading h2 {
 #powerTip {
 	cursor: default;
 	/*white-space: nowrap;*/
-	background-color: white;
-	border: 1px solid gray;
+        color: var(--tooltip-foreground-color);
+	background-color: var(--tooltip-background-color);
+	border: 1px solid var(--tooltip-border-color);
 	border-radius: 4px 4px 4px 4px;
-	box-shadow: 1px 1px 7px gray;
+	box-shadow: var(--tooltip-shadow);
 	display: none;
 	font-size: smaller;
 	max-width: 80%;
@@ -1600,7 +1759,7 @@ tr.heading h2 {
 }
 
 #powerTip div.ttdoc {
-        color: grey;
+        color: var(--tooltip-doc-color);
 	font-style: italic;
 }
 
@@ -1608,18 +1767,24 @@ tr.heading h2 {
         font-weight: bold;
 }
 
+#powerTip a {
+	color: var(--tooltip-link-color);
+}
+
 #powerTip div.ttname {
         font-weight: bold;
 }
 
 #powerTip div.ttdeci {
-        color: #006318;
+        color: var(--tooltip-declaration-color);
 }
 
 #powerTip div {
         margin: 0px;
         padding: 0px;
-        font: 12px/16px Roboto,sans-serif;
+        font-size: 12px;
+       	font-family: var(--font-family-tooltip);
+	line-height: 16px;
 }
 
 #powerTip:before, #powerTip:after {
@@ -1664,12 +1829,12 @@ tr.heading h2 {
 }
 
 #powerTip.n:after, #powerTip.ne:after, #powerTip.nw:after {
-	border-top-color: #FFFFFF;
+	border-top-color: var(--tooltip-background-color);
 	border-width: 10px;
 	margin: 0px -10px;
 }
-#powerTip.n:before {
-	border-top-color: #808080;
+#powerTip.n:before, #powerTip.ne:before, #powerTip.nw:before {
+	border-top-color: var(--tooltip-border-color);
 	border-width: 11px;
 	margin: 0px -11px;
 }
@@ -1692,13 +1857,13 @@ tr.heading h2 {
 }
 
 #powerTip.s:after, #powerTip.se:after, #powerTip.sw:after {
-	border-bottom-color: #FFFFFF;
+	border-bottom-color: var(--tooltip-background-color);
 	border-width: 10px;
 	margin: 0px -10px;
 }
 
 #powerTip.s:before, #powerTip.se:before, #powerTip.sw:before {
-	border-bottom-color: #808080;
+	border-bottom-color: var(--tooltip-border-color);
 	border-width: 11px;
 	margin: 0px -11px;
 }
@@ -1719,13 +1884,13 @@ tr.heading h2 {
 	left: 100%;
 }
 #powerTip.e:after {
-	border-left-color: #FFFFFF;
+	border-left-color: var(--tooltip-border-color);
 	border-width: 10px;
 	top: 50%;
 	margin-top: -10px;
 }
 #powerTip.e:before {
-	border-left-color: #808080;
+	border-left-color: var(--tooltip-border-color);
 	border-width: 11px;
 	top: 50%;
 	margin-top: -11px;
@@ -1735,13 +1900,13 @@ tr.heading h2 {
 	right: 100%;
 }
 #powerTip.w:after {
-	border-right-color: #FFFFFF;
+	border-right-color: var(--tooltip-border-color);
 	border-width: 10px;
 	top: 50%;
 	margin-top: -10px;
 }
 #powerTip.w:before {
-	border-right-color: #808080;
+	border-right-color: var(--tooltip-border-color);
 	border-width: 11px;
 	top: 50%;
 	margin-top: -11px;
@@ -1775,7 +1940,7 @@ table.markdownTable {
 }
 
 table.markdownTable td, table.markdownTable th {
-	border: 1px solid #2D4068;
+	border: 1px solid var(--table-cell-border-color);
 	padding: 3px 7px 2px;
 }
 
@@ -1783,8 +1948,8 @@ table.markdownTable tr {
 }
 
 th.markdownTableHeadLeft, th.markdownTableHeadRight, th.markdownTableHeadCenter, th.markdownTableHeadNone {
-	background-color: #374F7F;
-	color: #FFFFFF;
+	background-color: var(--table-header-background-color);
+	color: var(--table-header-foreground-color);
 	font-size: 110%;
 	padding-bottom: 4px;
 	padding-top: 5px;
@@ -1802,40 +1967,51 @@ th.markdownTableHeadCenter, td.markdownTableBodyCenter {
 	text-align: center
 }
 
-.DocNodeRTL {
-  text-align: right;
-  direction: rtl;
+tt, code, kbd, samp
+{
+  display: inline-block;
 }
+/* @end */
 
-.DocNodeLTR {
-  text-align: left;
-  direction: ltr;
+u {
+	text-decoration: underline;
 }
 
-table.DocNodeRTL {
-   width: auto;
-   margin-right: 0;
-   margin-left: auto;
+details>summary {
+  list-style-type: none;
 }
 
-table.DocNodeLTR {
-   width: auto;
-   margin-right: auto;
-   margin-left: 0;
+details > summary::-webkit-details-marker {
+    display: none;
 }
 
-code.JavaDocCode {
-  direction:ltr;
+details>summary::before {
+    content: "\25ba";
+    padding-right:4px;
+    font-size: 80%;
 }
 
-tt, code, kbd, samp
-{
-  display: inline-block;
-  direction:ltr; 
+details[open]>summary::before {
+    content: "\25bc";
+    padding-right:4px;
+    font-size: 80%;
 }
-/* @end */
 
-u {
-	text-decoration: underline;
+body {
+    scrollbar-color: var(--scrollbar-thumb-color) var(--scrollbar-background-color);
+}
+
+::-webkit-scrollbar {
+        background-color: var(--scrollbar-background-color);
+        height: 12px;
+        width: 12px;
+}
+::-webkit-scrollbar-thumb {
+        border-radius: 6px;
+        box-shadow: inset 0 0 12px 12px var(--scrollbar-thumb-color);
+        border: solid 2px transparent;
+}
+::-webkit-scrollbar-corner {
+        background-color: var(--scrollbar-background-color);
 }
 
diff --git a/docs/doxygen.png b/docs/doxygen.png
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diff --git a/docs/doxygen.svg b/docs/doxygen.svg
index d42dad52..79a76354 100644
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diff --git a/docs/dynsections.js b/docs/dynsections.js
index 3174bd7b..f579fbf3 100644
--- a/docs/dynsections.js
+++ b/docs/dynsections.js
@@ -47,6 +47,8 @@ function updateStripes()
 {
   $('table.directory tr').
        removeClass('even').filter(':visible:even').addClass('even');
+  $('table.directory tr').
+       removeClass('odd').filter(':visible:odd').addClass('odd');
 }
 
 function toggleLevel(level)
diff --git a/docs/files.html b/docs/files.html
index fed43084..53d5bbd3 100644
--- a/docs/files.html
+++ b/docs/files.html
@@ -3,7 +3,7 @@
 <head>
 <meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
 <meta http-equiv="X-UA-Compatible" content="IE=11"/>
-<meta name="generator" content="Doxygen 1.9.5"/>
+<meta name="generator" content="Doxygen 1.9.7"/>
 <meta name="viewport" content="width=device-width, initial-scale=1"/>
 <title>intel-ipsec-mb: File List</title>
 <link href="tabs.css" rel="stylesheet" type="text/css"/>
@@ -30,17 +30,14 @@
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 </div><!--header-->
 <div class="contents">
-<div class="textblock"><p ><a class="anchor" id="md__home_eurquhar_ipsec_mb_README"></a> <a href="https://scan.coverity.com/projects/intel-ipsec-mb"><img src="https://scan.coverity.com/projects/16449/badge.svg" alt="Coverity Status" style="pointer-events: none;" class="inline"/></a> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_gcc.yml/badge.svg" alt="Linux Build Shared gcc" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_static_gcc.yml/badge.svg" alt="Linux Build Static gcc" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_clang.yml/badge.svg" alt="Linux Build Shared clang" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_static_clang.yml/badge.svg" alt="Linux Build Static clang" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_clang_aesni_emu.yml/badge.svg" alt="Linux Build Shared clang AESNI emulation" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/freebsd_build_shared_clang.yml/badge.svg" alt="FreeBSD Build Shared clang" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/freebsd_build_shared_gcc.yml/badge.svg" alt="FreeBSD Build Shared gcc" style="pointer-events: none;" class="inline"/></p>
+<div class="textblock"><p><a class="anchor" id="md_C_1_2Users_2mdcornu_2dev_2libraries_8performance_8ipsec-mb_2README"></a> <a href="https://scan.coverity.com/projects/intel-ipsec-mb"><img src="https://scan.coverity.com/projects/16449/badge.svg" alt="Coverity Status" style="pointer-events: none;" class="inline"/></a> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_gcc.yml/badge.svg" alt="Linux Build Shared gcc" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_static_gcc.yml/badge.svg" alt="Linux Build Static gcc" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_clang.yml/badge.svg" alt="Linux Build Shared clang" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_static_clang.yml/badge.svg" alt="Linux Build Static clang" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_clang_aesni_emu.yml/badge.svg" alt="Linux Build Shared clang AESNI emulation" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/freebsd_build_shared_clang.yml/badge.svg" alt="FreeBSD Build Shared clang" style="pointer-events: none;" class="inline"/> <img src="https://github.com/intel/intel-ipsec-mb/actions/workflows/freebsd_build_shared_gcc.yml/badge.svg" alt="FreeBSD Build Shared gcc" style="pointer-events: none;" class="inline"/></p>
 <h1><a class="anchor" id="autotoc_md0"></a>
 Intel(R) Multi-Buffer Crypto for IPsec Library</h1>
-<p >The library provides software crypto acceleration primarily targeting packet processing applications. It can be used for application such as: IPsec, TLS, Wireless (RAN), Cable or MPEG DRM.</p>
-<p >The library is hosted on <a href="https://github.com/intel/intel-ipsec-mb">GitHub</a> and is used as software crypto provider in <a href="https://www.dpdk.org/">DPDK</a>, <a href="https://github.com/intel/QAT_Engine">Intel(R) QAT Engine</a> and <a href="https://fd.io/">FD.io</a>.</p>
-<p >Using crypto interfaces from the above frameworks gives freedom to change providers without subsequent application modifications. The library can also be used directly through its native API.</p>
-<p >Key differentiating features:</p>
+<p>The library provides software crypto acceleration primarily targeting packet processing applications. It can be used for application such as: IPsec, TLS, Wireless (RAN), Cable or MPEG DRM.</p>
+<p>The library is hosted on <a href="https://github.com/intel/intel-ipsec-mb">GitHub</a> and is used as software crypto provider in <a href="https://www.dpdk.org/">DPDK</a>, <a href="https://github.com/intel/QAT_Engine">Intel(R) QAT Engine</a> and <a href="https://fd.io/">FD.io</a>.</p>
+<p>Using crypto interfaces from the above frameworks gives freedom to change providers without subsequent application modifications. The library can also be used directly through its native API.</p>
+<p>Key differentiating features:</p>
 <ul>
 <li>operation chaining (encryption and authentication)</li>
 <li>advanced cryptographic pipelining<ul>
@@ -112,8 +116,8 @@ Intel(R) Multi-Buffer Crypto for IPsec Library</h1>
 <li>multi-buffer and function stitching innovations</li>
 <li>low level implementations using latest instruction extensions</li>
 </ul>
-<h1><a class="anchor" id="autotoc_md1"></a>
-Contents</h1>
+<h2><a class="anchor" id="autotoc_md1"></a>
+Contents</h2>
 <ol type="1">
 <li>Overview</li>
 <li>Processor Extensions</li>
@@ -126,20 +130,22 @@ Contents</h1>
 <li>Backwards compatibility</li>
 <li>Disclaimer (ZUC, KASUMI, SNOW3G)</li>
 <li>Legal Disclaimer</li>
+<li>FIPS Compliance</li>
+<li>DLL Injection</li>
 </ol>
-<h1><a class="anchor" id="autotoc_md2"></a>
-1. Overview</h1>
-<p >Intel Multi-Buffer Crypto for IPsec Library is highly-optimized software implementations of the core cryptographic processing for IPsec, which provides industry-leading performance on a range of Intel(R) Processors.</p>
-<p >For information on how the library works, see the Intel White Paper: "Fast Multi-buffer IPsec Implementations on Intel Architecture Processors". Jim Guilford, Sean Gulley, et. al.</p>
-<p >The easiest way to find it is to search the Internet for the title and Intel White Paper.</p>
-<p >Table 1. List of supported cipher algorithms and their implementations. </p><div class="fragment"><div class="line">+----------------------------------------------------------------------+</div>
+<h2><a class="anchor" id="autotoc_md2"></a>
+1. Overview</h2>
+<p>Intel Multi-Buffer Crypto for IPsec Library is highly-optimized software implementations of the core cryptographic processing for IPsec, which provides industry-leading performance on a range of Intel(R) Processors.</p>
+<p>For information on how the library works, see the Intel White Paper: "Fast Multi-buffer IPsec Implementations on Intel Architecture Processors". Jim Guilford, Sean Gulley, et. al.</p>
+<p>The easiest way to find it is to search the Internet for the title and Intel White Paper.</p>
+<p>Table 1. List of supported cipher algorithms and their implementations. </p><div class="fragment"><div class="line">+----------------------------------------------------------------------+</div>
 <div class="line">|                |                   Implementation                    |</div>
 <div class="line">| Encryption     +-----------------------------------------------------|</div>
 <div class="line">|                | x86_64 | SSE    | AVX    | AVX2   | AVX512 | VAES(5)|</div>
 <div class="line">|----------------+--------+--------+--------+--------+--------+--------|</div>
-<div class="line">| AES128-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| AES192-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| AES256-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
+<div class="line">| AES128-GCM     | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |</div>
+<div class="line">| AES192-GCM     | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |</div>
+<div class="line">| AES256-GCM     | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |</div>
 <div class="line">| AES128-CCM     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |</div>
 <div class="line">| AES256-CCM     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |</div>
 <div class="line">| AES128-CBC     | N      | Y(1)   | Y(3)   | N      | N      | Y(6)   |</div>
@@ -180,11 +186,11 @@ Contents</h1>
  (10) - by default, decryption and encryption are AVX by8. <br  />
  On CPUs supporting VAES, decryption and encryption are AVX2-VAES by16. <br  />
 </p>
-<p >Legend: <br  />
+<p>Legend: <br  />
  <code>byY</code> - single buffer Y blocks at a time <br  />
  <code>xY</code> - Y buffers at a time</p>
-<p >As an example of how to read table 1 and 2, if one uses AVX512 interface to perform AES128-CBC encryption then there is no native AVX512 implementation for this cipher. In such case, the library uses best available implementation which is AVX for AES128-CBC.</p>
-<p >Table 2. List of supported integrity algorithms and their implementations. </p><div class="fragment"><div class="line">+-------------------------------------------------------------------------+</div>
+<p>As an example of how to read table 1 and 2, if one uses AVX512 interface to perform AES128-CBC encryption then there is no native AVX512 implementation for this cipher. In such case, the library uses best available implementation which is AVX for AES128-CBC.</p>
+<p>Table 2. List of supported integrity algorithms and their implementations. </p><div class="fragment"><div class="line">+-------------------------------------------------------------------------+</div>
 <div class="line">|                   |                   Implementation                    |</div>
 <div class="line">| Integrity         +-----------------------------------------------------|</div>
 <div class="line">|                   | x86_64 | SSE    | AVX    | AVX2   | AVX512 | VAES(3)|</div>
@@ -201,9 +207,9 @@ Contents</h1>
 <div class="line">| SHA2-256          | N      | Y(2)x4 | Y   x4 | Y   x8 | Y  x16 | N      |</div>
 <div class="line">| SHA2-384          | N      | Y   x2 | Y   x2 | Y   x4 | Y   x8 | N      |</div>
 <div class="line">| SHA2-512          | N      | Y   x2 | Y   x2 | Y   x4 | Y   x8 | N      |</div>
-<div class="line">| AES128-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| AES192-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| AES256-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
+<div class="line">| AES128-GMAC       | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |</div>
+<div class="line">| AES192-GMAC       | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |</div>
+<div class="line">| AES256-GMAC       | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |</div>
 <div class="line">| NULL              | Y      | N      | N      | N      | N      | N      |</div>
 <div class="line">| AES128-CCM        | N      | Y(5)x4 | Y   x8 | N      | N      | Y x16  |</div>
 <div class="line">| AES256-CCM        | N      | Y(5)x4 | Y   x8 | N      | N      | Y x16  |</div>
@@ -215,10 +221,10 @@ Contents</h1>
 <div class="line">| SNOW3G-UIA2(8)    | N      | Y by4  | Y by4  | N      | Y by32 | Y by32 |</div>
 <div class="line">| DOCSIS-CRC32(4)   | N      | Y      | Y      | N      | Y      | Y      |</div>
 <div class="line">| HEC               | N      | Y      | Y      | N      | N      | N      |</div>
-<div class="line">| POLY1305          | Y      | N      | N      | N      | Y      | Y      |</div>
-<div class="line">| POLY1305 AEAD     | Y      | N      | N      | N      | Y      | Y      |</div>
-<div class="line">| SNOW-V AEAD       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| GHASH             | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
+<div class="line">| POLY1305          | Y      | N      | N      | Y(9)   | Y      | Y      |</div>
+<div class="line">| POLY1305 AEAD     | Y      | N      | N      | Y(9)   | Y      | Y      |</div>
+<div class="line">| SNOW-V AEAD       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by32 |</div>
+<div class="line">| GHASH             | N      | Y  by8 | N      | Y  by8 | Y  by8 | Y by32 |</div>
 <div class="line">| CRC(6)            | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |</div>
 <div class="line">| PON-CRC-BIP(7)    | N      | Y      | Y      | N      | N      | Y      |</div>
 <div class="line">+-------------------------------------------------------------------------+</div>
@@ -246,13 +252,13 @@ Contents</h1>
 <li>CRC6: IUUP header <br  />
  (7) - used only with PON-AES128-CTR cipher <br  />
  (8) - x4/x16 for init keystream generation, then by4/by32 <br  />
-</li>
+ (9) - Only if AVX-IFMA instructions are supported</li>
 </ul>
-<p >Legend: <br  />
+<p>Legend: <br  />
  <code>byY</code>- single buffer Y blocks at a time <br  />
  <code>xY</code>- Y buffers at a time <br  />
 </p>
-<p >Table 3. Encryption and integrity algorithm combinations </p><div class="fragment"><div class="line">+---------------------------------------------------------------------+</div>
+<p>Table 3. Encryption and integrity algorithm combinations </p><div class="fragment"><div class="line">+---------------------------------------------------------------------+</div>
 <div class="line">| Encryption    | Allowed Integrity Algorithms                        |</div>
 <div class="line">|---------------+-----------------------------------------------------|</div>
 <div class="line">| AES128-GCM    | AES128-GMAC                                         |</div>
@@ -296,9 +302,9 @@ Contents</h1>
 <div class="line">+---------------+-----------------------------------------------------+</div>
 <div class="line">| SNOW-V AEAD   | SNOW-V AEAD (GHASH)                                 |</div>
 <div class="line">+---------------+-----------------------------------------------------+</div>
-</div><!-- fragment --><h1><a class="anchor" id="autotoc_md3"></a>
-2. Processor Extensions</h1>
-<p >Table 4. Processor extensions used in the library </p><div class="fragment"><div class="line">+-------------------------------------------------------------------------+</div>
+</div><!-- fragment --><h2><a class="anchor" id="autotoc_md3"></a>
+2. Processor Extensions</h2>
+<p>Table 4. Processor extensions used in the library </p><div class="fragment"><div class="line">+-------------------------------------------------------------------------+</div>
 <div class="line">| Algorithm         | Interface | Extensions                              |</div>
 <div class="line">|-------------------+-----------+-----------------------------------------|</div>
 <div class="line">| HMAC-SHA1-96,     | AVX512    | AVX512F, AVX512BW, AVX512VL             |</div>
@@ -316,9 +322,9 @@ Contents</h1>
 <div class="line">| HMAC-SHA2-384_192,|           |   if not present                        |</div>
 <div class="line">| HMAC-SHA2-512_256 |           |                                         |</div>
 <div class="line">+-------------------+-----------+-----------------------------------------+</div>
-</div><!-- fragment --><h1><a class="anchor" id="autotoc_md4"></a>
-3. Recommendations</h1>
-<p >Legacy or to be avoided algorithms listed in the table below are implemented in the library in order to support legacy applications. Please use corresponding alternative algorithms instead. </p><div class="fragment"><div class="line">+--------------------------------------------------------------+</div>
+</div><!-- fragment --><h2><a class="anchor" id="autotoc_md4"></a>
+3. Recommendations</h2>
+<p>Legacy or to be avoided algorithms listed in the table below are implemented in the library in order to support legacy applications. Please use corresponding alternative algorithms instead. </p><div class="fragment"><div class="line">+--------------------------------------------------------------+</div>
 <div class="line">| # | Algorithm           | Recommendation | Alternative       |</div>
 <div class="line">|---+---------------------+----------------+-------------------|</div>
 <div class="line">| 1 | DES encryption      | Avoid          | AES encryption    |</div>
@@ -332,9 +338,9 @@ Contents</h1>
 <div class="line">| 3 | HMAC-SHA1 integrity | Avoid          | HMAC-SHA256       |</div>
 <div class="line">+--------------------------------------------------------------+</div>
 </div><!-- fragment --><p> Intel(R) Multi-Buffer Crypto for IPsec Library depends on C library and it is recommended to use its latest version.</p>
-<p >Applications using the Intel(R) Multi-Buffer Crypto for IPsec Library rely on Operating System to provide process isolation. As the result, it is recommended to use latest Operating System patches and security updates.</p>
-<h1><a class="anchor" id="autotoc_md5"></a>
-4. Package Content</h1>
+<p>Applications using the Intel(R) Multi-Buffer Crypto for IPsec Library rely on Operating System to provide process isolation. As the result, it is recommended to use latest Operating System patches and security updates.</p>
+<h2><a class="anchor" id="autotoc_md5"></a>
+4. Package Content</h2>
 <ul>
 <li>test - Library test applications</li>
 <li>perf - Library performance application</li>
@@ -345,22 +351,22 @@ Contents</h1>
 <li>lib/avx512 - Intel(R) AVX512 optimized routines</li>
 <li>lib/no-aesni - Non-AESNI accelerated routines</li>
 </ul>
-<p ><b>Note:</b> <br  />
+<p><b>Note:</b> <br  />
  There is just one branch used in the project. All development is done on the master branch. <br  />
  Code taken from the tip of the master branch should not be considered fit for production. <br  />
 </p>
-<p >Refer to the releases tab for stable code versions: <br  />
+<p>Refer to the releases tab for stable code versions: <br  />
  <a href="https://github.com/intel/intel-ipsec-mb/releases">https://github.com/intel/intel-ipsec-mb/releases</a></p>
-<h1><a class="anchor" id="autotoc_md6"></a>
-5. Documentation</h1>
-<p >Full documentation can be found at: <a href="https://intel.github.io/intel-ipsec-mb">https://intel.github.io/intel-ipsec-mb</a></p>
-<p >To generate documentation locally, run: <br  />
+<h2><a class="anchor" id="autotoc_md6"></a>
+5. Documentation</h2>
+<p>Full documentation can be found at: <a href="https://intel.github.io/intel-ipsec-mb">https://intel.github.io/intel-ipsec-mb</a></p>
+<p>To generate documentation locally, run: <br  />
  <code>&gt; make doxy</code></p>
-<h1><a class="anchor" id="autotoc_md7"></a>
-6. Compilation</h1>
-<h2><a class="anchor" id="autotoc_md8"></a>
-Linux (64-bit only)</h2>
-<p >Required tools: <br  />
+<h2><a class="anchor" id="autotoc_md7"></a>
+6. Compilation</h2>
+<h3><a class="anchor" id="autotoc_md8"></a>
+Linux (64-bit only)</h3>
+<p>Required tools: <br  />
 </p><ul>
 <li>GNU make <br  />
 </li>
@@ -369,34 +375,34 @@ Linux (64-bit only)</h2>
 <li>gcc (GCC) 4.8.3 (or newer) <br  />
 </li>
 </ul>
-<p >Shared library: <br  />
+<p>Shared library: <br  />
  <code>&gt; make</code></p>
-<p >Static library: <br  />
+<p>Static library: <br  />
  <code>&gt; make SHARED=n</code></p>
-<p >Clean the build: <br  />
+<p>Clean the build: <br  />
  <code>&gt; make clean</code> <br  />
  or <br  />
  <code>&gt; make clean SHARED=n</code></p>
-<p >Build with debugging information: <br  />
+<p>Build with debugging information: <br  />
  <code>&gt; make DEBUG=y</code></p>
-<p >Build with AESNI emulation support (disabled by default): <br  />
+<p>Build with AESNI emulation support (disabled by default): <br  />
  <code>&gt; make AESNI_EMU=y</code></p>
-<p ><b>Note:</b> Building with debugging information is not advised for production use.</p>
-<p >For more build options and their explanation run: <br  />
+<p><b>Note:</b> Building with debugging information is not advised for production use.</p>
+<p>For more build options and their explanation run: <br  />
  <code>&gt; make help</code></p>
-<h2><a class="anchor" id="autotoc_md9"></a>
-Windows MSVS (x64 only)</h2>
-<p >Required tools: <br  />
+<h3><a class="anchor" id="autotoc_md9"></a>
+Windows MSVS (x64 only)</h3>
+<p>Required tools: <br  />
 </p><ul>
-<li>Microsoft (R) Visual Studio 2015: <br  />
+<li>Microsoft (R) Visual Studio 2019: <br  />
 <ul>
-<li>NMAKE: Microsoft (R) Program Maintenance Utility Version 14.00.24210.0 <br  />
+<li>NMAKE: Microsoft (R) Program Maintenance Utility Version 14.29.30148.0 <br  />
 </li>
-<li>CL: Microsoft (R) C/C++ Optimizing Compiler Version 19.00.24215.1 for x64 <br  />
+<li>CL: Microsoft (R) C/C++ Optimizing Compiler Version 19.29.30148 for x64 <br  />
 </li>
-<li>LIB: Microsoft (R) Library Manager Version 14.00.24215.1 <br  />
+<li>LIB: Microsoft (R) Library Manager Version 14.29.30148.0 <br  />
 </li>
-<li>LINK: Microsoft (R) Incremental Linker Version 14.00.24215.1 <br  />
+<li>LINK: Microsoft (R) Incremental Linker Version 14.29.30148.0 <br  />
 </li>
 <li>Note: Building on later versions should work but is not verified <br  />
 </li>
@@ -405,15 +411,15 @@ Windows MSVS (x64 only)</h2>
 <li>NASM version 2.14 (or newer) <br  />
 </li>
 </ul>
-<p >Shared library (DLL): <br  />
+<p>Shared library (DLL): <br  />
  <code>&gt; nmake /f win_x64.mak</code></p>
-<p >Static library: <br  />
+<p>Static library: <br  />
  <code>&gt; nmake /f win_x64.mak SHARED=n</code></p>
-<p >Clean the build: <br  />
+<p>Clean the build: <br  />
  <code>&gt; nmake /f win_x64.mak clean</code> <br  />
  or <br  />
  <code>&gt; nmake /f win_x64.mak clean SHARED=n</code></p>
-<p >Build without safety features: <br  />
+<p>Build without safety features: <br  />
 </p><ul>
 <li>SAFE_DATA clears sensitive information stored temporarily on stack, registers or internal data structures <br  />
 </li>
@@ -425,17 +431,17 @@ Windows MSVS (x64 only)</h2>
  Disable to turn off: SAFE_DATA, SAFE_PARAM and SAFE_LOOKUP. <br  />
 </li>
 </ul>
-<p ><code>&gt; nmake /f win_x64.mak SAFE_DATA=n SAFE_PARAM=n</code> <code>&gt; nmake /f win_x64.mak SAFE_OPTIONS=n</code></p>
-<p >Build with debugging information: <br  />
+<p><code>&gt; nmake /f win_x64.mak SAFE_DATA=n SAFE_PARAM=n</code> <code>&gt; nmake /f win_x64.mak SAFE_OPTIONS=n</code></p>
+<p>Build with debugging information: <br  />
  <code>&gt; nmake /f win_x64.mak DEBUG=y</code></p>
-<p >Build with AESNI emulation support (disabled by default): <br  />
+<p>Build with AESNI emulation support (disabled by default): <br  />
  <code>&gt; nmake /f win_x64.mak AESNI_EMU=y</code></p>
-<p ><b>Note:</b> Building with debugging information is not advised for production use.</p>
-<p >For more build options and their explanation run: <br  />
+<p><b>Note:</b> Building with debugging information is not advised for production use.</p>
+<p>For more build options and their explanation run: <br  />
  <code>&gt; nmake /f win_x64.mak help</code></p>
-<h2><a class="anchor" id="autotoc_md10"></a>
-Windows Mingw-w64 (64-bit only)</h2>
-<p >Required tools: <br  />
+<h3><a class="anchor" id="autotoc_md10"></a>
+Windows Mingw-w64 (64-bit only)</h3>
+<p>Required tools: <br  />
 </p><ul>
 <li>GNU mingw32-make.exe <br  />
 </li>
@@ -443,22 +449,22 @@ Windows Mingw-w64 (64-bit only)</h2>
 </li>
 <li>gcc (GCC) 10.3.0 (or newer)</li>
 </ul>
-<p >Shared library: <br  />
+<p>Shared library: <br  />
  <code>&gt; mingw32-make.exe</code></p>
-<p >Static library: <br  />
+<p>Static library: <br  />
  <code>&gt; mingw32-make.exe SHARED=n</code></p>
-<p >Clean the build: <br  />
+<p>Clean the build: <br  />
  <code>&gt; mingw32-make.exe clean</code> <br  />
  or <br  />
  <code>&gt; mingw32-make.exe clean SHARED=n</code></p>
-<p >Build with debugging information: <br  />
+<p>Build with debugging information: <br  />
  <code>&gt; mingw32-make.exe DEBUG=y</code></p>
-<p ><b>Note:</b> Building with debugging information is not advised for production use.</p>
-<p >For more build options and their explanation run: <br  />
+<p><b>Note:</b> Building with debugging information is not advised for production use.</p>
+<p>For more build options and their explanation run: <br  />
  <code>&gt; mingw32-make.exe help</code></p>
-<h2><a class="anchor" id="autotoc_md11"></a>
-FreeBSD (64-bit only)</h2>
-<p >Required tools: <br  />
+<h3><a class="anchor" id="autotoc_md11"></a>
+FreeBSD (64-bit only)</h3>
+<p>Required tools: <br  />
 </p><ul>
 <li>GNU make <br  />
 </li>
@@ -467,41 +473,72 @@ FreeBSD (64-bit only)</h2>
 <li>gcc (GCC) 4.8.3 (or newer) / clang 5.0 (or newer) <br  />
 </li>
 </ul>
-<p >Shared library: <br  />
+<p>Shared library: <br  />
  <code>&gt; gmake</code></p>
-<p >Static library: <br  />
+<p>Static library: <br  />
  <code>&gt; gmake SHARED=n</code></p>
-<p >Clean the build: <br  />
+<p>Clean the build: <br  />
  <code>&gt; gmake clean</code> <br  />
  or <br  />
  <code>&gt; gmake clean SHARED=n</code></p>
-<p >Build with debugging information: <br  />
+<p>Build with debugging information: <br  />
  <code>&gt; gmake DEBUG=y</code></p>
-<p ><b>Note:</b> Building with debugging information is not advised for production use.</p>
-<p >For more build options and their explanation run: <br  />
+<p><b>Note:</b> Building with debugging information is not advised for production use.</p>
+<p>For more build options and their explanation run: <br  />
  <code>&gt; gmake help</code></p>
-<h1><a class="anchor" id="autotoc_md12"></a>
-7. Security Considerations &amp; Options for Increased Security</h1>
-<h3><a class="anchor" id="autotoc_md13"></a>
+<h3><a class="anchor" id="autotoc_md12"></a>
+Building with CMake (experimental)</h3>
+<p>Minimum CMake version: 3.16</p>
+<p>Create build directory: </p><div class="fragment"><div class="line">mkdir build</div>
+<div class="line">cd build</div>
+</div><!-- fragment --><h4><a class="anchor" id="autotoc_md13"></a>
+Unix Makefiles (Linux and FreeBSD)</h4>
+<p>Shared library (default): </p><div class="fragment"><div class="line">cmake ..</div>
+<div class="line">cmake --build . --parallel</div>
+</div><!-- fragment --><p>Static library: </p><div class="fragment"><div class="line">cmake -DBUILD_SHARED_LIBS=OFF ..</div>
+<div class="line">cmake --build . --parallel</div>
+</div><!-- fragment --><p>Debug build: </p><div class="fragment"><div class="line">cmake -DCMAKE_BUILD_TYPE=Debug ..</div>
+<div class="line">cmake --build . --parallel</div>
+</div><!-- fragment --><p>For more build options and their explanation run: <code>cmake --build . --target print_help</code></p>
+<h4><a class="anchor" id="autotoc_md14"></a>
+Windows MSVS (x64 only)</h4>
+<p>Shared library with debugging information (default for MSVS) </p><div class="fragment"><div class="line">cmake -Ax64 ..</div>
+<div class="line">cmake --build .</div>
+</div><!-- fragment --><p>Release build: </p><div class="fragment"><div class="line">cmake -Ax64 ..</div>
+<div class="line">cmake --build . --config Release</div>
+</div><!-- fragment --><p>Static library: </p><div class="fragment"><div class="line">cmake -Ax64 -DBUILD_SHARED_LIBS=OFF ..</div>
+<div class="line">cmake --build . --config Release</div>
+</div><!-- fragment --><p>For more build options and their explanation run: <code>cmake --build . --target print_help</code></p>
+<h4><a class="anchor" id="autotoc_md15"></a>
+Ninja (Linux, FreeBSD and Windows):</h4>
+<div class="fragment"><div class="line">cmake -G Ninja ..</div>
+<div class="line">cmake --build .</div>
+</div><!-- fragment --><p>For more build options and their explanation run: </p><div class="fragment"><div class="line">cmake --build . --target print_help</div>
+</div><!-- fragment --><p>Library and applications can be found in: </p><div class="fragment"><div class="line">build/lib</div>
+<div class="line">build/test</div>
+<div class="line">build/perf</div>
+</div><!-- fragment --><h2><a class="anchor" id="autotoc_md16"></a>
+7. Security Considerations &amp; Options for Increased Security</h2>
+<h3><a class="anchor" id="autotoc_md17"></a>
 Security Considerations</h3>
-<p >The security of a system that uses cryptography depends on the strength of the cryptographic algorithms as well as the strength of the keys. Cryptographic key strength is dependent on several factors, with some of the most important factors including the length of the key, the entropy of the key bits, and maintaining the secrecy of the key.</p>
-<p >The selection of an appropriate algorithm and mode of operation critically affects the security of a system. Appropriate selection criteria is beyond the scope of this document and should be determined based upon usage, appropriate standards and consultation with a cryptographic expert. This library includes some algorithms, which are considered cryptographically weak and are included only for legacy and interoperability reasons. See the "Recommendations" section for more details.</p>
-<p >Secure creation of key material is not a part of this library. This library assumes that cryptographic keys have been created using approved methods with an appropriate and secure entropy source. Users of this library are referred to NIST SP800-133 Revision 1, Recommendation for Cryptographic Key Generation, found at <a href="https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-133r1.pdf">https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-133r1.pdf</a></p>
-<p >Even with the use of strong cryptographic algorithms and robustly generated keys, software implementations of cryptographic algorithms may be attacked at the implementation through cache-timing attacks, buffer-over-reads, and other software vulnerabilities. Counter-measures against these types of attacks are possible but require additional processing cycles. Whether a particular system should provide such counter-measures depends on the threats to that system, and cannot be determined by a general library such as this one. In order to provide the most flexible implementation, this library allows certain counter-measures to be enabled or disabled at compile time. These options are listed below as the "Options for Increased Security" and are enabled through various build flags.</p>
-<h3><a class="anchor" id="autotoc_md14"></a>
+<p>The security of a system that uses cryptography depends on the strength of the cryptographic algorithms as well as the strength of the keys. Cryptographic key strength is dependent on several factors, with some of the most important factors including the length of the key, the entropy of the key bits, and maintaining the secrecy of the key.</p>
+<p>The selection of an appropriate algorithm and mode of operation critically affects the security of a system. Appropriate selection criteria is beyond the scope of this document and should be determined based upon usage, appropriate standards and consultation with a cryptographic expert. This library includes some algorithms, which are considered cryptographically weak and are included only for legacy and interoperability reasons. See the "Recommendations" section for more details.</p>
+<p>Secure creation of key material is not a part of this library. This library assumes that cryptographic keys have been created using approved methods with an appropriate and secure entropy source. Users of this library are referred to NIST SP800-133 Revision 1, Recommendation for Cryptographic Key Generation, found at <a href="https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-133r1.pdf">https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-133r1.pdf</a></p>
+<p>Even with the use of strong cryptographic algorithms and robustly generated keys, software implementations of cryptographic algorithms may be attacked at the implementation through cache-timing attacks, buffer-over-reads, and other software vulnerabilities. Counter-measures against these types of attacks are possible but require additional processing cycles. Whether a particular system should provide such counter-measures depends on the threats to that system, and cannot be determined by a general library such as this one. In order to provide the most flexible implementation, this library allows certain counter-measures to be enabled or disabled at compile time. These options are listed below as the "Options for Increased Security" and are enabled through various build flags.</p>
+<h3><a class="anchor" id="autotoc_md18"></a>
 Options for Increased Security</h3>
-<p >There are three build options that are used to increase safety in the code and help protect external functions from incorrect input data. The SAFE_DATA, SAFE_PARAM and SAFE_LOOKUP options are enabled by default. Due to the potential performance impact associated to the extra code, these can be disabled by setting the parameter equal to "n" (e.g. make SAFE_LOOKUP=n).</p>
-<p >No specific code has been added, and no specific validation or security tests have been performed to help protect against or check for side-channel attacks.</p>
-<h3><a class="anchor" id="autotoc_md15"></a>
+<p>There are three build options that are used to increase safety in the code and help protect external functions from incorrect input data. The SAFE_DATA, SAFE_PARAM and SAFE_LOOKUP options are enabled by default. Due to the potential performance impact associated to the extra code, these can be disabled by setting the parameter equal to "n" (e.g. make SAFE_LOOKUP=n).</p>
+<p>No specific code has been added, and no specific validation or security tests have been performed to help protect against or check for side-channel attacks.</p>
+<h3><a class="anchor" id="autotoc_md19"></a>
 SAFE_DATA</h3>
-<p >Stack and registers containing sensitive information, such as keys or IVs, are cleared upon completion of a function call.</p>
-<h3><a class="anchor" id="autotoc_md16"></a>
+<p>Stack and registers containing sensitive information, such as keys or IVs, are cleared upon completion of a function call.</p>
+<h3><a class="anchor" id="autotoc_md20"></a>
 SAFE_PARAM</h3>
-<p >Input parameters are checked, looking generally for NULL pointers or an incorrect input length.</p>
-<h3><a class="anchor" id="autotoc_md17"></a>
+<p>Input parameters are checked, looking generally for NULL pointers or an incorrect input length.</p>
+<h3><a class="anchor" id="autotoc_md21"></a>
 SAFE_LOOKUP</h3>
-<p >Lookups which depend on sensitive information are implemented with constant time functions.</p>
-<p >Algorithms where these constant time functions are used are the following: <br  />
+<p>Lookups which depend on sensitive information are implemented with constant time functions.</p>
+<p>Algorithms where these constant time functions are used are the following: <br  />
 </p><ul>
 <li>AESNI emulation <br  />
 </li>
@@ -512,76 +549,95 @@ SAFE_LOOKUP</h3>
 <li>SNOW3G: all architectures <br  />
 </li>
 </ul>
-<p >If SAFE_LOOKUP is not enabled in the build (e.g. make SAFE_LOOKUP=n) then the algorithms listed above may be susceptible to timing attacks which could expose the cryptographic key.</p>
-<h3><a class="anchor" id="autotoc_md18"></a>
+<p>If SAFE_LOOKUP is not enabled in the build (e.g. make SAFE_LOOKUP=n) then the algorithms listed above may be susceptible to timing attacks which could expose the cryptographic key.</p>
+<h3><a class="anchor" id="autotoc_md22"></a>
 SAFE_OPTIONS</h3>
-<p >SAFE_OPTIONS is a parameter that can be used to disable/enable all supported safe options (i.e. SAFE_DATA, SAFE_PARAM, SAFE_LOOKUP). It is set to <code>y</code> by default and all safe options are enabled. <code>SAFE_OPTIONS=n</code> disables all safe options.</p>
-<h3><a class="anchor" id="autotoc_md19"></a>
+<p>SAFE_OPTIONS is a parameter that can be used to disable/enable all supported safe options (i.e. SAFE_DATA, SAFE_PARAM, SAFE_LOOKUP). It is set to <code>y</code> by default and all safe options are enabled. <code>SAFE_OPTIONS=n</code> disables all safe options.</p>
+<h3><a class="anchor" id="autotoc_md23"></a>
 Security API</h3>
-<p ><b>Force clearing/zeroing of memory</b> </p><div class="fragment"><div class="line"><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6">imb_clear_mem</a>(<span class="keywordtype">void</span> *mem, <span class="keyword">const</span> <span class="keywordtype">size_t</span> size);</div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a986643689f56109161597f67eb9d7b40"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a></div><div class="ttdeci">#define IMB_DLL_EXPORT</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:86</div></div>
+<p><b>Force clearing/zeroing of memory</b> </p><div class="fragment"><div class="line"><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6">imb_clear_mem</a>(<span class="keywordtype">void</span> *mem, <span class="keyword">const</span> <span class="keywordtype">size_t</span> size);</div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a986643689f56109161597f67eb9d7b40"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a></div><div class="ttdeci">#define IMB_DLL_EXPORT</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:86</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aecdd69541b6d2a83d19ca804ef4b78d6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6">imb_clear_mem</a></div><div class="ttdeci">IMB_DLL_EXPORT void imb_clear_mem(void *mem, const size_t size)</div><div class="ttdoc">Force clearing/zeroing of memory.</div></div>
 </div><!-- fragment --><p> To assist in clearing sensitive application data such as keys, plaintext etc. the library provides the <code><a class="el" href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6" title="Force clearing/zeroing of memory.">imb_clear_mem()</a></code> API. This API zeros _'size'_ bytes of memory pointed to by _'mem'_ followed by the <em>sfence</em> instruction to ensure memory is cleared before the function returns.</p>
-<h3><a class="anchor" id="autotoc_md20"></a>
+<h3><a class="anchor" id="autotoc_md24"></a>
 Galois Counter Mode (GCM) TAG Size</h3>
-<p >The library GCM and GMAC implementation provides flexibility as to tag size selection. As explained in <a href="https://csrc.nist.gov/publications/detail/sp/800-38d/final">NIST Special Publication 800-38D</a> section 5.2.1.2 and Appendix C, using tag sizes shorter than 96 bits can be insecure. Please refer to the aforementioned sections to understand the details, trade offs and mitigations of using shorter tag sizes.</p>
-<h1><a class="anchor" id="autotoc_md21"></a>
-8. Installation</h1>
-<h2><a class="anchor" id="autotoc_md22"></a>
-Linux (64-bit only)</h2>
-<p >First compile the library and then install: <br  />
+<p>The library GCM and GMAC implementation provides flexibility as to tag size selection. As explained in <a href="https://csrc.nist.gov/publications/detail/sp/800-38d/final">NIST Special Publication 800-38D</a> section 5.2.1.2 and Appendix C, using tag sizes shorter than 96 bits can be insecure. Please refer to the aforementioned sections to understand the details, trade offs and mitigations of using shorter tag sizes.</p>
+<h2><a class="anchor" id="autotoc_md25"></a>
+8. Installation</h2>
+<h3><a class="anchor" id="autotoc_md26"></a>
+Linux (64-bit only)</h3>
+<p>First compile the library and then install: <br  />
  <code>&gt; make</code> <br  />
  <code>&gt; sudo make install</code></p>
-<p >To uninstall the library run: <br  />
+<p>To uninstall the library run: <br  />
  <code>&gt; sudo make uninstall</code></p>
-<p >If you want to change install location then define PREFIX: <br  />
+<p>If you want to change install location then define PREFIX: <br  />
  <code>&gt; sudo make install PREFIX=&lt;path&gt;</code></p>
-<p >If there is no need to run ldconfig at install stage please use NOLDCONFIG=y option: <br  />
+<p>If there is no need to run ldconfig at install stage please use NOLDCONFIG=y option: <br  />
  <code>&gt; sudo make install NOLDCONFIG=y</code></p>
-<p >If library was compiled as an archive (not a default option) then install it using SHARED=n option: <br  />
+<p>If library was compiled as an archive (not a default option) then install it using SHARED=n option: <br  />
  <code>&gt; sudo make install SHARED=n</code></p>
-<h2><a class="anchor" id="autotoc_md23"></a>
-Windows (x64 only)</h2>
-<p >First compile the library and then install from a command prompt in administrator mode: <br  />
+<h3><a class="anchor" id="autotoc_md27"></a>
+Windows (x64 only)</h3>
+<p>First compile the library and then install from a command prompt in administrator mode: <br  />
  <code>&gt; nmake /f win_x64.mak</code> <br  />
  <code>&gt; nmake /f win_x64.mak install</code></p>
-<p >To uninstall the library run: <br  />
+<p>To uninstall the library run: <br  />
  <code>&gt; nmake /f win_x64.mak uninstall</code></p>
-<p >If you want to change install location then define PREFIX (default C:\Program Files): <br  />
+<p>If you want to change install location then define PREFIX (default C:\Program Files): <br  />
  <code>&gt; nmake /f win_x64.mak install PREFIX=&lt;path&gt;</code></p>
-<p >If library was compiled as a static library (not a default option) then install it using SHARED=n option: <br  />
+<p>If library was compiled as a static library (not a default option) then install it using SHARED=n option: <br  />
  <code>&gt; nmake /f win_x64.mak install SHARED=n</code></p>
-<h2><a class="anchor" id="autotoc_md24"></a>
-FreeBSD (64-bit only)</h2>
-<p >First compile the library and then install: <br  />
+<h3><a class="anchor" id="autotoc_md28"></a>
+FreeBSD (64-bit only)</h3>
+<p>First compile the library and then install: <br  />
  <code>&gt; gmake</code> <br  />
  <code>&gt; sudo gmake install</code></p>
-<p >To uninstall the library run: <br  />
+<p>To uninstall the library run: <br  />
  <code>&gt; sudo gmake uninstall</code></p>
-<p >If you want to change install location then define PREFIX: <br  />
+<p>If you want to change install location then define PREFIX: <br  />
  <code>&gt; sudo gmake install PREFIX=&lt;path&gt;</code></p>
-<p >If there is no need to run ldconfig at install stage please use NOLDCONFIG=y option: <br  />
+<p>If there is no need to run ldconfig at install stage please use NOLDCONFIG=y option: <br  />
  <code>&gt; sudo gmake install NOLDCONFIG=y</code></p>
-<p >If library was compiled as an archive (not a default option) then install it using SHARED=n option: <br  />
+<p>If library was compiled as an archive (not a default option) then install it using SHARED=n option: <br  />
  <code>&gt; sudo gmake install SHARED=n</code></p>
-<h1><a class="anchor" id="autotoc_md25"></a>
-9. Backwards compatibility</h1>
-<p >In version 0.54, some symbols have been renamed to avoid too generic names (such as cipher modes or hash algorithms).</p>
-<p >When building an application and linking it against the IPSec Multi Buffer library, by default the old symbols (up to v0.53) are exported, to maintain backwards compatibility.</p>
-<p >Applications should move to the new API as soon as possible, as the old symbols are marked as deprecated and will be removed in a future release.</p>
-<p >For applications which face symbol conflicts due to these old generic names, they should be compiled with the flag -DNO_COMPAT_IMB_API_053, which will not export the old symbols.</p>
-<h1><a class="anchor" id="autotoc_md26"></a>
-10. Disclaimer (ZUC, KASUMI, SNOW3G)</h1>
-<p >Please note that cryptographic material, such as ciphering algorithms, may be subject to national regulations. What is more, use of some algorithms in real networks and production equipment can be subject to agreement or licensing by the GSMA and/or the ETSI.</p>
-<p >For more details please see: <br  />
+<h2><a class="anchor" id="autotoc_md29"></a>
+Installing with CMake (experimental)</h2>
+<h3><a class="anchor" id="autotoc_md30"></a>
+Unix (Linux and FreeBSD)</h3>
+<p>First compile the library and then install: <br  />
+ </p><div class="fragment"><div class="line">cmake --build .</div>
+<div class="line">sudo cmake --install .</div>
+</div><!-- fragment --><p>To uninstall the library run: <br  />
+ <code>sudo cmake --build . --target uninstall</code></p>
+<p>If you want to change install location then define PREFIX: <br  />
+ <code>sudo cmake --install . --prefix=&lt;path&gt;</code></p>
+<h3><a class="anchor" id="autotoc_md31"></a>
+Windows (x64 only)</h3>
+<p>First compile the library and then install from a command prompt in administrator mode: <br  />
+ </p><div class="fragment"><div class="line">cmake --build . --config Release</div>
+<div class="line">cmake --install . --config Release</div>
+</div><!-- fragment --><p>To uninstall the library run: <br  />
+ <code>cmake --build . --target uninstall</code></p>
+<p>If you want to change install location then define PREFIX (default C:\Program Files): <br  />
+ <code>cmake --install . --config Release --prefix=&lt;path&gt;</code></p>
+<h2><a class="anchor" id="autotoc_md32"></a>
+9. Backwards compatibility</h2>
+<p>In version 1.4, backward compile time symbol compatibility with library version 0.53 has been removed.</p>
+<p>Applications are encouraged to use new symbol names introduced in version 0.54.</p>
+<p>If required, compatibility symbol mapping can be implemented in the application. See compatibility symbol mapping in v1.3 header file: <a href="https://github.com/intel/intel-ipsec-mb/blob/v1.3/lib/intel-ipsec-mb.h#L246">https://github.com/intel/intel-ipsec-mb/blob/v1.3/lib/intel-ipsec-mb.h#L246</a></p>
+<h2><a class="anchor" id="autotoc_md33"></a>
+10. Disclaimer (ZUC, KASUMI, SNOW3G)</h2>
+<p>Please note that cryptographic material, such as ciphering algorithms, may be subject to national regulations. What is more, use of some algorithms in real networks and production equipment can be subject to agreement or licensing by the GSMA and/or the ETSI.</p>
+<p>For more details please see: <br  />
 </p><ul>
 <li>GSMA <a href="https://www.gsma.com/security/security-algorithms/">https://www.gsma.com/security/security-algorithms/</a> <br  />
 </li>
 <li>ETSI <a href="https://www.etsi.org/security-algorithms-and-codes/cellular-algorithm-licences">https://www.etsi.org/security-algorithms-and-codes/cellular-algorithm-licences</a></li>
 </ul>
-<h1><a class="anchor" id="autotoc_md27"></a>
-11. Legal Disclaimer</h1>
-<p >THIS SOFTWARE IS PROVIDED BY INTEL"AS IS". NO LICENSE, EXPRESS OR <br  />
+<h2><a class="anchor" id="autotoc_md34"></a>
+11. Legal Disclaimer</h2>
+<p>THIS SOFTWARE IS PROVIDED BY INTEL"AS IS". NO LICENSE, EXPRESS OR <br  />
  IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS <br  />
  ARE GRANTED THROUGH USE. EXCEPT AS PROVIDED IN INTEL'S TERMS AND <br  />
  CONDITIONS OF SALE, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL <br  />
@@ -589,14 +645,212 @@ FreeBSD (64-bit only)</h2>
  USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO <br  />
  FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT <br  />
  OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. <br  />
- </p>
+</p>
+<h2><a class="anchor" id="autotoc_md35"></a>
+12. FIPS Compliance</h2>
+<p>The library does not fulfill technical requirements to achieve Cryptographic Module (CMVP) certification as a standalone component. It is fit for Cryptographic Algorithm validation and certification (CAVP) and it can be part of CMVP as one of the components.</p>
+<h3><a class="anchor" id="autotoc_md36"></a>
+CAVP</h3>
+<p>ACVP test application located in <code>test</code> directory is to support CAVP process. It implements validation of the following algorithms: <br  />
+</p><ul>
+<li>AES-GCM <br  />
+</li>
+<li>AES-GMAC <br  />
+</li>
+<li>AES-CCM <br  />
+</li>
+<li>AES-CBC <br  />
+</li>
+<li>AES-CTR <br  />
+</li>
+<li>AES-CMAC <br  />
+</li>
+<li>SHA1 (SHA-1) <br  />
+</li>
+<li>SHA224 (SHA2-224) <br  />
+</li>
+<li>SHA256 (SHA2-256) <br  />
+</li>
+<li>SHA384 (SHA2-384) <br  />
+</li>
+<li>SHA512 (SHA2-512) <br  />
+</li>
+<li>HMAC-SHA1 (HMAC-SHA-1) <br  />
+</li>
+<li>HMAC-SHA224 (HMAC-SHA2-224) <br  />
+</li>
+<li>HMAC-SHA256 (HMAC-SHA2-256) <br  />
+</li>
+<li>HMAC-SHA384 (HMAC-SHA2-384) <br  />
+</li>
+<li>HMAC-SHA512 (HMAC-SHA2-512) <br  />
+</li>
+</ul>
+<h3><a class="anchor" id="autotoc_md37"></a>
+CAVP Algorithm Parameters</h3>
+<p><b>Note:</b> all sizes in bits </p><div class="fragment"><div class="line">+--------------------------------------------------------------------------------------------+</div>
+<div class="line">| Algorithm           | Standard  | Parameters                                               |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| AES-GCM             | SP800-38D | Key size: 128, 192, 256                                  |</div>
+<div class="line">|                     |           | Direction: encrypt and decrypt                           |</div>
+<div class="line">|                     |           | ivLen: [min = 8, max = 1024, increment 8]                |</div>
+<div class="line">|                     |           | tagLen: 32, 64, 96, 104, 112, 120, 128                   |</div>
+<div class="line">|                     |           | payloadLen: [min = 0, max = 65536, increment = 8]        |</div>
+<div class="line">|                     |           | aadLen: [min = 0, max = 65536, increment = 8]            |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| AES-CBC             | SP800-38A | Key size: 128, 192, 256                                  |</div>
+<div class="line">|                     |           | Direction: encrypt and decrypt                           |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| AES-CTR             | SP800-38A | Key size: 128, 192, 256                                  |</div>
+<div class="line">|                     |           | Direction: encrypt and decrypt                           |</div>
+<div class="line">|                     |           | payloadLen: [min = 8, max = 128, increment = 8]          |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| AES-ECB             | SP800-38A | Key size: 128, 192, 256                                  |</div>
+<div class="line">|                     |           | Direction: encrypt and decrypt                           |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| TDES-EDE-CBC        | SP800-38A | Key size: 192                                            |</div>
+<div class="line">|                     |           | Direction: encrypt and decrypt                           |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| SHA1 (SHA-1)        | FIPS180-4 | messageLength: [min = 0, max = 65528, increment = 8]     |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| SHA224 (SHA2-224)   | FIPS180-4 | messageLength: [min = 0, max = 65528, increment = 8]     |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| SHA256 (SHA2-256)   | FIPS180-4 | messageLength: [min = 0, max = 65528, increment = 8]     |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| SHA384 (SHA2-384)   | FIPS180-4 | messageLength: [min = 0, max = 65528, increment = 8]     |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| SHA512 (SHA2-512)   | FIPS180-4 | messageLength: [min = 0, max = 65528, increment = 8]     |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| AES-CCM             | SP800-38C | Key size: 128, 256                                       |</div>
+<div class="line">|                     |           | Direction: encrypt and decrypt                           |</div>
+<div class="line">|                     |           | ivLen: [min = 56, max = 104, increment 8]                |</div>
+<div class="line">|                     |           | tagLen: 32, 48, 64, 80, 96, 112, 128                     |</div>
+<div class="line">|                     |           | payloadLen: [min = 0, max = 256, increment = 8]          |</div>
+<div class="line">|                     |           | aadLen: [min = 0, max = 368, increment = 8]              |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| AES-GMAC            | SP800-38B | Key size: 128, 192, 256                                  |</div>
+<div class="line">|                     |           | ivLen: [min = 8, max = 1024, increment 8]                |</div>
+<div class="line">|                     |           | tagLen: 32, 64, 96, 104, 112, 120, 128                   |</div>
+<div class="line">|                     |           | aadLen: [min = 0, max = 65536, increment = 8]            |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| AES-CMAC            | SP800-38B | Key size: 128, 256                                       |</div>
+<div class="line">|                     |           | msgLen: [min = 8, max = 65528, increment 8]              |</div>
+<div class="line">|                     |           | macLen: [min = 8, max = 128, increment = 8]              |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| HMAC-SHA1           | FIPS198-1 | keyLen: [min = 8, max = 524288, increment = 8]           |</div>
+<div class="line">| (HMAC-SHA-1)        |           | macLen: [min = 32, max = 160, increment = 8]             |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| HMAC-SHA224         | FIPS198-1 | keyLen: [min = 8, max = 524288, increment = 8]           |</div>
+<div class="line">| (HMAC-SHA2-224)     |           | macLen: [min = 32, max = 224, increment = 8]             |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| HMAC-SHA256         | FIPS198-1 | keyLen: [min = 8, max = 524288, increment = 8]           |</div>
+<div class="line">| (HMAC-SHA2-256)     |           | macLen: [min = 32, max = 256, increment = 8]             |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| HMAC-SHA384         | FIPS198-1 | keyLen: [min = 8, max = 524288, increment = 8]           |</div>
+<div class="line">| (HMAC-SHA2-384)     |           | macLen: [min = 32, max = 384, increment = 8]             |</div>
+<div class="line">|---------------------+-----------+----------------------------------------------------------|</div>
+<div class="line">| HMAC-SHA512         | FIPS198-1 | keyLen: [min = 8, max = 524288, increment = 8]           |</div>
+<div class="line">| (HMAC-SHA2-512)     |           | macLen: [min = 32, max = 512, increment = 8]             |</div>
+<div class="line">+--------------------------------------------------------------------------------------------+</div>
+</div><!-- fragment --> <h3><a class="anchor" id="autotoc_md38"></a>
+Self-Test</h3>
+<p>In order to support CMVP, the library implements Self-Test functionality that is available with all compilation options. The test is always performed as part of library initialization (power-up). There is no conditional self-test functionality as none of such conditions occur (i.e. pair-wise consistency test, software/firmware load test, manual key entry test, continuous random number generator test, and bypass test). The self-test consists of Cryptographic algorithm test (known answer test) on following algorithms: <br  />
+</p><ul>
+<li>AES-GCM <br  />
+</li>
+<li>AES-GMAC <br  />
+</li>
+<li>AES-CCM <br  />
+</li>
+<li>AES-CBC <br  />
+</li>
+<li>AES-CTR <br  />
+</li>
+<li>AES-ECB <br  />
+</li>
+<li>TDES-EDE-CBC <br  />
+</li>
+<li>AES-CMAC <br  />
+</li>
+<li>SHA1 <br  />
+</li>
+<li>SHA224 <br  />
+</li>
+<li>SHA256 <br  />
+</li>
+<li>SHA384 <br  />
+</li>
+<li>SHA512 <br  />
+</li>
+<li>HMAC-SHA1 <br  />
+</li>
+<li>HMAC-SHA224 <br  />
+</li>
+<li>HMAC-SHA256 <br  />
+</li>
+<li>HMAC-SHA384 <br  />
+</li>
+<li>HMAC-SHA512 <br  />
+</li>
+</ul>
+<p>Example detection of library self-test completion &amp; error in the application: </p><div class="fragment"><div class="line">IMB_ARCH arch;</div>
+<div class="line">IMB_MGR *p_mgr = alloc_mb_mgr(0);</div>
+<div class="line"> </div>
+<div class="line">init_mb_mgr_auto(p_mgr, &amp;arch); /* or init_mb_mgr_sse/avx/avx2/avx512 */</div>
+<div class="line"> </div>
+<div class="line">/*</div>
+<div class="line"> * check for self-test presence and successful</div>
+<div class="line"> * - requires library version v1.3 or newer</div>
+<div class="line"> */</div>
+<div class="line">if (p_mgr-&gt;features &amp; IMB_FEATURE_SELF_TEST) {</div>
+<div class="line">        /* self-test feature present */</div>
+<div class="line">        if (p_mgr-&gt;features &amp; IMB_FEATURE_SELF_TEST_PASS) {</div>
+<div class="line">                printf(&quot;SELF-TEST: PASS\n&quot;);</div>
+<div class="line">        } else {</div>
+<div class="line">                printf(&quot;SELF-TEST: FAIL\n&quot;);</div>
+<div class="line">        }</div>
+<div class="line">} else {</div>
+<div class="line">        printf(&quot;SELF-TEST: N/A (requires library &gt;= v1.3)\n&quot;);</div>
+<div class="line">}</div>
+<div class="line"> </div>
+<div class="line">/* check for initialization self-test error */</div>
+<div class="line">if (imb_get_errno(p_mgr) == IMB_ERR_SELFTEST) {</div>
+<div class="line">        /* self-test error */</div>
+<div class="line">        exit(EXIT_FAILURE);</div>
+<div class="line">}</div>
+</div><!-- fragment --><h2><a class="anchor" id="autotoc_md39"></a>
+13.DLL Injection Attack</h2>
+<h3><a class="anchor" id="autotoc_md40"></a>
+Problem</h3>
+<p>The Windows OS has an insecure predefined search order and set of defaults when trying to locate a resource. If the resource location is not specified by the software, an attacker need only place a malicious version in one of the locations Windows will search, and it will be loaded instead. Although this weakness can occur with any resource, it is especially common with DLL files.</p>
+<h3><a class="anchor" id="autotoc_md41"></a>
+Solutions</h3>
+<p>Applications using intel-ipsec-mb DLL library may need to apply one of the solutions to prevent from DLL injection attack.</p>
+<p>Two solutions are available:</p><ul>
+<li>Using a Fully Qualified Path is the most secure way to load a DLL <br  />
+</li>
+<li>Signature verification of the DLL <br  />
+</li>
+</ul>
+<h3><a class="anchor" id="autotoc_md42"></a>
+Resources and Solution Details</h3>
+<ul>
+<li>Security remarks section of LoadLibraryEx documentation by Microsoft: <a href="https://docs.microsoft.com/en-us/windows/win32/api/libloaderapi/nf-libloaderapi-loadlibraryexa#security-remarks">https://docs.microsoft.com/en-us/windows/win32/api/libloaderapi/nf-libloaderapi-loadlibraryexa#security-remarks</a> <br  />
+</li>
+<li>Microsoft Dynamic Link Library Security article: <a href="https://docs.microsoft.com/en-us/windows/win32/dlls/dynamic-link-library-security">https://docs.microsoft.com/en-us/windows/win32/dlls/dynamic-link-library-security</a> <br  />
+</li>
+<li>Hijack Execution Flow: DLL Search Order Hijacking: <a href="https://attack.mitre.org/techniques/T1574/001">https://attack.mitre.org/techniques/T1574/001</a> <br  />
+</li>
+<li>Hijack Execution Flow: DLL Side-Loading: <a href="https://attack.mitre.org/techniques/T1574/002">https://attack.mitre.org/techniques/T1574/002</a> <br  />
+ </li>
+</ul>
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+<tr class="memitem:a6e356586d2d3d7e93ff1b23d4a90b344"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a6e356586d2d3d7e93ff1b23d4a90b344">IMB_CPUFLAGS_AVX2_T3</a>&#160;&#160;&#160;(<a class="el" href="intel-ipsec-mb_8h.html#a18f17a6bcef83c3976ca7a9b4ca624de">IMB_CPUFLAGS_AVX2_T2</a> | <a class="el" href="intel-ipsec-mb_8h.html#a8a946f162ff5e363d04f8b44d2f48747">IMB_FEATURE_AVX_IFMA</a>)</td></tr>
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+<tr class="memdesc:a34b6006fc39dd4ea23d3fec49237d382"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get next available job.  <br /></td></tr>
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+<tr class="memdesc:a3602a4ccaf1da4bf6787169370cef04f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Submit job for processing after validating.  <br /></td></tr>
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+<tr class="memdesc:af23c64e466272c5ae90fcf78fbcd0c3d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Submit job for processing without validating.  <br /></td></tr>
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+<tr class="memdesc:a18e5a7f85573f0006448deda41014117"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get next completed job.  <br /></td></tr>
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-<tr class="memdesc:a4726e3683b3579b1e643134278386d72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Force processing until next job in queue is completed.  <a href="intel-ipsec-mb_8h.html#a4726e3683b3579b1e643134278386d72">More...</a><br /></td></tr>
+<tr class="memdesc:a4726e3683b3579b1e643134278386d72"><td class="mdescLeft">&#160;</td><td class="mdescRight">Force processing until next job in queue is completed.  <br /></td></tr>
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-<tr class="memdesc:a712f6e7ecb2a16f8e1bc96b84d188365"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get number of jobs queued to be processed.  <a href="intel-ipsec-mb_8h.html#a712f6e7ecb2a16f8e1bc96b84d188365">More...</a><br /></td></tr>
+<tr class="memdesc:a712f6e7ecb2a16f8e1bc96b84d188365"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get number of jobs queued to be processed.  <br /></td></tr>
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-<tr class="separator:ab043c084d20c19d9952dee899b693085"><td class="memSeparator" colspan="2">&#160;</td></tr>
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+<tr class="separator:a6029af3f88d1908dd11a8f3e9eb9fd70"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aabfad78b032b6b160e3ba51477132524"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#aabfad78b032b6b160e3ba51477132524">IMB_SUBMIT_BURST</a>(_mgr,  _n_jobs,  _jobs)&#160;&#160;&#160;        ((_mgr)-&gt;submit_burst((_mgr), (_n_jobs), (_jobs)))</td></tr>
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+<tr class="separator:aabfad78b032b6b160e3ba51477132524"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:aa06f0e18794d4a95d16e61dfb1af70c4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#aa06f0e18794d4a95d16e61dfb1af70c4">IMB_SUBMIT_BURST_NOCHECK</a>(_mgr,  _n_jobs,  _jobs)&#160;&#160;&#160;        ((_mgr)-&gt;submit_burst_nocheck((_mgr), (_n_jobs), (_jobs)))</td></tr>
+<tr class="memdesc:aa06f0e18794d4a95d16e61dfb1af70c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Submit multiple jobs to be processed without validating.  <br /></td></tr>
+<tr class="separator:aa06f0e18794d4a95d16e61dfb1af70c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
+<tr class="memitem:afff52a9aaa1c1875e7c905e2fb29fc43"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#afff52a9aaa1c1875e7c905e2fb29fc43">IMB_FLUSH_BURST</a>(_mgr,  _max_jobs,  _jobs)&#160;&#160;&#160;        ((_mgr)-&gt;flush_burst((_mgr), (_max_jobs), (_jobs)))</td></tr>
+<tr class="memdesc:afff52a9aaa1c1875e7c905e2fb29fc43"><td class="mdescLeft">&#160;</td><td class="mdescRight">Force up to <em>max_jobs</em> outstanding jobs to completion.  <br /></td></tr>
+<tr class="separator:afff52a9aaa1c1875e7c905e2fb29fc43"><td class="memSeparator" colspan="2">&#160;</td></tr>
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@@ -330,8 +386,11 @@ Macros</h2></td></tr>
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-<tr class="memdesc:a1e122b460a714f2981f94bf7f4bba547"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-CFB-128 Encrypt/Decrypt up to one block.  <a href="intel-ipsec-mb_8h.html#a1e122b460a714f2981f94bf7f4bba547">More...</a><br /></td></tr>
+<tr class="memdesc:a1e122b460a714f2981f94bf7f4bba547"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-CFB-128 Encrypt/Decrypt up to one block.  <br /></td></tr>
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+<tr class="memdesc:ab4d68ab67a7d4a471f5cb454301aac9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-CFB-256 Encrypt/Decrypt up to one block.  <br /></td></tr>
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 <tr class="memitem:adb65fc01b63a475cca4cf532ace005b6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#adb65fc01b63a475cca4cf532ace005b6">IMB_AES128_GCM_ENC</a>(_mgr,  _exp_key,  _ctx,  _dst,  _src,  _len,  _iv,  _aad,  _aadl,  _tag,  _tagl)</td></tr>
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+<tr class="memdesc:adb23f957dde69fb3bb4c6798d1a69da4"><td class="mdescLeft">&#160;</td><td class="mdescRight">ZUC EEA3 Confidentiality functions.  <br /></td></tr>
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+<tr class="memdesc:ac789fe54f3a8f92144831a67b14501d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">ZUC EIA3 Integrity function.  <br /></td></tr>
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-<tr class="memdesc:a45ac331e1f9241e53fc35a1f88dec6ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Kasumi byte-level f8 operation on a single buffer.  <a href="intel-ipsec-mb_8h.html#a45ac331e1f9241e53fc35a1f88dec6ce">More...</a><br /></td></tr>
+<tr class="memdesc:a45ac331e1f9241e53fc35a1f88dec6ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Kasumi byte-level f8 operation on a single buffer.  <br /></td></tr>
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-<tr class="memdesc:ae3befb703f7dec2c0695e61542f3212c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Kasumi bit-level f8 operation on a single buffer.  <a href="intel-ipsec-mb_8h.html#ae3befb703f7dec2c0695e61542f3212c">More...</a><br /></td></tr>
+<tr class="memdesc:ae3befb703f7dec2c0695e61542f3212c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Kasumi bit-level f8 operation on a single buffer.  <br /></td></tr>
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+<tr class="memdesc:a884bfa72fc232c7e84043d0faee719ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Kasumi byte-level f8 operation in parallel on two buffers.  <br /></td></tr>
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-<tr class="memdesc:af35e87948218048e4bbad7162208fe41"><td class="mdescLeft">&#160;</td><td class="mdescRight">kasumi byte-level f8 operation in parallel on three buffers  <a href="intel-ipsec-mb_8h.html#af35e87948218048e4bbad7162208fe41">More...</a><br /></td></tr>
+<tr class="memdesc:af35e87948218048e4bbad7162208fe41"><td class="mdescLeft">&#160;</td><td class="mdescRight">kasumi byte-level f8 operation in parallel on three buffers  <br /></td></tr>
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+<tr class="memdesc:a7ed6be7362e5ff7553fb4e7633bee76a"><td class="mdescLeft">&#160;</td><td class="mdescRight">kasumi byte-level f8 operation in parallel on four buffers  <br /></td></tr>
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+<tr class="memdesc:a65b1afbadee23111046746a4d302bb0d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Kasumi f8 operation on N buffers.  <br /></td></tr>
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+<tr class="memdesc:a43c13bbdf83e2c75d6dd29d01dec4a1f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Kasumi bit-level f9 operation on a single buffer.  <br /></td></tr>
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+<tr class="memdesc:a66dcf1985c046ef619141a6706159940"><td class="mdescLeft">&#160;</td><td class="mdescRight">Kasumi bit-level f9 operation on a single buffer.  <br /></td></tr>
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 , <a class="el" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38">IMB_ERR_NULL_JOB</a>
 , <br />
-&#160;&#160;<a class="el" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6">IMB_ERR_MAX</a>
+&#160;&#160;<a class="el" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4f73ed8232981b84df1fee21024e01ac">IMB_ERR_QUEUE_SPACE</a>
+, <a class="el" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba99d845a176cd571dd6f99b0a430291c6">IMB_ERR_NULL_BURST</a>
+, <a class="el" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae2bc238b157942636836eaf0eedb5ddf">IMB_ERR_BURST_SIZE</a>
+, <a class="el" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae4584575cf7134ba02ca1d38bb3f6444">IMB_ERR_BURST_OOO</a>
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+&#160;&#160;<a class="el" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1873d38b8aaf5ebcd3f542b15c418829">IMB_ERR_SELFTEST</a>
+, <a class="el" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba436eb6f9e045a02e3ad5998da8c13d78">IMB_ERR_BURST_SUITE_ID</a>
+, <a class="el" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6">IMB_ERR_MAX</a>
 <br />
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-<tr class="memitem:a203fa854f71a1cca79f3f3ec251a33cc"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a> { <a class="el" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaf3e82db9a8b5b1b229c201735938969d">IMB_KEY_128_BYTES</a> = 16
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 , <a class="el" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cca573d62aa6a04d9ce2b3c34e226846598">IMB_KEY_192_BYTES</a> = 24
 , <a class="el" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccac139e7555c9b30725359698833eb213a">IMB_KEY_256_BYTES</a> = 32
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 <tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="func-members" name="func-members"></a>
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+<tr class="memdesc:a4490e7b324236315f1a9e141b39f99f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get library version in string format.  <br /></td></tr>
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+<tr class="memdesc:aee02bcb3a5e5eaee3632086f75c3d78d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get library version in numerical format.  <br /></td></tr>
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+<tr class="memdesc:a79f60b2bffbe91dac3e4f8b486e7ab10"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to get error status.  <br /></td></tr>
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+<tr class="memdesc:a61f664448a862fbb02e728ce518ff8e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">API to get description for <em>errnum</em>.  <br /></td></tr>
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+<tr class="memdesc:ab8dc617feb010b0f4cd74fd9e1eabb5e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Allocates memory for multi-buffer manager instance.  <br /></td></tr>
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+<tr class="memdesc:a238b96cc36c0dc64798a1244b94add8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Frees memory allocated previously by <a class="el" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e" title="Allocates memory for multi-buffer manager instance.">alloc_mb_mgr()</a>  <br /></td></tr>
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+<tr class="memdesc:ac8379ada0d6ec030ebad9828fbea9459"><td class="mdescLeft">&#160;</td><td class="mdescRight">Calculates necessary memory size for <a class="el" href="structIMB__MGR.html">IMB_MGR</a>.  <br /></td></tr>
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-<tr class="memdesc:a3a825e903d1f8f8611b98b60fcaa5a81"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes <a class="el" href="structIMB__MGR.html">IMB_MGR</a> pointers to out-of-order managers with use of externally allocated memory.  <a href="intel-ipsec-mb_8h.html#a3a825e903d1f8f8611b98b60fcaa5a81">More...</a><br /></td></tr>
+<tr class="memdesc:a3a825e903d1f8f8611b98b60fcaa5a81"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initializes <a class="el" href="structIMB__MGR.html">IMB_MGR</a> pointers to out-of-order managers with use of externally allocated memory.  <br /></td></tr>
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-<tr class="memdesc:a725703ff6da6b402bde7041a2fabfddf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Retrieves the bitmask with the features supported by the library, without having to allocate/initialize <a class="el" href="structIMB__MGR.html">IMB_MGR</a>;.  <a href="intel-ipsec-mb_8h.html#a725703ff6da6b402bde7041a2fabfddf">More...</a><br /></td></tr>
+<tr class="memdesc:a725703ff6da6b402bde7041a2fabfddf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Retrieves the bitmask with the features supported by the library, without having to allocate/initialize <a class="el" href="structIMB__MGR.html">IMB_MGR</a>;.  <br /></td></tr>
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+<tr class="memdesc:aee547b1b9e70e12c84d9949317e41c6c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize Multi-Buffer Manager structure.  <br /></td></tr>
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+<tr class="memdesc:a71b6563b6b4c0c504cd9b8302a242cfa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize Multi-Buffer Manager structure.    <br /></td></tr>
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+<tr class="memdesc:a98932a3c61d798b0c8a560dcc3dce16f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize Multi-Buffer Manager structure.    <br /></td></tr>
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+<tr class="memdesc:a2ad1941fe5d77b8bb2d6445679e3b0c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize Multi-Buffer Manager structure.    <br /></td></tr>
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+<tr class="memdesc:a950bf3b7a3c63a371b561ea20aaf3a18"><td class="mdescLeft">&#160;</td><td class="mdescRight">Submit job for processing after validating.  <br /></td></tr>
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+<tr class="memdesc:a800c395d326e718a2b520d0bb91cbb89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get number of jobs queued to be processed.  <br /></td></tr>
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+<tr class="memdesc:a80f792744558de173ea97d722c58e5c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get number of jobs queued to be processed.    <br /></td></tr>
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+<tr class="memdesc:a3518b02f06a82e9f83cd0435f3cf25c9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get next available job.  <br /></td></tr>
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-<tr class="memdesc:a49a3d54979188b3c68bdd621043125f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get next available job.   <a href="intel-ipsec-mb_8h.html#a49a3d54979188b3c68bdd621043125f7">More...</a><br /></td></tr>
+<tr class="memdesc:a49a3d54979188b3c68bdd621043125f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get next available job.    <br /></td></tr>
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+<tr class="memdesc:a40c08ba2c387e24f2096b1213c46c812"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get next available job.    <br /></td></tr>
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 <tr class="memitem:a055db1f6f16bc17724bdc64d0f313871"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="el" href="structIMB__JOB.html">IMB_JOB</a> *&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a055db1f6f16bc17724bdc64d0f313871">get_next_job_sse</a> (<a class="el" href="structIMB__MGR.html">IMB_MGR</a> *state)</td></tr>
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+<tr class="memdesc:a055db1f6f16bc17724bdc64d0f313871"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get next available job.    <br /></td></tr>
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+<tr class="memdesc:a2cbbd032835837fd0aa83b04f5337638"><td class="mdescLeft">&#160;</td><td class="mdescRight">Automatically initialize most performant Multi-buffer manager based on CPU features.  <br /></td></tr>
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 <tr class="memitem:a9911462fe4689c7420b827bb13fc3440"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> int&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a9911462fe4689c7420b827bb13fc3440">des_key_schedule</a> (uint64_t *ks, const void *key)</td></tr>
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+<tr class="memdesc:a9911462fe4689c7420b827bb13fc3440"><td class="mdescLeft">&#160;</td><td class="mdescRight">DES key schedule set up.  <br /></td></tr>
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+<tr class="memdesc:af33d7afa861dcedc2c284330a5a66164"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-128 Encryption.    <br /></td></tr>
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 <tr class="memitem:aa17c919e873b6cfd7ac990977eef7601"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#aa17c919e873b6cfd7ac990977eef7601">aes_gcm_enc_128_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:aa17c919e873b6cfd7ac990977eef7601"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-128 Encryption.   <a href="intel-ipsec-mb_8h.html#aa17c919e873b6cfd7ac990977eef7601">More...</a><br /></td></tr>
+<tr class="memdesc:aa17c919e873b6cfd7ac990977eef7601"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-128 Encryption.    <br /></td></tr>
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 <tr class="memitem:adec2f9778622b3e226f12bb326e75076"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#adec2f9778622b3e226f12bb326e75076">aes_gcm_enc_192_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:adec2f9778622b3e226f12bb326e75076"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Encryption.  <a href="intel-ipsec-mb_8h.html#adec2f9778622b3e226f12bb326e75076">More...</a><br /></td></tr>
+<tr class="memdesc:adec2f9778622b3e226f12bb326e75076"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Encryption.  <br /></td></tr>
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 <tr class="memitem:a0ff9569b5072896a4119a4c7d3849bfc"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a0ff9569b5072896a4119a4c7d3849bfc">aes_gcm_enc_192_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a0ff9569b5072896a4119a4c7d3849bfc"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Encryption.   <a href="intel-ipsec-mb_8h.html#a0ff9569b5072896a4119a4c7d3849bfc">More...</a><br /></td></tr>
+<tr class="memdesc:a0ff9569b5072896a4119a4c7d3849bfc"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Encryption.    <br /></td></tr>
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 <tr class="memitem:a9b462a3c00471e4338f0bae7d5abbda7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a9b462a3c00471e4338f0bae7d5abbda7">aes_gcm_enc_192_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a9b462a3c00471e4338f0bae7d5abbda7"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Encryption.   <a href="intel-ipsec-mb_8h.html#a9b462a3c00471e4338f0bae7d5abbda7">More...</a><br /></td></tr>
+<tr class="memdesc:a9b462a3c00471e4338f0bae7d5abbda7"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Encryption.    <br /></td></tr>
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 <tr class="memitem:a460ad1ebcb7df39e39c9aca214d8109c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a460ad1ebcb7df39e39c9aca214d8109c">aes_gcm_enc_256_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a460ad1ebcb7df39e39c9aca214d8109c"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Encryption.  <a href="intel-ipsec-mb_8h.html#a460ad1ebcb7df39e39c9aca214d8109c">More...</a><br /></td></tr>
+<tr class="memdesc:a460ad1ebcb7df39e39c9aca214d8109c"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Encryption.  <br /></td></tr>
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 <tr class="memitem:a45dea093699e6e2dd462b6cafccee672"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a45dea093699e6e2dd462b6cafccee672">aes_gcm_enc_256_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a45dea093699e6e2dd462b6cafccee672"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Encryption.   <a href="intel-ipsec-mb_8h.html#a45dea093699e6e2dd462b6cafccee672">More...</a><br /></td></tr>
+<tr class="memdesc:a45dea093699e6e2dd462b6cafccee672"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Encryption.    <br /></td></tr>
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 <tr class="memitem:a52c0913f10dd41fea5fe328037561ff8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a52c0913f10dd41fea5fe328037561ff8">aes_gcm_enc_256_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a52c0913f10dd41fea5fe328037561ff8"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Encryption.   <a href="intel-ipsec-mb_8h.html#a52c0913f10dd41fea5fe328037561ff8">More...</a><br /></td></tr>
+<tr class="memdesc:a52c0913f10dd41fea5fe328037561ff8"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Encryption.    <br /></td></tr>
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 <tr class="memitem:add2f5aafaf55cd0e0b20b2b62fcb025d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#add2f5aafaf55cd0e0b20b2b62fcb025d">aes_gcm_dec_128_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:add2f5aafaf55cd0e0b20b2b62fcb025d"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-128 Decryption.  <a href="intel-ipsec-mb_8h.html#add2f5aafaf55cd0e0b20b2b62fcb025d">More...</a><br /></td></tr>
+<tr class="memdesc:add2f5aafaf55cd0e0b20b2b62fcb025d"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-128 Decryption.  <br /></td></tr>
 <tr class="separator:add2f5aafaf55cd0e0b20b2b62fcb025d"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a8c9a7e51599dbce89a416e0d8422742b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a8c9a7e51599dbce89a416e0d8422742b">aes_gcm_dec_128_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a8c9a7e51599dbce89a416e0d8422742b"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-128 Decryption.   <a href="intel-ipsec-mb_8h.html#a8c9a7e51599dbce89a416e0d8422742b">More...</a><br /></td></tr>
+<tr class="memdesc:a8c9a7e51599dbce89a416e0d8422742b"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-128 Decryption.    <br /></td></tr>
 <tr class="separator:a8c9a7e51599dbce89a416e0d8422742b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ae1e8e1b4425af520048a9e1fe5689e4d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#ae1e8e1b4425af520048a9e1fe5689e4d">aes_gcm_dec_128_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:ae1e8e1b4425af520048a9e1fe5689e4d"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-128 Decryption.   <a href="intel-ipsec-mb_8h.html#ae1e8e1b4425af520048a9e1fe5689e4d">More...</a><br /></td></tr>
+<tr class="memdesc:ae1e8e1b4425af520048a9e1fe5689e4d"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-128 Decryption.    <br /></td></tr>
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 <tr class="memitem:acaff83c8ca568201805e0ada5a79f6e1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#acaff83c8ca568201805e0ada5a79f6e1">aes_gcm_dec_192_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:acaff83c8ca568201805e0ada5a79f6e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Decryption.  <a href="intel-ipsec-mb_8h.html#acaff83c8ca568201805e0ada5a79f6e1">More...</a><br /></td></tr>
+<tr class="memdesc:acaff83c8ca568201805e0ada5a79f6e1"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Decryption.  <br /></td></tr>
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 <tr class="memitem:ad45e83e263506684c786b4e7012055ac"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#ad45e83e263506684c786b4e7012055ac">aes_gcm_dec_192_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:ad45e83e263506684c786b4e7012055ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Decryption.   <a href="intel-ipsec-mb_8h.html#ad45e83e263506684c786b4e7012055ac">More...</a><br /></td></tr>
+<tr class="memdesc:ad45e83e263506684c786b4e7012055ac"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Decryption.    <br /></td></tr>
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 <tr class="memitem:a5ccd87fbcfffc238fbcd1fc816eb06ee"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a5ccd87fbcfffc238fbcd1fc816eb06ee">aes_gcm_dec_192_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a5ccd87fbcfffc238fbcd1fc816eb06ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Decryption.   <a href="intel-ipsec-mb_8h.html#a5ccd87fbcfffc238fbcd1fc816eb06ee">More...</a><br /></td></tr>
+<tr class="memdesc:a5ccd87fbcfffc238fbcd1fc816eb06ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-192 Decryption.    <br /></td></tr>
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 <tr class="memitem:afd8763c66749e9bc5e4e5eb2ac130e43"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#afd8763c66749e9bc5e4e5eb2ac130e43">aes_gcm_dec_256_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:afd8763c66749e9bc5e4e5eb2ac130e43"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Decryption.  <a href="intel-ipsec-mb_8h.html#afd8763c66749e9bc5e4e5eb2ac130e43">More...</a><br /></td></tr>
+<tr class="memdesc:afd8763c66749e9bc5e4e5eb2ac130e43"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Decryption.  <br /></td></tr>
 <tr class="separator:afd8763c66749e9bc5e4e5eb2ac130e43"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a9b79136dc5996baf598e3aeee520871c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a9b79136dc5996baf598e3aeee520871c">aes_gcm_dec_256_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a9b79136dc5996baf598e3aeee520871c"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Decryption.   <a href="intel-ipsec-mb_8h.html#a9b79136dc5996baf598e3aeee520871c">More...</a><br /></td></tr>
+<tr class="memdesc:a9b79136dc5996baf598e3aeee520871c"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Decryption.    <br /></td></tr>
 <tr class="separator:a9b79136dc5996baf598e3aeee520871c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ac16384799933d4f7b11cb56d9c66f5da"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#ac16384799933d4f7b11cb56d9c66f5da">aes_gcm_dec_256_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:ac16384799933d4f7b11cb56d9c66f5da"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Decryption.   <a href="intel-ipsec-mb_8h.html#ac16384799933d4f7b11cb56d9c66f5da">More...</a><br /></td></tr>
+<tr class="memdesc:ac16384799933d4f7b11cb56d9c66f5da"><td class="mdescLeft">&#160;</td><td class="mdescRight">AES-GCM-256 Decryption.    <br /></td></tr>
 <tr class="separator:ac16384799933d4f7b11cb56d9c66f5da"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:aca7ab49c370f8f7cb82f93db199bfd1c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#aca7ab49c370f8f7cb82f93db199bfd1c">aes_gcm_init_128_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</td></tr>
-<tr class="memdesc:aca7ab49c370f8f7cb82f93db199bfd1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-128 Encryption.  <a href="intel-ipsec-mb_8h.html#aca7ab49c370f8f7cb82f93db199bfd1c">More...</a><br /></td></tr>
+<tr class="memdesc:aca7ab49c370f8f7cb82f93db199bfd1c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-128 Encryption.  <br /></td></tr>
 <tr class="separator:aca7ab49c370f8f7cb82f93db199bfd1c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a7a9a24d480dcedac1aa40d53e01b8a76"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a7a9a24d480dcedac1aa40d53e01b8a76">aes_gcm_init_128_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</td></tr>
-<tr class="memdesc:a7a9a24d480dcedac1aa40d53e01b8a76"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-128 Encryption.   <a href="intel-ipsec-mb_8h.html#a7a9a24d480dcedac1aa40d53e01b8a76">More...</a><br /></td></tr>
+<tr class="memdesc:a7a9a24d480dcedac1aa40d53e01b8a76"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-128 Encryption.    <br /></td></tr>
 <tr class="separator:a7a9a24d480dcedac1aa40d53e01b8a76"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a8d225d08a5cf144208dacb155e192cb6"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a8d225d08a5cf144208dacb155e192cb6">aes_gcm_init_128_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</td></tr>
-<tr class="memdesc:a8d225d08a5cf144208dacb155e192cb6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-128 Encryption.   <a href="intel-ipsec-mb_8h.html#a8d225d08a5cf144208dacb155e192cb6">More...</a><br /></td></tr>
+<tr class="memdesc:a8d225d08a5cf144208dacb155e192cb6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-128 Encryption.    <br /></td></tr>
 <tr class="separator:a8d225d08a5cf144208dacb155e192cb6"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a5bbf84135701f572ec2ecb0c0898848b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a5bbf84135701f572ec2ecb0c0898848b">aes_gcm_init_192_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</td></tr>
-<tr class="memdesc:a5bbf84135701f572ec2ecb0c0898848b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-192 Encryption.  <a href="intel-ipsec-mb_8h.html#a5bbf84135701f572ec2ecb0c0898848b">More...</a><br /></td></tr>
+<tr class="memdesc:a5bbf84135701f572ec2ecb0c0898848b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-192 Encryption.  <br /></td></tr>
 <tr class="separator:a5bbf84135701f572ec2ecb0c0898848b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ac24548c2955399fd84b03216ad5b36fb"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#ac24548c2955399fd84b03216ad5b36fb">aes_gcm_init_192_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</td></tr>
-<tr class="memdesc:ac24548c2955399fd84b03216ad5b36fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-192 Encryption.   <a href="intel-ipsec-mb_8h.html#ac24548c2955399fd84b03216ad5b36fb">More...</a><br /></td></tr>
+<tr class="memdesc:ac24548c2955399fd84b03216ad5b36fb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-192 Encryption.    <br /></td></tr>
 <tr class="separator:ac24548c2955399fd84b03216ad5b36fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a757cd199a2e993c6610bbcdfc1da1ae4"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a757cd199a2e993c6610bbcdfc1da1ae4">aes_gcm_init_192_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</td></tr>
-<tr class="memdesc:a757cd199a2e993c6610bbcdfc1da1ae4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-192 Encryption.   <a href="intel-ipsec-mb_8h.html#a757cd199a2e993c6610bbcdfc1da1ae4">More...</a><br /></td></tr>
+<tr class="memdesc:a757cd199a2e993c6610bbcdfc1da1ae4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-192 Encryption.    <br /></td></tr>
 <tr class="separator:a757cd199a2e993c6610bbcdfc1da1ae4"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a09949bd5112eec14773dce239ca39033"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a09949bd5112eec14773dce239ca39033">aes_gcm_init_256_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</td></tr>
-<tr class="memdesc:a09949bd5112eec14773dce239ca39033"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-256 Encryption.  <a href="intel-ipsec-mb_8h.html#a09949bd5112eec14773dce239ca39033">More...</a><br /></td></tr>
+<tr class="memdesc:a09949bd5112eec14773dce239ca39033"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-256 Encryption.  <br /></td></tr>
 <tr class="separator:a09949bd5112eec14773dce239ca39033"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a3dd74260f4f34f7a53253c63ad3a6701"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a3dd74260f4f34f7a53253c63ad3a6701">aes_gcm_init_256_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</td></tr>
-<tr class="memdesc:a3dd74260f4f34f7a53253c63ad3a6701"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-256 Encryption.   <a href="intel-ipsec-mb_8h.html#a3dd74260f4f34f7a53253c63ad3a6701">More...</a><br /></td></tr>
+<tr class="memdesc:a3dd74260f4f34f7a53253c63ad3a6701"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-256 Encryption.    <br /></td></tr>
 <tr class="separator:a3dd74260f4f34f7a53253c63ad3a6701"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a99310b73bc9cde6b69b682e72cd0efc1"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a99310b73bc9cde6b69b682e72cd0efc1">aes_gcm_init_256_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</td></tr>
-<tr class="memdesc:a99310b73bc9cde6b69b682e72cd0efc1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-256 Encryption.   <a href="intel-ipsec-mb_8h.html#a99310b73bc9cde6b69b682e72cd0efc1">More...</a><br /></td></tr>
+<tr class="memdesc:a99310b73bc9cde6b69b682e72cd0efc1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-256 Encryption.    <br /></td></tr>
 <tr class="separator:a99310b73bc9cde6b69b682e72cd0efc1"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a7b12cabbfebb420022a19124aff78a3f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a7b12cabbfebb420022a19124aff78a3f">aes_gcm_enc_128_update_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</td></tr>
-<tr class="memdesc:a7b12cabbfebb420022a19124aff78a3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-128 encryption message.  <a href="intel-ipsec-mb_8h.html#a7b12cabbfebb420022a19124aff78a3f">More...</a><br /></td></tr>
+<tr class="memdesc:a7b12cabbfebb420022a19124aff78a3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-128 encryption message.  <br /></td></tr>
 <tr class="separator:a7b12cabbfebb420022a19124aff78a3f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ae3459d38a2ee2e1ce04b9f9f4bf55ea5"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#ae3459d38a2ee2e1ce04b9f9f4bf55ea5">aes_gcm_enc_128_update_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</td></tr>
-<tr class="memdesc:ae3459d38a2ee2e1ce04b9f9f4bf55ea5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-128 encryption message.   <a href="intel-ipsec-mb_8h.html#ae3459d38a2ee2e1ce04b9f9f4bf55ea5">More...</a><br /></td></tr>
+<tr class="memdesc:ae3459d38a2ee2e1ce04b9f9f4bf55ea5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-128 encryption message.    <br /></td></tr>
 <tr class="separator:ae3459d38a2ee2e1ce04b9f9f4bf55ea5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:abb5570a161a90391e25b2016bc98381b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#abb5570a161a90391e25b2016bc98381b">aes_gcm_enc_128_update_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</td></tr>
-<tr class="memdesc:abb5570a161a90391e25b2016bc98381b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-128 encryption message.   <a href="intel-ipsec-mb_8h.html#abb5570a161a90391e25b2016bc98381b">More...</a><br /></td></tr>
+<tr class="memdesc:abb5570a161a90391e25b2016bc98381b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-128 encryption message.    <br /></td></tr>
 <tr class="separator:abb5570a161a90391e25b2016bc98381b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a46c3df131f9e1e3ed1a283349c4072f7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a46c3df131f9e1e3ed1a283349c4072f7">aes_gcm_enc_192_update_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</td></tr>
-<tr class="memdesc:a46c3df131f9e1e3ed1a283349c4072f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-192 encryption message.  <a href="intel-ipsec-mb_8h.html#a46c3df131f9e1e3ed1a283349c4072f7">More...</a><br /></td></tr>
+<tr class="memdesc:a46c3df131f9e1e3ed1a283349c4072f7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-192 encryption message.  <br /></td></tr>
 <tr class="separator:a46c3df131f9e1e3ed1a283349c4072f7"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a548fcbb89ff5fb798bf71ab8e4ac88eb"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a548fcbb89ff5fb798bf71ab8e4ac88eb">aes_gcm_enc_192_update_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</td></tr>
-<tr class="memdesc:a548fcbb89ff5fb798bf71ab8e4ac88eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-192 encryption message.   <a href="intel-ipsec-mb_8h.html#a548fcbb89ff5fb798bf71ab8e4ac88eb">More...</a><br /></td></tr>
+<tr class="memdesc:a548fcbb89ff5fb798bf71ab8e4ac88eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-192 encryption message.    <br /></td></tr>
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-<tr class="memdesc:a174447b05661285b2729805f66bcef81"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-192 encryption message.   <a href="intel-ipsec-mb_8h.html#a174447b05661285b2729805f66bcef81">More...</a><br /></td></tr>
+<tr class="memdesc:a174447b05661285b2729805f66bcef81"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-192 encryption message.    <br /></td></tr>
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-<tr class="memdesc:ab831bdb2193a5adc54b51285f23ad5ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-256 encryption message.  <a href="intel-ipsec-mb_8h.html#ab831bdb2193a5adc54b51285f23ad5ce">More...</a><br /></td></tr>
+<tr class="memdesc:ab831bdb2193a5adc54b51285f23ad5ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-256 encryption message.  <br /></td></tr>
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-<tr class="memdesc:a351c2bf07dcab7e01570273c9df1e56f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-256 encryption message.   <a href="intel-ipsec-mb_8h.html#a351c2bf07dcab7e01570273c9df1e56f">More...</a><br /></td></tr>
+<tr class="memdesc:a351c2bf07dcab7e01570273c9df1e56f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-256 encryption message.    <br /></td></tr>
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+<tr class="memdesc:ad9592051cf26814ea5830826b553c547"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encrypt a block of a AES-GCM-256 encryption message.    <br /></td></tr>
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-<tr class="memdesc:a2216e461e916668b70d547513b0cf26f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-128 encryption message.  <a href="intel-ipsec-mb_8h.html#a2216e461e916668b70d547513b0cf26f">More...</a><br /></td></tr>
+<tr class="memdesc:a2216e461e916668b70d547513b0cf26f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-128 encryption message.  <br /></td></tr>
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+<tr class="memdesc:a796e1df6d2aa233a6e28a867c1a2c628"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-128 encryption message.    <br /></td></tr>
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-<tr class="memdesc:a4464684ff4cf4e9cb978409ad350c4d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-128 encryption message.   <a href="intel-ipsec-mb_8h.html#a4464684ff4cf4e9cb978409ad350c4d6">More...</a><br /></td></tr>
+<tr class="memdesc:a4464684ff4cf4e9cb978409ad350c4d6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-128 encryption message.    <br /></td></tr>
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-<tr class="memdesc:a58455aec5650ecfc6077c69c97031f63"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-192 encryption message.  <a href="intel-ipsec-mb_8h.html#a58455aec5650ecfc6077c69c97031f63">More...</a><br /></td></tr>
+<tr class="memdesc:a58455aec5650ecfc6077c69c97031f63"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-192 encryption message.  <br /></td></tr>
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-<tr class="memdesc:aa81615f7ddfc8e1a794c5e278d22f7fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-192 encryption message.   <a href="intel-ipsec-mb_8h.html#aa81615f7ddfc8e1a794c5e278d22f7fc">More...</a><br /></td></tr>
+<tr class="memdesc:aa81615f7ddfc8e1a794c5e278d22f7fc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-192 encryption message.    <br /></td></tr>
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+<tr class="memdesc:a615c26f03ba08c8cde73cb074bf6b363"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-192 encryption message.    <br /></td></tr>
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 <tr class="memitem:ab1a51ae4b3cf3e8fdb618773d7b24b68"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#ab1a51ae4b3cf3e8fdb618773d7b24b68">aes_gcm_dec_256_update_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</td></tr>
-<tr class="memdesc:ab1a51ae4b3cf3e8fdb618773d7b24b68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-256 encryption message.  <a href="intel-ipsec-mb_8h.html#ab1a51ae4b3cf3e8fdb618773d7b24b68">More...</a><br /></td></tr>
+<tr class="memdesc:ab1a51ae4b3cf3e8fdb618773d7b24b68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-256 encryption message.  <br /></td></tr>
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-<tr class="memdesc:a0c31c2e2760edc7b252214214159cd7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-256 encryption message.   <a href="intel-ipsec-mb_8h.html#a0c31c2e2760edc7b252214214159cd7a">More...</a><br /></td></tr>
+<tr class="memdesc:a0c31c2e2760edc7b252214214159cd7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-256 encryption message.    <br /></td></tr>
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+<tr class="memdesc:a141303c38f4eed1245b542b6e9473296"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decrypt a block of a AES-GCM-256 encryption message.    <br /></td></tr>
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-<tr class="memdesc:af63ae2246c6d89b7d6630623948d3886"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-128 encryption message.  <a href="intel-ipsec-mb_8h.html#af63ae2246c6d89b7d6630623948d3886">More...</a><br /></td></tr>
+<tr class="memdesc:af63ae2246c6d89b7d6630623948d3886"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-128 encryption message.  <br /></td></tr>
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+<tr class="memdesc:a40a83ee6dec0440cd99e5ff600e3803d"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-128 encryption message.    <br /></td></tr>
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-<tr class="memdesc:a004c38b922d25d8631252854426ebf44"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-128 encryption message.   <a href="intel-ipsec-mb_8h.html#a004c38b922d25d8631252854426ebf44">More...</a><br /></td></tr>
+<tr class="memdesc:a004c38b922d25d8631252854426ebf44"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-128 encryption message.    <br /></td></tr>
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 <tr class="memitem:a5dcb5c37d1a5377967888e9b76208f8c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a5dcb5c37d1a5377967888e9b76208f8c">aes_gcm_enc_192_finalize_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a5dcb5c37d1a5377967888e9b76208f8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-192 encryption message.  <a href="intel-ipsec-mb_8h.html#a5dcb5c37d1a5377967888e9b76208f8c">More...</a><br /></td></tr>
+<tr class="memdesc:a5dcb5c37d1a5377967888e9b76208f8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-192 encryption message.  <br /></td></tr>
 <tr class="separator:a5dcb5c37d1a5377967888e9b76208f8c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a5177757ae4a75ba41d5e7a8a534edc06"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a5177757ae4a75ba41d5e7a8a534edc06">aes_gcm_enc_192_finalize_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a5177757ae4a75ba41d5e7a8a534edc06"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-192 encryption message.   <a href="intel-ipsec-mb_8h.html#a5177757ae4a75ba41d5e7a8a534edc06">More...</a><br /></td></tr>
+<tr class="memdesc:a5177757ae4a75ba41d5e7a8a534edc06"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-192 encryption message.    <br /></td></tr>
 <tr class="separator:a5177757ae4a75ba41d5e7a8a534edc06"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a4f76beaee47ffeeeb6f94a132f898339"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a4f76beaee47ffeeeb6f94a132f898339">aes_gcm_enc_192_finalize_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a4f76beaee47ffeeeb6f94a132f898339"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-192 encryption message.   <a href="intel-ipsec-mb_8h.html#a4f76beaee47ffeeeb6f94a132f898339">More...</a><br /></td></tr>
+<tr class="memdesc:a4f76beaee47ffeeeb6f94a132f898339"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-192 encryption message.    <br /></td></tr>
 <tr class="separator:a4f76beaee47ffeeeb6f94a132f898339"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:afcdedeabc7516e7506fa5c81d07f6fd8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#afcdedeabc7516e7506fa5c81d07f6fd8">aes_gcm_enc_256_finalize_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:afcdedeabc7516e7506fa5c81d07f6fd8"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-256 encryption message.  <a href="intel-ipsec-mb_8h.html#afcdedeabc7516e7506fa5c81d07f6fd8">More...</a><br /></td></tr>
+<tr class="memdesc:afcdedeabc7516e7506fa5c81d07f6fd8"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-256 encryption message.  <br /></td></tr>
 <tr class="separator:afcdedeabc7516e7506fa5c81d07f6fd8"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a7fa5d4f44bb44600fa7b86697ccc385f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a7fa5d4f44bb44600fa7b86697ccc385f">aes_gcm_enc_256_finalize_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a7fa5d4f44bb44600fa7b86697ccc385f"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-256 encryption message.   <a href="intel-ipsec-mb_8h.html#a7fa5d4f44bb44600fa7b86697ccc385f">More...</a><br /></td></tr>
+<tr class="memdesc:a7fa5d4f44bb44600fa7b86697ccc385f"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-256 encryption message.    <br /></td></tr>
 <tr class="separator:a7fa5d4f44bb44600fa7b86697ccc385f"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a873a75e2175acd3741b5cfc41180fe2c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a873a75e2175acd3741b5cfc41180fe2c">aes_gcm_enc_256_finalize_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a873a75e2175acd3741b5cfc41180fe2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-256 encryption message.   <a href="intel-ipsec-mb_8h.html#a873a75e2175acd3741b5cfc41180fe2c">More...</a><br /></td></tr>
+<tr class="memdesc:a873a75e2175acd3741b5cfc41180fe2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">End encryption of a AES-GCM-256 encryption message.    <br /></td></tr>
 <tr class="separator:a873a75e2175acd3741b5cfc41180fe2c"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a08603861ac18d1dce7b322b0c3fb69c5"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a08603861ac18d1dce7b322b0c3fb69c5">aes_gcm_dec_128_finalize_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a08603861ac18d1dce7b322b0c3fb69c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-128 encryption message.  <a href="intel-ipsec-mb_8h.html#a08603861ac18d1dce7b322b0c3fb69c5">More...</a><br /></td></tr>
+<tr class="memdesc:a08603861ac18d1dce7b322b0c3fb69c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-128 encryption message.  <br /></td></tr>
 <tr class="separator:a08603861ac18d1dce7b322b0c3fb69c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:ac173e4fb252a820edb25ad790065ad39"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#ac173e4fb252a820edb25ad790065ad39">aes_gcm_dec_128_finalize_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:ac173e4fb252a820edb25ad790065ad39"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-128 encryption message.   <a href="intel-ipsec-mb_8h.html#ac173e4fb252a820edb25ad790065ad39">More...</a><br /></td></tr>
+<tr class="memdesc:ac173e4fb252a820edb25ad790065ad39"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-128 encryption message.    <br /></td></tr>
 <tr class="separator:ac173e4fb252a820edb25ad790065ad39"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a8e2bc4fff9de3c70ac140ff30e1cdce0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a8e2bc4fff9de3c70ac140ff30e1cdce0">aes_gcm_dec_128_finalize_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a8e2bc4fff9de3c70ac140ff30e1cdce0"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-128 encryption message.   <a href="intel-ipsec-mb_8h.html#a8e2bc4fff9de3c70ac140ff30e1cdce0">More...</a><br /></td></tr>
+<tr class="memdesc:a8e2bc4fff9de3c70ac140ff30e1cdce0"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-128 encryption message.    <br /></td></tr>
 <tr class="separator:a8e2bc4fff9de3c70ac140ff30e1cdce0"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a0fd357a1794d78ac2168bc7eff0442ce"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a0fd357a1794d78ac2168bc7eff0442ce">aes_gcm_dec_192_finalize_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a0fd357a1794d78ac2168bc7eff0442ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-192 encryption message.  <a href="intel-ipsec-mb_8h.html#a0fd357a1794d78ac2168bc7eff0442ce">More...</a><br /></td></tr>
+<tr class="memdesc:a0fd357a1794d78ac2168bc7eff0442ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-192 encryption message.  <br /></td></tr>
 <tr class="separator:a0fd357a1794d78ac2168bc7eff0442ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:aacc19f04c9ac80d1bf7391661e191798"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#aacc19f04c9ac80d1bf7391661e191798">aes_gcm_dec_192_finalize_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:aacc19f04c9ac80d1bf7391661e191798"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-192 encryption message.   <a href="intel-ipsec-mb_8h.html#aacc19f04c9ac80d1bf7391661e191798">More...</a><br /></td></tr>
+<tr class="memdesc:aacc19f04c9ac80d1bf7391661e191798"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-192 encryption message.    <br /></td></tr>
 <tr class="separator:aacc19f04c9ac80d1bf7391661e191798"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:afa136a3c06d45e914d15415dee27f001"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#afa136a3c06d45e914d15415dee27f001">aes_gcm_dec_192_finalize_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:afa136a3c06d45e914d15415dee27f001"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-192 encryption message.   <a href="intel-ipsec-mb_8h.html#afa136a3c06d45e914d15415dee27f001">More...</a><br /></td></tr>
+<tr class="memdesc:afa136a3c06d45e914d15415dee27f001"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-192 encryption message.    <br /></td></tr>
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 <tr class="memitem:adf7aa2e79dce7a9ed79134c086715fd0"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#adf7aa2e79dce7a9ed79134c086715fd0">aes_gcm_dec_256_finalize_sse</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:adf7aa2e79dce7a9ed79134c086715fd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-256 encryption message.  <a href="intel-ipsec-mb_8h.html#adf7aa2e79dce7a9ed79134c086715fd0">More...</a><br /></td></tr>
+<tr class="memdesc:adf7aa2e79dce7a9ed79134c086715fd0"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-256 encryption message.  <br /></td></tr>
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 <tr class="memitem:a72f76caa84e2803b2b4a26c81623f89e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a72f76caa84e2803b2b4a26c81623f89e">aes_gcm_dec_256_finalize_avx_gen2</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a72f76caa84e2803b2b4a26c81623f89e"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-256 encryption message.   <a href="intel-ipsec-mb_8h.html#a72f76caa84e2803b2b4a26c81623f89e">More...</a><br /></td></tr>
+<tr class="memdesc:a72f76caa84e2803b2b4a26c81623f89e"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-256 encryption message.    <br /></td></tr>
 <tr class="separator:a72f76caa84e2803b2b4a26c81623f89e"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a791be274839adc3d26d9a32aa319dc3b"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a791be274839adc3d26d9a32aa319dc3b">aes_gcm_dec_256_finalize_avx_gen4</a> (const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data, struct <a class="el" href="structgcm__context__data.html">gcm_context_data</a> *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</td></tr>
-<tr class="memdesc:a791be274839adc3d26d9a32aa319dc3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-256 encryption message.   <a href="intel-ipsec-mb_8h.html#a791be274839adc3d26d9a32aa319dc3b">More...</a><br /></td></tr>
+<tr class="memdesc:a791be274839adc3d26d9a32aa319dc3b"><td class="mdescLeft">&#160;</td><td class="mdescRight">End decryption of a AES-GCM-256 encryption message.    <br /></td></tr>
 <tr class="separator:a791be274839adc3d26d9a32aa319dc3b"><td class="memSeparator" colspan="2">&#160;</td></tr>
 <tr class="memitem:a46253857355ddae8d17bab1403289d0f"><td class="memItemLeft" align="right" valign="top"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="intel-ipsec-mb_8h.html#a46253857355ddae8d17bab1403289d0f">aes_gcm_precomp_128_sse</a> (struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *key_data)</td></tr>
-<tr class="memdesc:a46253857355ddae8d17bab1403289d0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precomputation of AES-GCM-128 HashKey constants.  <a href="intel-ipsec-mb_8h.html#a46253857355ddae8d17bab1403289d0f">More...</a><br /></td></tr>
+<tr class="memdesc:a46253857355ddae8d17bab1403289d0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precomputation of AES-GCM-128 HashKey constants.  <br /></td></tr>
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+<tr class="memdesc:ade16ed4c31baa50f8a10e3c85156a942"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precomputation of AES-GCM-128 HashKey constants.    <br /></td></tr>
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+<tr class="memdesc:aecf7277999128599c6cf8432b242ba36"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precomputation of AES-GCM-128 HashKey constants.    <br /></td></tr>
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+<tr class="memdesc:a72d93e3249806eee186d465dc04c09e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precomputation of AES-GCM-192 HashKey constants.  <br /></td></tr>
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+<tr class="memdesc:a6cb54cf9321dfb95af2eeb812f41fa8f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precomputation of AES-GCM-192 HashKey constants.    <br /></td></tr>
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+<tr class="memdesc:a18001897ea80cdce1f4f608b0922f767"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precomputation of AES-GCM-256 HashKey constants.  <br /></td></tr>
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+<tr class="memdesc:a2a883085207ee21caca109ab8250db08"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precomputation of AES-GCM-256 HashKey constants.    <br /></td></tr>
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+<tr class="memdesc:abef922c52013630ad70273cef095c564"><td class="mdescLeft">&#160;</td><td class="mdescRight">Precomputation of AES-GCM-256 HashKey constants.    <br /></td></tr>
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+<tr class="memdesc:a2f60098fff25e8b71b35e42cc7854339"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pre-processes AES-GCM-128 key data.    <br /></td></tr>
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+<tr class="memdesc:a3d7b8bc454b44abbeaa8f435280f8cb1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pre-processes AES-GCM-128 key data.    <br /></td></tr>
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+<tr class="memdesc:ac0ebc1e7678bde75c25d5c0ec7ab2f7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pre-processes AES-GCM-192 key data.  <br /></td></tr>
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+<tr class="memdesc:a6c9c0b179633aca3ba5c520bee32662f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pre-processes AES-GCM-192 key data.    <br /></td></tr>
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+<tr class="memdesc:ab71c95df9bd059e1a5e108d2513a0e2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pre-processes AES-GCM-192 key data.    <br /></td></tr>
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+<tr class="memdesc:a18fac8ea0f3acabb4d5ffab1152f477f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pre-processes AES-GCM-256 key data.  <br /></td></tr>
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+<tr class="memdesc:aaaabf4acdd43f98b6c2d31c8013ebbf4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pre-processes AES-GCM-256 key data.    <br /></td></tr>
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+<tr class="memdesc:a082773f106f399ca73afc56583805a8c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pre-processes AES-GCM-256 key data.    <br /></td></tr>
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+<tr class="memdesc:a4931dd6b1b91456bfe885e28ada0aaf3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Generation of ZUC-EEA3 Initialization Vector.  <br /></td></tr>
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 <h2 class="groupheader">Macro Definition Documentation</h2>
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-<p >Macros for aligning data structures and function inlines </p>
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 <p>AES-CFB-128 Encrypt/Decrypt up to one block. </p>
-<p >Processes only one buffer at a time. Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.</p>
+<p>Processes only one buffer at a time. Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.</p>
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+<div class="memitem">
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+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_AES256_CFB_ONE</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_mgr, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_dst, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_src, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_iv, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_exp_key, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_len&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td>&#160;&#160;&#160;        ((_mgr)-&gt;aes256_cfb_one((_dst), (_src), (_iv), (_exp_key), (_len)))</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>AES-CFB-256 Encrypt/Decrypt up to one block. </p>
+<p>Processes only one buffer at a time. Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">_dst</td><td>Plaintext/Ciphertext output </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">_src</td><td>Plaintext/Ciphertext input </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">_iv</td><td>Pointer to 16 byte IV </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">_exp_key</td><td>Pointer to expanded AES keys </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">_len</td><td>Length of data in bytes </td></tr>
+  </table>
+  </dd>
+</dl>
+
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-<p >Generate AES-128-CMAC subkeys.</p>
+<p>Generate AES-128-CMAC subkeys.</p>
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+<p>Generate AES-256-CMAC subkeys.</p>
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         </tr>
       </table>
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-<p >Generate encryption/decryption AES-128 expansion keys.</p>
+<p>Generate encryption/decryption AES-128 expansion keys.</p>
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+<h2 class="memtitle"><span class="permalink"><a href="#a574d86849e2c9ca402305eb479ca558d">&#9670;&#160;</a></span>IMB_AES_KEYEXP_192</h2>
 
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         </tr>
       </table>
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-<p >Generate encryption/decryption AES-192 expansion keys.</p>
+<p>Generate encryption/decryption AES-192 expansion keys.</p>
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   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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+<h2 class="memtitle"><span class="permalink"><a href="#a003306124dae4920161ed6d4a7bf4e2f">&#9670;&#160;</a></span>IMB_AES_KEYEXP_256</h2>
 
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@@ -3793,7 +3851,7 @@ Functions</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p >Generate encryption/decryption AES-256 expansion keys.</p>
+<p>Generate encryption/decryption AES-256 expansion keys.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#a5a5f2342f2b1e65e41084d915c3b2cda">&#9670;&nbsp;</a></span>IMB_AES_XCBC_KEYEXP</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a5a5f2342f2b1e65e41084d915c3b2cda">&#9670;&#160;</a></span>IMB_AES_XCBC_KEYEXP</h2>
 
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         </tr>
       </table>
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-<p >Generate AES-128-XCBC expansion keys.</p>
+<p>Generate AES-128-XCBC expansion keys.</p>
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   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#af0f2f0bfad62f740bc2e22e60f48af8d">&#9670;&nbsp;</a></span>IMB_ASSERT</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#af0f2f0bfad62f740bc2e22e60f48af8d">&#9670;&#160;</a></span>IMB_ASSERT</h2>
 
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-<p >Custom ASSERT and DIM macros </p>
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+<h2 class="memtitle"><span class="permalink"><a href="#a8f6a258b6a13952fad9c217194c716f0">&#9670;&#160;</a></span>IMB_CHACHA20_POLY1305_DEC_FINALIZE</h2>
 
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+<h2 class="memtitle"><span class="permalink"><a href="#a7575d2fafb2b970bd08a49a556602031">&#9670;&#160;</a></span>IMB_CHACHA20_POLY1305_ENC_FINALIZE</h2>
 
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-<h2 class="memtitle"><span class="permalink"><a href="#a0329fede890d95a97423a714410e1576">&#9670;&nbsp;</a></span>IMB_CPUFLAGS_AVX</h2>
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-<h2 class="memtitle"><span class="permalink"><a href="#ac0a92622a85423541536321231a6cb7d">&#9670;&nbsp;</a></span>IMB_CPUFLAGS_AVX2</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#ac0a92622a85423541536321231a6cb7d">&#9670;&#160;</a></span>IMB_CPUFLAGS_AVX2</h2>
 
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 <b>Value:</b><div class="fragment"><div class="line">                                 (<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0329fede890d95a97423a714410e1576">IMB_CPUFLAGS_AVX</a> | <a class="code hl_define" href="intel-ipsec-mb_8h.html#a225e2cd9c1445795fc62879eabad2530">IMB_FEATURE_AVX2</a> | \</div>
 <div class="line">                                 <a class="code hl_define" href="intel-ipsec-mb_8h.html#a557f3de4bcc0bd7e9bd90e5e1d1b9b09">IMB_FEATURE_BMI2</a>)</div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a0329fede890d95a97423a714410e1576"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0329fede890d95a97423a714410e1576">IMB_CPUFLAGS_AVX</a></div><div class="ttdeci">#define IMB_CPUFLAGS_AVX</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1034</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a225e2cd9c1445795fc62879eabad2530"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a225e2cd9c1445795fc62879eabad2530">IMB_FEATURE_AVX2</a></div><div class="ttdeci">#define IMB_FEATURE_AVX2</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1010</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a557f3de4bcc0bd7e9bd90e5e1d1b9b09"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a557f3de4bcc0bd7e9bd90e5e1d1b9b09">IMB_FEATURE_BMI2</a></div><div class="ttdeci">#define IMB_FEATURE_BMI2</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1025</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a0329fede890d95a97423a714410e1576"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0329fede890d95a97423a714410e1576">IMB_CPUFLAGS_AVX</a></div><div class="ttdeci">#define IMB_CPUFLAGS_AVX</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:961</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a225e2cd9c1445795fc62879eabad2530"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a225e2cd9c1445795fc62879eabad2530">IMB_FEATURE_AVX2</a></div><div class="ttdeci">#define IMB_FEATURE_AVX2</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:932</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a557f3de4bcc0bd7e9bd90e5e1d1b9b09"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a557f3de4bcc0bd7e9bd90e5e1d1b9b09">IMB_FEATURE_BMI2</a></div><div class="ttdeci">#define IMB_FEATURE_BMI2</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:947</div></div>
 </div><!-- fragment -->
+</div>
+</div>
+<a id="a18f17a6bcef83c3976ca7a9b4ca624de" name="a18f17a6bcef83c3976ca7a9b4ca624de"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#a18f17a6bcef83c3976ca7a9b4ca624de">&#9670;&#160;</a></span>IMB_CPUFLAGS_AVX2_T2</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_CPUFLAGS_AVX2_T2</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<b>Value:</b><div class="fragment"><div class="line">                                 (<a class="code hl_define" href="intel-ipsec-mb_8h.html#ac0a92622a85423541536321231a6cb7d">IMB_CPUFLAGS_AVX2</a> | <a class="code hl_define" href="intel-ipsec-mb_8h.html#acb9c15eabfb9bafeb15a06886fa91e90">IMB_FEATURE_SHANI</a> | \</div>
+<div class="line">                                 <a class="code hl_define" href="intel-ipsec-mb_8h.html#af4321e4e3c947f9b9fb7f204aaecf2c3">IMB_FEATURE_VAES</a> | <a class="code hl_define" href="intel-ipsec-mb_8h.html#a153d695ecd1af69a0d23385a50654614">IMB_FEATURE_VPCLMULQDQ</a> | \</div>
+<div class="line">                                 <a class="code hl_define" href="intel-ipsec-mb_8h.html#aa67ab4088ac2f8cadbe839101d276567">IMB_FEATURE_GFNI</a>)</div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a153d695ecd1af69a0d23385a50654614"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a153d695ecd1af69a0d23385a50654614">IMB_FEATURE_VPCLMULQDQ</a></div><div class="ttdeci">#define IMB_FEATURE_VPCLMULQDQ</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:942</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa67ab4088ac2f8cadbe839101d276567"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa67ab4088ac2f8cadbe839101d276567">IMB_FEATURE_GFNI</a></div><div class="ttdeci">#define IMB_FEATURE_GFNI</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:945</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ac0a92622a85423541536321231a6cb7d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac0a92622a85423541536321231a6cb7d">IMB_CPUFLAGS_AVX2</a></div><div class="ttdeci">#define IMB_CPUFLAGS_AVX2</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:962</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_acb9c15eabfb9bafeb15a06886fa91e90"><div class="ttname"><a href="intel-ipsec-mb_8h.html#acb9c15eabfb9bafeb15a06886fa91e90">IMB_FEATURE_SHANI</a></div><div class="ttdeci">#define IMB_FEATURE_SHANI</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:926</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_af4321e4e3c947f9b9fb7f204aaecf2c3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af4321e4e3c947f9b9fb7f204aaecf2c3">IMB_FEATURE_VAES</a></div><div class="ttdeci">#define IMB_FEATURE_VAES</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:941</div></div>
+</div><!-- fragment -->
+</div>
+</div>
+<a id="a6e356586d2d3d7e93ff1b23d4a90b344" name="a6e356586d2d3d7e93ff1b23d4a90b344"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#a6e356586d2d3d7e93ff1b23d4a90b344">&#9670;&#160;</a></span>IMB_CPUFLAGS_AVX2_T3</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_CPUFLAGS_AVX2_T3&#160;&#160;&#160;(<a class="el" href="intel-ipsec-mb_8h.html#a18f17a6bcef83c3976ca7a9b4ca624de">IMB_CPUFLAGS_AVX2_T2</a> | <a class="el" href="intel-ipsec-mb_8h.html#a8a946f162ff5e363d04f8b44d2f48747">IMB_FEATURE_AVX_IFMA</a>)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
 </div>
 </div>
 <a id="a0a250932ede6ca7b69f5c763c24cf51d" name="a0a250932ede6ca7b69f5c763c24cf51d"></a>
-<h2 class="memtitle"><span class="permalink"><a href="#a0a250932ede6ca7b69f5c763c24cf51d">&#9670;&nbsp;</a></span>IMB_CPUFLAGS_AVX512</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a0a250932ede6ca7b69f5c763c24cf51d">&#9670;&#160;</a></span>IMB_CPUFLAGS_AVX512</h2>
 
 <div class="memitem">
 <div class="memproto">
@@ -4169,10 +4263,45 @@ Functions</h2></td></tr>
       </table>
 </div><div class="memdoc">
 
+</div>
+</div>
+<a id="af7bdbff703949eb2cf2dd3d3a08803de" name="af7bdbff703949eb2cf2dd3d3a08803de"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#af7bdbff703949eb2cf2dd3d3a08803de">&#9670;&#160;</a></span>IMB_CPUFLAGS_AVX512_T2</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_CPUFLAGS_AVX512_T2</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<b>Value:</b><div class="fragment"><div class="line">                                 (<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0a250932ede6ca7b69f5c763c24cf51d">IMB_CPUFLAGS_AVX512</a> | <a class="code hl_define" href="intel-ipsec-mb_8h.html#af4321e4e3c947f9b9fb7f204aaecf2c3">IMB_FEATURE_VAES</a> | \</div>
+<div class="line">                                 <a class="code hl_define" href="intel-ipsec-mb_8h.html#a153d695ecd1af69a0d23385a50654614">IMB_FEATURE_VPCLMULQDQ</a> | <a class="code hl_define" href="intel-ipsec-mb_8h.html#aa67ab4088ac2f8cadbe839101d276567">IMB_FEATURE_GFNI</a> | \</div>
+<div class="line">                                 <a class="code hl_define" href="intel-ipsec-mb_8h.html#a0134dfaffe12427a8f2182247c6f1f48">IMB_FEATURE_AVX512_IFMA</a> | <a class="code hl_define" href="intel-ipsec-mb_8h.html#acb9c15eabfb9bafeb15a06886fa91e90">IMB_FEATURE_SHANI</a>)</div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a0134dfaffe12427a8f2182247c6f1f48"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0134dfaffe12427a8f2182247c6f1f48">IMB_FEATURE_AVX512_IFMA</a></div><div class="ttdeci">#define IMB_FEATURE_AVX512_IFMA</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:946</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a0a250932ede6ca7b69f5c763c24cf51d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0a250932ede6ca7b69f5c763c24cf51d">IMB_CPUFLAGS_AVX512</a></div><div class="ttdeci">#define IMB_CPUFLAGS_AVX512</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:964</div></div>
+</div><!-- fragment -->
+</div>
+</div>
+<a id="a85dab1abb0996e9ff4d4258fef3f9abd" name="a85dab1abb0996e9ff4d4258fef3f9abd"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#a85dab1abb0996e9ff4d4258fef3f9abd">&#9670;&#160;</a></span>IMB_CPUFLAGS_AVX_T2</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_CPUFLAGS_AVX_T2</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<b>Value:</b><div class="fragment"><div class="line">                                 (<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0329fede890d95a97423a714410e1576">IMB_CPUFLAGS_AVX</a> | <a class="code hl_define" href="intel-ipsec-mb_8h.html#acb9c15eabfb9bafeb15a06886fa91e90">IMB_FEATURE_SHANI</a> | \</div>
+<div class="line">                                 <a class="code hl_define" href="intel-ipsec-mb_8h.html#aa67ab4088ac2f8cadbe839101d276567">IMB_FEATURE_GFNI</a>)</div>
+</div><!-- fragment -->
 </div>
 </div>
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-<h2 class="memtitle"><span class="permalink"><a href="#a6afb888ab232bab1c3ca027eb071f388">&#9670;&nbsp;</a></span>IMB_CPUFLAGS_NO_AESNI</h2>
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 </div><!-- fragment -->
+</div>
+</div>
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+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_CPUFLAGS_SSE_T2&#160;&#160;&#160;(<a class="el" href="intel-ipsec-mb_8h.html#a5654f563aaad731df22c8e8517c9154c">IMB_CPUFLAGS_SSE</a> | <a class="el" href="intel-ipsec-mb_8h.html#acb9c15eabfb9bafeb15a06886fa91e90">IMB_FEATURE_SHANI</a>)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
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+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
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+        </tr>
+      </table>
+</div><div class="memdoc">
+
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-<p >WIMAX OFDMA HCS CRC8 function (IEEE 802.16) </p>
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 <div class="line">                                <a class="code hl_define" href="intel-ipsec-mb_8h.html#a803871900c08e2dc1b3f805ed4ecefd8">IMB_FEATURE_AVX512VL</a>)</div>
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+<div class="ttc" id="aintel-ipsec-mb_8h_html_a803871900c08e2dc1b3f805ed4ecefd8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a803871900c08e2dc1b3f805ed4ecefd8">IMB_FEATURE_AVX512VL</a></div><div class="ttdeci">#define IMB_FEATURE_AVX512VL</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:937</div></div>
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+        <tr>
+          <td class="memname">#define IMB_FEATURE_AVX_IFMA&#160;&#160;&#160;(1ULL &lt;&lt; 22)</td>
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+
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+</div><div class="memdoc">
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-<p >Multi-buffer manager detected features</p><ul>
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+
+</div>
+</div>
+<a id="ad3faac9d03a87621ae02c10337b4edf8" name="ad3faac9d03a87621ae02c10337b4edf8"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#ad3faac9d03a87621ae02c10337b4edf8">&#9670;&#160;</a></span>IMB_FLAG_GFNI_OFF</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_FLAG_GFNI_OFF&#160;&#160;&#160;(1ULL &lt;&lt; 2)</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>disable use of GFNI extension </p>
 
 </div>
 </div>
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+<h2 class="memtitle"><span class="permalink"><a href="#a3d45fcff99a9ea952b4dd6ef70e36e0c">&#9670;&#160;</a></span>IMB_FLAG_SHANI_OFF</h2>
 
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@@ -5097,12 +5311,57 @@ Functions</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p >disable use of SHANI extension </p>
+<p>disable use of SHANI extension </p>
+
+</div>
+</div>
+<a id="afff52a9aaa1c1875e7c905e2fb29fc43" name="afff52a9aaa1c1875e7c905e2fb29fc43"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#afff52a9aaa1c1875e7c905e2fb29fc43">&#9670;&#160;</a></span>IMB_FLUSH_BURST</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_FLUSH_BURST</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_mgr, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_max_jobs, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_jobs&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td>&#160;&#160;&#160;        ((_mgr)-&gt;flush_burst((_mgr), (_max_jobs), (_jobs)))</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Force up to <em>max_jobs</em> outstanding jobs to completion. </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">_max_jobs</td><td>Maximum number of jobs to flush </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">_jobs</td><td>List of pointers to completed jobs</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Number of completed jobs </dd></dl>
 
 </div>
 </div>
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-<h2 class="memtitle"><span class="permalink"><a href="#a4726e3683b3579b1e643134278386d72">&#9670;&nbsp;</a></span>IMB_FLUSH_JOB</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a4726e3683b3579b1e643134278386d72">&#9670;&#160;</a></span>IMB_FLUSH_JOB</h2>
 
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-<h2 class="memtitle"><span class="permalink"><a href="#ae97681c203afbd818a39fb797613a232">&#9670;&nbsp;</a></span>IMB_GCM_128_KEY_LEN</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#ae97681c203afbd818a39fb797613a232">&#9670;&#160;</a></span>IMB_GCM_128_KEY_LEN</h2>
 
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+<h2 class="memtitle"><span class="permalink"><a href="#a7201a0be67f1e6f3757169b0166dd47d">&#9670;&#160;</a></span>IMB_GCM_192_KEY_LEN</h2>
 
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+<h2 class="memtitle"><span class="permalink"><a href="#a4c4c40ec87c2354832f5b182b22d2111">&#9670;&#160;</a></span>IMB_GCM_256_KEY_LEN</h2>
 
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+<h2 class="memtitle"><span class="permalink"><a href="#a59def6ed420a4ef91ce4a6562cc2c4d5">&#9670;&#160;</a></span>IMB_GCM_BLOCK_LEN</h2>
 
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+<h2 class="memtitle"><span class="permalink"><a href="#a0c6f54ab6663187fa401c766a981a41e">&#9670;&#160;</a></span>IMB_GCM_ENC_KEY_LEN</h2>
 
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@@ -5199,7 +5458,7 @@ Functions</h2></td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#a87884da318b3013893b725d047b53702">&#9670;&nbsp;</a></span>IMB_GCM_IV_DATA_LEN</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a87884da318b3013893b725d047b53702">&#9670;&#160;</a></span>IMB_GCM_IV_DATA_LEN</h2>
 
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         </tr>
       </table>
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-<p >IV data is limited to 16 bytes as follows: 12 bytes is provided by an application - pre-counter block j0: 4 byte salt (from Security Association) concatenated with 8 byte Initialization Vector (from IPSec ESP Payload). 4 byte value 0x00000001 is padded automatically by the library - there is no need to add these 4 bytes on application side anymore. </p>
+<p>IV data is limited to 16 bytes as follows: 12 bytes is provided by an application - pre-counter block j0: 4 byte salt (from Security Association) concatenated with 8 byte Initialization Vector (from IPSec ESP Payload). 4 byte value 0x00000001 is padded automatically by the library - there is no need to add these 4 bytes on application side anymore. </p>
 
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+<h2 class="memtitle"><span class="permalink"><a href="#a73715b8c1ba918ce6d5c21749841b47b">&#9670;&#160;</a></span>IMB_GCM_KEY_SETS</h2>
 
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@@ -5224,12 +5483,12 @@ Functions</h2></td></tr>
         </tr>
       </table>
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-<p >exp key + 14 exp round keys </p>
+<p>exp key + 14 exp round keys </p>
 
 </div>
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-<h2 class="memtitle"><span class="permalink"><a href="#a18e5a7f85573f0006448deda41014117">&#9670;&nbsp;</a></span>IMB_GET_COMPLETED_JOB</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a18e5a7f85573f0006448deda41014117">&#9670;&#160;</a></span>IMB_GET_COMPLETED_JOB</h2>
 
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@@ -5253,10 +5512,55 @@ Functions</h2></td></tr>
 </dl>
 <dl class="section return"><dt>Returns</dt><dd>Pointer to completed <a class="el" href="structIMB__JOB.html">IMB_JOB</a> or NULL if next job not complete </dd></dl>
 
+</div>
+</div>
+<a id="a6029af3f88d1908dd11a8f3e9eb9fd70" name="a6029af3f88d1908dd11a8f3e9eb9fd70"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#a6029af3f88d1908dd11a8f3e9eb9fd70">&#9670;&#160;</a></span>IMB_GET_NEXT_BURST</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_GET_NEXT_BURST</td>
+          <td>(</td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_mgr, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_n_jobs, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">&#160;</td>
+          <td class="paramname">_jobs&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td>&#160;&#160;&#160;        ((_mgr)-&gt;get_next_burst((_mgr), (_n_jobs), (_jobs)))</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Get next available burst (list of pointers to available <a class="el" href="structIMB__JOB.html">IMB_JOB</a> structures). </p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">_n_jobs</td><td>Requested number of burst jobs </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">_jobs</td><td>List of pointers to returned jobs</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Number of returned jobs. May be less than number of requested jobs if not enough space in queue. <a class="el" href="intel-ipsec-mb_8h.html#afff52a9aaa1c1875e7c905e2fb29fc43" title="Force up to max_jobs outstanding jobs to completion.">IMB_FLUSH_BURST()</a> can be used to free up space. </dd></dl>
+
 </div>
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+<h2 class="memtitle"><span class="permalink"><a href="#a34b6006fc39dd4ea23d3fec49237d382">&#9670;&#160;</a></span>IMB_GET_NEXT_JOB</h2>
 
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-<h2 class="memtitle"><span class="permalink"><a href="#a477ad08a4c55e2c6458b7e86dae803ec">&#9670;&nbsp;</a></span>IMB_GHASH</h2>
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-<h2 class="memtitle"><span class="permalink"><a href="#a230f16784519d7e2b69de87871d35cb2">&#9670;&nbsp;</a></span>IMB_GHASH_PRE</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a230f16784519d7e2b69de87871d35cb2">&#9670;&#160;</a></span>IMB_GHASH_PRE</h2>
 
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-<h2 class="memtitle"><span class="permalink"><a href="#a37996cede66ee8036b1b113af5f553ac">&#9670;&nbsp;</a></span>IMB_HEC_32</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a37996cede66ee8036b1b113af5f553ac">&#9670;&#160;</a></span>IMB_HEC_32</h2>
 
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         </tr>
       </table>
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-<p >HEC compute functions </p>
+<p>HEC compute functions </p>
 
 </div>
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+<h2 class="memtitle"><span class="permalink"><a href="#aa0b62ba2c9fb07a1ad3c8105ec4374a4">&#9670;&#160;</a></span>IMB_HEC_64</h2>
 
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+<h2 class="memtitle"><span class="permalink"><a href="#a45ac331e1f9241e53fc35a1f88dec6ce">&#9670;&#160;</a></span>IMB_KASUMI_F8_1_BUFFER</h2>
 
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 <p>Kasumi byte-level f8 operation on a single buffer. </p>
-<p >This function performs kasumi f8 operation on a single buffer. The key has already been scheduled with kasumi_init_f8_key_sched(). No extra bits are modified.</p>
+<p>This function performs kasumi f8 operation on a single buffer. The key has already been scheduled with kasumi_init_f8_key_sched(). No extra bits are modified.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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+<h2 class="memtitle"><span class="permalink"><a href="#ae3befb703f7dec2c0695e61542f3212c">&#9670;&#160;</a></span>IMB_KASUMI_F8_1_BUFFER_BIT</h2>
 
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 <div class="line">                                 (_offset)))</div>
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 <p>Kasumi bit-level f8 operation on a single buffer. </p>
-<p >This function performs kasumi f8 operation on a single buffer. The key has already been scheduled with kasumi_init_f8_key_sched(). No extra bits are modified.</p>
+<p>This function performs kasumi f8 operation on a single buffer. The key has already been scheduled with kasumi_init_f8_key_sched(). No extra bits are modified.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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+<h2 class="memtitle"><span class="permalink"><a href="#a884bfa72fc232c7e84043d0faee719ee">&#9670;&#160;</a></span>IMB_KASUMI_F8_2_BUFFER</h2>
 
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 <div class="line">                             (_len1), (_src2), (_dst2), (_len2)))</div>
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 <p>Kasumi byte-level f8 operation in parallel on two buffers. </p>
-<p >This function performs kasumi f8 operation on a two buffers. They will be processed with the same key, which has already been scheduled with kasumi_init_f8_key_sched().</p>
+<p>This function performs kasumi f8 operation on a two buffers. They will be processed with the same key, which has already been scheduled with kasumi_init_f8_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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 <div class="line">                             (_len)))</div>
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 <p>kasumi byte-level f8 operation in parallel on three buffers </p>
-<p >This function performs kasumi f8 operation on a three buffers. They must all have the same length and they will be processed with the same key, which has already been scheduled with kasumi_init_f8_key_sched().</p>
+<p>This function performs kasumi f8 operation on a three buffers. They must all have the same length and they will be processed with the same key, which has already been scheduled with kasumi_init_f8_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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 <p>kasumi byte-level f8 operation in parallel on four buffers </p>
-<p >This function performs kasumi f8 operation on four buffers. They must all have the same length and they will be processed with the same key, which has already been scheduled with kasumi_init_f8_key_sched().</p>
+<p>This function performs kasumi f8 operation on four buffers. They must all have the same length and they will be processed with the same key, which has already been scheduled with kasumi_init_f8_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
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     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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 <div class="line">                             (_count)))</div>
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 <p>Kasumi f8 operation on N buffers. </p>
-<p >All input buffers can have different lengths and they will be processed with the same key, which has already been scheduled with kasumi_init_f8_key_sched().</p>
+<p>All input buffers can have different lengths and they will be processed with the same key, which has already been scheduled with kasumi_init_f8_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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 <p>Kasumi bit-level f9 operation on a single buffer. </p>
-<p >The first QWORD of in represents the COUNT and FRESH, the last QWORD represents the DIRECTION and PADDING. (See 3GPP TS 35.201 v10.0 section 4)</p>
-<p >The key has already been scheduled with kasumi_init_f9_key_sched().</p>
+<p>The first QWORD of in represents the COUNT and FRESH, the last QWORD represents the DIRECTION and PADDING. (See 3GPP TS 35.201 v10.0 section 4)</p>
+<p>The key has already been scheduled with kasumi_init_f9_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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 <div class="line">                                  (_tag), (_dir)))</div>
 </div><!-- fragment -->
 <p>Kasumi bit-level f9 operation on a single buffer. </p>
-<p >The key has already been scheduled with kasumi_init_f9_key_sched().</p>
+<p>The key has already been scheduled with kasumi_init_f9_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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         </tr>
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-<p >KASUMI F8 key schedule init function.</p>
+<p>KASUMI F8 key schedule init function.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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-<p >KASUMI F9 key schedule init function.</p>
+<p>KASUMI F9 key schedule init function.</p>
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   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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         </tr>
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-<p >This function returns the size of the kasumi_key_sched_t, used to store the key schedule.</p>
+<p>This function returns the size of the kasumi_key_sched_t, used to store the key schedule.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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+</div>
+</div>
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+<h2 class="memtitle"><span class="permalink"><a href="#af9070daf9749490016e9b5106b338867">&#9670;&#160;</a></span>IMB_MAX_BURST_SIZE</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_MAX_BURST_SIZE&#160;&#160;&#160;128</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
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-          <td class="memname">#define IMB_MAX_JOBS&#160;&#160;&#160;128</td>
+          <td class="memname">#define IMB_MAX_JOBS&#160;&#160;&#160;(<a class="el" href="intel-ipsec-mb_8h.html#af9070daf9749490016e9b5106b338867">IMB_MAX_BURST_SIZE</a> * 2)</td>
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-<p >Authenticated Tag Length in bytes. Valid values are 16 (most likely), 12 or 8. </p>
+<p>Authenticated Tag Length in bytes. Valid values are 16 (most likely), 12 or 8. </p>
 
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+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_MD5_BLOCK_SIZE&#160;&#160;&#160;64</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a id="a472528903f010fe2c365d1ff23565eaa" name="a472528903f010fe2c365d1ff23565eaa"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#a472528903f010fe2c365d1ff23565eaa">&#9670;&#160;</a></span>IMB_MD5_DIGEST_SIZE_IN_BYTES</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_MD5_DIGEST_SIZE_IN_BYTES&#160;&#160;&#160;16</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a id="a52b27293e2a19809c5f7d0f2afab97a2" name="a52b27293e2a19809c5f7d0f2afab97a2"></a>
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         </tr>
       </table>
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-<p >Authenticate 64-byte data buffer with MD5.</p>
+<p>Authenticate 64-byte data buffer with MD5.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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-<p >Authenticate variable sized data with SHA1.</p>
+<p>Authenticate variable sized data with SHA1.</p>
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     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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       </table>
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-<p >512 bits is 64 byte blocks </p>
+<p>512 bits is 64 byte blocks </p>
 
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-<p >Authenticate 64-byte data buffer with SHA1.</p>
+<p>Authenticate 64-byte data buffer with SHA1.</p>
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     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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-<p >Authenticate variable sized data with SHA224.</p>
+<p>Authenticate variable sized data with SHA224.</p>
 <dl class="params"><dt>Parameters</dt><dd>
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     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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+<h2 class="memtitle"><span class="permalink"><a href="#ab1f7eb5e9bcd0c69a70dc76747f919f6">&#9670;&#160;</a></span>IMB_SHA224_ONE_BLOCK</h2>
 
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-<p >Authenticate 64-byte data buffer with SHA224.</p>
+<p>Authenticate 64-byte data buffer with SHA224.</p>
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     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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         </tr>
       </table>
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-<p >Authenticate variable sized data with SHA256.</p>
+<p>Authenticate variable sized data with SHA256.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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         </tr>
       </table>
 </div><div class="memdoc">
-<p >Authenticate 64-byte data buffer with SHA256.</p>
+<p>Authenticate 64-byte data buffer with SHA256.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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         </tr>
       </table>
 </div><div class="memdoc">
-<p >Authenticate variable sized data with SHA384.</p>
+<p>Authenticate variable sized data with SHA384.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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         </tr>
       </table>
 </div><div class="memdoc">
-<p >Authenticate 128-byte data buffer with SHA384.</p>
+<p>Authenticate 128-byte data buffer with SHA384.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
@@ -6828,7 +7174,7 @@ Functions</h2></td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#ac806d6b629633e801409d3e363d83f6c">&#9670;&nbsp;</a></span>IMB_SHA512</h2>
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         </tr>
       </table>
 </div><div class="memdoc">
-<p >Authenticate variable sized data with SHA512.</p>
+<p>Authenticate variable sized data with SHA512.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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@@ -6922,7 +7268,7 @@ Functions</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p >Authenticate 128-byte data buffer with SHA512.</p>
+<p>Authenticate 128-byte data buffer with SHA512.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
@@ -6932,10 +7278,25 @@ Functions</h2></td></tr>
   </dd>
 </dl>
 
+</div>
+</div>
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+<h2 class="memtitle"><span class="permalink"><a href="#a7c912b7543122de6f05355fa4848eb83">&#9670;&#160;</a></span>IMB_SHA_224_BLOCK_SIZE</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_SHA_224_BLOCK_SIZE&#160;&#160;&#160;64</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>512 bits is 64 byte blocks </p>
+
 </div>
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         </tr>
       </table>
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-<p >512 bits is 64 byte blocks </p>
+<p>512 bits is 64 byte blocks </p>
 
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+<h2 class="memtitle"><span class="permalink"><a href="#a4bcfbb70da38433f8bcd3468779026f1">&#9670;&#160;</a></span>IMB_SNOW3G_F8_1_BUFFER</h2>
 
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         </tr>
       </table>
 </div><div class="memdoc">
-<p >This function performs snow3g f8 operation on a single buffer. The key has already been scheduled with snow3g_init_key_sched().</p>
+<p>This function performs snow3g f8 operation on a single buffer. The key has already been scheduled with snow3g_init_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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+<h2 class="memtitle"><span class="permalink"><a href="#a5d7a9e694b932b1c198782e22dc1ead5">&#9670;&#160;</a></span>IMB_SNOW3G_F8_1_BUFFER_BIT</h2>
 
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 <b>Value:</b><div class="fragment"><div class="line">        ((_mgr)-&gt;snow3g_f8_1_buffer_bit((_exp_key), (_iv), (_src),      \</div>
 <div class="line">                                        (_dst), (_len), (_offset)))</div>
-</div><!-- fragment --><p >This function performs snow3g f8 operation on a single buffer. The key has already been scheduled with snow3g_init_key_sched().</p>
+</div><!-- fragment --><p>This function performs snow3g f8 operation on a single buffer. The key has already been scheduled with snow3g_init_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
@@ -7115,7 +7476,7 @@ Functions</h2></td></tr>
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+<h2 class="memtitle"><span class="permalink"><a href="#a51085837f0775feae26fe3885f7459b7">&#9670;&#160;</a></span>IMB_SNOW3G_F8_2_BUFFER</h2>
 
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 <b>Value:</b><div class="fragment"><div class="line">        ((_mgr)-&gt;snow3g_f8_2_buffer((_exp_key), (_iv1), (_iv2),         \</div>
 <div class="line">                                    (_src1), (_dst1), (_len1),          \</div>
 <div class="line">                                    (_src2), (_dst2), (_len2)))</div>
-</div><!-- fragment --><p >This function performs snow3g f8 operation on two buffers. They will be processed with the same key, which has already been scheduled with snow3g_init_key_sched().</p>
+</div><!-- fragment --><p>This function performs snow3g f8 operation on two buffers. They will be processed with the same key, which has already been scheduled with snow3g_init_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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 </div>
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+<h2 class="memtitle"><span class="permalink"><a href="#a79b873457a74ad6c50e689709d79a0fb">&#9670;&#160;</a></span>IMB_SNOW3G_F8_4_BUFFER</h2>
 
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 <div class="line">                                    (_src2), (_dst2), (_len2),           \</div>
 <div class="line">                                    (_src3), (_dst3), (_len3),           \</div>
 <div class="line">                                    (_src4), (_dst4), (_len4)))</div>
-</div><!-- fragment --><p >This function performs snow3g f8 operation on four buffers. They will be processed with the same key, which has already been scheduled with snow3g_init_key_sched().</p>
+</div><!-- fragment --><p>This function performs snow3g f8 operation on four buffers. They will be processed with the same key, which has already been scheduled with snow3g_init_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#a8536e68d053999123eb104762ef51932">&#9670;&nbsp;</a></span>IMB_SNOW3G_F8_8_BUFFER</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a8536e68d053999123eb104762ef51932">&#9670;&#160;</a></span>IMB_SNOW3G_F8_8_BUFFER</h2>
 
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@@ -7589,7 +7950,7 @@ Functions</h2></td></tr>
 <div class="line">                                    (_src6), (_dst6), (_len6),           \</div>
 <div class="line">                                    (_src7), (_dst7), (_len7),           \</div>
 <div class="line">                                    (_src8), (_dst8), (_len8)))</div>
-</div><!-- fragment --><p >This function performs snow3g f8 operation on eight buffers. They will be processed with the same key, which has already been scheduled with snow3g_init_key_sched().</p>
+</div><!-- fragment --><p>This function performs snow3g f8 operation on eight buffers. They will be processed with the same key, which has already been scheduled with snow3g_init_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
@@ -7633,7 +7994,7 @@ Functions</h2></td></tr>
 </div>
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 <a id="aca8fb428a3b291950cd9dc6277ad801a" name="aca8fb428a3b291950cd9dc6277ad801a"></a>
-<h2 class="memtitle"><span class="permalink"><a href="#aca8fb428a3b291950cd9dc6277ad801a">&#9670;&nbsp;</a></span>IMB_SNOW3G_F8_8_BUFFER_MULTIKEY</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#aca8fb428a3b291950cd9dc6277ad801a">&#9670;&#160;</a></span>IMB_SNOW3G_F8_8_BUFFER_MULTIKEY</h2>
 
 <div class="memitem">
 <div class="memproto">
@@ -7683,7 +8044,7 @@ Functions</h2></td></tr>
 </div><div class="memdoc">
 <b>Value:</b><div class="fragment"><div class="line">        ((_mgr)-&gt;snow3g_f8_8_buffer_multikey((_exp_key), (_iv), (_src), (_dst),\</div>
 <div class="line">                                             (_len)))</div>
-</div><!-- fragment --><p >This function performs snow3g f8 operation on eight buffers. They will be processed with individual keys, which have already been scheduled with snow3g_init_key_sched().</p>
+</div><!-- fragment --><p>This function performs snow3g f8 operation on eight buffers. They will be processed with individual keys, which have already been scheduled with snow3g_init_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
@@ -7699,7 +8060,7 @@ Functions</h2></td></tr>
 </div>
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 <a id="a4538b34eaf3a3d402041ada1e8d03e2c" name="a4538b34eaf3a3d402041ada1e8d03e2c"></a>
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+<h2 class="memtitle"><span class="permalink"><a href="#a4538b34eaf3a3d402041ada1e8d03e2c">&#9670;&#160;</a></span>IMB_SNOW3G_F8_N_BUFFER</h2>
 
 <div class="memitem">
 <div class="memproto">
@@ -7755,7 +8116,7 @@ Functions</h2></td></tr>
 </div><div class="memdoc">
 <b>Value:</b><div class="fragment"><div class="line">        ((_mgr)-&gt;snow3g_f8_n_buffer((_exp_key), (_iv), (_src), \</div>
 <div class="line">                                    (_dst), (_len), (_count)))</div>
-</div><!-- fragment --><p >This function performs snow3g f8 operation in parallel on N buffers. All input buffers can have different lengths and they will be processed with the same key, which has already been scheduled with snow3g_init_key_sched().</p>
+</div><!-- fragment --><p>This function performs snow3g f8 operation in parallel on N buffers. All input buffers can have different lengths and they will be processed with the same key, which has already been scheduled with snow3g_init_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
@@ -7772,7 +8133,7 @@ Functions</h2></td></tr>
 </div>
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 <a id="a4a5ae1b04c7aee099c2f8fcbd488c38c" name="a4a5ae1b04c7aee099c2f8fcbd488c38c"></a>
-<h2 class="memtitle"><span class="permalink"><a href="#a4a5ae1b04c7aee099c2f8fcbd488c38c">&#9670;&nbsp;</a></span>IMB_SNOW3G_F8_N_BUFFER_MULTIKEY</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a4a5ae1b04c7aee099c2f8fcbd488c38c">&#9670;&#160;</a></span>IMB_SNOW3G_F8_N_BUFFER_MULTIKEY</h2>
 
 <div class="memitem">
 <div class="memproto">
@@ -7828,7 +8189,7 @@ Functions</h2></td></tr>
 </div><div class="memdoc">
 <b>Value:</b><div class="fragment"><div class="line">        ((_mgr)-&gt;snow3g_f8_n_buffer_multikey((_exp_key), (_iv), (_src),      \</div>
 <div class="line">                                             (_dst), (_len), (_count)))</div>
-</div><!-- fragment --><p >This function performs snow3g f8 operation in parallel on N buffers. All input buffers can have different lengths. Confidentiallity keys can vary, schedules with snow3g_init_key_sched_multi().</p>
+</div><!-- fragment --><p>This function performs snow3g f8 operation in parallel on N buffers. All input buffers can have different lengths. Confidentiallity keys can vary, schedules with snow3g_init_key_sched_multi().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#aa6a951033156fc06c25afb4f79de8851">&#9670;&nbsp;</a></span>IMB_SNOW3G_F9_1_BUFFER</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#aa6a951033156fc06c25afb4f79de8851">&#9670;&#160;</a></span>IMB_SNOW3G_F9_1_BUFFER</h2>
 
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-<p >This function performs a snow3g f9 operation on a single block of data. The key has already been scheduled with snow3g_init_f8_key_sched().</p>
+<p>This function performs a snow3g f9 operation on a single block of data. The key has already been scheduled with snow3g_init_f8_key_sched().</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#ac5b5ff1cc9cf44ea8587a7d054b7459d">&#9670;&nbsp;</a></span>IMB_SNOW3G_INIT_KEY_SCHED</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#ac5b5ff1cc9cf44ea8587a7d054b7459d">&#9670;&#160;</a></span>IMB_SNOW3G_INIT_KEY_SCHED</h2>
 
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@@ -7942,7 +8303,7 @@ Functions</h2></td></tr>
         </tr>
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-<p >Snow3g key schedule init function.</p>
+<p>Snow3g key schedule init function.</p>
 <dl class="params"><dt>Parameters</dt><dd>
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     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#a1ddd766994cb5d0b8e9ef5cd580cdcd2">&#9670;&nbsp;</a></span>IMB_SNOW3G_KEY_SCHED_SIZE</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a1ddd766994cb5d0b8e9ef5cd580cdcd2">&#9670;&#160;</a></span>IMB_SNOW3G_KEY_SCHED_SIZE</h2>
 
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         </tr>
       </table>
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-<p >This function returns the size of the snow3g_key_schedule_t, used to store the key schedule.</p>
+<p>This function returns the size of the snow3g_key_schedule_t, used to store the key schedule.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to multi-buffer structure </td></tr>
@@ -7983,8 +8344,8 @@ Functions</h2></td></tr>
 
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-<h2 class="memtitle"><span class="permalink"><a href="#ad95138f7b201a9d7f8e57a155af720f4">&#9670;&nbsp;</a></span>IMB_SUBMIT_BURST</h2>
+<a id="aabfad78b032b6b160e3ba51477132524" name="aabfad78b032b6b160e3ba51477132524"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#aabfad78b032b6b160e3ba51477132524">&#9670;&#160;</a></span>IMB_SUBMIT_BURST</h2>
 
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@@ -7999,36 +8360,39 @@ Functions</h2></td></tr>
           <td class="paramkey"></td>
           <td></td>
           <td class="paramtype">&#160;</td>
-          <td class="paramname">_jobs, </td>
+          <td class="paramname">_n_jobs, </td>
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         <tr>
           <td class="paramkey"></td>
           <td></td>
           <td class="paramtype">&#160;</td>
-          <td class="paramname">_n_jobs&#160;</td>
+          <td class="paramname">_jobs&#160;</td>
         </tr>
         <tr>
           <td></td>
           <td>)</td>
-          <td></td><td>&#160;&#160;&#160;        ((_mgr)-&gt;submit_burst((_mgr), (_jobs), (_n_jobs)))</td>
+          <td></td><td>&#160;&#160;&#160;        ((_mgr)-&gt;submit_burst((_mgr), (_n_jobs), (_jobs)))</td>
         </tr>
       </table>
 </div><div class="memdoc">
-<p >Submit multiple jobs to be processed synchronously after validating.</p>
+
+<p>Submit multiple jobs to be processed after validating. </p>
+<p>Prior to submission, <em>_jobs</em> need to be initialized with correct crypto job parameters and followed with a call to <a class="el" href="intel-ipsec-mb_8h.html#ada304337e78ef5a462c97c1f8151ef67" title="Sets up suite_id and session_id fields for selected cipher suite in provided job structure.">imb_set_session()</a>.</p>
 <dl class="params"><dt>Parameters</dt><dd>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">_jobs</td><td>Pointer to array of <a class="el" href="structIMB__JOB.html">IMB_JOB</a> structures </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">_n_jobs</td><td>Number of jobs to process</td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">_n_jobs</td><td>Number of jobs to submit for processing </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">_jobs</td><td>In: List of pointers to jobs for submission Out: List of pointers to completed jobs </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>Number of completed jobs </dd></dl>
+<dl class="section see"><dt>See also</dt><dd><a class="el" href="intel-ipsec-mb_8h.html#ada304337e78ef5a462c97c1f8151ef67" title="Sets up suite_id and session_id fields for selected cipher suite in provided job structure.">imb_set_session()</a></dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>Number of completed jobs or zero on error. If zero, <a class="el" href="intel-ipsec-mb_8h.html#a79f60b2bffbe91dac3e4f8b486e7ab10" title="API to get error status.">imb_get_errno()</a> can be used to check for potential error conditions and _jobs[0] contains pointer to invalid job </dd></dl>
 
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-<h2 class="memtitle"><span class="permalink"><a href="#ab043c084d20c19d9952dee899b693085">&#9670;&nbsp;</a></span>IMB_SUBMIT_BURST_NOCHECK</h2>
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+<h2 class="memtitle"><span class="permalink"><a href="#aa06f0e18794d4a95d16e61dfb1af70c4">&#9670;&#160;</a></span>IMB_SUBMIT_BURST_NOCHECK</h2>
 
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           <td class="paramkey"></td>
           <td></td>
           <td class="paramtype">&#160;</td>
-          <td class="paramname">_jobs, </td>
+          <td class="paramname">_n_jobs, </td>
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         <tr>
           <td class="paramkey"></td>
           <td></td>
           <td class="paramtype">&#160;</td>
-          <td class="paramname">_n_jobs&#160;</td>
+          <td class="paramname">_jobs&#160;</td>
         </tr>
         <tr>
           <td></td>
           <td>)</td>
-          <td></td><td>&#160;&#160;&#160;        ((_mgr)-&gt;submit_burst_nocheck((_mgr), (_jobs), (_n_jobs)))</td>
+          <td></td><td>&#160;&#160;&#160;        ((_mgr)-&gt;submit_burst_nocheck((_mgr), (_n_jobs), (_jobs)))</td>
         </tr>
       </table>
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-<p >Submit multiple jobs to be processed synchronously without validating.</p>
-<p >This is more performant but less secure than <a class="el" href="intel-ipsec-mb_8h.html#ad95138f7b201a9d7f8e57a155af720f4">IMB_SUBMIT_BURST()</a>.</p>
+
+<p>Submit multiple jobs to be processed without validating. </p>
+<p>Prior to submission <em>_jobs</em> need to be initialized with correct crypto job parameters and followed with call to <a class="el" href="intel-ipsec-mb_8h.html#ada304337e78ef5a462c97c1f8151ef67" title="Sets up suite_id and session_id fields for selected cipher suite in provided job structure.">imb_set_session()</a>.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
-    <tr><td class="paramdir">[in,out]</td><td class="paramname">_jobs</td><td>Pointer to array of <a class="el" href="structIMB__JOB.html">IMB_JOB</a> structures </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">_n_jobs</td><td>Number of jobs to process</td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">_n_jobs</td><td>Number of jobs to submit for processing </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">_jobs</td><td>In: List of pointers to jobs for submission Out: List of pointers to completed jobs </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>Number of completed jobs </dd></dl>
+<dl class="section see"><dt>See also</dt><dd><a class="el" href="intel-ipsec-mb_8h.html#ada304337e78ef5a462c97c1f8151ef67" title="Sets up suite_id and session_id fields for selected cipher suite in provided job structure.">imb_set_session()</a></dd></dl>
+<dl class="section return"><dt>Returns</dt><dd>Number of completed jobs or zero on error </dd></dl>
 
 </div>
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-<h2 class="memtitle"><span class="permalink"><a href="#ae487720f5112a3ecec659ab4aeada77e">&#9670;&nbsp;</a></span>IMB_SUBMIT_CIPHER_BURST</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#ae487720f5112a3ecec659ab4aeada77e">&#9670;&#160;</a></span>IMB_SUBMIT_CIPHER_BURST</h2>
 
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 <div class="line">                                     (_cipher), (_dir), (_key_size)))</div>
-</div><!-- fragment --><p >Submit multiple cipher jobs to be processed synchronously after validating.</p>
+</div><!-- fragment --><p>Submit multiple cipher jobs to be processed synchronously after validating.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#af819e81f584b3b56e0201a7174b3c0eb">&#9670;&nbsp;</a></span>IMB_SUBMIT_CIPHER_BURST_NOCHECK</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#af819e81f584b3b56e0201a7174b3c0eb">&#9670;&#160;</a></span>IMB_SUBMIT_CIPHER_BURST_NOCHECK</h2>
 
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 <b>Value:</b><div class="fragment"><div class="line">        ((_mgr)-&gt;submit_cipher_burst_nocheck((_mgr), (_jobs), (_n_jobs),\</div>
 <div class="line">                                             (_cipher), (_dir), (_key_size)))</div>
-</div><!-- fragment --><p >Submit multiple cipher jobs to be processed synchronously without validating.</p>
-<p >This is more performant but less secure than <a class="el" href="intel-ipsec-mb_8h.html#ae487720f5112a3ecec659ab4aeada77e">IMB_SUBMIT_CIPHER_BURST()</a>.</p>
+</div><!-- fragment --><p>Submit multiple cipher jobs to be processed synchronously without validating.</p>
+<p>This is more performant but less secure than <a class="el" href="intel-ipsec-mb_8h.html#ae487720f5112a3ecec659ab4aeada77e">IMB_SUBMIT_CIPHER_BURST()</a>.</p>
 <dl class="params"><dt>Parameters</dt><dd>
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     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#a3702b37004e38dd27a9b8a008a0c48ed">&#9670;&nbsp;</a></span>IMB_SUBMIT_HASH_BURST</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a3702b37004e38dd27a9b8a008a0c48ed">&#9670;&#160;</a></span>IMB_SUBMIT_HASH_BURST</h2>
 
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         </tr>
       </table>
 </div><div class="memdoc">
-<p >Submit multiple hash jobs to be processed synchronously after validating.</p>
+<p>Submit multiple hash jobs to be processed synchronously after validating.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
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+<h2 class="memtitle"><span class="permalink"><a href="#afd6b80655a6129fe063d2ffb391e3015">&#9670;&#160;</a></span>IMB_SUBMIT_HASH_BURST_NOCHECK</h2>
 
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         </tr>
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-<p >Submit multiple hash jobs to be processed synchronously without validating.</p>
-<p >This is more performant but less secure than <a class="el" href="intel-ipsec-mb_8h.html#a3702b37004e38dd27a9b8a008a0c48ed">IMB_SUBMIT_HASH_BURST()</a>.</p>
+<p>Submit multiple hash jobs to be processed synchronously without validating.</p>
+<p>This is more performant but less secure than <a class="el" href="intel-ipsec-mb_8h.html#a3702b37004e38dd27a9b8a008a0c48ed">IMB_SUBMIT_HASH_BURST()</a>.</p>
 <dl class="params"><dt>Parameters</dt><dd>
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     <tr><td class="paramdir">[in]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#a3602a4ccaf1da4bf6787169370cef04f">&#9670;&nbsp;</a></span>IMB_SUBMIT_JOB</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a3602a4ccaf1da4bf6787169370cef04f">&#9670;&#160;</a></span>IMB_SUBMIT_JOB</h2>
 
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 <p>Submit job for processing without validating. </p>
-<p >This is more performant but less secure than submit_job_xxx()</p>
+<p>This is more performant but less secure than submit_job_xxx()</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in,out]</td><td class="paramname">_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure</td></tr>
@@ -8366,7 +8732,7 @@ Functions</h2></td></tr>
 </div>
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-<h2 class="memtitle"><span class="permalink"><a href="#ad9bcb21181d1e07b4f66d8bf0514c1a3">&#9670;&nbsp;</a></span>IMB_VERSION</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#ad9bcb21181d1e07b4f66d8bf0514c1a3">&#9670;&#160;</a></span>IMB_VERSION</h2>
 
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@@ -8396,18 +8762,18 @@ Functions</h2></td></tr>
         </tr>
       </table>
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-<p >Macro to translate version number </p>
+<p>Macro to translate version number </p>
 
 </div>
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-<h2 class="memtitle"><span class="permalink"><a href="#a415abfc6067c0b1663a508993a4eb0d4">&#9670;&nbsp;</a></span>IMB_VERSION_NUM</h2>
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 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname">#define IMB_VERSION_NUM&#160;&#160;&#160;0x10200</td>
+          <td class="memname">#define IMB_VERSION_NUM&#160;&#160;&#160;0x10400</td>
         </tr>
       </table>
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@@ -8415,22 +8781,106 @@ Functions</h2></td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#a874972638400dafdb542319d61bfbfbc">&#9670;&nbsp;</a></span>IMB_VERSION_STR</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a874972638400dafdb542319d61bfbfbc">&#9670;&#160;</a></span>IMB_VERSION_STR</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_VERSION_STR&#160;&#160;&#160;&quot;1.4.0-dev&quot;</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+<p>Library version </p>
+
+</div>
+</div>
+<a id="a2b1faea7079fa3ddb2cabeb41aeb2a0a" name="a2b1faea7079fa3ddb2cabeb41aeb2a0a"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#a2b1faea7079fa3ddb2cabeb41aeb2a0a">&#9670;&#160;</a></span>IMB_ZUC256_DIGEST_LEN_IN_BYTES_MAX</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_ZUC256_DIGEST_LEN_IN_BYTES_MAX&#160;&#160;&#160;16</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
+<a id="a3dc24506ef16ad090414608c762b3d3c" name="a3dc24506ef16ad090414608c762b3d3c"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#a3dc24506ef16ad090414608c762b3d3c">&#9670;&#160;</a></span>IMB_ZUC256_DIGEST_LEN_IN_BYTES_MIN</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_ZUC256_DIGEST_LEN_IN_BYTES_MIN&#160;&#160;&#160;4</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
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+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_ZUC256_IV_LEN_IN_BYTES_MAX&#160;&#160;&#160;25</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
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+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_ZUC256_IV_LEN_IN_BYTES_MIN&#160;&#160;&#160;23</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
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+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname">#define IMB_ZUC256_KEY_LEN_IN_BYTES&#160;&#160;&#160;32</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
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-          <td class="memname">#define IMB_VERSION_STR&#160;&#160;&#160;&quot;1.2.0&quot;</td>
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+<div class="memproto">
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+        <tr>
+          <td class="memname">#define IMB_ZUC_IV_LEN_IN_BYTES&#160;&#160;&#160;16</td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+</div>
+</div>
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+        <tr>
+          <td class="memname">#define IMB_ZUC_KEY_LEN_IN_BYTES&#160;&#160;&#160;16</td>
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 <tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0ba9ba69cc32a2d17e3e7b4d4c982f26abd" name="aa12c6dbc4b212887ef528c215f513e0ba9ba69cc32a2d17e3e7b4d4c982f26abd"></a>IMB_ERR_NULL_MBMGR&#160;</td><td class="fielddoc"></td></tr>
@@ -9835,13 +10327,19 @@ Functions</h2></td></tr>
 <tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9" name="aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9"></a>IMB_ERR_JOB_NULL_GHASH_INIT_TAG&#160;</td><td class="fielddoc"></td></tr>
 <tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60" name="aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60"></a>IMB_ERR_MISSING_CPUFLAGS_INIT_MGR&#160;</td><td class="fielddoc"></td></tr>
 <tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38" name="aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38"></a>IMB_ERR_NULL_JOB&#160;</td><td class="fielddoc"></td></tr>
+<tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0ba4f73ed8232981b84df1fee21024e01ac" name="aa12c6dbc4b212887ef528c215f513e0ba4f73ed8232981b84df1fee21024e01ac"></a>IMB_ERR_QUEUE_SPACE&#160;</td><td class="fielddoc"></td></tr>
+<tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0ba99d845a176cd571dd6f99b0a430291c6" name="aa12c6dbc4b212887ef528c215f513e0ba99d845a176cd571dd6f99b0a430291c6"></a>IMB_ERR_NULL_BURST&#160;</td><td class="fielddoc"></td></tr>
+<tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0bae2bc238b157942636836eaf0eedb5ddf" name="aa12c6dbc4b212887ef528c215f513e0bae2bc238b157942636836eaf0eedb5ddf"></a>IMB_ERR_BURST_SIZE&#160;</td><td class="fielddoc"></td></tr>
+<tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0bae4584575cf7134ba02ca1d38bb3f6444" name="aa12c6dbc4b212887ef528c215f513e0bae4584575cf7134ba02ca1d38bb3f6444"></a>IMB_ERR_BURST_OOO&#160;</td><td class="fielddoc"></td></tr>
+<tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0ba1873d38b8aaf5ebcd3f542b15c418829" name="aa12c6dbc4b212887ef528c215f513e0ba1873d38b8aaf5ebcd3f542b15c418829"></a>IMB_ERR_SELFTEST&#160;</td><td class="fielddoc"></td></tr>
+<tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0ba436eb6f9e045a02e3ad5998da8c13d78" name="aa12c6dbc4b212887ef528c215f513e0ba436eb6f9e045a02e3ad5998da8c13d78"></a>IMB_ERR_BURST_SUITE_ID&#160;</td><td class="fielddoc"></td></tr>
 <tr><td class="fieldname"><a id="aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6" name="aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6"></a>IMB_ERR_MAX&#160;</td><td class="fielddoc"></td></tr>
 </table>
 
 </div>
 </div>
 <a id="a83132be2c4a6bf0453550bd1ae720006" name="a83132be2c4a6bf0453550bd1ae720006"></a>
-<h2 class="memtitle"><span class="permalink"><a href="#a83132be2c4a6bf0453550bd1ae720006">&#9670;&nbsp;</a></span>IMB_HASH_ALG</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a83132be2c4a6bf0453550bd1ae720006">&#9670;&#160;</a></span>IMB_HASH_ALG</h2>
 
 <div class="memitem">
 <div class="memproto">
@@ -9852,92 +10350,92 @@ Functions</h2></td></tr>
       </table>
 </div><div class="memdoc">
 <table class="fieldtable">
-<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58" name="a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58"></a>IMB_AUTH_HMAC_SHA_1&#160;</td><td class="fielddoc"><p >HMAC-SHA1 </p>
+<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58" name="a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58"></a>IMB_AUTH_HMAC_SHA_1&#160;</td><td class="fielddoc"><p>HMAC-SHA1 </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca" name="a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca"></a>IMB_AUTH_HMAC_SHA_224&#160;</td><td class="fielddoc"><p >HMAC-SHA224 </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca" name="a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca"></a>IMB_AUTH_HMAC_SHA_224&#160;</td><td class="fielddoc"><p>HMAC-SHA224 </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995" name="a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995"></a>IMB_AUTH_HMAC_SHA_256&#160;</td><td class="fielddoc"><p >HMAC-SHA256 </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995" name="a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995"></a>IMB_AUTH_HMAC_SHA_256&#160;</td><td class="fielddoc"><p>HMAC-SHA256 </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9" name="a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9"></a>IMB_AUTH_HMAC_SHA_384&#160;</td><td class="fielddoc"><p >HMAC-SHA384 </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9" name="a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9"></a>IMB_AUTH_HMAC_SHA_384&#160;</td><td class="fielddoc"><p>HMAC-SHA384 </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1" name="a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1"></a>IMB_AUTH_HMAC_SHA_512&#160;</td><td class="fielddoc"><p >HMAC-SHA512 </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1" name="a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1"></a>IMB_AUTH_HMAC_SHA_512&#160;</td><td class="fielddoc"><p>HMAC-SHA512 </p>
 </td></tr>
 <tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a17deb61684701b7ec37f68bd34b6d454" name="a83132be2c4a6bf0453550bd1ae720006a17deb61684701b7ec37f68bd34b6d454"></a>IMB_AUTH_AES_XCBC&#160;</td><td class="fielddoc"></td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe" name="a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe"></a>IMB_AUTH_MD5&#160;</td><td class="fielddoc"><p >HMAC-MD5 </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe" name="a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe"></a>IMB_AUTH_MD5&#160;</td><td class="fielddoc"><p>HMAC-MD5 </p>
 </td></tr>
 <tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a25f47297460775ab891a0abb8240b8e0" name="a83132be2c4a6bf0453550bd1ae720006a25f47297460775ab891a0abb8240b8e0"></a>IMB_AUTH_NULL&#160;</td><td class="fielddoc"></td></tr>
 <tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006aa1496e45f00afe54aeeb527089e14a0d" name="a83132be2c4a6bf0453550bd1ae720006aa1496e45f00afe54aeeb527089e14a0d"></a>IMB_AUTH_AES_GMAC&#160;</td><td class="fielddoc"></td></tr>
 <tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a70151af8840242c8f5bdb375f2f1135b" name="a83132be2c4a6bf0453550bd1ae720006a70151af8840242c8f5bdb375f2f1135b"></a>IMB_AUTH_CUSTOM&#160;</td><td class="fielddoc"></td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e" name="a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e"></a>IMB_AUTH_AES_CCM&#160;</td><td class="fielddoc"><p >AES128-CCM </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e" name="a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e"></a>IMB_AUTH_AES_CCM&#160;</td><td class="fielddoc"><p>AES128-CCM </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48" name="a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48"></a>IMB_AUTH_AES_CMAC&#160;</td><td class="fielddoc"><p >AES128-CMAC </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48" name="a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48"></a>IMB_AUTH_AES_CMAC&#160;</td><td class="fielddoc"><p>AES128-CMAC </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77" name="a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77"></a>IMB_AUTH_SHA_1&#160;</td><td class="fielddoc"><p >SHA1 </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77" name="a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77"></a>IMB_AUTH_SHA_1&#160;</td><td class="fielddoc"><p>SHA1 </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325" name="a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325"></a>IMB_AUTH_SHA_224&#160;</td><td class="fielddoc"><p >SHA224 </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325" name="a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325"></a>IMB_AUTH_SHA_224&#160;</td><td class="fielddoc"><p>SHA224 </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88" name="a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88"></a>IMB_AUTH_SHA_256&#160;</td><td class="fielddoc"><p >SHA256 </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88" name="a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88"></a>IMB_AUTH_SHA_256&#160;</td><td class="fielddoc"><p>SHA256 </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc" name="a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc"></a>IMB_AUTH_SHA_384&#160;</td><td class="fielddoc"><p >SHA384 </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc" name="a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc"></a>IMB_AUTH_SHA_384&#160;</td><td class="fielddoc"><p>SHA384 </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d" name="a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d"></a>IMB_AUTH_SHA_512&#160;</td><td class="fielddoc"><p >SHA512 </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d" name="a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d"></a>IMB_AUTH_SHA_512&#160;</td><td class="fielddoc"><p>SHA512 </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83" name="a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83"></a>IMB_AUTH_AES_CMAC_BITLEN&#160;</td><td class="fielddoc"><p >128-EIA2/NIA2 (3GPP) </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83" name="a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83"></a>IMB_AUTH_AES_CMAC_BITLEN&#160;</td><td class="fielddoc"><p>128-EIA2/NIA2 (3GPP) </p>
 </td></tr>
 <tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a2fcc080535b4dd16502ecd2b01c14048" name="a83132be2c4a6bf0453550bd1ae720006a2fcc080535b4dd16502ecd2b01c14048"></a>IMB_AUTH_PON_CRC_BIP&#160;</td><td class="fielddoc"></td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b" name="a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b"></a>IMB_AUTH_ZUC_EIA3_BITLEN&#160;</td><td class="fielddoc"><p >128-EIA3/NIA3 (3GPP) </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b" name="a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b"></a>IMB_AUTH_ZUC_EIA3_BITLEN&#160;</td><td class="fielddoc"><p>128-EIA3/NIA3 (3GPP) </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc" name="a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc"></a>IMB_AUTH_DOCSIS_CRC32&#160;</td><td class="fielddoc"><p >with DOCSIS_SEC_BPI only </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc" name="a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc"></a>IMB_AUTH_DOCSIS_CRC32&#160;</td><td class="fielddoc"><p>with DOCSIS_SEC_BPI only </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b" name="a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b"></a>IMB_AUTH_SNOW3G_UIA2_BITLEN&#160;</td><td class="fielddoc"><p >128-UIA2 (3GPP) </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b" name="a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b"></a>IMB_AUTH_SNOW3G_UIA2_BITLEN&#160;</td><td class="fielddoc"><p>128-UIA2 (3GPP) </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a" name="a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a"></a>IMB_AUTH_KASUMI_UIA1&#160;</td><td class="fielddoc"><p >128-UIA1 (3GPP) </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a" name="a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a"></a>IMB_AUTH_KASUMI_UIA1&#160;</td><td class="fielddoc"><p>128-UIA1 (3GPP) </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0" name="a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0"></a>IMB_AUTH_AES_GMAC_128&#160;</td><td class="fielddoc"><p >AES-GMAC (128-bit key) </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0" name="a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0"></a>IMB_AUTH_AES_GMAC_128&#160;</td><td class="fielddoc"><p>AES-GMAC (128-bit key) </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66" name="a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66"></a>IMB_AUTH_AES_GMAC_192&#160;</td><td class="fielddoc"><p >AES-GMAC (192-bit key) </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66" name="a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66"></a>IMB_AUTH_AES_GMAC_192&#160;</td><td class="fielddoc"><p>AES-GMAC (192-bit key) </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af" name="a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af"></a>IMB_AUTH_AES_GMAC_256&#160;</td><td class="fielddoc"><p >AES-GMAC (256-bit key) </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af" name="a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af"></a>IMB_AUTH_AES_GMAC_256&#160;</td><td class="fielddoc"><p>AES-GMAC (256-bit key) </p>
 </td></tr>
-<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205" name="a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205"></a>IMB_AUTH_AES_CMAC_256&#160;</td><td class="fielddoc"><p >AES256-CMAC </p>
+<tr><td class="fieldname"><a id="a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205" name="a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205"></a>IMB_AUTH_AES_CMAC_256&#160;</td><td class="fielddoc"><p>AES256-CMAC </p>
 </td></tr>
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+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void aes_cmac_subkey_gen_avx </td>
           <td>(</td>
-          <td class="paramtype">void *&#160;</td>
-          <td class="paramname"><em>out</em>, </td>
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-          <td class="paramkey"></td>
-          <td></td>
           <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>iv</em>, </td>
+          <td class="paramname"><em>key_exp</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>keys</em>, </td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>key1</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint64_t&#160;</td>
-          <td class="paramname"><em>len</em>&#160;</td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>key2</em>&#160;</td>
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-<p>AES-CFB-128 Encrypt/Decrypt up to one block.  </p>
-<p >Processes only one buffer at a time. Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.</p>
+<p></p>
+<p>Generate AES-128-CMAC subkeys.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[out]</td><td class="paramname">out</td><td>Plaintext/Ciphertext output </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>Plaintext/Ciphertext input </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">iv</td><td>Pointer to 16 byte IV </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">keys</td><td>Pointer to expanded AES keys </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data in bytes  </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">key_exp</td><td>Input expanded AES-128-CMAC key </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">key1</td><td>Subkey 1 </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">key2</td><td>Subkey 2   </td></tr>
   </table>
   </dd>
 </dl>
 
 </div>
 </div>
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-<h2 class="memtitle"><span class="permalink"><a href="#a7046666312bdba42b05bfbf63d0e1c6a">&#9670;&nbsp;</a></span>aes_cfb_128_one_avx2()</h2>
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-          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void aes_cfb_128_one_avx2 </td>
+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void aes_cmac_subkey_gen_avx2 </td>
           <td>(</td>
-          <td class="paramtype">void *&#160;</td>
-          <td class="paramname"><em>out</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>in</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
           <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>iv</em>, </td>
+          <td class="paramname"><em>key_exp</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>keys</em>, </td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>key1</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint64_t&#160;</td>
-          <td class="paramname"><em>len</em>&#160;</td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>key2</em>&#160;</td>
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         <tr>
           <td></td>
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       </table>
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-<p>AES-CFB-128 Encrypt/Decrypt up to one block.  </p>
-<p >Processes only one buffer at a time. Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.</p>
+<p></p>
+<p>Generate AES-128-CMAC subkeys.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[out]</td><td class="paramname">out</td><td>Plaintext/Ciphertext output </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>Plaintext/Ciphertext input </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">iv</td><td>Pointer to 16 byte IV </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">keys</td><td>Pointer to expanded AES keys </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data in bytes  </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">key_exp</td><td>Input expanded AES-128-CMAC key </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">key1</td><td>Subkey 1 </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">key2</td><td>Subkey 2   </td></tr>
   </table>
   </dd>
 </dl>
 
 </div>
 </div>
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-<h2 class="memtitle"><span class="permalink"><a href="#abb7c6395420af2addd92a3fa46e0fd28">&#9670;&nbsp;</a></span>aes_cfb_128_one_avx512()</h2>
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-          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void aes_cfb_128_one_avx512 </td>
+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void aes_cmac_subkey_gen_avx512 </td>
           <td>(</td>
-          <td class="paramtype">void *&#160;</td>
-          <td class="paramname"><em>out</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>in</em>, </td>
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-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
           <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>iv</em>, </td>
+          <td class="paramname"><em>key_exp</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>keys</em>, </td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>key1</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">uint64_t&#160;</td>
-          <td class="paramname"><em>len</em>&#160;</td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>key2</em>&#160;</td>
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         <tr>
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 </div><div class="memdoc">
 
-<p>AES-CFB-128 Encrypt/Decrypt up to one block.  </p>
-<p >Processes only one buffer at a time. Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.</p>
+<p></p>
+<p>Generate AES-128-CMAC subkeys.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[out]</td><td class="paramname">out</td><td>Plaintext/Ciphertext output </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>Plaintext/Ciphertext input </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">iv</td><td>Pointer to 16 byte IV </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">keys</td><td>Pointer to expanded AES keys </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data in bytes  </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">key_exp</td><td>Input expanded AES-128-CMAC key </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">key1</td><td>Subkey 1 </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">key2</td><td>Subkey 2   </td></tr>
   </table>
   </dd>
 </dl>
 
 </div>
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+<h2 class="memtitle"><span class="permalink"><a href="#a4dafe82f4933670f68e1bf34d55a691d">&#9670;&#160;</a></span>aes_cmac_subkey_gen_sse()</h2>
 
 <div class="memitem">
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         <tr>
-          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void aes_cfb_128_one_sse </td>
-          <td>(</td>
-          <td class="paramtype">void *&#160;</td>
-          <td class="paramname"><em>out</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>in</em>, </td>
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-          <td class="paramkey"></td>
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-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>iv</em>, </td>
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-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>keys</em>, </td>
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-          <td></td>
-          <td class="paramtype">uint64_t&#160;</td>
-          <td class="paramname"><em>len</em>&#160;</td>
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-<p>AES-CFB-128 Encrypt/Decrypt up to one block. </p>
-<p >Processes only one buffer at a time. Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[out]</td><td class="paramname">out</td><td>Plaintext/Ciphertext output </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>Plaintext/Ciphertext input </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">iv</td><td>Pointer to 16 byte IV </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">keys</td><td>Pointer to expanded AES keys </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data in bytes </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a id="a6541825066a8d2b8b3c7b6e2c4b28c83" name="a6541825066a8d2b8b3c7b6e2c4b28c83"></a>
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-          <td>(</td>
-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>key_exp</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">void *&#160;</td>
-          <td class="paramname"><em>key1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">void *&#160;</td>
-          <td class="paramname"><em>key2</em>&#160;</td>
-        </tr>
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-          <td>)</td>
-          <td></td><td></td>
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-
-<p></p>
-<p >Generate AES-128-CMAC subkeys.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">key_exp</td><td>Input expanded AES-128-CMAC key </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">key1</td><td>Subkey 1 </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">key2</td><td>Subkey 2  </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
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-          <td>(</td>
-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>key_exp</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">void *&#160;</td>
-          <td class="paramname"><em>key1</em>, </td>
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-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">void *&#160;</td>
-          <td class="paramname"><em>key2</em>&#160;</td>
-        </tr>
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-
-<p></p>
-<p >Generate AES-128-CMAC subkeys.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">key_exp</td><td>Input expanded AES-128-CMAC key </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">key1</td><td>Subkey 1 </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">key2</td><td>Subkey 2  </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
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-          <td>(</td>
-          <td class="paramtype">const void *&#160;</td>
-          <td class="paramname"><em>key_exp</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">void *&#160;</td>
-          <td class="paramname"><em>key1</em>, </td>
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-          <td class="paramkey"></td>
-          <td></td>
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-          <td class="paramname"><em>key2</em>&#160;</td>
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-
-<p></p>
-<p >Generate AES-128-CMAC subkeys.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">key_exp</td><td>Input expanded AES-128-CMAC key </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">key1</td><td>Subkey 1 </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">key2</td><td>Subkey 2  </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
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+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void aes_cmac_subkey_gen_sse </td>
           <td>(</td>
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@@ -10411,7 +10674,7 @@ Functions</h2></td></tr>
         </tr>
       </table>
 </div><div class="memdoc">
-<p >Generate AES-128-CMAC subkeys.</p>
+<p>Generate AES-128-CMAC subkeys.</p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">key_exp</td><td>Input expanded AES-128-CMAC key </td></tr>
@@ -10424,7 +10687,7 @@ Functions</h2></td></tr>
 </div>
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 <a id="a8c9a7e51599dbce89a416e0d8422742b" name="a8c9a7e51599dbce89a416e0d8422742b"></a>
-<h2 class="memtitle"><span class="permalink"><a href="#a8c9a7e51599dbce89a416e0d8422742b">&#9670;&nbsp;</a></span>aes_gcm_dec_128_avx_gen2()</h2>
+<h2 class="memtitle"><span class="permalink"><a href="#a8c9a7e51599dbce89a416e0d8422742b">&#9670;&#160;</a></span>aes_gcm_dec_128_avx_gen2()</h2>
 
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 <div class="memproto">
@@ -10497,7 +10760,7 @@ Functions</h2></td></tr>
       </table>
 </div><div class="memdoc">
 
-<p>AES-GCM-128 Decryption.  </p>
+<p>AES-GCM-128 Decryption.   </p>
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+    <tr><td class="paramdir">[in]</td><td class="paramname">auth_tag_len</td><td>Authenticated Tag Length in bytes (must be a multiple of 4 bytes). Valid values are 16 (most likely), 12 or 8   </td></tr>
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-<p>End encryption of a AES-GCM-256 encryption message.  </p>
+<p>End encryption of a AES-GCM-256 encryption message.   </p>
 <dl class="params"><dt>Parameters</dt><dd>
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     <tr><td class="paramdir">[in]</td><td class="paramname">key_data</td><td>GCM expanded key data </td></tr>
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+    <tr><td class="paramdir">[in]</td><td class="paramname">auth_tag_len</td><td>Authenticated Tag Length in bytes (must be a multiple of 4 bytes). Valid values are 16 (most likely), 12 or 8.   </td></tr>
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-<p>End encryption of a AES-GCM-256 encryption message.  </p>
+<p>End encryption of a AES-GCM-256 encryption message.   </p>
 <dl class="params"><dt>Parameters</dt><dd>
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     <tr><td class="paramdir">[in]</td><td class="paramname">key_data</td><td>GCM expanded key data </td></tr>
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+    <tr><td class="paramdir">[in]</td><td class="paramname">auth_tag_len</td><td>Authenticated Tag Length in bytes (must be a multiple of 4 bytes). Valid values are 16 (most likely), 12 or 8.   </td></tr>
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-<p>Encrypt a block of a AES-GCM-256 encryption message.  </p>
+<p>Encrypt a block of a AES-GCM-256 encryption message.   </p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
     <tr><td class="paramdir">[in]</td><td class="paramname">key_data</td><td>GCM expanded key data </td></tr>
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     <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>Plaintext input </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data in bytes for encryption  </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data in bytes for encryption   </td></tr>
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-<p>Encrypt a block of a AES-GCM-256 encryption message.  </p>
+<p>Encrypt a block of a AES-GCM-256 encryption message.   </p>
 <dl class="params"><dt>Parameters</dt><dd>
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     <tr><td class="paramdir">[in]</td><td class="paramname">key_data</td><td>GCM expanded key data </td></tr>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data in bytes for encryption  </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data in bytes for encryption   </td></tr>
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-<p>Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-128 Encryption.  </p>
+<p>Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-128 Encryption.   </p>
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     <tr><td class="paramdir">[in]</td><td class="paramname">aad</td><td>Additional Authenticated Data (AAD) </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">aad_len</td><td>Length of AAD in bytes  </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">aad_len</td><td>Length of AAD in bytes   </td></tr>
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+<p>Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-128 Encryption.   </p>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">aad_len</td><td>Length of AAD in bytes  </td></tr>
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-<p>Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-192 Encryption.  </p>
+<p>Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-192 Encryption.   </p>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">aad_len</td><td>Length of AAD in bytes  </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">aad_len</td><td>Length of AAD in bytes   </td></tr>
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+<p>Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-192 Encryption.   </p>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">aad_len</td><td>Length of AAD in bytes  </td></tr>
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-<p>Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-256 Encryption.  </p>
+<p>Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-256 Encryption.   </p>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">aad_len</td><td>Length of AAD in bytes  </td></tr>
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-<p>Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-256 Encryption.  </p>
+<p>Initialize a <a class="el" href="structgcm__context__data.html" title="holds GCM operation context">gcm_context_data</a> structure to prepare for AES-GCM-256 Encryption.   </p>
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-    <tr><td class="paramdir">[in]</td><td class="paramname">aad_len</td><td>Length of AAD in bytes  </td></tr>
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-<p>Pre-processes AES-GCM-128 key data.  </p>
-<p >Prefills the gcm key data with key values for each round and the initial sub hash key for tag encoding</p>
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+<p>Prefills the gcm key data with key values for each round and the initial sub hash key for tag encoding</p>
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-<p>Pre-processes AES-GCM-128 key data.  </p>
-<p >Prefills the gcm key data with key values for each round and the initial sub hash key for tag encoding</p>
+<p>Pre-processes AES-GCM-128 key data.   </p>
+<p>Prefills the gcm key data with key values for each round and the initial sub hash key for tag encoding</p>
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-<p >Prefills the gcm key data with key values for each round and the initial sub hash key for tag encoding</p>
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+<p>Pre-processes AES-GCM-256 key data.   </p>
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-<p >Precomputation of HashKey&lt;&lt;1 mod poly constants (shifted_hkey_X and shifted_hkey_X_k).</p>
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-<p >Precomputation of HashKey&lt;&lt;1 mod poly constants (shifted_hkey_X and shifted_hkey_X_k).</p>
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+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void des_cfb_one </td>
+          <td>(</td>
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+          <td class="paramkey"></td>
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+          <td></td>
+          <td class="paramtype">const uint64_t *&#160;</td>
+          <td class="paramname"><em>ks</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const int&#160;</td>
+          <td class="paramname"><em>len</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>DES-CFB Encrypt/Decrypt up to one block. </p>
+<p>Processes only one buffer at a time. Designed to manage partial blocks of DOCSIS 3.1 SEC BPI.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[out]</td><td class="paramname">out</td><td>Plaintext/Ciphertext output </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">in</td><td>Plaintext/Ciphertext input </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">iv</td><td>Pointer to 8 byte IV </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">ks</td><td>Pointer to DES key schedule </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len</td><td>Length of data in bytes </td></tr>
+  </table>
+  </dd>
+</dl>
+
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 <p>DES key schedule set up. </p>
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-<p>Force processing until next job in queue is completed.  </p>
+<p>Force processing until next job in queue is completed.   </p>
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-<p>Force processing until next job in queue is completed.  </p>
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+<dl class="section return"><dt>Returns</dt><dd>Pointer to completed <a class="el" href="structIMB__JOB.html">IMB_JOB</a> or NULL if no more jobs to process   </dd></dl>
 
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-<p>Get next completed job.  </p>
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+<dl class="section return"><dt>Returns</dt><dd>Pointer to completed <a class="el" href="structIMB__JOB.html">IMB_JOB</a> or NULL if next job not complete   </dd></dl>
 
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-<p>Get next completed job.  </p>
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-<p>Get next completed job.  </p>
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+<dl class="section return"><dt>Returns</dt><dd>Pointer to completed <a class="el" href="structIMB__JOB.html">IMB_JOB</a> or NULL if next job not complete   </dd></dl>
 
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-<p>Get next available job.  </p>
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-<p>Get next available job.  </p>
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 <p>Get library version in numerical format. </p>
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+<p>Use <a class="el" href="intel-ipsec-mb_8h.html#ad9bcb21181d1e07b4f66d8bf0514c1a3">IMB_VERSION()</a> macro to compare this numerical version against known library version.</p>
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 <div class="memproto">
@@ -16969,34 +17291,52 @@ Functions</h2></td></tr>
 </div><div class="memdoc">
 
 <p>Get library version in string format. </p>
-<p >API definitions</p>
+<p>API definitions </p>
 <dl class="section return"><dt>Returns</dt><dd>library version string </dd></dl>
 
 </div>
 </div>
-<a id="a3a825e903d1f8f8611b98b60fcaa5a81" name="a3a825e903d1f8f8611b98b60fcaa5a81"></a>
-<h2 class="memtitle"><span class="permalink"><a href="#a3a825e903d1f8f8611b98b60fcaa5a81">&#9670;&nbsp;</a></span>imb_set_pointers_mb_mgr()</h2>
+<a id="ab5ecb9fd270d0bfc42e46c5a3a9225fe" name="ab5ecb9fd270d0bfc42e46c5a3a9225fe"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#ab5ecb9fd270d0bfc42e46c5a3a9225fe">&#9670;&#160;</a></span>imb_hmac_ipad_opad()</h2>
 
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="el" href="structIMB__MGR.html">IMB_MGR</a> * imb_set_pointers_mb_mgr </td>
+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void imb_hmac_ipad_opad </td>
           <td>(</td>
-          <td class="paramtype">void *&#160;</td>
-          <td class="paramname"><em>ptr</em>, </td>
+          <td class="paramtype">struct <a class="el" href="structIMB__MGR.html">IMB_MGR</a> *&#160;</td>
+          <td class="paramname"><em>mb_mgr</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">const uint64_t&#160;</td>
-          <td class="paramname"><em>flags</em>, </td>
+          <td class="paramtype">const <a class="el" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">IMB_HASH_ALG</a>&#160;</td>
+          <td class="paramname"><em>sha_type</em>, </td>
         </tr>
         <tr>
           <td class="paramkey"></td>
           <td></td>
-          <td class="paramtype">const unsigned&#160;</td>
-          <td class="paramname"><em>reset_mgr</em>&#160;</td>
+          <td class="paramtype">const void *&#160;</td>
+          <td class="paramname"><em>pkey</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const size_t&#160;</td>
+          <td class="paramname"><em>key_len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>ipad_hash</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>opad_hash</em>&#160;</td>
         </tr>
         <tr>
           <td></td>
@@ -17006,29 +17346,323 @@ Functions</h2></td></tr>
       </table>
 </div><div class="memdoc">
 
-<p>Initializes <a class="el" href="structIMB__MGR.html">IMB_MGR</a> pointers to out-of-order managers with use of externally allocated memory. </p>
-<p ><a class="el" href="intel-ipsec-mb_8h.html#ac8379ada0d6ec030ebad9828fbea9459" title="Calculates necessary memory size for IMB_MGR.">imb_get_mb_mgr_size()</a> should be called to know how much memory should be allocated externally.</p>
-<p >init_mb_mgr_XXX() must be called after this function call, whereas XXX is the desired architecture.</p>
+<p>Ipad Opad padding for HMAC. </p>
 <dl class="params"><dt>Parameters</dt><dd>
   <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>a pointer to allocated memory </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>multi-buffer manager flags IMB_FLAG_SHANI_OFF - disable use (and detection) of SHA extensions, currently SHANI is only available for SSE IMB_FLAG_AESNI_OFF - disable use (and detection) of AES extensions.</td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">reset_mgr</td><td>if 0, <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure is not cleared, else it is.</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">mb_mgr</td><td>Pointer to initialized <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">sha_type</td><td>Type of HMAC_SHA from IMB_HASH_ALG enum </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">pkey</td><td>Pointer to a HMAC key </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">key_len</td><td>Length of the HMAC key </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">ipad_hash</td><td>Block-sized inner padding </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">opad_hash</td><td>Block-sized outer padding </td></tr>
   </table>
   </dd>
 </dl>
-<dl class="section return"><dt>Returns</dt><dd>Pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </dd></dl>
 
 </div>
 </div>
-<a id="a2cbbd032835837fd0aa83b04f5337638" name="a2cbbd032835837fd0aa83b04f5337638"></a>
-<h2 class="memtitle"><span class="permalink"><a href="#a2cbbd032835837fd0aa83b04f5337638">&#9670;&nbsp;</a></span>init_mb_mgr_auto()</h2>
+<a id="a8faae8f9387983904125d862c4cac9ab" name="a8faae8f9387983904125d862c4cac9ab"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#a8faae8f9387983904125d862c4cac9ab">&#9670;&#160;</a></span>imb_quic_aes_gcm()</h2>
 
 <div class="memitem">
 <div class="memproto">
       <table class="memname">
         <tr>
-          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void init_mb_mgr_auto </td>
+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void imb_quic_aes_gcm </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structIMB__MGR.html">IMB_MGR</a> *&#160;</td>
+          <td class="paramname"><em>state</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const struct <a class="el" href="structgcm__key__data.html">gcm_key_data</a> *&#160;</td>
+          <td class="paramname"><em>key_data</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const <a class="el" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a>&#160;</td>
+          <td class="paramname"><em>key_size</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const <a class="el" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">IMB_CIPHER_DIRECTION</a>&#160;</td>
+          <td class="paramname"><em>cipher_dir</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>dst_ptr_array</em>[], </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const void *const&#160;</td>
+          <td class="paramname"><em>src_ptr_array</em>[], </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint64_t&#160;</td>
+          <td class="paramname"><em>len_array</em>[], </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const void *const&#160;</td>
+          <td class="paramname"><em>iv_ptr_array</em>[], </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const void *const&#160;</td>
+          <td class="paramname"><em>aad_ptr_array</em>[], </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint64_t&#160;</td>
+          <td class="paramname"><em>aad_len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>tag_ptr_array</em>[], </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint64_t&#160;</td>
+          <td class="paramname"><em>tag_len</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint64_t&#160;</td>
+          <td class="paramname"><em>num_packets</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Batch of GCM encrypt/decrypt operations with the same key. </p>
+<dl class="section note"><dt>Note</dt><dd>IV length of 12 bytes is assumed. </dd>
+<dd>
+If used out of place then AAD needs to be copied by the caller. </dd>
+<dd>
+For more info on key_data refer to IMB_AES128/192/256_GCM_PRE() API’s</dd></dl>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">state</td><td>pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">key_data</td><td>initialized key data (AES keys and hash keys) </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">key_size</td><td>key size (in bytes, see IMB_KEY_128_BYTES etc.) </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">cipher_dir</td><td>cipher direction (IMB_DIR_ENCRYPT / DECRYPT) </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">dst_ptr_array</td><td>array with destination pointers </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">src_ptr_array</td><td>array with source pointers </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">len_array</td><td>array with message lengths in bytes </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">iv_ptr_array</td><td>array with IV pointers </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">aad_ptr_array</td><td>array with AAD pointers </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">aad_len</td><td>AAD length in bytes </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">tag_ptr_array</td><td>array with authentication TAG pointers </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">tag_len</td><td>authentication TAG length in bytes </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">num_packets</td><td>number of packets in this batch </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a id="a89f9807d10f3459444bb649caf9b64ca" name="a89f9807d10f3459444bb649caf9b64ca"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#a89f9807d10f3459444bb649caf9b64ca">&#9670;&#160;</a></span>imb_quic_hp_aes_ecb()</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void imb_quic_hp_aes_ecb </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structIMB__MGR.html">IMB_MGR</a> *&#160;</td>
+          <td class="paramname"><em>state</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const void *&#160;</td>
+          <td class="paramname"><em>exp_key_data</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>dst_ptr_array</em>[], </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const void *const&#160;</td>
+          <td class="paramname"><em>src_ptr_array</em>[], </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint64_t&#160;</td>
+          <td class="paramname"><em>num_packets</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const <a class="el" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a>&#160;</td>
+          <td class="paramname"><em>key_size</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Batch of AES-ECB encrypt/decrypt operations with the same key. </p>
+<p>Sample size is fixed to 16 bytes (read from source pointers). Mask output size is fixed to 5 bytes (written to destination pointer). Cipher direction is fixed to ENCRYPT.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">state</td><td>pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">exp_key_data</td><td>expanded AES encrypt keys </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">dst_ptr_array</td><td>array with destination pointers </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">src_ptr_array</td><td>array with source sample pointers </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">num_packets</td><td>number of packets in this batch </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">key_size</td><td>key size (in bytes, see IMB_KEY_128_BYTES etc.) </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
+</div>
+<a id="a3a825e903d1f8f8611b98b60fcaa5a81" name="a3a825e903d1f8f8611b98b60fcaa5a81"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#a3a825e903d1f8f8611b98b60fcaa5a81">&#9670;&#160;</a></span>imb_set_pointers_mb_mgr()</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="el" href="structIMB__MGR.html">IMB_MGR</a> * imb_set_pointers_mb_mgr </td>
+          <td>(</td>
+          <td class="paramtype">void *&#160;</td>
+          <td class="paramname"><em>ptr</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const uint64_t&#160;</td>
+          <td class="paramname"><em>flags</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype">const unsigned&#160;</td>
+          <td class="paramname"><em>reset_mgr</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Initializes <a class="el" href="structIMB__MGR.html">IMB_MGR</a> pointers to out-of-order managers with use of externally allocated memory. </p>
+<p><a class="el" href="intel-ipsec-mb_8h.html#ac8379ada0d6ec030ebad9828fbea9459" title="Calculates necessary memory size for IMB_MGR.">imb_get_mb_mgr_size()</a> should be called to know how much memory should be allocated externally.</p>
+<p>init_mb_mgr_XXX() must be called after this function call, whereas XXX is the desired architecture.</p>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>a pointer to allocated memory </td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">flags</td><td>multi-buffer manager flags IMB_FLAG_SHANI_OFF - disable use (and detection) of SHA extensions, currently SHANI is only available for SSE IMB_FLAG_AESNI_OFF - disable use (and detection) of AES extensions. IMB_FLAG_GFNI_OFF - disable use (and detection) of Galois Field extensions.</td></tr>
+    <tr><td class="paramdir">[in]</td><td class="paramname">reset_mgr</td><td>if 0, <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure is not cleared, else it is.</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure </dd></dl>
+
+</div>
+</div>
+<a id="ada304337e78ef5a462c97c1f8151ef67" name="ada304337e78ef5a462c97c1f8151ef67"></a>
+<h2 class="memtitle"><span class="permalink"><a href="#ada304337e78ef5a462c97c1f8151ef67">&#9670;&#160;</a></span>imb_set_session()</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint32_t imb_set_session </td>
+          <td>(</td>
+          <td class="paramtype"><a class="el" href="structIMB__MGR.html">IMB_MGR</a> *&#160;</td>
+          <td class="paramname"><em>state</em>, </td>
+        </tr>
+        <tr>
+          <td class="paramkey"></td>
+          <td></td>
+          <td class="paramtype"><a class="el" href="structIMB__JOB.html">IMB_JOB</a> *&#160;</td>
+          <td class="paramname"><em>job</em>&#160;</td>
+        </tr>
+        <tr>
+          <td></td>
+          <td>)</td>
+          <td></td><td></td>
+        </tr>
+      </table>
+</div><div class="memdoc">
+
+<p>Sets up suite_id and session_id fields for selected cipher suite in provided <em>job</em> structure. </p>
+<p>This is mandatory operation for BURST API as suite_id is used to speed up job dispatch process. This operation is optional but helpful for JOB API use case.</p>
+<p>'session_id' field is for application use to optimize job set up process. If JOB structure provided by library for a new operation has same session ID as required for the next operation then only message pointers and sizes need to be set up by the application. All other session fields are guaranteed to be unmodified by the library:</p><ul>
+<li>cipher mode</li>
+<li>cipher direction</li>
+<li>hash algorithm</li>
+<li>key size</li>
+<li>encrypt &amp; decrypt key pointers</li>
+<li>suite_id If allocated JOB structure contains different session ID then all required session and crypto operation fields need to be set up.</li>
+</ul>
+<p>In connection oriented applications, a template filled-in job structure can be cached within connection structure and reused in submit operations.</p>
+<p>For given set of parameters: cipher mode, cipher key size, cipher direction and authentication mode, suite_id field is the same.</p>
+<dl class="section see"><dt>See also</dt><dd><a class="el" href="intel-ipsec-mb_8h.html#aabfad78b032b6b160e3ba51477132524" title="Submit multiple jobs to be processed after validating.">IMB_SUBMIT_BURST()</a> </dd>
+<dd>
+<a class="el" href="intel-ipsec-mb_8h.html#aa06f0e18794d4a95d16e61dfb1af70c4" title="Submit multiple jobs to be processed without validating.">IMB_SUBMIT_BURST_NOCHECK()</a> </dd>
+<dd>
+<a class="el" href="intel-ipsec-mb_8h.html#a3602a4ccaf1da4bf6787169370cef04f" title="Submit job for processing after validating.">IMB_SUBMIT_JOB()</a> </dd>
+<dd>
+<a class="el" href="intel-ipsec-mb_8h.html#af23c64e466272c5ae90fcf78fbcd0c3d" title="Submit job for processing without validating.">IMB_SUBMIT_JOB_NOCHECK()</a></dd></dl>
+<dl class="params"><dt>Parameters</dt><dd>
+  <table class="params">
+    <tr><td class="paramdir">[in]</td><td class="paramname">state</td><td>pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">job</td><td>pointer to prepared JOB structure</td></tr>
+  </table>
+  </dd>
+</dl>
+<dl class="section return"><dt>Returns</dt><dd>Session ID value </dd></dl>
+<dl class="retval"><dt>Return values</dt><dd>
+  <table class="retval">
+    <tr><td class="paramname">0</td><td>on error </td></tr>
+  </table>
+  </dd>
+</dl>
+
+</div>
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+<h2 class="memtitle"><span class="permalink"><a href="#a2cbbd032835837fd0aa83b04f5337638">&#9670;&#160;</a></span>init_mb_mgr_auto()</h2>
+
+<div class="memitem">
+<div class="memproto">
+      <table class="memname">
+        <tr>
+          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void init_mb_mgr_auto </td>
           <td>(</td>
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+<h2 class="memtitle"><span class="permalink"><a href="#aee547b1b9e70e12c84d9949317e41c6c">&#9670;&#160;</a></span>init_mb_mgr_avx()</h2>
 
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 <p>Initialize Multi-Buffer Manager structure. </p>
-<p >Must be called before calling JOB/BURST API.</p>
+<p>Must be called before calling JOB/BURST API.</p>
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     <tr><td class="paramdir">[in,out]</td><td class="paramname">state</td><td>Pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure For binary compatibility between library versions, it is recommended to allocate the <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure using the <a class="el" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e" title="Allocates memory for multi-buffer manager instance.">alloc_mb_mgr()</a> API </td></tr>
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+<h2 class="memtitle"><span class="permalink"><a href="#a71b6563b6b4c0c504cd9b8302a242cfa">&#9670;&#160;</a></span>init_mb_mgr_avx2()</h2>
 
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-<p>Initialize Multi-Buffer Manager structure.  </p>
-<p >Must be called before calling JOB/BURST API.</p>
+<p>Initialize Multi-Buffer Manager structure.   </p>
+<p>Must be called before calling JOB/BURST API.</p>
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-    <tr><td class="paramdir">[in,out]</td><td class="paramname">state</td><td>Pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure For binary compatibility between library versions, it is recommended to allocate the <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure using the <a class="el" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e" title="Allocates memory for multi-buffer manager instance.">alloc_mb_mgr()</a> API  </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">state</td><td>Pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure For binary compatibility between library versions, it is recommended to allocate the <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure using the <a class="el" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e" title="Allocates memory for multi-buffer manager instance.">alloc_mb_mgr()</a> API   </td></tr>
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-<p>Initialize Multi-Buffer Manager structure.  </p>
-<p >Must be called before calling JOB/BURST API.</p>
+<p>Initialize Multi-Buffer Manager structure.   </p>
+<p>Must be called before calling JOB/BURST API.</p>
 <dl class="params"><dt>Parameters</dt><dd>
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-    <tr><td class="paramdir">[in,out]</td><td class="paramname">state</td><td>Pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure For binary compatibility between library versions, it is recommended to allocate the <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure using the <a class="el" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e" title="Allocates memory for multi-buffer manager instance.">alloc_mb_mgr()</a> API  </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">state</td><td>Pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure For binary compatibility between library versions, it is recommended to allocate the <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure using the <a class="el" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e" title="Allocates memory for multi-buffer manager instance.">alloc_mb_mgr()</a> API   </td></tr>
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-<p>Initialize Multi-Buffer Manager structure.  </p>
-<p >Must be called before calling JOB/BURST API.</p>
+<p>Initialize Multi-Buffer Manager structure.   </p>
+<p>Must be called before calling JOB/BURST API.</p>
 <dl class="params"><dt>Parameters</dt><dd>
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-    <tr><td class="paramdir">[in,out]</td><td class="paramname">state</td><td>Pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure For binary compatibility between library versions, it is recommended to allocate the <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure using the <a class="el" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e" title="Allocates memory for multi-buffer manager instance.">alloc_mb_mgr()</a> API  </td></tr>
+    <tr><td class="paramdir">[in,out]</td><td class="paramname">state</td><td>Pointer to <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure For binary compatibility between library versions, it is recommended to allocate the <a class="el" href="structIMB__MGR.html">IMB_MGR</a> structure using the <a class="el" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e" title="Allocates memory for multi-buffer manager instance.">alloc_mb_mgr()</a> API   </td></tr>
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-<h2 class="memtitle"><span class="permalink"><a href="#a3876dca52c5c210dd0827b2a472e6d0b">&#9670;&nbsp;</a></span>kasumi_f8_iv_gen()</h2>
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-<p >Authenticate 64-byte data buffer with MD5.</p>
+<p>Authenticate 64-byte data buffer with MD5.</p>
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     <tr><td class="paramdir">[in]</td><td class="paramname">data</td><td>64-byte data buffer </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">digest</td><td>Digest output (16 bytes)  </td></tr>
+    <tr><td class="paramdir">[out]</td><td class="paramname">digest</td><td>Digest output (16 bytes)   </td></tr>
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-<p >Authenticate 64-byte data buffer with MD5.</p>
+<p>Authenticate 64-byte data buffer with MD5.</p>
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-    <tr><td class="paramdir">[out]</td><td class="paramname">digest</td><td>Digest output (16 bytes)  </td></tr>
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-<p >Authenticate 64-byte data buffer with MD5.</p>
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     <tr><td class="paramdir">[in]</td><td class="paramname">data</td><td>64-byte data buffer </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">digest</td><td>Digest output (16 bytes)  </td></tr>
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-<p >Authenticate 64-byte data buffer with MD5.</p>
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-<p>Get number of jobs queued to be processed.  </p>
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-<p>Get number of jobs queued to be processed.  </p>
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-<h2 class="memtitle"><span class="permalink"><a href="#ad9b42865aff95b5bcde6efa4b4e83fe8">&#9670;&nbsp;</a></span>sha1_avx512()</h2>
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-<p >Authenticate variable sized data with SHA1.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#a532582e6d066b9c6b1c2189ba1b36f27">&#9670;&nbsp;</a></span>sha1_one_block_avx()</h2>
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-<p >Authenticate 64-byte data buffer with SHA1.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#af1a63afff082c9d14bbe22f14bd6b5d9">&#9670;&nbsp;</a></span>sha1_one_block_avx2()</h2>
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-<h2 class="memtitle"><span class="permalink"><a href="#a745c97ce8263ebc67f4d8070f5c9ee50">&#9670;&nbsp;</a></span>sha1_one_block_avx512()</h2>
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-<p >Authenticate 64-byte data buffer with SHA1.</p>
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-<p >Authenticate 64-byte data buffer with SHA1.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#af0e48b520099db5a76190aa5395c90d3">&#9670;&nbsp;</a></span>sha224_avx()</h2>
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-<p >Authenticate variable sized data with SHA224.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#ad5945d85d451ccf9b3ba06c06c10d4e9">&#9670;&nbsp;</a></span>sha224_avx2()</h2>
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-<p >Authenticate variable sized data with SHA224.</p>
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-<p >Authenticate variable sized data with SHA224.</p>
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-<p >Authenticate 64-byte data buffer with SHA224.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#a58916afb9e72f42a1c8c2658e248703a">&#9670;&nbsp;</a></span>sha224_one_block_avx2()</h2>
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-<p >Authenticate 64-byte data buffer with SHA224.</p>
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-
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-<p >Authenticate 64-byte data buffer with SHA224.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#a2ef2c1513632e69da882a895a075aa2c">&#9670;&nbsp;</a></span>sha224_sse()</h2>
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-<p >Authenticate variable sized data with SHA224.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#a7976461101f011a77d19f4fa480d5be3">&#9670;&nbsp;</a></span>sha256_avx()</h2>
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-<h2 class="memtitle"><span class="permalink"><a href="#aec411a6b29d7adff67e6eaa1b13b3975">&#9670;&nbsp;</a></span>sha256_avx2()</h2>
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-<p >Authenticate variable sized data with SHA256.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#a2e481e815eb9c8109460e8a8dac62ce9">&#9670;&nbsp;</a></span>sha256_one_block_avx()</h2>
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-<h2 class="memtitle"><span class="permalink"><a href="#a0a3c025cfbe9b6e72e9b9f4805f0ca1f">&#9670;&nbsp;</a></span>sha256_one_block_avx2()</h2>
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-<p >Authenticate 64-byte data buffer with SHA256.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#ae5ce647166e6f9f8b1d616584ee5d1d6">&#9670;&nbsp;</a></span>sha256_one_block_sse()</h2>
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-<h2 class="memtitle"><span class="permalink"><a href="#a7b656d085ad03ff43a6c3a4751bfbf56">&#9670;&nbsp;</a></span>sha384_avx()</h2>
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-<p >Authenticate variable sized data with SHA384.</p>
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-<p >Authenticate variable sized data with SHA384.</p>
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-          <td class="memname"><a class="el" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> void sha384_avx512 </td>
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-<p >Authenticate variable sized data with SHA384.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#aef8af95a47ec01a8c280802a16d0f0c7">&#9670;&nbsp;</a></span>sha384_one_block_avx()</h2>
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-<p >Authenticate 128-byte data buffer with SHA384.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#ae5cf8bca3e0f1c7c40c110b88168669e">&#9670;&nbsp;</a></span>sha384_one_block_avx2()</h2>
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-<h2 class="memtitle"><span class="permalink"><a href="#a39fa05d7d02e8911e3d882f379d8661e">&#9670;&nbsp;</a></span>sha384_one_block_avx512()</h2>
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-<h2 class="memtitle"><span class="permalink"><a href="#aa3bf3d1bd2a5d62035c972fe38827549">&#9670;&nbsp;</a></span>sha384_one_block_sse()</h2>
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-<p >Authenticate 128-byte data buffer with SHA384.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#ad63e21495f9b798250f5c68371af4f37">&#9670;&nbsp;</a></span>sha384_sse()</h2>
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-<h2 class="memtitle"><span class="permalink"><a href="#a17c4f20de186e1f04580d04d6551e844">&#9670;&nbsp;</a></span>sha512_avx()</h2>
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-<p >Authenticate variable sized data with SHA512.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#afc6b16cbe9cf1f840723aa6be3913131">&#9670;&nbsp;</a></span>sha512_avx2()</h2>
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-<p >Authenticate variable sized data with SHA512.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#a7fa788fbcd353c13fd1eac251f658f1c">&#9670;&nbsp;</a></span>sha512_avx512()</h2>
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-<p >Authenticate variable sized data with SHA512.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#a7d95ff83cbadc815cbe8c11b0af74b7e">&#9670;&nbsp;</a></span>sha512_one_block_avx()</h2>
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-<p >Authenticate 64-byte data buffer with SHA512.</p>
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-<h2 class="memtitle"><span class="permalink"><a href="#a5d2e35fbfc14d979d87b5b9a63bf19c9">&#9670;&nbsp;</a></span>sha512_one_block_avx512()</h2>
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-<h2 class="memtitle"><span class="permalink"><a href="#aa5e8c4861339d101c718449cf544d5c4">&#9670;&nbsp;</a></span>sha512_one_block_sse()</h2>
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 <p>Generation of SNOW3G F9 Initialization Vector. </p>
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     [ "IMB_AES192_GMAC_UPDATE", "intel-ipsec-mb_8h.html#a113d0f4320e929f89786773f7d11c5c8", null ],
+    [ "IMB_AES256_CFB_ONE", "intel-ipsec-mb_8h.html#ab4d68ab67a7d4a471f5cb454301aac9d", null ],
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     [ "IMB_CPUFLAGS_AVX2", "intel-ipsec-mb_8h.html#ac0a92622a85423541536321231a6cb7d", null ],
+    [ "IMB_CPUFLAGS_AVX2_T2", "intel-ipsec-mb_8h.html#a18f17a6bcef83c3976ca7a9b4ca624de", null ],
+    [ "IMB_CPUFLAGS_AVX2_T3", "intel-ipsec-mb_8h.html#a6e356586d2d3d7e93ff1b23d4a90b344", null ],
     [ "IMB_CPUFLAGS_AVX512", "intel-ipsec-mb_8h.html#a0a250932ede6ca7b69f5c763c24cf51d", null ],
+    [ "IMB_CPUFLAGS_AVX512_T2", "intel-ipsec-mb_8h.html#af7bdbff703949eb2cf2dd3d3a08803de", null ],
+    [ "IMB_CPUFLAGS_AVX_T2", "intel-ipsec-mb_8h.html#a85dab1abb0996e9ff4d4258fef3f9abd", null ],
     [ "IMB_CPUFLAGS_NO_AESNI", "intel-ipsec-mb_8h.html#a6afb888ab232bab1c3ca027eb071f388", null ],
     [ "IMB_CPUFLAGS_SSE", "intel-ipsec-mb_8h.html#a5654f563aaad731df22c8e8517c9154c", null ],
+    [ "IMB_CPUFLAGS_SSE_T2", "intel-ipsec-mb_8h.html#ae6776750b801d7e177c152569c10c546", null ],
+    [ "IMB_CPUFLAGS_SSE_T3", "intel-ipsec-mb_8h.html#aa1cc7ac79ca44f06e3caa18fdd6d441a", null ],
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     [ "IMB_FEATURE_AVX512F", "intel-ipsec-mb_8h.html#ab673c08624d868ca0dd89e1a9ec28f00", null ],
     [ "IMB_FEATURE_AVX512VL", "intel-ipsec-mb_8h.html#a803871900c08e2dc1b3f805ed4ecefd8", null ],
+    [ "IMB_FEATURE_AVX_IFMA", "intel-ipsec-mb_8h.html#a8a946f162ff5e363d04f8b44d2f48747", null ],
     [ "IMB_FEATURE_BMI2", "intel-ipsec-mb_8h.html#a557f3de4bcc0bd7e9bd90e5e1d1b9b09", null ],
     [ "IMB_FEATURE_CMOV", "intel-ipsec-mb_8h.html#a5eef394935c651931b1cf560f31c841c", null ],
     [ "IMB_FEATURE_GFNI", "intel-ipsec-mb_8h.html#aa67ab4088ac2f8cadbe839101d276567", null ],
     [ "IMB_FEATURE_PCLMULQDQ", "intel-ipsec-mb_8h.html#a1af54a4a862936a6793af2ff44163ba5", null ],
     [ "IMB_FEATURE_SAFE_DATA", "intel-ipsec-mb_8h.html#abd58fdbe1f1ef53cf509a0b37ba8aa4b", null ],
     [ "IMB_FEATURE_SAFE_PARAM", "intel-ipsec-mb_8h.html#a4e9506dc72ab4e6a2af463238ccb3080", null ],
+    [ "IMB_FEATURE_SELF_TEST", "intel-ipsec-mb_8h.html#a8b4181547ded3ff17859d2632c468151", null ],
+    [ "IMB_FEATURE_SELF_TEST_PASS", "intel-ipsec-mb_8h.html#a673b969c5f01579f6ca0a6b003cf1197", null ],
     [ "IMB_FEATURE_SHANI", "intel-ipsec-mb_8h.html#acb9c15eabfb9bafeb15a06886fa91e90", null ],
     [ "IMB_FEATURE_SSE4_2", "intel-ipsec-mb_8h.html#abcc243fc505aca3eac6963eff25e9b99", null ],
     [ "IMB_FEATURE_VAES", "intel-ipsec-mb_8h.html#af4321e4e3c947f9b9fb7f204aaecf2c3", null ],
     [ "IMB_FEATURE_VPCLMULQDQ", "intel-ipsec-mb_8h.html#a153d695ecd1af69a0d23385a50654614", null ],
     [ "IMB_FLAG_AESNI_OFF", "intel-ipsec-mb_8h.html#a4c53fb8e39bbc6e3f39d0558934e5d55", null ],
+    [ "IMB_FLAG_GFNI_OFF", "intel-ipsec-mb_8h.html#ad3faac9d03a87621ae02c10337b4edf8", null ],
     [ "IMB_FLAG_SHANI_OFF", "intel-ipsec-mb_8h.html#a3d45fcff99a9ea952b4dd6ef70e36e0c", null ],
+    [ "IMB_FLUSH_BURST", "intel-ipsec-mb_8h.html#afff52a9aaa1c1875e7c905e2fb29fc43", null ],
     [ "IMB_FLUSH_JOB", "intel-ipsec-mb_8h.html#a4726e3683b3579b1e643134278386d72", null ],
     [ "IMB_GCM_128_KEY_LEN", "intel-ipsec-mb_8h.html#ae97681c203afbd818a39fb797613a232", null ],
     [ "IMB_GCM_192_KEY_LEN", "intel-ipsec-mb_8h.html#a7201a0be67f1e6f3757169b0166dd47d", null ],
@@ -121,6 +133,7 @@ var intel_ipsec_mb_8h =
     [ "IMB_GCM_IV_DATA_LEN", "intel-ipsec-mb_8h.html#a87884da318b3013893b725d047b53702", null ],
     [ "IMB_GCM_KEY_SETS", "intel-ipsec-mb_8h.html#a73715b8c1ba918ce6d5c21749841b47b", null ],
     [ "IMB_GET_COMPLETED_JOB", "intel-ipsec-mb_8h.html#a18e5a7f85573f0006448deda41014117", null ],
+    [ "IMB_GET_NEXT_BURST", "intel-ipsec-mb_8h.html#a6029af3f88d1908dd11a8f3e9eb9fd70", null ],
     [ "IMB_GET_NEXT_JOB", "intel-ipsec-mb_8h.html#a34b6006fc39dd4ea23d3fec49237d382", null ],
     [ "IMB_GHASH", "intel-ipsec-mb_8h.html#a477ad08a4c55e2c6458b7e86dae803ec", null ],
     [ "IMB_GHASH_PRE", "intel-ipsec-mb_8h.html#a230f16784519d7e2b69de87871d35cb2", null ],
@@ -141,8 +154,11 @@ var intel_ipsec_mb_8h =
     [ "IMB_KASUMI_IV_SIZE", "intel-ipsec-mb_8h.html#adf7e13e43c6bb30489d0e26f11e39440", null ],
     [ "IMB_KASUMI_KEY_SCHED_SIZE", "intel-ipsec-mb_8h.html#ae3812840fbe6b9b5ea5e84a6b86a7ed3", null ],
     [ "IMB_KASUMI_KEY_SIZE", "intel-ipsec-mb_8h.html#a46d59512e3a7254e54018181b7a31102", null ],
+    [ "IMB_MAX_BURST_SIZE", "intel-ipsec-mb_8h.html#af9070daf9749490016e9b5106b338867", null ],
     [ "IMB_MAX_JOBS", "intel-ipsec-mb_8h.html#ab12d22470a68b5d3852c8dd972784d97", null ],
     [ "IMB_MAX_TAG_LEN", "intel-ipsec-mb_8h.html#a41087ea6dce2e096ebb02a613600c2ed", null ],
+    [ "IMB_MD5_BLOCK_SIZE", "intel-ipsec-mb_8h.html#a567100ef1c32f08b9e75e1fb378171a3", null ],
+    [ "IMB_MD5_DIGEST_SIZE_IN_BYTES", "intel-ipsec-mb_8h.html#a472528903f010fe2c365d1ff23565eaa", null ],
     [ "IMB_MD5_ONE_BLOCK", "intel-ipsec-mb_8h.html#a52b27293e2a19809c5f7d0f2afab97a2", null ],
     [ "IMB_QUEUE_SIZE", "intel-ipsec-mb_8h.html#a712f6e7ecb2a16f8e1bc96b84d188365", null ],
     [ "IMB_SHA1", "intel-ipsec-mb_8h.html#ae61900d14cde2836621a1421141548a4", null ],
@@ -161,6 +177,7 @@ var intel_ipsec_mb_8h =
     [ "IMB_SHA512", "intel-ipsec-mb_8h.html#ac806d6b629633e801409d3e363d83f6c", null ],
     [ "IMB_SHA512_DIGEST_SIZE_IN_BYTES", "intel-ipsec-mb_8h.html#a9efcf370f0db0b21f7cf4a3b72eec53e", null ],
     [ "IMB_SHA512_ONE_BLOCK", "intel-ipsec-mb_8h.html#a71d0a529b355a434efeeda2e01870ba9", null ],
+    [ "IMB_SHA_224_BLOCK_SIZE", "intel-ipsec-mb_8h.html#a7c912b7543122de6f05355fa4848eb83", null ],
     [ "IMB_SHA_256_BLOCK_SIZE", "intel-ipsec-mb_8h.html#a7eed0159b050f8d78cddcc78b4b941ef", null ],
     [ "IMB_SHA_384_BLOCK_SIZE", "intel-ipsec-mb_8h.html#a256cc0f9eaba38030ca3f7589e479855", null ],
     [ "IMB_SHA_512_BLOCK_SIZE", "intel-ipsec-mb_8h.html#a4141433b17ade98e14a585e0409cb62d", null ],
@@ -175,8 +192,8 @@ var intel_ipsec_mb_8h =
     [ "IMB_SNOW3G_F9_1_BUFFER", "intel-ipsec-mb_8h.html#aa6a951033156fc06c25afb4f79de8851", null ],
     [ "IMB_SNOW3G_INIT_KEY_SCHED", "intel-ipsec-mb_8h.html#ac5b5ff1cc9cf44ea8587a7d054b7459d", null ],
     [ "IMB_SNOW3G_KEY_SCHED_SIZE", "intel-ipsec-mb_8h.html#a1ddd766994cb5d0b8e9ef5cd580cdcd2", null ],
-    [ "IMB_SUBMIT_BURST", "intel-ipsec-mb_8h.html#ad95138f7b201a9d7f8e57a155af720f4", null ],
-    [ "IMB_SUBMIT_BURST_NOCHECK", "intel-ipsec-mb_8h.html#ab043c084d20c19d9952dee899b693085", null ],
+    [ "IMB_SUBMIT_BURST", "intel-ipsec-mb_8h.html#aabfad78b032b6b160e3ba51477132524", null ],
+    [ "IMB_SUBMIT_BURST_NOCHECK", "intel-ipsec-mb_8h.html#aa06f0e18794d4a95d16e61dfb1af70c4", null ],
     [ "IMB_SUBMIT_CIPHER_BURST", "intel-ipsec-mb_8h.html#ae487720f5112a3ecec659ab4aeada77e", null ],
     [ "IMB_SUBMIT_CIPHER_BURST_NOCHECK", "intel-ipsec-mb_8h.html#af819e81f584b3b56e0201a7174b3c0eb", null ],
     [ "IMB_SUBMIT_HASH_BURST", "intel-ipsec-mb_8h.html#a3702b37004e38dd27a9b8a008a0c48ed", null ],
@@ -186,13 +203,22 @@ var intel_ipsec_mb_8h =
     [ "IMB_VERSION", "intel-ipsec-mb_8h.html#ad9bcb21181d1e07b4f66d8bf0514c1a3", null ],
     [ "IMB_VERSION_NUM", "intel-ipsec-mb_8h.html#a415abfc6067c0b1663a508993a4eb0d4", null ],
     [ "IMB_VERSION_STR", "intel-ipsec-mb_8h.html#a874972638400dafdb542319d61bfbfbc", null ],
+    [ "IMB_ZUC256_DIGEST_LEN_IN_BYTES_MAX", "intel-ipsec-mb_8h.html#a2b1faea7079fa3ddb2cabeb41aeb2a0a", null ],
+    [ "IMB_ZUC256_DIGEST_LEN_IN_BYTES_MIN", "intel-ipsec-mb_8h.html#a3dc24506ef16ad090414608c762b3d3c", null ],
+    [ "IMB_ZUC256_IV_LEN_IN_BYTES_MAX", "intel-ipsec-mb_8h.html#a5ab93cc1831b961f3d04ff913f63b832", null ],
+    [ "IMB_ZUC256_IV_LEN_IN_BYTES_MIN", "intel-ipsec-mb_8h.html#a18e1733291bb917240ef117f52c6aa6c", null ],
+    [ "IMB_ZUC256_KEY_LEN_IN_BYTES", "intel-ipsec-mb_8h.html#a35d04f4dc107531e37fcab1fd5efbf93", null ],
+    [ "IMB_ZUC_DIGEST_LEN_IN_BYTES", "intel-ipsec-mb_8h.html#adbb9f3bfdc1d416c20a579eb3a8b0b8f", null ],
     [ "IMB_ZUC_EEA3_1_BUFFER", "intel-ipsec-mb_8h.html#adb23f957dde69fb3bb4c6798d1a69da4", null ],
     [ "IMB_ZUC_EEA3_4_BUFFER", "intel-ipsec-mb_8h.html#a57445dd863838d04cf44f4d79c4dbcaf", null ],
     [ "IMB_ZUC_EEA3_N_BUFFER", "intel-ipsec-mb_8h.html#a6382e3185f31e61f995ab90110c52991", null ],
     [ "IMB_ZUC_EIA3_1_BUFFER", "intel-ipsec-mb_8h.html#ac789fe54f3a8f92144831a67b14501d4", null ],
     [ "IMB_ZUC_EIA3_N_BUFFER", "intel-ipsec-mb_8h.html#ae840d62f1246c0c4270c3319ef356d3c", null ],
+    [ "IMB_ZUC_IV_LEN_IN_BYTES", "intel-ipsec-mb_8h.html#aaacb0749fd75d1133414685b5694652d", null ],
+    [ "IMB_ZUC_KEY_LEN_IN_BYTES", "intel-ipsec-mb_8h.html#a053b0646f055d7ee3be974bb2bfe534b", null ],
     [ "KASUMI_KEY_SCHEDULE_SIZE", "intel-ipsec-mb_8h.html#a071e04977525b67c8d1accc60937eb67", null ],
     [ "aes_cfb_t", "intel-ipsec-mb_8h.html#aeb837fda81cdf56ffcfa4e68b5877a35", null ],
+    [ "aes_ecb_quic_t", "intel-ipsec-mb_8h.html#ad907e0caa52fcb257275464179620643", null ],
     [ "aes_gcm_enc_dec_finalize_t", "intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5", null ],
     [ "aes_gcm_enc_dec_iv_t", "intel-ipsec-mb_8h.html#ac5bfb31d18fdc55451cd325c4af032c7", null ],
     [ "aes_gcm_enc_dec_t", "intel-ipsec-mb_8h.html#a71fb9f25bcab533a98f3d1c5cc2c7f48", null ],
@@ -204,6 +230,7 @@ var intel_ipsec_mb_8h =
     [ "aes_gmac_finalize_t", "intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7", null ],
     [ "aes_gmac_init_t", "intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0", null ],
     [ "aes_gmac_update_t", "intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18", null ],
+    [ "burst_fn_t", "intel-ipsec-mb_8h.html#aaeed8e5ec28aba6b8deef269b7c4bb28", null ],
     [ "chacha_poly_enc_dec_update_t", "intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548", null ],
     [ "chacha_poly_finalize_t", "intel-ipsec-mb_8h.html#a1a96f063bf1bd07de158985b57cff4a0", null ],
     [ "chacha_poly_init_t", "intel-ipsec-mb_8h.html#a4b0b9ffa331f8d675d24911639f0374f", null ],
@@ -247,7 +274,6 @@ var intel_ipsec_mb_8h =
     [ "snow3g_init_key_sched_t", "intel-ipsec-mb_8h.html#adfa182361f1c179d75129b4e46841af5", null ],
     [ "snow3g_key_sched_size_t", "intel-ipsec-mb_8h.html#ad78a4f1c0d6de808f7046c0fbcd98d8f", null ],
     [ "snow3g_key_schedule_t", "intel-ipsec-mb_8h.html#ae50b48832b41b4b468cf933b44849213", null ],
-    [ "submit_burst_t", "intel-ipsec-mb_8h.html#a0cf6acb86385bc984ec5f916fe6e1066", null ],
     [ "submit_cipher_burst_t", "intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009", null ],
     [ "submit_hash_burst_t", "intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5", null ],
     [ "submit_job_t", "intel-ipsec-mb_8h.html#a41297d789b434157e746e338f0af96ec", null ],
@@ -349,6 +375,12 @@ var intel_ipsec_mb_8h =
       [ "IMB_ERR_JOB_NULL_GHASH_INIT_TAG", "intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9", null ],
       [ "IMB_ERR_MISSING_CPUFLAGS_INIT_MGR", "intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60", null ],
       [ "IMB_ERR_NULL_JOB", "intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38", null ],
+      [ "IMB_ERR_QUEUE_SPACE", "intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4f73ed8232981b84df1fee21024e01ac", null ],
+      [ "IMB_ERR_NULL_BURST", "intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba99d845a176cd571dd6f99b0a430291c6", null ],
+      [ "IMB_ERR_BURST_SIZE", "intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae2bc238b157942636836eaf0eedb5ddf", null ],
+      [ "IMB_ERR_BURST_OOO", "intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae4584575cf7134ba02ca1d38bb3f6444", null ],
+      [ "IMB_ERR_SELFTEST", "intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1873d38b8aaf5ebcd3f542b15c418829", null ],
+      [ "IMB_ERR_BURST_SUITE_ID", "intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba436eb6f9e045a02e3ad5998da8c13d78", null ],
       [ "IMB_ERR_MAX", "intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6", null ]
     ] ],
     [ "IMB_HASH_ALG", "intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006", [
@@ -401,6 +433,7 @@ var intel_ipsec_mb_8h =
       [ "IMB_AUTH_NUM", "intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a5d34120f8a1c5cde857baf32536868af", null ]
     ] ],
     [ "IMB_KEY_SIZE_BYTES", "intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc", [
+      [ "IMB_KEY_64_BYTES", "intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaa1eb9eb83fca5f5dd6578f27733eb390", null ],
       [ "IMB_KEY_128_BYTES", "intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaf3e82db9a8b5b1b229c201735938969d", null ],
       [ "IMB_KEY_192_BYTES", "intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cca573d62aa6a04d9ce2b3c34e226846598", null ],
       [ "IMB_KEY_256_BYTES", "intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccac139e7555c9b30725359698833eb213a", null ]
@@ -420,10 +453,6 @@ var intel_ipsec_mb_8h =
       [ "IMB_STATUS_INTERNAL_ERROR", "intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba546465b9d4cfb1f9c98c864bf5ed51fb", null ],
       [ "IMB_STATUS_ERROR", "intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba0ef40895610ac6343d171f65be676a1d", null ]
     ] ],
-    [ "aes_cfb_128_one_avx", "intel-ipsec-mb_8h.html#a5a330bd4ed945f830c88dd6e1066652d", null ],
-    [ "aes_cfb_128_one_avx2", "intel-ipsec-mb_8h.html#a7046666312bdba42b05bfbf63d0e1c6a", null ],
-    [ "aes_cfb_128_one_avx512", "intel-ipsec-mb_8h.html#abb7c6395420af2addd92a3fa46e0fd28", null ],
-    [ "aes_cfb_128_one_sse", "intel-ipsec-mb_8h.html#a7bc28362ae2fb8a4d624b8a7a00adebd", null ],
     [ "aes_cmac_subkey_gen_avx", "intel-ipsec-mb_8h.html#a6541825066a8d2b8b3c7b6e2c4b28c83", null ],
     [ "aes_cmac_subkey_gen_avx2", "intel-ipsec-mb_8h.html#a6903e1e0dfb8fd75c2f556596f3efa1b", null ],
     [ "aes_cmac_subkey_gen_avx512", "intel-ipsec-mb_8h.html#a730f18bd7cdcbbb995e24931307867fc", null ],
@@ -538,6 +567,7 @@ var intel_ipsec_mb_8h =
     [ "aes_xcbc_expand_key_avx512", "intel-ipsec-mb_8h.html#a1308be648182642b8d73ff27d9344564", null ],
     [ "aes_xcbc_expand_key_sse", "intel-ipsec-mb_8h.html#aefb28e46620cbf65a2af3073b2401e40", null ],
     [ "alloc_mb_mgr", "intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e", null ],
+    [ "des_cfb_one", "intel-ipsec-mb_8h.html#a71a0353411f5307a2177ae9b2814f522", null ],
     [ "des_key_schedule", "intel-ipsec-mb_8h.html#a9911462fe4689c7420b827bb13fc3440", null ],
     [ "flush_job_avx", "intel-ipsec-mb_8h.html#abc6b0f1c857f26b834f22b6bd8f51846", null ],
     [ "flush_job_avx2", "intel-ipsec-mb_8h.html#ae242d142065172898129f30e6bc40d8c", null ],
@@ -559,7 +589,11 @@ var intel_ipsec_mb_8h =
     [ "imb_get_strerror", "intel-ipsec-mb_8h.html#a61f664448a862fbb02e728ce518ff8e4", null ],
     [ "imb_get_version", "intel-ipsec-mb_8h.html#aee02bcb3a5e5eaee3632086f75c3d78d", null ],
     [ "imb_get_version_str", "intel-ipsec-mb_8h.html#a4490e7b324236315f1a9e141b39f99f2", null ],
+    [ "imb_hmac_ipad_opad", "intel-ipsec-mb_8h.html#ab5ecb9fd270d0bfc42e46c5a3a9225fe", null ],
+    [ "imb_quic_aes_gcm", "intel-ipsec-mb_8h.html#a8faae8f9387983904125d862c4cac9ab", null ],
+    [ "imb_quic_hp_aes_ecb", "intel-ipsec-mb_8h.html#a89f9807d10f3459444bb649caf9b64ca", null ],
     [ "imb_set_pointers_mb_mgr", "intel-ipsec-mb_8h.html#a3a825e903d1f8f8611b98b60fcaa5a81", null ],
+    [ "imb_set_session", "intel-ipsec-mb_8h.html#ada304337e78ef5a462c97c1f8151ef67", null ],
     [ "init_mb_mgr_auto", "intel-ipsec-mb_8h.html#a2cbbd032835837fd0aa83b04f5337638", null ],
     [ "init_mb_mgr_avx", "intel-ipsec-mb_8h.html#aee547b1b9e70e12c84d9949317e41c6c", null ],
     [ "init_mb_mgr_avx2", "intel-ipsec-mb_8h.html#a71b6563b6b4c0c504cd9b8302a242cfa", null ],
@@ -575,46 +609,6 @@ var intel_ipsec_mb_8h =
     [ "queue_size_avx2", "intel-ipsec-mb_8h.html#a8a540000c08366ad47d95e23ed5b2918", null ],
     [ "queue_size_avx512", "intel-ipsec-mb_8h.html#a51c0426a4b57c9e7db2b091692dff472", null ],
     [ "queue_size_sse", "intel-ipsec-mb_8h.html#a80f792744558de173ea97d722c58e5c1", null ],
-    [ "sha1_avx", "intel-ipsec-mb_8h.html#a9478828dde5161c2a1b43cb0da0f9f67", null ],
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 <a href="intel-ipsec-mb_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span><span class="comment">/*******************************************************************************</span></div>
-<div class="line"><a id="l00002" name="l00002"></a><span class="lineno">    2</span><span class="comment">  Copyright (c) 2012-2022, Intel Corporation</span></div>
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@@ -177,8 +181,8 @@ $(document).ready(function(){initNavTree('intel-ipsec-mb_8h_source.html',''); in
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-<div class="line"><a id="l00094" name="l00094"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a874972638400dafdb542319d61bfbfbc">   94</a></span><span class="preprocessor">#define IMB_VERSION_STR &quot;1.2.0&quot;</span></div>
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@@ -214,2037 +218,1931 @@ $(document).ready(function(){initNavTree('intel-ipsec-mb_8h_source.html',''); in
 <div class="line"><a id="l00140" name="l00140"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2538a5e82141eb5a54f78660241e186c">  140</a></span><span class="preprocessor">#define IMB_SHA384_DIGEST_SIZE_IN_BYTES 48</span></div>
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-<div class="line"><a id="l00174" name="l00174"></a><span class="lineno">  174</span> </div>
-<div class="line"><a id="l00178" name="l00178"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0b">  178</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
-<div class="line"><a id="l00179" name="l00179"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3f9d55f356a0caf413d2114a468ba659">  179</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3f9d55f356a0caf413d2114a468ba659">IMB_ERR_MIN</a> = 2000,</div>
-<div class="line"><a id="l00180" name="l00180"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba9ba69cc32a2d17e3e7b4d4c982f26abd">  180</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba9ba69cc32a2d17e3e7b4d4c982f26abd">IMB_ERR_NULL_MBMGR</a>,</div>
-<div class="line"><a id="l00181" name="l00181"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4bc6a784afa9bb88c5afe4fd1b5f610d">  181</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4bc6a784afa9bb88c5afe4fd1b5f610d">IMB_ERR_JOB_NULL_SRC</a>,</div>
-<div class="line"><a id="l00182" name="l00182"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba55b3ddc1a48cb14ad020031b8d5b4927">  182</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba55b3ddc1a48cb14ad020031b8d5b4927">IMB_ERR_JOB_NULL_DST</a>,</div>
-<div class="line"><a id="l00183" name="l00183"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba22402460340d6b34492ece390a7913c0">  183</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba22402460340d6b34492ece390a7913c0">IMB_ERR_JOB_NULL_KEY</a>,</div>
-<div class="line"><a id="l00184" name="l00184"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0d35070d6476cde0202deb5531ae09c2">  184</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0d35070d6476cde0202deb5531ae09c2">IMB_ERR_JOB_NULL_IV</a>,</div>
-<div class="line"><a id="l00185" name="l00185"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba503544043c60c2195003c00b18141beb">  185</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba503544043c60c2195003c00b18141beb">IMB_ERR_JOB_NULL_AUTH</a>,</div>
-<div class="line"><a id="l00186" name="l00186"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3ef3d3180e3052862c796cf89320d60c">  186</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3ef3d3180e3052862c796cf89320d60c">IMB_ERR_JOB_NULL_AAD</a>,</div>
-<div class="line"><a id="l00187" name="l00187"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae1c9e58d4be3fdd7bb37247667472920">  187</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae1c9e58d4be3fdd7bb37247667472920">IMB_ERR_JOB_CIPH_LEN</a>,</div>
-<div class="line"><a id="l00188" name="l00188"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69dd17473dc4afb2f04c417fe6882608">  188</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69dd17473dc4afb2f04c417fe6882608">IMB_ERR_JOB_AUTH_LEN</a>,</div>
-<div class="line"><a id="l00189" name="l00189"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba390f91827f87bbd3233ad6e1f104b2b4">  189</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba390f91827f87bbd3233ad6e1f104b2b4">IMB_ERR_JOB_IV_LEN</a>,</div>
-<div class="line"><a id="l00190" name="l00190"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badfea107da94936d30900f23ad22b5285">  190</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badfea107da94936d30900f23ad22b5285">IMB_ERR_JOB_KEY_LEN</a>,</div>
-<div class="line"><a id="l00191" name="l00191"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1b7e4c43808275e9cd63ca21091e5ab2">  191</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1b7e4c43808275e9cd63ca21091e5ab2">IMB_ERR_JOB_AUTH_TAG_LEN</a>,</div>
-<div class="line"><a id="l00192" name="l00192"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba31a6b672b95d7d100a97fa6d788c0dd6">  192</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba31a6b672b95d7d100a97fa6d788c0dd6">IMB_ERR_JOB_AAD_LEN</a>,</div>
-<div class="line"><a id="l00193" name="l00193"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba207979780b5d8472dfef2f5e12998d22">  193</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba207979780b5d8472dfef2f5e12998d22">IMB_ERR_JOB_SRC_OFFSET</a>,</div>
-<div class="line"><a id="l00194" name="l00194"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacaec18a061b4bf792178408d69775950">  194</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacaec18a061b4bf792178408d69775950">IMB_ERR_JOB_CHAIN_ORDER</a>,</div>
-<div class="line"><a id="l00195" name="l00195"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba61a411feda0e8cf5aff8c58ad2e92bdd">  195</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba61a411feda0e8cf5aff8c58ad2e92bdd">IMB_ERR_CIPH_MODE</a>,</div>
-<div class="line"><a id="l00196" name="l00196"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8ac2802661bd9928d0c766129db2a814">  196</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8ac2802661bd9928d0c766129db2a814">IMB_ERR_HASH_ALGO</a>,</div>
-<div class="line"><a id="l00197" name="l00197"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba97fb89f93299f67de86aac919bb83aa9">  197</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba97fb89f93299f67de86aac919bb83aa9">IMB_ERR_JOB_NULL_AUTH_KEY</a>,</div>
-<div class="line"><a id="l00198" name="l00198"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba05f9212af539a22ad65b12a9abc8e5c0">  198</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba05f9212af539a22ad65b12a9abc8e5c0">IMB_ERR_JOB_NULL_SGL_CTX</a>,</div>
-<div class="line"><a id="l00199" name="l00199"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba983561202b1623b0bd1f691bd6036039">  199</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba983561202b1623b0bd1f691bd6036039">IMB_ERR_JOB_NULL_NEXT_IV</a>,</div>
-<div class="line"><a id="l00200" name="l00200"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bace7e834842ddef5b063c99544d00b303">  200</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bace7e834842ddef5b063c99544d00b303">IMB_ERR_JOB_PON_PLI</a>,</div>
-<div class="line"><a id="l00201" name="l00201"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba308819b7cbdadfd6bbee290408880302">  201</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba308819b7cbdadfd6bbee290408880302">IMB_ERR_NULL_SRC</a>,</div>
-<div class="line"><a id="l00202" name="l00202"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1a61dcc99a1a9725c89076dec3c02e02">  202</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1a61dcc99a1a9725c89076dec3c02e02">IMB_ERR_NULL_DST</a>,</div>
-<div class="line"><a id="l00203" name="l00203"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba63029e3673eef74345ad80867f7ba0ef">  203</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba63029e3673eef74345ad80867f7ba0ef">IMB_ERR_NULL_KEY</a>,</div>
-<div class="line"><a id="l00204" name="l00204"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3b60a570372529486da69c6d2b7be382">  204</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3b60a570372529486da69c6d2b7be382">IMB_ERR_NULL_EXP_KEY</a>,</div>
-<div class="line"><a id="l00205" name="l00205"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafcfe882ee9730fd1724b587106f2f419">  205</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafcfe882ee9730fd1724b587106f2f419">IMB_ERR_NULL_IV</a>,</div>
-<div class="line"><a id="l00206" name="l00206"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1e20954ec8a501093175d640631550c1">  206</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1e20954ec8a501093175d640631550c1">IMB_ERR_NULL_AUTH</a>,</div>
-<div class="line"><a id="l00207" name="l00207"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badc7d17d90012d5c14fd8a12d9ea12543">  207</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badc7d17d90012d5c14fd8a12d9ea12543">IMB_ERR_NULL_AAD</a>,</div>
-<div class="line"><a id="l00208" name="l00208"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bab5a2b4c1df7778c3efc236976062ed94">  208</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bab5a2b4c1df7778c3efc236976062ed94">IMB_ERR_CIPH_LEN</a>,</div>
-<div class="line"><a id="l00209" name="l00209"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafe5af1c17e1caece14b3a5f659a1336d">  209</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafe5af1c17e1caece14b3a5f659a1336d">IMB_ERR_AUTH_LEN</a>,</div>
-<div class="line"><a id="l00210" name="l00210"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baac8500b58709f0bd05ad129337bb6af2">  210</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baac8500b58709f0bd05ad129337bb6af2">IMB_ERR_IV_LEN</a>,</div>
-<div class="line"><a id="l00211" name="l00211"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8d6b3ea721216bb12fbe40e72a5bd768">  211</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8d6b3ea721216bb12fbe40e72a5bd768">IMB_ERR_KEY_LEN</a>,</div>
-<div class="line"><a id="l00212" name="l00212"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6af5bd8fb7690b46afe3d2c1e623808e">  212</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6af5bd8fb7690b46afe3d2c1e623808e">IMB_ERR_AUTH_TAG_LEN</a>,</div>
-<div class="line"><a id="l00213" name="l00213"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0ad3ade3fe22c5887d9bf444ff3923aa">  213</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0ad3ade3fe22c5887d9bf444ff3923aa">IMB_ERR_AAD_LEN</a>,</div>
-<div class="line"><a id="l00214" name="l00214"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba20dfbdc8feb8332a9efe51de48fa6e09">  214</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba20dfbdc8feb8332a9efe51de48fa6e09">IMB_ERR_SRC_OFFSET</a>,</div>
-<div class="line"><a id="l00215" name="l00215"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baa4f5aeab78ed40a4c19389b8f691306c">  215</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baa4f5aeab78ed40a4c19389b8f691306c">IMB_ERR_NULL_AUTH_KEY</a>,</div>
-<div class="line"><a id="l00216" name="l00216"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0b57ec134f6e10e11c3fbcf77ede282d">  216</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0b57ec134f6e10e11c3fbcf77ede282d">IMB_ERR_NULL_CTX</a>,</div>
-<div class="line"><a id="l00217" name="l00217"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4496bf14e2ddf1133a384f9fbf96d5dc">  217</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4496bf14e2ddf1133a384f9fbf96d5dc">IMB_ERR_NO_AESNI_EMU</a>,</div>
-<div class="line"><a id="l00218" name="l00218"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacb9286af7533993ab79982b288aab97a">  218</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacb9286af7533993ab79982b288aab97a">IMB_ERR_JOB_NULL_HMAC_OPAD</a>,</div>
-<div class="line"><a id="l00219" name="l00219"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba15f55e87bb42cf5494dd01b9a1c4d712">  219</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba15f55e87bb42cf5494dd01b9a1c4d712">IMB_ERR_JOB_NULL_HMAC_IPAD</a>,</div>
-<div class="line"><a id="l00220" name="l00220"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69bf9e54fdf84b154284eab071c98804">  220</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69bf9e54fdf84b154284eab071c98804">IMB_ERR_JOB_NULL_XCBC_K1_EXP</a>,</div>
-<div class="line"><a id="l00221" name="l00221"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bad7fbd09092821fb8605e11384dcdc428">  221</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bad7fbd09092821fb8605e11384dcdc428">IMB_ERR_JOB_NULL_XCBC_K2</a>,</div>
-<div class="line"><a id="l00222" name="l00222"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baf12955208a99c8feeeb580fee940b7c3">  222</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baf12955208a99c8feeeb580fee940b7c3">IMB_ERR_JOB_NULL_XCBC_K3</a>,</div>
-<div class="line"><a id="l00223" name="l00223"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacbf5d148be9963df1d46400ff26396db">  223</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacbf5d148be9963df1d46400ff26396db">IMB_ERR_JOB_CIPH_DIR</a>,</div>
-<div class="line"><a id="l00224" name="l00224"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9">  224</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9">IMB_ERR_JOB_NULL_GHASH_INIT_TAG</a>,</div>
-<div class="line"><a id="l00225" name="l00225"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60">  225</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60">IMB_ERR_MISSING_CPUFLAGS_INIT_MGR</a>,</div>
-<div class="line"><a id="l00226" name="l00226"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38">  226</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38">IMB_ERR_NULL_JOB</a>,</div>
-<div class="line"><a id="l00227" name="l00227"></a><span class="lineno">  227</span>        <span class="comment">/* add new error types above this comment */</span></div>
-<div class="line"><a id="l00228" name="l00228"></a><span class="lineno">  228</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6">IMB_ERR_MAX</a>       <span class="comment">/* don&#39;t move this one */</span></div>
-<div class="line"><a id="l00229" name="l00229"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6">  229</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0b">IMB_ERR</a>;</div>
-<div class="line"><a id="l00230" name="l00230"></a><span class="lineno">  230</span> </div>
-<div class="line"><a id="l00235" name="l00235"></a><span class="lineno">  235</span><span class="preprocessor">#ifdef __ELASTERROR</span></div>
-<div class="line"><a id="l00236" name="l00236"></a><span class="lineno">  236</span><span class="preprocessor">#if __ELASTERROR &gt; 2000</span></div>
-<div class="line"><a id="l00237" name="l00237"></a><span class="lineno">  237</span><span class="preprocessor">#error &quot;Library error codes conflict with errno.h - please update IMB_ERR_MIN!&quot;</span></div>
-<div class="line"><a id="l00238" name="l00238"></a><span class="lineno">  238</span><span class="preprocessor">#endif</span></div>
-<div class="line"><a id="l00239" name="l00239"></a><span class="lineno">  239</span><span class="preprocessor">#endif</span></div>
-<div class="line"><a id="l00240" name="l00240"></a><span class="lineno">  240</span> </div>
-<div class="line"><a id="l00247" name="l00247"></a><span class="lineno">  247</span><span class="preprocessor">#ifndef NO_COMPAT_IMB_API_053</span></div>
-<div class="line"><a id="l00248" name="l00248"></a><span class="lineno">  248</span><span class="comment">/* Previous cipher mode enums */</span></div>
-<div class="line"><a id="l00249" name="l00249"></a><span class="lineno">  249</span><span class="preprocessor">#define CBC                     IMB_CIPHER_CBC</span></div>
-<div class="line"><a id="l00250" name="l00250"></a><span class="lineno">  250</span><span class="preprocessor">#define CNTR                    IMB_CIPHER_CNTR</span></div>
-<div class="line"><a id="l00251" name="l00251"></a><span class="lineno">  251</span><span class="preprocessor">#define NULL_CIPHER             IMB_CIPHER_NULL</span></div>
-<div class="line"><a id="l00252" name="l00252"></a><span class="lineno">  252</span><span class="preprocessor">#define DOCSIS_SEC_BPI          IMB_CIPHER_DOCSIS_SEC_BPI</span></div>
-<div class="line"><a id="l00253" name="l00253"></a><span class="lineno">  253</span><span class="preprocessor">#define GCM                     IMB_CIPHER_GCM</span></div>
-<div class="line"><a id="l00254" name="l00254"></a><span class="lineno">  254</span><span class="preprocessor">#define CUSTOM_CIPHER           IMB_CIPHER_CUSTOM</span></div>
-<div class="line"><a id="l00255" name="l00255"></a><span class="lineno">  255</span><span class="preprocessor">#define DES                     IMB_CIPHER_DES</span></div>
-<div class="line"><a id="l00256" name="l00256"></a><span class="lineno">  256</span><span class="preprocessor">#define DOCSIS_DES              IMB_CIPHER_DOCSIS_DES</span></div>
-<div class="line"><a id="l00257" name="l00257"></a><span class="lineno">  257</span><span class="preprocessor">#define CCM                     IMB_CIPHER_CCM</span></div>
-<div class="line"><a id="l00258" name="l00258"></a><span class="lineno">  258</span><span class="preprocessor">#define DES3                    IMB_CIPHER_DES3</span></div>
-<div class="line"><a id="l00259" name="l00259"></a><span class="lineno">  259</span><span class="preprocessor">#define PON_AES_CNTR            IMB_CIPHER_PON_AES_CNTR</span></div>
-<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span><span class="preprocessor">#define ECB                     IMB_CIPHER_ECB</span></div>
-<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span><span class="preprocessor">#define CNTR_BITLEN             IMB_CIPHER_CNTR_BITLEN</span></div>
-<div class="line"><a id="l00262" name="l00262"></a><span class="lineno">  262</span> </div>
-<div class="line"><a id="l00263" name="l00263"></a><span class="lineno">  263</span><span class="comment">/* Previous hash algo enums */</span></div>
-<div class="line"><a id="l00264" name="l00264"></a><span class="lineno">  264</span><span class="preprocessor">#define SHA1                    IMB_AUTH_HMAC_SHA_1</span></div>
-<div class="line"><a id="l00265" name="l00265"></a><span class="lineno">  265</span><span class="preprocessor">#define SHA_224                 IMB_AUTH_HMAC_SHA_224</span></div>
-<div class="line"><a id="l00266" name="l00266"></a><span class="lineno">  266</span><span class="preprocessor">#define SHA_256                 IMB_AUTH_HMAC_SHA_256</span></div>
-<div class="line"><a id="l00267" name="l00267"></a><span class="lineno">  267</span><span class="preprocessor">#define SHA_384                 IMB_AUTH_HMAC_SHA_384</span></div>
-<div class="line"><a id="l00268" name="l00268"></a><span class="lineno">  268</span><span class="preprocessor">#define SHA_512                 IMB_AUTH_HMAC_SHA_512</span></div>
-<div class="line"><a id="l00269" name="l00269"></a><span class="lineno">  269</span><span class="preprocessor">#define AES_XCBC                IMB_AUTH_AES_XCBC</span></div>
-<div class="line"><a id="l00270" name="l00270"></a><span class="lineno">  270</span><span class="preprocessor">#define MD5                     IMB_AUTH_MD5</span></div>
-<div class="line"><a id="l00271" name="l00271"></a><span class="lineno">  271</span><span class="preprocessor">#define NULL_HASH               IMB_AUTH_NULL</span></div>
-<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span><span class="preprocessor">#define AES_GMAC                IMB_AUTH_AES_GMAC</span></div>
-<div class="line"><a id="l00273" name="l00273"></a><span class="lineno">  273</span><span class="preprocessor">#define CUSTOM_HASH             IMB_AUTH_CUSTOM</span></div>
-<div class="line"><a id="l00274" name="l00274"></a><span class="lineno">  274</span><span class="preprocessor">#define AES_CCM                 IMB_AUTH_AES_CCM</span></div>
-<div class="line"><a id="l00275" name="l00275"></a><span class="lineno">  275</span><span class="preprocessor">#define AES_CMAC                IMB_AUTH_AES_CMAC</span></div>
-<div class="line"><a id="l00276" name="l00276"></a><span class="lineno">  276</span><span class="preprocessor">#define PLAIN_SHA1              IMB_AUTH_SHA_1</span></div>
-<div class="line"><a id="l00277" name="l00277"></a><span class="lineno">  277</span><span class="preprocessor">#define PLAIN_SHA_224           IMB_AUTH_SHA_224</span></div>
-<div class="line"><a id="l00278" name="l00278"></a><span class="lineno">  278</span><span class="preprocessor">#define PLAIN_SHA_256           IMB_AUTH_SHA_256</span></div>
-<div class="line"><a id="l00279" name="l00279"></a><span class="lineno">  279</span><span class="preprocessor">#define PLAIN_SHA_384           IMB_AUTH_SHA_384</span></div>
-<div class="line"><a id="l00280" name="l00280"></a><span class="lineno">  280</span><span class="preprocessor">#define PLAIN_SHA_512           IMB_AUTH_SHA_512</span></div>
-<div class="line"><a id="l00281" name="l00281"></a><span class="lineno">  281</span><span class="preprocessor">#define AES_CMAC_BITLEN         IMB_AUTH_AES_CMAC_BITLEN</span></div>
-<div class="line"><a id="l00282" name="l00282"></a><span class="lineno">  282</span><span class="preprocessor">#define PON_CRC_BIP             IMB_AUTH_PON_CRC_BIP</span></div>
-<div class="line"><a id="l00283" name="l00283"></a><span class="lineno">  283</span> </div>
-<div class="line"><a id="l00284" name="l00284"></a><span class="lineno">  284</span><span class="comment">/* Previous cipher direction enums */</span></div>
-<div class="line"><a id="l00285" name="l00285"></a><span class="lineno">  285</span><span class="preprocessor">#define ENCRYPT                 IMB_DIR_ENCRYPT</span></div>
-<div class="line"><a id="l00286" name="l00286"></a><span class="lineno">  286</span><span class="preprocessor">#define DECRYPT                 IMB_DIR_DECRYPT</span></div>
+<div class="line"><a id="l00153" name="l00153"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a46d59512e3a7254e54018181b7a31102">  153</a></span><span class="preprocessor">#define IMB_KASUMI_KEY_SIZE         16</span></div>
+<div class="line"><a id="l00154" name="l00154"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adf7e13e43c6bb30489d0e26f11e39440">  154</a></span><span class="preprocessor">#define IMB_KASUMI_IV_SIZE          8</span></div>
+<div class="line"><a id="l00155" name="l00155"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa31ca303e03fc548199f95e5335889e1">  155</a></span><span class="preprocessor">#define IMB_KASUMI_BLOCK_SIZE       8</span></div>
+<div class="line"><a id="l00156" name="l00156"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a56bd44d01c91469b57efa36f360a83bf">  156</a></span><span class="preprocessor">#define IMB_KASUMI_DIGEST_SIZE      4</span></div>
+<div class="line"><a id="l00157" name="l00157"></a><span class="lineno">  157</span> </div>
+<div class="line"><a id="l00158" name="l00158"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a053b0646f055d7ee3be974bb2bfe534b">  158</a></span><span class="preprocessor">#define IMB_ZUC_KEY_LEN_IN_BYTES                16</span></div>
+<div class="line"><a id="l00159" name="l00159"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aaacb0749fd75d1133414685b5694652d">  159</a></span><span class="preprocessor">#define IMB_ZUC_IV_LEN_IN_BYTES                 16</span></div>
+<div class="line"><a id="l00160" name="l00160"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a35d04f4dc107531e37fcab1fd5efbf93">  160</a></span><span class="preprocessor">#define IMB_ZUC256_KEY_LEN_IN_BYTES             32</span></div>
+<div class="line"><a id="l00161" name="l00161"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a18e1733291bb917240ef117f52c6aa6c">  161</a></span><span class="preprocessor">#define IMB_ZUC256_IV_LEN_IN_BYTES_MIN          23</span></div>
+<div class="line"><a id="l00162" name="l00162"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5ab93cc1831b961f3d04ff913f63b832">  162</a></span><span class="preprocessor">#define IMB_ZUC256_IV_LEN_IN_BYTES_MAX          25</span></div>
+<div class="line"><a id="l00163" name="l00163"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adbb9f3bfdc1d416c20a579eb3a8b0b8f">  163</a></span><span class="preprocessor">#define IMB_ZUC_DIGEST_LEN_IN_BYTES             4</span></div>
+<div class="line"><a id="l00164" name="l00164"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3dc24506ef16ad090414608c762b3d3c">  164</a></span><span class="preprocessor">#define IMB_ZUC256_DIGEST_LEN_IN_BYTES_MIN      4</span></div>
+<div class="line"><a id="l00165" name="l00165"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2b1faea7079fa3ddb2cabeb41aeb2a0a">  165</a></span><span class="preprocessor">#define IMB_ZUC256_DIGEST_LEN_IN_BYTES_MAX      16</span></div>
+<div class="line"><a id="l00166" name="l00166"></a><span class="lineno">  166</span> </div>
+<div class="line"><a id="l00171" name="l00171"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a74dca2bb8b0c87dec90f3b985c0266af">  171</a></span><span class="preprocessor">#define IMB_DOCSIS_CRC32_MIN_ETH_PDU_SIZE 14</span></div>
+<div class="line"><a id="l00172" name="l00172"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a59c620471ea8c9577ed593127f82c758">  172</a></span><span class="preprocessor">#define IMB_DOCSIS_CRC32_TAG_SIZE         4</span></div>
+<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span> </div>
+<div class="line"><a id="l00178" name="l00178"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066ab">  178</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
+<div class="line"><a id="l00179" name="l00179"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066abaa562b01ade81e0196fc23cd79d534141">  179</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066abaa562b01ade81e0196fc23cd79d534141">IMB_STATUS_BEING_PROCESSED</a>  = 0,</div>
+<div class="line"><a id="l00180" name="l00180"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba6fcaccd3853c9e8cf3b402edc3e22089">  180</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba6fcaccd3853c9e8cf3b402edc3e22089">IMB_STATUS_COMPLETED_CIPHER</a> = 1,</div>
+<div class="line"><a id="l00181" name="l00181"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba79df83a15cdafc2a6c79751457ae9792">  181</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba79df83a15cdafc2a6c79751457ae9792">IMB_STATUS_COMPLETED_AUTH</a>   = 2,</div>
+<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba508a9f195acee09621542ca687ba2341">IMB_STATUS_COMPLETED</a>        = 3, </div>
+<div class="line"><a id="l00184" name="l00184"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066abaee85b6a8bc33e0b39001e9ff538540b7">  184</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066abaee85b6a8bc33e0b39001e9ff538540b7">IMB_STATUS_INVALID_ARGS</a>     = 4,</div>
+<div class="line"><a id="l00185" name="l00185"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba546465b9d4cfb1f9c98c864bf5ed51fb">  185</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba546465b9d4cfb1f9c98c864bf5ed51fb">IMB_STATUS_INTERNAL_ERROR</a>,</div>
+<div class="line"><a id="l00186" name="l00186"></a><span class="lineno">  186</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba0ef40895610ac6343d171f65be676a1d">IMB_STATUS_ERROR</a></div>
+<div class="line"><a id="l00187" name="l00187"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba0ef40895610ac6343d171f65be676a1d">  187</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066ab">IMB_STATUS</a>;</div>
+<div class="line"><a id="l00188" name="l00188"></a><span class="lineno">  188</span> </div>
+<div class="line"><a id="l00192" name="l00192"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0b">  192</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
+<div class="line"><a id="l00193" name="l00193"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3f9d55f356a0caf413d2114a468ba659">  193</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3f9d55f356a0caf413d2114a468ba659">IMB_ERR_MIN</a> = 2000,</div>
+<div class="line"><a id="l00194" name="l00194"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba9ba69cc32a2d17e3e7b4d4c982f26abd">  194</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba9ba69cc32a2d17e3e7b4d4c982f26abd">IMB_ERR_NULL_MBMGR</a>,</div>
+<div class="line"><a id="l00195" name="l00195"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4bc6a784afa9bb88c5afe4fd1b5f610d">  195</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4bc6a784afa9bb88c5afe4fd1b5f610d">IMB_ERR_JOB_NULL_SRC</a>,</div>
+<div class="line"><a id="l00196" name="l00196"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba55b3ddc1a48cb14ad020031b8d5b4927">  196</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba55b3ddc1a48cb14ad020031b8d5b4927">IMB_ERR_JOB_NULL_DST</a>,</div>
+<div class="line"><a id="l00197" name="l00197"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba22402460340d6b34492ece390a7913c0">  197</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba22402460340d6b34492ece390a7913c0">IMB_ERR_JOB_NULL_KEY</a>,</div>
+<div class="line"><a id="l00198" name="l00198"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0d35070d6476cde0202deb5531ae09c2">  198</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0d35070d6476cde0202deb5531ae09c2">IMB_ERR_JOB_NULL_IV</a>,</div>
+<div class="line"><a id="l00199" name="l00199"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba503544043c60c2195003c00b18141beb">  199</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba503544043c60c2195003c00b18141beb">IMB_ERR_JOB_NULL_AUTH</a>,</div>
+<div class="line"><a id="l00200" name="l00200"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3ef3d3180e3052862c796cf89320d60c">  200</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3ef3d3180e3052862c796cf89320d60c">IMB_ERR_JOB_NULL_AAD</a>,</div>
+<div class="line"><a id="l00201" name="l00201"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae1c9e58d4be3fdd7bb37247667472920">  201</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae1c9e58d4be3fdd7bb37247667472920">IMB_ERR_JOB_CIPH_LEN</a>,</div>
+<div class="line"><a id="l00202" name="l00202"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69dd17473dc4afb2f04c417fe6882608">  202</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69dd17473dc4afb2f04c417fe6882608">IMB_ERR_JOB_AUTH_LEN</a>,</div>
+<div class="line"><a id="l00203" name="l00203"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba390f91827f87bbd3233ad6e1f104b2b4">  203</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba390f91827f87bbd3233ad6e1f104b2b4">IMB_ERR_JOB_IV_LEN</a>,</div>
+<div class="line"><a id="l00204" name="l00204"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badfea107da94936d30900f23ad22b5285">  204</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badfea107da94936d30900f23ad22b5285">IMB_ERR_JOB_KEY_LEN</a>,</div>
+<div class="line"><a id="l00205" name="l00205"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1b7e4c43808275e9cd63ca21091e5ab2">  205</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1b7e4c43808275e9cd63ca21091e5ab2">IMB_ERR_JOB_AUTH_TAG_LEN</a>,</div>
+<div class="line"><a id="l00206" name="l00206"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba31a6b672b95d7d100a97fa6d788c0dd6">  206</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba31a6b672b95d7d100a97fa6d788c0dd6">IMB_ERR_JOB_AAD_LEN</a>,</div>
+<div class="line"><a id="l00207" name="l00207"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba207979780b5d8472dfef2f5e12998d22">  207</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba207979780b5d8472dfef2f5e12998d22">IMB_ERR_JOB_SRC_OFFSET</a>,</div>
+<div class="line"><a id="l00208" name="l00208"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacaec18a061b4bf792178408d69775950">  208</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacaec18a061b4bf792178408d69775950">IMB_ERR_JOB_CHAIN_ORDER</a>,</div>
+<div class="line"><a id="l00209" name="l00209"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba61a411feda0e8cf5aff8c58ad2e92bdd">  209</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba61a411feda0e8cf5aff8c58ad2e92bdd">IMB_ERR_CIPH_MODE</a>,</div>
+<div class="line"><a id="l00210" name="l00210"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8ac2802661bd9928d0c766129db2a814">  210</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8ac2802661bd9928d0c766129db2a814">IMB_ERR_HASH_ALGO</a>,</div>
+<div class="line"><a id="l00211" name="l00211"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba97fb89f93299f67de86aac919bb83aa9">  211</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba97fb89f93299f67de86aac919bb83aa9">IMB_ERR_JOB_NULL_AUTH_KEY</a>,</div>
+<div class="line"><a id="l00212" name="l00212"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba05f9212af539a22ad65b12a9abc8e5c0">  212</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba05f9212af539a22ad65b12a9abc8e5c0">IMB_ERR_JOB_NULL_SGL_CTX</a>,</div>
+<div class="line"><a id="l00213" name="l00213"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba983561202b1623b0bd1f691bd6036039">  213</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba983561202b1623b0bd1f691bd6036039">IMB_ERR_JOB_NULL_NEXT_IV</a>,</div>
+<div class="line"><a id="l00214" name="l00214"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bace7e834842ddef5b063c99544d00b303">  214</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bace7e834842ddef5b063c99544d00b303">IMB_ERR_JOB_PON_PLI</a>,</div>
+<div class="line"><a id="l00215" name="l00215"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba308819b7cbdadfd6bbee290408880302">  215</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba308819b7cbdadfd6bbee290408880302">IMB_ERR_NULL_SRC</a>,</div>
+<div class="line"><a id="l00216" name="l00216"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1a61dcc99a1a9725c89076dec3c02e02">  216</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1a61dcc99a1a9725c89076dec3c02e02">IMB_ERR_NULL_DST</a>,</div>
+<div class="line"><a id="l00217" name="l00217"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba63029e3673eef74345ad80867f7ba0ef">  217</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba63029e3673eef74345ad80867f7ba0ef">IMB_ERR_NULL_KEY</a>,</div>
+<div class="line"><a id="l00218" name="l00218"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3b60a570372529486da69c6d2b7be382">  218</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3b60a570372529486da69c6d2b7be382">IMB_ERR_NULL_EXP_KEY</a>,</div>
+<div class="line"><a id="l00219" name="l00219"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafcfe882ee9730fd1724b587106f2f419">  219</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafcfe882ee9730fd1724b587106f2f419">IMB_ERR_NULL_IV</a>,</div>
+<div class="line"><a id="l00220" name="l00220"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1e20954ec8a501093175d640631550c1">  220</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1e20954ec8a501093175d640631550c1">IMB_ERR_NULL_AUTH</a>,</div>
+<div class="line"><a id="l00221" name="l00221"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badc7d17d90012d5c14fd8a12d9ea12543">  221</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badc7d17d90012d5c14fd8a12d9ea12543">IMB_ERR_NULL_AAD</a>,</div>
+<div class="line"><a id="l00222" name="l00222"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bab5a2b4c1df7778c3efc236976062ed94">  222</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bab5a2b4c1df7778c3efc236976062ed94">IMB_ERR_CIPH_LEN</a>,</div>
+<div class="line"><a id="l00223" name="l00223"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafe5af1c17e1caece14b3a5f659a1336d">  223</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafe5af1c17e1caece14b3a5f659a1336d">IMB_ERR_AUTH_LEN</a>,</div>
+<div class="line"><a id="l00224" name="l00224"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baac8500b58709f0bd05ad129337bb6af2">  224</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baac8500b58709f0bd05ad129337bb6af2">IMB_ERR_IV_LEN</a>,</div>
+<div class="line"><a id="l00225" name="l00225"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8d6b3ea721216bb12fbe40e72a5bd768">  225</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8d6b3ea721216bb12fbe40e72a5bd768">IMB_ERR_KEY_LEN</a>,</div>
+<div class="line"><a id="l00226" name="l00226"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6af5bd8fb7690b46afe3d2c1e623808e">  226</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6af5bd8fb7690b46afe3d2c1e623808e">IMB_ERR_AUTH_TAG_LEN</a>,</div>
+<div class="line"><a id="l00227" name="l00227"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0ad3ade3fe22c5887d9bf444ff3923aa">  227</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0ad3ade3fe22c5887d9bf444ff3923aa">IMB_ERR_AAD_LEN</a>,</div>
+<div class="line"><a id="l00228" name="l00228"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba20dfbdc8feb8332a9efe51de48fa6e09">  228</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba20dfbdc8feb8332a9efe51de48fa6e09">IMB_ERR_SRC_OFFSET</a>,</div>
+<div class="line"><a id="l00229" name="l00229"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baa4f5aeab78ed40a4c19389b8f691306c">  229</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baa4f5aeab78ed40a4c19389b8f691306c">IMB_ERR_NULL_AUTH_KEY</a>,</div>
+<div class="line"><a id="l00230" name="l00230"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0b57ec134f6e10e11c3fbcf77ede282d">  230</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0b57ec134f6e10e11c3fbcf77ede282d">IMB_ERR_NULL_CTX</a>,</div>
+<div class="line"><a id="l00231" name="l00231"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4496bf14e2ddf1133a384f9fbf96d5dc">  231</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4496bf14e2ddf1133a384f9fbf96d5dc">IMB_ERR_NO_AESNI_EMU</a>,</div>
+<div class="line"><a id="l00232" name="l00232"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacb9286af7533993ab79982b288aab97a">  232</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacb9286af7533993ab79982b288aab97a">IMB_ERR_JOB_NULL_HMAC_OPAD</a>,</div>
+<div class="line"><a id="l00233" name="l00233"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba15f55e87bb42cf5494dd01b9a1c4d712">  233</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba15f55e87bb42cf5494dd01b9a1c4d712">IMB_ERR_JOB_NULL_HMAC_IPAD</a>,</div>
+<div class="line"><a id="l00234" name="l00234"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69bf9e54fdf84b154284eab071c98804">  234</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69bf9e54fdf84b154284eab071c98804">IMB_ERR_JOB_NULL_XCBC_K1_EXP</a>,</div>
+<div class="line"><a id="l00235" name="l00235"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bad7fbd09092821fb8605e11384dcdc428">  235</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bad7fbd09092821fb8605e11384dcdc428">IMB_ERR_JOB_NULL_XCBC_K2</a>,</div>
+<div class="line"><a id="l00236" name="l00236"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baf12955208a99c8feeeb580fee940b7c3">  236</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baf12955208a99c8feeeb580fee940b7c3">IMB_ERR_JOB_NULL_XCBC_K3</a>,</div>
+<div class="line"><a id="l00237" name="l00237"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacbf5d148be9963df1d46400ff26396db">  237</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacbf5d148be9963df1d46400ff26396db">IMB_ERR_JOB_CIPH_DIR</a>,</div>
+<div class="line"><a id="l00238" name="l00238"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9">  238</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9">IMB_ERR_JOB_NULL_GHASH_INIT_TAG</a>,</div>
+<div class="line"><a id="l00239" name="l00239"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60">  239</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60">IMB_ERR_MISSING_CPUFLAGS_INIT_MGR</a>,</div>
+<div class="line"><a id="l00240" name="l00240"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38">  240</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38">IMB_ERR_NULL_JOB</a>,</div>
+<div class="line"><a id="l00241" name="l00241"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4f73ed8232981b84df1fee21024e01ac">  241</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4f73ed8232981b84df1fee21024e01ac">IMB_ERR_QUEUE_SPACE</a>,</div>
+<div class="line"><a id="l00242" name="l00242"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba99d845a176cd571dd6f99b0a430291c6">  242</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba99d845a176cd571dd6f99b0a430291c6">IMB_ERR_NULL_BURST</a>,</div>
+<div class="line"><a id="l00243" name="l00243"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae2bc238b157942636836eaf0eedb5ddf">  243</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae2bc238b157942636836eaf0eedb5ddf">IMB_ERR_BURST_SIZE</a>,</div>
+<div class="line"><a id="l00244" name="l00244"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae4584575cf7134ba02ca1d38bb3f6444">  244</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae4584575cf7134ba02ca1d38bb3f6444">IMB_ERR_BURST_OOO</a>,</div>
+<div class="line"><a id="l00245" name="l00245"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1873d38b8aaf5ebcd3f542b15c418829">  245</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1873d38b8aaf5ebcd3f542b15c418829">IMB_ERR_SELFTEST</a>,</div>
+<div class="line"><a id="l00246" name="l00246"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba436eb6f9e045a02e3ad5998da8c13d78">  246</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba436eb6f9e045a02e3ad5998da8c13d78">IMB_ERR_BURST_SUITE_ID</a>,</div>
+<div class="line"><a id="l00247" name="l00247"></a><span class="lineno">  247</span>        <span class="comment">/* add new error types above this comment */</span></div>
+<div class="line"><a id="l00248" name="l00248"></a><span class="lineno">  248</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6">IMB_ERR_MAX</a>       <span class="comment">/* don&#39;t move this one */</span></div>
+<div class="line"><a id="l00249" name="l00249"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6">  249</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0b">IMB_ERR</a>;</div>
+<div class="line"><a id="l00250" name="l00250"></a><span class="lineno">  250</span> </div>
+<div class="line"><a id="l00255" name="l00255"></a><span class="lineno">  255</span><span class="preprocessor">#ifdef __ELASTERROR</span></div>
+<div class="line"><a id="l00256" name="l00256"></a><span class="lineno">  256</span><span class="preprocessor">#if __ELASTERROR &gt; 2000</span></div>
+<div class="line"><a id="l00257" name="l00257"></a><span class="lineno">  257</span><span class="preprocessor">#error &quot;Library error codes conflict with errno.h - please update IMB_ERR_MIN!&quot;</span></div>
+<div class="line"><a id="l00258" name="l00258"></a><span class="lineno">  258</span><span class="preprocessor">#endif</span></div>
+<div class="line"><a id="l00259" name="l00259"></a><span class="lineno">  259</span><span class="preprocessor">#endif</span></div>
+<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span> </div>
+<div class="line"><a id="l00261" name="l00261"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334c">  261</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
+<div class="line"><a id="l00262" name="l00262"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0e2ebfcfd101ab4a39129082b2de517f">  262</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0e2ebfcfd101ab4a39129082b2de517f">IMB_CIPHER_CBC</a> = 1,</div>
+<div class="line"><a id="l00263" name="l00263"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca5b4126e439eaff0975846425594201ea">  263</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca5b4126e439eaff0975846425594201ea">IMB_CIPHER_CNTR</a>,</div>
+<div class="line"><a id="l00264" name="l00264"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0bebd24d7311dedce100455dd3a8ddf6">  264</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0bebd24d7311dedce100455dd3a8ddf6">IMB_CIPHER_NULL</a>,</div>
+<div class="line"><a id="l00265" name="l00265"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caed8ba68d7d2d7602407f17305d1d99b7">  265</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caed8ba68d7d2d7602407f17305d1d99b7">IMB_CIPHER_DOCSIS_SEC_BPI</a>,</div>
+<div class="line"><a id="l00266" name="l00266"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0f97344e525fef167a92d1a59a0492aa">  266</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0f97344e525fef167a92d1a59a0492aa">IMB_CIPHER_GCM</a>,</div>
+<div class="line"><a id="l00267" name="l00267"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca4301726c71a4faf412a1a011cc4f0df8">  267</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca4301726c71a4faf412a1a011cc4f0df8">IMB_CIPHER_CUSTOM</a>,</div>
+<div class="line"><a id="l00268" name="l00268"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca049e85047492494fac0a4ec785707851">  268</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca049e85047492494fac0a4ec785707851">IMB_CIPHER_DES</a>,</div>
+<div class="line"><a id="l00269" name="l00269"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caf9d62e1ff3a1a8b2ed1dcc515a3ffe1b">  269</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caf9d62e1ff3a1a8b2ed1dcc515a3ffe1b">IMB_CIPHER_DOCSIS_DES</a>,</div>
+<div class="line"><a id="l00270" name="l00270"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca7d3946d77e4364bc45a9e72499bf817f">  270</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca7d3946d77e4364bc45a9e72499bf817f">IMB_CIPHER_CCM</a>,</div>
+<div class="line"><a id="l00271" name="l00271"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca639b1382de364a2b810f7876189bc64f">  271</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca639b1382de364a2b810f7876189bc64f">IMB_CIPHER_DES3</a>,</div>
+<div class="line"><a id="l00272" name="l00272"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca896285cd2fe56f73011b908e490cbbea">  272</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca896285cd2fe56f73011b908e490cbbea">IMB_CIPHER_PON_AES_CNTR</a>,</div>
+<div class="line"><a id="l00273" name="l00273"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca357dec895f8dfa3371add1feaa001f56">  273</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca357dec895f8dfa3371add1feaa001f56">IMB_CIPHER_ECB</a>,</div>
+<div class="line"><a id="l00274" name="l00274"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca6f69815480531651948b5549fa84023a">  274</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca6f69815480531651948b5549fa84023a">IMB_CIPHER_CNTR_BITLEN</a>,       </div>
+<div class="line"><a id="l00275" name="l00275"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3618bfaab3c19aabc8a93a03ae121efc">  275</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3618bfaab3c19aabc8a93a03ae121efc">IMB_CIPHER_ZUC_EEA3</a>,          </div>
+<div class="line"><a id="l00276" name="l00276"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca88c3ff9a6816b3629dc5b4815b47607e">  276</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca88c3ff9a6816b3629dc5b4815b47607e">IMB_CIPHER_SNOW3G_UEA2_BITLEN</a>,</div>
+<div class="line"><a id="l00277" name="l00277"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3f7a3edb272955efea015c5bb8572e3b">  277</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3f7a3edb272955efea015c5bb8572e3b">IMB_CIPHER_KASUMI_UEA1_BITLEN</a>,</div>
+<div class="line"><a id="l00278" name="l00278"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca71d87659793f7377d1d8b3315a3559f8">  278</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca71d87659793f7377d1d8b3315a3559f8">IMB_CIPHER_CBCS_1_9</a>,          </div>
+<div class="line"><a id="l00279" name="l00279"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca39d8d7ebca424a1c1a65bc04b5f64741">  279</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca39d8d7ebca424a1c1a65bc04b5f64741">IMB_CIPHER_CHACHA20</a>,</div>
+<div class="line"><a id="l00280" name="l00280"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caa5c375f97dce274a2446c8abf90aa61a">  280</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caa5c375f97dce274a2446c8abf90aa61a">IMB_CIPHER_CHACHA20_POLY1305</a>, </div>
+<div class="line"><a id="l00281" name="l00281"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca40926d8b731a401ec3e86ffa2089a1eb">  281</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca40926d8b731a401ec3e86ffa2089a1eb">IMB_CIPHER_CHACHA20_POLY1305_SGL</a>, </div>
+<div class="line"><a id="l00282" name="l00282"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cafea56410df85a0b006963e50fba78465">  282</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cafea56410df85a0b006963e50fba78465">IMB_CIPHER_SNOW_V</a>,</div>
+<div class="line"><a id="l00283" name="l00283"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cada26994f8467300f862dbf45b5a22409">  283</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cada26994f8467300f862dbf45b5a22409">IMB_CIPHER_SNOW_V_AEAD</a>,</div>
+<div class="line"><a id="l00284" name="l00284"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca48e024bc875c46b714b19a1c19908918">  284</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca48e024bc875c46b714b19a1c19908918">IMB_CIPHER_GCM_SGL</a>,</div>
+<div class="line"><a id="l00285" name="l00285"></a><span class="lineno">  285</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca78c470d405fb36037e41224b99d23c75">IMB_CIPHER_NUM</a></div>
+<div class="line"><a id="l00286" name="l00286"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca78c470d405fb36037e41224b99d23c75">  286</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334c">IMB_CIPHER_MODE</a>;</div>
 <div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span> </div>
-<div class="line"><a id="l00288" name="l00288"></a><span class="lineno">  288</span><span class="comment">/* Previous chain order enums */</span></div>
-<div class="line"><a id="l00289" name="l00289"></a><span class="lineno">  289</span><span class="preprocessor">#define HASH_CIPHER             IMB_ORDER_HASH_CIPHER</span></div>
-<div class="line"><a id="l00290" name="l00290"></a><span class="lineno">  290</span><span class="preprocessor">#define CIPHER_HASH             IMB_ORDER_CIPHER_HASH</span></div>
-<div class="line"><a id="l00291" name="l00291"></a><span class="lineno">  291</span> </div>
-<div class="line"><a id="l00292" name="l00292"></a><span class="lineno">  292</span><span class="comment">/* Previous key size enums */</span></div>
-<div class="line"><a id="l00293" name="l00293"></a><span class="lineno">  293</span><span class="preprocessor">#define AES_128_BYTES           IMB_KEY_128_BYTES</span></div>
-<div class="line"><a id="l00294" name="l00294"></a><span class="lineno">  294</span><span class="preprocessor">#define AES_192_BYTES           IMB_KEY_192_BYTES</span></div>
-<div class="line"><a id="l00295" name="l00295"></a><span class="lineno">  295</span><span class="preprocessor">#define AES_256_BYTES           IMB_KEY_256_BYTES</span></div>
-<div class="line"><a id="l00296" name="l00296"></a><span class="lineno">  296</span><span class="preprocessor">#define IMB_KEY_AES_128_BYTES   IMB_KEY_128_BYTES</span></div>
-<div class="line"><a id="l00297" name="l00297"></a><span class="lineno">  297</span><span class="preprocessor">#define IMB_KEY_AES_192_BYTES   IMB_KEY_192_BYTES</span></div>
-<div class="line"><a id="l00298" name="l00298"></a><span class="lineno">  298</span><span class="preprocessor">#define IMB_KEY_AES_256_BYTES   IMB_KEY_256_BYTES</span></div>
-<div class="line"><a id="l00299" name="l00299"></a><span class="lineno">  299</span><span class="preprocessor">#define AES_KEY_SIZE_BYTES      IMB_KEY_SIZE_BYTES</span></div>
-<div class="line"><a id="l00300" name="l00300"></a><span class="lineno">  300</span> </div>
-<div class="line"><a id="l00301" name="l00301"></a><span class="lineno">  301</span><span class="preprocessor">#define MB_MGR                  IMB_MGR</span></div>
-<div class="line"><a id="l00302" name="l00302"></a><span class="lineno">  302</span><span class="preprocessor">#define JOB_AES_HMAC            IMB_JOB</span></div>
-<div class="line"><a id="l00303" name="l00303"></a><span class="lineno">  303</span><span class="preprocessor">#define JOB_STS                 IMB_STATUS</span></div>
-<div class="line"><a id="l00304" name="l00304"></a><span class="lineno">  304</span><span class="preprocessor">#define IMB_JOB_STS             IMB_STATUS</span></div>
-<div class="line"><a id="l00305" name="l00305"></a><span class="lineno">  305</span><span class="preprocessor">#define JOB_CIPHER_MODE         IMB_CIPHER_MODE</span></div>
-<div class="line"><a id="l00306" name="l00306"></a><span class="lineno">  306</span><span class="preprocessor">#define JOB_CIPHER_DIRECTION    IMB_CIPHER_DIRECTION</span></div>
-<div class="line"><a id="l00307" name="l00307"></a><span class="lineno">  307</span><span class="preprocessor">#define JOB_HASH_ALG            IMB_HASH_ALG</span></div>
-<div class="line"><a id="l00308" name="l00308"></a><span class="lineno">  308</span><span class="preprocessor">#define JOB_CHAIN_ORDER         IMB_CHAIN_ORDER</span></div>
-<div class="line"><a id="l00309" name="l00309"></a><span class="lineno">  309</span><span class="preprocessor">#define MAX_JOBS                IMB_MAX_JOBS</span></div>
-<div class="line"><a id="l00310" name="l00310"></a><span class="lineno">  310</span> </div>
-<div class="line"><a id="l00311" name="l00311"></a><span class="lineno">  311</span><span class="preprocessor">#define STS_BEING_PROCESSED     IMB_STATUS_BEING_PROCESSED</span></div>
-<div class="line"><a id="l00312" name="l00312"></a><span class="lineno">  312</span><span class="preprocessor">#define STS_COMPLETED_AES       IMB_STATUS_COMPLETED_CIPHER</span></div>
-<div class="line"><a id="l00313" name="l00313"></a><span class="lineno">  313</span><span class="preprocessor">#define STS_COMPLETED_HMAC      IMB_STATUS_COMPLETED_AUTH</span></div>
-<div class="line"><a id="l00314" name="l00314"></a><span class="lineno">  314</span><span class="preprocessor">#define STS_COMPLETED           IMB_STATUS_COMPLETED</span></div>
-<div class="line"><a id="l00315" name="l00315"></a><span class="lineno">  315</span><span class="preprocessor">#define STS_INVALID_ARGS        IMB_STATUS_INVALID_ARGS</span></div>
-<div class="line"><a id="l00316" name="l00316"></a><span class="lineno">  316</span><span class="preprocessor">#define STS_INTERNAL_ERROR      IMB_STATUS_INTERNAL_ERROR</span></div>
-<div class="line"><a id="l00317" name="l00317"></a><span class="lineno">  317</span><span class="preprocessor">#define STS_ERROR               IMB_STATUS_ERROR</span></div>
-<div class="line"><a id="l00318" name="l00318"></a><span class="lineno">  318</span> </div>
-<div class="line"><a id="l00319" name="l00319"></a><span class="lineno">  319</span><span class="preprocessor">#define MAX_TAG_LEN             IMB_MAX_TAG_LEN</span></div>
-<div class="line"><a id="l00320" name="l00320"></a><span class="lineno">  320</span><span class="preprocessor">#define GCM_IV_DATA_LEN         IMB_GCM_IV_DATA_LEN</span></div>
-<div class="line"><a id="l00321" name="l00321"></a><span class="lineno">  321</span><span class="preprocessor">#define GCM_128_KEY_LEN         IMB_GCM_128_KEY_LEN</span></div>
-<div class="line"><a id="l00322" name="l00322"></a><span class="lineno">  322</span><span class="preprocessor">#define GCM_192_KEY_LEN         IMB_GCM_192_KEY_LEN</span></div>
-<div class="line"><a id="l00323" name="l00323"></a><span class="lineno">  323</span><span class="preprocessor">#define GCM_256_KEY_LEN         IMB_GCM_256_KEY_LEN</span></div>
-<div class="line"><a id="l00324" name="l00324"></a><span class="lineno">  324</span> </div>
-<div class="line"><a id="l00325" name="l00325"></a><span class="lineno">  325</span><span class="preprocessor">#define DES_KEY_SCHED_SIZE      IMB_DES_KEY_SCHED_SIZE</span></div>
-<div class="line"><a id="l00326" name="l00326"></a><span class="lineno">  326</span><span class="preprocessor">#define DES_BLOCK_SIZE          IMB_DES_BLOCK_SIZE</span></div>
-<div class="line"><a id="l00327" name="l00327"></a><span class="lineno">  327</span> </div>
-<div class="line"><a id="l00328" name="l00328"></a><span class="lineno">  328</span><span class="preprocessor">#define AES_BLOCK_SIZE          IMB_AES_BLOCK_SIZE</span></div>
-<div class="line"><a id="l00329" name="l00329"></a><span class="lineno">  329</span> </div>
-<div class="line"><a id="l00330" name="l00330"></a><span class="lineno">  330</span><span class="preprocessor">#define SHA1_DIGEST_SIZE_IN_BYTES   IMB_SHA1_DIGEST_SIZE_IN_BYTES</span></div>
-<div class="line"><a id="l00331" name="l00331"></a><span class="lineno">  331</span><span class="preprocessor">#define SHA224_DIGEST_SIZE_IN_BYTES IMB_SHA224_DIGEST_SIZE_IN_BYTES</span></div>
-<div class="line"><a id="l00332" name="l00332"></a><span class="lineno">  332</span><span class="preprocessor">#define SHA256_DIGEST_SIZE_IN_BYTES IMB_SHA256_DIGEST_SIZE_IN_BYTES</span></div>
-<div class="line"><a id="l00333" name="l00333"></a><span class="lineno">  333</span><span class="preprocessor">#define SHA384_DIGEST_SIZE_IN_BYTES IMB_SHA384_DIGEST_SIZE_IN_BYTES</span></div>
-<div class="line"><a id="l00334" name="l00334"></a><span class="lineno">  334</span><span class="preprocessor">#define SHA512_DIGEST_SIZE_IN_BYTES IMB_SHA512_DIGEST_SIZE_IN_BYTES</span></div>
-<div class="line"><a id="l00335" name="l00335"></a><span class="lineno">  335</span> </div>
-<div class="line"><a id="l00336" name="l00336"></a><span class="lineno">  336</span><span class="preprocessor">#define SHA1_BLOCK_SIZE    IMB_SHA1_BLOCK_SIZE</span></div>
-<div class="line"><a id="l00337" name="l00337"></a><span class="lineno">  337</span><span class="preprocessor">#define SHA_256_BLOCK_SIZE IMB_SHA_256_BLOCK_SIZE</span></div>
-<div class="line"><a id="l00338" name="l00338"></a><span class="lineno">  338</span><span class="preprocessor">#define SHA_384_BLOCK_SIZE IMB_SHA_384_BLOCK_SIZE</span></div>
-<div class="line"><a id="l00339" name="l00339"></a><span class="lineno">  339</span><span class="preprocessor">#define SHA_512_BLOCK_SIZE IMB_SHA_512_BLOCK_SIZE</span></div>
-<div class="line"><a id="l00340" name="l00340"></a><span class="lineno">  340</span> </div>
-<div class="line"><a id="l00341" name="l00341"></a><span class="lineno">  341</span><span class="preprocessor">#define KASUMI_KEY_SIZE    IMB_KASUMI_KEY_SIZE</span></div>
-<div class="line"><a id="l00342" name="l00342"></a><span class="lineno">  342</span><span class="preprocessor">#define KASUMI_IV_SIZE     IMB_KASUMI_IV_SIZE</span></div>
-<div class="line"><a id="l00343" name="l00343"></a><span class="lineno">  343</span><span class="preprocessor">#define KASUMI_BLOCK_SIZE  IMB_KASUMI_BLOCK_SIZE</span></div>
-<div class="line"><a id="l00344" name="l00344"></a><span class="lineno">  344</span><span class="preprocessor">#define KASUMI_DIGEST_SIZE IMB_KASUMI_DIGEST_SIZE</span></div>
-<div class="line"><a id="l00345" name="l00345"></a><span class="lineno">  345</span> </div>
-<div class="line"><a id="l00346" name="l00346"></a><span class="lineno">  346</span><span class="preprocessor">#define DOCSIS_CRC32_MIN_ETH_PDU_SIZE IMB_DOCSIS_CRC32_MIN_ETH_PDU_SIZE</span></div>
-<div class="line"><a id="l00347" name="l00347"></a><span class="lineno">  347</span><span class="preprocessor">#define DOCSIS_CRC32_TAG_SIZE         IMB_DOCSIS_CRC32_TAG_SIZE</span></div>
-<div class="line"><a id="l00348" name="l00348"></a><span class="lineno">  348</span> </div>
-<div class="line"><a id="l00349" name="l00349"></a><span class="lineno">  349</span><span class="comment">/* Previous fields in IMB_JOB/JOB_AES_HMAC */</span></div>
-<div class="line"><a id="l00350" name="l00350"></a><span class="lineno">  350</span><span class="preprocessor">#define aes_enc_key_expanded enc_keys</span></div>
-<div class="line"><a id="l00351" name="l00351"></a><span class="lineno">  351</span><span class="preprocessor">#define aes_dec_key_expanded dec_keys</span></div>
-<div class="line"><a id="l00352" name="l00352"></a><span class="lineno">  352</span><span class="preprocessor">#define aes_key_len_in_bytes key_len_in_bytes</span></div>
-<div class="line"><a id="l00353" name="l00353"></a><span class="lineno">  353</span><span class="preprocessor">#endif </span><span class="comment">/* !NO_COMPAT_IMB_API_053 */</span><span class="preprocessor"></span></div>
+<div class="line"><a id="l00288" name="l00288"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">  288</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
+<div class="line"><a id="l00289" name="l00289"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eeabed12e936823e8f8b2de70388a2d15ce">  289</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eeabed12e936823e8f8b2de70388a2d15ce">IMB_DIR_ENCRYPT</a> = 1,</div>
+<div class="line"><a id="l00290" name="l00290"></a><span class="lineno">  290</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eea881652011955c227d94a881d2d2c5c59">IMB_DIR_DECRYPT</a></div>
+<div class="line"><a id="l00291" name="l00291"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eea881652011955c227d94a881d2d2c5c59">  291</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">IMB_CIPHER_DIRECTION</a>;</div>
+<div class="line"><a id="l00292" name="l00292"></a><span class="lineno">  292</span> </div>
+<div class="line"><a id="l00293" name="l00293"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">  293</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
+<div class="line"><a id="l00294" name="l00294"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58">  294</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58">IMB_AUTH_HMAC_SHA_1</a> = 1,    </div>
+<div class="line"><a id="l00295" name="l00295"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca">  295</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca">IMB_AUTH_HMAC_SHA_224</a>,      </div>
+<div class="line"><a id="l00296" name="l00296"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995">  296</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995">IMB_AUTH_HMAC_SHA_256</a>,      </div>
+<div class="line"><a id="l00297" name="l00297"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9">  297</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9">IMB_AUTH_HMAC_SHA_384</a>,      </div>
+<div class="line"><a id="l00298" name="l00298"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1">  298</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1">IMB_AUTH_HMAC_SHA_512</a>,      </div>
+<div class="line"><a id="l00299" name="l00299"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a17deb61684701b7ec37f68bd34b6d454">  299</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a17deb61684701b7ec37f68bd34b6d454">IMB_AUTH_AES_XCBC</a>,</div>
+<div class="line"><a id="l00300" name="l00300"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe">  300</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe">IMB_AUTH_MD5</a>,               </div>
+<div class="line"><a id="l00301" name="l00301"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a25f47297460775ab891a0abb8240b8e0">  301</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a25f47297460775ab891a0abb8240b8e0">IMB_AUTH_NULL</a>,</div>
+<div class="line"><a id="l00302" name="l00302"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa1496e45f00afe54aeeb527089e14a0d">  302</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa1496e45f00afe54aeeb527089e14a0d">IMB_AUTH_AES_GMAC</a>,</div>
+<div class="line"><a id="l00303" name="l00303"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a70151af8840242c8f5bdb375f2f1135b">  303</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a70151af8840242c8f5bdb375f2f1135b">IMB_AUTH_CUSTOM</a>,</div>
+<div class="line"><a id="l00304" name="l00304"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e">  304</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e">IMB_AUTH_AES_CCM</a>,            </div>
+<div class="line"><a id="l00305" name="l00305"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48">  305</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48">IMB_AUTH_AES_CMAC</a>,           </div>
+<div class="line"><a id="l00306" name="l00306"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77">  306</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77">IMB_AUTH_SHA_1</a>,              </div>
+<div class="line"><a id="l00307" name="l00307"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325">  307</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325">IMB_AUTH_SHA_224</a>,            </div>
+<div class="line"><a id="l00308" name="l00308"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88">  308</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88">IMB_AUTH_SHA_256</a>,            </div>
+<div class="line"><a id="l00309" name="l00309"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc">  309</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc">IMB_AUTH_SHA_384</a>,            </div>
+<div class="line"><a id="l00310" name="l00310"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d">  310</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d">IMB_AUTH_SHA_512</a>,            </div>
+<div class="line"><a id="l00311" name="l00311"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83">  311</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83">IMB_AUTH_AES_CMAC_BITLEN</a>,    </div>
+<div class="line"><a id="l00312" name="l00312"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a2fcc080535b4dd16502ecd2b01c14048">  312</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a2fcc080535b4dd16502ecd2b01c14048">IMB_AUTH_PON_CRC_BIP</a>,</div>
+<div class="line"><a id="l00313" name="l00313"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b">  313</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b">IMB_AUTH_ZUC_EIA3_BITLEN</a>,    </div>
+<div class="line"><a id="l00314" name="l00314"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc">  314</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc">IMB_AUTH_DOCSIS_CRC32</a>,       </div>
+<div class="line"><a id="l00315" name="l00315"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b">  315</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b">IMB_AUTH_SNOW3G_UIA2_BITLEN</a>, </div>
+<div class="line"><a id="l00316" name="l00316"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a">  316</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a">IMB_AUTH_KASUMI_UIA1</a>,        </div>
+<div class="line"><a id="l00317" name="l00317"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0">  317</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0">IMB_AUTH_AES_GMAC_128</a>,       </div>
+<div class="line"><a id="l00318" name="l00318"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66">  318</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66">IMB_AUTH_AES_GMAC_192</a>,       </div>
+<div class="line"><a id="l00319" name="l00319"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af">  319</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af">IMB_AUTH_AES_GMAC_256</a>,       </div>
+<div class="line"><a id="l00320" name="l00320"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205">  320</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205">IMB_AUTH_AES_CMAC_256</a>,       </div>
+<div class="line"><a id="l00321" name="l00321"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a93e6c082f7ec5926a087d139a2bd2e56">  321</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a93e6c082f7ec5926a087d139a2bd2e56">IMB_AUTH_POLY1305</a>,           </div>
+<div class="line"><a id="l00322" name="l00322"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab737fa5ff7244ddf5024905f6477ae01">  322</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab737fa5ff7244ddf5024905f6477ae01">IMB_AUTH_CHACHA20_POLY1305</a>,  </div>
+<div class="line"><a id="l00323" name="l00323"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a71119edfbe668d423e910b11c0efb712">  323</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a71119edfbe668d423e910b11c0efb712">IMB_AUTH_CHACHA20_POLY1305_SGL</a>, </div>
+<div class="line"><a id="l00324" name="l00324"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a7c535075abfb0878168a00600a762fe0">  324</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a7c535075abfb0878168a00600a762fe0">IMB_AUTH_ZUC256_EIA3_BITLEN</a>,    </div>
+<div class="line"><a id="l00325" name="l00325"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff331c62b01fb8427e63e18fc433f6">  325</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff331c62b01fb8427e63e18fc433f6">IMB_AUTH_SNOW_V_AEAD</a>,           </div>
+<div class="line"><a id="l00326" name="l00326"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ada7d3fc165b6855ae3e83467de9916b2">  326</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ada7d3fc165b6855ae3e83467de9916b2">IMB_AUTH_GCM_SGL</a>,               </div>
+<div class="line"><a id="l00327" name="l00327"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a421294f9a35f87e796f96b48257e6dc2">  327</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a421294f9a35f87e796f96b48257e6dc2">IMB_AUTH_CRC32_ETHERNET_FCS</a>,    </div>
+<div class="line"><a id="l00328" name="l00328"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff8b335b5391fc33c80c076590de44">  328</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff8b335b5391fc33c80c076590de44">IMB_AUTH_CRC32_SCTP</a>,            </div>
+<div class="line"><a id="l00329" name="l00329"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad3936131d6804e6c6aa3bd497ae675ab">  329</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad3936131d6804e6c6aa3bd497ae675ab">IMB_AUTH_CRC32_WIMAX_OFDMA_DATA</a>,</div>
+<div class="line"><a id="l00330" name="l00330"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3a8aa07fe9f70ece22f9351db0f8bb31">  330</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3a8aa07fe9f70ece22f9351db0f8bb31">IMB_AUTH_CRC24_LTE_A</a>,           </div>
+<div class="line"><a id="l00331" name="l00331"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a77ccdf9abd97310f6808c8cf12c1a395">  331</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a77ccdf9abd97310f6808c8cf12c1a395">IMB_AUTH_CRC24_LTE_B</a>,           </div>
+<div class="line"><a id="l00332" name="l00332"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a22e2e766cbec475508af01c6a722c2c3">  332</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a22e2e766cbec475508af01c6a722c2c3">IMB_AUTH_CRC16_X25</a>,             </div>
+<div class="line"><a id="l00333" name="l00333"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa78e695260f8fe6bb56d242771624ccc">  333</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa78e695260f8fe6bb56d242771624ccc">IMB_AUTH_CRC16_FP_DATA</a>,         </div>
+<div class="line"><a id="l00334" name="l00334"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab0f02ac14a03f137a83bb7d6dff539fc">  334</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab0f02ac14a03f137a83bb7d6dff539fc">IMB_AUTH_CRC11_FP_HEADER</a>,       </div>
+<div class="line"><a id="l00335" name="l00335"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ac27de87b2687b1e2a293544be6d3fab9">  335</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ac27de87b2687b1e2a293544be6d3fab9">IMB_AUTH_CRC10_IUUP_DATA</a>,       </div>
+<div class="line"><a id="l00336" name="l00336"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae62fe411b683840a5f25c199b66c7f42">  336</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae62fe411b683840a5f25c199b66c7f42">IMB_AUTH_CRC8_WIMAX_OFDMA_HCS</a>,  </div>
+<div class="line"><a id="l00337" name="l00337"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab7f1372ade9da040caf195b13f2b79f0">  337</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab7f1372ade9da040caf195b13f2b79f0">IMB_AUTH_CRC7_FP_HEADER</a>,        </div>
+<div class="line"><a id="l00338" name="l00338"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a88175070e077037332ad5cd5fdece46f">  338</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a88175070e077037332ad5cd5fdece46f">IMB_AUTH_CRC6_IUUP_HEADER</a>,      </div>
+<div class="line"><a id="l00339" name="l00339"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a67297eacd4913bd65a1aae650c3a22e3">  339</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a67297eacd4913bd65a1aae650c3a22e3">IMB_AUTH_GHASH</a>,                 </div>
+<div class="line"><a id="l00340" name="l00340"></a><span class="lineno">  340</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a5d34120f8a1c5cde857baf32536868af">IMB_AUTH_NUM</a></div>
+<div class="line"><a id="l00341" name="l00341"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a5d34120f8a1c5cde857baf32536868af">  341</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">IMB_HASH_ALG</a>;</div>
+<div class="line"><a id="l00342" name="l00342"></a><span class="lineno">  342</span> </div>
+<div class="line"><a id="l00343" name="l00343"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5">  343</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
+<div class="line"><a id="l00344" name="l00344"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5e3ab845752ce3d16e40ea7802ce4a52">  344</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5e3ab845752ce3d16e40ea7802ce4a52">IMB_ORDER_CIPHER_HASH</a> = 1,</div>
+<div class="line"><a id="l00345" name="l00345"></a><span class="lineno">  345</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5de8d032616267941d99dad14801044d">IMB_ORDER_HASH_CIPHER</a></div>
+<div class="line"><a id="l00346" name="l00346"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5de8d032616267941d99dad14801044d">  346</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5">IMB_CHAIN_ORDER</a>;</div>
+<div class="line"><a id="l00347" name="l00347"></a><span class="lineno">  347</span> </div>
+<div class="line"><a id="l00348" name="l00348"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">  348</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
+<div class="line"><a id="l00349" name="l00349"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaa1eb9eb83fca5f5dd6578f27733eb390">  349</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaa1eb9eb83fca5f5dd6578f27733eb390">IMB_KEY_64_BYTES</a> = 8,</div>
+<div class="line"><a id="l00350" name="l00350"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaf3e82db9a8b5b1b229c201735938969d">  350</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaf3e82db9a8b5b1b229c201735938969d">IMB_KEY_128_BYTES</a> = 16,</div>
+<div class="line"><a id="l00351" name="l00351"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cca573d62aa6a04d9ce2b3c34e226846598">  351</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cca573d62aa6a04d9ce2b3c34e226846598">IMB_KEY_192_BYTES</a> = 24,</div>
+<div class="line"><a id="l00352" name="l00352"></a><span class="lineno">  352</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccac139e7555c9b30725359698833eb213a">IMB_KEY_256_BYTES</a> = 32</div>
+<div class="line"><a id="l00353" name="l00353"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccac139e7555c9b30725359698833eb213a">  353</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a>;</div>
 <div class="line"><a id="l00354" name="l00354"></a><span class="lineno">  354</span> </div>
-<div class="line"><a id="l00355" name="l00355"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334c">  355</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
-<div class="line"><a id="l00356" name="l00356"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0e2ebfcfd101ab4a39129082b2de517f">  356</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0e2ebfcfd101ab4a39129082b2de517f">IMB_CIPHER_CBC</a> = 1,</div>
-<div class="line"><a id="l00357" name="l00357"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca5b4126e439eaff0975846425594201ea">  357</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca5b4126e439eaff0975846425594201ea">IMB_CIPHER_CNTR</a>,</div>
-<div class="line"><a id="l00358" name="l00358"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0bebd24d7311dedce100455dd3a8ddf6">  358</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0bebd24d7311dedce100455dd3a8ddf6">IMB_CIPHER_NULL</a>,</div>
-<div class="line"><a id="l00359" name="l00359"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caed8ba68d7d2d7602407f17305d1d99b7">  359</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caed8ba68d7d2d7602407f17305d1d99b7">IMB_CIPHER_DOCSIS_SEC_BPI</a>,</div>
-<div class="line"><a id="l00360" name="l00360"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0f97344e525fef167a92d1a59a0492aa">  360</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0f97344e525fef167a92d1a59a0492aa">IMB_CIPHER_GCM</a>,</div>
-<div class="line"><a id="l00361" name="l00361"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca4301726c71a4faf412a1a011cc4f0df8">  361</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca4301726c71a4faf412a1a011cc4f0df8">IMB_CIPHER_CUSTOM</a>,</div>
-<div class="line"><a id="l00362" name="l00362"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca049e85047492494fac0a4ec785707851">  362</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca049e85047492494fac0a4ec785707851">IMB_CIPHER_DES</a>,</div>
-<div class="line"><a id="l00363" name="l00363"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caf9d62e1ff3a1a8b2ed1dcc515a3ffe1b">  363</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caf9d62e1ff3a1a8b2ed1dcc515a3ffe1b">IMB_CIPHER_DOCSIS_DES</a>,</div>
-<div class="line"><a id="l00364" name="l00364"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca7d3946d77e4364bc45a9e72499bf817f">  364</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca7d3946d77e4364bc45a9e72499bf817f">IMB_CIPHER_CCM</a>,</div>
-<div class="line"><a id="l00365" name="l00365"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca639b1382de364a2b810f7876189bc64f">  365</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca639b1382de364a2b810f7876189bc64f">IMB_CIPHER_DES3</a>,</div>
-<div class="line"><a id="l00366" name="l00366"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca896285cd2fe56f73011b908e490cbbea">  366</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca896285cd2fe56f73011b908e490cbbea">IMB_CIPHER_PON_AES_CNTR</a>,</div>
-<div class="line"><a id="l00367" name="l00367"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca357dec895f8dfa3371add1feaa001f56">  367</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca357dec895f8dfa3371add1feaa001f56">IMB_CIPHER_ECB</a>,</div>
-<div class="line"><a id="l00368" name="l00368"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca6f69815480531651948b5549fa84023a">  368</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca6f69815480531651948b5549fa84023a">IMB_CIPHER_CNTR_BITLEN</a>,       </div>
-<div class="line"><a id="l00369" name="l00369"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3618bfaab3c19aabc8a93a03ae121efc">  369</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3618bfaab3c19aabc8a93a03ae121efc">IMB_CIPHER_ZUC_EEA3</a>,          </div>
-<div class="line"><a id="l00370" name="l00370"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca88c3ff9a6816b3629dc5b4815b47607e">  370</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca88c3ff9a6816b3629dc5b4815b47607e">IMB_CIPHER_SNOW3G_UEA2_BITLEN</a>,</div>
-<div class="line"><a id="l00371" name="l00371"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3f7a3edb272955efea015c5bb8572e3b">  371</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3f7a3edb272955efea015c5bb8572e3b">IMB_CIPHER_KASUMI_UEA1_BITLEN</a>,</div>
-<div class="line"><a id="l00372" name="l00372"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca71d87659793f7377d1d8b3315a3559f8">  372</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca71d87659793f7377d1d8b3315a3559f8">IMB_CIPHER_CBCS_1_9</a>,          </div>
-<div class="line"><a id="l00373" name="l00373"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca39d8d7ebca424a1c1a65bc04b5f64741">  373</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca39d8d7ebca424a1c1a65bc04b5f64741">IMB_CIPHER_CHACHA20</a>,</div>
-<div class="line"><a id="l00374" name="l00374"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caa5c375f97dce274a2446c8abf90aa61a">  374</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caa5c375f97dce274a2446c8abf90aa61a">IMB_CIPHER_CHACHA20_POLY1305</a>, </div>
-<div class="line"><a id="l00375" name="l00375"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca40926d8b731a401ec3e86ffa2089a1eb">  375</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca40926d8b731a401ec3e86ffa2089a1eb">IMB_CIPHER_CHACHA20_POLY1305_SGL</a>, </div>
-<div class="line"><a id="l00376" name="l00376"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cafea56410df85a0b006963e50fba78465">  376</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cafea56410df85a0b006963e50fba78465">IMB_CIPHER_SNOW_V</a>,</div>
-<div class="line"><a id="l00377" name="l00377"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cada26994f8467300f862dbf45b5a22409">  377</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cada26994f8467300f862dbf45b5a22409">IMB_CIPHER_SNOW_V_AEAD</a>,</div>
-<div class="line"><a id="l00378" name="l00378"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca48e024bc875c46b714b19a1c19908918">  378</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca48e024bc875c46b714b19a1c19908918">IMB_CIPHER_GCM_SGL</a>,</div>
-<div class="line"><a id="l00379" name="l00379"></a><span class="lineno">  379</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca78c470d405fb36037e41224b99d23c75">IMB_CIPHER_NUM</a></div>
-<div class="line"><a id="l00380" name="l00380"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca78c470d405fb36037e41224b99d23c75">  380</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334c">IMB_CIPHER_MODE</a>;</div>
-<div class="line"><a id="l00381" name="l00381"></a><span class="lineno">  381</span> </div>
-<div class="line"><a id="l00382" name="l00382"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">  382</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
-<div class="line"><a id="l00383" name="l00383"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eeabed12e936823e8f8b2de70388a2d15ce">  383</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eeabed12e936823e8f8b2de70388a2d15ce">IMB_DIR_ENCRYPT</a> = 1,</div>
-<div class="line"><a id="l00384" name="l00384"></a><span class="lineno">  384</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eea881652011955c227d94a881d2d2c5c59">IMB_DIR_DECRYPT</a></div>
-<div class="line"><a id="l00385" name="l00385"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eea881652011955c227d94a881d2d2c5c59">  385</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">IMB_CIPHER_DIRECTION</a>;</div>
-<div class="line"><a id="l00386" name="l00386"></a><span class="lineno">  386</span> </div>
-<div class="line"><a id="l00387" name="l00387"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">  387</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
-<div class="line"><a id="l00388" name="l00388"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58">  388</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58">IMB_AUTH_HMAC_SHA_1</a> = 1,    </div>
-<div class="line"><a id="l00389" name="l00389"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca">  389</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca">IMB_AUTH_HMAC_SHA_224</a>,      </div>
-<div class="line"><a id="l00390" name="l00390"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995">  390</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995">IMB_AUTH_HMAC_SHA_256</a>,      </div>
-<div class="line"><a id="l00391" name="l00391"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9">  391</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9">IMB_AUTH_HMAC_SHA_384</a>,      </div>
-<div class="line"><a id="l00392" name="l00392"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1">  392</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1">IMB_AUTH_HMAC_SHA_512</a>,      </div>
-<div class="line"><a id="l00393" name="l00393"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a17deb61684701b7ec37f68bd34b6d454">  393</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a17deb61684701b7ec37f68bd34b6d454">IMB_AUTH_AES_XCBC</a>,</div>
-<div class="line"><a id="l00394" name="l00394"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe">  394</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe">IMB_AUTH_MD5</a>,               </div>
-<div class="line"><a id="l00395" name="l00395"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a25f47297460775ab891a0abb8240b8e0">  395</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a25f47297460775ab891a0abb8240b8e0">IMB_AUTH_NULL</a>,</div>
-<div class="line"><a id="l00396" name="l00396"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa1496e45f00afe54aeeb527089e14a0d">  396</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa1496e45f00afe54aeeb527089e14a0d">IMB_AUTH_AES_GMAC</a>,</div>
-<div class="line"><a id="l00397" name="l00397"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a70151af8840242c8f5bdb375f2f1135b">  397</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a70151af8840242c8f5bdb375f2f1135b">IMB_AUTH_CUSTOM</a>,</div>
-<div class="line"><a id="l00398" name="l00398"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e">  398</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e">IMB_AUTH_AES_CCM</a>,            </div>
-<div class="line"><a id="l00399" name="l00399"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48">  399</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48">IMB_AUTH_AES_CMAC</a>,           </div>
-<div class="line"><a id="l00400" name="l00400"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77">  400</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77">IMB_AUTH_SHA_1</a>,              </div>
-<div class="line"><a id="l00401" name="l00401"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325">  401</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325">IMB_AUTH_SHA_224</a>,            </div>
-<div class="line"><a id="l00402" name="l00402"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88">  402</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88">IMB_AUTH_SHA_256</a>,            </div>
-<div class="line"><a id="l00403" name="l00403"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc">  403</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc">IMB_AUTH_SHA_384</a>,            </div>
-<div class="line"><a id="l00404" name="l00404"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d">  404</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d">IMB_AUTH_SHA_512</a>,            </div>
-<div class="line"><a id="l00405" name="l00405"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83">  405</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83">IMB_AUTH_AES_CMAC_BITLEN</a>,    </div>
-<div class="line"><a id="l00406" name="l00406"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a2fcc080535b4dd16502ecd2b01c14048">  406</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a2fcc080535b4dd16502ecd2b01c14048">IMB_AUTH_PON_CRC_BIP</a>,</div>
-<div class="line"><a id="l00407" name="l00407"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b">  407</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b">IMB_AUTH_ZUC_EIA3_BITLEN</a>,    </div>
-<div class="line"><a id="l00408" name="l00408"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc">  408</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc">IMB_AUTH_DOCSIS_CRC32</a>,       </div>
-<div class="line"><a id="l00409" name="l00409"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b">  409</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b">IMB_AUTH_SNOW3G_UIA2_BITLEN</a>, </div>
-<div class="line"><a id="l00410" name="l00410"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a">  410</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a">IMB_AUTH_KASUMI_UIA1</a>,        </div>
-<div class="line"><a id="l00411" name="l00411"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0">  411</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0">IMB_AUTH_AES_GMAC_128</a>,       </div>
-<div class="line"><a id="l00412" name="l00412"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66">  412</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66">IMB_AUTH_AES_GMAC_192</a>,       </div>
-<div class="line"><a id="l00413" name="l00413"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af">  413</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af">IMB_AUTH_AES_GMAC_256</a>,       </div>
-<div class="line"><a id="l00414" name="l00414"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205">  414</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205">IMB_AUTH_AES_CMAC_256</a>,       </div>
-<div class="line"><a id="l00415" name="l00415"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a93e6c082f7ec5926a087d139a2bd2e56">  415</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a93e6c082f7ec5926a087d139a2bd2e56">IMB_AUTH_POLY1305</a>,           </div>
-<div class="line"><a id="l00416" name="l00416"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab737fa5ff7244ddf5024905f6477ae01">  416</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab737fa5ff7244ddf5024905f6477ae01">IMB_AUTH_CHACHA20_POLY1305</a>,  </div>
-<div class="line"><a id="l00417" name="l00417"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a71119edfbe668d423e910b11c0efb712">  417</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a71119edfbe668d423e910b11c0efb712">IMB_AUTH_CHACHA20_POLY1305_SGL</a>, </div>
-<div class="line"><a id="l00418" name="l00418"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a7c535075abfb0878168a00600a762fe0">  418</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a7c535075abfb0878168a00600a762fe0">IMB_AUTH_ZUC256_EIA3_BITLEN</a>,    </div>
-<div class="line"><a id="l00419" name="l00419"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff331c62b01fb8427e63e18fc433f6">  419</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff331c62b01fb8427e63e18fc433f6">IMB_AUTH_SNOW_V_AEAD</a>,           </div>
-<div class="line"><a id="l00420" name="l00420"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ada7d3fc165b6855ae3e83467de9916b2">  420</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ada7d3fc165b6855ae3e83467de9916b2">IMB_AUTH_GCM_SGL</a>,               </div>
-<div class="line"><a id="l00421" name="l00421"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a421294f9a35f87e796f96b48257e6dc2">  421</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a421294f9a35f87e796f96b48257e6dc2">IMB_AUTH_CRC32_ETHERNET_FCS</a>,    </div>
-<div class="line"><a id="l00422" name="l00422"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff8b335b5391fc33c80c076590de44">  422</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff8b335b5391fc33c80c076590de44">IMB_AUTH_CRC32_SCTP</a>,            </div>
-<div class="line"><a id="l00423" name="l00423"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad3936131d6804e6c6aa3bd497ae675ab">  423</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad3936131d6804e6c6aa3bd497ae675ab">IMB_AUTH_CRC32_WIMAX_OFDMA_DATA</a>,</div>
-<div class="line"><a id="l00424" name="l00424"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3a8aa07fe9f70ece22f9351db0f8bb31">  424</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3a8aa07fe9f70ece22f9351db0f8bb31">IMB_AUTH_CRC24_LTE_A</a>,           </div>
-<div class="line"><a id="l00425" name="l00425"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a77ccdf9abd97310f6808c8cf12c1a395">  425</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a77ccdf9abd97310f6808c8cf12c1a395">IMB_AUTH_CRC24_LTE_B</a>,           </div>
-<div class="line"><a id="l00426" name="l00426"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a22e2e766cbec475508af01c6a722c2c3">  426</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a22e2e766cbec475508af01c6a722c2c3">IMB_AUTH_CRC16_X25</a>,             </div>
-<div class="line"><a id="l00427" name="l00427"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa78e695260f8fe6bb56d242771624ccc">  427</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa78e695260f8fe6bb56d242771624ccc">IMB_AUTH_CRC16_FP_DATA</a>,         </div>
-<div class="line"><a id="l00428" name="l00428"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab0f02ac14a03f137a83bb7d6dff539fc">  428</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab0f02ac14a03f137a83bb7d6dff539fc">IMB_AUTH_CRC11_FP_HEADER</a>,       </div>
-<div class="line"><a id="l00429" name="l00429"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ac27de87b2687b1e2a293544be6d3fab9">  429</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ac27de87b2687b1e2a293544be6d3fab9">IMB_AUTH_CRC10_IUUP_DATA</a>,       </div>
-<div class="line"><a id="l00430" name="l00430"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae62fe411b683840a5f25c199b66c7f42">  430</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae62fe411b683840a5f25c199b66c7f42">IMB_AUTH_CRC8_WIMAX_OFDMA_HCS</a>,  </div>
-<div class="line"><a id="l00431" name="l00431"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab7f1372ade9da040caf195b13f2b79f0">  431</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab7f1372ade9da040caf195b13f2b79f0">IMB_AUTH_CRC7_FP_HEADER</a>,        </div>
-<div class="line"><a id="l00432" name="l00432"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a88175070e077037332ad5cd5fdece46f">  432</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a88175070e077037332ad5cd5fdece46f">IMB_AUTH_CRC6_IUUP_HEADER</a>,      </div>
-<div class="line"><a id="l00433" name="l00433"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a67297eacd4913bd65a1aae650c3a22e3">  433</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a67297eacd4913bd65a1aae650c3a22e3">IMB_AUTH_GHASH</a>,                 </div>
-<div class="line"><a id="l00434" name="l00434"></a><span class="lineno">  434</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a5d34120f8a1c5cde857baf32536868af">IMB_AUTH_NUM</a></div>
-<div class="line"><a id="l00435" name="l00435"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a5d34120f8a1c5cde857baf32536868af">  435</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">IMB_HASH_ALG</a>;</div>
-<div class="line"><a id="l00436" name="l00436"></a><span class="lineno">  436</span> </div>
-<div class="line"><a id="l00437" name="l00437"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5">  437</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
-<div class="line"><a id="l00438" name="l00438"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5e3ab845752ce3d16e40ea7802ce4a52">  438</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5e3ab845752ce3d16e40ea7802ce4a52">IMB_ORDER_CIPHER_HASH</a> = 1,</div>
-<div class="line"><a id="l00439" name="l00439"></a><span class="lineno">  439</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5de8d032616267941d99dad14801044d">IMB_ORDER_HASH_CIPHER</a></div>
-<div class="line"><a id="l00440" name="l00440"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5de8d032616267941d99dad14801044d">  440</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5">IMB_CHAIN_ORDER</a>;</div>
-<div class="line"><a id="l00441" name="l00441"></a><span class="lineno">  441</span> </div>
-<div class="line"><a id="l00442" name="l00442"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">  442</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
-<div class="line"><a id="l00443" name="l00443"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaf3e82db9a8b5b1b229c201735938969d">  443</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaf3e82db9a8b5b1b229c201735938969d">IMB_KEY_128_BYTES</a> = 16,</div>
-<div class="line"><a id="l00444" name="l00444"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cca573d62aa6a04d9ce2b3c34e226846598">  444</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cca573d62aa6a04d9ce2b3c34e226846598">IMB_KEY_192_BYTES</a> = 24,</div>
-<div class="line"><a id="l00445" name="l00445"></a><span class="lineno">  445</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccac139e7555c9b30725359698833eb213a">IMB_KEY_256_BYTES</a> = 32</div>
-<div class="line"><a id="l00446" name="l00446"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccac139e7555c9b30725359698833eb213a">  446</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a>;</div>
-<div class="line"><a id="l00447" name="l00447"></a><span class="lineno">  447</span> </div>
-<div class="line"><a id="l00448" name="l00448"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3d">  448</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
-<div class="line"><a id="l00449" name="l00449"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3daf6e77a48759ab366cc1160725ff4261e">  449</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3daf6e77a48759ab366cc1160725ff4261e">IMB_SGL_INIT</a> = 0,</div>
-<div class="line"><a id="l00450" name="l00450"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da15c5d0aeeb9d5eb4e4c4878c837c5977">  450</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da15c5d0aeeb9d5eb4e4c4878c837c5977">IMB_SGL_UPDATE</a>,</div>
-<div class="line"><a id="l00451" name="l00451"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3dab7a602903c0fbaad7ffb893cb2547975">  451</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3dab7a602903c0fbaad7ffb893cb2547975">IMB_SGL_COMPLETE</a>,</div>
-<div class="line"><a id="l00452" name="l00452"></a><span class="lineno">  452</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da2f0678ab7ad9bb30c040e0b3ee2fa408">IMB_SGL_ALL</a></div>
-<div class="line"><a id="l00453" name="l00453"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da2f0678ab7ad9bb30c040e0b3ee2fa408">  453</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3d">IMB_SGL_STATE</a>;</div>
-<div class="line"><a id="l00454" name="l00454"></a><span class="lineno">  454</span> </div>
-<div class="line"><a id="l00458" name="l00458"></a><span class="lineno"><a class="line" href="structIMB__SGL__IOV.html">  458</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structIMB__SGL__IOV.html">IMB_SGL_IOV</a> {</div>
-<div class="line"><a id="l00459" name="l00459"></a><span class="lineno"><a class="line" href="structIMB__SGL__IOV.html#a56c5b0a033d949869cee2d03f1df3129">  459</a></span>    <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__SGL__IOV.html#a56c5b0a033d949869cee2d03f1df3129">in</a>; </div>
-<div class="line"><a id="l00460" name="l00460"></a><span class="lineno"><a class="line" href="structIMB__SGL__IOV.html#a54b8da76fb8a400f9f7972bdd97f6f53">  460</a></span>    <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__SGL__IOV.html#a54b8da76fb8a400f9f7972bdd97f6f53">out</a>; </div>
-<div class="line"><a id="l00461" name="l00461"></a><span class="lineno"><a class="line" href="structIMB__SGL__IOV.html#a3a3662456b91011eb0585667492acc88">  461</a></span>    uint64_t <a class="code hl_variable" href="structIMB__SGL__IOV.html#a3a3662456b91011eb0585667492acc88">len</a>; </div>
-<div class="line"><a id="l00462" name="l00462"></a><span class="lineno">  462</span>};</div>
-<div class="line"><a id="l00463" name="l00463"></a><span class="lineno">  463</span> </div>
-<div class="line"><a id="l00483" name="l00483"></a><span class="lineno"><a class="line" href="structIMB__JOB.html">  483</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> {</div>
-<div class="line"><a id="l00484" name="l00484"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ac656e2d98f36bd5547cc9fa297c1de62">  484</a></span>        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#ac656e2d98f36bd5547cc9fa297c1de62">enc_keys</a>;  </div>
-<div class="line"><a id="l00485" name="l00485"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#af78a3df5a9f79f329c8d1095b9ecea05">  485</a></span>        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#af78a3df5a9f79f329c8d1095b9ecea05">dec_keys</a>;  </div>
-<div class="line"><a id="l00486" name="l00486"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#abdd8a58a37e8d2daa1c2d333b826a65c">  486</a></span>        uint64_t <a class="code hl_variable" href="structIMB__JOB.html#abdd8a58a37e8d2daa1c2d333b826a65c">key_len_in_bytes</a>; </div>
-<div class="line"><a id="l00487" name="l00487"></a><span class="lineno">  487</span>        <span class="keyword">union </span>{</div>
-<div class="line"><a id="l00488" name="l00488"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#af83d63eb71a4f26b4915562bea554f28">  488</a></span>                <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#af83d63eb71a4f26b4915562bea554f28">src</a>; </div>
-<div class="line"><a id="l00491" name="l00491"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a2462f9efb16c31ae615df7493dddb343">  491</a></span>                <span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__SGL__IOV.html">IMB_SGL_IOV</a> *<a class="code hl_variable" href="structIMB__JOB.html#a2462f9efb16c31ae615df7493dddb343">sgl_io_segs</a>;</div>
-<div class="line"><a id="l00493" name="l00493"></a><span class="lineno">  493</span>        };</div>
-<div class="line"><a id="l00494" name="l00494"></a><span class="lineno">  494</span>        <span class="keyword">union </span>{</div>
-<div class="line"><a id="l00495" name="l00495"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ac1f7c363e7709cf1a7de1364aa8625e2">  495</a></span>                uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#ac1f7c363e7709cf1a7de1364aa8625e2">dst</a>; </div>
-<div class="line"><a id="l00498" name="l00498"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a1d0a6baa8d8f7d9714fe86fe7085b8bb">  498</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a1d0a6baa8d8f7d9714fe86fe7085b8bb">num_sgl_io_segs</a>;</div>
-<div class="line"><a id="l00500" name="l00500"></a><span class="lineno">  500</span>        };</div>
-<div class="line"><a id="l00501" name="l00501"></a><span class="lineno">  501</span>        <span class="keyword">union </span>{</div>
-<div class="line"><a id="l00502" name="l00502"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#adda0b9bd22d445402bb9866e423707c4">  502</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#adda0b9bd22d445402bb9866e423707c4">cipher_start_src_offset_in_bytes</a>;</div>
-<div class="line"><a id="l00504" name="l00504"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#af5c226d1c875c4e30a8f7bd7c03f05b1">  504</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#af5c226d1c875c4e30a8f7bd7c03f05b1">cipher_start_src_offset_in_bits</a>;</div>
-<div class="line"><a id="l00506" name="l00506"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a60a01da0056367a6f0a326265e4da4fb">  506</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a60a01da0056367a6f0a326265e4da4fb">cipher_start_offset_in_bits</a>;</div>
-<div class="line"><a id="l00508" name="l00508"></a><span class="lineno">  508</span>        }; </div>
-<div class="line"><a id="l00509" name="l00509"></a><span class="lineno">  509</span>        <span class="keyword">union </span>{</div>
-<div class="line"><a id="l00510" name="l00510"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a9c2e008fdb76df46a33300f692f92265">  510</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a9c2e008fdb76df46a33300f692f92265">msg_len_to_cipher_in_bytes</a>;</div>
-<div class="line"><a id="l00512" name="l00512"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a425d57ff565bb2ff76e2b0351b00c751">  512</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a425d57ff565bb2ff76e2b0351b00c751">msg_len_to_cipher_in_bits</a>;</div>
-<div class="line"><a id="l00514" name="l00514"></a><span class="lineno">  514</span>        }; </div>
-<div class="line"><a id="l00515" name="l00515"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#af7cdc3d086f6e2b12d21c1383b2bd152">  515</a></span>        uint64_t <a class="code hl_variable" href="structIMB__JOB.html#af7cdc3d086f6e2b12d21c1383b2bd152">hash_start_src_offset_in_bytes</a>;</div>
-<div class="line"><a id="l00516" name="l00516"></a><span class="lineno">  516</span>        <span class="keyword">union </span>{</div>
-<div class="line"><a id="l00517" name="l00517"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a40caf02dcd7e45dd91cfae33159ca26e">  517</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a40caf02dcd7e45dd91cfae33159ca26e">msg_len_to_hash_in_bytes</a>;</div>
-<div class="line"><a id="l00519" name="l00519"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ae45d78dcef87042ffa1daf951f715d42">  519</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#ae45d78dcef87042ffa1daf951f715d42">msg_len_to_hash_in_bits</a>;</div>
-<div class="line"><a id="l00521" name="l00521"></a><span class="lineno">  521</span>        }; </div>
-<div class="line"><a id="l00522" name="l00522"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a960fdd62c1c10d2d3cc0a765c0a6531d">  522</a></span>        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#a960fdd62c1c10d2d3cc0a765c0a6531d">iv</a>;      </div>
-<div class="line"><a id="l00523" name="l00523"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a25b4ce8aec20f64cfc393b245d62a09e">  523</a></span>        uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a25b4ce8aec20f64cfc393b245d62a09e">iv_len_in_bytes</a>; </div>
-<div class="line"><a id="l00524" name="l00524"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ac37080ddb0baf56c9589e65960430b32">  524</a></span>        uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#ac37080ddb0baf56c9589e65960430b32">auth_tag_output</a>; </div>
-<div class="line"><a id="l00525" name="l00525"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a750df4fa7330e2387138409d0eb50e0f">  525</a></span>        uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a750df4fa7330e2387138409d0eb50e0f">auth_tag_output_len_in_bytes</a>; </div>
-<div class="line"><a id="l00528" name="l00528"></a><span class="lineno">  528</span>        <span class="comment">/* Start hash algorithm-specific fields */</span></div>
-<div class="line"><a id="l00529" name="l00529"></a><span class="lineno">  529</span>        <span class="keyword">union </span>{</div>
-<div class="line"><a id="l00530" name="l00530"></a><span class="lineno">  530</span>                <span class="keyword">struct </span>_HMAC_specific_fields {</div>
-<div class="line"><a id="l00531" name="l00531"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a2e74bbeeed2c70f97e6b30a0a12aec0e">  531</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#a2e74bbeeed2c70f97e6b30a0a12aec0e">_hashed_auth_key_xor_ipad</a>;</div>
-<div class="line"><a id="l00534" name="l00534"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a684b751d0a275a28d345a3d1051204ef">  534</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#a684b751d0a275a28d345a3d1051204ef">_hashed_auth_key_xor_opad</a>;</div>
-<div class="line"><a id="l00537" name="l00537"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#aa84f5eefd378ab65ebe0b302ccb0df92">  537</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#aa84f5eefd378ab65ebe0b302ccb0df92">HMAC</a>; </div>
-<div class="line"><a id="l00538" name="l00538"></a><span class="lineno">  538</span>                <span class="keyword">struct </span>_AES_XCBC_specific_fields {</div>
-<div class="line"><a id="l00539" name="l00539"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a76d55a988c71e40c577c6f8f5d0496de">  539</a></span>                        <span class="keyword">const</span> uint32_t *<a class="code hl_variable" href="structIMB__JOB.html#a76d55a988c71e40c577c6f8f5d0496de">_k1_expanded</a>;</div>
-<div class="line"><a id="l00541" name="l00541"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#adc47d4af15c88dcb7abf01bb07e79e63">  541</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#adc47d4af15c88dcb7abf01bb07e79e63">_k2</a>;</div>
-<div class="line"><a id="l00543" name="l00543"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#afa62af4d5f1ecbb80f5216ec298fcfe8">  543</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#afa62af4d5f1ecbb80f5216ec298fcfe8">_k3</a>;</div>
-<div class="line"><a id="l00545" name="l00545"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a3508ac7d49477dffb93b6b9cfbf0ebf3">  545</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a3508ac7d49477dffb93b6b9cfbf0ebf3">XCBC</a>; </div>
-<div class="line"><a id="l00546" name="l00546"></a><span class="lineno">  546</span>                <span class="keyword">struct </span>_AES_CCM_specific_fields {</div>
-<div class="line"><a id="l00547" name="l00547"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a4c943fcac7f5c4f5d6d030547840071e">  547</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a4c943fcac7f5c4f5d6d030547840071e">aad</a>;</div>
-<div class="line"><a id="l00549" name="l00549"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#aa607a780bc2c8509270625c7520a11f1">  549</a></span>                        uint64_t <a class="code hl_variable" href="structIMB__JOB.html#aa607a780bc2c8509270625c7520a11f1">aad_len_in_bytes</a>; </div>
-<div class="line"><a id="l00550" name="l00550"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ad43a9c9149ec16b8e9164771ec38d379">  550</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#ad43a9c9149ec16b8e9164771ec38d379">CCM</a>; </div>
-<div class="line"><a id="l00551" name="l00551"></a><span class="lineno">  551</span>                <span class="keyword">struct </span>_AES_CMAC_specific_fields {</div>
-<div class="line"><a id="l00552" name="l00552"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a95cc77e0c079f43dec1a46a2b75422a0">  552</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a95cc77e0c079f43dec1a46a2b75422a0">_key_expanded</a>;</div>
-<div class="line"><a id="l00554" name="l00554"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ab64e8f6bf8dfaf56305b9023103ea5e2">  554</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#ab64e8f6bf8dfaf56305b9023103ea5e2">_skey1</a>; </div>
-<div class="line"><a id="l00555" name="l00555"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a8e8143e461eab3b2b04333c5f1c17a82">  555</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a8e8143e461eab3b2b04333c5f1c17a82">_skey2</a>; </div>
-<div class="line"><a id="l00556" name="l00556"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a499c1e90c9004ab7bb50fac98b6a9048">  556</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a499c1e90c9004ab7bb50fac98b6a9048">CMAC</a>; </div>
-<div class="line"><a id="l00557" name="l00557"></a><span class="lineno">  557</span>                <span class="keyword">struct </span>_AES_GCM_specific_fields {</div>
-<div class="line"><a id="l00558" name="l00558"></a><span class="lineno">  558</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *aad;</div>
-<div class="line"><a id="l00560" name="l00560"></a><span class="lineno">  560</span>                        uint64_t aad_len_in_bytes;    </div>
-<div class="line"><a id="l00561" name="l00561"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a053ceeb65e611c48a97a3e10d03d47eb">  561</a></span>                        <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *<a class="code hl_variable" href="structIMB__JOB.html#a053ceeb65e611c48a97a3e10d03d47eb">ctx</a>;</div>
-<div class="line"><a id="l00563" name="l00563"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ac9fc7aef831cfc1ca598a55b250dd858">  563</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#ac9fc7aef831cfc1ca598a55b250dd858">GCM</a>; </div>
-<div class="line"><a id="l00564" name="l00564"></a><span class="lineno">  564</span>                <span class="keyword">struct </span>_ZUC_EIA3_specific_fields {</div>
-<div class="line"><a id="l00565" name="l00565"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a7ba1fdbcc6ed2e3840990d2e34dac8e8">  565</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#a7ba1fdbcc6ed2e3840990d2e34dac8e8">_key</a>;</div>
-<div class="line"><a id="l00567" name="l00567"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ae571147592c332cea0d90a36e133e6a5">  567</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#ae571147592c332cea0d90a36e133e6a5">_iv</a>;</div>
-<div class="line"><a id="l00569" name="l00569"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a2bd093b1609dad73bbef2a728995d12f">  569</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#a2bd093b1609dad73bbef2a728995d12f">_iv23</a>;</div>
-<div class="line"><a id="l00571" name="l00571"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ab42f79355b9173c63aca9b0b577a2b61">  571</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#ab42f79355b9173c63aca9b0b577a2b61">ZUC_EIA3</a>; </div>
-<div class="line"><a id="l00572" name="l00572"></a><span class="lineno">  572</span>                <span class="keyword">struct </span>_SNOW3G_UIA2_specific_fields {</div>
-<div class="line"><a id="l00573" name="l00573"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a7a62dc4b2ef35231a93ce035561c4153">  573</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a7a62dc4b2ef35231a93ce035561c4153">_key</a>;</div>
-<div class="line"><a id="l00575" name="l00575"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a4415e6851e770734c5ec1b46a828ce55">  575</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a4415e6851e770734c5ec1b46a828ce55">_iv</a>;</div>
-<div class="line"><a id="l00577" name="l00577"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a2a48f64b9344d0b6ca6775a4fdbe21b7">  577</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a2a48f64b9344d0b6ca6775a4fdbe21b7">SNOW3G_UIA2</a>; </div>
-<div class="line"><a id="l00578" name="l00578"></a><span class="lineno">  578</span>                <span class="keyword">struct </span>_KASUMI_UIA1_specific_fields {</div>
-<div class="line"><a id="l00579" name="l00579"></a><span class="lineno">  579</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *_key;</div>
-<div class="line"><a id="l00581" name="l00581"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a11f452fba9d5cad2b2cdb929b7f244e9">  581</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a11f452fba9d5cad2b2cdb929b7f244e9">KASUMI_UIA1</a>; </div>
-<div class="line"><a id="l00582" name="l00582"></a><span class="lineno">  582</span>                <span class="keyword">struct </span>_AES_GMAC_specific_fields {</div>
-<div class="line"><a id="l00583" name="l00583"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a3b3f616759b854553a351e6b44e08471">  583</a></span>                        <span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *<a class="code hl_variable" href="structIMB__JOB.html#a3b3f616759b854553a351e6b44e08471">_key</a>;</div>
-<div class="line"><a id="l00585" name="l00585"></a><span class="lineno">  585</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *_iv;</div>
-<div class="line"><a id="l00587" name="l00587"></a><span class="lineno">  587</span>                        uint64_t iv_len_in_bytes;</div>
-<div class="line"><a id="l00589" name="l00589"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a07832e4571ec56f377dffa477b7aafe0">  589</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a07832e4571ec56f377dffa477b7aafe0">GMAC</a>; </div>
-<div class="line"><a id="l00590" name="l00590"></a><span class="lineno">  590</span>                <span class="keyword">struct </span>_GHASH_specific_fields {</div>
-<div class="line"><a id="l00591" name="l00591"></a><span class="lineno">  591</span>                        <span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *_key;</div>
-<div class="line"><a id="l00593" name="l00593"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a1e2fc881ce9c84173168df1dbda851f8">  593</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a1e2fc881ce9c84173168df1dbda851f8">_init_tag</a>; </div>
-<div class="line"><a id="l00594" name="l00594"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#af24c379b5414a5d3ec290954b98b1c72">  594</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#af24c379b5414a5d3ec290954b98b1c72">GHASH</a>; </div>
-<div class="line"><a id="l00595" name="l00595"></a><span class="lineno">  595</span>                <span class="keyword">struct </span>_POLY1305_specific_fields {</div>
-<div class="line"><a id="l00596" name="l00596"></a><span class="lineno">  596</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *_key;</div>
-<div class="line"><a id="l00598" name="l00598"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a15f9c1a5ab25dca6e3a550ff00ad2419">  598</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a15f9c1a5ab25dca6e3a550ff00ad2419">POLY1305</a>; </div>
-<div class="line"><a id="l00599" name="l00599"></a><span class="lineno">  599</span>                <span class="keyword">struct </span>_CHACHA20_POLY1305_specific_fields {</div>
-<div class="line"><a id="l00600" name="l00600"></a><span class="lineno">  600</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *aad;</div>
-<div class="line"><a id="l00602" name="l00602"></a><span class="lineno">  602</span>                        uint64_t aad_len_in_bytes;</div>
-<div class="line"><a id="l00604" name="l00604"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a4abdf3311d861979dc39669b3b7f1ed8">  604</a></span>                        <span class="keyword">struct </span><a class="code hl_struct" href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a> *<a class="code hl_variable" href="structIMB__JOB.html#a4abdf3311d861979dc39669b3b7f1ed8">ctx</a>;</div>
-<div class="line"><a id="l00606" name="l00606"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ace537bcd7b871fddd4514b7fd4f678a3">  606</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#ace537bcd7b871fddd4514b7fd4f678a3">CHACHA20_POLY1305</a>; </div>
-<div class="line"><a id="l00607" name="l00607"></a><span class="lineno">  607</span>                <span class="keyword">struct </span>_SNOW_V_AEAD_specific_fields {</div>
-<div class="line"><a id="l00608" name="l00608"></a><span class="lineno">  608</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *aad;</div>
-<div class="line"><a id="l00610" name="l00610"></a><span class="lineno">  610</span>                        uint64_t aad_len_in_bytes;</div>
-<div class="line"><a id="l00612" name="l00612"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a9d5e67861edf38dfa23160b650c7caa9">  612</a></span>                        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a9d5e67861edf38dfa23160b650c7caa9">reserved</a>;</div>
-<div class="line"><a id="l00614" name="l00614"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#abf4a3f2db05c6583de5a99d9590ddca1">  614</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#abf4a3f2db05c6583de5a99d9590ddca1">SNOW_V_AEAD</a>; </div>
-<div class="line"><a id="l00615" name="l00615"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a5e6d8702069bf88ce81cd750df66bcbc">  615</a></span>        } <a class="code hl_variable" href="structIMB__JOB.html#a5e6d8702069bf88ce81cd750df66bcbc">u</a>; </div>
-<div class="line"><a id="l00617" name="l00617"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ad4e08611eee5188cb84cb2dc337ef9f0">  617</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066ab">IMB_STATUS</a> <a class="code hl_variable" href="structIMB__JOB.html#ad4e08611eee5188cb84cb2dc337ef9f0">status</a>; </div>
-<div class="line"><a id="l00618" name="l00618"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a78113e875fdb681e775fd32ee67c7597">  618</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334c">IMB_CIPHER_MODE</a> <a class="code hl_variable" href="structIMB__JOB.html#a78113e875fdb681e775fd32ee67c7597">cipher_mode</a>; </div>
-<div class="line"><a id="l00619" name="l00619"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a1449c51b88ccdb2f855525b89c05eb84">  619</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">IMB_CIPHER_DIRECTION</a> <a class="code hl_variable" href="structIMB__JOB.html#a1449c51b88ccdb2f855525b89c05eb84">cipher_direction</a>; </div>
-<div class="line"><a id="l00620" name="l00620"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#aa4d9b62d3353150aba88aec5d8d08853">  620</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">IMB_HASH_ALG</a> <a class="code hl_variable" href="structIMB__JOB.html#aa4d9b62d3353150aba88aec5d8d08853">hash_alg</a>; </div>
-<div class="line"><a id="l00621" name="l00621"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a41e9fa248ebb040ce1e074a2444b55d2">  621</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5">IMB_CHAIN_ORDER</a> <a class="code hl_variable" href="structIMB__JOB.html#a41e9fa248ebb040ce1e074a2444b55d2">chain_order</a>;</div>
-<div class="line"><a id="l00624" name="l00624"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#abd56907c9485830817f7b30870726aeb">  624</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#abd56907c9485830817f7b30870726aeb">user_data</a>; </div>
-<div class="line"><a id="l00625" name="l00625"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a4e68c8cf14552db625e26477650dfb8b">  625</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a4e68c8cf14552db625e26477650dfb8b">user_data2</a>; </div>
-<div class="line"><a id="l00627" name="l00627"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a652eb3eee14e59be703bf28e69ca0671">  627</a></span>        int (*<a class="code hl_variable" href="structIMB__JOB.html#a652eb3eee14e59be703bf28e69ca0671">cipher_func</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *);</div>
-<div class="line"><a id="l00629" name="l00629"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a62883bf8707d09816753832bef5d2902">  629</a></span>        int (*<a class="code hl_variable" href="structIMB__JOB.html#a62883bf8707d09816753832bef5d2902">hash_func</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *);</div>
-<div class="line"><a id="l00632" name="l00632"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a3d7e363be004999d02db464c721e9751">  632</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3d">IMB_SGL_STATE</a> <a class="code hl_variable" href="structIMB__JOB.html#a3d7e363be004999d02db464c721e9751">sgl_state</a>;</div>
-<div class="line"><a id="l00636" name="l00636"></a><span class="lineno">  636</span>        <span class="keyword">union </span>{</div>
-<div class="line"><a id="l00637" name="l00637"></a><span class="lineno">  637</span>                <span class="keyword">struct </span>_CBCS_specific_fields {</div>
-<div class="line"><a id="l00638" name="l00638"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a5d473d9cb01f8e2818a6f5f0c9483bd7">  638</a></span>                        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a5d473d9cb01f8e2818a6f5f0c9483bd7">next_iv</a>;</div>
-<div class="line"><a id="l00640" name="l00640"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a832c73263792bf8895cf028035730c4e">  640</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a832c73263792bf8895cf028035730c4e">CBCS</a>; </div>
-<div class="line"><a id="l00641" name="l00641"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a006bf024dd3e809fad23c3df813c6fb2">  641</a></span>        } <a class="code hl_variable" href="structIMB__JOB.html#a006bf024dd3e809fad23c3df813c6fb2">cipher_fields</a>; </div>
-<div class="line"><a id="l00642" name="l00642"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aed2387ba36d72c3d148fcb9d2802ccf5">  642</a></span>} <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a>;</div>
-<div class="line"><a id="l00643" name="l00643"></a><span class="lineno">  643</span> </div>
-<div class="line"><a id="l00644" name="l00644"></a><span class="lineno">  644</span> </div>
-<div class="line"><a id="l00645" name="l00645"></a><span class="lineno">  645</span><span class="comment">/* KASUMI */</span></div>
-<div class="line"><a id="l00646" name="l00646"></a><span class="lineno">  646</span> </div>
-<div class="line"><a id="l00647" name="l00647"></a><span class="lineno">  647</span><span class="comment">/* 64 precomputed words for key schedule */</span></div>
-<div class="line"><a id="l00648" name="l00648"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a071e04977525b67c8d1accc60937eb67">  648</a></span><span class="preprocessor">#define KASUMI_KEY_SCHEDULE_SIZE  64</span></div>
-<div class="line"><a id="l00649" name="l00649"></a><span class="lineno">  649</span> </div>
-<div class="line"><a id="l00653" name="l00653"></a><span class="lineno"><a class="line" href="structkasumi__key__sched__s.html">  653</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_s</a> {</div>
-<div class="line"><a id="l00655" name="l00655"></a><span class="lineno"><a class="line" href="structkasumi__key__sched__s.html#a7e69de411b81753c10776442bbe03100">  655</a></span>    uint16_t <a class="code hl_variable" href="structkasumi__key__sched__s.html#a7e69de411b81753c10776442bbe03100">sk16</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a071e04977525b67c8d1accc60937eb67">KASUMI_KEY_SCHEDULE_SIZE</a>];      </div>
-<div class="line"><a id="l00656" name="l00656"></a><span class="lineno"><a class="line" href="structkasumi__key__sched__s.html#a091988e7975015d654ccb6904c4fdf39">  656</a></span>    uint16_t <a class="code hl_variable" href="structkasumi__key__sched__s.html#a091988e7975015d654ccb6904c4fdf39">msk16</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a071e04977525b67c8d1accc60937eb67">KASUMI_KEY_SCHEDULE_SIZE</a>];     </div>
-<div class="line"><a id="l00657" name="l00657"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a82d6866ebcf1bd46b684fe473b4b73f2">  657</a></span>} <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a82d6866ebcf1bd46b684fe473b4b73f2">kasumi_key_sched_t</a>;</div>
-<div class="line"><a id="l00658" name="l00658"></a><span class="lineno">  658</span> </div>
-<div class="line"><a id="l00659" name="l00659"></a><span class="lineno">  659</span><span class="comment">/* GCM data structures */</span></div>
-<div class="line"><a id="l00660" name="l00660"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">  660</a></span><span class="preprocessor">#define IMB_GCM_BLOCK_LEN   16</span></div>
-<div class="line"><a id="l00661" name="l00661"></a><span class="lineno">  661</span> </div>
-<div class="line"><a id="l00667" name="l00667"></a><span class="lineno"><a class="line" href="structgcm__context__data.html">  667</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> {</div>
-<div class="line"><a id="l00668" name="l00668"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a98c22f35eb0b4d368e2f454b347ed3b9">  668</a></span>        uint8_t  <a class="code hl_variable" href="structgcm__context__data.html#a98c22f35eb0b4d368e2f454b347ed3b9">aad_hash</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">IMB_GCM_BLOCK_LEN</a>];</div>
-<div class="line"><a id="l00669" name="l00669"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#ab1dadabcbd2002738ec7db7da332e04f">  669</a></span>        uint64_t <a class="code hl_variable" href="structgcm__context__data.html#ab1dadabcbd2002738ec7db7da332e04f">aad_length</a>;</div>
-<div class="line"><a id="l00670" name="l00670"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a0d9e72f85aba9363fcb4f2d757342aa2">  670</a></span>        uint64_t <a class="code hl_variable" href="structgcm__context__data.html#a0d9e72f85aba9363fcb4f2d757342aa2">in_length</a>;</div>
-<div class="line"><a id="l00671" name="l00671"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a2e52ea863c681afe1d3370a987e252f0">  671</a></span>        uint8_t  <a class="code hl_variable" href="structgcm__context__data.html#a2e52ea863c681afe1d3370a987e252f0">partial_block_enc_key</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">IMB_GCM_BLOCK_LEN</a>];</div>
-<div class="line"><a id="l00672" name="l00672"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a84bac4eabc12b81d26898b6fe6728a63">  672</a></span>        uint8_t  <a class="code hl_variable" href="structgcm__context__data.html#a84bac4eabc12b81d26898b6fe6728a63">orig_IV</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">IMB_GCM_BLOCK_LEN</a>];</div>
-<div class="line"><a id="l00673" name="l00673"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a2a454a5e44422aaec135dc7807aa55a4">  673</a></span>        uint8_t  <a class="code hl_variable" href="structgcm__context__data.html#a2a454a5e44422aaec135dc7807aa55a4">current_counter</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">IMB_GCM_BLOCK_LEN</a>];</div>
-<div class="line"><a id="l00674" name="l00674"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a97411247efd14ab01e7e0da6587bfa0c">  674</a></span>        uint64_t <a class="code hl_variable" href="structgcm__context__data.html#a97411247efd14ab01e7e0da6587bfa0c">partial_block_length</a>;</div>
-<div class="line"><a id="l00675" name="l00675"></a><span class="lineno">  675</span>};</div>
-<div class="line"><a id="l00676" name="l00676"></a><span class="lineno">  676</span><span class="preprocessor">#undef IMB_GCM_BLOCK_LEN</span></div>
-<div class="line"><a id="l00677" name="l00677"></a><span class="lineno">  677</span> </div>
-<div class="line"><a id="l00681" name="l00681"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html">  681</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a> {</div>
-<div class="line"><a id="l00682" name="l00682"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#ae12447b2fd2e9f8a6f09f443bd303887">  682</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#ae12447b2fd2e9f8a6f09f443bd303887">hash</a>[3]; </div>
-<div class="line"><a id="l00683" name="l00683"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#a7b5edcebc9a6bec3776daf6d13bf950c">  683</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#a7b5edcebc9a6bec3776daf6d13bf950c">aad_len</a>; </div>
-<div class="line"><a id="l00684" name="l00684"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#ade4568d041695b318df773787872127f">  684</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#ade4568d041695b318df773787872127f">hash_len</a>; </div>
-<div class="line"><a id="l00685" name="l00685"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#afc74af4af99449f0b9f01338ae723c1a">  685</a></span>        uint8_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#afc74af4af99449f0b9f01338ae723c1a">last_ks</a>[64]; </div>
-<div class="line"><a id="l00686" name="l00686"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#a9ac4fafe2ca37395264f728c8e99a9b1">  686</a></span>        uint8_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#a9ac4fafe2ca37395264f728c8e99a9b1">poly_key</a>[32]; </div>
-<div class="line"><a id="l00687" name="l00687"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#a908d80ce2c35792099dbc967818b9abd">  687</a></span>        uint8_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#a908d80ce2c35792099dbc967818b9abd">poly_scratch</a>[16]; </div>
-<div class="line"><a id="l00688" name="l00688"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#add03511d1f95376b3ac64a7916c27368">  688</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#add03511d1f95376b3ac64a7916c27368">last_block_count</a>; </div>
-<div class="line"><a id="l00689" name="l00689"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#a84693b96048f6130a749b633c65e2105">  689</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#a84693b96048f6130a749b633c65e2105">remain_ks_bytes</a>;</div>
-<div class="line"><a id="l00691" name="l00691"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#a74e971fe76c8b946e30e8f0c8cce111a">  691</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#a74e971fe76c8b946e30e8f0c8cce111a">remain_ct_bytes</a>; </div>
-<div class="line"><a id="l00694" name="l00694"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#ac0d1657fc57308900691369362c56658">  694</a></span>        uint8_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#ac0d1657fc57308900691369362c56658">IV</a>[12]; </div>
-<div class="line"><a id="l00695" name="l00695"></a><span class="lineno">  695</span>};</div>
-<div class="line"><a id="l00696" name="l00696"></a><span class="lineno">  696</span> </div>
-<div class="line"><a id="l00701" name="l00701"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a41087ea6dce2e096ebb02a613600c2ed">  701</a></span><span class="preprocessor">#define IMB_MAX_TAG_LEN (16)</span></div>
-<div class="line"><a id="l00702" name="l00702"></a><span class="lineno">  702</span> </div>
-<div class="line"><a id="l00712" name="l00712"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a87884da318b3013893b725d047b53702">  712</a></span><span class="preprocessor">#define IMB_GCM_IV_DATA_LEN (12)</span></div>
-<div class="line"><a id="l00713" name="l00713"></a><span class="lineno">  713</span> </div>
-<div class="line"><a id="l00714" name="l00714"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae97681c203afbd818a39fb797613a232">  714</a></span><span class="preprocessor">#define IMB_GCM_128_KEY_LEN (16)</span></div>
-<div class="line"><a id="l00715" name="l00715"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7201a0be67f1e6f3757169b0166dd47d">  715</a></span><span class="preprocessor">#define IMB_GCM_192_KEY_LEN (24)</span></div>
-<div class="line"><a id="l00716" name="l00716"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4c4c40ec87c2354832f5b182b22d2111">  716</a></span><span class="preprocessor">#define IMB_GCM_256_KEY_LEN (32)</span></div>
-<div class="line"><a id="l00717" name="l00717"></a><span class="lineno">  717</span> </div>
-<div class="line"><a id="l00718" name="l00718"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">  718</a></span><span class="preprocessor">#define IMB_GCM_ENC_KEY_LEN 16</span></div>
-<div class="line"><a id="l00719" name="l00719"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a73715b8c1ba918ce6d5c21749841b47b">  719</a></span><span class="preprocessor">#define IMB_GCM_KEY_SETS    (15) </span></div>
-<div class="line"><a id="l00726" name="l00726"></a><span class="lineno">  726</span><span class="preprocessor">#ifdef __WIN32</span></div>
-<div class="line"><a id="l00727" name="l00727"></a><span class="lineno">  727</span>__declspec(align(64))</div>
-<div class="line"><a id="l00728" name="l00728"></a><span class="lineno">  728</span><span class="preprocessor">#endif </span><span class="comment">/* WIN32 */</span><span class="preprocessor"></span></div>
-<div class="line"><a id="l00729" name="l00729"></a><span class="lineno"><a class="line" href="structgcm__key__data.html">  729</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> {</div>
-<div class="line"><a id="l00730" name="l00730"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#aa5bda4f55b8393be151cfe28a9dc1ca9">  730</a></span>        uint8_t <a class="code hl_variable" href="structgcm__key__data.html#aa5bda4f55b8393be151cfe28a9dc1ca9">expanded_keys</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a> * <a class="code hl_define" href="intel-ipsec-mb_8h.html#a73715b8c1ba918ce6d5c21749841b47b">IMB_GCM_KEY_SETS</a>];</div>
-<div class="line"><a id="l00731" name="l00731"></a><span class="lineno">  731</span>        <span class="keyword">union </span>{</div>
-<div class="line"><a id="l00733" name="l00733"></a><span class="lineno">  733</span>                <span class="keyword">struct </span>{</div>
-<div class="line"><a id="l00739" name="l00739"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#a73b61a77635c0357b36b83aaf69d1237">  739</a></span>                        uint8_t <a class="code hl_variable" href="structgcm__key__data.html#a73b61a77635c0357b36b83aaf69d1237">shifted_hkey</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a> * 8];</div>
-<div class="line"><a id="l00748" name="l00748"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#a570a82f076ceb5da6719d1a554584820">  748</a></span>                        uint8_t <a class="code hl_variable" href="structgcm__key__data.html#a570a82f076ceb5da6719d1a554584820">shifted_hkey_k</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a> * 8];</div>
-<div class="line"><a id="l00749" name="l00749"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#a908988e25607cd3e092bfcea9964deb1">  749</a></span>                } <a class="code hl_variable" href="structgcm__key__data.html#a908988e25607cd3e092bfcea9964deb1">sse_avx</a>;</div>
-<div class="line"><a id="l00750" name="l00750"></a><span class="lineno">  750</span>                <span class="keyword">struct </span>{</div>
-<div class="line"><a id="l00756" name="l00756"></a><span class="lineno">  756</span>                        uint8_t <a class="code hl_variable" href="structgcm__key__data.html#a73b61a77635c0357b36b83aaf69d1237">shifted_hkey</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a> * 8];</div>
-<div class="line"><a id="l00757" name="l00757"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#a3f231fdc1d521cd15c111667e4aea818">  757</a></span>                } <a class="code hl_variable" href="structgcm__key__data.html#a3f231fdc1d521cd15c111667e4aea818">avx2_avx512</a>;</div>
-<div class="line"><a id="l00758" name="l00758"></a><span class="lineno">  758</span>                <span class="keyword">struct </span>{</div>
-<div class="line"><a id="l00763" name="l00763"></a><span class="lineno">  763</span>                        uint8_t <a class="code hl_variable" href="structgcm__key__data.html#a73b61a77635c0357b36b83aaf69d1237">shifted_hkey</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a> * 48];</div>
-<div class="line"><a id="l00764" name="l00764"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#a7ad44e105b23e41b7f79530b6370e509">  764</a></span>                } <a class="code hl_variable" href="structgcm__key__data.html#a7ad44e105b23e41b7f79530b6370e509">vaes_avx512</a>;</div>
-<div class="line"><a id="l00765" name="l00765"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#af5adb4225d569050207cfcfe00fe273a">  765</a></span>        } <a class="code hl_variable" href="structgcm__key__data.html#af5adb4225d569050207cfcfe00fe273a">ghash_keys</a>;</div>
-<div class="line"><a id="l00766" name="l00766"></a><span class="lineno">  766</span>}</div>
-<div class="line"><a id="l00767" name="l00767"></a><span class="lineno">  767</span><span class="preprocessor">#ifdef LINUX</span></div>
-<div class="line"><a id="l00768" name="l00768"></a><span class="lineno">  768</span>__attribute__((aligned(64)));</div>
-<div class="line"><a id="l00769" name="l00769"></a><span class="lineno">  769</span><span class="preprocessor">#else</span></div>
-<div class="line"><a id="l00770" name="l00770"></a><span class="lineno">  770</span>;</div>
-<div class="line"><a id="l00771" name="l00771"></a><span class="lineno">  771</span><span class="preprocessor">#endif</span></div>
+<div class="line"><a id="l00355" name="l00355"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3d">  355</a></span><span class="keyword">typedef</span> <span class="keyword">enum</span> {</div>
+<div class="line"><a id="l00356" name="l00356"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3daf6e77a48759ab366cc1160725ff4261e">  356</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3daf6e77a48759ab366cc1160725ff4261e">IMB_SGL_INIT</a> = 0,</div>
+<div class="line"><a id="l00357" name="l00357"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da15c5d0aeeb9d5eb4e4c4878c837c5977">  357</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da15c5d0aeeb9d5eb4e4c4878c837c5977">IMB_SGL_UPDATE</a>,</div>
+<div class="line"><a id="l00358" name="l00358"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3dab7a602903c0fbaad7ffb893cb2547975">  358</a></span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3dab7a602903c0fbaad7ffb893cb2547975">IMB_SGL_COMPLETE</a>,</div>
+<div class="line"><a id="l00359" name="l00359"></a><span class="lineno">  359</span>        <a class="code hl_enumvalue" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da2f0678ab7ad9bb30c040e0b3ee2fa408">IMB_SGL_ALL</a></div>
+<div class="line"><a id="l00360" name="l00360"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da2f0678ab7ad9bb30c040e0b3ee2fa408">  360</a></span>} <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3d">IMB_SGL_STATE</a>;</div>
+<div class="line"><a id="l00361" name="l00361"></a><span class="lineno">  361</span> </div>
+<div class="line"><a id="l00365" name="l00365"></a><span class="lineno"><a class="line" href="structIMB__SGL__IOV.html">  365</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structIMB__SGL__IOV.html">IMB_SGL_IOV</a> {</div>
+<div class="line"><a id="l00366" name="l00366"></a><span class="lineno"><a class="line" href="structIMB__SGL__IOV.html#a56c5b0a033d949869cee2d03f1df3129">  366</a></span>    <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__SGL__IOV.html#a56c5b0a033d949869cee2d03f1df3129">in</a>; </div>
+<div class="line"><a id="l00367" name="l00367"></a><span class="lineno"><a class="line" href="structIMB__SGL__IOV.html#a54b8da76fb8a400f9f7972bdd97f6f53">  367</a></span>    <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__SGL__IOV.html#a54b8da76fb8a400f9f7972bdd97f6f53">out</a>; </div>
+<div class="line"><a id="l00368" name="l00368"></a><span class="lineno"><a class="line" href="structIMB__SGL__IOV.html#a3a3662456b91011eb0585667492acc88">  368</a></span>    uint64_t <a class="code hl_variable" href="structIMB__SGL__IOV.html#a3a3662456b91011eb0585667492acc88">len</a>; </div>
+<div class="line"><a id="l00369" name="l00369"></a><span class="lineno">  369</span>};</div>
+<div class="line"><a id="l00370" name="l00370"></a><span class="lineno">  370</span> </div>
+<div class="line"><a id="l00390" name="l00390"></a><span class="lineno"><a class="line" href="structIMB__JOB.html">  390</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> {</div>
+<div class="line"><a id="l00391" name="l00391"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ac656e2d98f36bd5547cc9fa297c1de62">  391</a></span>        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#ac656e2d98f36bd5547cc9fa297c1de62">enc_keys</a>;  </div>
+<div class="line"><a id="l00392" name="l00392"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#af78a3df5a9f79f329c8d1095b9ecea05">  392</a></span>        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#af78a3df5a9f79f329c8d1095b9ecea05">dec_keys</a>;  </div>
+<div class="line"><a id="l00393" name="l00393"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#abdd8a58a37e8d2daa1c2d333b826a65c">  393</a></span>        uint64_t <a class="code hl_variable" href="structIMB__JOB.html#abdd8a58a37e8d2daa1c2d333b826a65c">key_len_in_bytes</a>; </div>
+<div class="line"><a id="l00394" name="l00394"></a><span class="lineno">  394</span>        <span class="keyword">union </span>{</div>
+<div class="line"><a id="l00395" name="l00395"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#af83d63eb71a4f26b4915562bea554f28">  395</a></span>                <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#af83d63eb71a4f26b4915562bea554f28">src</a>; </div>
+<div class="line"><a id="l00398" name="l00398"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a2462f9efb16c31ae615df7493dddb343">  398</a></span>                <span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__SGL__IOV.html">IMB_SGL_IOV</a> *<a class="code hl_variable" href="structIMB__JOB.html#a2462f9efb16c31ae615df7493dddb343">sgl_io_segs</a>;</div>
+<div class="line"><a id="l00400" name="l00400"></a><span class="lineno">  400</span>        };</div>
+<div class="line"><a id="l00401" name="l00401"></a><span class="lineno">  401</span>        <span class="keyword">union </span>{</div>
+<div class="line"><a id="l00402" name="l00402"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ac1f7c363e7709cf1a7de1364aa8625e2">  402</a></span>                uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#ac1f7c363e7709cf1a7de1364aa8625e2">dst</a>; </div>
+<div class="line"><a id="l00405" name="l00405"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a1d0a6baa8d8f7d9714fe86fe7085b8bb">  405</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a1d0a6baa8d8f7d9714fe86fe7085b8bb">num_sgl_io_segs</a>;</div>
+<div class="line"><a id="l00407" name="l00407"></a><span class="lineno">  407</span>        };</div>
+<div class="line"><a id="l00408" name="l00408"></a><span class="lineno">  408</span>        <span class="keyword">union </span>{</div>
+<div class="line"><a id="l00409" name="l00409"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#adda0b9bd22d445402bb9866e423707c4">  409</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#adda0b9bd22d445402bb9866e423707c4">cipher_start_src_offset_in_bytes</a>;</div>
+<div class="line"><a id="l00411" name="l00411"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#af5c226d1c875c4e30a8f7bd7c03f05b1">  411</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#af5c226d1c875c4e30a8f7bd7c03f05b1">cipher_start_src_offset_in_bits</a>;</div>
+<div class="line"><a id="l00413" name="l00413"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a60a01da0056367a6f0a326265e4da4fb">  413</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a60a01da0056367a6f0a326265e4da4fb">cipher_start_offset_in_bits</a>;</div>
+<div class="line"><a id="l00415" name="l00415"></a><span class="lineno">  415</span>        }; </div>
+<div class="line"><a id="l00416" name="l00416"></a><span class="lineno">  416</span>        <span class="keyword">union </span>{</div>
+<div class="line"><a id="l00417" name="l00417"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a9c2e008fdb76df46a33300f692f92265">  417</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a9c2e008fdb76df46a33300f692f92265">msg_len_to_cipher_in_bytes</a>;</div>
+<div class="line"><a id="l00419" name="l00419"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a425d57ff565bb2ff76e2b0351b00c751">  419</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a425d57ff565bb2ff76e2b0351b00c751">msg_len_to_cipher_in_bits</a>;</div>
+<div class="line"><a id="l00421" name="l00421"></a><span class="lineno">  421</span>        }; </div>
+<div class="line"><a id="l00422" name="l00422"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#af7cdc3d086f6e2b12d21c1383b2bd152">  422</a></span>        uint64_t <a class="code hl_variable" href="structIMB__JOB.html#af7cdc3d086f6e2b12d21c1383b2bd152">hash_start_src_offset_in_bytes</a>;</div>
+<div class="line"><a id="l00423" name="l00423"></a><span class="lineno">  423</span>        <span class="keyword">union </span>{</div>
+<div class="line"><a id="l00424" name="l00424"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a40caf02dcd7e45dd91cfae33159ca26e">  424</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a40caf02dcd7e45dd91cfae33159ca26e">msg_len_to_hash_in_bytes</a>;</div>
+<div class="line"><a id="l00426" name="l00426"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ae45d78dcef87042ffa1daf951f715d42">  426</a></span>                uint64_t <a class="code hl_variable" href="structIMB__JOB.html#ae45d78dcef87042ffa1daf951f715d42">msg_len_to_hash_in_bits</a>;</div>
+<div class="line"><a id="l00428" name="l00428"></a><span class="lineno">  428</span>        }; </div>
+<div class="line"><a id="l00429" name="l00429"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a960fdd62c1c10d2d3cc0a765c0a6531d">  429</a></span>        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#a960fdd62c1c10d2d3cc0a765c0a6531d">iv</a>;      </div>
+<div class="line"><a id="l00430" name="l00430"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a25b4ce8aec20f64cfc393b245d62a09e">  430</a></span>        uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a25b4ce8aec20f64cfc393b245d62a09e">iv_len_in_bytes</a>; </div>
+<div class="line"><a id="l00431" name="l00431"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ac37080ddb0baf56c9589e65960430b32">  431</a></span>        uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#ac37080ddb0baf56c9589e65960430b32">auth_tag_output</a>; </div>
+<div class="line"><a id="l00432" name="l00432"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a750df4fa7330e2387138409d0eb50e0f">  432</a></span>        uint64_t <a class="code hl_variable" href="structIMB__JOB.html#a750df4fa7330e2387138409d0eb50e0f">auth_tag_output_len_in_bytes</a>; </div>
+<div class="line"><a id="l00435" name="l00435"></a><span class="lineno">  435</span>        <span class="comment">/* Start hash algorithm-specific fields */</span></div>
+<div class="line"><a id="l00436" name="l00436"></a><span class="lineno">  436</span>        <span class="keyword">union </span>{</div>
+<div class="line"><a id="l00437" name="l00437"></a><span class="lineno">  437</span>                <span class="keyword">struct </span>_HMAC_specific_fields {</div>
+<div class="line"><a id="l00438" name="l00438"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a2e74bbeeed2c70f97e6b30a0a12aec0e">  438</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#a2e74bbeeed2c70f97e6b30a0a12aec0e">_hashed_auth_key_xor_ipad</a>;</div>
+<div class="line"><a id="l00441" name="l00441"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a684b751d0a275a28d345a3d1051204ef">  441</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#a684b751d0a275a28d345a3d1051204ef">_hashed_auth_key_xor_opad</a>;</div>
+<div class="line"><a id="l00444" name="l00444"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#aa84f5eefd378ab65ebe0b302ccb0df92">  444</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#aa84f5eefd378ab65ebe0b302ccb0df92">HMAC</a>; </div>
+<div class="line"><a id="l00445" name="l00445"></a><span class="lineno">  445</span>                <span class="keyword">struct </span>_AES_XCBC_specific_fields {</div>
+<div class="line"><a id="l00446" name="l00446"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a76d55a988c71e40c577c6f8f5d0496de">  446</a></span>                        <span class="keyword">const</span> uint32_t *<a class="code hl_variable" href="structIMB__JOB.html#a76d55a988c71e40c577c6f8f5d0496de">_k1_expanded</a>;</div>
+<div class="line"><a id="l00448" name="l00448"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#adc47d4af15c88dcb7abf01bb07e79e63">  448</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#adc47d4af15c88dcb7abf01bb07e79e63">_k2</a>;</div>
+<div class="line"><a id="l00450" name="l00450"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#afa62af4d5f1ecbb80f5216ec298fcfe8">  450</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#afa62af4d5f1ecbb80f5216ec298fcfe8">_k3</a>;</div>
+<div class="line"><a id="l00452" name="l00452"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a3508ac7d49477dffb93b6b9cfbf0ebf3">  452</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a3508ac7d49477dffb93b6b9cfbf0ebf3">XCBC</a>; </div>
+<div class="line"><a id="l00453" name="l00453"></a><span class="lineno">  453</span>                <span class="keyword">struct </span>_AES_CCM_specific_fields {</div>
+<div class="line"><a id="l00454" name="l00454"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a4c943fcac7f5c4f5d6d030547840071e">  454</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a4c943fcac7f5c4f5d6d030547840071e">aad</a>;</div>
+<div class="line"><a id="l00456" name="l00456"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#aa607a780bc2c8509270625c7520a11f1">  456</a></span>                        uint64_t <a class="code hl_variable" href="structIMB__JOB.html#aa607a780bc2c8509270625c7520a11f1">aad_len_in_bytes</a>; </div>
+<div class="line"><a id="l00457" name="l00457"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ad43a9c9149ec16b8e9164771ec38d379">  457</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#ad43a9c9149ec16b8e9164771ec38d379">CCM</a>; </div>
+<div class="line"><a id="l00458" name="l00458"></a><span class="lineno">  458</span>                <span class="keyword">struct </span>_AES_CMAC_specific_fields {</div>
+<div class="line"><a id="l00459" name="l00459"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a95cc77e0c079f43dec1a46a2b75422a0">  459</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a95cc77e0c079f43dec1a46a2b75422a0">_key_expanded</a>;</div>
+<div class="line"><a id="l00461" name="l00461"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ab64e8f6bf8dfaf56305b9023103ea5e2">  461</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#ab64e8f6bf8dfaf56305b9023103ea5e2">_skey1</a>; </div>
+<div class="line"><a id="l00462" name="l00462"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a8e8143e461eab3b2b04333c5f1c17a82">  462</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a8e8143e461eab3b2b04333c5f1c17a82">_skey2</a>; </div>
+<div class="line"><a id="l00463" name="l00463"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a499c1e90c9004ab7bb50fac98b6a9048">  463</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a499c1e90c9004ab7bb50fac98b6a9048">CMAC</a>; </div>
+<div class="line"><a id="l00464" name="l00464"></a><span class="lineno">  464</span>                <span class="keyword">struct </span>_AES_GCM_specific_fields {</div>
+<div class="line"><a id="l00465" name="l00465"></a><span class="lineno">  465</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *aad;</div>
+<div class="line"><a id="l00467" name="l00467"></a><span class="lineno">  467</span>                        uint64_t aad_len_in_bytes;    </div>
+<div class="line"><a id="l00468" name="l00468"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a053ceeb65e611c48a97a3e10d03d47eb">  468</a></span>                        <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *<a class="code hl_variable" href="structIMB__JOB.html#a053ceeb65e611c48a97a3e10d03d47eb">ctx</a>;</div>
+<div class="line"><a id="l00470" name="l00470"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ac9fc7aef831cfc1ca598a55b250dd858">  470</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#ac9fc7aef831cfc1ca598a55b250dd858">GCM</a>; </div>
+<div class="line"><a id="l00471" name="l00471"></a><span class="lineno">  471</span>                <span class="keyword">struct </span>_ZUC_EIA3_specific_fields {</div>
+<div class="line"><a id="l00472" name="l00472"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a7ba1fdbcc6ed2e3840990d2e34dac8e8">  472</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#a7ba1fdbcc6ed2e3840990d2e34dac8e8">_key</a>;</div>
+<div class="line"><a id="l00474" name="l00474"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ae571147592c332cea0d90a36e133e6a5">  474</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#ae571147592c332cea0d90a36e133e6a5">_iv</a>;</div>
+<div class="line"><a id="l00476" name="l00476"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a2bd093b1609dad73bbef2a728995d12f">  476</a></span>                        <span class="keyword">const</span> uint8_t *<a class="code hl_variable" href="structIMB__JOB.html#a2bd093b1609dad73bbef2a728995d12f">_iv23</a>;</div>
+<div class="line"><a id="l00478" name="l00478"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ab42f79355b9173c63aca9b0b577a2b61">  478</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#ab42f79355b9173c63aca9b0b577a2b61">ZUC_EIA3</a>; </div>
+<div class="line"><a id="l00479" name="l00479"></a><span class="lineno">  479</span>                <span class="keyword">struct </span>_SNOW3G_UIA2_specific_fields {</div>
+<div class="line"><a id="l00480" name="l00480"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a7a62dc4b2ef35231a93ce035561c4153">  480</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a7a62dc4b2ef35231a93ce035561c4153">_key</a>;</div>
+<div class="line"><a id="l00482" name="l00482"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a4415e6851e770734c5ec1b46a828ce55">  482</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a4415e6851e770734c5ec1b46a828ce55">_iv</a>;</div>
+<div class="line"><a id="l00484" name="l00484"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a2a48f64b9344d0b6ca6775a4fdbe21b7">  484</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a2a48f64b9344d0b6ca6775a4fdbe21b7">SNOW3G_UIA2</a>; </div>
+<div class="line"><a id="l00485" name="l00485"></a><span class="lineno">  485</span>                <span class="keyword">struct </span>_KASUMI_UIA1_specific_fields {</div>
+<div class="line"><a id="l00486" name="l00486"></a><span class="lineno">  486</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *_key;</div>
+<div class="line"><a id="l00488" name="l00488"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a11f452fba9d5cad2b2cdb929b7f244e9">  488</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a11f452fba9d5cad2b2cdb929b7f244e9">KASUMI_UIA1</a>; </div>
+<div class="line"><a id="l00489" name="l00489"></a><span class="lineno">  489</span>                <span class="keyword">struct </span>_AES_GMAC_specific_fields {</div>
+<div class="line"><a id="l00490" name="l00490"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a3b3f616759b854553a351e6b44e08471">  490</a></span>                        <span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *<a class="code hl_variable" href="structIMB__JOB.html#a3b3f616759b854553a351e6b44e08471">_key</a>;</div>
+<div class="line"><a id="l00492" name="l00492"></a><span class="lineno">  492</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *_iv;</div>
+<div class="line"><a id="l00494" name="l00494"></a><span class="lineno">  494</span>                        uint64_t iv_len_in_bytes;</div>
+<div class="line"><a id="l00496" name="l00496"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a07832e4571ec56f377dffa477b7aafe0">  496</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a07832e4571ec56f377dffa477b7aafe0">GMAC</a>; </div>
+<div class="line"><a id="l00497" name="l00497"></a><span class="lineno">  497</span>                <span class="keyword">struct </span>_GHASH_specific_fields {</div>
+<div class="line"><a id="l00498" name="l00498"></a><span class="lineno">  498</span>                        <span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *_key;</div>
+<div class="line"><a id="l00500" name="l00500"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a1e2fc881ce9c84173168df1dbda851f8">  500</a></span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a1e2fc881ce9c84173168df1dbda851f8">_init_tag</a>; </div>
+<div class="line"><a id="l00501" name="l00501"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#af24c379b5414a5d3ec290954b98b1c72">  501</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#af24c379b5414a5d3ec290954b98b1c72">GHASH</a>; </div>
+<div class="line"><a id="l00502" name="l00502"></a><span class="lineno">  502</span>                <span class="keyword">struct </span>_POLY1305_specific_fields {</div>
+<div class="line"><a id="l00503" name="l00503"></a><span class="lineno">  503</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *_key;</div>
+<div class="line"><a id="l00505" name="l00505"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a15f9c1a5ab25dca6e3a550ff00ad2419">  505</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a15f9c1a5ab25dca6e3a550ff00ad2419">POLY1305</a>; </div>
+<div class="line"><a id="l00506" name="l00506"></a><span class="lineno">  506</span>                <span class="keyword">struct </span>_CHACHA20_POLY1305_specific_fields {</div>
+<div class="line"><a id="l00507" name="l00507"></a><span class="lineno">  507</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *aad;</div>
+<div class="line"><a id="l00509" name="l00509"></a><span class="lineno">  509</span>                        uint64_t aad_len_in_bytes;</div>
+<div class="line"><a id="l00511" name="l00511"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a4abdf3311d861979dc39669b3b7f1ed8">  511</a></span>                        <span class="keyword">struct </span><a class="code hl_struct" href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a> *<a class="code hl_variable" href="structIMB__JOB.html#a4abdf3311d861979dc39669b3b7f1ed8">ctx</a>;</div>
+<div class="line"><a id="l00513" name="l00513"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ace537bcd7b871fddd4514b7fd4f678a3">  513</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#ace537bcd7b871fddd4514b7fd4f678a3">CHACHA20_POLY1305</a>; </div>
+<div class="line"><a id="l00514" name="l00514"></a><span class="lineno">  514</span>                <span class="keyword">struct </span>_SNOW_V_AEAD_specific_fields {</div>
+<div class="line"><a id="l00515" name="l00515"></a><span class="lineno">  515</span>                        <span class="keyword">const</span> <span class="keywordtype">void</span> *aad;</div>
+<div class="line"><a id="l00517" name="l00517"></a><span class="lineno">  517</span>                        uint64_t aad_len_in_bytes;</div>
+<div class="line"><a id="l00519" name="l00519"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a9d5e67861edf38dfa23160b650c7caa9">  519</a></span>                        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a9d5e67861edf38dfa23160b650c7caa9">reserved</a>;</div>
+<div class="line"><a id="l00521" name="l00521"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#abf4a3f2db05c6583de5a99d9590ddca1">  521</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#abf4a3f2db05c6583de5a99d9590ddca1">SNOW_V_AEAD</a>; </div>
+<div class="line"><a id="l00522" name="l00522"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a5e6d8702069bf88ce81cd750df66bcbc">  522</a></span>        } <a class="code hl_variable" href="structIMB__JOB.html#a5e6d8702069bf88ce81cd750df66bcbc">u</a>; </div>
+<div class="line"><a id="l00524" name="l00524"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ad4e08611eee5188cb84cb2dc337ef9f0">  524</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066ab">IMB_STATUS</a> <a class="code hl_variable" href="structIMB__JOB.html#ad4e08611eee5188cb84cb2dc337ef9f0">status</a>; </div>
+<div class="line"><a id="l00525" name="l00525"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a78113e875fdb681e775fd32ee67c7597">  525</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334c">IMB_CIPHER_MODE</a> <a class="code hl_variable" href="structIMB__JOB.html#a78113e875fdb681e775fd32ee67c7597">cipher_mode</a>; </div>
+<div class="line"><a id="l00526" name="l00526"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a1449c51b88ccdb2f855525b89c05eb84">  526</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">IMB_CIPHER_DIRECTION</a> <a class="code hl_variable" href="structIMB__JOB.html#a1449c51b88ccdb2f855525b89c05eb84">cipher_direction</a>; </div>
+<div class="line"><a id="l00527" name="l00527"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#aa4d9b62d3353150aba88aec5d8d08853">  527</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">IMB_HASH_ALG</a> <a class="code hl_variable" href="structIMB__JOB.html#aa4d9b62d3353150aba88aec5d8d08853">hash_alg</a>; </div>
+<div class="line"><a id="l00528" name="l00528"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a41e9fa248ebb040ce1e074a2444b55d2">  528</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5">IMB_CHAIN_ORDER</a> <a class="code hl_variable" href="structIMB__JOB.html#a41e9fa248ebb040ce1e074a2444b55d2">chain_order</a>;</div>
+<div class="line"><a id="l00531" name="l00531"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#abd56907c9485830817f7b30870726aeb">  531</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#abd56907c9485830817f7b30870726aeb">user_data</a>; </div>
+<div class="line"><a id="l00532" name="l00532"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a4e68c8cf14552db625e26477650dfb8b">  532</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a4e68c8cf14552db625e26477650dfb8b">user_data2</a>; </div>
+<div class="line"><a id="l00534" name="l00534"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a652eb3eee14e59be703bf28e69ca0671">  534</a></span>        int (*<a class="code hl_variable" href="structIMB__JOB.html#a652eb3eee14e59be703bf28e69ca0671">cipher_func</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *);</div>
+<div class="line"><a id="l00536" name="l00536"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a62883bf8707d09816753832bef5d2902">  536</a></span>        int (*<a class="code hl_variable" href="structIMB__JOB.html#a62883bf8707d09816753832bef5d2902">hash_func</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *);</div>
+<div class="line"><a id="l00539" name="l00539"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a3d7e363be004999d02db464c721e9751">  539</a></span>        <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3d">IMB_SGL_STATE</a> <a class="code hl_variable" href="structIMB__JOB.html#a3d7e363be004999d02db464c721e9751">sgl_state</a>;</div>
+<div class="line"><a id="l00543" name="l00543"></a><span class="lineno">  543</span>        <span class="keyword">union </span>{</div>
+<div class="line"><a id="l00544" name="l00544"></a><span class="lineno">  544</span>                <span class="keyword">struct </span>_CBCS_specific_fields {</div>
+<div class="line"><a id="l00545" name="l00545"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a5d473d9cb01f8e2818a6f5f0c9483bd7">  545</a></span>                        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a5d473d9cb01f8e2818a6f5f0c9483bd7">next_iv</a>;</div>
+<div class="line"><a id="l00547" name="l00547"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a832c73263792bf8895cf028035730c4e">  547</a></span>                } <a class="code hl_variable" href="structIMB__JOB.html#a832c73263792bf8895cf028035730c4e">CBCS</a>; </div>
+<div class="line"><a id="l00548" name="l00548"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a006bf024dd3e809fad23c3df813c6fb2">  548</a></span>        } <a class="code hl_variable" href="structIMB__JOB.html#a006bf024dd3e809fad23c3df813c6fb2">cipher_fields</a>; </div>
+<div class="line"><a id="l00550" name="l00550"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#a2e8f1fefae0b0fe245eb20e5cc2aa830">  550</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__JOB.html#a2e8f1fefae0b0fe245eb20e5cc2aa830">suite_id</a>[4]; </div>
+<div class="line"><a id="l00551" name="l00551"></a><span class="lineno"><a class="line" href="structIMB__JOB.html#ab4571657aa5147f768083e8969ea96c9">  551</a></span>        uint32_t <a class="code hl_variable" href="structIMB__JOB.html#ab4571657aa5147f768083e8969ea96c9">session_id</a>;  </div>
+<div class="line"><a id="l00552" name="l00552"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aed2387ba36d72c3d148fcb9d2802ccf5">  552</a></span>} <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a>;</div>
+<div class="line"><a id="l00553" name="l00553"></a><span class="lineno">  553</span> </div>
+<div class="line"><a id="l00554" name="l00554"></a><span class="lineno">  554</span> </div>
+<div class="line"><a id="l00555" name="l00555"></a><span class="lineno">  555</span><span class="comment">/* KASUMI */</span></div>
+<div class="line"><a id="l00556" name="l00556"></a><span class="lineno">  556</span> </div>
+<div class="line"><a id="l00557" name="l00557"></a><span class="lineno">  557</span><span class="comment">/* 64 precomputed words for key schedule */</span></div>
+<div class="line"><a id="l00558" name="l00558"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a071e04977525b67c8d1accc60937eb67">  558</a></span><span class="preprocessor">#define KASUMI_KEY_SCHEDULE_SIZE  64</span></div>
+<div class="line"><a id="l00559" name="l00559"></a><span class="lineno">  559</span> </div>
+<div class="line"><a id="l00563" name="l00563"></a><span class="lineno"><a class="line" href="structkasumi__key__sched__s.html">  563</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_s</a> {</div>
+<div class="line"><a id="l00565" name="l00565"></a><span class="lineno"><a class="line" href="structkasumi__key__sched__s.html#a7e69de411b81753c10776442bbe03100">  565</a></span>    uint16_t <a class="code hl_variable" href="structkasumi__key__sched__s.html#a7e69de411b81753c10776442bbe03100">sk16</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a071e04977525b67c8d1accc60937eb67">KASUMI_KEY_SCHEDULE_SIZE</a>];      </div>
+<div class="line"><a id="l00566" name="l00566"></a><span class="lineno"><a class="line" href="structkasumi__key__sched__s.html#a091988e7975015d654ccb6904c4fdf39">  566</a></span>    uint16_t <a class="code hl_variable" href="structkasumi__key__sched__s.html#a091988e7975015d654ccb6904c4fdf39">msk16</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a071e04977525b67c8d1accc60937eb67">KASUMI_KEY_SCHEDULE_SIZE</a>];     </div>
+<div class="line"><a id="l00567" name="l00567"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a82d6866ebcf1bd46b684fe473b4b73f2">  567</a></span>} <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a82d6866ebcf1bd46b684fe473b4b73f2">kasumi_key_sched_t</a>;</div>
+<div class="line"><a id="l00568" name="l00568"></a><span class="lineno">  568</span> </div>
+<div class="line"><a id="l00569" name="l00569"></a><span class="lineno">  569</span><span class="comment">/* GCM data structures */</span></div>
+<div class="line"><a id="l00570" name="l00570"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">  570</a></span><span class="preprocessor">#define IMB_GCM_BLOCK_LEN   16</span></div>
+<div class="line"><a id="l00571" name="l00571"></a><span class="lineno">  571</span> </div>
+<div class="line"><a id="l00577" name="l00577"></a><span class="lineno"><a class="line" href="structgcm__context__data.html">  577</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> {</div>
+<div class="line"><a id="l00578" name="l00578"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a98c22f35eb0b4d368e2f454b347ed3b9">  578</a></span>        uint8_t  <a class="code hl_variable" href="structgcm__context__data.html#a98c22f35eb0b4d368e2f454b347ed3b9">aad_hash</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">IMB_GCM_BLOCK_LEN</a>];</div>
+<div class="line"><a id="l00579" name="l00579"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#ab1dadabcbd2002738ec7db7da332e04f">  579</a></span>        uint64_t <a class="code hl_variable" href="structgcm__context__data.html#ab1dadabcbd2002738ec7db7da332e04f">aad_length</a>;</div>
+<div class="line"><a id="l00580" name="l00580"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a0d9e72f85aba9363fcb4f2d757342aa2">  580</a></span>        uint64_t <a class="code hl_variable" href="structgcm__context__data.html#a0d9e72f85aba9363fcb4f2d757342aa2">in_length</a>;</div>
+<div class="line"><a id="l00581" name="l00581"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a2e52ea863c681afe1d3370a987e252f0">  581</a></span>        uint8_t  <a class="code hl_variable" href="structgcm__context__data.html#a2e52ea863c681afe1d3370a987e252f0">partial_block_enc_key</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">IMB_GCM_BLOCK_LEN</a>];</div>
+<div class="line"><a id="l00582" name="l00582"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a84bac4eabc12b81d26898b6fe6728a63">  582</a></span>        uint8_t  <a class="code hl_variable" href="structgcm__context__data.html#a84bac4eabc12b81d26898b6fe6728a63">orig_IV</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">IMB_GCM_BLOCK_LEN</a>];</div>
+<div class="line"><a id="l00583" name="l00583"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a2a454a5e44422aaec135dc7807aa55a4">  583</a></span>        uint8_t  <a class="code hl_variable" href="structgcm__context__data.html#a2a454a5e44422aaec135dc7807aa55a4">current_counter</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">IMB_GCM_BLOCK_LEN</a>];</div>
+<div class="line"><a id="l00584" name="l00584"></a><span class="lineno"><a class="line" href="structgcm__context__data.html#a97411247efd14ab01e7e0da6587bfa0c">  584</a></span>        uint64_t <a class="code hl_variable" href="structgcm__context__data.html#a97411247efd14ab01e7e0da6587bfa0c">partial_block_length</a>;</div>
+<div class="line"><a id="l00585" name="l00585"></a><span class="lineno">  585</span>};</div>
+<div class="line"><a id="l00586" name="l00586"></a><span class="lineno">  586</span><span class="preprocessor">#undef IMB_GCM_BLOCK_LEN</span></div>
+<div class="line"><a id="l00587" name="l00587"></a><span class="lineno">  587</span> </div>
+<div class="line"><a id="l00591" name="l00591"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html">  591</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a> {</div>
+<div class="line"><a id="l00592" name="l00592"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#ae12447b2fd2e9f8a6f09f443bd303887">  592</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#ae12447b2fd2e9f8a6f09f443bd303887">hash</a>[3]; </div>
+<div class="line"><a id="l00593" name="l00593"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#a7b5edcebc9a6bec3776daf6d13bf950c">  593</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#a7b5edcebc9a6bec3776daf6d13bf950c">aad_len</a>; </div>
+<div class="line"><a id="l00594" name="l00594"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#ade4568d041695b318df773787872127f">  594</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#ade4568d041695b318df773787872127f">hash_len</a>; </div>
+<div class="line"><a id="l00595" name="l00595"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#afc74af4af99449f0b9f01338ae723c1a">  595</a></span>        uint8_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#afc74af4af99449f0b9f01338ae723c1a">last_ks</a>[64]; </div>
+<div class="line"><a id="l00596" name="l00596"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#a9ac4fafe2ca37395264f728c8e99a9b1">  596</a></span>        uint8_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#a9ac4fafe2ca37395264f728c8e99a9b1">poly_key</a>[32]; </div>
+<div class="line"><a id="l00597" name="l00597"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#a908d80ce2c35792099dbc967818b9abd">  597</a></span>        uint8_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#a908d80ce2c35792099dbc967818b9abd">poly_scratch</a>[16]; </div>
+<div class="line"><a id="l00598" name="l00598"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#add03511d1f95376b3ac64a7916c27368">  598</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#add03511d1f95376b3ac64a7916c27368">last_block_count</a>; </div>
+<div class="line"><a id="l00599" name="l00599"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#a84693b96048f6130a749b633c65e2105">  599</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#a84693b96048f6130a749b633c65e2105">remain_ks_bytes</a>;</div>
+<div class="line"><a id="l00601" name="l00601"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#a74e971fe76c8b946e30e8f0c8cce111a">  601</a></span>        uint64_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#a74e971fe76c8b946e30e8f0c8cce111a">remain_ct_bytes</a>; </div>
+<div class="line"><a id="l00604" name="l00604"></a><span class="lineno"><a class="line" href="structchacha20__poly1305__context__data.html#ac0d1657fc57308900691369362c56658">  604</a></span>        uint8_t <a class="code hl_variable" href="structchacha20__poly1305__context__data.html#ac0d1657fc57308900691369362c56658">IV</a>[12]; </div>
+<div class="line"><a id="l00605" name="l00605"></a><span class="lineno">  605</span>};</div>
+<div class="line"><a id="l00606" name="l00606"></a><span class="lineno">  606</span> </div>
+<div class="line"><a id="l00611" name="l00611"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a41087ea6dce2e096ebb02a613600c2ed">  611</a></span><span class="preprocessor">#define IMB_MAX_TAG_LEN (16)</span></div>
+<div class="line"><a id="l00612" name="l00612"></a><span class="lineno">  612</span> </div>
+<div class="line"><a id="l00622" name="l00622"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a87884da318b3013893b725d047b53702">  622</a></span><span class="preprocessor">#define IMB_GCM_IV_DATA_LEN (12)</span></div>
+<div class="line"><a id="l00623" name="l00623"></a><span class="lineno">  623</span> </div>
+<div class="line"><a id="l00624" name="l00624"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae97681c203afbd818a39fb797613a232">  624</a></span><span class="preprocessor">#define IMB_GCM_128_KEY_LEN (16)</span></div>
+<div class="line"><a id="l00625" name="l00625"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7201a0be67f1e6f3757169b0166dd47d">  625</a></span><span class="preprocessor">#define IMB_GCM_192_KEY_LEN (24)</span></div>
+<div class="line"><a id="l00626" name="l00626"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4c4c40ec87c2354832f5b182b22d2111">  626</a></span><span class="preprocessor">#define IMB_GCM_256_KEY_LEN (32)</span></div>
+<div class="line"><a id="l00627" name="l00627"></a><span class="lineno">  627</span> </div>
+<div class="line"><a id="l00628" name="l00628"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">  628</a></span><span class="preprocessor">#define IMB_GCM_ENC_KEY_LEN 16</span></div>
+<div class="line"><a id="l00629" name="l00629"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a73715b8c1ba918ce6d5c21749841b47b">  629</a></span><span class="preprocessor">#define IMB_GCM_KEY_SETS    (15) </span></div>
+<div class="line"><a id="l00636" name="l00636"></a><span class="lineno">  636</span><span class="preprocessor">#ifdef __WIN32</span></div>
+<div class="line"><a id="l00637" name="l00637"></a><span class="lineno">  637</span>__declspec(align(64))</div>
+<div class="line"><a id="l00638" name="l00638"></a><span class="lineno">  638</span><span class="preprocessor">#endif </span><span class="comment">/* WIN32 */</span><span class="preprocessor"></span></div>
+<div class="line"><a id="l00639" name="l00639"></a><span class="lineno"><a class="line" href="structgcm__key__data.html">  639</a></span><span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> {</div>
+<div class="line"><a id="l00640" name="l00640"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#aa5bda4f55b8393be151cfe28a9dc1ca9">  640</a></span>        uint8_t <a class="code hl_variable" href="structgcm__key__data.html#aa5bda4f55b8393be151cfe28a9dc1ca9">expanded_keys</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a> * <a class="code hl_define" href="intel-ipsec-mb_8h.html#a73715b8c1ba918ce6d5c21749841b47b">IMB_GCM_KEY_SETS</a>];</div>
+<div class="line"><a id="l00641" name="l00641"></a><span class="lineno">  641</span>        <span class="keyword">union </span>{</div>
+<div class="line"><a id="l00643" name="l00643"></a><span class="lineno">  643</span>                <span class="keyword">struct </span>{</div>
+<div class="line"><a id="l00649" name="l00649"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#a1c73e3891c50c5e03e82715ceda77d17">  649</a></span>                        uint8_t <a class="code hl_variable" href="structgcm__key__data.html#a1c73e3891c50c5e03e82715ceda77d17">shifted_hkey</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a> * 8];</div>
+<div class="line"><a id="l00658" name="l00658"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#a570a82f076ceb5da6719d1a554584820">  658</a></span>                        uint8_t <a class="code hl_variable" href="structgcm__key__data.html#a570a82f076ceb5da6719d1a554584820">shifted_hkey_k</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a> * 8];</div>
+<div class="line"><a id="l00659" name="l00659"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#a908988e25607cd3e092bfcea9964deb1">  659</a></span>                } <a class="code hl_variable" href="structgcm__key__data.html#a908988e25607cd3e092bfcea9964deb1">sse_avx</a>;</div>
+<div class="line"><a id="l00660" name="l00660"></a><span class="lineno">  660</span>                <span class="keyword">struct </span>{</div>
+<div class="line"><a id="l00666" name="l00666"></a><span class="lineno">  666</span>                        uint8_t <a class="code hl_variable" href="structgcm__key__data.html#a1c73e3891c50c5e03e82715ceda77d17">shifted_hkey</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a> * 8];</div>
+<div class="line"><a id="l00667" name="l00667"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#a3f231fdc1d521cd15c111667e4aea818">  667</a></span>                } <a class="code hl_variable" href="structgcm__key__data.html#a3f231fdc1d521cd15c111667e4aea818">avx2_avx512</a>;</div>
+<div class="line"><a id="l00668" name="l00668"></a><span class="lineno">  668</span>                <span class="keyword">struct </span>{</div>
+<div class="line"><a id="l00679" name="l00679"></a><span class="lineno">  679</span>                        uint8_t <a class="code hl_variable" href="structgcm__key__data.html#a1c73e3891c50c5e03e82715ceda77d17">shifted_hkey</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a> * 32 * 2];</div>
+<div class="line"><a id="l00680" name="l00680"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#a7ad44e105b23e41b7f79530b6370e509">  680</a></span>                } <a class="code hl_variable" href="structgcm__key__data.html#a7ad44e105b23e41b7f79530b6370e509">vaes_avx512</a>;</div>
+<div class="line"><a id="l00681" name="l00681"></a><span class="lineno"><a class="line" href="structgcm__key__data.html#af5adb4225d569050207cfcfe00fe273a">  681</a></span>        } <a class="code hl_variable" href="structgcm__key__data.html#af5adb4225d569050207cfcfe00fe273a">ghash_keys</a>;</div>
+<div class="line"><a id="l00682" name="l00682"></a><span class="lineno">  682</span>}</div>
+<div class="line"><a id="l00683" name="l00683"></a><span class="lineno">  683</span><span class="preprocessor">#ifdef LINUX</span></div>
+<div class="line"><a id="l00684" name="l00684"></a><span class="lineno">  684</span>__attribute__((aligned(64)));</div>
+<div class="line"><a id="l00685" name="l00685"></a><span class="lineno">  685</span><span class="preprocessor">#else</span></div>
+<div class="line"><a id="l00686" name="l00686"></a><span class="lineno">  686</span>;</div>
+<div class="line"><a id="l00687" name="l00687"></a><span class="lineno">  687</span><span class="preprocessor">#endif</span></div>
+<div class="line"><a id="l00688" name="l00688"></a><span class="lineno">  688</span> </div>
+<div class="line"><a id="l00689" name="l00689"></a><span class="lineno">  689</span><span class="preprocessor">#undef IMB_GCM_ENC_KEY_LEN</span></div>
+<div class="line"><a id="l00690" name="l00690"></a><span class="lineno">  690</span><span class="preprocessor">#undef IMB_GCM_KEY_SETS</span></div>
+<div class="line"><a id="l00691" name="l00691"></a><span class="lineno">  691</span> </div>
+<div class="line"><a id="l00692" name="l00692"></a><span class="lineno">  692</span><span class="comment">/* API data type definitions */</span></div>
+<div class="line"><a id="l00693" name="l00693"></a><span class="lineno">  693</span><span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a>;</div>
+<div class="line"><a id="l00694" name="l00694"></a><span class="lineno">  694</span> </div>
+<div class="line"><a id="l00695" name="l00695"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af0c38ca0a5aac81d8db7e0cc2811426b">  695</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af0c38ca0a5aac81d8db7e0cc2811426b">init_mb_mgr_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
+<div class="line"><a id="l00696" name="l00696"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5a533d852e3b65e9e5978fec37da43b5">  696</a></span><span class="keyword">typedef</span> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *(*get_next_job_t)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
+<div class="line"><a id="l00697" name="l00697"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a41297d789b434157e746e338f0af96ec">  697</a></span><span class="keyword">typedef</span> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *(*submit_job_t)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
+<div class="line"><a id="l00698" name="l00698"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac8cb9a545cdef14f60f36fe8888e6e7c">  698</a></span><span class="keyword">typedef</span> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *(*get_completed_job_t)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
+<div class="line"><a id="l00699" name="l00699"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae64d0f677e42b8f8d50289113cf5e01e">  699</a></span><span class="keyword">typedef</span> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *(*flush_job_t)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
+<div class="line"><a id="l00700" name="l00700"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9884ae92b598dd504f7d0ef8be5051d6">  700</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a9884ae92b598dd504f7d0ef8be5051d6">queue_size_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
+<div class="line"><a id="l00701" name="l00701"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aaeed8e5ec28aba6b8deef269b7c4bb28">  701</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aaeed8e5ec28aba6b8deef269b7c4bb28">burst_fn_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *,</div>
+<div class="line"><a id="l00702" name="l00702"></a><span class="lineno">  702</span>                               <span class="keyword">const</span> uint32_t,</div>
+<div class="line"><a id="l00703" name="l00703"></a><span class="lineno">  703</span>                               <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> **);</div>
+<div class="line"><a id="l00704" name="l00704"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009">  704</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009">submit_cipher_burst_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *,</div>
+<div class="line"><a id="l00705" name="l00705"></a><span class="lineno">  705</span>                                          <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *,</div>
+<div class="line"><a id="l00706" name="l00706"></a><span class="lineno">  706</span>                                          <span class="keyword">const</span> uint32_t,</div>
+<div class="line"><a id="l00707" name="l00707"></a><span class="lineno">  707</span>                                          <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334c">IMB_CIPHER_MODE</a> cipher,</div>
+<div class="line"><a id="l00708" name="l00708"></a><span class="lineno">  708</span>                                          <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">IMB_CIPHER_DIRECTION</a> dir,</div>
+<div class="line"><a id="l00709" name="l00709"></a><span class="lineno">  709</span>                                          <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a> key_size);</div>
+<div class="line"><a id="l00710" name="l00710"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5">  710</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5">submit_hash_burst_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *,</div>
+<div class="line"><a id="l00711" name="l00711"></a><span class="lineno">  711</span>                                        <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *,</div>
+<div class="line"><a id="l00712" name="l00712"></a><span class="lineno">  712</span>                                        <span class="keyword">const</span> uint32_t,</div>
+<div class="line"><a id="l00713" name="l00713"></a><span class="lineno">  713</span>                                        <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">IMB_HASH_ALG</a> hash);</div>
+<div class="line"><a id="l00714" name="l00714"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">  714</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">keyexp_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *);</div>
+<div class="line"><a id="l00715" name="l00715"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aab07996d622d682adc1db8286e633cb3">  715</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aab07996d622d682adc1db8286e633cb3">cmac_subkey_gen_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *);</div>
+<div class="line"><a id="l00716" name="l00716"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">  716</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *);</div>
+<div class="line"><a id="l00717" name="l00717"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">  717</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">hash_fn_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t, <span class="keywordtype">void</span> *);</div>
+<div class="line"><a id="l00718" name="l00718"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abb36f71b9fb4d928c2ad9fa462b80ae6">  718</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#abb36f71b9fb4d928c2ad9fa462b80ae6">xcbc_keyexp_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *);</div>
+<div class="line"><a id="l00719" name="l00719"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a60a93569304a978c798bb8c4a4f7f52f">  719</a></span><span class="keyword">typedef</span> int (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60a93569304a978c798bb8c4a4f7f52f">des_keysched_t</a>)(uint64_t *, <span class="keyword">const</span> <span class="keywordtype">void</span> *);</div>
+<div class="line"><a id="l00720" name="l00720"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aeb837fda81cdf56ffcfa4e68b5877a35">  720</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aeb837fda81cdf56ffcfa4e68b5877a35">aes_cfb_t</a>)(<span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00721" name="l00721"></a><span class="lineno">  721</span>                          uint64_t);</div>
+<div class="line"><a id="l00722" name="l00722"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a71fb9f25bcab533a98f3d1c5cc2c7f48">  722</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a71fb9f25bcab533a98f3d1c5cc2c7f48">aes_gcm_enc_dec_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
+<div class="line"><a id="l00723" name="l00723"></a><span class="lineno">  723</span>                                  <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
+<div class="line"><a id="l00724" name="l00724"></a><span class="lineno">  724</span>                                  uint8_t *, uint8_t <span class="keyword">const</span> *, uint64_t,</div>
+<div class="line"><a id="l00725" name="l00725"></a><span class="lineno">  725</span>                                  <span class="keyword">const</span> uint8_t *, uint8_t <span class="keyword">const</span> *, uint64_t,</div>
+<div class="line"><a id="l00726" name="l00726"></a><span class="lineno">  726</span>                                  uint8_t *, uint64_t);</div>
+<div class="line"><a id="l00727" name="l00727"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac5bfb31d18fdc55451cd325c4af032c7">  727</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac5bfb31d18fdc55451cd325c4af032c7">aes_gcm_enc_dec_iv_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
+<div class="line"><a id="l00728" name="l00728"></a><span class="lineno">  728</span>                                     <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *, uint8_t *,</div>
+<div class="line"><a id="l00729" name="l00729"></a><span class="lineno">  729</span>                                     uint8_t <span class="keyword">const</span> *, <span class="keyword">const</span> uint64_t,</div>
+<div class="line"><a id="l00730" name="l00730"></a><span class="lineno">  730</span>                                     <span class="keyword">const</span> uint8_t *, uint8_t <span class="keyword">const</span> *,</div>
+<div class="line"><a id="l00731" name="l00731"></a><span class="lineno">  731</span>                                     <span class="keyword">const</span> uint64_t, uint8_t *,</div>
+<div class="line"><a id="l00732" name="l00732"></a><span class="lineno">  732</span>                                     <span class="keyword">const</span> uint64_t, <span class="keyword">const</span> uint64_t);</div>
+<div class="line"><a id="l00733" name="l00733"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adeecd4bac067493d8465e8d7b6b7dd6d">  733</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#adeecd4bac067493d8465e8d7b6b7dd6d">aes_gcm_init_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
+<div class="line"><a id="l00734" name="l00734"></a><span class="lineno">  734</span>                               <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
+<div class="line"><a id="l00735" name="l00735"></a><span class="lineno">  735</span>                               <span class="keyword">const</span> uint8_t *, uint8_t <span class="keyword">const</span> *, uint64_t);</div>
+<div class="line"><a id="l00736" name="l00736"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d">  736</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d">aes_gcm_init_var_iv_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
+<div class="line"><a id="l00737" name="l00737"></a><span class="lineno">  737</span>                                      <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
+<div class="line"><a id="l00738" name="l00738"></a><span class="lineno">  738</span>                                      <span class="keyword">const</span> uint8_t *, <span class="keyword">const</span> uint64_t,</div>
+<div class="line"><a id="l00739" name="l00739"></a><span class="lineno">  739</span>                                      <span class="keyword">const</span> uint8_t *, <span class="keyword">const</span> uint64_t);</div>
+<div class="line"><a id="l00740" name="l00740"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af701adcd98fd95084d76e0cb0f926fef">  740</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af701adcd98fd95084d76e0cb0f926fef">aes_gcm_enc_dec_update_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
+<div class="line"><a id="l00741" name="l00741"></a><span class="lineno">  741</span>                                         <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
+<div class="line"><a id="l00742" name="l00742"></a><span class="lineno">  742</span>                                         uint8_t *, <span class="keyword">const</span> uint8_t *, uint64_t);</div>
+<div class="line"><a id="l00743" name="l00743"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">  743</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
+<div class="line"><a id="l00744" name="l00744"></a><span class="lineno">  744</span>                                           <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
+<div class="line"><a id="l00745" name="l00745"></a><span class="lineno">  745</span>                                           uint8_t *, uint64_t);</div>
+<div class="line"><a id="l00746" name="l00746"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">  746</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">aes_gcm_precomp_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *);</div>
+<div class="line"><a id="l00747" name="l00747"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">  747</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *);</div>
+<div class="line"><a id="l00748" name="l00748"></a><span class="lineno">  748</span> </div>
+<div class="line"><a id="l00749" name="l00749"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">  749</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">aes_gmac_init_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
+<div class="line"><a id="l00750" name="l00750"></a><span class="lineno">  750</span>                                <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
+<div class="line"><a id="l00751" name="l00751"></a><span class="lineno">  751</span>                                <span class="keyword">const</span> uint8_t *, <span class="keyword">const</span> uint64_t);</div>
+<div class="line"><a id="l00752" name="l00752"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">  752</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">aes_gmac_update_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
+<div class="line"><a id="l00753" name="l00753"></a><span class="lineno">  753</span>                                  <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
+<div class="line"><a id="l00754" name="l00754"></a><span class="lineno">  754</span>                                  <span class="keyword">const</span> uint8_t *, <span class="keyword">const</span> uint64_t);</div>
+<div class="line"><a id="l00755" name="l00755"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">  755</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">aes_gmac_finalize_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
+<div class="line"><a id="l00756" name="l00756"></a><span class="lineno">  756</span>                                  <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
+<div class="line"><a id="l00757" name="l00757"></a><span class="lineno">  757</span>                                  uint8_t *, <span class="keyword">const</span> uint64_t);</div>
+<div class="line"><a id="l00758" name="l00758"></a><span class="lineno">  758</span> </div>
+<div class="line"><a id="l00759" name="l00759"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4b0b9ffa331f8d675d24911639f0374f">  759</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4b0b9ffa331f8d675d24911639f0374f">chacha_poly_init_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00760" name="l00760"></a><span class="lineno">  760</span>                                   <span class="keyword">struct </span><a class="code hl_struct" href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a> *,</div>
+<div class="line"><a id="l00761" name="l00761"></a><span class="lineno">  761</span>                                   <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t);</div>
+<div class="line"><a id="l00762" name="l00762"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548">  762</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548">chacha_poly_enc_dec_update_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00763" name="l00763"></a><span class="lineno">  763</span>                                     <span class="keyword">struct </span><a class="code hl_struct" href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a> *,</div>
+<div class="line"><a id="l00764" name="l00764"></a><span class="lineno">  764</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t);</div>
+<div class="line"><a id="l00765" name="l00765"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1a96f063bf1bd07de158985b57cff4a0">  765</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a1a96f063bf1bd07de158985b57cff4a0">chacha_poly_finalize_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a> *,</div>
+<div class="line"><a id="l00766" name="l00766"></a><span class="lineno">  766</span>                                    <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t);</div>
+<div class="line"><a id="l00767" name="l00767"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a12e0c05f0ecec8d75d4b288a7ec11c84">  767</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a12e0c05f0ecec8d75d4b288a7ec11c84">ghash_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00768" name="l00768"></a><span class="lineno">  768</span>                        <span class="keyword">const</span> uint64_t, <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t);</div>
+<div class="line"><a id="l00769" name="l00769"></a><span class="lineno">  769</span> </div>
+<div class="line"><a id="l00770" name="l00770"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0a3032f0698c42bd486d053e90c44fdd">  770</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a0a3032f0698c42bd486d053e90c44fdd">zuc_eea3_1_buffer_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00771" name="l00771"></a><span class="lineno">  771</span>                                    <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t);</div>
 <div class="line"><a id="l00772" name="l00772"></a><span class="lineno">  772</span> </div>
-<div class="line"><a id="l00773" name="l00773"></a><span class="lineno">  773</span><span class="preprocessor">#undef IMB_GCM_ENC_KEY_LEN</span></div>
-<div class="line"><a id="l00774" name="l00774"></a><span class="lineno">  774</span><span class="preprocessor">#undef IMB_GCM_KEY_SETS</span></div>
-<div class="line"><a id="l00775" name="l00775"></a><span class="lineno">  775</span> </div>
-<div class="line"><a id="l00776" name="l00776"></a><span class="lineno">  776</span><span class="comment">/* API data type definitions */</span></div>
-<div class="line"><a id="l00777" name="l00777"></a><span class="lineno">  777</span><span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a>;</div>
-<div class="line"><a id="l00778" name="l00778"></a><span class="lineno">  778</span> </div>
-<div class="line"><a id="l00779" name="l00779"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af0c38ca0a5aac81d8db7e0cc2811426b">  779</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af0c38ca0a5aac81d8db7e0cc2811426b">init_mb_mgr_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
-<div class="line"><a id="l00780" name="l00780"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5a533d852e3b65e9e5978fec37da43b5">  780</a></span><span class="keyword">typedef</span> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *(*get_next_job_t)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
-<div class="line"><a id="l00781" name="l00781"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a41297d789b434157e746e338f0af96ec">  781</a></span><span class="keyword">typedef</span> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *(*submit_job_t)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
-<div class="line"><a id="l00782" name="l00782"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac8cb9a545cdef14f60f36fe8888e6e7c">  782</a></span><span class="keyword">typedef</span> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *(*get_completed_job_t)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
-<div class="line"><a id="l00783" name="l00783"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae64d0f677e42b8f8d50289113cf5e01e">  783</a></span><span class="keyword">typedef</span> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *(*flush_job_t)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
-<div class="line"><a id="l00784" name="l00784"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9884ae92b598dd504f7d0ef8be5051d6">  784</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a9884ae92b598dd504f7d0ef8be5051d6">queue_size_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *);</div>
-<div class="line"><a id="l00785" name="l00785"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0cf6acb86385bc984ec5f916fe6e1066">  785</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a0cf6acb86385bc984ec5f916fe6e1066">submit_burst_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *,</div>
-<div class="line"><a id="l00786" name="l00786"></a><span class="lineno">  786</span>                                   <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *, <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00787" name="l00787"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009">  787</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009">submit_cipher_burst_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *,</div>
-<div class="line"><a id="l00788" name="l00788"></a><span class="lineno">  788</span>                                          <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *,</div>
-<div class="line"><a id="l00789" name="l00789"></a><span class="lineno">  789</span>                                          <span class="keyword">const</span> uint32_t,</div>
-<div class="line"><a id="l00790" name="l00790"></a><span class="lineno">  790</span>                                          <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334c">IMB_CIPHER_MODE</a> cipher,</div>
-<div class="line"><a id="l00791" name="l00791"></a><span class="lineno">  791</span>                                          <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">IMB_CIPHER_DIRECTION</a> dir,</div>
-<div class="line"><a id="l00792" name="l00792"></a><span class="lineno">  792</span>                                          <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a> key_size);</div>
-<div class="line"><a id="l00793" name="l00793"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5">  793</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5">submit_hash_burst_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *,</div>
-<div class="line"><a id="l00794" name="l00794"></a><span class="lineno">  794</span>                                        <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *,</div>
-<div class="line"><a id="l00795" name="l00795"></a><span class="lineno">  795</span>                                        <span class="keyword">const</span> uint32_t,</div>
-<div class="line"><a id="l00796" name="l00796"></a><span class="lineno">  796</span>                                        <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">IMB_HASH_ALG</a> hash);</div>
-<div class="line"><a id="l00797" name="l00797"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">  797</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">keyexp_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *);</div>
-<div class="line"><a id="l00798" name="l00798"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aab07996d622d682adc1db8286e633cb3">  798</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aab07996d622d682adc1db8286e633cb3">cmac_subkey_gen_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *);</div>
-<div class="line"><a id="l00799" name="l00799"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">  799</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *);</div>
-<div class="line"><a id="l00800" name="l00800"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">  800</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">hash_fn_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t, <span class="keywordtype">void</span> *);</div>
-<div class="line"><a id="l00801" name="l00801"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abb36f71b9fb4d928c2ad9fa462b80ae6">  801</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#abb36f71b9fb4d928c2ad9fa462b80ae6">xcbc_keyexp_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *);</div>
-<div class="line"><a id="l00802" name="l00802"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a60a93569304a978c798bb8c4a4f7f52f">  802</a></span><span class="keyword">typedef</span> int (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60a93569304a978c798bb8c4a4f7f52f">des_keysched_t</a>)(uint64_t *, <span class="keyword">const</span> <span class="keywordtype">void</span> *);</div>
-<div class="line"><a id="l00803" name="l00803"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aeb837fda81cdf56ffcfa4e68b5877a35">  803</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aeb837fda81cdf56ffcfa4e68b5877a35">aes_cfb_t</a>)(<span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00804" name="l00804"></a><span class="lineno">  804</span>                          uint64_t);</div>
-<div class="line"><a id="l00805" name="l00805"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a71fb9f25bcab533a98f3d1c5cc2c7f48">  805</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a71fb9f25bcab533a98f3d1c5cc2c7f48">aes_gcm_enc_dec_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
-<div class="line"><a id="l00806" name="l00806"></a><span class="lineno">  806</span>                                  <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
-<div class="line"><a id="l00807" name="l00807"></a><span class="lineno">  807</span>                                  uint8_t *, uint8_t <span class="keyword">const</span> *, uint64_t,</div>
-<div class="line"><a id="l00808" name="l00808"></a><span class="lineno">  808</span>                                  <span class="keyword">const</span> uint8_t *, uint8_t <span class="keyword">const</span> *, uint64_t,</div>
-<div class="line"><a id="l00809" name="l00809"></a><span class="lineno">  809</span>                                  uint8_t *, uint64_t);</div>
-<div class="line"><a id="l00810" name="l00810"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac5bfb31d18fdc55451cd325c4af032c7">  810</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac5bfb31d18fdc55451cd325c4af032c7">aes_gcm_enc_dec_iv_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
-<div class="line"><a id="l00811" name="l00811"></a><span class="lineno">  811</span>                                     <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *, uint8_t *,</div>
-<div class="line"><a id="l00812" name="l00812"></a><span class="lineno">  812</span>                                     uint8_t <span class="keyword">const</span> *, <span class="keyword">const</span> uint64_t,</div>
-<div class="line"><a id="l00813" name="l00813"></a><span class="lineno">  813</span>                                     <span class="keyword">const</span> uint8_t *, uint8_t <span class="keyword">const</span> *,</div>
-<div class="line"><a id="l00814" name="l00814"></a><span class="lineno">  814</span>                                     <span class="keyword">const</span> uint64_t, uint8_t *,</div>
-<div class="line"><a id="l00815" name="l00815"></a><span class="lineno">  815</span>                                     <span class="keyword">const</span> uint64_t, <span class="keyword">const</span> uint64_t);</div>
-<div class="line"><a id="l00816" name="l00816"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adeecd4bac067493d8465e8d7b6b7dd6d">  816</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#adeecd4bac067493d8465e8d7b6b7dd6d">aes_gcm_init_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
-<div class="line"><a id="l00817" name="l00817"></a><span class="lineno">  817</span>                               <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
-<div class="line"><a id="l00818" name="l00818"></a><span class="lineno">  818</span>                               <span class="keyword">const</span> uint8_t *, uint8_t <span class="keyword">const</span> *, uint64_t);</div>
-<div class="line"><a id="l00819" name="l00819"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d">  819</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d">aes_gcm_init_var_iv_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
-<div class="line"><a id="l00820" name="l00820"></a><span class="lineno">  820</span>                                      <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
-<div class="line"><a id="l00821" name="l00821"></a><span class="lineno">  821</span>                                      <span class="keyword">const</span> uint8_t *, <span class="keyword">const</span> uint64_t,</div>
-<div class="line"><a id="l00822" name="l00822"></a><span class="lineno">  822</span>                                      <span class="keyword">const</span> uint8_t *, <span class="keyword">const</span> uint64_t);</div>
-<div class="line"><a id="l00823" name="l00823"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af701adcd98fd95084d76e0cb0f926fef">  823</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af701adcd98fd95084d76e0cb0f926fef">aes_gcm_enc_dec_update_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
-<div class="line"><a id="l00824" name="l00824"></a><span class="lineno">  824</span>                                         <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
-<div class="line"><a id="l00825" name="l00825"></a><span class="lineno">  825</span>                                         uint8_t *, <span class="keyword">const</span> uint8_t *, uint64_t);</div>
-<div class="line"><a id="l00826" name="l00826"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">  826</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
-<div class="line"><a id="l00827" name="l00827"></a><span class="lineno">  827</span>                                           <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
-<div class="line"><a id="l00828" name="l00828"></a><span class="lineno">  828</span>                                           uint8_t *, uint64_t);</div>
-<div class="line"><a id="l00829" name="l00829"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">  829</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">aes_gcm_precomp_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *);</div>
-<div class="line"><a id="l00830" name="l00830"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">  830</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *);</div>
-<div class="line"><a id="l00831" name="l00831"></a><span class="lineno">  831</span> </div>
-<div class="line"><a id="l00832" name="l00832"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">  832</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">aes_gmac_init_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
-<div class="line"><a id="l00833" name="l00833"></a><span class="lineno">  833</span>                                <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
-<div class="line"><a id="l00834" name="l00834"></a><span class="lineno">  834</span>                                <span class="keyword">const</span> uint8_t *, <span class="keyword">const</span> uint64_t);</div>
-<div class="line"><a id="l00835" name="l00835"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">  835</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">aes_gmac_update_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
-<div class="line"><a id="l00836" name="l00836"></a><span class="lineno">  836</span>                                  <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
-<div class="line"><a id="l00837" name="l00837"></a><span class="lineno">  837</span>                                  <span class="keyword">const</span> uint8_t *, <span class="keyword">const</span> uint64_t);</div>
-<div class="line"><a id="l00838" name="l00838"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">  838</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">aes_gmac_finalize_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *,</div>
-<div class="line"><a id="l00839" name="l00839"></a><span class="lineno">  839</span>                                  <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *,</div>
-<div class="line"><a id="l00840" name="l00840"></a><span class="lineno">  840</span>                                  uint8_t *, <span class="keyword">const</span> uint64_t);</div>
-<div class="line"><a id="l00841" name="l00841"></a><span class="lineno">  841</span> </div>
-<div class="line"><a id="l00842" name="l00842"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4b0b9ffa331f8d675d24911639f0374f">  842</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4b0b9ffa331f8d675d24911639f0374f">chacha_poly_init_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00843" name="l00843"></a><span class="lineno">  843</span>                                   <span class="keyword">struct </span><a class="code hl_struct" href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a> *,</div>
-<div class="line"><a id="l00844" name="l00844"></a><span class="lineno">  844</span>                                   <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t);</div>
-<div class="line"><a id="l00845" name="l00845"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548">  845</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548">chacha_poly_enc_dec_update_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00846" name="l00846"></a><span class="lineno">  846</span>                                     <span class="keyword">struct </span><a class="code hl_struct" href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a> *,</div>
-<div class="line"><a id="l00847" name="l00847"></a><span class="lineno">  847</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t);</div>
-<div class="line"><a id="l00848" name="l00848"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1a96f063bf1bd07de158985b57cff4a0">  848</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a1a96f063bf1bd07de158985b57cff4a0">chacha_poly_finalize_t</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a> *,</div>
-<div class="line"><a id="l00849" name="l00849"></a><span class="lineno">  849</span>                                    <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t);</div>
-<div class="line"><a id="l00850" name="l00850"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a12e0c05f0ecec8d75d4b288a7ec11c84">  850</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a12e0c05f0ecec8d75d4b288a7ec11c84">ghash_t</a>)(<span class="keyword">const</span> <span class="keyword">struct </span><a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00851" name="l00851"></a><span class="lineno">  851</span>                        <span class="keyword">const</span> uint64_t, <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t);</div>
-<div class="line"><a id="l00852" name="l00852"></a><span class="lineno">  852</span> </div>
-<div class="line"><a id="l00853" name="l00853"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0a3032f0698c42bd486d053e90c44fdd">  853</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a0a3032f0698c42bd486d053e90c44fdd">zuc_eea3_1_buffer_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00854" name="l00854"></a><span class="lineno">  854</span>                                    <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00855" name="l00855"></a><span class="lineno">  855</span> </div>
-<div class="line"><a id="l00856" name="l00856"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7df2e3f063333d677ef7668626126c4d">  856</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a7df2e3f063333d677ef7668626126c4d">zuc_eea3_4_buffer_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *,</div>
-<div class="line"><a id="l00857" name="l00857"></a><span class="lineno">  857</span>                                    <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *, <span class="keywordtype">void</span> **,</div>
-<div class="line"><a id="l00858" name="l00858"></a><span class="lineno">  858</span>                                    <span class="keyword">const</span> uint32_t *);</div>
-<div class="line"><a id="l00859" name="l00859"></a><span class="lineno">  859</span> </div>
-<div class="line"><a id="l00860" name="l00860"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a303f2dd11b1193938596b4ec69edf8cc">  860</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a303f2dd11b1193938596b4ec69edf8cc">zuc_eea3_n_buffer_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *,</div>
-<div class="line"><a id="l00861" name="l00861"></a><span class="lineno">  861</span>                                    <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *, <span class="keywordtype">void</span> **,</div>
-<div class="line"><a id="l00862" name="l00862"></a><span class="lineno">  862</span>                                    <span class="keyword">const</span> uint32_t *, <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00863" name="l00863"></a><span class="lineno">  863</span> </div>
-<div class="line"><a id="l00864" name="l00864"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a95ed5580686f708ba2313179cd6064a8">  864</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a95ed5580686f708ba2313179cd6064a8">zuc_eia3_1_buffer_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00865" name="l00865"></a><span class="lineno">  865</span>                                    <span class="keyword">const</span> uint32_t, uint32_t *);</div>
-<div class="line"><a id="l00866" name="l00866"></a><span class="lineno">  866</span> </div>
-<div class="line"><a id="l00867" name="l00867"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ada45082bb04dd727c0deec5c4fc96fed">  867</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ada45082bb04dd727c0deec5c4fc96fed">zuc_eia3_n_buffer_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *,</div>
-<div class="line"><a id="l00868" name="l00868"></a><span class="lineno">  868</span>                                    <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *,</div>
-<div class="line"><a id="l00869" name="l00869"></a><span class="lineno">  869</span>                                    <span class="keyword">const</span> uint32_t *, uint32_t **,</div>
-<div class="line"><a id="l00870" name="l00870"></a><span class="lineno">  870</span>                                    <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00871" name="l00871"></a><span class="lineno">  871</span> </div>
-<div class="line"><a id="l00872" name="l00872"></a><span class="lineno">  872</span> </div>
-<div class="line"><a id="l00873" name="l00873"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a89fe975f0388b71765be494d04b034f4">  873</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a89fe975f0388b71765be494d04b034f4">kasumi_f8_1_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
-<div class="line"><a id="l00874" name="l00874"></a><span class="lineno">  874</span>                                     <span class="keyword">const</span> uint64_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00875" name="l00875"></a><span class="lineno">  875</span>                                     <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00876" name="l00876"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a81afa744fb5669fe37cf0dce2193d8a7">  876</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a81afa744fb5669fe37cf0dce2193d8a7">kasumi_f8_1_buffer_bit_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
-<div class="line"><a id="l00877" name="l00877"></a><span class="lineno">  877</span>                                         <span class="keyword">const</span> uint64_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00878" name="l00878"></a><span class="lineno">  878</span>                                         <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00879" name="l00879"></a><span class="lineno">  879</span>                                         <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00880" name="l00880"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af1eb074f5da469fa655d1404be8701dd">  880</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af1eb074f5da469fa655d1404be8701dd">kasumi_f8_2_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
-<div class="line"><a id="l00881" name="l00881"></a><span class="lineno">  881</span>                                     <span class="keyword">const</span> uint64_t,  <span class="keyword">const</span> uint64_t,</div>
-<div class="line"><a id="l00882" name="l00882"></a><span class="lineno">  882</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00883" name="l00883"></a><span class="lineno">  883</span>                                     <span class="keyword">const</span> uint32_t,</div>
-<div class="line"><a id="l00884" name="l00884"></a><span class="lineno">  884</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00885" name="l00885"></a><span class="lineno">  885</span>                                     <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00886" name="l00886"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a53ecac7e009fcbeee603f975a45d3012">  886</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a53ecac7e009fcbeee603f975a45d3012">kasumi_f8_3_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
-<div class="line"><a id="l00887" name="l00887"></a><span class="lineno">  887</span>                                     <span class="keyword">const</span> uint64_t,  <span class="keyword">const</span> uint64_t,</div>
-<div class="line"><a id="l00888" name="l00888"></a><span class="lineno">  888</span>                                     <span class="keyword">const</span> uint64_t,</div>
-<div class="line"><a id="l00889" name="l00889"></a><span class="lineno">  889</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00890" name="l00890"></a><span class="lineno">  890</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00891" name="l00891"></a><span class="lineno">  891</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00892" name="l00892"></a><span class="lineno">  892</span>                                     <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00893" name="l00893"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#accf08a616e22a2c56e6a37d56f38b354">  893</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#accf08a616e22a2c56e6a37d56f38b354">kasumi_f8_4_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
-<div class="line"><a id="l00894" name="l00894"></a><span class="lineno">  894</span>                                     <span class="keyword">const</span> uint64_t,  <span class="keyword">const</span> uint64_t,</div>
-<div class="line"><a id="l00895" name="l00895"></a><span class="lineno">  895</span>                                     <span class="keyword">const</span> uint64_t,  <span class="keyword">const</span> uint64_t,</div>
-<div class="line"><a id="l00896" name="l00896"></a><span class="lineno">  896</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00897" name="l00897"></a><span class="lineno">  897</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00898" name="l00898"></a><span class="lineno">  898</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00899" name="l00899"></a><span class="lineno">  899</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00900" name="l00900"></a><span class="lineno">  900</span>                                     <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00901" name="l00901"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a51bbde186cdd437b6f9448e19a58e8a1">  901</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a51bbde186cdd437b6f9448e19a58e8a1">kasumi_f8_n_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
-<div class="line"><a id="l00902" name="l00902"></a><span class="lineno">  902</span>                                     <span class="keyword">const</span> uint64_t *, <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *,</div>
-<div class="line"><a id="l00903" name="l00903"></a><span class="lineno">  903</span>                                     <span class="keywordtype">void</span> **, <span class="keyword">const</span> uint32_t *,</div>
-<div class="line"><a id="l00904" name="l00904"></a><span class="lineno">  904</span>                                     <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00905" name="l00905"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac17147d04602964bea59322ff31ebf59">  905</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac17147d04602964bea59322ff31ebf59">kasumi_f9_1_buffer_user_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
-<div class="line"><a id="l00906" name="l00906"></a><span class="lineno">  906</span>                                          <span class="keyword">const</span> uint64_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00907" name="l00907"></a><span class="lineno">  907</span>                                          <span class="keyword">const</span> uint32_t, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00908" name="l00908"></a><span class="lineno">  908</span>                                          <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00909" name="l00909"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8b02114f003b5fe0e1ccbfdc13ac55e4">  909</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8b02114f003b5fe0e1ccbfdc13ac55e4">kasumi_f9_1_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
-<div class="line"><a id="l00910" name="l00910"></a><span class="lineno">  910</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00911" name="l00911"></a><span class="lineno">  911</span>                                     <span class="keyword">const</span> uint32_t, <span class="keywordtype">void</span> *);</div>
-<div class="line"><a id="l00912" name="l00912"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7bec62666456d8962676961cf187ac80">  912</a></span><span class="keyword">typedef</span> int (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a7bec62666456d8962676961cf187ac80">kasumi_init_f8_key_sched_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00913" name="l00913"></a><span class="lineno">  913</span>                                          <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *);</div>
-<div class="line"><a id="l00914" name="l00914"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8b30db8462aca1c039c3fd20646f342c">  914</a></span><span class="keyword">typedef</span> int (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8b30db8462aca1c039c3fd20646f342c">kasumi_init_f9_key_sched_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00915" name="l00915"></a><span class="lineno">  915</span>                                          <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *);</div>
-<div class="line"><a id="l00916" name="l00916"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad7444c36024a63025e7682c16946a00a">  916</a></span><span class="keyword">typedef</span> size_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ad7444c36024a63025e7682c16946a00a">kasumi_key_sched_size_t</a>)(void);</div>
-<div class="line"><a id="l00917" name="l00917"></a><span class="lineno">  917</span> </div>
-<div class="line"><a id="l00918" name="l00918"></a><span class="lineno">  918</span> </div>
-<div class="line"><a id="l00922" name="l00922"></a><span class="lineno"><a class="line" href="structsnow3g__key__schedule__s.html">  922</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_s</a> {</div>
-<div class="line"><a id="l00923" name="l00923"></a><span class="lineno">  923</span>        <span class="comment">/* KEY */</span></div>
-<div class="line"><a id="l00924" name="l00924"></a><span class="lineno"><a class="line" href="structsnow3g__key__schedule__s.html#ae0ca8cd2581836c0297b34eea1effb12">  924</a></span>        uint32_t <a class="code hl_variable" href="structsnow3g__key__schedule__s.html#ae0ca8cd2581836c0297b34eea1effb12">k</a>[4];</div>
-<div class="line"><a id="l00925" name="l00925"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae50b48832b41b4b468cf933b44849213">  925</a></span>} <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ae50b48832b41b4b468cf933b44849213">snow3g_key_schedule_t</a>;</div>
-<div class="line"><a id="l00926" name="l00926"></a><span class="lineno">  926</span> </div>
-<div class="line"><a id="l00927" name="l00927"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a281315fb8b441d837ebed541b3a23380">  927</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a281315fb8b441d837ebed541b3a23380">snow3g_f8_1_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
-<div class="line"><a id="l00928" name="l00928"></a><span class="lineno">  928</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00929" name="l00929"></a><span class="lineno">  929</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00930" name="l00930"></a><span class="lineno">  930</span> </div>
-<div class="line"><a id="l00931" name="l00931"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7bd00b31d12260305accf0d37b60c958">  931</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a7bd00b31d12260305accf0d37b60c958">snow3g_f8_1_buffer_bit_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
-<div class="line"><a id="l00932" name="l00932"></a><span class="lineno">  932</span>                                         <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00933" name="l00933"></a><span class="lineno">  933</span>                                         <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00934" name="l00934"></a><span class="lineno">  934</span> </div>
-<div class="line"><a id="l00935" name="l00935"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4e8912e7e55a2ac891f85c19e7f29328">  935</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4e8912e7e55a2ac891f85c19e7f29328">snow3g_f8_2_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
-<div class="line"><a id="l00936" name="l00936"></a><span class="lineno">  936</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00937" name="l00937"></a><span class="lineno">  937</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t,</div>
-<div class="line"><a id="l00938" name="l00938"></a><span class="lineno">  938</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00939" name="l00939"></a><span class="lineno">  939</span> </div>
-<div class="line"><a id="l00940" name="l00940"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae13b1154dcc13ca562e81471659d6099">  940</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ae13b1154dcc13ca562e81471659d6099">snow3g_f8_4_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
-<div class="line"><a id="l00941" name="l00941"></a><span class="lineno">  941</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00942" name="l00942"></a><span class="lineno">  942</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00943" name="l00943"></a><span class="lineno">  943</span>                                     <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00944" name="l00944"></a><span class="lineno">  944</span>                                     <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00945" name="l00945"></a><span class="lineno">  945</span>                                     <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00946" name="l00946"></a><span class="lineno">  946</span>                                     <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00947" name="l00947"></a><span class="lineno">  947</span> </div>
-<div class="line"><a id="l00948" name="l00948"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6155f472c6794e88289235752d83154a">  948</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a6155f472c6794e88289235752d83154a">snow3g_f8_8_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
-<div class="line"><a id="l00949" name="l00949"></a><span class="lineno">  949</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00950" name="l00950"></a><span class="lineno">  950</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00951" name="l00951"></a><span class="lineno">  951</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00952" name="l00952"></a><span class="lineno">  952</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00953" name="l00953"></a><span class="lineno">  953</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00954" name="l00954"></a><span class="lineno">  954</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00955" name="l00955"></a><span class="lineno">  955</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00956" name="l00956"></a><span class="lineno">  956</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00957" name="l00957"></a><span class="lineno">  957</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00958" name="l00958"></a><span class="lineno">  958</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00959" name="l00959"></a><span class="lineno">  959</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00960" name="l00960"></a><span class="lineno">  960</span> </div>
-<div class="line"><a id="l00961" name="l00961"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a109b2a72d05bbe05a373ed5cf3c1f201">  961</a></span><span class="keyword">typedef</span> void</div>
-<div class="line"><a id="l00962" name="l00962"></a><span class="lineno">  962</span>(*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a109b2a72d05bbe05a373ed5cf3c1f201">snow3g_f8_8_buffer_multikey_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> * <span class="keyword">const</span> [],</div>
-<div class="line"><a id="l00963" name="l00963"></a><span class="lineno">  963</span>                                 <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [], <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [],</div>
-<div class="line"><a id="l00964" name="l00964"></a><span class="lineno">  964</span>                                 <span class="keywordtype">void</span> *[], <span class="keyword">const</span> uint32_t[]);</div>
-<div class="line"><a id="l00965" name="l00965"></a><span class="lineno">  965</span> </div>
-<div class="line"><a id="l00966" name="l00966"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6a4a1da950207c9ed04f3f18ae1b7e43">  966</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a6a4a1da950207c9ed04f3f18ae1b7e43">snow3g_f8_n_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
-<div class="line"><a id="l00967" name="l00967"></a><span class="lineno">  967</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [],</div>
-<div class="line"><a id="l00968" name="l00968"></a><span class="lineno">  968</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [],</div>
-<div class="line"><a id="l00969" name="l00969"></a><span class="lineno">  969</span>                                     <span class="keywordtype">void</span> *[], <span class="keyword">const</span> uint32_t[],</div>
-<div class="line"><a id="l00970" name="l00970"></a><span class="lineno">  970</span>                                     <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00971" name="l00971"></a><span class="lineno">  971</span> </div>
-<div class="line"><a id="l00972" name="l00972"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4049b601f9da6542e25d903efe524bc1">  972</a></span><span class="keyword">typedef</span> void</div>
-<div class="line"><a id="l00973" name="l00973"></a><span class="lineno">  973</span>(*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4049b601f9da6542e25d903efe524bc1">snow3g_f8_n_buffer_multikey_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> * <span class="keyword">const</span> [],</div>
-<div class="line"><a id="l00974" name="l00974"></a><span class="lineno">  974</span>                                 <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [],</div>
-<div class="line"><a id="l00975" name="l00975"></a><span class="lineno">  975</span>                                 <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [],</div>
-<div class="line"><a id="l00976" name="l00976"></a><span class="lineno">  976</span>                                 <span class="keywordtype">void</span> *[], <span class="keyword">const</span> uint32_t[],</div>
-<div class="line"><a id="l00977" name="l00977"></a><span class="lineno">  977</span>                                 <span class="keyword">const</span> uint32_t);</div>
-<div class="line"><a id="l00978" name="l00978"></a><span class="lineno">  978</span> </div>
-<div class="line"><a id="l00979" name="l00979"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae7a48386f7190b4e46cd113eee413733">  979</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ae7a48386f7190b4e46cd113eee413733">snow3g_f9_1_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
-<div class="line"><a id="l00980" name="l00980"></a><span class="lineno">  980</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00981" name="l00981"></a><span class="lineno">  981</span>                                     <span class="keyword">const</span> uint64_t, <span class="keywordtype">void</span> *);</div>
-<div class="line"><a id="l00982" name="l00982"></a><span class="lineno">  982</span> </div>
-<div class="line"><a id="l00983" name="l00983"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adfa182361f1c179d75129b4e46841af5">  983</a></span><span class="keyword">typedef</span> int (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#adfa182361f1c179d75129b4e46841af5">snow3g_init_key_sched_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
-<div class="line"><a id="l00984" name="l00984"></a><span class="lineno">  984</span>                                       <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *);</div>
-<div class="line"><a id="l00985" name="l00985"></a><span class="lineno">  985</span> </div>
-<div class="line"><a id="l00986" name="l00986"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad78a4f1c0d6de808f7046c0fbcd98d8f">  986</a></span><span class="keyword">typedef</span> size_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ad78a4f1c0d6de808f7046c0fbcd98d8f">snow3g_key_sched_size_t</a>)(void);</div>
-<div class="line"><a id="l00987" name="l00987"></a><span class="lineno">  987</span> </div>
-<div class="line"><a id="l00988" name="l00988"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa34b11bf4be97c764b283aedc0589575">  988</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aa34b11bf4be97c764b283aedc0589575">hec_32_t</a>)(<span class="keyword">const</span> uint8_t *);</div>
-<div class="line"><a id="l00989" name="l00989"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa9afd4ee91f0d82729afcf5f1cdcb808">  989</a></span><span class="keyword">typedef</span> uint64_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aa9afd4ee91f0d82729afcf5f1cdcb808">hec_64_t</a>)(<span class="keyword">const</span> uint8_t *);</div>
-<div class="line"><a id="l00990" name="l00990"></a><span class="lineno">  990</span> </div>
-<div class="line"><a id="l00991" name="l00991"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">  991</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t);</div>
-<div class="line"><a id="l00992" name="l00992"></a><span class="lineno">  992</span><span class="comment">/* Multi-buffer manager flags passed to alloc_mb_mgr() */</span></div>
-<div class="line"><a id="l00993" name="l00993"></a><span class="lineno">  993</span> </div>
-<div class="line"><a id="l00994" name="l00994"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3d45fcff99a9ea952b4dd6ef70e36e0c">  994</a></span><span class="preprocessor">#define IMB_FLAG_SHANI_OFF (1ULL &lt;&lt; 0) </span></div>
-<div class="line"><a id="l00995" name="l00995"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4c53fb8e39bbc6e3f39d0558934e5d55">  995</a></span><span class="preprocessor">#define IMB_FLAG_AESNI_OFF (1ULL &lt;&lt; 1) </span></div>
-<div class="line"><a id="l01004" name="l01004"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#acb9c15eabfb9bafeb15a06886fa91e90"> 1004</a></span><span class="preprocessor">#define IMB_FEATURE_SHANI      (1ULL &lt;&lt; 0)</span></div>
-<div class="line"><a id="l01005" name="l01005"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a19c147087d2ae918baa22f90fa9b3b05"> 1005</a></span><span class="preprocessor">#define IMB_FEATURE_AESNI      (1ULL &lt;&lt; 1)</span></div>
-<div class="line"><a id="l01006" name="l01006"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1af54a4a862936a6793af2ff44163ba5"> 1006</a></span><span class="preprocessor">#define IMB_FEATURE_PCLMULQDQ  (1ULL &lt;&lt; 2)</span></div>
-<div class="line"><a id="l01007" name="l01007"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5eef394935c651931b1cf560f31c841c"> 1007</a></span><span class="preprocessor">#define IMB_FEATURE_CMOV       (1ULL &lt;&lt; 3)</span></div>
-<div class="line"><a id="l01008" name="l01008"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abcc243fc505aca3eac6963eff25e9b99"> 1008</a></span><span class="preprocessor">#define IMB_FEATURE_SSE4_2     (1ULL &lt;&lt; 4)</span></div>
-<div class="line"><a id="l01009" name="l01009"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7af992d12b4f9a6e789384969a066056"> 1009</a></span><span class="preprocessor">#define IMB_FEATURE_AVX        (1ULL &lt;&lt; 5)</span></div>
-<div class="line"><a id="l01010" name="l01010"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a225e2cd9c1445795fc62879eabad2530"> 1010</a></span><span class="preprocessor">#define IMB_FEATURE_AVX2       (1ULL &lt;&lt; 6)</span></div>
-<div class="line"><a id="l01011" name="l01011"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab673c08624d868ca0dd89e1a9ec28f00"> 1011</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512F    (1ULL &lt;&lt; 7)</span></div>
-<div class="line"><a id="l01012" name="l01012"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8ca2c970faa0f62a3f4a6b6c18432bb1"> 1012</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512DQ   (1ULL &lt;&lt; 8)</span></div>
-<div class="line"><a id="l01013" name="l01013"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abbdb390b80ff1a92f31a7a9adc9beeb9"> 1013</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512CD   (1ULL &lt;&lt; 9)</span></div>
-<div class="line"><a id="l01014" name="l01014"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a00caae81d425acb6b946bebb25ac267f"> 1014</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512BW   (1ULL &lt;&lt; 10)</span></div>
-<div class="line"><a id="l01015" name="l01015"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a803871900c08e2dc1b3f805ed4ecefd8"> 1015</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512VL   (1ULL &lt;&lt; 11)</span></div>
-<div class="line"><a id="l01016" name="l01016"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae6d6e3427c81b278d64f0189401c4964"> 1016</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512_SKX (IMB_FEATURE_AVX512F | IMB_FEATURE_AVX512DQ | \</span></div>
-<div class="line"><a id="l01017" name="l01017"></a><span class="lineno"> 1017</span><span class="preprocessor">                                IMB_FEATURE_AVX512CD | IMB_FEATURE_AVX512BW | \</span></div>
-<div class="line"><a id="l01018" name="l01018"></a><span class="lineno"> 1018</span><span class="preprocessor">                                IMB_FEATURE_AVX512VL)</span></div>
-<div class="line"><a id="l01019" name="l01019"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af4321e4e3c947f9b9fb7f204aaecf2c3"> 1019</a></span><span class="preprocessor">#define IMB_FEATURE_VAES       (1ULL &lt;&lt; 12)</span></div>
-<div class="line"><a id="l01020" name="l01020"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a153d695ecd1af69a0d23385a50654614"> 1020</a></span><span class="preprocessor">#define IMB_FEATURE_VPCLMULQDQ (1ULL &lt;&lt; 13)</span></div>
-<div class="line"><a id="l01021" name="l01021"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abd58fdbe1f1ef53cf509a0b37ba8aa4b"> 1021</a></span><span class="preprocessor">#define IMB_FEATURE_SAFE_DATA  (1ULL &lt;&lt; 14)</span></div>
-<div class="line"><a id="l01022" name="l01022"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4e9506dc72ab4e6a2af463238ccb3080"> 1022</a></span><span class="preprocessor">#define IMB_FEATURE_SAFE_PARAM (1ULL &lt;&lt; 15)</span></div>
-<div class="line"><a id="l01023" name="l01023"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa67ab4088ac2f8cadbe839101d276567"> 1023</a></span><span class="preprocessor">#define IMB_FEATURE_GFNI       (1ULL &lt;&lt; 16)</span></div>
-<div class="line"><a id="l01024" name="l01024"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0134dfaffe12427a8f2182247c6f1f48"> 1024</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512_IFMA (1ULL &lt;&lt; 17)</span></div>
-<div class="line"><a id="l01025" name="l01025"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a557f3de4bcc0bd7e9bd90e5e1d1b9b09"> 1025</a></span><span class="preprocessor">#define IMB_FEATURE_BMI2       (1ULL &lt;&lt; 18)</span></div>
-<div class="line"><a id="l01026" name="l01026"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a421158db6d19c97a6bceb32eb4a839ed"> 1026</a></span><span class="preprocessor">#define IMB_FEATURE_AESNI_EMU  (1ULL &lt;&lt; 19)</span></div>
-<div class="line"><a id="l01027" name="l01027"></a><span class="lineno"> 1027</span> </div>
-<div class="line"><a id="l01031" name="l01031"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6afb888ab232bab1c3ca027eb071f388"> 1031</a></span><span class="preprocessor">#define IMB_CPUFLAGS_NO_AESNI   (IMB_FEATURE_SSE4_2 | IMB_FEATURE_CMOV)</span></div>
-<div class="line"><a id="l01032" name="l01032"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5654f563aaad731df22c8e8517c9154c"> 1032</a></span><span class="preprocessor">#define IMB_CPUFLAGS_SSE        (IMB_CPUFLAGS_NO_AESNI | IMB_FEATURE_AESNI | \</span></div>
-<div class="line"><a id="l01033" name="l01033"></a><span class="lineno"> 1033</span><span class="preprocessor">                                 IMB_FEATURE_PCLMULQDQ)</span></div>
-<div class="line"><a id="l01034" name="l01034"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0329fede890d95a97423a714410e1576"> 1034</a></span><span class="preprocessor">#define IMB_CPUFLAGS_AVX        (IMB_CPUFLAGS_SSE | IMB_FEATURE_AVX)</span></div>
-<div class="line"><a id="l01035" name="l01035"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac0a92622a85423541536321231a6cb7d"> 1035</a></span><span class="preprocessor">#define IMB_CPUFLAGS_AVX2       (IMB_CPUFLAGS_AVX | IMB_FEATURE_AVX2 | \</span></div>
-<div class="line"><a id="l01036" name="l01036"></a><span class="lineno"> 1036</span><span class="preprocessor">                                 IMB_FEATURE_BMI2)</span></div>
-<div class="line"><a id="l01037" name="l01037"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0a250932ede6ca7b69f5c763c24cf51d"> 1037</a></span><span class="preprocessor">#define IMB_CPUFLAGS_AVX512     (IMB_CPUFLAGS_AVX2 | IMB_FEATURE_AVX512_SKX)</span></div>
-<div class="line"><a id="l01038" name="l01038"></a><span class="lineno"> 1038</span> </div>
-<div class="line"><a id="l01039" name="l01039"></a><span class="lineno"> 1039</span><span class="comment">/* TOP LEVEL (IMB_MGR) Data structure fields */</span></div>
-<div class="line"><a id="l01040" name="l01040"></a><span class="lineno"> 1040</span> </div>
-<div class="line"><a id="l01041" name="l01041"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab12d22470a68b5d3852c8dd972784d97"> 1041</a></span><span class="preprocessor">#define IMB_MAX_JOBS 128</span></div>
-<div class="line"><a id="l01042" name="l01042"></a><span class="lineno"> 1042</span> </div>
-<div class="line"><a id="l01043" name="l01043"></a><span class="lineno"><a class="line" href="structIMB__MGR.html"> 1043</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> {</div>
-<div class="line"><a id="l01044" name="l01044"></a><span class="lineno"> 1044</span> </div>
-<div class="line"><a id="l01045" name="l01045"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ae1a596c9c9d6ca1292c6116575021c14"> 1045</a></span>        uint64_t <a class="code hl_variable" href="structIMB__MGR.html#ae1a596c9c9d6ca1292c6116575021c14">flags</a>;   </div>
-<div class="line"><a id="l01046" name="l01046"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af877c7669265775604857c6b81063bdb"> 1046</a></span>        uint64_t <a class="code hl_variable" href="structIMB__MGR.html#af877c7669265775604857c6b81063bdb">features</a>; </div>
-<div class="line"><a id="l01048" name="l01048"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a136697eb37d5a06eeada0f338abd8b51"> 1048</a></span>        uint64_t <a class="code hl_variable" href="structIMB__MGR.html#a136697eb37d5a06eeada0f338abd8b51">reserved</a>[5]; </div>
-<div class="line"><a id="l01049" name="l01049"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a44b6c95f8ce611828b6acacdb459cdc9"> 1049</a></span>        uint32_t <a class="code hl_variable" href="structIMB__MGR.html#a44b6c95f8ce611828b6acacdb459cdc9">used_arch</a>; </div>
-<div class="line"><a id="l01051" name="l01051"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a0ab7a3dfdfd8442f591699e2310df11f"> 1051</a></span>        <span class="keywordtype">int</span> <a class="code hl_variable" href="structIMB__MGR.html#a0ab7a3dfdfd8442f591699e2310df11f">imb_errno</a>; </div>
-<div class="line"><a id="l01059" name="l01059"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a35939892cd168eb7ce9c6c29c5401709"> 1059</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a5a533d852e3b65e9e5978fec37da43b5">get_next_job_t</a>          <a class="code hl_variable" href="structIMB__MGR.html#a35939892cd168eb7ce9c6c29c5401709">get_next_job</a>;</div>
-<div class="line"><a id="l01060" name="l01060"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab143534d96e0d585b19dfc19553e929b"> 1060</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a41297d789b434157e746e338f0af96ec">submit_job_t</a>            <a class="code hl_variable" href="structIMB__MGR.html#ab143534d96e0d585b19dfc19553e929b">submit_job</a>;</div>
-<div class="line"><a id="l01061" name="l01061"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aab7350eeecc56b1ef45606b83519a72c"> 1061</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a41297d789b434157e746e338f0af96ec">submit_job_t</a>            <a class="code hl_variable" href="structIMB__MGR.html#aab7350eeecc56b1ef45606b83519a72c">submit_job_nocheck</a>;</div>
-<div class="line"><a id="l01062" name="l01062"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a99b7111c8fc59161e0bf291d13b1f195"> 1062</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac8cb9a545cdef14f60f36fe8888e6e7c">get_completed_job_t</a>     <a class="code hl_variable" href="structIMB__MGR.html#a99b7111c8fc59161e0bf291d13b1f195">get_completed_job</a>;</div>
-<div class="line"><a id="l01063" name="l01063"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a225e3b35eef8e18fd09c429fbb2f70b5"> 1063</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ae64d0f677e42b8f8d50289113cf5e01e">flush_job_t</a>             <a class="code hl_variable" href="structIMB__MGR.html#a225e3b35eef8e18fd09c429fbb2f70b5">flush_job</a>;</div>
-<div class="line"><a id="l01064" name="l01064"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5a35c9c2a1c8eb5b4aa239a3b04f4fbf"> 1064</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a9884ae92b598dd504f7d0ef8be5051d6">queue_size_t</a>            <a class="code hl_variable" href="structIMB__MGR.html#a5a35c9c2a1c8eb5b4aa239a3b04f4fbf">queue_size</a>;</div>
-<div class="line"><a id="l01065" name="l01065"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a7c97c5361b90abe325db55530b6f198e"> 1065</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">keyexp_t</a>                <a class="code hl_variable" href="structIMB__MGR.html#a7c97c5361b90abe325db55530b6f198e">keyexp_128</a>;</div>
-<div class="line"><a id="l01066" name="l01066"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a2bd7444a318de06b5f53178abf9c37ff"> 1066</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">keyexp_t</a>                <a class="code hl_variable" href="structIMB__MGR.html#a2bd7444a318de06b5f53178abf9c37ff">keyexp_192</a>;</div>
-<div class="line"><a id="l01067" name="l01067"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a431e99ddb3837a32bedb6cd426054bcc"> 1067</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">keyexp_t</a>                <a class="code hl_variable" href="structIMB__MGR.html#a431e99ddb3837a32bedb6cd426054bcc">keyexp_256</a>;</div>
-<div class="line"><a id="l01068" name="l01068"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aa3404b7811d57821ea574994e0c88995"> 1068</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aab07996d622d682adc1db8286e633cb3">cmac_subkey_gen_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#aa3404b7811d57821ea574994e0c88995">cmac_subkey_gen_128</a>;</div>
-<div class="line"><a id="l01069" name="l01069"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ae575c2350f5fca9a182c541795bb7d4d"> 1069</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#abb36f71b9fb4d928c2ad9fa462b80ae6">xcbc_keyexp_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#ae575c2350f5fca9a182c541795bb7d4d">xcbc_keyexp</a>;</div>
-<div class="line"><a id="l01070" name="l01070"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aae9afac5c2c1bf7b27d187d10778a1ee"> 1070</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60a93569304a978c798bb8c4a4f7f52f">des_keysched_t</a>          <a class="code hl_variable" href="structIMB__MGR.html#aae9afac5c2c1bf7b27d187d10778a1ee">des_key_sched</a>;</div>
-<div class="line"><a id="l01071" name="l01071"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a80a26be9a12f561a68b70d65e096cde9"> 1071</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>        <a class="code hl_variable" href="structIMB__MGR.html#a80a26be9a12f561a68b70d65e096cde9">sha1_one_block</a>;</div>
-<div class="line"><a id="l01072" name="l01072"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aacf8209094d12ceceed96d4d0fae193c"> 1072</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>        <a class="code hl_variable" href="structIMB__MGR.html#aacf8209094d12ceceed96d4d0fae193c">sha224_one_block</a>;</div>
-<div class="line"><a id="l01073" name="l01073"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ade4a72c39980f0bba790b70529b60158"> 1073</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>        <a class="code hl_variable" href="structIMB__MGR.html#ade4a72c39980f0bba790b70529b60158">sha256_one_block</a>;</div>
-<div class="line"><a id="l01074" name="l01074"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a92b7ff145f0016dd46eabf9271ef03f1"> 1074</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>        <a class="code hl_variable" href="structIMB__MGR.html#a92b7ff145f0016dd46eabf9271ef03f1">sha384_one_block</a>;</div>
-<div class="line"><a id="l01075" name="l01075"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a88f1060a2adb8098fc085fc2b812addc"> 1075</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>        <a class="code hl_variable" href="structIMB__MGR.html#a88f1060a2adb8098fc085fc2b812addc">sha512_one_block</a>;</div>
-<div class="line"><a id="l01076" name="l01076"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a54b5f7b625ce226ebd46a2a19e9bc724"> 1076</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>        <a class="code hl_variable" href="structIMB__MGR.html#a54b5f7b625ce226ebd46a2a19e9bc724">md5_one_block</a>;</div>
-<div class="line"><a id="l01077" name="l01077"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a82aaedc800096aaa55062c56131e0b13"> 1077</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">hash_fn_t</a>               <a class="code hl_variable" href="structIMB__MGR.html#a82aaedc800096aaa55062c56131e0b13">sha1</a>;</div>
-<div class="line"><a id="l01078" name="l01078"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a52e26b8805b28d1298ac48e5762412b5"> 1078</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">hash_fn_t</a>               <a class="code hl_variable" href="structIMB__MGR.html#a52e26b8805b28d1298ac48e5762412b5">sha224</a>;</div>
-<div class="line"><a id="l01079" name="l01079"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a8d978764a953e220b3c799990bae490b"> 1079</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">hash_fn_t</a>               <a class="code hl_variable" href="structIMB__MGR.html#a8d978764a953e220b3c799990bae490b">sha256</a>;</div>
-<div class="line"><a id="l01080" name="l01080"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a9ffcce0ba9aef3cd68bdd7f6e9e3e2a0"> 1080</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">hash_fn_t</a>               <a class="code hl_variable" href="structIMB__MGR.html#a9ffcce0ba9aef3cd68bdd7f6e9e3e2a0">sha384</a>;</div>
-<div class="line"><a id="l01081" name="l01081"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a62ebdd5e2b5a59c9e648511caf56f3f1"> 1081</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">hash_fn_t</a>               <a class="code hl_variable" href="structIMB__MGR.html#a62ebdd5e2b5a59c9e648511caf56f3f1">sha512</a>;</div>
-<div class="line"><a id="l01082" name="l01082"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#abd468de03563a40da0b21b0885f44cbe"> 1082</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aeb837fda81cdf56ffcfa4e68b5877a35">aes_cfb_t</a>               <a class="code hl_variable" href="structIMB__MGR.html#abd468de03563a40da0b21b0885f44cbe">aes128_cfb_one</a>;</div>
+<div class="line"><a id="l00773" name="l00773"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7df2e3f063333d677ef7668626126c4d">  773</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a7df2e3f063333d677ef7668626126c4d">zuc_eea3_4_buffer_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *,</div>
+<div class="line"><a id="l00774" name="l00774"></a><span class="lineno">  774</span>                                    <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *, <span class="keywordtype">void</span> **,</div>
+<div class="line"><a id="l00775" name="l00775"></a><span class="lineno">  775</span>                                    <span class="keyword">const</span> uint32_t *);</div>
+<div class="line"><a id="l00776" name="l00776"></a><span class="lineno">  776</span> </div>
+<div class="line"><a id="l00777" name="l00777"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a303f2dd11b1193938596b4ec69edf8cc">  777</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a303f2dd11b1193938596b4ec69edf8cc">zuc_eea3_n_buffer_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *,</div>
+<div class="line"><a id="l00778" name="l00778"></a><span class="lineno">  778</span>                                    <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *, <span class="keywordtype">void</span> **,</div>
+<div class="line"><a id="l00779" name="l00779"></a><span class="lineno">  779</span>                                    <span class="keyword">const</span> uint32_t *, <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00780" name="l00780"></a><span class="lineno">  780</span> </div>
+<div class="line"><a id="l00781" name="l00781"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a95ed5580686f708ba2313179cd6064a8">  781</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a95ed5580686f708ba2313179cd6064a8">zuc_eia3_1_buffer_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00782" name="l00782"></a><span class="lineno">  782</span>                                    <span class="keyword">const</span> uint32_t, uint32_t *);</div>
+<div class="line"><a id="l00783" name="l00783"></a><span class="lineno">  783</span> </div>
+<div class="line"><a id="l00784" name="l00784"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ada45082bb04dd727c0deec5c4fc96fed">  784</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ada45082bb04dd727c0deec5c4fc96fed">zuc_eia3_n_buffer_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *,</div>
+<div class="line"><a id="l00785" name="l00785"></a><span class="lineno">  785</span>                                    <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *,</div>
+<div class="line"><a id="l00786" name="l00786"></a><span class="lineno">  786</span>                                    <span class="keyword">const</span> uint32_t *, uint32_t **,</div>
+<div class="line"><a id="l00787" name="l00787"></a><span class="lineno">  787</span>                                    <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00788" name="l00788"></a><span class="lineno">  788</span> </div>
+<div class="line"><a id="l00789" name="l00789"></a><span class="lineno">  789</span> </div>
+<div class="line"><a id="l00790" name="l00790"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a89fe975f0388b71765be494d04b034f4">  790</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a89fe975f0388b71765be494d04b034f4">kasumi_f8_1_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
+<div class="line"><a id="l00791" name="l00791"></a><span class="lineno">  791</span>                                     <span class="keyword">const</span> uint64_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00792" name="l00792"></a><span class="lineno">  792</span>                                     <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00793" name="l00793"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a81afa744fb5669fe37cf0dce2193d8a7">  793</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a81afa744fb5669fe37cf0dce2193d8a7">kasumi_f8_1_buffer_bit_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
+<div class="line"><a id="l00794" name="l00794"></a><span class="lineno">  794</span>                                         <span class="keyword">const</span> uint64_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00795" name="l00795"></a><span class="lineno">  795</span>                                         <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00796" name="l00796"></a><span class="lineno">  796</span>                                         <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00797" name="l00797"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af1eb074f5da469fa655d1404be8701dd">  797</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af1eb074f5da469fa655d1404be8701dd">kasumi_f8_2_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
+<div class="line"><a id="l00798" name="l00798"></a><span class="lineno">  798</span>                                     <span class="keyword">const</span> uint64_t,  <span class="keyword">const</span> uint64_t,</div>
+<div class="line"><a id="l00799" name="l00799"></a><span class="lineno">  799</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00800" name="l00800"></a><span class="lineno">  800</span>                                     <span class="keyword">const</span> uint32_t,</div>
+<div class="line"><a id="l00801" name="l00801"></a><span class="lineno">  801</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00802" name="l00802"></a><span class="lineno">  802</span>                                     <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00803" name="l00803"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a53ecac7e009fcbeee603f975a45d3012">  803</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a53ecac7e009fcbeee603f975a45d3012">kasumi_f8_3_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
+<div class="line"><a id="l00804" name="l00804"></a><span class="lineno">  804</span>                                     <span class="keyword">const</span> uint64_t,  <span class="keyword">const</span> uint64_t,</div>
+<div class="line"><a id="l00805" name="l00805"></a><span class="lineno">  805</span>                                     <span class="keyword">const</span> uint64_t,</div>
+<div class="line"><a id="l00806" name="l00806"></a><span class="lineno">  806</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00807" name="l00807"></a><span class="lineno">  807</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00808" name="l00808"></a><span class="lineno">  808</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00809" name="l00809"></a><span class="lineno">  809</span>                                     <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00810" name="l00810"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#accf08a616e22a2c56e6a37d56f38b354">  810</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#accf08a616e22a2c56e6a37d56f38b354">kasumi_f8_4_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
+<div class="line"><a id="l00811" name="l00811"></a><span class="lineno">  811</span>                                     <span class="keyword">const</span> uint64_t,  <span class="keyword">const</span> uint64_t,</div>
+<div class="line"><a id="l00812" name="l00812"></a><span class="lineno">  812</span>                                     <span class="keyword">const</span> uint64_t,  <span class="keyword">const</span> uint64_t,</div>
+<div class="line"><a id="l00813" name="l00813"></a><span class="lineno">  813</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00814" name="l00814"></a><span class="lineno">  814</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00815" name="l00815"></a><span class="lineno">  815</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00816" name="l00816"></a><span class="lineno">  816</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00817" name="l00817"></a><span class="lineno">  817</span>                                     <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00818" name="l00818"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a51bbde186cdd437b6f9448e19a58e8a1">  818</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a51bbde186cdd437b6f9448e19a58e8a1">kasumi_f8_n_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
+<div class="line"><a id="l00819" name="l00819"></a><span class="lineno">  819</span>                                     <span class="keyword">const</span> uint64_t *, <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> *,</div>
+<div class="line"><a id="l00820" name="l00820"></a><span class="lineno">  820</span>                                     <span class="keywordtype">void</span> **, <span class="keyword">const</span> uint32_t *,</div>
+<div class="line"><a id="l00821" name="l00821"></a><span class="lineno">  821</span>                                     <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00822" name="l00822"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac17147d04602964bea59322ff31ebf59">  822</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac17147d04602964bea59322ff31ebf59">kasumi_f9_1_buffer_user_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
+<div class="line"><a id="l00823" name="l00823"></a><span class="lineno">  823</span>                                          <span class="keyword">const</span> uint64_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00824" name="l00824"></a><span class="lineno">  824</span>                                          <span class="keyword">const</span> uint32_t, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00825" name="l00825"></a><span class="lineno">  825</span>                                          <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00826" name="l00826"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8b02114f003b5fe0e1ccbfdc13ac55e4">  826</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8b02114f003b5fe0e1ccbfdc13ac55e4">kasumi_f9_1_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *,</div>
+<div class="line"><a id="l00827" name="l00827"></a><span class="lineno">  827</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00828" name="l00828"></a><span class="lineno">  828</span>                                     <span class="keyword">const</span> uint32_t, <span class="keywordtype">void</span> *);</div>
+<div class="line"><a id="l00829" name="l00829"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7bec62666456d8962676961cf187ac80">  829</a></span><span class="keyword">typedef</span> int (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a7bec62666456d8962676961cf187ac80">kasumi_init_f8_key_sched_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00830" name="l00830"></a><span class="lineno">  830</span>                                          <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *);</div>
+<div class="line"><a id="l00831" name="l00831"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8b30db8462aca1c039c3fd20646f342c">  831</a></span><span class="keyword">typedef</span> int (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8b30db8462aca1c039c3fd20646f342c">kasumi_init_f9_key_sched_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00832" name="l00832"></a><span class="lineno">  832</span>                                          <a class="code hl_struct" href="structkasumi__key__sched__s.html">kasumi_key_sched_t</a> *);</div>
+<div class="line"><a id="l00833" name="l00833"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad7444c36024a63025e7682c16946a00a">  833</a></span><span class="keyword">typedef</span> size_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ad7444c36024a63025e7682c16946a00a">kasumi_key_sched_size_t</a>)(void);</div>
+<div class="line"><a id="l00834" name="l00834"></a><span class="lineno">  834</span> </div>
+<div class="line"><a id="l00835" name="l00835"></a><span class="lineno">  835</span> </div>
+<div class="line"><a id="l00839" name="l00839"></a><span class="lineno"><a class="line" href="structsnow3g__key__schedule__s.html">  839</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_s</a> {</div>
+<div class="line"><a id="l00840" name="l00840"></a><span class="lineno">  840</span>        <span class="comment">/* KEY */</span></div>
+<div class="line"><a id="l00841" name="l00841"></a><span class="lineno"><a class="line" href="structsnow3g__key__schedule__s.html#ae0ca8cd2581836c0297b34eea1effb12">  841</a></span>        uint32_t <a class="code hl_variable" href="structsnow3g__key__schedule__s.html#ae0ca8cd2581836c0297b34eea1effb12">k</a>[4];</div>
+<div class="line"><a id="l00842" name="l00842"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae50b48832b41b4b468cf933b44849213">  842</a></span>} <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ae50b48832b41b4b468cf933b44849213">snow3g_key_schedule_t</a>;</div>
+<div class="line"><a id="l00843" name="l00843"></a><span class="lineno">  843</span> </div>
+<div class="line"><a id="l00844" name="l00844"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a281315fb8b441d837ebed541b3a23380">  844</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a281315fb8b441d837ebed541b3a23380">snow3g_f8_1_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
+<div class="line"><a id="l00845" name="l00845"></a><span class="lineno">  845</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00846" name="l00846"></a><span class="lineno">  846</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00847" name="l00847"></a><span class="lineno">  847</span> </div>
+<div class="line"><a id="l00848" name="l00848"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7bd00b31d12260305accf0d37b60c958">  848</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a7bd00b31d12260305accf0d37b60c958">snow3g_f8_1_buffer_bit_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
+<div class="line"><a id="l00849" name="l00849"></a><span class="lineno">  849</span>                                         <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00850" name="l00850"></a><span class="lineno">  850</span>                                         <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00851" name="l00851"></a><span class="lineno">  851</span> </div>
+<div class="line"><a id="l00852" name="l00852"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4e8912e7e55a2ac891f85c19e7f29328">  852</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4e8912e7e55a2ac891f85c19e7f29328">snow3g_f8_2_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
+<div class="line"><a id="l00853" name="l00853"></a><span class="lineno">  853</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00854" name="l00854"></a><span class="lineno">  854</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t,</div>
+<div class="line"><a id="l00855" name="l00855"></a><span class="lineno">  855</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00856" name="l00856"></a><span class="lineno">  856</span> </div>
+<div class="line"><a id="l00857" name="l00857"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae13b1154dcc13ca562e81471659d6099">  857</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ae13b1154dcc13ca562e81471659d6099">snow3g_f8_4_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
+<div class="line"><a id="l00858" name="l00858"></a><span class="lineno">  858</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00859" name="l00859"></a><span class="lineno">  859</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00860" name="l00860"></a><span class="lineno">  860</span>                                     <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00861" name="l00861"></a><span class="lineno">  861</span>                                     <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00862" name="l00862"></a><span class="lineno">  862</span>                                     <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00863" name="l00863"></a><span class="lineno">  863</span>                                     <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00864" name="l00864"></a><span class="lineno">  864</span> </div>
+<div class="line"><a id="l00865" name="l00865"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6155f472c6794e88289235752d83154a">  865</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a6155f472c6794e88289235752d83154a">snow3g_f8_8_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
+<div class="line"><a id="l00866" name="l00866"></a><span class="lineno">  866</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00867" name="l00867"></a><span class="lineno">  867</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00868" name="l00868"></a><span class="lineno">  868</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00869" name="l00869"></a><span class="lineno">  869</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00870" name="l00870"></a><span class="lineno">  870</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00871" name="l00871"></a><span class="lineno">  871</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00872" name="l00872"></a><span class="lineno">  872</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00873" name="l00873"></a><span class="lineno">  873</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00874" name="l00874"></a><span class="lineno">  874</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00875" name="l00875"></a><span class="lineno">  875</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00876" name="l00876"></a><span class="lineno">  876</span>                                     <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00877" name="l00877"></a><span class="lineno">  877</span> </div>
+<div class="line"><a id="l00878" name="l00878"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a109b2a72d05bbe05a373ed5cf3c1f201">  878</a></span><span class="keyword">typedef</span> void</div>
+<div class="line"><a id="l00879" name="l00879"></a><span class="lineno">  879</span>(*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a109b2a72d05bbe05a373ed5cf3c1f201">snow3g_f8_8_buffer_multikey_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> * <span class="keyword">const</span> [],</div>
+<div class="line"><a id="l00880" name="l00880"></a><span class="lineno">  880</span>                                 <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [], <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [],</div>
+<div class="line"><a id="l00881" name="l00881"></a><span class="lineno">  881</span>                                 <span class="keywordtype">void</span> *[], <span class="keyword">const</span> uint32_t[]);</div>
+<div class="line"><a id="l00882" name="l00882"></a><span class="lineno">  882</span> </div>
+<div class="line"><a id="l00883" name="l00883"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6a4a1da950207c9ed04f3f18ae1b7e43">  883</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a6a4a1da950207c9ed04f3f18ae1b7e43">snow3g_f8_n_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
+<div class="line"><a id="l00884" name="l00884"></a><span class="lineno">  884</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [],</div>
+<div class="line"><a id="l00885" name="l00885"></a><span class="lineno">  885</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [],</div>
+<div class="line"><a id="l00886" name="l00886"></a><span class="lineno">  886</span>                                     <span class="keywordtype">void</span> *[], <span class="keyword">const</span> uint32_t[],</div>
+<div class="line"><a id="l00887" name="l00887"></a><span class="lineno">  887</span>                                     <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00888" name="l00888"></a><span class="lineno">  888</span> </div>
+<div class="line"><a id="l00889" name="l00889"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4049b601f9da6542e25d903efe524bc1">  889</a></span><span class="keyword">typedef</span> void</div>
+<div class="line"><a id="l00890" name="l00890"></a><span class="lineno">  890</span>(*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4049b601f9da6542e25d903efe524bc1">snow3g_f8_n_buffer_multikey_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> * <span class="keyword">const</span> [],</div>
+<div class="line"><a id="l00891" name="l00891"></a><span class="lineno">  891</span>                                 <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [],</div>
+<div class="line"><a id="l00892" name="l00892"></a><span class="lineno">  892</span>                                 <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> [],</div>
+<div class="line"><a id="l00893" name="l00893"></a><span class="lineno">  893</span>                                 <span class="keywordtype">void</span> *[], <span class="keyword">const</span> uint32_t[],</div>
+<div class="line"><a id="l00894" name="l00894"></a><span class="lineno">  894</span>                                 <span class="keyword">const</span> uint32_t);</div>
+<div class="line"><a id="l00895" name="l00895"></a><span class="lineno">  895</span> </div>
+<div class="line"><a id="l00896" name="l00896"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae7a48386f7190b4e46cd113eee413733">  896</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ae7a48386f7190b4e46cd113eee413733">snow3g_f9_1_buffer_t</a>)(<span class="keyword">const</span> <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *,</div>
+<div class="line"><a id="l00897" name="l00897"></a><span class="lineno">  897</span>                                     <span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00898" name="l00898"></a><span class="lineno">  898</span>                                     <span class="keyword">const</span> uint64_t, <span class="keywordtype">void</span> *);</div>
+<div class="line"><a id="l00899" name="l00899"></a><span class="lineno">  899</span> </div>
+<div class="line"><a id="l00900" name="l00900"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adfa182361f1c179d75129b4e46841af5">  900</a></span><span class="keyword">typedef</span> int (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#adfa182361f1c179d75129b4e46841af5">snow3g_init_key_sched_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00901" name="l00901"></a><span class="lineno">  901</span>                                       <a class="code hl_struct" href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_t</a> *);</div>
+<div class="line"><a id="l00902" name="l00902"></a><span class="lineno">  902</span> </div>
+<div class="line"><a id="l00903" name="l00903"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad78a4f1c0d6de808f7046c0fbcd98d8f">  903</a></span><span class="keyword">typedef</span> size_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ad78a4f1c0d6de808f7046c0fbcd98d8f">snow3g_key_sched_size_t</a>)(void);</div>
+<div class="line"><a id="l00904" name="l00904"></a><span class="lineno">  904</span> </div>
+<div class="line"><a id="l00905" name="l00905"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa34b11bf4be97c764b283aedc0589575">  905</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aa34b11bf4be97c764b283aedc0589575">hec_32_t</a>)(<span class="keyword">const</span> uint8_t *);</div>
+<div class="line"><a id="l00906" name="l00906"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa9afd4ee91f0d82729afcf5f1cdcb808">  906</a></span><span class="keyword">typedef</span> uint64_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aa9afd4ee91f0d82729afcf5f1cdcb808">hec_64_t</a>)(<span class="keyword">const</span> uint8_t *);</div>
+<div class="line"><a id="l00907" name="l00907"></a><span class="lineno">  907</span> </div>
+<div class="line"><a id="l00908" name="l00908"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">  908</a></span><span class="keyword">typedef</span> uint32_t (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> uint64_t);</div>
+<div class="line"><a id="l00909" name="l00909"></a><span class="lineno">  909</span> </div>
+<div class="line"><a id="l00910" name="l00910"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad907e0caa52fcb257275464179620643">  910</a></span><span class="keyword">typedef</span> void (*<a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ad907e0caa52fcb257275464179620643">aes_ecb_quic_t</a>)(<span class="keyword">const</span> <span class="keywordtype">void</span> *, <span class="keyword">const</span> <span class="keywordtype">void</span> *,</div>
+<div class="line"><a id="l00911" name="l00911"></a><span class="lineno">  911</span>                               <span class="keywordtype">void</span> *out, uint64_t);</div>
+<div class="line"><a id="l00912" name="l00912"></a><span class="lineno">  912</span> </div>
+<div class="line"><a id="l00913" name="l00913"></a><span class="lineno">  913</span><span class="comment">/* Multi-buffer manager flags passed to alloc_mb_mgr() */</span></div>
+<div class="line"><a id="l00914" name="l00914"></a><span class="lineno">  914</span> </div>
+<div class="line"><a id="l00915" name="l00915"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3d45fcff99a9ea952b4dd6ef70e36e0c">  915</a></span><span class="preprocessor">#define IMB_FLAG_SHANI_OFF (1ULL &lt;&lt; 0) </span></div>
+<div class="line"><a id="l00916" name="l00916"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4c53fb8e39bbc6e3f39d0558934e5d55">  916</a></span><span class="preprocessor">#define IMB_FLAG_AESNI_OFF (1ULL &lt;&lt; 1) </span></div>
+<div class="line"><a id="l00917" name="l00917"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad3faac9d03a87621ae02c10337b4edf8">  917</a></span><span class="preprocessor">#define IMB_FLAG_GFNI_OFF (1ULL &lt;&lt; 2) </span></div>
+<div class="line"><a id="l00926" name="l00926"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#acb9c15eabfb9bafeb15a06886fa91e90">  926</a></span><span class="preprocessor">#define IMB_FEATURE_SHANI      (1ULL &lt;&lt; 0)</span></div>
+<div class="line"><a id="l00927" name="l00927"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a19c147087d2ae918baa22f90fa9b3b05">  927</a></span><span class="preprocessor">#define IMB_FEATURE_AESNI      (1ULL &lt;&lt; 1)</span></div>
+<div class="line"><a id="l00928" name="l00928"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1af54a4a862936a6793af2ff44163ba5">  928</a></span><span class="preprocessor">#define IMB_FEATURE_PCLMULQDQ  (1ULL &lt;&lt; 2)</span></div>
+<div class="line"><a id="l00929" name="l00929"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5eef394935c651931b1cf560f31c841c">  929</a></span><span class="preprocessor">#define IMB_FEATURE_CMOV       (1ULL &lt;&lt; 3)</span></div>
+<div class="line"><a id="l00930" name="l00930"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abcc243fc505aca3eac6963eff25e9b99">  930</a></span><span class="preprocessor">#define IMB_FEATURE_SSE4_2     (1ULL &lt;&lt; 4)</span></div>
+<div class="line"><a id="l00931" name="l00931"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7af992d12b4f9a6e789384969a066056">  931</a></span><span class="preprocessor">#define IMB_FEATURE_AVX        (1ULL &lt;&lt; 5)</span></div>
+<div class="line"><a id="l00932" name="l00932"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a225e2cd9c1445795fc62879eabad2530">  932</a></span><span class="preprocessor">#define IMB_FEATURE_AVX2       (1ULL &lt;&lt; 6)</span></div>
+<div class="line"><a id="l00933" name="l00933"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab673c08624d868ca0dd89e1a9ec28f00">  933</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512F    (1ULL &lt;&lt; 7)</span></div>
+<div class="line"><a id="l00934" name="l00934"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8ca2c970faa0f62a3f4a6b6c18432bb1">  934</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512DQ   (1ULL &lt;&lt; 8)</span></div>
+<div class="line"><a id="l00935" name="l00935"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abbdb390b80ff1a92f31a7a9adc9beeb9">  935</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512CD   (1ULL &lt;&lt; 9)</span></div>
+<div class="line"><a id="l00936" name="l00936"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a00caae81d425acb6b946bebb25ac267f">  936</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512BW   (1ULL &lt;&lt; 10)</span></div>
+<div class="line"><a id="l00937" name="l00937"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a803871900c08e2dc1b3f805ed4ecefd8">  937</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512VL   (1ULL &lt;&lt; 11)</span></div>
+<div class="line"><a id="l00938" name="l00938"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae6d6e3427c81b278d64f0189401c4964">  938</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512_SKX (IMB_FEATURE_AVX512F | IMB_FEATURE_AVX512DQ | \</span></div>
+<div class="line"><a id="l00939" name="l00939"></a><span class="lineno">  939</span><span class="preprocessor">                                IMB_FEATURE_AVX512CD | IMB_FEATURE_AVX512BW | \</span></div>
+<div class="line"><a id="l00940" name="l00940"></a><span class="lineno">  940</span><span class="preprocessor">                                IMB_FEATURE_AVX512VL)</span></div>
+<div class="line"><a id="l00941" name="l00941"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af4321e4e3c947f9b9fb7f204aaecf2c3">  941</a></span><span class="preprocessor">#define IMB_FEATURE_VAES       (1ULL &lt;&lt; 12)</span></div>
+<div class="line"><a id="l00942" name="l00942"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a153d695ecd1af69a0d23385a50654614">  942</a></span><span class="preprocessor">#define IMB_FEATURE_VPCLMULQDQ (1ULL &lt;&lt; 13)</span></div>
+<div class="line"><a id="l00943" name="l00943"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abd58fdbe1f1ef53cf509a0b37ba8aa4b">  943</a></span><span class="preprocessor">#define IMB_FEATURE_SAFE_DATA  (1ULL &lt;&lt; 14)</span></div>
+<div class="line"><a id="l00944" name="l00944"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4e9506dc72ab4e6a2af463238ccb3080">  944</a></span><span class="preprocessor">#define IMB_FEATURE_SAFE_PARAM (1ULL &lt;&lt; 15)</span></div>
+<div class="line"><a id="l00945" name="l00945"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa67ab4088ac2f8cadbe839101d276567">  945</a></span><span class="preprocessor">#define IMB_FEATURE_GFNI       (1ULL &lt;&lt; 16)</span></div>
+<div class="line"><a id="l00946" name="l00946"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0134dfaffe12427a8f2182247c6f1f48">  946</a></span><span class="preprocessor">#define IMB_FEATURE_AVX512_IFMA (1ULL &lt;&lt; 17)</span></div>
+<div class="line"><a id="l00947" name="l00947"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a557f3de4bcc0bd7e9bd90e5e1d1b9b09">  947</a></span><span class="preprocessor">#define IMB_FEATURE_BMI2       (1ULL &lt;&lt; 18)</span></div>
+<div class="line"><a id="l00948" name="l00948"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a421158db6d19c97a6bceb32eb4a839ed">  948</a></span><span class="preprocessor">#define IMB_FEATURE_AESNI_EMU  (1ULL &lt;&lt; 19)</span></div>
+<div class="line"><a id="l00949" name="l00949"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8b4181547ded3ff17859d2632c468151">  949</a></span><span class="preprocessor">#define IMB_FEATURE_SELF_TEST  (1ULL &lt;&lt; 20)     </span><span class="comment">/* self-test feature present */</span><span class="preprocessor"></span></div>
+<div class="line"><a id="l00950" name="l00950"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a673b969c5f01579f6ca0a6b003cf1197">  950</a></span><span class="preprocessor">#define IMB_FEATURE_SELF_TEST_PASS (1ULL &lt;&lt; 21) </span><span class="comment">/* self-test passed */</span><span class="preprocessor"></span></div>
+<div class="line"><a id="l00951" name="l00951"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8a946f162ff5e363d04f8b44d2f48747">  951</a></span><span class="preprocessor">#define IMB_FEATURE_AVX_IFMA (1ULL &lt;&lt; 22)</span></div>
+<div class="line"><a id="l00952" name="l00952"></a><span class="lineno">  952</span> </div>
+<div class="line"><a id="l00956" name="l00956"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6afb888ab232bab1c3ca027eb071f388">  956</a></span><span class="preprocessor">#define IMB_CPUFLAGS_NO_AESNI   (IMB_FEATURE_SSE4_2 | IMB_FEATURE_CMOV)</span></div>
+<div class="line"><a id="l00957" name="l00957"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5654f563aaad731df22c8e8517c9154c">  957</a></span><span class="preprocessor">#define IMB_CPUFLAGS_SSE        (IMB_CPUFLAGS_NO_AESNI | IMB_FEATURE_AESNI | \</span></div>
+<div class="line"><a id="l00958" name="l00958"></a><span class="lineno">  958</span><span class="preprocessor">                                 IMB_FEATURE_PCLMULQDQ)</span></div>
+<div class="line"><a id="l00959" name="l00959"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae6776750b801d7e177c152569c10c546">  959</a></span><span class="preprocessor">#define IMB_CPUFLAGS_SSE_T2     (IMB_CPUFLAGS_SSE | IMB_FEATURE_SHANI)</span></div>
+<div class="line"><a id="l00960" name="l00960"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa1cc7ac79ca44f06e3caa18fdd6d441a">  960</a></span><span class="preprocessor">#define IMB_CPUFLAGS_SSE_T3     (IMB_CPUFLAGS_SSE_T2 | IMB_FEATURE_GFNI)</span></div>
+<div class="line"><a id="l00961" name="l00961"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0329fede890d95a97423a714410e1576">  961</a></span><span class="preprocessor">#define IMB_CPUFLAGS_AVX        (IMB_CPUFLAGS_SSE | IMB_FEATURE_AVX)</span></div>
+<div class="line"><a id="l00962" name="l00962"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac0a92622a85423541536321231a6cb7d">  962</a></span><span class="preprocessor">#define IMB_CPUFLAGS_AVX2       (IMB_CPUFLAGS_AVX | IMB_FEATURE_AVX2 | \</span></div>
+<div class="line"><a id="l00963" name="l00963"></a><span class="lineno">  963</span><span class="preprocessor">                                 IMB_FEATURE_BMI2)</span></div>
+<div class="line"><a id="l00964" name="l00964"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0a250932ede6ca7b69f5c763c24cf51d">  964</a></span><span class="preprocessor">#define IMB_CPUFLAGS_AVX512     (IMB_CPUFLAGS_AVX2 | IMB_FEATURE_AVX512_SKX)</span></div>
+<div class="line"><a id="l00965" name="l00965"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af7bdbff703949eb2cf2dd3d3a08803de">  965</a></span><span class="preprocessor">#define IMB_CPUFLAGS_AVX512_T2  (IMB_CPUFLAGS_AVX512 | IMB_FEATURE_VAES | \</span></div>
+<div class="line"><a id="l00966" name="l00966"></a><span class="lineno">  966</span><span class="preprocessor">                                 IMB_FEATURE_VPCLMULQDQ | IMB_FEATURE_GFNI | \</span></div>
+<div class="line"><a id="l00967" name="l00967"></a><span class="lineno">  967</span><span class="preprocessor">                                 IMB_FEATURE_AVX512_IFMA | IMB_FEATURE_SHANI)</span></div>
+<div class="line"><a id="l00968" name="l00968"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a18f17a6bcef83c3976ca7a9b4ca624de">  968</a></span><span class="preprocessor">#define IMB_CPUFLAGS_AVX2_T2    (IMB_CPUFLAGS_AVX2 | IMB_FEATURE_SHANI | \</span></div>
+<div class="line"><a id="l00969" name="l00969"></a><span class="lineno">  969</span><span class="preprocessor">                                 IMB_FEATURE_VAES | IMB_FEATURE_VPCLMULQDQ | \</span></div>
+<div class="line"><a id="l00970" name="l00970"></a><span class="lineno">  970</span><span class="preprocessor">                                 IMB_FEATURE_GFNI)</span></div>
+<div class="line"><a id="l00971" name="l00971"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a85dab1abb0996e9ff4d4258fef3f9abd">  971</a></span><span class="preprocessor">#define IMB_CPUFLAGS_AVX_T2     (IMB_CPUFLAGS_AVX | IMB_FEATURE_SHANI | \</span></div>
+<div class="line"><a id="l00972" name="l00972"></a><span class="lineno">  972</span><span class="preprocessor">                                 IMB_FEATURE_GFNI)</span></div>
+<div class="line"><a id="l00973" name="l00973"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6e356586d2d3d7e93ff1b23d4a90b344">  973</a></span><span class="preprocessor">#define IMB_CPUFLAGS_AVX2_T3    (IMB_CPUFLAGS_AVX2_T2 | IMB_FEATURE_AVX_IFMA)</span></div>
+<div class="line"><a id="l00974" name="l00974"></a><span class="lineno">  974</span> </div>
+<div class="line"><a id="l00975" name="l00975"></a><span class="lineno">  975</span><span class="comment">/* TOP LEVEL (IMB_MGR) Data structure fields */</span></div>
+<div class="line"><a id="l00976" name="l00976"></a><span class="lineno">  976</span> </div>
+<div class="line"><a id="l00977" name="l00977"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af9070daf9749490016e9b5106b338867">  977</a></span><span class="preprocessor">#define IMB_MAX_BURST_SIZE 128</span></div>
+<div class="line"><a id="l00978" name="l00978"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab12d22470a68b5d3852c8dd972784d97">  978</a></span><span class="preprocessor">#define IMB_MAX_JOBS (IMB_MAX_BURST_SIZE * 2)</span></div>
+<div class="line"><a id="l00979" name="l00979"></a><span class="lineno">  979</span> </div>
+<div class="line"><a id="l00980" name="l00980"></a><span class="lineno"><a class="line" href="structIMB__MGR.html">  980</a></span><span class="keyword">typedef</span> <span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> {</div>
+<div class="line"><a id="l00981" name="l00981"></a><span class="lineno">  981</span> </div>
+<div class="line"><a id="l00982" name="l00982"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ae1a596c9c9d6ca1292c6116575021c14">  982</a></span>        uint64_t <a class="code hl_variable" href="structIMB__MGR.html#ae1a596c9c9d6ca1292c6116575021c14">flags</a>;   </div>
+<div class="line"><a id="l00983" name="l00983"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af877c7669265775604857c6b81063bdb">  983</a></span>        uint64_t <a class="code hl_variable" href="structIMB__MGR.html#af877c7669265775604857c6b81063bdb">features</a>; </div>
+<div class="line"><a id="l00985" name="l00985"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a136697eb37d5a06eeada0f338abd8b51">  985</a></span>        uint64_t <a class="code hl_variable" href="structIMB__MGR.html#a136697eb37d5a06eeada0f338abd8b51">reserved</a>[5]; </div>
+<div class="line"><a id="l00986" name="l00986"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a44b6c95f8ce611828b6acacdb459cdc9">  986</a></span>        uint32_t <a class="code hl_variable" href="structIMB__MGR.html#a44b6c95f8ce611828b6acacdb459cdc9">used_arch</a>; </div>
+<div class="line"><a id="l00988" name="l00988"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a0ab7a3dfdfd8442f591699e2310df11f">  988</a></span>        <span class="keywordtype">int</span> <a class="code hl_variable" href="structIMB__MGR.html#a0ab7a3dfdfd8442f591699e2310df11f">imb_errno</a>; </div>
+<div class="line"><a id="l00996" name="l00996"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a35939892cd168eb7ce9c6c29c5401709">  996</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a5a533d852e3b65e9e5978fec37da43b5">get_next_job_t</a>          <a class="code hl_variable" href="structIMB__MGR.html#a35939892cd168eb7ce9c6c29c5401709">get_next_job</a>;</div>
+<div class="line"><a id="l00997" name="l00997"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab143534d96e0d585b19dfc19553e929b">  997</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a41297d789b434157e746e338f0af96ec">submit_job_t</a>            <a class="code hl_variable" href="structIMB__MGR.html#ab143534d96e0d585b19dfc19553e929b">submit_job</a>;</div>
+<div class="line"><a id="l00998" name="l00998"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aab7350eeecc56b1ef45606b83519a72c">  998</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a41297d789b434157e746e338f0af96ec">submit_job_t</a>            <a class="code hl_variable" href="structIMB__MGR.html#aab7350eeecc56b1ef45606b83519a72c">submit_job_nocheck</a>;</div>
+<div class="line"><a id="l00999" name="l00999"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a99b7111c8fc59161e0bf291d13b1f195">  999</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac8cb9a545cdef14f60f36fe8888e6e7c">get_completed_job_t</a>     <a class="code hl_variable" href="structIMB__MGR.html#a99b7111c8fc59161e0bf291d13b1f195">get_completed_job</a>;</div>
+<div class="line"><a id="l01000" name="l01000"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a225e3b35eef8e18fd09c429fbb2f70b5"> 1000</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ae64d0f677e42b8f8d50289113cf5e01e">flush_job_t</a>             <a class="code hl_variable" href="structIMB__MGR.html#a225e3b35eef8e18fd09c429fbb2f70b5">flush_job</a>;</div>
+<div class="line"><a id="l01001" name="l01001"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5a35c9c2a1c8eb5b4aa239a3b04f4fbf"> 1001</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a9884ae92b598dd504f7d0ef8be5051d6">queue_size_t</a>            <a class="code hl_variable" href="structIMB__MGR.html#a5a35c9c2a1c8eb5b4aa239a3b04f4fbf">queue_size</a>;</div>
+<div class="line"><a id="l01002" name="l01002"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a7c97c5361b90abe325db55530b6f198e"> 1002</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">keyexp_t</a>                <a class="code hl_variable" href="structIMB__MGR.html#a7c97c5361b90abe325db55530b6f198e">keyexp_128</a>;</div>
+<div class="line"><a id="l01003" name="l01003"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a2bd7444a318de06b5f53178abf9c37ff"> 1003</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">keyexp_t</a>                <a class="code hl_variable" href="structIMB__MGR.html#a2bd7444a318de06b5f53178abf9c37ff">keyexp_192</a>;</div>
+<div class="line"><a id="l01004" name="l01004"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a431e99ddb3837a32bedb6cd426054bcc"> 1004</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">keyexp_t</a>                <a class="code hl_variable" href="structIMB__MGR.html#a431e99ddb3837a32bedb6cd426054bcc">keyexp_256</a>;</div>
+<div class="line"><a id="l01005" name="l01005"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aa3404b7811d57821ea574994e0c88995"> 1005</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aab07996d622d682adc1db8286e633cb3">cmac_subkey_gen_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#aa3404b7811d57821ea574994e0c88995">cmac_subkey_gen_128</a>;</div>
+<div class="line"><a id="l01006" name="l01006"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ae575c2350f5fca9a182c541795bb7d4d"> 1006</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#abb36f71b9fb4d928c2ad9fa462b80ae6">xcbc_keyexp_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#ae575c2350f5fca9a182c541795bb7d4d">xcbc_keyexp</a>;</div>
+<div class="line"><a id="l01007" name="l01007"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aae9afac5c2c1bf7b27d187d10778a1ee"> 1007</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a60a93569304a978c798bb8c4a4f7f52f">des_keysched_t</a>          <a class="code hl_variable" href="structIMB__MGR.html#aae9afac5c2c1bf7b27d187d10778a1ee">des_key_sched</a>;</div>
+<div class="line"><a id="l01008" name="l01008"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a80a26be9a12f561a68b70d65e096cde9"> 1008</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>        <a class="code hl_variable" href="structIMB__MGR.html#a80a26be9a12f561a68b70d65e096cde9">sha1_one_block</a>;</div>
+<div class="line"><a id="l01009" name="l01009"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aacf8209094d12ceceed96d4d0fae193c"> 1009</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>        <a class="code hl_variable" href="structIMB__MGR.html#aacf8209094d12ceceed96d4d0fae193c">sha224_one_block</a>;</div>
+<div class="line"><a id="l01010" name="l01010"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ade4a72c39980f0bba790b70529b60158"> 1010</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>        <a class="code hl_variable" href="structIMB__MGR.html#ade4a72c39980f0bba790b70529b60158">sha256_one_block</a>;</div>
+<div class="line"><a id="l01011" name="l01011"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a92b7ff145f0016dd46eabf9271ef03f1"> 1011</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a>        <a class="code hl_variable" href="structIMB__MGR.html#a92b7ff145f0016dd46eabf9271ef03f1">sha384_one_block</a>;</div>
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+<div class="line"><a id="l01018" name="l01018"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a62ebdd5e2b5a59c9e648511caf56f3f1"> 1018</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">hash_fn_t</a>               <a class="code hl_variable" href="structIMB__MGR.html#a62ebdd5e2b5a59c9e648511caf56f3f1">sha512</a>;</div>
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+<div class="line"><a id="l01020" name="l01020"></a><span class="lineno"> 1020</span> </div>
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+<div class="line"><a id="l01033" name="l01033"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a28ddfed1a807fedb9c77c99736278dcb"> 1033</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af701adcd98fd95084d76e0cb0f926fef">aes_gcm_enc_dec_update_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a28ddfed1a807fedb9c77c99736278dcb">gcm128_dec_update</a>;</div>
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+<div class="line"><a id="l01038" name="l01038"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a9764d27efef2491a86d517f38dd9b6ef"> 1038</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a9764d27efef2491a86d517f38dd9b6ef">gcm256_enc_finalize</a>;</div>
+<div class="line"><a id="l01039" name="l01039"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af95fa831fb24629e19613e8594e5d32a"> 1039</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a> <a class="code hl_variable" href="structIMB__MGR.html#af95fa831fb24629e19613e8594e5d32a">gcm128_dec_finalize</a>;</div>
+<div class="line"><a id="l01040" name="l01040"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a4d7879172344be144b92be68b2e2a81a"> 1040</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a4d7879172344be144b92be68b2e2a81a">gcm192_dec_finalize</a>;</div>
+<div class="line"><a id="l01041" name="l01041"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5c2e4a1296e33f5c9eaff2067a6432d4"> 1041</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a5c2e4a1296e33f5c9eaff2067a6432d4">gcm256_dec_finalize</a>;</div>
+<div class="line"><a id="l01042" name="l01042"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a69e4dd044703cd3aa9c4c36e04b2a701"> 1042</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">aes_gcm_precomp_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#a69e4dd044703cd3aa9c4c36e04b2a701">gcm128_precomp</a>;</div>
+<div class="line"><a id="l01043" name="l01043"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#abec8bdb319ca132028d5b787bf60a895"> 1043</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">aes_gcm_precomp_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#abec8bdb319ca132028d5b787bf60a895">gcm192_precomp</a>;</div>
+<div class="line"><a id="l01044" name="l01044"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a1ea15abc11b618ceb438c7f282643c52"> 1044</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">aes_gcm_precomp_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#a1ea15abc11b618ceb438c7f282643c52">gcm256_precomp</a>;</div>
+<div class="line"><a id="l01045" name="l01045"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a207c78e01e4aa1a35de1bbd2cc0a6ee2"> 1045</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#a207c78e01e4aa1a35de1bbd2cc0a6ee2">gcm128_pre</a>;</div>
+<div class="line"><a id="l01046" name="l01046"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a149b463ecf68ee78d39c33e183ed8997"> 1046</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#a149b463ecf68ee78d39c33e183ed8997">gcm192_pre</a>;</div>
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+<div class="line"><a id="l01048" name="l01048"></a><span class="lineno"> 1048</span> </div>
+<div class="line"><a id="l01049" name="l01049"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aeff54b370fbe495ce96370811d280140"> 1049</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a0a3032f0698c42bd486d053e90c44fdd">zuc_eea3_1_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#aeff54b370fbe495ce96370811d280140">eea3_1_buffer</a>;</div>
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+<div class="line"><a id="l01053" name="l01053"></a><span class="lineno"> 1053</span> </div>
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+<div class="line"><a id="l01060" name="l01060"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#afafb95a00fe6633fb6901855928b08bb"> 1060</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8b02114f003b5fe0e1ccbfdc13ac55e4">kasumi_f9_1_buffer_t</a>      <a class="code hl_variable" href="structIMB__MGR.html#afafb95a00fe6633fb6901855928b08bb">f9_1_buffer</a>;</div>
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+<div class="line"><a id="l01065" name="l01065"></a><span class="lineno"> 1065</span> </div>
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+<div class="line"><a id="l01082" name="l01082"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#afa275308dab467d0c68dc921bd68d1a4"> 1082</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d">aes_gcm_init_var_iv_t</a>   <a class="code hl_variable" href="structIMB__MGR.html#afa275308dab467d0c68dc921bd68d1a4">gcm256_init_var_iv</a>;</div>
 <div class="line"><a id="l01083" name="l01083"></a><span class="lineno"> 1083</span> </div>
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-<div class="line"><a id="l01098" name="l01098"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a99fcb1d18fa45044063c6c288b0fc769"> 1098</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af701adcd98fd95084d76e0cb0f926fef">aes_gcm_enc_dec_update_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a99fcb1d18fa45044063c6c288b0fc769">gcm256_dec_update</a>;</div>
-<div class="line"><a id="l01099" name="l01099"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a8efc0cf95907805289a297c024ce0cac"> 1099</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a8efc0cf95907805289a297c024ce0cac">gcm128_enc_finalize</a>;</div>
-<div class="line"><a id="l01100" name="l01100"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a91ad9ce7a4b3c9ceeffa9dd712013915"> 1100</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a91ad9ce7a4b3c9ceeffa9dd712013915">gcm192_enc_finalize</a>;</div>
-<div class="line"><a id="l01101" name="l01101"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a9764d27efef2491a86d517f38dd9b6ef"> 1101</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a9764d27efef2491a86d517f38dd9b6ef">gcm256_enc_finalize</a>;</div>
-<div class="line"><a id="l01102" name="l01102"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af95fa831fb24629e19613e8594e5d32a"> 1102</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a> <a class="code hl_variable" href="structIMB__MGR.html#af95fa831fb24629e19613e8594e5d32a">gcm128_dec_finalize</a>;</div>
-<div class="line"><a id="l01103" name="l01103"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a4d7879172344be144b92be68b2e2a81a"> 1103</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a4d7879172344be144b92be68b2e2a81a">gcm192_dec_finalize</a>;</div>
-<div class="line"><a id="l01104" name="l01104"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5c2e4a1296e33f5c9eaff2067a6432d4"> 1104</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a5c2e4a1296e33f5c9eaff2067a6432d4">gcm256_dec_finalize</a>;</div>
-<div class="line"><a id="l01105" name="l01105"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a69e4dd044703cd3aa9c4c36e04b2a701"> 1105</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">aes_gcm_precomp_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#a69e4dd044703cd3aa9c4c36e04b2a701">gcm128_precomp</a>;</div>
-<div class="line"><a id="l01106" name="l01106"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#abec8bdb319ca132028d5b787bf60a895"> 1106</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">aes_gcm_precomp_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#abec8bdb319ca132028d5b787bf60a895">gcm192_precomp</a>;</div>
-<div class="line"><a id="l01107" name="l01107"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a1ea15abc11b618ceb438c7f282643c52"> 1107</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">aes_gcm_precomp_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#a1ea15abc11b618ceb438c7f282643c52">gcm256_precomp</a>;</div>
-<div class="line"><a id="l01108" name="l01108"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a207c78e01e4aa1a35de1bbd2cc0a6ee2"> 1108</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#a207c78e01e4aa1a35de1bbd2cc0a6ee2">gcm128_pre</a>;</div>
-<div class="line"><a id="l01109" name="l01109"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a149b463ecf68ee78d39c33e183ed8997"> 1109</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#a149b463ecf68ee78d39c33e183ed8997">gcm192_pre</a>;</div>
-<div class="line"><a id="l01110" name="l01110"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a44b0b9d218043be965a84c29ced2584b"> 1110</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#a44b0b9d218043be965a84c29ced2584b">gcm256_pre</a>;</div>
-<div class="line"><a id="l01111" name="l01111"></a><span class="lineno"> 1111</span> </div>
-<div class="line"><a id="l01112" name="l01112"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aeff54b370fbe495ce96370811d280140"> 1112</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a0a3032f0698c42bd486d053e90c44fdd">zuc_eea3_1_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#aeff54b370fbe495ce96370811d280140">eea3_1_buffer</a>;</div>
-<div class="line"><a id="l01113" name="l01113"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ac5ad1bf8ecdcfc51eaf681fb353c9621"> 1113</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a7df2e3f063333d677ef7668626126c4d">zuc_eea3_4_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#ac5ad1bf8ecdcfc51eaf681fb353c9621">eea3_4_buffer</a>;</div>
-<div class="line"><a id="l01114" name="l01114"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a67d8a55ba87742b8cf282d23ed9e3ef5"> 1114</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a303f2dd11b1193938596b4ec69edf8cc">zuc_eea3_n_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a67d8a55ba87742b8cf282d23ed9e3ef5">eea3_n_buffer</a>;</div>
-<div class="line"><a id="l01115" name="l01115"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a3ed58bdf37ab6d5f0d28271882d52327"> 1115</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a95ed5580686f708ba2313179cd6064a8">zuc_eia3_1_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a3ed58bdf37ab6d5f0d28271882d52327">eia3_1_buffer</a>;</div>
-<div class="line"><a id="l01116" name="l01116"></a><span class="lineno"> 1116</span> </div>
-<div class="line"><a id="l01117" name="l01117"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af854e664cef84cb8be4495a1af5e9cb5"> 1117</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a89fe975f0388b71765be494d04b034f4">kasumi_f8_1_buffer_t</a>      <a class="code hl_variable" href="structIMB__MGR.html#af854e664cef84cb8be4495a1af5e9cb5">f8_1_buffer</a>;</div>
-<div class="line"><a id="l01118" name="l01118"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aacf6ce3f508fef115dcd2dc415ca7379"> 1118</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a81afa744fb5669fe37cf0dce2193d8a7">kasumi_f8_1_buffer_bit_t</a>  <a class="code hl_variable" href="structIMB__MGR.html#aacf6ce3f508fef115dcd2dc415ca7379">f8_1_buffer_bit</a>;</div>
-<div class="line"><a id="l01119" name="l01119"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ac733fc4c5ee6e80e8e71b20a9bb2dc6e"> 1119</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af1eb074f5da469fa655d1404be8701dd">kasumi_f8_2_buffer_t</a>      <a class="code hl_variable" href="structIMB__MGR.html#ac733fc4c5ee6e80e8e71b20a9bb2dc6e">f8_2_buffer</a>;</div>
-<div class="line"><a id="l01120" name="l01120"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a929b9c50bc98bf37daec7a1603f10118"> 1120</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a53ecac7e009fcbeee603f975a45d3012">kasumi_f8_3_buffer_t</a>      <a class="code hl_variable" href="structIMB__MGR.html#a929b9c50bc98bf37daec7a1603f10118">f8_3_buffer</a>;</div>
-<div class="line"><a id="l01121" name="l01121"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af0b1c5d3b269b252a75a55df8bdf472c"> 1121</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#accf08a616e22a2c56e6a37d56f38b354">kasumi_f8_4_buffer_t</a>      <a class="code hl_variable" href="structIMB__MGR.html#af0b1c5d3b269b252a75a55df8bdf472c">f8_4_buffer</a>;</div>
-<div class="line"><a id="l01122" name="l01122"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ae0f2316d96e46b64d08e3cf73a93b39d"> 1122</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a51bbde186cdd437b6f9448e19a58e8a1">kasumi_f8_n_buffer_t</a>      <a class="code hl_variable" href="structIMB__MGR.html#ae0f2316d96e46b64d08e3cf73a93b39d">f8_n_buffer</a>;</div>
-<div class="line"><a id="l01123" name="l01123"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#afafb95a00fe6633fb6901855928b08bb"> 1123</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8b02114f003b5fe0e1ccbfdc13ac55e4">kasumi_f9_1_buffer_t</a>      <a class="code hl_variable" href="structIMB__MGR.html#afafb95a00fe6633fb6901855928b08bb">f9_1_buffer</a>;</div>
-<div class="line"><a id="l01124" name="l01124"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a4fbdac066c9d0fbd1d586a2e5b2319c3"> 1124</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac17147d04602964bea59322ff31ebf59">kasumi_f9_1_buffer_user_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a4fbdac066c9d0fbd1d586a2e5b2319c3">f9_1_buffer_user</a>;</div>
-<div class="line"><a id="l01125" name="l01125"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab32d67f27cb6f06980080e09db133b24"> 1125</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a7bec62666456d8962676961cf187ac80">kasumi_init_f8_key_sched_t</a> <a class="code hl_variable" href="structIMB__MGR.html#ab32d67f27cb6f06980080e09db133b24">kasumi_init_f8_key_sched</a>;</div>
-<div class="line"><a id="l01126" name="l01126"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a58ad87104b08ba5b56fc65928677a639"> 1126</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a8b30db8462aca1c039c3fd20646f342c">kasumi_init_f9_key_sched_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a58ad87104b08ba5b56fc65928677a639">kasumi_init_f9_key_sched</a>;</div>
-<div class="line"><a id="l01127" name="l01127"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#abd0c855a3e43df48f5f21686a095f358"> 1127</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ad7444c36024a63025e7682c16946a00a">kasumi_key_sched_size_t</a>    <a class="code hl_variable" href="structIMB__MGR.html#abd0c855a3e43df48f5f21686a095f358">kasumi_key_sched_size</a>;</div>
-<div class="line"><a id="l01128" name="l01128"></a><span class="lineno"> 1128</span> </div>
-<div class="line"><a id="l01129" name="l01129"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ad85fdcb101391b0a2488a3244d5f442d"> 1129</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a7bd00b31d12260305accf0d37b60c958">snow3g_f8_1_buffer_bit_t</a> <a class="code hl_variable" href="structIMB__MGR.html#ad85fdcb101391b0a2488a3244d5f442d">snow3g_f8_1_buffer_bit</a>;</div>
-<div class="line"><a id="l01130" name="l01130"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab70cbec09a61b5adeae37260c10234ce"> 1130</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a281315fb8b441d837ebed541b3a23380">snow3g_f8_1_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#ab70cbec09a61b5adeae37260c10234ce">snow3g_f8_1_buffer</a>;</div>
-<div class="line"><a id="l01131" name="l01131"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a25f46509b2f8926902a73e2210d697fd"> 1131</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4e8912e7e55a2ac891f85c19e7f29328">snow3g_f8_2_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a25f46509b2f8926902a73e2210d697fd">snow3g_f8_2_buffer</a>;</div>
-<div class="line"><a id="l01132" name="l01132"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a194a0f15a7345ee369780dbdeb4f52f6"> 1132</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ae13b1154dcc13ca562e81471659d6099">snow3g_f8_4_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a194a0f15a7345ee369780dbdeb4f52f6">snow3g_f8_4_buffer</a>;</div>
-<div class="line"><a id="l01133" name="l01133"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a620d2d75bb50784aa0000b458197afaf"> 1133</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a6155f472c6794e88289235752d83154a">snow3g_f8_8_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a620d2d75bb50784aa0000b458197afaf">snow3g_f8_8_buffer</a>;</div>
-<div class="line"><a id="l01134" name="l01134"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a829c4cf1157dfc3fcb829df31e408e9d"> 1134</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a6a4a1da950207c9ed04f3f18ae1b7e43">snow3g_f8_n_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a829c4cf1157dfc3fcb829df31e408e9d">snow3g_f8_n_buffer</a>;</div>
-<div class="line"><a id="l01135" name="l01135"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a898a4c56e1a746a328529c3665c5682e"> 1135</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a109b2a72d05bbe05a373ed5cf3c1f201">snow3g_f8_8_buffer_multikey_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a898a4c56e1a746a328529c3665c5682e">snow3g_f8_8_buffer_multikey</a>;</div>
-<div class="line"><a id="l01136" name="l01136"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a63a2a5f74e7cc2fc637896bdaeb6b262"> 1136</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4049b601f9da6542e25d903efe524bc1">snow3g_f8_n_buffer_multikey_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a63a2a5f74e7cc2fc637896bdaeb6b262">snow3g_f8_n_buffer_multikey</a>;</div>
-<div class="line"><a id="l01137" name="l01137"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a9a4d2148b6e8b4426b2946e9fe695461"> 1137</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ae7a48386f7190b4e46cd113eee413733">snow3g_f9_1_buffer_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a9a4d2148b6e8b4426b2946e9fe695461">snow3g_f9_1_buffer</a>;</div>
-<div class="line"><a id="l01138" name="l01138"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a38ff0528815be4d92481948664366ca9"> 1138</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#adfa182361f1c179d75129b4e46841af5">snow3g_init_key_sched_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a38ff0528815be4d92481948664366ca9">snow3g_init_key_sched</a>;</div>
-<div class="line"><a id="l01139" name="l01139"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5e0002330399f643e8f0ca0c1b96a7a0"> 1139</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ad78a4f1c0d6de808f7046c0fbcd98d8f">snow3g_key_sched_size_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a5e0002330399f643e8f0ca0c1b96a7a0">snow3g_key_sched_size</a>;</div>
-<div class="line"><a id="l01140" name="l01140"></a><span class="lineno"> 1140</span> </div>
-<div class="line"><a id="l01141" name="l01141"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#afc7d7ae10e8e6f37b9ec894059818fad"> 1141</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a12e0c05f0ecec8d75d4b288a7ec11c84">ghash_t</a>                 <a class="code hl_variable" href="structIMB__MGR.html#afc7d7ae10e8e6f37b9ec894059818fad">ghash</a>;</div>
-<div class="line"><a id="l01142" name="l01142"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab515c5aec39b1a9a31454b945e5ccd35"> 1142</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ada45082bb04dd727c0deec5c4fc96fed">zuc_eia3_n_buffer_t</a>     <a class="code hl_variable" href="structIMB__MGR.html#ab515c5aec39b1a9a31454b945e5ccd35">eia3_n_buffer</a>;</div>
-<div class="line"><a id="l01143" name="l01143"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aebd9eab76cd056add559e6bea328dbf0"> 1143</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d">aes_gcm_init_var_iv_t</a>   <a class="code hl_variable" href="structIMB__MGR.html#aebd9eab76cd056add559e6bea328dbf0">gcm128_init_var_iv</a>;</div>
-<div class="line"><a id="l01144" name="l01144"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a7bfa7b17c0fb36dc832138a86948991f"> 1144</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d">aes_gcm_init_var_iv_t</a>   <a class="code hl_variable" href="structIMB__MGR.html#a7bfa7b17c0fb36dc832138a86948991f">gcm192_init_var_iv</a>;</div>
-<div class="line"><a id="l01145" name="l01145"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#afa275308dab467d0c68dc921bd68d1a4"> 1145</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d">aes_gcm_init_var_iv_t</a>   <a class="code hl_variable" href="structIMB__MGR.html#afa275308dab467d0c68dc921bd68d1a4">gcm256_init_var_iv</a>;</div>
-<div class="line"><a id="l01146" name="l01146"></a><span class="lineno"> 1146</span> </div>
-<div class="line"><a id="l01147" name="l01147"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a1098c38784f6c6e4e3a3380f8be8ecc1"> 1147</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">aes_gmac_init_t</a>         <a class="code hl_variable" href="structIMB__MGR.html#a1098c38784f6c6e4e3a3380f8be8ecc1">gmac128_init</a>;</div>
-<div class="line"><a id="l01148" name="l01148"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a3dd58a9d9b4fb6cf85fa26175ffac9a6"> 1148</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">aes_gmac_init_t</a>         <a class="code hl_variable" href="structIMB__MGR.html#a3dd58a9d9b4fb6cf85fa26175ffac9a6">gmac192_init</a>;</div>
-<div class="line"><a id="l01149" name="l01149"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aca7d6388863eb76b60651e7b16c41b82"> 1149</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">aes_gmac_init_t</a>         <a class="code hl_variable" href="structIMB__MGR.html#aca7d6388863eb76b60651e7b16c41b82">gmac256_init</a>;</div>
-<div class="line"><a id="l01150" name="l01150"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a90aad4f47448a1959b7cf747438d7ce9"> 1150</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">aes_gmac_update_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#a90aad4f47448a1959b7cf747438d7ce9">gmac128_update</a>;</div>
-<div class="line"><a id="l01151" name="l01151"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5220f0d243291ae5a2f43fbc93d18725"> 1151</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">aes_gmac_update_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#a5220f0d243291ae5a2f43fbc93d18725">gmac192_update</a>;</div>
-<div class="line"><a id="l01152" name="l01152"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a0720a1fc9c0652c6b3aa7dfab070f73d"> 1152</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">aes_gmac_update_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#a0720a1fc9c0652c6b3aa7dfab070f73d">gmac256_update</a>;</div>
-<div class="line"><a id="l01153" name="l01153"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a00ce9a8422a961166ce9855d4815cc2e"> 1153</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">aes_gmac_finalize_t</a>     <a class="code hl_variable" href="structIMB__MGR.html#a00ce9a8422a961166ce9855d4815cc2e">gmac128_finalize</a>;</div>
-<div class="line"><a id="l01154" name="l01154"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a000b24d7fbb9b57ed6bd4147d225e015"> 1154</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">aes_gmac_finalize_t</a>     <a class="code hl_variable" href="structIMB__MGR.html#a000b24d7fbb9b57ed6bd4147d225e015">gmac192_finalize</a>;</div>
-<div class="line"><a id="l01155" name="l01155"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a3bb98c9a9c8545f363b74627870c7038"> 1155</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">aes_gmac_finalize_t</a>     <a class="code hl_variable" href="structIMB__MGR.html#a3bb98c9a9c8545f363b74627870c7038">gmac256_finalize</a>;</div>
-<div class="line"><a id="l01156" name="l01156"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a0863c9f64126aba5cb47628493dae582"> 1156</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aa34b11bf4be97c764b283aedc0589575">hec_32_t</a>                <a class="code hl_variable" href="structIMB__MGR.html#a0863c9f64126aba5cb47628493dae582">hec_32</a>;</div>
-<div class="line"><a id="l01157" name="l01157"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a4128ee02f4cbef5aa1e6b0bb5fd46097"> 1157</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aa9afd4ee91f0d82729afcf5f1cdcb808">hec_64_t</a>                <a class="code hl_variable" href="structIMB__MGR.html#a4128ee02f4cbef5aa1e6b0bb5fd46097">hec_64</a>;</div>
-<div class="line"><a id="l01158" name="l01158"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#abd500d2cc03f6470ac6988785bebdf76"> 1158</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aab07996d622d682adc1db8286e633cb3">cmac_subkey_gen_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#abd500d2cc03f6470ac6988785bebdf76">cmac_subkey_gen_256</a>;</div>
-<div class="line"><a id="l01159" name="l01159"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af6a1c323981b8c3cfe09f94cd9dd58e2"> 1159</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#af6a1c323981b8c3cfe09f94cd9dd58e2">ghash_pre</a>;</div>
-<div class="line"><a id="l01160" name="l01160"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a8483109fbe42f8b7fa6e7f53e016d5ec"> 1160</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a8483109fbe42f8b7fa6e7f53e016d5ec">crc32_ethernet_fcs</a>;</div>
-<div class="line"><a id="l01161" name="l01161"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a52a7ab10d6434820e9b31d0e772ea0bc"> 1161</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a52a7ab10d6434820e9b31d0e772ea0bc">crc16_x25</a>;</div>
-<div class="line"><a id="l01162" name="l01162"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a4aed66c9e73808a65a062e1a5b0f66aa"> 1162</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a4aed66c9e73808a65a062e1a5b0f66aa">crc32_sctp</a>;</div>
-<div class="line"><a id="l01163" name="l01163"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a058cfc60f2fdd68678b36f4f038270ac"> 1163</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a058cfc60f2fdd68678b36f4f038270ac">crc24_lte_a</a>;</div>
-<div class="line"><a id="l01164" name="l01164"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#abe8406f3582d3540edb770e153b74c3e"> 1164</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#abe8406f3582d3540edb770e153b74c3e">crc24_lte_b</a>;</div>
-<div class="line"><a id="l01165" name="l01165"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ad566ac43002c2ba8ecb93048d5edc41b"> 1165</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#ad566ac43002c2ba8ecb93048d5edc41b">crc16_fp_data</a>;</div>
-<div class="line"><a id="l01166" name="l01166"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a4b901916c2f262f1c873e4cec7b7f474"> 1166</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a4b901916c2f262f1c873e4cec7b7f474">crc11_fp_header</a>;</div>
-<div class="line"><a id="l01167" name="l01167"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ac819ddcc968604186983d58f275bd24b"> 1167</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#ac819ddcc968604186983d58f275bd24b">crc7_fp_header</a>;</div>
-<div class="line"><a id="l01168" name="l01168"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a7d0979deda4e2ff7ac202c82611ce94c"> 1168</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a7d0979deda4e2ff7ac202c82611ce94c">crc10_iuup_data</a>;</div>
-<div class="line"><a id="l01169" name="l01169"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aa610dc7226673020be410762b995b725"> 1169</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#aa610dc7226673020be410762b995b725">crc6_iuup_header</a>;</div>
-<div class="line"><a id="l01170" name="l01170"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ad08e44bc4edc54c556ea2245f848b974"> 1170</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#ad08e44bc4edc54c556ea2245f848b974">crc32_wimax_ofdma_data</a>;</div>
-<div class="line"><a id="l01171" name="l01171"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5e5be572c46ed01ac11fc95738373e2a"> 1171</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a5e5be572c46ed01ac11fc95738373e2a">crc8_wimax_ofdma_hcs</a>;</div>
-<div class="line"><a id="l01172" name="l01172"></a><span class="lineno"> 1172</span> </div>
-<div class="line"><a id="l01173" name="l01173"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a67b96b1b26fa25391f9f4b83a7a4b6c0"> 1173</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4b0b9ffa331f8d675d24911639f0374f">chacha_poly_init_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#a67b96b1b26fa25391f9f4b83a7a4b6c0">chacha20_poly1305_init</a>;</div>
-<div class="line"><a id="l01174" name="l01174"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab2c87c40f9844795e3987536c602ce03"> 1174</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548">chacha_poly_enc_dec_update_t</a> <a class="code hl_variable" href="structIMB__MGR.html#ab2c87c40f9844795e3987536c602ce03">chacha20_poly1305_enc_update</a>;</div>
-<div class="line"><a id="l01175" name="l01175"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a715aede4176564ac475e42c8a377bd8d"> 1175</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548">chacha_poly_enc_dec_update_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a715aede4176564ac475e42c8a377bd8d">chacha20_poly1305_dec_update</a>;</div>
-<div class="line"><a id="l01176" name="l01176"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab18b3fcba2aa252bb31f66093bc62abb"> 1176</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a1a96f063bf1bd07de158985b57cff4a0">chacha_poly_finalize_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#ab18b3fcba2aa252bb31f66093bc62abb">chacha20_poly1305_finalize</a>;</div>
-<div class="line"><a id="l01177" name="l01177"></a><span class="lineno"> 1177</span> </div>
-<div class="line"><a id="l01178" name="l01178"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a6a790b2aa04138fce78c3347e285a31b"> 1178</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a0cf6acb86385bc984ec5f916fe6e1066">submit_burst_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a6a790b2aa04138fce78c3347e285a31b">submit_burst</a>;</div>
-<div class="line"><a id="l01179" name="l01179"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ad16230a6a671adbd597675abbc0f0a87"> 1179</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a0cf6acb86385bc984ec5f916fe6e1066">submit_burst_t</a> <a class="code hl_variable" href="structIMB__MGR.html#ad16230a6a671adbd597675abbc0f0a87">submit_burst_nocheck</a>;</div>
-<div class="line"><a id="l01180" name="l01180"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a8b52f1b3ca92eff48b945929a0eab839"> 1180</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009">submit_cipher_burst_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a8b52f1b3ca92eff48b945929a0eab839">submit_cipher_burst</a>;</div>
-<div class="line"><a id="l01181" name="l01181"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#acb2ee84d30247bb257635063db3ae308"> 1181</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009">submit_cipher_burst_t</a> <a class="code hl_variable" href="structIMB__MGR.html#acb2ee84d30247bb257635063db3ae308">submit_cipher_burst_nocheck</a>;</div>
-<div class="line"><a id="l01182" name="l01182"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a20a3d4d1e40aed26d83db5395b7ccc83"> 1182</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5">submit_hash_burst_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a20a3d4d1e40aed26d83db5395b7ccc83">submit_hash_burst</a>;</div>
-<div class="line"><a id="l01183" name="l01183"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a809782eb9dcbd264442bcd9edd2f4c2f"> 1183</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5">submit_hash_burst_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a809782eb9dcbd264442bcd9edd2f4c2f">submit_hash_burst_nocheck</a>;</div>
-<div class="line"><a id="l01184" name="l01184"></a><span class="lineno"> 1184</span> </div>
-<div class="line"><a id="l01185" name="l01185"></a><span class="lineno"> 1185</span>        <span class="comment">/* in-order scheduler fields */</span></div>
-<div class="line"><a id="l01186" name="l01186"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ac5cd33ac3bf985dc31ccc716fb3a7747"> 1186</a></span>        <span class="keywordtype">int</span>              <a class="code hl_variable" href="structIMB__MGR.html#ac5cd33ac3bf985dc31ccc716fb3a7747">earliest_job</a>; </div>
-<div class="line"><a id="l01187" name="l01187"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a106ebd60d876e56bfc6bcc03d20acce4"> 1187</a></span>        <span class="keywordtype">int</span>              <a class="code hl_variable" href="structIMB__MGR.html#a106ebd60d876e56bfc6bcc03d20acce4">next_job</a>;     </div>
-<div class="line"><a id="l01188" name="l01188"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab342224dce812fb13a9e935e7a7b0617"> 1188</a></span>        <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a>     <a class="code hl_variable" href="structIMB__MGR.html#ab342224dce812fb13a9e935e7a7b0617">jobs</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#ab12d22470a68b5d3852c8dd972784d97">IMB_MAX_JOBS</a>];</div>
-<div class="line"><a id="l01189" name="l01189"></a><span class="lineno"> 1189</span> </div>
-<div class="line"><a id="l01190" name="l01190"></a><span class="lineno"> 1190</span>        <span class="comment">/* out of order managers */</span></div>
-<div class="line"><a id="l01191" name="l01191"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a97fd05a4057fc898f647955a7ba8501b"> 1191</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a97fd05a4057fc898f647955a7ba8501b">aes128_ooo</a>;</div>
-<div class="line"><a id="l01192" name="l01192"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#afe48187946dff59f6c69103501691921"> 1192</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#afe48187946dff59f6c69103501691921">aes192_ooo</a>;</div>
-<div class="line"><a id="l01193" name="l01193"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a6abbf129001cb44003a10105115e52b7"> 1193</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a6abbf129001cb44003a10105115e52b7">aes256_ooo</a>;</div>
-<div class="line"><a id="l01194" name="l01194"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a93cb5904608e179c49917f80c64fabd1"> 1194</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a93cb5904608e179c49917f80c64fabd1">docsis128_sec_ooo</a>;</div>
-<div class="line"><a id="l01195" name="l01195"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#acf438b50cb95a4fff1276b6666d22ad4"> 1195</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#acf438b50cb95a4fff1276b6666d22ad4">docsis128_crc32_sec_ooo</a>;</div>
-<div class="line"><a id="l01196" name="l01196"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#acb6e3b70e16194274e2eaefdff8f9e89"> 1196</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#acb6e3b70e16194274e2eaefdff8f9e89">docsis256_sec_ooo</a>;</div>
-<div class="line"><a id="l01197" name="l01197"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af6531598b8dd0131a11e0cf95854605d"> 1197</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#af6531598b8dd0131a11e0cf95854605d">docsis256_crc32_sec_ooo</a>;</div>
-<div class="line"><a id="l01198" name="l01198"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a54ec50411917f1aa9016db268ac638c1"> 1198</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a54ec50411917f1aa9016db268ac638c1">des_enc_ooo</a>;</div>
-<div class="line"><a id="l01199" name="l01199"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af03e401b002e2e415c8a927c46e1517b"> 1199</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#af03e401b002e2e415c8a927c46e1517b">des_dec_ooo</a>;</div>
-<div class="line"><a id="l01200" name="l01200"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a87f7566634911b4dba48a19a0c3a4993"> 1200</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a87f7566634911b4dba48a19a0c3a4993">des3_enc_ooo</a>;</div>
-<div class="line"><a id="l01201" name="l01201"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a2ab69fdbef6a9a0574fcbb5ea9a7da3b"> 1201</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a2ab69fdbef6a9a0574fcbb5ea9a7da3b">des3_dec_ooo</a>;</div>
-<div class="line"><a id="l01202" name="l01202"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a937fb0d3b113d203ee1a4beaf5b5b98f"> 1202</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a937fb0d3b113d203ee1a4beaf5b5b98f">docsis_des_enc_ooo</a>;</div>
-<div class="line"><a id="l01203" name="l01203"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a3d5173cea3d4932576f0a5b3abbc1f40"> 1203</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a3d5173cea3d4932576f0a5b3abbc1f40">docsis_des_dec_ooo</a>;</div>
-<div class="line"><a id="l01204" name="l01204"></a><span class="lineno"> 1204</span> </div>
-<div class="line"><a id="l01205" name="l01205"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a49be1d77b96d338c08200dce82e452d3"> 1205</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a49be1d77b96d338c08200dce82e452d3">hmac_sha_1_ooo</a>;</div>
-<div class="line"><a id="l01206" name="l01206"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab9226cf37e41c2a13ae6003305654193"> 1206</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#ab9226cf37e41c2a13ae6003305654193">hmac_sha_224_ooo</a>;</div>
-<div class="line"><a id="l01207" name="l01207"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a633807f7eaae35ada650a2c22f1366be"> 1207</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a633807f7eaae35ada650a2c22f1366be">hmac_sha_256_ooo</a>;</div>
-<div class="line"><a id="l01208" name="l01208"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#afd72d6af1d8ff605e8aaaf984f0700ed"> 1208</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#afd72d6af1d8ff605e8aaaf984f0700ed">hmac_sha_384_ooo</a>;</div>
-<div class="line"><a id="l01209" name="l01209"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af0cf9149495b0805a4f6f511c0fbff5b"> 1209</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#af0cf9149495b0805a4f6f511c0fbff5b">hmac_sha_512_ooo</a>;</div>
-<div class="line"><a id="l01210" name="l01210"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a855d14df536b22ceb175dc495ced891c"> 1210</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a855d14df536b22ceb175dc495ced891c">hmac_md5_ooo</a>;</div>
-<div class="line"><a id="l01211" name="l01211"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ad554a25793a904ae6cf7ca87250adbd3"> 1211</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#ad554a25793a904ae6cf7ca87250adbd3">aes_xcbc_ooo</a>;</div>
-<div class="line"><a id="l01212" name="l01212"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a3eeeead99056e46d8cb1ed316f587aaf"> 1212</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a3eeeead99056e46d8cb1ed316f587aaf">aes_ccm_ooo</a>;</div>
-<div class="line"><a id="l01213" name="l01213"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a0bd2acac3a6c3f90a998ed53a7d28e57"> 1213</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a0bd2acac3a6c3f90a998ed53a7d28e57">aes_cmac_ooo</a>;</div>
-<div class="line"><a id="l01214" name="l01214"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a26d22c5ff963b9c7ffc8af19292bce5c"> 1214</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a26d22c5ff963b9c7ffc8af19292bce5c">zuc_eea3_ooo</a>;</div>
-<div class="line"><a id="l01215" name="l01215"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a910f747aa1a0e6a46f87b0dfd2189219"> 1215</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a910f747aa1a0e6a46f87b0dfd2189219">zuc_eia3_ooo</a>;</div>
-<div class="line"><a id="l01216" name="l01216"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a9c72f3341a9a4837595338d06c3eda5c"> 1216</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a9c72f3341a9a4837595338d06c3eda5c">aes128_cbcs_ooo</a>;</div>
-<div class="line"><a id="l01217" name="l01217"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a6d05b0a20196be514182920710dce2a8"> 1217</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a6d05b0a20196be514182920710dce2a8">zuc256_eea3_ooo</a>;</div>
-<div class="line"><a id="l01218" name="l01218"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5f8744a8d64273d3f4cbcd9ad41ce3d5"> 1218</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a5f8744a8d64273d3f4cbcd9ad41ce3d5">zuc256_eia3_ooo</a>;</div>
-<div class="line"><a id="l01219" name="l01219"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a04c28bfe763544b68dac98e23aa0a8d9"> 1219</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a04c28bfe763544b68dac98e23aa0a8d9">aes256_ccm_ooo</a>;</div>
-<div class="line"><a id="l01220" name="l01220"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#acbd18bab8176262daab2bd808ca30616"> 1220</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#acbd18bab8176262daab2bd808ca30616">aes256_cmac_ooo</a>;</div>
-<div class="line"><a id="l01221" name="l01221"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab0193bf46978026a82803c25e11acbfb"> 1221</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#ab0193bf46978026a82803c25e11acbfb">snow3g_uea2_ooo</a>;</div>
-<div class="line"><a id="l01222" name="l01222"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aa7d4cfe53e0d70c22d3a274b8cd218af"> 1222</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#aa7d4cfe53e0d70c22d3a274b8cd218af">snow3g_uia2_ooo</a>;</div>
-<div class="line"><a id="l01223" name="l01223"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#acdb53e812f3e4a307a497eeab28c4256"> 1223</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#acdb53e812f3e4a307a497eeab28c4256">sha_1_ooo</a>;</div>
-<div class="line"><a id="l01224" name="l01224"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aa174bf6846067a48f3f47ee5ebd74877"> 1224</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#aa174bf6846067a48f3f47ee5ebd74877">sha_224_ooo</a>;</div>
-<div class="line"><a id="l01225" name="l01225"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a37fc5ccae7af099a8517566a20751265"> 1225</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a37fc5ccae7af099a8517566a20751265">sha_256_ooo</a>;</div>
-<div class="line"><a id="l01226" name="l01226"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a51a499114f84eed88cb48bd3b461bd1c"> 1226</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a51a499114f84eed88cb48bd3b461bd1c">sha_384_ooo</a>;</div>
-<div class="line"><a id="l01227" name="l01227"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a6e21e034cd011b695bac5a711be65da1"> 1227</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a6e21e034cd011b695bac5a711be65da1">sha_512_ooo</a>;</div>
-<div class="line"><a id="l01228" name="l01228"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a6e1ab772182b97f931af3d4685785353"> 1228</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a6e1ab772182b97f931af3d4685785353">end_ooo</a>; <span class="comment">/* add new out-of-order managers above this line */</span></div>
-<div class="line"><a id="l01229" name="l01229"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6d466496b4adfea3f9bc0881f11fe551"> 1229</a></span>} <a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a>;</div>
-<div class="line"><a id="l01230" name="l01230"></a><span class="lineno"> 1230</span> </div>
-<div class="line"><a id="l01241" name="l01241"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4490e7b324236315f1a9e141b39f99f2"> 1241</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keyword">const</span> <span class="keywordtype">char</span> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a4490e7b324236315f1a9e141b39f99f2">imb_get_version_str</a>(<span class="keywordtype">void</span>);</div>
-<div class="line"><a id="l01242" name="l01242"></a><span class="lineno"> 1242</span> </div>
-<div class="line"><a id="l01251" name="l01251"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aee02bcb3a5e5eaee3632086f75c3d78d"> 1251</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">unsigned</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aee02bcb3a5e5eaee3632086f75c3d78d">imb_get_version</a>(<span class="keywordtype">void</span>);</div>
-<div class="line"><a id="l01252" name="l01252"></a><span class="lineno"> 1252</span> </div>
-<div class="line"><a id="l01253" name="l01253"></a><span class="lineno"> 1253</span> </div>
-<div class="line"><a id="l01261" name="l01261"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a79f60b2bffbe91dac3e4f8b486e7ab10"> 1261</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a79f60b2bffbe91dac3e4f8b486e7ab10">imb_get_errno</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *mb_mgr);</div>
-<div class="line"><a id="l01262" name="l01262"></a><span class="lineno"> 1262</span> </div>
-<div class="line"><a id="l01270" name="l01270"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a61f664448a862fbb02e728ce518ff8e4"> 1270</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keyword">const</span> <span class="keywordtype">char</span> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a61f664448a862fbb02e728ce518ff8e4">imb_get_strerror</a>(<span class="keywordtype">int</span> errnum);</div>
-<div class="line"><a id="l01271" name="l01271"></a><span class="lineno"> 1271</span> </div>
-<div class="line"><a id="l01295" name="l01295"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e"> 1295</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e">alloc_mb_mgr</a>(uint64_t flags);</div>
-<div class="line"><a id="l01296" name="l01296"></a><span class="lineno"> 1296</span> </div>
-<div class="line"><a id="l01303" name="l01303"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a238b96cc36c0dc64798a1244b94add8b"> 1303</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a238b96cc36c0dc64798a1244b94add8b">free_mb_mgr</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *ptr);</div>
-<div class="line"><a id="l01304" name="l01304"></a><span class="lineno"> 1304</span> </div>
-<div class="line"><a id="l01310" name="l01310"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac8379ada0d6ec030ebad9828fbea9459"> 1310</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">size_t</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac8379ada0d6ec030ebad9828fbea9459">imb_get_mb_mgr_size</a>(<span class="keywordtype">void</span>);</div>
-<div class="line"><a id="l01311" name="l01311"></a><span class="lineno"> 1311</span> </div>
-<div class="line"><a id="l01332" name="l01332"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3a825e903d1f8f8611b98b60fcaa5a81"> 1332</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a3a825e903d1f8f8611b98b60fcaa5a81">imb_set_pointers_mb_mgr</a>(<span class="keywordtype">void</span> *ptr, <span class="keyword">const</span> uint64_t flags,</div>
-<div class="line"><a id="l01333" name="l01333"></a><span class="lineno"> 1333</span>                                                <span class="keyword">const</span> <span class="keywordtype">unsigned</span> reset_mgr);</div>
-<div class="line"><a id="l01334" name="l01334"></a><span class="lineno"> 1334</span> </div>
-<div class="line"><a id="l01341" name="l01341"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a725703ff6da6b402bde7041a2fabfddf"> 1341</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint64_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#a725703ff6da6b402bde7041a2fabfddf">imb_get_feature_flags</a>(<span class="keywordtype">void</span>);</div>
-<div class="line"><a id="l01342" name="l01342"></a><span class="lineno"> 1342</span> </div>
-<div class="line"><a id="l01353" name="l01353"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aee547b1b9e70e12c84d9949317e41c6c"> 1353</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aee547b1b9e70e12c84d9949317e41c6c">init_mb_mgr_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01357" name="l01357"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a71b6563b6b4c0c504cd9b8302a242cfa"> 1357</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a71b6563b6b4c0c504cd9b8302a242cfa">init_mb_mgr_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01361" name="l01361"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a98932a3c61d798b0c8a560dcc3dce16f"> 1361</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a98932a3c61d798b0c8a560dcc3dce16f">init_mb_mgr_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01365" name="l01365"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2ad1941fe5d77b8bb2d6445679e3b0c5"> 1365</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2ad1941fe5d77b8bb2d6445679e3b0c5">init_mb_mgr_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01366" name="l01366"></a><span class="lineno"> 1366</span> </div>
-<div class="line"><a id="l01367" name="l01367"></a><span class="lineno"> 1367</span> </div>
-<div class="line"><a id="l01377" name="l01377"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a950bf3b7a3c63a371b561ea20aaf3a18"> 1377</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a950bf3b7a3c63a371b561ea20aaf3a18">submit_job_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01381" name="l01381"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8913995859e45005f8de57a3456c93cf"> 1381</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a8913995859e45005f8de57a3456c93cf">submit_job_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01385" name="l01385"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a75cc0d090470e47cd8be04451ee31a68"> 1385</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a75cc0d090470e47cd8be04451ee31a68">submit_job_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01389" name="l01389"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7700e90058a74980bfd7d462a19d32a0"> 1389</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a7700e90058a74980bfd7d462a19d32a0">submit_job_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01390" name="l01390"></a><span class="lineno"> 1390</span> </div>
-<div class="line"><a id="l01400" name="l01400"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7b339426753d3a7c44625a5ded3170a"> 1400</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#ac7b339426753d3a7c44625a5ded3170a">submit_job_nocheck_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01404" name="l01404"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a72caaf8162ae6f802f7c1fe570afe42e"> 1404</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a72caaf8162ae6f802f7c1fe570afe42e">submit_job_nocheck_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01408" name="l01408"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5a95b9268508d68b9027df98167d22cd"> 1408</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a5a95b9268508d68b9027df98167d22cd">submit_job_nocheck_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01412" name="l01412"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a35e4c8a3d2eba8a612f021572621f98e"> 1412</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a35e4c8a3d2eba8a612f021572621f98e">submit_job_nocheck_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01413" name="l01413"></a><span class="lineno"> 1413</span> </div>
-<div class="line"><a id="l01421" name="l01421"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abc6b0f1c857f26b834f22b6bd8f51846"> 1421</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#abc6b0f1c857f26b834f22b6bd8f51846">flush_job_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01425" name="l01425"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae242d142065172898129f30e6bc40d8c"> 1425</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#ae242d142065172898129f30e6bc40d8c">flush_job_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01429" name="l01429"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7aec54f653aeee2554ba980d62fd491"> 1429</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#ac7aec54f653aeee2554ba980d62fd491">flush_job_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01433" name="l01433"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a96b880b8a32b0466f880d4f22d95cc3b"> 1433</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a96b880b8a32b0466f880d4f22d95cc3b">flush_job_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01434" name="l01434"></a><span class="lineno"> 1434</span> </div>
-<div class="line"><a id="l01442" name="l01442"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a800c395d326e718a2b520d0bb91cbb89"> 1442</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint32_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#a800c395d326e718a2b520d0bb91cbb89">queue_size_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01446" name="l01446"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8a540000c08366ad47d95e23ed5b2918"> 1446</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint32_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#a8a540000c08366ad47d95e23ed5b2918">queue_size_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01450" name="l01450"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a51c0426a4b57c9e7db2b091692dff472"> 1450</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint32_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#a51c0426a4b57c9e7db2b091692dff472">queue_size_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01454" name="l01454"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a80f792744558de173ea97d722c58e5c1"> 1454</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint32_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#a80f792744558de173ea97d722c58e5c1">queue_size_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01455" name="l01455"></a><span class="lineno"> 1455</span> </div>
-<div class="line"><a id="l01463" name="l01463"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9d115c47670330bd01b960f2188169d9"> 1463</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a9d115c47670330bd01b960f2188169d9">get_completed_job_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01467" name="l01467"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad85bdbf56038fd72ceda7e50deea586e"> 1467</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#ad85bdbf56038fd72ceda7e50deea586e">get_completed_job_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01471" name="l01471"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a693afd528fcc0809cc667b6c38de84dc"> 1471</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a693afd528fcc0809cc667b6c38de84dc">get_completed_job_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01475" name="l01475"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a267a718472e0c1b6585402e81e44e7e9"> 1475</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a267a718472e0c1b6585402e81e44e7e9">get_completed_job_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01476" name="l01476"></a><span class="lineno"> 1476</span> </div>
-<div class="line"><a id="l01484" name="l01484"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3518b02f06a82e9f83cd0435f3cf25c9"> 1484</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a3518b02f06a82e9f83cd0435f3cf25c9">get_next_job_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01488" name="l01488"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a49a3d54979188b3c68bdd621043125f7"> 1488</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a49a3d54979188b3c68bdd621043125f7">get_next_job_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01492" name="l01492"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a40c08ba2c387e24f2096b1213c46c812"> 1492</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a40c08ba2c387e24f2096b1213c46c812">get_next_job_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01496" name="l01496"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a055db1f6f16bc17724bdc64d0f313871"> 1496</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a055db1f6f16bc17724bdc64d0f313871">get_next_job_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
-<div class="line"><a id="l01497" name="l01497"></a><span class="lineno"> 1497</span> </div>
-<div class="line"><a id="l01506" name="l01506"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2cbbd032835837fd0aa83b04f5337638"> 1506</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2cbbd032835837fd0aa83b04f5337638">init_mb_mgr_auto</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state, <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6">IMB_ARCH</a> *arch);</div>
-<div class="line"><a id="l01507" name="l01507"></a><span class="lineno"> 1507</span> </div>
-<div class="line"><a id="l01508" name="l01508"></a><span class="lineno"> 1508</span><span class="comment">/*</span></div>
-<div class="line"><a id="l01509" name="l01509"></a><span class="lineno"> 1509</span><span class="comment"> * Wrapper macros to call arch API&#39;s set up</span></div>
-<div class="line"><a id="l01510" name="l01510"></a><span class="lineno"> 1510</span><span class="comment"> * at init phase of multi-buffer manager.</span></div>
-<div class="line"><a id="l01511" name="l01511"></a><span class="lineno"> 1511</span><span class="comment"> *</span></div>
-<div class="line"><a id="l01512" name="l01512"></a><span class="lineno"> 1512</span><span class="comment"> * For example, after calling init_mb_mgr_sse(&amp;mgr)</span></div>
-<div class="line"><a id="l01513" name="l01513"></a><span class="lineno"> 1513</span><span class="comment"> * The &#39;mgr&#39; structure be set up so that:</span></div>
-<div class="line"><a id="l01514" name="l01514"></a><span class="lineno"> 1514</span><span class="comment"> *   mgr.get_next_job will point to get_next_job_sse(),</span></div>
-<div class="line"><a id="l01515" name="l01515"></a><span class="lineno"> 1515</span><span class="comment"> *   mgr.submit_job will point to submit_job_sse(),</span></div>
-<div class="line"><a id="l01516" name="l01516"></a><span class="lineno"> 1516</span><span class="comment"> *   mgr.submit_job_nocheck will point to submit_job_nocheck_sse(),</span></div>
-<div class="line"><a id="l01517" name="l01517"></a><span class="lineno"> 1517</span><span class="comment"> *   mgr.get_completed_job will point to get_completed_job_sse(),</span></div>
-<div class="line"><a id="l01518" name="l01518"></a><span class="lineno"> 1518</span><span class="comment"> *   mgr.flush_job will point to flush_job_sse(),</span></div>
-<div class="line"><a id="l01519" name="l01519"></a><span class="lineno"> 1519</span><span class="comment"> *   mgr.queue_size will point to queue_size_sse()</span></div>
-<div class="line"><a id="l01520" name="l01520"></a><span class="lineno"> 1520</span><span class="comment"> *   mgr.keyexp_128 will point to aes_keyexp_128_sse()</span></div>
-<div class="line"><a id="l01521" name="l01521"></a><span class="lineno"> 1521</span><span class="comment"> *   mgr.keyexp_192 will point to aes_keyexp_192_sse()</span></div>
-<div class="line"><a id="l01522" name="l01522"></a><span class="lineno"> 1522</span><span class="comment"> *   mgr.keyexp_256 will point to aes_keyexp_256_sse()</span></div>
-<div class="line"><a id="l01523" name="l01523"></a><span class="lineno"> 1523</span><span class="comment"> *   etc.</span></div>
-<div class="line"><a id="l01524" name="l01524"></a><span class="lineno"> 1524</span><span class="comment"> *</span></div>
-<div class="line"><a id="l01525" name="l01525"></a><span class="lineno"> 1525</span><span class="comment"> * Direct use of arch API&#39;s may result in better performance.</span></div>
-<div class="line"><a id="l01526" name="l01526"></a><span class="lineno"> 1526</span><span class="comment"> * Using below indirect interface may produce slightly worse performance but</span></div>
-<div class="line"><a id="l01527" name="l01527"></a><span class="lineno"> 1527</span><span class="comment"> * it can simplify application implementation.</span></div>
-<div class="line"><a id="l01528" name="l01528"></a><span class="lineno"> 1528</span><span class="comment"> * The test app provides example of using the indirect interface.</span></div>
-<div class="line"><a id="l01529" name="l01529"></a><span class="lineno"> 1529</span><span class="comment"> */</span></div>
-<div class="line"><a id="l01530" name="l01530"></a><span class="lineno"> 1530</span> </div>
-<div class="line"><a id="l01538" name="l01538"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a34b6006fc39dd4ea23d3fec49237d382"> 1538</a></span><span class="preprocessor">#define IMB_GET_NEXT_JOB(_mgr) ((_mgr)-&gt;get_next_job((_mgr)))</span></div>
-<div class="line"><a id="l01539" name="l01539"></a><span class="lineno"> 1539</span> </div>
-<div class="line"><a id="l01549" name="l01549"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3602a4ccaf1da4bf6787169370cef04f"> 1549</a></span><span class="preprocessor">#define IMB_SUBMIT_JOB(_mgr) ((_mgr)-&gt;submit_job((_mgr)))</span></div>
-<div class="line"><a id="l01550" name="l01550"></a><span class="lineno"> 1550</span> </div>
-<div class="line"><a id="l01560" name="l01560"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af23c64e466272c5ae90fcf78fbcd0c3d"> 1560</a></span><span class="preprocessor">#define IMB_SUBMIT_JOB_NOCHECK(_mgr) ((_mgr)-&gt;submit_job_nocheck((_mgr)))</span></div>
-<div class="line"><a id="l01561" name="l01561"></a><span class="lineno"> 1561</span> </div>
-<div class="line"><a id="l01569" name="l01569"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a18e5a7f85573f0006448deda41014117"> 1569</a></span><span class="preprocessor">#define IMB_GET_COMPLETED_JOB(_mgr)  ((_mgr)-&gt;get_completed_job((_mgr)))</span></div>
-<div class="line"><a id="l01570" name="l01570"></a><span class="lineno"> 1570</span> </div>
-<div class="line"><a id="l01578" name="l01578"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4726e3683b3579b1e643134278386d72"> 1578</a></span><span class="preprocessor">#define IMB_FLUSH_JOB(_mgr)          ((_mgr)-&gt;flush_job((_mgr)))</span></div>
-<div class="line"><a id="l01579" name="l01579"></a><span class="lineno"> 1579</span> </div>
-<div class="line"><a id="l01587" name="l01587"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a712f6e7ecb2a16f8e1bc96b84d188365"> 1587</a></span><span class="preprocessor">#define IMB_QUEUE_SIZE(_mgr)         ((_mgr)-&gt;queue_size((_mgr)))</span></div>
+<div class="line"><a id="l01084" name="l01084"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a1098c38784f6c6e4e3a3380f8be8ecc1"> 1084</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">aes_gmac_init_t</a>         <a class="code hl_variable" href="structIMB__MGR.html#a1098c38784f6c6e4e3a3380f8be8ecc1">gmac128_init</a>;</div>
+<div class="line"><a id="l01085" name="l01085"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a3dd58a9d9b4fb6cf85fa26175ffac9a6"> 1085</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">aes_gmac_init_t</a>         <a class="code hl_variable" href="structIMB__MGR.html#a3dd58a9d9b4fb6cf85fa26175ffac9a6">gmac192_init</a>;</div>
+<div class="line"><a id="l01086" name="l01086"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aca7d6388863eb76b60651e7b16c41b82"> 1086</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">aes_gmac_init_t</a>         <a class="code hl_variable" href="structIMB__MGR.html#aca7d6388863eb76b60651e7b16c41b82">gmac256_init</a>;</div>
+<div class="line"><a id="l01087" name="l01087"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a90aad4f47448a1959b7cf747438d7ce9"> 1087</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">aes_gmac_update_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#a90aad4f47448a1959b7cf747438d7ce9">gmac128_update</a>;</div>
+<div class="line"><a id="l01088" name="l01088"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5220f0d243291ae5a2f43fbc93d18725"> 1088</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">aes_gmac_update_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#a5220f0d243291ae5a2f43fbc93d18725">gmac192_update</a>;</div>
+<div class="line"><a id="l01089" name="l01089"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a0720a1fc9c0652c6b3aa7dfab070f73d"> 1089</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">aes_gmac_update_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#a0720a1fc9c0652c6b3aa7dfab070f73d">gmac256_update</a>;</div>
+<div class="line"><a id="l01090" name="l01090"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a00ce9a8422a961166ce9855d4815cc2e"> 1090</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">aes_gmac_finalize_t</a>     <a class="code hl_variable" href="structIMB__MGR.html#a00ce9a8422a961166ce9855d4815cc2e">gmac128_finalize</a>;</div>
+<div class="line"><a id="l01091" name="l01091"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a000b24d7fbb9b57ed6bd4147d225e015"> 1091</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">aes_gmac_finalize_t</a>     <a class="code hl_variable" href="structIMB__MGR.html#a000b24d7fbb9b57ed6bd4147d225e015">gmac192_finalize</a>;</div>
+<div class="line"><a id="l01092" name="l01092"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a3bb98c9a9c8545f363b74627870c7038"> 1092</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">aes_gmac_finalize_t</a>     <a class="code hl_variable" href="structIMB__MGR.html#a3bb98c9a9c8545f363b74627870c7038">gmac256_finalize</a>;</div>
+<div class="line"><a id="l01093" name="l01093"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a0863c9f64126aba5cb47628493dae582"> 1093</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aa34b11bf4be97c764b283aedc0589575">hec_32_t</a>                <a class="code hl_variable" href="structIMB__MGR.html#a0863c9f64126aba5cb47628493dae582">hec_32</a>;</div>
+<div class="line"><a id="l01094" name="l01094"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a4128ee02f4cbef5aa1e6b0bb5fd46097"> 1094</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aa9afd4ee91f0d82729afcf5f1cdcb808">hec_64_t</a>                <a class="code hl_variable" href="structIMB__MGR.html#a4128ee02f4cbef5aa1e6b0bb5fd46097">hec_64</a>;</div>
+<div class="line"><a id="l01095" name="l01095"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#abd500d2cc03f6470ac6988785bebdf76"> 1095</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aab07996d622d682adc1db8286e633cb3">cmac_subkey_gen_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#abd500d2cc03f6470ac6988785bebdf76">cmac_subkey_gen_256</a>;</div>
+<div class="line"><a id="l01096" name="l01096"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af6a1c323981b8c3cfe09f94cd9dd58e2"> 1096</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#af6a1c323981b8c3cfe09f94cd9dd58e2">ghash_pre</a>;</div>
+<div class="line"><a id="l01097" name="l01097"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a8483109fbe42f8b7fa6e7f53e016d5ec"> 1097</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a8483109fbe42f8b7fa6e7f53e016d5ec">crc32_ethernet_fcs</a>;</div>
+<div class="line"><a id="l01098" name="l01098"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a52a7ab10d6434820e9b31d0e772ea0bc"> 1098</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a52a7ab10d6434820e9b31d0e772ea0bc">crc16_x25</a>;</div>
+<div class="line"><a id="l01099" name="l01099"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a4aed66c9e73808a65a062e1a5b0f66aa"> 1099</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a4aed66c9e73808a65a062e1a5b0f66aa">crc32_sctp</a>;</div>
+<div class="line"><a id="l01100" name="l01100"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a058cfc60f2fdd68678b36f4f038270ac"> 1100</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a058cfc60f2fdd68678b36f4f038270ac">crc24_lte_a</a>;</div>
+<div class="line"><a id="l01101" name="l01101"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#abe8406f3582d3540edb770e153b74c3e"> 1101</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#abe8406f3582d3540edb770e153b74c3e">crc24_lte_b</a>;</div>
+<div class="line"><a id="l01102" name="l01102"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ad566ac43002c2ba8ecb93048d5edc41b"> 1102</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#ad566ac43002c2ba8ecb93048d5edc41b">crc16_fp_data</a>;</div>
+<div class="line"><a id="l01103" name="l01103"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a4b901916c2f262f1c873e4cec7b7f474"> 1103</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a4b901916c2f262f1c873e4cec7b7f474">crc11_fp_header</a>;</div>
+<div class="line"><a id="l01104" name="l01104"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ac819ddcc968604186983d58f275bd24b"> 1104</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#ac819ddcc968604186983d58f275bd24b">crc7_fp_header</a>;</div>
+<div class="line"><a id="l01105" name="l01105"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a7d0979deda4e2ff7ac202c82611ce94c"> 1105</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a7d0979deda4e2ff7ac202c82611ce94c">crc10_iuup_data</a>;</div>
+<div class="line"><a id="l01106" name="l01106"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aa610dc7226673020be410762b995b725"> 1106</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#aa610dc7226673020be410762b995b725">crc6_iuup_header</a>;</div>
+<div class="line"><a id="l01107" name="l01107"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ad08e44bc4edc54c556ea2245f848b974"> 1107</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#ad08e44bc4edc54c556ea2245f848b974">crc32_wimax_ofdma_data</a>;</div>
+<div class="line"><a id="l01108" name="l01108"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5e5be572c46ed01ac11fc95738373e2a"> 1108</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a>              <a class="code hl_variable" href="structIMB__MGR.html#a5e5be572c46ed01ac11fc95738373e2a">crc8_wimax_ofdma_hcs</a>;</div>
+<div class="line"><a id="l01109" name="l01109"></a><span class="lineno"> 1109</span> </div>
+<div class="line"><a id="l01110" name="l01110"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a67b96b1b26fa25391f9f4b83a7a4b6c0"> 1110</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4b0b9ffa331f8d675d24911639f0374f">chacha_poly_init_t</a>           <a class="code hl_variable" href="structIMB__MGR.html#a67b96b1b26fa25391f9f4b83a7a4b6c0">chacha20_poly1305_init</a>;</div>
+<div class="line"><a id="l01111" name="l01111"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab2c87c40f9844795e3987536c602ce03"> 1111</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548">chacha_poly_enc_dec_update_t</a> <a class="code hl_variable" href="structIMB__MGR.html#ab2c87c40f9844795e3987536c602ce03">chacha20_poly1305_enc_update</a>;</div>
+<div class="line"><a id="l01112" name="l01112"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a715aede4176564ac475e42c8a377bd8d"> 1112</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548">chacha_poly_enc_dec_update_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a715aede4176564ac475e42c8a377bd8d">chacha20_poly1305_dec_update</a>;</div>
+<div class="line"><a id="l01113" name="l01113"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab18b3fcba2aa252bb31f66093bc62abb"> 1113</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a1a96f063bf1bd07de158985b57cff4a0">chacha_poly_finalize_t</a>       <a class="code hl_variable" href="structIMB__MGR.html#ab18b3fcba2aa252bb31f66093bc62abb">chacha20_poly1305_finalize</a>;</div>
+<div class="line"><a id="l01114" name="l01114"></a><span class="lineno"> 1114</span> </div>
+<div class="line"><a id="l01115" name="l01115"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a8c6b03b886ce7706a6cc8319345e8acf"> 1115</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aaeed8e5ec28aba6b8deef269b7c4bb28">burst_fn_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a8c6b03b886ce7706a6cc8319345e8acf">get_next_burst</a>;</div>
+<div class="line"><a id="l01116" name="l01116"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aa69002f8d8e17c0048d7aff9b3a1894e"> 1116</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aaeed8e5ec28aba6b8deef269b7c4bb28">burst_fn_t</a> <a class="code hl_variable" href="structIMB__MGR.html#aa69002f8d8e17c0048d7aff9b3a1894e">submit_burst</a>;</div>
+<div class="line"><a id="l01117" name="l01117"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a34adc55c8041e211c73c632628cd60d3"> 1117</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aaeed8e5ec28aba6b8deef269b7c4bb28">burst_fn_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a34adc55c8041e211c73c632628cd60d3">submit_burst_nocheck</a>;</div>
+<div class="line"><a id="l01118" name="l01118"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aa0283df1a5cd7a6dfc78c8f9896ea3ec"> 1118</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aaeed8e5ec28aba6b8deef269b7c4bb28">burst_fn_t</a> <a class="code hl_variable" href="structIMB__MGR.html#aa0283df1a5cd7a6dfc78c8f9896ea3ec">flush_burst</a>;</div>
+<div class="line"><a id="l01119" name="l01119"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a8b52f1b3ca92eff48b945929a0eab839"> 1119</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009">submit_cipher_burst_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a8b52f1b3ca92eff48b945929a0eab839">submit_cipher_burst</a>;</div>
+<div class="line"><a id="l01120" name="l01120"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#acb2ee84d30247bb257635063db3ae308"> 1120</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009">submit_cipher_burst_t</a> <a class="code hl_variable" href="structIMB__MGR.html#acb2ee84d30247bb257635063db3ae308">submit_cipher_burst_nocheck</a>;</div>
+<div class="line"><a id="l01121" name="l01121"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a20a3d4d1e40aed26d83db5395b7ccc83"> 1121</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5">submit_hash_burst_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a20a3d4d1e40aed26d83db5395b7ccc83">submit_hash_burst</a>;</div>
+<div class="line"><a id="l01122" name="l01122"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a809782eb9dcbd264442bcd9edd2f4c2f"> 1122</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5">submit_hash_burst_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a809782eb9dcbd264442bcd9edd2f4c2f">submit_hash_burst_nocheck</a>;</div>
+<div class="line"><a id="l01123" name="l01123"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab4e116827875a9dd2573f425081c7eaf"> 1123</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#aeb837fda81cdf56ffcfa4e68b5877a35">aes_cfb_t</a> <a class="code hl_variable" href="structIMB__MGR.html#ab4e116827875a9dd2573f425081c7eaf">aes256_cfb_one</a>;</div>
+<div class="line"><a id="l01124" name="l01124"></a><span class="lineno"> 1124</span> </div>
+<div class="line"><a id="l01125" name="l01125"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a436adbd14682855df093afb36c569039"> 1125</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ad907e0caa52fcb257275464179620643">aes_ecb_quic_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a436adbd14682855df093afb36c569039">aes_ecb_128_quic</a>;</div>
+<div class="line"><a id="l01126" name="l01126"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5e589dea4f677ad01cfb01d06884a281"> 1126</a></span>        <a class="code hl_typedef" href="intel-ipsec-mb_8h.html#ad907e0caa52fcb257275464179620643">aes_ecb_quic_t</a> <a class="code hl_variable" href="structIMB__MGR.html#a5e589dea4f677ad01cfb01d06884a281">aes_ecb_256_quic</a>;</div>
+<div class="line"><a id="l01127" name="l01127"></a><span class="lineno"> 1127</span> </div>
+<div class="line"><a id="l01128" name="l01128"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a95209e74a7acff69d46eef91021a1168"> 1128</a></span>        void (*<a class="code hl_variable" href="structIMB__MGR.html#a95209e74a7acff69d46eef91021a1168">set_suite_id</a>)(<span class="keyword">struct </span><a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *, <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *);</div>
+<div class="line"><a id="l01129" name="l01129"></a><span class="lineno"> 1129</span> </div>
+<div class="line"><a id="l01130" name="l01130"></a><span class="lineno"> 1130</span>        <span class="comment">/* in-order scheduler fields */</span></div>
+<div class="line"><a id="l01131" name="l01131"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ac5cd33ac3bf985dc31ccc716fb3a7747"> 1131</a></span>        <span class="keywordtype">int</span>              <a class="code hl_variable" href="structIMB__MGR.html#ac5cd33ac3bf985dc31ccc716fb3a7747">earliest_job</a>; </div>
+<div class="line"><a id="l01132" name="l01132"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a106ebd60d876e56bfc6bcc03d20acce4"> 1132</a></span>        <span class="keywordtype">int</span>              <a class="code hl_variable" href="structIMB__MGR.html#a106ebd60d876e56bfc6bcc03d20acce4">next_job</a>;     </div>
+<div class="line"><a id="l01133" name="l01133"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab342224dce812fb13a9e935e7a7b0617"> 1133</a></span>        <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a>     <a class="code hl_variable" href="structIMB__MGR.html#ab342224dce812fb13a9e935e7a7b0617">jobs</a>[<a class="code hl_define" href="intel-ipsec-mb_8h.html#ab12d22470a68b5d3852c8dd972784d97">IMB_MAX_JOBS</a>];</div>
+<div class="line"><a id="l01134" name="l01134"></a><span class="lineno"> 1134</span> </div>
+<div class="line"><a id="l01135" name="l01135"></a><span class="lineno"> 1135</span>        <span class="comment">/* out of order managers */</span></div>
+<div class="line"><a id="l01136" name="l01136"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a97fd05a4057fc898f647955a7ba8501b"> 1136</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a97fd05a4057fc898f647955a7ba8501b">aes128_ooo</a>;</div>
+<div class="line"><a id="l01137" name="l01137"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#afe48187946dff59f6c69103501691921"> 1137</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#afe48187946dff59f6c69103501691921">aes192_ooo</a>;</div>
+<div class="line"><a id="l01138" name="l01138"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a6abbf129001cb44003a10105115e52b7"> 1138</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a6abbf129001cb44003a10105115e52b7">aes256_ooo</a>;</div>
+<div class="line"><a id="l01139" name="l01139"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a93cb5904608e179c49917f80c64fabd1"> 1139</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a93cb5904608e179c49917f80c64fabd1">docsis128_sec_ooo</a>;</div>
+<div class="line"><a id="l01140" name="l01140"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#acf438b50cb95a4fff1276b6666d22ad4"> 1140</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#acf438b50cb95a4fff1276b6666d22ad4">docsis128_crc32_sec_ooo</a>;</div>
+<div class="line"><a id="l01141" name="l01141"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#acb6e3b70e16194274e2eaefdff8f9e89"> 1141</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#acb6e3b70e16194274e2eaefdff8f9e89">docsis256_sec_ooo</a>;</div>
+<div class="line"><a id="l01142" name="l01142"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af6531598b8dd0131a11e0cf95854605d"> 1142</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#af6531598b8dd0131a11e0cf95854605d">docsis256_crc32_sec_ooo</a>;</div>
+<div class="line"><a id="l01143" name="l01143"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a54ec50411917f1aa9016db268ac638c1"> 1143</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a54ec50411917f1aa9016db268ac638c1">des_enc_ooo</a>;</div>
+<div class="line"><a id="l01144" name="l01144"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af03e401b002e2e415c8a927c46e1517b"> 1144</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#af03e401b002e2e415c8a927c46e1517b">des_dec_ooo</a>;</div>
+<div class="line"><a id="l01145" name="l01145"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a87f7566634911b4dba48a19a0c3a4993"> 1145</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a87f7566634911b4dba48a19a0c3a4993">des3_enc_ooo</a>;</div>
+<div class="line"><a id="l01146" name="l01146"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a2ab69fdbef6a9a0574fcbb5ea9a7da3b"> 1146</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a2ab69fdbef6a9a0574fcbb5ea9a7da3b">des3_dec_ooo</a>;</div>
+<div class="line"><a id="l01147" name="l01147"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a937fb0d3b113d203ee1a4beaf5b5b98f"> 1147</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a937fb0d3b113d203ee1a4beaf5b5b98f">docsis_des_enc_ooo</a>;</div>
+<div class="line"><a id="l01148" name="l01148"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a3d5173cea3d4932576f0a5b3abbc1f40"> 1148</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a3d5173cea3d4932576f0a5b3abbc1f40">docsis_des_dec_ooo</a>;</div>
+<div class="line"><a id="l01149" name="l01149"></a><span class="lineno"> 1149</span> </div>
+<div class="line"><a id="l01150" name="l01150"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a49be1d77b96d338c08200dce82e452d3"> 1150</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a49be1d77b96d338c08200dce82e452d3">hmac_sha_1_ooo</a>;</div>
+<div class="line"><a id="l01151" name="l01151"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab9226cf37e41c2a13ae6003305654193"> 1151</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#ab9226cf37e41c2a13ae6003305654193">hmac_sha_224_ooo</a>;</div>
+<div class="line"><a id="l01152" name="l01152"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a633807f7eaae35ada650a2c22f1366be"> 1152</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a633807f7eaae35ada650a2c22f1366be">hmac_sha_256_ooo</a>;</div>
+<div class="line"><a id="l01153" name="l01153"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#afd72d6af1d8ff605e8aaaf984f0700ed"> 1153</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#afd72d6af1d8ff605e8aaaf984f0700ed">hmac_sha_384_ooo</a>;</div>
+<div class="line"><a id="l01154" name="l01154"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#af0cf9149495b0805a4f6f511c0fbff5b"> 1154</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#af0cf9149495b0805a4f6f511c0fbff5b">hmac_sha_512_ooo</a>;</div>
+<div class="line"><a id="l01155" name="l01155"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a855d14df536b22ceb175dc495ced891c"> 1155</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a855d14df536b22ceb175dc495ced891c">hmac_md5_ooo</a>;</div>
+<div class="line"><a id="l01156" name="l01156"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ad554a25793a904ae6cf7ca87250adbd3"> 1156</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#ad554a25793a904ae6cf7ca87250adbd3">aes_xcbc_ooo</a>;</div>
+<div class="line"><a id="l01157" name="l01157"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a3eeeead99056e46d8cb1ed316f587aaf"> 1157</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a3eeeead99056e46d8cb1ed316f587aaf">aes_ccm_ooo</a>;</div>
+<div class="line"><a id="l01158" name="l01158"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a0bd2acac3a6c3f90a998ed53a7d28e57"> 1158</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a0bd2acac3a6c3f90a998ed53a7d28e57">aes_cmac_ooo</a>;</div>
+<div class="line"><a id="l01159" name="l01159"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a26d22c5ff963b9c7ffc8af19292bce5c"> 1159</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a26d22c5ff963b9c7ffc8af19292bce5c">zuc_eea3_ooo</a>;</div>
+<div class="line"><a id="l01160" name="l01160"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a910f747aa1a0e6a46f87b0dfd2189219"> 1160</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a910f747aa1a0e6a46f87b0dfd2189219">zuc_eia3_ooo</a>;</div>
+<div class="line"><a id="l01161" name="l01161"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a9c72f3341a9a4837595338d06c3eda5c"> 1161</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a9c72f3341a9a4837595338d06c3eda5c">aes128_cbcs_ooo</a>;</div>
+<div class="line"><a id="l01162" name="l01162"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a6d05b0a20196be514182920710dce2a8"> 1162</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a6d05b0a20196be514182920710dce2a8">zuc256_eea3_ooo</a>;</div>
+<div class="line"><a id="l01163" name="l01163"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a5f8744a8d64273d3f4cbcd9ad41ce3d5"> 1163</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a5f8744a8d64273d3f4cbcd9ad41ce3d5">zuc256_eia3_ooo</a>;</div>
+<div class="line"><a id="l01164" name="l01164"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a04c28bfe763544b68dac98e23aa0a8d9"> 1164</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a04c28bfe763544b68dac98e23aa0a8d9">aes256_ccm_ooo</a>;</div>
+<div class="line"><a id="l01165" name="l01165"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#acbd18bab8176262daab2bd808ca30616"> 1165</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#acbd18bab8176262daab2bd808ca30616">aes256_cmac_ooo</a>;</div>
+<div class="line"><a id="l01166" name="l01166"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#ab0193bf46978026a82803c25e11acbfb"> 1166</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#ab0193bf46978026a82803c25e11acbfb">snow3g_uea2_ooo</a>;</div>
+<div class="line"><a id="l01167" name="l01167"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aa7d4cfe53e0d70c22d3a274b8cd218af"> 1167</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#aa7d4cfe53e0d70c22d3a274b8cd218af">snow3g_uia2_ooo</a>;</div>
+<div class="line"><a id="l01168" name="l01168"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#acdb53e812f3e4a307a497eeab28c4256"> 1168</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#acdb53e812f3e4a307a497eeab28c4256">sha_1_ooo</a>;</div>
+<div class="line"><a id="l01169" name="l01169"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#aa174bf6846067a48f3f47ee5ebd74877"> 1169</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#aa174bf6846067a48f3f47ee5ebd74877">sha_224_ooo</a>;</div>
+<div class="line"><a id="l01170" name="l01170"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a37fc5ccae7af099a8517566a20751265"> 1170</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a37fc5ccae7af099a8517566a20751265">sha_256_ooo</a>;</div>
+<div class="line"><a id="l01171" name="l01171"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a51a499114f84eed88cb48bd3b461bd1c"> 1171</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a51a499114f84eed88cb48bd3b461bd1c">sha_384_ooo</a>;</div>
+<div class="line"><a id="l01172" name="l01172"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a6e21e034cd011b695bac5a711be65da1"> 1172</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a6e21e034cd011b695bac5a711be65da1">sha_512_ooo</a>;</div>
+<div class="line"><a id="l01173" name="l01173"></a><span class="lineno"><a class="line" href="structIMB__MGR.html#a6e1ab772182b97f931af3d4685785353"> 1173</a></span>        <span class="keywordtype">void</span> *<a class="code hl_variable" href="structIMB__MGR.html#a6e1ab772182b97f931af3d4685785353">end_ooo</a>; <span class="comment">/* add new out-of-order managers above this line */</span></div>
+<div class="line"><a id="l01174" name="l01174"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6d466496b4adfea3f9bc0881f11fe551"> 1174</a></span>} <a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a>;</div>
+<div class="line"><a id="l01175" name="l01175"></a><span class="lineno"> 1175</span> </div>
+<div class="line"><a id="l01186" name="l01186"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4490e7b324236315f1a9e141b39f99f2"> 1186</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keyword">const</span> <span class="keywordtype">char</span> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a4490e7b324236315f1a9e141b39f99f2">imb_get_version_str</a>(<span class="keywordtype">void</span>);</div>
+<div class="line"><a id="l01187" name="l01187"></a><span class="lineno"> 1187</span> </div>
+<div class="line"><a id="l01196" name="l01196"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aee02bcb3a5e5eaee3632086f75c3d78d"> 1196</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">unsigned</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aee02bcb3a5e5eaee3632086f75c3d78d">imb_get_version</a>(<span class="keywordtype">void</span>);</div>
+<div class="line"><a id="l01197" name="l01197"></a><span class="lineno"> 1197</span> </div>
+<div class="line"><a id="l01198" name="l01198"></a><span class="lineno"> 1198</span> </div>
+<div class="line"><a id="l01206" name="l01206"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a79f60b2bffbe91dac3e4f8b486e7ab10"> 1206</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a79f60b2bffbe91dac3e4f8b486e7ab10">imb_get_errno</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *mb_mgr);</div>
+<div class="line"><a id="l01207" name="l01207"></a><span class="lineno"> 1207</span> </div>
+<div class="line"><a id="l01215" name="l01215"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a61f664448a862fbb02e728ce518ff8e4"> 1215</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keyword">const</span> <span class="keywordtype">char</span> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a61f664448a862fbb02e728ce518ff8e4">imb_get_strerror</a>(<span class="keywordtype">int</span> errnum);</div>
+<div class="line"><a id="l01216" name="l01216"></a><span class="lineno"> 1216</span> </div>
+<div class="line"><a id="l01242" name="l01242"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e"> 1242</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e">alloc_mb_mgr</a>(uint64_t <a class="code hl_variable" href="structIMB__MGR.html#ae1a596c9c9d6ca1292c6116575021c14">flags</a>);</div>
+<div class="line"><a id="l01243" name="l01243"></a><span class="lineno"> 1243</span> </div>
+<div class="line"><a id="l01250" name="l01250"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a238b96cc36c0dc64798a1244b94add8b"> 1250</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a238b96cc36c0dc64798a1244b94add8b">free_mb_mgr</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *ptr);</div>
+<div class="line"><a id="l01251" name="l01251"></a><span class="lineno"> 1251</span> </div>
+<div class="line"><a id="l01257" name="l01257"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac8379ada0d6ec030ebad9828fbea9459"> 1257</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">size_t</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac8379ada0d6ec030ebad9828fbea9459">imb_get_mb_mgr_size</a>(<span class="keywordtype">void</span>);</div>
+<div class="line"><a id="l01258" name="l01258"></a><span class="lineno"> 1258</span> </div>
+<div class="line"><a id="l01281" name="l01281"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3a825e903d1f8f8611b98b60fcaa5a81"> 1281</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a3a825e903d1f8f8611b98b60fcaa5a81">imb_set_pointers_mb_mgr</a>(<span class="keywordtype">void</span> *ptr, <span class="keyword">const</span> uint64_t <a class="code hl_variable" href="structIMB__MGR.html#ae1a596c9c9d6ca1292c6116575021c14">flags</a>,</div>
+<div class="line"><a id="l01282" name="l01282"></a><span class="lineno"> 1282</span>                                                <span class="keyword">const</span> <span class="keywordtype">unsigned</span> reset_mgr);</div>
+<div class="line"><a id="l01283" name="l01283"></a><span class="lineno"> 1283</span> </div>
+<div class="line"><a id="l01290" name="l01290"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a725703ff6da6b402bde7041a2fabfddf"> 1290</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint64_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#a725703ff6da6b402bde7041a2fabfddf">imb_get_feature_flags</a>(<span class="keywordtype">void</span>);</div>
+<div class="line"><a id="l01291" name="l01291"></a><span class="lineno"> 1291</span> </div>
+<div class="line"><a id="l01302" name="l01302"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aee547b1b9e70e12c84d9949317e41c6c"> 1302</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aee547b1b9e70e12c84d9949317e41c6c">init_mb_mgr_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01306" name="l01306"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a71b6563b6b4c0c504cd9b8302a242cfa"> 1306</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a71b6563b6b4c0c504cd9b8302a242cfa">init_mb_mgr_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01310" name="l01310"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a98932a3c61d798b0c8a560dcc3dce16f"> 1310</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a98932a3c61d798b0c8a560dcc3dce16f">init_mb_mgr_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01314" name="l01314"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2ad1941fe5d77b8bb2d6445679e3b0c5"> 1314</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2ad1941fe5d77b8bb2d6445679e3b0c5">init_mb_mgr_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01315" name="l01315"></a><span class="lineno"> 1315</span> </div>
+<div class="line"><a id="l01316" name="l01316"></a><span class="lineno"> 1316</span> </div>
+<div class="line"><a id="l01326" name="l01326"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a950bf3b7a3c63a371b561ea20aaf3a18"> 1326</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a950bf3b7a3c63a371b561ea20aaf3a18">submit_job_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01330" name="l01330"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8913995859e45005f8de57a3456c93cf"> 1330</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a8913995859e45005f8de57a3456c93cf">submit_job_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01334" name="l01334"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a75cc0d090470e47cd8be04451ee31a68"> 1334</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a75cc0d090470e47cd8be04451ee31a68">submit_job_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01338" name="l01338"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7700e90058a74980bfd7d462a19d32a0"> 1338</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a7700e90058a74980bfd7d462a19d32a0">submit_job_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01339" name="l01339"></a><span class="lineno"> 1339</span> </div>
+<div class="line"><a id="l01349" name="l01349"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7b339426753d3a7c44625a5ded3170a"> 1349</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#ac7b339426753d3a7c44625a5ded3170a">submit_job_nocheck_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01353" name="l01353"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a72caaf8162ae6f802f7c1fe570afe42e"> 1353</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a72caaf8162ae6f802f7c1fe570afe42e">submit_job_nocheck_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01357" name="l01357"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5a95b9268508d68b9027df98167d22cd"> 1357</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a5a95b9268508d68b9027df98167d22cd">submit_job_nocheck_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01361" name="l01361"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a35e4c8a3d2eba8a612f021572621f98e"> 1361</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a35e4c8a3d2eba8a612f021572621f98e">submit_job_nocheck_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01362" name="l01362"></a><span class="lineno"> 1362</span> </div>
+<div class="line"><a id="l01370" name="l01370"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abc6b0f1c857f26b834f22b6bd8f51846"> 1370</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#abc6b0f1c857f26b834f22b6bd8f51846">flush_job_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01374" name="l01374"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae242d142065172898129f30e6bc40d8c"> 1374</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#ae242d142065172898129f30e6bc40d8c">flush_job_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01378" name="l01378"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7aec54f653aeee2554ba980d62fd491"> 1378</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#ac7aec54f653aeee2554ba980d62fd491">flush_job_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01382" name="l01382"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a96b880b8a32b0466f880d4f22d95cc3b"> 1382</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a96b880b8a32b0466f880d4f22d95cc3b">flush_job_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01383" name="l01383"></a><span class="lineno"> 1383</span> </div>
+<div class="line"><a id="l01391" name="l01391"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a800c395d326e718a2b520d0bb91cbb89"> 1391</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint32_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#a800c395d326e718a2b520d0bb91cbb89">queue_size_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01395" name="l01395"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8a540000c08366ad47d95e23ed5b2918"> 1395</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint32_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#a8a540000c08366ad47d95e23ed5b2918">queue_size_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01399" name="l01399"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a51c0426a4b57c9e7db2b091692dff472"> 1399</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint32_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#a51c0426a4b57c9e7db2b091692dff472">queue_size_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01403" name="l01403"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a80f792744558de173ea97d722c58e5c1"> 1403</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint32_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#a80f792744558de173ea97d722c58e5c1">queue_size_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01404" name="l01404"></a><span class="lineno"> 1404</span> </div>
+<div class="line"><a id="l01412" name="l01412"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9d115c47670330bd01b960f2188169d9"> 1412</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a9d115c47670330bd01b960f2188169d9">get_completed_job_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01416" name="l01416"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad85bdbf56038fd72ceda7e50deea586e"> 1416</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#ad85bdbf56038fd72ceda7e50deea586e">get_completed_job_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01420" name="l01420"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a693afd528fcc0809cc667b6c38de84dc"> 1420</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a693afd528fcc0809cc667b6c38de84dc">get_completed_job_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01424" name="l01424"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a267a718472e0c1b6585402e81e44e7e9"> 1424</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a267a718472e0c1b6585402e81e44e7e9">get_completed_job_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01425" name="l01425"></a><span class="lineno"> 1425</span> </div>
+<div class="line"><a id="l01433" name="l01433"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3518b02f06a82e9f83cd0435f3cf25c9"> 1433</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a3518b02f06a82e9f83cd0435f3cf25c9">get_next_job_avx</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01437" name="l01437"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a49a3d54979188b3c68bdd621043125f7"> 1437</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a49a3d54979188b3c68bdd621043125f7">get_next_job_avx2</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01441" name="l01441"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a40c08ba2c387e24f2096b1213c46c812"> 1441</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a40c08ba2c387e24f2096b1213c46c812">get_next_job_avx512</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01445" name="l01445"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a055db1f6f16bc17724bdc64d0f313871"> 1445</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *<a class="code hl_function" href="intel-ipsec-mb_8h.html#a055db1f6f16bc17724bdc64d0f313871">get_next_job_sse</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state);</div>
+<div class="line"><a id="l01446" name="l01446"></a><span class="lineno"> 1446</span> </div>
+<div class="line"><a id="l01455" name="l01455"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2cbbd032835837fd0aa83b04f5337638"> 1455</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2cbbd032835837fd0aa83b04f5337638">init_mb_mgr_auto</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state, <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6">IMB_ARCH</a> *arch);</div>
+<div class="line"><a id="l01456" name="l01456"></a><span class="lineno"> 1456</span> </div>
+<div class="line"><a id="l01457" name="l01457"></a><span class="lineno"> 1457</span><span class="comment">/*</span></div>
+<div class="line"><a id="l01458" name="l01458"></a><span class="lineno"> 1458</span><span class="comment"> * Wrapper macros to call arch API&#39;s set up</span></div>
+<div class="line"><a id="l01459" name="l01459"></a><span class="lineno"> 1459</span><span class="comment"> * at init phase of multi-buffer manager.</span></div>
+<div class="line"><a id="l01460" name="l01460"></a><span class="lineno"> 1460</span><span class="comment"> *</span></div>
+<div class="line"><a id="l01461" name="l01461"></a><span class="lineno"> 1461</span><span class="comment"> * For example, after calling init_mb_mgr_sse(&amp;mgr)</span></div>
+<div class="line"><a id="l01462" name="l01462"></a><span class="lineno"> 1462</span><span class="comment"> * The &#39;mgr&#39; structure be set up so that:</span></div>
+<div class="line"><a id="l01463" name="l01463"></a><span class="lineno"> 1463</span><span class="comment"> *   mgr.get_next_job will point to get_next_job_sse(),</span></div>
+<div class="line"><a id="l01464" name="l01464"></a><span class="lineno"> 1464</span><span class="comment"> *   mgr.submit_job will point to submit_job_sse(),</span></div>
+<div class="line"><a id="l01465" name="l01465"></a><span class="lineno"> 1465</span><span class="comment"> *   mgr.submit_job_nocheck will point to submit_job_nocheck_sse(),</span></div>
+<div class="line"><a id="l01466" name="l01466"></a><span class="lineno"> 1466</span><span class="comment"> *   mgr.get_completed_job will point to get_completed_job_sse(),</span></div>
+<div class="line"><a id="l01467" name="l01467"></a><span class="lineno"> 1467</span><span class="comment"> *   mgr.flush_job will point to flush_job_sse(),</span></div>
+<div class="line"><a id="l01468" name="l01468"></a><span class="lineno"> 1468</span><span class="comment"> *   mgr.queue_size will point to queue_size_sse()</span></div>
+<div class="line"><a id="l01469" name="l01469"></a><span class="lineno"> 1469</span><span class="comment"> *   mgr.keyexp_128 will point to aes_keyexp_128_sse()</span></div>
+<div class="line"><a id="l01470" name="l01470"></a><span class="lineno"> 1470</span><span class="comment"> *   mgr.keyexp_192 will point to aes_keyexp_192_sse()</span></div>
+<div class="line"><a id="l01471" name="l01471"></a><span class="lineno"> 1471</span><span class="comment"> *   mgr.keyexp_256 will point to aes_keyexp_256_sse()</span></div>
+<div class="line"><a id="l01472" name="l01472"></a><span class="lineno"> 1472</span><span class="comment"> *   etc.</span></div>
+<div class="line"><a id="l01473" name="l01473"></a><span class="lineno"> 1473</span><span class="comment"> *</span></div>
+<div class="line"><a id="l01474" name="l01474"></a><span class="lineno"> 1474</span><span class="comment"> * Direct use of arch API&#39;s may result in better performance.</span></div>
+<div class="line"><a id="l01475" name="l01475"></a><span class="lineno"> 1475</span><span class="comment"> * Using below indirect interface may produce slightly worse performance but</span></div>
+<div class="line"><a id="l01476" name="l01476"></a><span class="lineno"> 1476</span><span class="comment"> * it can simplify application implementation.</span></div>
+<div class="line"><a id="l01477" name="l01477"></a><span class="lineno"> 1477</span><span class="comment"> * The test app provides example of using the indirect interface.</span></div>
+<div class="line"><a id="l01478" name="l01478"></a><span class="lineno"> 1478</span><span class="comment"> */</span></div>
+<div class="line"><a id="l01479" name="l01479"></a><span class="lineno"> 1479</span> </div>
+<div class="line"><a id="l01487" name="l01487"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a34b6006fc39dd4ea23d3fec49237d382"> 1487</a></span><span class="preprocessor">#define IMB_GET_NEXT_JOB(_mgr) ((_mgr)-&gt;get_next_job((_mgr)))</span></div>
+<div class="line"><a id="l01488" name="l01488"></a><span class="lineno"> 1488</span> </div>
+<div class="line"><a id="l01498" name="l01498"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3602a4ccaf1da4bf6787169370cef04f"> 1498</a></span><span class="preprocessor">#define IMB_SUBMIT_JOB(_mgr) ((_mgr)-&gt;submit_job((_mgr)))</span></div>
+<div class="line"><a id="l01499" name="l01499"></a><span class="lineno"> 1499</span> </div>
+<div class="line"><a id="l01509" name="l01509"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af23c64e466272c5ae90fcf78fbcd0c3d"> 1509</a></span><span class="preprocessor">#define IMB_SUBMIT_JOB_NOCHECK(_mgr) ((_mgr)-&gt;submit_job_nocheck((_mgr)))</span></div>
+<div class="line"><a id="l01510" name="l01510"></a><span class="lineno"> 1510</span> </div>
+<div class="line"><a id="l01518" name="l01518"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a18e5a7f85573f0006448deda41014117"> 1518</a></span><span class="preprocessor">#define IMB_GET_COMPLETED_JOB(_mgr)  ((_mgr)-&gt;get_completed_job((_mgr)))</span></div>
+<div class="line"><a id="l01519" name="l01519"></a><span class="lineno"> 1519</span> </div>
+<div class="line"><a id="l01527" name="l01527"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4726e3683b3579b1e643134278386d72"> 1527</a></span><span class="preprocessor">#define IMB_FLUSH_JOB(_mgr)          ((_mgr)-&gt;flush_job((_mgr)))</span></div>
+<div class="line"><a id="l01528" name="l01528"></a><span class="lineno"> 1528</span> </div>
+<div class="line"><a id="l01536" name="l01536"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a712f6e7ecb2a16f8e1bc96b84d188365"> 1536</a></span><span class="preprocessor">#define IMB_QUEUE_SIZE(_mgr)         ((_mgr)-&gt;queue_size((_mgr)))</span></div>
+<div class="line"><a id="l01537" name="l01537"></a><span class="lineno"> 1537</span> </div>
+<div class="line"><a id="l01550" name="l01550"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6029af3f88d1908dd11a8f3e9eb9fd70"> 1550</a></span><span class="preprocessor">#define IMB_GET_NEXT_BURST(_mgr, _n_jobs, _jobs)   \</span></div>
+<div class="line"><a id="l01551" name="l01551"></a><span class="lineno"> 1551</span><span class="preprocessor">        ((_mgr)-&gt;get_next_burst((_mgr), (_n_jobs), (_jobs)))</span></div>
+<div class="line"><a id="l01552" name="l01552"></a><span class="lineno"> 1552</span> </div>
+<div class="line"><a id="l01569" name="l01569"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aabfad78b032b6b160e3ba51477132524"> 1569</a></span><span class="preprocessor">#define IMB_SUBMIT_BURST(_mgr, _n_jobs, _jobs)   \</span></div>
+<div class="line"><a id="l01570" name="l01570"></a><span class="lineno"> 1570</span><span class="preprocessor">        ((_mgr)-&gt;submit_burst((_mgr), (_n_jobs), (_jobs)))</span></div>
+<div class="line"><a id="l01571" name="l01571"></a><span class="lineno"> 1571</span> </div>
+<div class="line"><a id="l01586" name="l01586"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa06f0e18794d4a95d16e61dfb1af70c4"> 1586</a></span><span class="preprocessor">#define IMB_SUBMIT_BURST_NOCHECK(_mgr, _n_jobs, _jobs)  \</span></div>
+<div class="line"><a id="l01587" name="l01587"></a><span class="lineno"> 1587</span><span class="preprocessor">        ((_mgr)-&gt;submit_burst_nocheck((_mgr), (_n_jobs), (_jobs)))</span></div>
 <div class="line"><a id="l01588" name="l01588"></a><span class="lineno"> 1588</span> </div>
-<div class="line"><a id="l01598" name="l01598"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad95138f7b201a9d7f8e57a155af720f4"> 1598</a></span><span class="preprocessor">#define IMB_SUBMIT_BURST(_mgr, _jobs, _n_jobs)          \</span></div>
-<div class="line"><a id="l01599" name="l01599"></a><span class="lineno"> 1599</span><span class="preprocessor">        ((_mgr)-&gt;submit_burst((_mgr), (_jobs), (_n_jobs)))</span></div>
+<div class="line"><a id="l01598" name="l01598"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afff52a9aaa1c1875e7c905e2fb29fc43"> 1598</a></span><span class="preprocessor">#define IMB_FLUSH_BURST(_mgr, _max_jobs, _jobs)  \</span></div>
+<div class="line"><a id="l01599" name="l01599"></a><span class="lineno"> 1599</span><span class="preprocessor">        ((_mgr)-&gt;flush_burst((_mgr), (_max_jobs), (_jobs)))</span></div>
 <div class="line"><a id="l01600" name="l01600"></a><span class="lineno"> 1600</span> </div>
-<div class="line"><a id="l01612" name="l01612"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab043c084d20c19d9952dee899b693085"> 1612</a></span><span class="preprocessor">#define IMB_SUBMIT_BURST_NOCHECK(_mgr, _jobs, _n_jobs)                  \</span></div>
-<div class="line"><a id="l01613" name="l01613"></a><span class="lineno"> 1613</span><span class="preprocessor">        ((_mgr)-&gt;submit_burst_nocheck((_mgr), (_jobs), (_n_jobs)))</span></div>
-<div class="line"><a id="l01614" name="l01614"></a><span class="lineno"> 1614</span> </div>
-<div class="line"><a id="l01627" name="l01627"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae487720f5112a3ecec659ab4aeada77e"> 1627</a></span><span class="preprocessor">#define IMB_SUBMIT_CIPHER_BURST(_mgr, _jobs, _n_jobs, _cipher,          \</span></div>
-<div class="line"><a id="l01628" name="l01628"></a><span class="lineno"> 1628</span><span class="preprocessor">                                _dir, _key_size)                        \</span></div>
-<div class="line"><a id="l01629" name="l01629"></a><span class="lineno"> 1629</span><span class="preprocessor">        ((_mgr)-&gt;submit_cipher_burst((_mgr), (_jobs), (_n_jobs),        \</span></div>
-<div class="line"><a id="l01630" name="l01630"></a><span class="lineno"> 1630</span><span class="preprocessor">                                     (_cipher), (_dir), (_key_size)))</span></div>
-<div class="line"><a id="l01645" name="l01645"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af819e81f584b3b56e0201a7174b3c0eb"> 1645</a></span><span class="preprocessor">#define IMB_SUBMIT_CIPHER_BURST_NOCHECK(_mgr, _jobs, _n_jobs, _cipher,  \</span></div>
-<div class="line"><a id="l01646" name="l01646"></a><span class="lineno"> 1646</span><span class="preprocessor">                                        _dir, _key_size)                \</span></div>
-<div class="line"><a id="l01647" name="l01647"></a><span class="lineno"> 1647</span><span class="preprocessor">        ((_mgr)-&gt;submit_cipher_burst_nocheck((_mgr), (_jobs), (_n_jobs),\</span></div>
-<div class="line"><a id="l01648" name="l01648"></a><span class="lineno"> 1648</span><span class="preprocessor">                                             (_cipher), (_dir), (_key_size)))</span></div>
-<div class="line"><a id="l01659" name="l01659"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3702b37004e38dd27a9b8a008a0c48ed"> 1659</a></span><span class="preprocessor">#define IMB_SUBMIT_HASH_BURST(_mgr, _jobs, _n_jobs, _hash)              \</span></div>
-<div class="line"><a id="l01660" name="l01660"></a><span class="lineno"> 1660</span><span class="preprocessor">        ((_mgr)-&gt;submit_hash_burst((_mgr), (_jobs), (_n_jobs), (_hash)))</span></div>
-<div class="line"><a id="l01661" name="l01661"></a><span class="lineno"> 1661</span> </div>
-<div class="line"><a id="l01674" name="l01674"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd6b80655a6129fe063d2ffb391e3015"> 1674</a></span><span class="preprocessor">#define IMB_SUBMIT_HASH_BURST_NOCHECK(_mgr, _jobs, _n_jobs, _hash)      \</span></div>
-<div class="line"><a id="l01675" name="l01675"></a><span class="lineno"> 1675</span><span class="preprocessor">        ((_mgr)-&gt;submit_hash_burst_nocheck((_mgr), (_jobs), (_n_jobs), (_hash)))</span></div>
-<div class="line"><a id="l01676" name="l01676"></a><span class="lineno"> 1676</span> </div>
-<div class="line"><a id="l01677" name="l01677"></a><span class="lineno"> 1677</span><span class="comment">/* Key expansion and generation API&#39;s */</span></div>
-<div class="line"><a id="l01678" name="l01678"></a><span class="lineno"> 1678</span> </div>
-<div class="line"><a id="l01687" name="l01687"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afa111339421e794c2643df2ecf86a8c0"> 1687</a></span><span class="preprocessor">#define IMB_AES_KEYEXP_128(_mgr, _key, _enc_exp_key, _dec_exp_key)      \</span></div>
-<div class="line"><a id="l01688" name="l01688"></a><span class="lineno"> 1688</span><span class="preprocessor">        ((_mgr)-&gt;keyexp_128((_key), (_enc_exp_key), (_dec_exp_key)))</span></div>
-<div class="line"><a id="l01697" name="l01697"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a574d86849e2c9ca402305eb479ca558d"> 1697</a></span><span class="preprocessor">#define IMB_AES_KEYEXP_192(_mgr, _key, _enc_exp_key, _dec_exp_key)      \</span></div>
-<div class="line"><a id="l01698" name="l01698"></a><span class="lineno"> 1698</span><span class="preprocessor">        ((_mgr)-&gt;keyexp_192((_key), (_enc_exp_key), (_dec_exp_key)))</span></div>
-<div class="line"><a id="l01707" name="l01707"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a003306124dae4920161ed6d4a7bf4e2f"> 1707</a></span><span class="preprocessor">#define IMB_AES_KEYEXP_256(_mgr, _key, _enc_exp_key, _dec_exp_key)      \</span></div>
-<div class="line"><a id="l01708" name="l01708"></a><span class="lineno"> 1708</span><span class="preprocessor">        ((_mgr)-&gt;keyexp_256((_key), (_enc_exp_key), (_dec_exp_key)))</span></div>
-<div class="line"><a id="l01709" name="l01709"></a><span class="lineno"> 1709</span> </div>
-<div class="line"><a id="l01718" name="l01718"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa1e9006a8a76ba7fb09b97816d7fdfe5"> 1718</a></span><span class="preprocessor">#define IMB_AES_CMAC_SUBKEY_GEN_128(_mgr, _exp_key, _key1, _key2)   \</span></div>
-<div class="line"><a id="l01719" name="l01719"></a><span class="lineno"> 1719</span><span class="preprocessor">        ((_mgr)-&gt;cmac_subkey_gen_128((_exp_key), (_key1), (_key2)))</span></div>
-<div class="line"><a id="l01720" name="l01720"></a><span class="lineno"> 1720</span> </div>
-<div class="line"><a id="l01729" name="l01729"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aca7b22139c297858794c7268439e88f0"> 1729</a></span><span class="preprocessor">#define IMB_AES_CMAC_SUBKEY_GEN_256(_mgr, _exp_key, _key1, _key2)   \</span></div>
-<div class="line"><a id="l01730" name="l01730"></a><span class="lineno"> 1730</span><span class="preprocessor">        ((_mgr)-&gt;cmac_subkey_gen_256((_exp_key), (_key1), (_key2)))</span></div>
-<div class="line"><a id="l01731" name="l01731"></a><span class="lineno"> 1731</span> </div>
-<div class="line"><a id="l01741" name="l01741"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5a5f2342f2b1e65e41084d915c3b2cda"> 1741</a></span><span class="preprocessor">#define IMB_AES_XCBC_KEYEXP(_mgr, _key, _exp_key, _exp_key2, _exp_key3) \</span></div>
-<div class="line"><a id="l01742" name="l01742"></a><span class="lineno"> 1742</span><span class="preprocessor">        ((_mgr)-&gt;xcbc_keyexp((_key), (_exp_key), (_exp_key2), (_exp_key3)))</span></div>
-<div class="line"><a id="l01743" name="l01743"></a><span class="lineno"> 1743</span> </div>
-<div class="line"><a id="l01744" name="l01744"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6fbb59f06f60f1900b591735ad691ac6"> 1744</a></span><span class="preprocessor">#define IMB_DES_KEYSCHED(_mgr, _exp_key, _key)       \</span></div>
-<div class="line"><a id="l01745" name="l01745"></a><span class="lineno"> 1745</span><span class="preprocessor">        ((_mgr)-&gt;des_key_sched((_exp_key), (_key)))</span></div>
-<div class="line"><a id="l01746" name="l01746"></a><span class="lineno"> 1746</span> </div>
-<div class="line"><a id="l01747" name="l01747"></a><span class="lineno"> 1747</span><span class="comment">/* Hash API&#39;s */</span></div>
-<div class="line"><a id="l01748" name="l01748"></a><span class="lineno"> 1748</span> </div>
-<div class="line"><a id="l01756" name="l01756"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac2f9695b12c32c303faa7c93c1c24c9b"> 1756</a></span><span class="preprocessor">#define IMB_SHA1_ONE_BLOCK(_mgr, _src, _tag)        \</span></div>
-<div class="line"><a id="l01757" name="l01757"></a><span class="lineno"> 1757</span><span class="preprocessor">        ((_mgr)-&gt;sha1_one_block((_src), (_tag)))</span></div>
-<div class="line"><a id="l01758" name="l01758"></a><span class="lineno"> 1758</span> </div>
-<div class="line"><a id="l01767" name="l01767"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae61900d14cde2836621a1421141548a4"> 1767</a></span><span class="preprocessor">#define IMB_SHA1(_mgr, _src, _length, _tag)         \</span></div>
-<div class="line"><a id="l01768" name="l01768"></a><span class="lineno"> 1768</span><span class="preprocessor">        ((_mgr)-&gt;sha1((_src), (_length), (_tag)))</span></div>
-<div class="line"><a id="l01776" name="l01776"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab1f7eb5e9bcd0c69a70dc76747f919f6"> 1776</a></span><span class="preprocessor">#define IMB_SHA224_ONE_BLOCK(_mgr, _src, _tag)      \</span></div>
-<div class="line"><a id="l01777" name="l01777"></a><span class="lineno"> 1777</span><span class="preprocessor">        ((_mgr)-&gt;sha224_one_block((_src), (_tag)))</span></div>
-<div class="line"><a id="l01778" name="l01778"></a><span class="lineno"> 1778</span> </div>
-<div class="line"><a id="l01787" name="l01787"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a542a40ced46bf97a678c6b44c325b360"> 1787</a></span><span class="preprocessor">#define IMB_SHA224(_mgr, _src, _length, _tag)       \</span></div>
-<div class="line"><a id="l01788" name="l01788"></a><span class="lineno"> 1788</span><span class="preprocessor">        ((_mgr)-&gt;sha224((_src), (_length), (_tag)))</span></div>
-<div class="line"><a id="l01796" name="l01796"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6023b87b5d1c6dc7dc0547db540af997"> 1796</a></span><span class="preprocessor">#define IMB_SHA256_ONE_BLOCK(_mgr, _src, _tag)      \</span></div>
-<div class="line"><a id="l01797" name="l01797"></a><span class="lineno"> 1797</span><span class="preprocessor">        ((_mgr)-&gt;sha256_one_block((_src), (_tag)))</span></div>
-<div class="line"><a id="l01806" name="l01806"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a37338b9f91315e5de0c4f3d19859aa7b"> 1806</a></span><span class="preprocessor">#define IMB_SHA256(_mgr, _src, _length, _tag)       \</span></div>
-<div class="line"><a id="l01807" name="l01807"></a><span class="lineno"> 1807</span><span class="preprocessor">        ((_mgr)-&gt;sha256((_src), (_length), (_tag)))</span></div>
-<div class="line"><a id="l01815" name="l01815"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a763d0cfb16263906e44f46696b16124b"> 1815</a></span><span class="preprocessor">#define IMB_SHA384_ONE_BLOCK(_mgr, _src, _tag)      \</span></div>
-<div class="line"><a id="l01816" name="l01816"></a><span class="lineno"> 1816</span><span class="preprocessor">        ((_mgr)-&gt;sha384_one_block((_src), (_tag)))</span></div>
-<div class="line"><a id="l01825" name="l01825"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac8052b8b996f866f27b4d443bcda0d5f"> 1825</a></span><span class="preprocessor">#define IMB_SHA384(_mgr, _src, _length, _tag)       \</span></div>
-<div class="line"><a id="l01826" name="l01826"></a><span class="lineno"> 1826</span><span class="preprocessor">        ((_mgr)-&gt;sha384((_src), (_length), (_tag)))</span></div>
-<div class="line"><a id="l01834" name="l01834"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a71d0a529b355a434efeeda2e01870ba9"> 1834</a></span><span class="preprocessor">#define IMB_SHA512_ONE_BLOCK(_mgr, _src, _tag)      \</span></div>
-<div class="line"><a id="l01835" name="l01835"></a><span class="lineno"> 1835</span><span class="preprocessor">        ((_mgr)-&gt;sha512_one_block((_src), (_tag)))</span></div>
-<div class="line"><a id="l01844" name="l01844"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac806d6b629633e801409d3e363d83f6c"> 1844</a></span><span class="preprocessor">#define IMB_SHA512(_mgr, _src, _length, _tag)       \</span></div>
-<div class="line"><a id="l01845" name="l01845"></a><span class="lineno"> 1845</span><span class="preprocessor">        ((_mgr)-&gt;sha512((_src), (_length), (_tag)))</span></div>
-<div class="line"><a id="l01853" name="l01853"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a52b27293e2a19809c5f7d0f2afab97a2"> 1853</a></span><span class="preprocessor">#define IMB_MD5_ONE_BLOCK(_mgr, _src, _tag)         \</span></div>
-<div class="line"><a id="l01854" name="l01854"></a><span class="lineno"> 1854</span><span class="preprocessor">        ((_mgr)-&gt;md5_one_block((_src), (_tag)))</span></div>
-<div class="line"><a id="l01855" name="l01855"></a><span class="lineno"> 1855</span> </div>
-<div class="line"><a id="l01869" name="l01869"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1e122b460a714f2981f94bf7f4bba547"> 1869</a></span><span class="preprocessor">#define IMB_AES128_CFB_ONE(_mgr, _dst, _src, _iv, _exp_key, _len)       \</span></div>
-<div class="line"><a id="l01870" name="l01870"></a><span class="lineno"> 1870</span><span class="preprocessor">        ((_mgr)-&gt;aes128_cfb_one((_dst), (_src), (_iv), (_exp_key), (_len)))</span></div>
-<div class="line"><a id="l01871" name="l01871"></a><span class="lineno"> 1871</span> </div>
-<div class="line"><a id="l01872" name="l01872"></a><span class="lineno"> 1872</span><span class="comment">/* AES-GCM API&#39;s */</span></div>
-<div class="line"><a id="l01873" name="l01873"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adb65fc01b63a475cca4cf532ace005b6"> 1873</a></span><span class="preprocessor">#define IMB_AES128_GCM_ENC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, _aad,  \</span></div>
-<div class="line"><a id="l01874" name="l01874"></a><span class="lineno"> 1874</span><span class="preprocessor">                           _aadl, _tag, _tagl)                                 \</span></div>
-<div class="line"><a id="l01875" name="l01875"></a><span class="lineno"> 1875</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_enc((_exp_key), (_ctx), (_dst), (_src), (_len), (_iv), \</span></div>
-<div class="line"><a id="l01876" name="l01876"></a><span class="lineno"> 1876</span><span class="preprocessor">                            (_aad), (_aadl), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01877" name="l01877"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af7548f17077a0b187a4ecfde4e0ff5d9"> 1877</a></span><span class="preprocessor">#define IMB_AES192_GCM_ENC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, _aad,  \</span></div>
-<div class="line"><a id="l01878" name="l01878"></a><span class="lineno"> 1878</span><span class="preprocessor">                           _aadl, _tag, _tagl)                                 \</span></div>
-<div class="line"><a id="l01879" name="l01879"></a><span class="lineno"> 1879</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_enc((_exp_key), (_ctx), (_dst), (_src), (_len), (_iv), \</span></div>
-<div class="line"><a id="l01880" name="l01880"></a><span class="lineno"> 1880</span><span class="preprocessor">                            (_aad), (_aadl), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01881" name="l01881"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a556333acdc2db1a2540a1cd1af644ca9"> 1881</a></span><span class="preprocessor">#define IMB_AES256_GCM_ENC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, _aad,  \</span></div>
-<div class="line"><a id="l01882" name="l01882"></a><span class="lineno"> 1882</span><span class="preprocessor">                           _aadl, _tag, _tagl)                                 \</span></div>
-<div class="line"><a id="l01883" name="l01883"></a><span class="lineno"> 1883</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_enc((_exp_key), (_ctx), (_dst), (_src), (_len), (_iv), \</span></div>
-<div class="line"><a id="l01884" name="l01884"></a><span class="lineno"> 1884</span><span class="preprocessor">                            (_aad), (_aadl), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01885" name="l01885"></a><span class="lineno"> 1885</span> </div>
-<div class="line"><a id="l01886" name="l01886"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2b026b2a901c76a1512eb9c8c80f9709"> 1886</a></span><span class="preprocessor">#define IMB_AES128_GCM_DEC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, _aad,  \</span></div>
-<div class="line"><a id="l01887" name="l01887"></a><span class="lineno"> 1887</span><span class="preprocessor">                           _aadl, _tag, _tagl)                                 \</span></div>
-<div class="line"><a id="l01888" name="l01888"></a><span class="lineno"> 1888</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_dec((_exp_key), (_ctx), (_dst), (_src), (_len), (_iv), \</span></div>
-<div class="line"><a id="l01889" name="l01889"></a><span class="lineno"> 1889</span><span class="preprocessor">                            (_aad), (_aadl), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01890" name="l01890"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aedd2b84ebfbcb56ac5176e8793490047"> 1890</a></span><span class="preprocessor">#define IMB_AES192_GCM_DEC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, \</span></div>
-<div class="line"><a id="l01891" name="l01891"></a><span class="lineno"> 1891</span><span class="preprocessor">                           _aad, _aadl, _tag, _tagl)                    \</span></div>
-<div class="line"><a id="l01892" name="l01892"></a><span class="lineno"> 1892</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_dec((_exp_key), (_ctx), (_dst), (_src), (_len), \</span></div>
-<div class="line"><a id="l01893" name="l01893"></a><span class="lineno"> 1893</span><span class="preprocessor">                            (_iv), (_aad), (_aadl), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01894" name="l01894"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1eb77771626f83eba8482473d29ffbb1"> 1894</a></span><span class="preprocessor">#define IMB_AES256_GCM_DEC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, \</span></div>
-<div class="line"><a id="l01895" name="l01895"></a><span class="lineno"> 1895</span><span class="preprocessor">                           _aad, _aadl, _tag, _tagl)                    \</span></div>
-<div class="line"><a id="l01896" name="l01896"></a><span class="lineno"> 1896</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_dec((_exp_key), (_ctx), (_dst), (_src), (_len), \</span></div>
-<div class="line"><a id="l01897" name="l01897"></a><span class="lineno"> 1897</span><span class="preprocessor">                            (_iv), (_aad), (_aadl), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01898" name="l01898"></a><span class="lineno"> 1898</span> </div>
-<div class="line"><a id="l01899" name="l01899"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad0a8ea6b81df94d066b028ca7bf656ef"> 1899</a></span><span class="preprocessor">#define IMB_AES128_GCM_INIT(_mgr, _exp_key, _ctx, _iv, _aad, _aadl)       \</span></div>
-<div class="line"><a id="l01900" name="l01900"></a><span class="lineno"> 1900</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_init((_exp_key), (_ctx), (_iv), (_aad), (_aadl)))</span></div>
-<div class="line"><a id="l01901" name="l01901"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8cd402fe539de3fc8ff4062c2804096f"> 1901</a></span><span class="preprocessor">#define IMB_AES192_GCM_INIT(_mgr, _exp_key, _ctx, _iv, _aad, _aadl)       \</span></div>
-<div class="line"><a id="l01902" name="l01902"></a><span class="lineno"> 1902</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_init((_exp_key), (_ctx), (_iv), (_aad), (_aadl)))</span></div>
-<div class="line"><a id="l01903" name="l01903"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8049111340bf2694799eb4e42b0a82c3"> 1903</a></span><span class="preprocessor">#define IMB_AES256_GCM_INIT(_mgr, _exp_key, _ctx, _iv, _aad, _aadl)       \</span></div>
-<div class="line"><a id="l01904" name="l01904"></a><span class="lineno"> 1904</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_init((_exp_key), (_ctx), (_iv), (_aad), (_aadl)))</span></div>
-<div class="line"><a id="l01905" name="l01905"></a><span class="lineno"> 1905</span> </div>
-<div class="line"><a id="l01906" name="l01906"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a04142f11a678c0419dff242a0ccbd2e6"> 1906</a></span><span class="preprocessor">#define IMB_AES128_GCM_INIT_VAR_IV(_mgr, _exp_key, _ctx, _iv, _ivl, _aad, \</span></div>
-<div class="line"><a id="l01907" name="l01907"></a><span class="lineno"> 1907</span><span class="preprocessor">                                   _aadl)                                 \</span></div>
-<div class="line"><a id="l01908" name="l01908"></a><span class="lineno"> 1908</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_init_var_iv((_exp_key), (_ctx), (_iv), (_ivl),    \</span></div>
-<div class="line"><a id="l01909" name="l01909"></a><span class="lineno"> 1909</span><span class="preprocessor">                                    (_aad), (_aadl)))</span></div>
-<div class="line"><a id="l01910" name="l01910"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a97791c976660a673405e6fa22ef3d262"> 1910</a></span><span class="preprocessor">#define IMB_AES192_GCM_INIT_VAR_IV(_mgr, _exp_key, _ctx, _iv, _ivl, _aad, \</span></div>
-<div class="line"><a id="l01911" name="l01911"></a><span class="lineno"> 1911</span><span class="preprocessor">                                   _aadl)                                 \</span></div>
-<div class="line"><a id="l01912" name="l01912"></a><span class="lineno"> 1912</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_init_var_iv((_exp_key), (_ctx), (_iv), (_ivl),    \</span></div>
-<div class="line"><a id="l01913" name="l01913"></a><span class="lineno"> 1913</span><span class="preprocessor">                                    (_aad), (_aadl)))</span></div>
-<div class="line"><a id="l01914" name="l01914"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a61ddc1485781aba1969fe3ca97a22ded"> 1914</a></span><span class="preprocessor">#define IMB_AES256_GCM_INIT_VAR_IV(_mgr, _exp_key, _ctx, _iv, _ivl, _aad, \</span></div>
-<div class="line"><a id="l01915" name="l01915"></a><span class="lineno"> 1915</span><span class="preprocessor">                                    _aadl)                                \</span></div>
-<div class="line"><a id="l01916" name="l01916"></a><span class="lineno"> 1916</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_init_var_iv((_exp_key), (_ctx), (_iv), (_ivl),    \</span></div>
-<div class="line"><a id="l01917" name="l01917"></a><span class="lineno"> 1917</span><span class="preprocessor">                                    (_aad), (_aadl)))</span></div>
-<div class="line"><a id="l01918" name="l01918"></a><span class="lineno"> 1918</span> </div>
-<div class="line"><a id="l01919" name="l01919"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab1f4c52b4145946e80ef698e469d67db"> 1919</a></span><span class="preprocessor">#define IMB_AES128_GCM_ENC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
-<div class="line"><a id="l01920" name="l01920"></a><span class="lineno"> 1920</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_enc_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
-<div class="line"><a id="l01921" name="l01921"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a456f5bed8eb67603bdebfda230f76957"> 1921</a></span><span class="preprocessor">#define IMB_AES192_GCM_ENC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
-<div class="line"><a id="l01922" name="l01922"></a><span class="lineno"> 1922</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_enc_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
-<div class="line"><a id="l01923" name="l01923"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a223c00c636e2552e7a3dd1a97952cc6a"> 1923</a></span><span class="preprocessor">#define IMB_AES256_GCM_ENC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
-<div class="line"><a id="l01924" name="l01924"></a><span class="lineno"> 1924</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_enc_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
-<div class="line"><a id="l01925" name="l01925"></a><span class="lineno"> 1925</span> </div>
-<div class="line"><a id="l01926" name="l01926"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2f6014cfaaa0ee5f454e2771ff6b5829"> 1926</a></span><span class="preprocessor">#define IMB_AES128_GCM_DEC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
-<div class="line"><a id="l01927" name="l01927"></a><span class="lineno"> 1927</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_dec_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
-<div class="line"><a id="l01928" name="l01928"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae25c4f893fc29f09d03a8ece5fddc82f"> 1928</a></span><span class="preprocessor">#define IMB_AES192_GCM_DEC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
-<div class="line"><a id="l01929" name="l01929"></a><span class="lineno"> 1929</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_dec_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
-<div class="line"><a id="l01930" name="l01930"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a70847fd3bb5d1be79ebfa4e9104edabd"> 1930</a></span><span class="preprocessor">#define IMB_AES256_GCM_DEC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
-<div class="line"><a id="l01931" name="l01931"></a><span class="lineno"> 1931</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_dec_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
-<div class="line"><a id="l01932" name="l01932"></a><span class="lineno"> 1932</span> </div>
-<div class="line"><a id="l01933" name="l01933"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aaf13d46f5832cf9e0cb50f7fcde020be"> 1933</a></span><span class="preprocessor">#define IMB_AES128_GCM_ENC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
-<div class="line"><a id="l01934" name="l01934"></a><span class="lineno"> 1934</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_enc_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01935" name="l01935"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1e36a361be137a5d49b0798f054403bd"> 1935</a></span><span class="preprocessor">#define IMB_AES192_GCM_ENC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
-<div class="line"><a id="l01936" name="l01936"></a><span class="lineno"> 1936</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_enc_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01937" name="l01937"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1f49fe7109315eb479ac1c9969e2f877"> 1937</a></span><span class="preprocessor">#define IMB_AES256_GCM_ENC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
-<div class="line"><a id="l01938" name="l01938"></a><span class="lineno"> 1938</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_enc_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01939" name="l01939"></a><span class="lineno"> 1939</span> </div>
-<div class="line"><a id="l01940" name="l01940"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a280b9231c76c525a62d0ef819abd2133"> 1940</a></span><span class="preprocessor">#define IMB_AES128_GCM_DEC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
-<div class="line"><a id="l01941" name="l01941"></a><span class="lineno"> 1941</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_dec_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01942" name="l01942"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a759bbe1b8494c3157f1a506c003b700b"> 1942</a></span><span class="preprocessor">#define IMB_AES192_GCM_DEC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
-<div class="line"><a id="l01943" name="l01943"></a><span class="lineno"> 1943</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_dec_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01944" name="l01944"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a64d9473bc4f28c0b783baa4a31b9930e"> 1944</a></span><span class="preprocessor">#define IMB_AES256_GCM_DEC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
-<div class="line"><a id="l01945" name="l01945"></a><span class="lineno"> 1945</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_dec_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01946" name="l01946"></a><span class="lineno"> 1946</span> </div>
-<div class="line"><a id="l01947" name="l01947"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af315c30a8cbd3c20735e22f462b47964"> 1947</a></span><span class="preprocessor">#define IMB_AES128_GMAC_INIT(_mgr, _exp_key, _ctx, _iv, _ivl) \</span></div>
-<div class="line"><a id="l01948" name="l01948"></a><span class="lineno"> 1948</span><span class="preprocessor">        ((_mgr)-&gt;gmac128_init((_exp_key), (_ctx), (_iv), (_ivl)))</span></div>
-<div class="line"><a id="l01949" name="l01949"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a25ed49507e66a6e98eab4a3d34e75231"> 1949</a></span><span class="preprocessor">#define IMB_AES192_GMAC_INIT(_mgr, _exp_key, _ctx, _iv, _ivl) \</span></div>
-<div class="line"><a id="l01950" name="l01950"></a><span class="lineno"> 1950</span><span class="preprocessor">        ((_mgr)-&gt;gmac192_init((_exp_key), (_ctx), (_iv), (_ivl)))</span></div>
-<div class="line"><a id="l01951" name="l01951"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3d57940a54e9d94fa14dc008cd959092"> 1951</a></span><span class="preprocessor">#define IMB_AES256_GMAC_INIT(_mgr, _exp_key, _ctx, _iv, _ivl) \</span></div>
-<div class="line"><a id="l01952" name="l01952"></a><span class="lineno"> 1952</span><span class="preprocessor">        ((_mgr)-&gt;gmac256_init((_exp_key), (_ctx), (_iv), (_ivl)))</span></div>
-<div class="line"><a id="l01953" name="l01953"></a><span class="lineno"> 1953</span> </div>
-<div class="line"><a id="l01954" name="l01954"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af0b2ba1a0f9b099a06a1ba04380b0e2a"> 1954</a></span><span class="preprocessor">#define IMB_AES128_GMAC_UPDATE(_mgr, _exp_key, _ctx, _src, _len) \</span></div>
-<div class="line"><a id="l01955" name="l01955"></a><span class="lineno"> 1955</span><span class="preprocessor">        ((_mgr)-&gt;gmac128_update((_exp_key), (_ctx), (_src), (_len)))</span></div>
-<div class="line"><a id="l01956" name="l01956"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a113d0f4320e929f89786773f7d11c5c8"> 1956</a></span><span class="preprocessor">#define IMB_AES192_GMAC_UPDATE(_mgr, _exp_key, _ctx, _src, _len) \</span></div>
-<div class="line"><a id="l01957" name="l01957"></a><span class="lineno"> 1957</span><span class="preprocessor">        ((_mgr)-&gt;gmac192_update((_exp_key), (_ctx), (_src), (_len)))</span></div>
-<div class="line"><a id="l01958" name="l01958"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a91b8d98c7ffce8179ef953493a959d4b"> 1958</a></span><span class="preprocessor">#define IMB_AES256_GMAC_UPDATE(_mgr, _exp_key, _ctx, _src, _len) \</span></div>
-<div class="line"><a id="l01959" name="l01959"></a><span class="lineno"> 1959</span><span class="preprocessor">        ((_mgr)-&gt;gmac256_update((_exp_key), (_ctx), (_src), (_len)))</span></div>
-<div class="line"><a id="l01960" name="l01960"></a><span class="lineno"> 1960</span> </div>
-<div class="line"><a id="l01961" name="l01961"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af0bd4f5841d41433339717e6b97c15ad"> 1961</a></span><span class="preprocessor">#define IMB_AES128_GMAC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
-<div class="line"><a id="l01962" name="l01962"></a><span class="lineno"> 1962</span><span class="preprocessor">        ((_mgr)-&gt;gmac128_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01963" name="l01963"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a16a6f89fd4131c406d6ee7a1aeb663eb"> 1963</a></span><span class="preprocessor">#define IMB_AES192_GMAC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
-<div class="line"><a id="l01964" name="l01964"></a><span class="lineno"> 1964</span><span class="preprocessor">        ((_mgr)-&gt;gmac192_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01965" name="l01965"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abfbb7469f7d0240bb3d9a0e5f368b19e"> 1965</a></span><span class="preprocessor">#define IMB_AES256_GMAC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
-<div class="line"><a id="l01966" name="l01966"></a><span class="lineno"> 1966</span><span class="preprocessor">        ((_mgr)-&gt;gmac256_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01967" name="l01967"></a><span class="lineno"> 1967</span> </div>
-<div class="line"><a id="l01968" name="l01968"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1c63dfec645afa671f93f4fa65a6996e"> 1968</a></span><span class="preprocessor">#define IMB_AES128_GCM_PRECOMP(_mgr, _key) \</span></div>
-<div class="line"><a id="l01969" name="l01969"></a><span class="lineno"> 1969</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_precomp((_key)))</span></div>
-<div class="line"><a id="l01970" name="l01970"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7b3bcfd3ecbe7b2b8c7da963310b87b"> 1970</a></span><span class="preprocessor">#define IMB_AES192_GCM_PRECOMP(_mgr, _key) \</span></div>
-<div class="line"><a id="l01971" name="l01971"></a><span class="lineno"> 1971</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_precomp((_key)))</span></div>
-<div class="line"><a id="l01972" name="l01972"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4fa417a748ca30a961334bf91297dfda"> 1972</a></span><span class="preprocessor">#define IMB_AES256_GCM_PRECOMP(_mgr, _key) \</span></div>
-<div class="line"><a id="l01973" name="l01973"></a><span class="lineno"> 1973</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_precomp((_key)))</span></div>
-<div class="line"><a id="l01974" name="l01974"></a><span class="lineno"> 1974</span> </div>
-<div class="line"><a id="l01975" name="l01975"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5a442c1fcd7d427bf78e804da32bdbd1"> 1975</a></span><span class="preprocessor">#define IMB_AES128_GCM_PRE(_mgr, _key, _exp_key)     \</span></div>
-<div class="line"><a id="l01976" name="l01976"></a><span class="lineno"> 1976</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_pre((_key), (_exp_key)))</span></div>
-<div class="line"><a id="l01977" name="l01977"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a003f16aac382baff7a6b83040e58e471"> 1977</a></span><span class="preprocessor">#define IMB_AES192_GCM_PRE(_mgr, _key, _exp_key)     \</span></div>
-<div class="line"><a id="l01978" name="l01978"></a><span class="lineno"> 1978</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_pre((_key), (_exp_key)))</span></div>
-<div class="line"><a id="l01979" name="l01979"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5771f5169d3f3af3a2419ccd8275a754"> 1979</a></span><span class="preprocessor">#define IMB_AES256_GCM_PRE(_mgr, _key, _exp_key)     \</span></div>
-<div class="line"><a id="l01980" name="l01980"></a><span class="lineno"> 1980</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_pre((_key), (_exp_key)))</span></div>
-<div class="line"><a id="l01981" name="l01981"></a><span class="lineno"> 1981</span> </div>
-<div class="line"><a id="l01982" name="l01982"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a230f16784519d7e2b69de87871d35cb2"> 1982</a></span><span class="preprocessor">#define IMB_GHASH_PRE(_mgr, _key, _exp_key)          \</span></div>
-<div class="line"><a id="l01983" name="l01983"></a><span class="lineno"> 1983</span><span class="preprocessor">        ((_mgr)-&gt;ghash_pre((_key), (_exp_key)))</span></div>
-<div class="line"><a id="l01984" name="l01984"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a477ad08a4c55e2c6458b7e86dae803ec"> 1984</a></span><span class="preprocessor">#define IMB_GHASH(_mgr, _exp_key, _src, _len, _tag, _tagl) \</span></div>
-<div class="line"><a id="l01985" name="l01985"></a><span class="lineno"> 1985</span><span class="preprocessor">        ((_mgr)-&gt;ghash((_exp_key), (_src), (_len), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l01986" name="l01986"></a><span class="lineno"> 1986</span> </div>
-<div class="line"><a id="l01987" name="l01987"></a><span class="lineno"> 1987</span><span class="comment">/* Chacha20-Poly1305 direct API&#39;s */</span></div>
-<div class="line"><a id="l01988" name="l01988"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adb8ac3238e6dfe39a10e64602a96e643"> 1988</a></span><span class="preprocessor">#define IMB_CHACHA20_POLY1305_INIT(_mgr, _key, _ctx, _iv, _aad, _aadl)        \</span></div>
-<div class="line"><a id="l01989" name="l01989"></a><span class="lineno"> 1989</span><span class="preprocessor">        ((_mgr)-&gt;chacha20_poly1305_init((_key), (_ctx), (_iv), (_aad),        \</span></div>
-<div class="line"><a id="l01990" name="l01990"></a><span class="lineno"> 1990</span><span class="preprocessor">                                        (_aadl)))</span></div>
-<div class="line"><a id="l01991" name="l01991"></a><span class="lineno"> 1991</span> </div>
-<div class="line"><a id="l01992" name="l01992"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2abd7cd460b99467836188d62272cd2b"> 1992</a></span><span class="preprocessor">#define IMB_CHACHA20_POLY1305_ENC_UPDATE(_mgr, _key, _ctx, _dst, _src, _len)  \</span></div>
-<div class="line"><a id="l01993" name="l01993"></a><span class="lineno"> 1993</span><span class="preprocessor">        ((_mgr)-&gt;chacha20_poly1305_enc_update((_key), (_ctx), (_dst), (_src), \</span></div>
-<div class="line"><a id="l01994" name="l01994"></a><span class="lineno"> 1994</span><span class="preprocessor">                                              (_len)))</span></div>
-<div class="line"><a id="l01995" name="l01995"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4ac8fd429d9f356003522200811b0bed"> 1995</a></span><span class="preprocessor">#define IMB_CHACHA20_POLY1305_DEC_UPDATE(_mgr, _key, _ctx, _dst, _src, _len)  \</span></div>
-<div class="line"><a id="l01996" name="l01996"></a><span class="lineno"> 1996</span><span class="preprocessor">        ((_mgr)-&gt;chacha20_poly1305_dec_update((_key), (_ctx), (_dst), (_src), \</span></div>
-<div class="line"><a id="l01997" name="l01997"></a><span class="lineno"> 1997</span><span class="preprocessor">                                              (_len)))</span></div>
-<div class="line"><a id="l01998" name="l01998"></a><span class="lineno"> 1998</span> </div>
-<div class="line"><a id="l01999" name="l01999"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7575d2fafb2b970bd08a49a556602031"> 1999</a></span><span class="preprocessor">#define IMB_CHACHA20_POLY1305_ENC_FINALIZE(_mgr, _ctx, _tag, _tagl)           \</span></div>
-<div class="line"><a id="l02000" name="l02000"></a><span class="lineno"> 2000</span><span class="preprocessor">        ((_mgr)-&gt;chacha20_poly1305_finalize((_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l02001" name="l02001"></a><span class="lineno"> 2001</span> </div>
-<div class="line"><a id="l02002" name="l02002"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8f6a258b6a13952fad9c217194c716f0"> 2002</a></span><span class="preprocessor">#define IMB_CHACHA20_POLY1305_DEC_FINALIZE(_mgr, _ctx, _tag, _tagl)           \</span></div>
-<div class="line"><a id="l02003" name="l02003"></a><span class="lineno"> 2003</span><span class="preprocessor">        ((_mgr)-&gt;chacha20_poly1305_finalize((_ctx), (_tag), (_tagl)))</span></div>
-<div class="line"><a id="l02004" name="l02004"></a><span class="lineno"> 2004</span> </div>
-<div class="line"><a id="l02005" name="l02005"></a><span class="lineno"> 2005</span><span class="comment">/* ZUC EEA3/EIA3 functions */</span></div>
+<div class="line"><a id="l01613" name="l01613"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae487720f5112a3ecec659ab4aeada77e"> 1613</a></span><span class="preprocessor">#define IMB_SUBMIT_CIPHER_BURST(_mgr, _jobs, _n_jobs, _cipher,          \</span></div>
+<div class="line"><a id="l01614" name="l01614"></a><span class="lineno"> 1614</span><span class="preprocessor">                                _dir, _key_size)                        \</span></div>
+<div class="line"><a id="l01615" name="l01615"></a><span class="lineno"> 1615</span><span class="preprocessor">        ((_mgr)-&gt;submit_cipher_burst((_mgr), (_jobs), (_n_jobs),        \</span></div>
+<div class="line"><a id="l01616" name="l01616"></a><span class="lineno"> 1616</span><span class="preprocessor">                                     (_cipher), (_dir), (_key_size)))</span></div>
+<div class="line"><a id="l01631" name="l01631"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af819e81f584b3b56e0201a7174b3c0eb"> 1631</a></span><span class="preprocessor">#define IMB_SUBMIT_CIPHER_BURST_NOCHECK(_mgr, _jobs, _n_jobs, _cipher,  \</span></div>
+<div class="line"><a id="l01632" name="l01632"></a><span class="lineno"> 1632</span><span class="preprocessor">                                        _dir, _key_size)                \</span></div>
+<div class="line"><a id="l01633" name="l01633"></a><span class="lineno"> 1633</span><span class="preprocessor">        ((_mgr)-&gt;submit_cipher_burst_nocheck((_mgr), (_jobs), (_n_jobs),\</span></div>
+<div class="line"><a id="l01634" name="l01634"></a><span class="lineno"> 1634</span><span class="preprocessor">                                             (_cipher), (_dir), (_key_size)))</span></div>
+<div class="line"><a id="l01645" name="l01645"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3702b37004e38dd27a9b8a008a0c48ed"> 1645</a></span><span class="preprocessor">#define IMB_SUBMIT_HASH_BURST(_mgr, _jobs, _n_jobs, _hash)              \</span></div>
+<div class="line"><a id="l01646" name="l01646"></a><span class="lineno"> 1646</span><span class="preprocessor">        ((_mgr)-&gt;submit_hash_burst((_mgr), (_jobs), (_n_jobs), (_hash)))</span></div>
+<div class="line"><a id="l01647" name="l01647"></a><span class="lineno"> 1647</span> </div>
+<div class="line"><a id="l01660" name="l01660"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd6b80655a6129fe063d2ffb391e3015"> 1660</a></span><span class="preprocessor">#define IMB_SUBMIT_HASH_BURST_NOCHECK(_mgr, _jobs, _n_jobs, _hash)      \</span></div>
+<div class="line"><a id="l01661" name="l01661"></a><span class="lineno"> 1661</span><span class="preprocessor">        ((_mgr)-&gt;submit_hash_burst_nocheck((_mgr), (_jobs), (_n_jobs), (_hash)))</span></div>
+<div class="line"><a id="l01662" name="l01662"></a><span class="lineno"> 1662</span> </div>
+<div class="line"><a id="l01663" name="l01663"></a><span class="lineno"> 1663</span><span class="comment">/* Key expansion and generation API&#39;s */</span></div>
+<div class="line"><a id="l01664" name="l01664"></a><span class="lineno"> 1664</span> </div>
+<div class="line"><a id="l01673" name="l01673"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afa111339421e794c2643df2ecf86a8c0"> 1673</a></span><span class="preprocessor">#define IMB_AES_KEYEXP_128(_mgr, _key, _enc_exp_key, _dec_exp_key)      \</span></div>
+<div class="line"><a id="l01674" name="l01674"></a><span class="lineno"> 1674</span><span class="preprocessor">        ((_mgr)-&gt;keyexp_128((_key), (_enc_exp_key), (_dec_exp_key)))</span></div>
+<div class="line"><a id="l01683" name="l01683"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a574d86849e2c9ca402305eb479ca558d"> 1683</a></span><span class="preprocessor">#define IMB_AES_KEYEXP_192(_mgr, _key, _enc_exp_key, _dec_exp_key)      \</span></div>
+<div class="line"><a id="l01684" name="l01684"></a><span class="lineno"> 1684</span><span class="preprocessor">        ((_mgr)-&gt;keyexp_192((_key), (_enc_exp_key), (_dec_exp_key)))</span></div>
+<div class="line"><a id="l01693" name="l01693"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a003306124dae4920161ed6d4a7bf4e2f"> 1693</a></span><span class="preprocessor">#define IMB_AES_KEYEXP_256(_mgr, _key, _enc_exp_key, _dec_exp_key)      \</span></div>
+<div class="line"><a id="l01694" name="l01694"></a><span class="lineno"> 1694</span><span class="preprocessor">        ((_mgr)-&gt;keyexp_256((_key), (_enc_exp_key), (_dec_exp_key)))</span></div>
+<div class="line"><a id="l01695" name="l01695"></a><span class="lineno"> 1695</span> </div>
+<div class="line"><a id="l01704" name="l01704"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa1e9006a8a76ba7fb09b97816d7fdfe5"> 1704</a></span><span class="preprocessor">#define IMB_AES_CMAC_SUBKEY_GEN_128(_mgr, _exp_key, _key1, _key2)   \</span></div>
+<div class="line"><a id="l01705" name="l01705"></a><span class="lineno"> 1705</span><span class="preprocessor">        ((_mgr)-&gt;cmac_subkey_gen_128((_exp_key), (_key1), (_key2)))</span></div>
+<div class="line"><a id="l01706" name="l01706"></a><span class="lineno"> 1706</span> </div>
+<div class="line"><a id="l01715" name="l01715"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aca7b22139c297858794c7268439e88f0"> 1715</a></span><span class="preprocessor">#define IMB_AES_CMAC_SUBKEY_GEN_256(_mgr, _exp_key, _key1, _key2)   \</span></div>
+<div class="line"><a id="l01716" name="l01716"></a><span class="lineno"> 1716</span><span class="preprocessor">        ((_mgr)-&gt;cmac_subkey_gen_256((_exp_key), (_key1), (_key2)))</span></div>
+<div class="line"><a id="l01717" name="l01717"></a><span class="lineno"> 1717</span> </div>
+<div class="line"><a id="l01727" name="l01727"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5a5f2342f2b1e65e41084d915c3b2cda"> 1727</a></span><span class="preprocessor">#define IMB_AES_XCBC_KEYEXP(_mgr, _key, _exp_key, _exp_key2, _exp_key3) \</span></div>
+<div class="line"><a id="l01728" name="l01728"></a><span class="lineno"> 1728</span><span class="preprocessor">        ((_mgr)-&gt;xcbc_keyexp((_key), (_exp_key), (_exp_key2), (_exp_key3)))</span></div>
+<div class="line"><a id="l01729" name="l01729"></a><span class="lineno"> 1729</span> </div>
+<div class="line"><a id="l01730" name="l01730"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6fbb59f06f60f1900b591735ad691ac6"> 1730</a></span><span class="preprocessor">#define IMB_DES_KEYSCHED(_mgr, _exp_key, _key)       \</span></div>
+<div class="line"><a id="l01731" name="l01731"></a><span class="lineno"> 1731</span><span class="preprocessor">        ((_mgr)-&gt;des_key_sched((_exp_key), (_key)))</span></div>
+<div class="line"><a id="l01732" name="l01732"></a><span class="lineno"> 1732</span> </div>
+<div class="line"><a id="l01733" name="l01733"></a><span class="lineno"> 1733</span><span class="comment">/* Hash API&#39;s */</span></div>
+<div class="line"><a id="l01734" name="l01734"></a><span class="lineno"> 1734</span> </div>
+<div class="line"><a id="l01742" name="l01742"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac2f9695b12c32c303faa7c93c1c24c9b"> 1742</a></span><span class="preprocessor">#define IMB_SHA1_ONE_BLOCK(_mgr, _src, _tag)        \</span></div>
+<div class="line"><a id="l01743" name="l01743"></a><span class="lineno"> 1743</span><span class="preprocessor">        ((_mgr)-&gt;sha1_one_block((_src), (_tag)))</span></div>
+<div class="line"><a id="l01744" name="l01744"></a><span class="lineno"> 1744</span> </div>
+<div class="line"><a id="l01753" name="l01753"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae61900d14cde2836621a1421141548a4"> 1753</a></span><span class="preprocessor">#define IMB_SHA1(_mgr, _src, _length, _tag)         \</span></div>
+<div class="line"><a id="l01754" name="l01754"></a><span class="lineno"> 1754</span><span class="preprocessor">        ((_mgr)-&gt;sha1((_src), (_length), (_tag)))</span></div>
+<div class="line"><a id="l01762" name="l01762"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab1f7eb5e9bcd0c69a70dc76747f919f6"> 1762</a></span><span class="preprocessor">#define IMB_SHA224_ONE_BLOCK(_mgr, _src, _tag)      \</span></div>
+<div class="line"><a id="l01763" name="l01763"></a><span class="lineno"> 1763</span><span class="preprocessor">        ((_mgr)-&gt;sha224_one_block((_src), (_tag)))</span></div>
+<div class="line"><a id="l01764" name="l01764"></a><span class="lineno"> 1764</span> </div>
+<div class="line"><a id="l01773" name="l01773"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a542a40ced46bf97a678c6b44c325b360"> 1773</a></span><span class="preprocessor">#define IMB_SHA224(_mgr, _src, _length, _tag)       \</span></div>
+<div class="line"><a id="l01774" name="l01774"></a><span class="lineno"> 1774</span><span class="preprocessor">        ((_mgr)-&gt;sha224((_src), (_length), (_tag)))</span></div>
+<div class="line"><a id="l01782" name="l01782"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6023b87b5d1c6dc7dc0547db540af997"> 1782</a></span><span class="preprocessor">#define IMB_SHA256_ONE_BLOCK(_mgr, _src, _tag)      \</span></div>
+<div class="line"><a id="l01783" name="l01783"></a><span class="lineno"> 1783</span><span class="preprocessor">        ((_mgr)-&gt;sha256_one_block((_src), (_tag)))</span></div>
+<div class="line"><a id="l01792" name="l01792"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a37338b9f91315e5de0c4f3d19859aa7b"> 1792</a></span><span class="preprocessor">#define IMB_SHA256(_mgr, _src, _length, _tag)       \</span></div>
+<div class="line"><a id="l01793" name="l01793"></a><span class="lineno"> 1793</span><span class="preprocessor">        ((_mgr)-&gt;sha256((_src), (_length), (_tag)))</span></div>
+<div class="line"><a id="l01801" name="l01801"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a763d0cfb16263906e44f46696b16124b"> 1801</a></span><span class="preprocessor">#define IMB_SHA384_ONE_BLOCK(_mgr, _src, _tag)      \</span></div>
+<div class="line"><a id="l01802" name="l01802"></a><span class="lineno"> 1802</span><span class="preprocessor">        ((_mgr)-&gt;sha384_one_block((_src), (_tag)))</span></div>
+<div class="line"><a id="l01811" name="l01811"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac8052b8b996f866f27b4d443bcda0d5f"> 1811</a></span><span class="preprocessor">#define IMB_SHA384(_mgr, _src, _length, _tag)       \</span></div>
+<div class="line"><a id="l01812" name="l01812"></a><span class="lineno"> 1812</span><span class="preprocessor">        ((_mgr)-&gt;sha384((_src), (_length), (_tag)))</span></div>
+<div class="line"><a id="l01820" name="l01820"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a71d0a529b355a434efeeda2e01870ba9"> 1820</a></span><span class="preprocessor">#define IMB_SHA512_ONE_BLOCK(_mgr, _src, _tag)      \</span></div>
+<div class="line"><a id="l01821" name="l01821"></a><span class="lineno"> 1821</span><span class="preprocessor">        ((_mgr)-&gt;sha512_one_block((_src), (_tag)))</span></div>
+<div class="line"><a id="l01830" name="l01830"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac806d6b629633e801409d3e363d83f6c"> 1830</a></span><span class="preprocessor">#define IMB_SHA512(_mgr, _src, _length, _tag)       \</span></div>
+<div class="line"><a id="l01831" name="l01831"></a><span class="lineno"> 1831</span><span class="preprocessor">        ((_mgr)-&gt;sha512((_src), (_length), (_tag)))</span></div>
+<div class="line"><a id="l01839" name="l01839"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a52b27293e2a19809c5f7d0f2afab97a2"> 1839</a></span><span class="preprocessor">#define IMB_MD5_ONE_BLOCK(_mgr, _src, _tag)         \</span></div>
+<div class="line"><a id="l01840" name="l01840"></a><span class="lineno"> 1840</span><span class="preprocessor">        ((_mgr)-&gt;md5_one_block((_src), (_tag)))</span></div>
+<div class="line"><a id="l01841" name="l01841"></a><span class="lineno"> 1841</span> </div>
+<div class="line"><a id="l01855" name="l01855"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1e122b460a714f2981f94bf7f4bba547"> 1855</a></span><span class="preprocessor">#define IMB_AES128_CFB_ONE(_mgr, _dst, _src, _iv, _exp_key, _len)       \</span></div>
+<div class="line"><a id="l01856" name="l01856"></a><span class="lineno"> 1856</span><span class="preprocessor">        ((_mgr)-&gt;aes128_cfb_one((_dst), (_src), (_iv), (_exp_key), (_len)))</span></div>
+<div class="line"><a id="l01857" name="l01857"></a><span class="lineno"> 1857</span> </div>
+<div class="line"><a id="l01871" name="l01871"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab4d68ab67a7d4a471f5cb454301aac9d"> 1871</a></span><span class="preprocessor">#define IMB_AES256_CFB_ONE(_mgr, _dst, _src, _iv, _exp_key, _len)       \</span></div>
+<div class="line"><a id="l01872" name="l01872"></a><span class="lineno"> 1872</span><span class="preprocessor">        ((_mgr)-&gt;aes256_cfb_one((_dst), (_src), (_iv), (_exp_key), (_len)))</span></div>
+<div class="line"><a id="l01873" name="l01873"></a><span class="lineno"> 1873</span> </div>
+<div class="line"><a id="l01874" name="l01874"></a><span class="lineno"> 1874</span><span class="comment">/* AES-GCM API&#39;s */</span></div>
+<div class="line"><a id="l01875" name="l01875"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adb65fc01b63a475cca4cf532ace005b6"> 1875</a></span><span class="preprocessor">#define IMB_AES128_GCM_ENC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, _aad,  \</span></div>
+<div class="line"><a id="l01876" name="l01876"></a><span class="lineno"> 1876</span><span class="preprocessor">                           _aadl, _tag, _tagl)                                 \</span></div>
+<div class="line"><a id="l01877" name="l01877"></a><span class="lineno"> 1877</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_enc((_exp_key), (_ctx), (_dst), (_src), (_len), (_iv), \</span></div>
+<div class="line"><a id="l01878" name="l01878"></a><span class="lineno"> 1878</span><span class="preprocessor">                            (_aad), (_aadl), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01879" name="l01879"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af7548f17077a0b187a4ecfde4e0ff5d9"> 1879</a></span><span class="preprocessor">#define IMB_AES192_GCM_ENC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, _aad,  \</span></div>
+<div class="line"><a id="l01880" name="l01880"></a><span class="lineno"> 1880</span><span class="preprocessor">                           _aadl, _tag, _tagl)                                 \</span></div>
+<div class="line"><a id="l01881" name="l01881"></a><span class="lineno"> 1881</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_enc((_exp_key), (_ctx), (_dst), (_src), (_len), (_iv), \</span></div>
+<div class="line"><a id="l01882" name="l01882"></a><span class="lineno"> 1882</span><span class="preprocessor">                            (_aad), (_aadl), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01883" name="l01883"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a556333acdc2db1a2540a1cd1af644ca9"> 1883</a></span><span class="preprocessor">#define IMB_AES256_GCM_ENC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, _aad,  \</span></div>
+<div class="line"><a id="l01884" name="l01884"></a><span class="lineno"> 1884</span><span class="preprocessor">                           _aadl, _tag, _tagl)                                 \</span></div>
+<div class="line"><a id="l01885" name="l01885"></a><span class="lineno"> 1885</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_enc((_exp_key), (_ctx), (_dst), (_src), (_len), (_iv), \</span></div>
+<div class="line"><a id="l01886" name="l01886"></a><span class="lineno"> 1886</span><span class="preprocessor">                            (_aad), (_aadl), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01887" name="l01887"></a><span class="lineno"> 1887</span> </div>
+<div class="line"><a id="l01888" name="l01888"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2b026b2a901c76a1512eb9c8c80f9709"> 1888</a></span><span class="preprocessor">#define IMB_AES128_GCM_DEC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, _aad,  \</span></div>
+<div class="line"><a id="l01889" name="l01889"></a><span class="lineno"> 1889</span><span class="preprocessor">                           _aadl, _tag, _tagl)                                 \</span></div>
+<div class="line"><a id="l01890" name="l01890"></a><span class="lineno"> 1890</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_dec((_exp_key), (_ctx), (_dst), (_src), (_len), (_iv), \</span></div>
+<div class="line"><a id="l01891" name="l01891"></a><span class="lineno"> 1891</span><span class="preprocessor">                            (_aad), (_aadl), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01892" name="l01892"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aedd2b84ebfbcb56ac5176e8793490047"> 1892</a></span><span class="preprocessor">#define IMB_AES192_GCM_DEC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, \</span></div>
+<div class="line"><a id="l01893" name="l01893"></a><span class="lineno"> 1893</span><span class="preprocessor">                           _aad, _aadl, _tag, _tagl)                    \</span></div>
+<div class="line"><a id="l01894" name="l01894"></a><span class="lineno"> 1894</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_dec((_exp_key), (_ctx), (_dst), (_src), (_len), \</span></div>
+<div class="line"><a id="l01895" name="l01895"></a><span class="lineno"> 1895</span><span class="preprocessor">                            (_iv), (_aad), (_aadl), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01896" name="l01896"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1eb77771626f83eba8482473d29ffbb1"> 1896</a></span><span class="preprocessor">#define IMB_AES256_GCM_DEC(_mgr, _exp_key, _ctx, _dst, _src, _len, _iv, \</span></div>
+<div class="line"><a id="l01897" name="l01897"></a><span class="lineno"> 1897</span><span class="preprocessor">                           _aad, _aadl, _tag, _tagl)                    \</span></div>
+<div class="line"><a id="l01898" name="l01898"></a><span class="lineno"> 1898</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_dec((_exp_key), (_ctx), (_dst), (_src), (_len), \</span></div>
+<div class="line"><a id="l01899" name="l01899"></a><span class="lineno"> 1899</span><span class="preprocessor">                            (_iv), (_aad), (_aadl), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01900" name="l01900"></a><span class="lineno"> 1900</span> </div>
+<div class="line"><a id="l01901" name="l01901"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad0a8ea6b81df94d066b028ca7bf656ef"> 1901</a></span><span class="preprocessor">#define IMB_AES128_GCM_INIT(_mgr, _exp_key, _ctx, _iv, _aad, _aadl)       \</span></div>
+<div class="line"><a id="l01902" name="l01902"></a><span class="lineno"> 1902</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_init((_exp_key), (_ctx), (_iv), (_aad), (_aadl)))</span></div>
+<div class="line"><a id="l01903" name="l01903"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8cd402fe539de3fc8ff4062c2804096f"> 1903</a></span><span class="preprocessor">#define IMB_AES192_GCM_INIT(_mgr, _exp_key, _ctx, _iv, _aad, _aadl)       \</span></div>
+<div class="line"><a id="l01904" name="l01904"></a><span class="lineno"> 1904</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_init((_exp_key), (_ctx), (_iv), (_aad), (_aadl)))</span></div>
+<div class="line"><a id="l01905" name="l01905"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8049111340bf2694799eb4e42b0a82c3"> 1905</a></span><span class="preprocessor">#define IMB_AES256_GCM_INIT(_mgr, _exp_key, _ctx, _iv, _aad, _aadl)       \</span></div>
+<div class="line"><a id="l01906" name="l01906"></a><span class="lineno"> 1906</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_init((_exp_key), (_ctx), (_iv), (_aad), (_aadl)))</span></div>
+<div class="line"><a id="l01907" name="l01907"></a><span class="lineno"> 1907</span> </div>
+<div class="line"><a id="l01908" name="l01908"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a04142f11a678c0419dff242a0ccbd2e6"> 1908</a></span><span class="preprocessor">#define IMB_AES128_GCM_INIT_VAR_IV(_mgr, _exp_key, _ctx, _iv, _ivl, _aad, \</span></div>
+<div class="line"><a id="l01909" name="l01909"></a><span class="lineno"> 1909</span><span class="preprocessor">                                   _aadl)                                 \</span></div>
+<div class="line"><a id="l01910" name="l01910"></a><span class="lineno"> 1910</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_init_var_iv((_exp_key), (_ctx), (_iv), (_ivl),    \</span></div>
+<div class="line"><a id="l01911" name="l01911"></a><span class="lineno"> 1911</span><span class="preprocessor">                                    (_aad), (_aadl)))</span></div>
+<div class="line"><a id="l01912" name="l01912"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a97791c976660a673405e6fa22ef3d262"> 1912</a></span><span class="preprocessor">#define IMB_AES192_GCM_INIT_VAR_IV(_mgr, _exp_key, _ctx, _iv, _ivl, _aad, \</span></div>
+<div class="line"><a id="l01913" name="l01913"></a><span class="lineno"> 1913</span><span class="preprocessor">                                   _aadl)                                 \</span></div>
+<div class="line"><a id="l01914" name="l01914"></a><span class="lineno"> 1914</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_init_var_iv((_exp_key), (_ctx), (_iv), (_ivl),    \</span></div>
+<div class="line"><a id="l01915" name="l01915"></a><span class="lineno"> 1915</span><span class="preprocessor">                                    (_aad), (_aadl)))</span></div>
+<div class="line"><a id="l01916" name="l01916"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a61ddc1485781aba1969fe3ca97a22ded"> 1916</a></span><span class="preprocessor">#define IMB_AES256_GCM_INIT_VAR_IV(_mgr, _exp_key, _ctx, _iv, _ivl, _aad, \</span></div>
+<div class="line"><a id="l01917" name="l01917"></a><span class="lineno"> 1917</span><span class="preprocessor">                                    _aadl)                                \</span></div>
+<div class="line"><a id="l01918" name="l01918"></a><span class="lineno"> 1918</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_init_var_iv((_exp_key), (_ctx), (_iv), (_ivl),    \</span></div>
+<div class="line"><a id="l01919" name="l01919"></a><span class="lineno"> 1919</span><span class="preprocessor">                                    (_aad), (_aadl)))</span></div>
+<div class="line"><a id="l01920" name="l01920"></a><span class="lineno"> 1920</span> </div>
+<div class="line"><a id="l01921" name="l01921"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab1f4c52b4145946e80ef698e469d67db"> 1921</a></span><span class="preprocessor">#define IMB_AES128_GCM_ENC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
+<div class="line"><a id="l01922" name="l01922"></a><span class="lineno"> 1922</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_enc_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
+<div class="line"><a id="l01923" name="l01923"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a456f5bed8eb67603bdebfda230f76957"> 1923</a></span><span class="preprocessor">#define IMB_AES192_GCM_ENC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
+<div class="line"><a id="l01924" name="l01924"></a><span class="lineno"> 1924</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_enc_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
+<div class="line"><a id="l01925" name="l01925"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a223c00c636e2552e7a3dd1a97952cc6a"> 1925</a></span><span class="preprocessor">#define IMB_AES256_GCM_ENC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
+<div class="line"><a id="l01926" name="l01926"></a><span class="lineno"> 1926</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_enc_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
+<div class="line"><a id="l01927" name="l01927"></a><span class="lineno"> 1927</span> </div>
+<div class="line"><a id="l01928" name="l01928"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2f6014cfaaa0ee5f454e2771ff6b5829"> 1928</a></span><span class="preprocessor">#define IMB_AES128_GCM_DEC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
+<div class="line"><a id="l01929" name="l01929"></a><span class="lineno"> 1929</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_dec_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
+<div class="line"><a id="l01930" name="l01930"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae25c4f893fc29f09d03a8ece5fddc82f"> 1930</a></span><span class="preprocessor">#define IMB_AES192_GCM_DEC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
+<div class="line"><a id="l01931" name="l01931"></a><span class="lineno"> 1931</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_dec_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
+<div class="line"><a id="l01932" name="l01932"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a70847fd3bb5d1be79ebfa4e9104edabd"> 1932</a></span><span class="preprocessor">#define IMB_AES256_GCM_DEC_UPDATE(_mgr, _exp_key, _ctx, _dst, _src, _len)    \</span></div>
+<div class="line"><a id="l01933" name="l01933"></a><span class="lineno"> 1933</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_dec_update((_exp_key), (_ctx), (_dst), (_src), (_len)))</span></div>
+<div class="line"><a id="l01934" name="l01934"></a><span class="lineno"> 1934</span> </div>
+<div class="line"><a id="l01935" name="l01935"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aaf13d46f5832cf9e0cb50f7fcde020be"> 1935</a></span><span class="preprocessor">#define IMB_AES128_GCM_ENC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
+<div class="line"><a id="l01936" name="l01936"></a><span class="lineno"> 1936</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_enc_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01937" name="l01937"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1e36a361be137a5d49b0798f054403bd"> 1937</a></span><span class="preprocessor">#define IMB_AES192_GCM_ENC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
+<div class="line"><a id="l01938" name="l01938"></a><span class="lineno"> 1938</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_enc_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01939" name="l01939"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1f49fe7109315eb479ac1c9969e2f877"> 1939</a></span><span class="preprocessor">#define IMB_AES256_GCM_ENC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
+<div class="line"><a id="l01940" name="l01940"></a><span class="lineno"> 1940</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_enc_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01941" name="l01941"></a><span class="lineno"> 1941</span> </div>
+<div class="line"><a id="l01942" name="l01942"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a280b9231c76c525a62d0ef819abd2133"> 1942</a></span><span class="preprocessor">#define IMB_AES128_GCM_DEC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
+<div class="line"><a id="l01943" name="l01943"></a><span class="lineno"> 1943</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_dec_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01944" name="l01944"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a759bbe1b8494c3157f1a506c003b700b"> 1944</a></span><span class="preprocessor">#define IMB_AES192_GCM_DEC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
+<div class="line"><a id="l01945" name="l01945"></a><span class="lineno"> 1945</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_dec_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01946" name="l01946"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a64d9473bc4f28c0b783baa4a31b9930e"> 1946</a></span><span class="preprocessor">#define IMB_AES256_GCM_DEC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
+<div class="line"><a id="l01947" name="l01947"></a><span class="lineno"> 1947</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_dec_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01948" name="l01948"></a><span class="lineno"> 1948</span> </div>
+<div class="line"><a id="l01949" name="l01949"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af315c30a8cbd3c20735e22f462b47964"> 1949</a></span><span class="preprocessor">#define IMB_AES128_GMAC_INIT(_mgr, _exp_key, _ctx, _iv, _ivl) \</span></div>
+<div class="line"><a id="l01950" name="l01950"></a><span class="lineno"> 1950</span><span class="preprocessor">        ((_mgr)-&gt;gmac128_init((_exp_key), (_ctx), (_iv), (_ivl)))</span></div>
+<div class="line"><a id="l01951" name="l01951"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a25ed49507e66a6e98eab4a3d34e75231"> 1951</a></span><span class="preprocessor">#define IMB_AES192_GMAC_INIT(_mgr, _exp_key, _ctx, _iv, _ivl) \</span></div>
+<div class="line"><a id="l01952" name="l01952"></a><span class="lineno"> 1952</span><span class="preprocessor">        ((_mgr)-&gt;gmac192_init((_exp_key), (_ctx), (_iv), (_ivl)))</span></div>
+<div class="line"><a id="l01953" name="l01953"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3d57940a54e9d94fa14dc008cd959092"> 1953</a></span><span class="preprocessor">#define IMB_AES256_GMAC_INIT(_mgr, _exp_key, _ctx, _iv, _ivl) \</span></div>
+<div class="line"><a id="l01954" name="l01954"></a><span class="lineno"> 1954</span><span class="preprocessor">        ((_mgr)-&gt;gmac256_init((_exp_key), (_ctx), (_iv), (_ivl)))</span></div>
+<div class="line"><a id="l01955" name="l01955"></a><span class="lineno"> 1955</span> </div>
+<div class="line"><a id="l01956" name="l01956"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af0b2ba1a0f9b099a06a1ba04380b0e2a"> 1956</a></span><span class="preprocessor">#define IMB_AES128_GMAC_UPDATE(_mgr, _exp_key, _ctx, _src, _len) \</span></div>
+<div class="line"><a id="l01957" name="l01957"></a><span class="lineno"> 1957</span><span class="preprocessor">        ((_mgr)-&gt;gmac128_update((_exp_key), (_ctx), (_src), (_len)))</span></div>
+<div class="line"><a id="l01958" name="l01958"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a113d0f4320e929f89786773f7d11c5c8"> 1958</a></span><span class="preprocessor">#define IMB_AES192_GMAC_UPDATE(_mgr, _exp_key, _ctx, _src, _len) \</span></div>
+<div class="line"><a id="l01959" name="l01959"></a><span class="lineno"> 1959</span><span class="preprocessor">        ((_mgr)-&gt;gmac192_update((_exp_key), (_ctx), (_src), (_len)))</span></div>
+<div class="line"><a id="l01960" name="l01960"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a91b8d98c7ffce8179ef953493a959d4b"> 1960</a></span><span class="preprocessor">#define IMB_AES256_GMAC_UPDATE(_mgr, _exp_key, _ctx, _src, _len) \</span></div>
+<div class="line"><a id="l01961" name="l01961"></a><span class="lineno"> 1961</span><span class="preprocessor">        ((_mgr)-&gt;gmac256_update((_exp_key), (_ctx), (_src), (_len)))</span></div>
+<div class="line"><a id="l01962" name="l01962"></a><span class="lineno"> 1962</span> </div>
+<div class="line"><a id="l01963" name="l01963"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af0bd4f5841d41433339717e6b97c15ad"> 1963</a></span><span class="preprocessor">#define IMB_AES128_GMAC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
+<div class="line"><a id="l01964" name="l01964"></a><span class="lineno"> 1964</span><span class="preprocessor">        ((_mgr)-&gt;gmac128_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01965" name="l01965"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a16a6f89fd4131c406d6ee7a1aeb663eb"> 1965</a></span><span class="preprocessor">#define IMB_AES192_GMAC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
+<div class="line"><a id="l01966" name="l01966"></a><span class="lineno"> 1966</span><span class="preprocessor">        ((_mgr)-&gt;gmac192_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01967" name="l01967"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abfbb7469f7d0240bb3d9a0e5f368b19e"> 1967</a></span><span class="preprocessor">#define IMB_AES256_GMAC_FINALIZE(_mgr, _exp_key, _ctx, _tag, _tagl)      \</span></div>
+<div class="line"><a id="l01968" name="l01968"></a><span class="lineno"> 1968</span><span class="preprocessor">        ((_mgr)-&gt;gmac256_finalize((_exp_key), (_ctx), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01969" name="l01969"></a><span class="lineno"> 1969</span> </div>
+<div class="line"><a id="l01970" name="l01970"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1c63dfec645afa671f93f4fa65a6996e"> 1970</a></span><span class="preprocessor">#define IMB_AES128_GCM_PRECOMP(_mgr, _key) \</span></div>
+<div class="line"><a id="l01971" name="l01971"></a><span class="lineno"> 1971</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_precomp((_key)))</span></div>
+<div class="line"><a id="l01972" name="l01972"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7b3bcfd3ecbe7b2b8c7da963310b87b"> 1972</a></span><span class="preprocessor">#define IMB_AES192_GCM_PRECOMP(_mgr, _key) \</span></div>
+<div class="line"><a id="l01973" name="l01973"></a><span class="lineno"> 1973</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_precomp((_key)))</span></div>
+<div class="line"><a id="l01974" name="l01974"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4fa417a748ca30a961334bf91297dfda"> 1974</a></span><span class="preprocessor">#define IMB_AES256_GCM_PRECOMP(_mgr, _key) \</span></div>
+<div class="line"><a id="l01975" name="l01975"></a><span class="lineno"> 1975</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_precomp((_key)))</span></div>
+<div class="line"><a id="l01976" name="l01976"></a><span class="lineno"> 1976</span> </div>
+<div class="line"><a id="l01977" name="l01977"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5a442c1fcd7d427bf78e804da32bdbd1"> 1977</a></span><span class="preprocessor">#define IMB_AES128_GCM_PRE(_mgr, _key, _exp_key)     \</span></div>
+<div class="line"><a id="l01978" name="l01978"></a><span class="lineno"> 1978</span><span class="preprocessor">        ((_mgr)-&gt;gcm128_pre((_key), (_exp_key)))</span></div>
+<div class="line"><a id="l01979" name="l01979"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a003f16aac382baff7a6b83040e58e471"> 1979</a></span><span class="preprocessor">#define IMB_AES192_GCM_PRE(_mgr, _key, _exp_key)     \</span></div>
+<div class="line"><a id="l01980" name="l01980"></a><span class="lineno"> 1980</span><span class="preprocessor">        ((_mgr)-&gt;gcm192_pre((_key), (_exp_key)))</span></div>
+<div class="line"><a id="l01981" name="l01981"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5771f5169d3f3af3a2419ccd8275a754"> 1981</a></span><span class="preprocessor">#define IMB_AES256_GCM_PRE(_mgr, _key, _exp_key)     \</span></div>
+<div class="line"><a id="l01982" name="l01982"></a><span class="lineno"> 1982</span><span class="preprocessor">        ((_mgr)-&gt;gcm256_pre((_key), (_exp_key)))</span></div>
+<div class="line"><a id="l01983" name="l01983"></a><span class="lineno"> 1983</span> </div>
+<div class="line"><a id="l01984" name="l01984"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a230f16784519d7e2b69de87871d35cb2"> 1984</a></span><span class="preprocessor">#define IMB_GHASH_PRE(_mgr, _key, _exp_key)          \</span></div>
+<div class="line"><a id="l01985" name="l01985"></a><span class="lineno"> 1985</span><span class="preprocessor">        ((_mgr)-&gt;ghash_pre((_key), (_exp_key)))</span></div>
+<div class="line"><a id="l01986" name="l01986"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a477ad08a4c55e2c6458b7e86dae803ec"> 1986</a></span><span class="preprocessor">#define IMB_GHASH(_mgr, _exp_key, _src, _len, _tag, _tagl) \</span></div>
+<div class="line"><a id="l01987" name="l01987"></a><span class="lineno"> 1987</span><span class="preprocessor">        ((_mgr)-&gt;ghash((_exp_key), (_src), (_len), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l01988" name="l01988"></a><span class="lineno"> 1988</span> </div>
+<div class="line"><a id="l01989" name="l01989"></a><span class="lineno"> 1989</span><span class="comment">/* Chacha20-Poly1305 direct API&#39;s */</span></div>
+<div class="line"><a id="l01990" name="l01990"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adb8ac3238e6dfe39a10e64602a96e643"> 1990</a></span><span class="preprocessor">#define IMB_CHACHA20_POLY1305_INIT(_mgr, _key, _ctx, _iv, _aad, _aadl)        \</span></div>
+<div class="line"><a id="l01991" name="l01991"></a><span class="lineno"> 1991</span><span class="preprocessor">        ((_mgr)-&gt;chacha20_poly1305_init((_key), (_ctx), (_iv), (_aad),        \</span></div>
+<div class="line"><a id="l01992" name="l01992"></a><span class="lineno"> 1992</span><span class="preprocessor">                                        (_aadl)))</span></div>
+<div class="line"><a id="l01993" name="l01993"></a><span class="lineno"> 1993</span> </div>
+<div class="line"><a id="l01994" name="l01994"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2abd7cd460b99467836188d62272cd2b"> 1994</a></span><span class="preprocessor">#define IMB_CHACHA20_POLY1305_ENC_UPDATE(_mgr, _key, _ctx, _dst, _src, _len)  \</span></div>
+<div class="line"><a id="l01995" name="l01995"></a><span class="lineno"> 1995</span><span class="preprocessor">        ((_mgr)-&gt;chacha20_poly1305_enc_update((_key), (_ctx), (_dst), (_src), \</span></div>
+<div class="line"><a id="l01996" name="l01996"></a><span class="lineno"> 1996</span><span class="preprocessor">                                              (_len)))</span></div>
+<div class="line"><a id="l01997" name="l01997"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4ac8fd429d9f356003522200811b0bed"> 1997</a></span><span class="preprocessor">#define IMB_CHACHA20_POLY1305_DEC_UPDATE(_mgr, _key, _ctx, _dst, _src, _len)  \</span></div>
+<div class="line"><a id="l01998" name="l01998"></a><span class="lineno"> 1998</span><span class="preprocessor">        ((_mgr)-&gt;chacha20_poly1305_dec_update((_key), (_ctx), (_dst), (_src), \</span></div>
+<div class="line"><a id="l01999" name="l01999"></a><span class="lineno"> 1999</span><span class="preprocessor">                                              (_len)))</span></div>
+<div class="line"><a id="l02000" name="l02000"></a><span class="lineno"> 2000</span> </div>
+<div class="line"><a id="l02001" name="l02001"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7575d2fafb2b970bd08a49a556602031"> 2001</a></span><span class="preprocessor">#define IMB_CHACHA20_POLY1305_ENC_FINALIZE(_mgr, _ctx, _tag, _tagl)           \</span></div>
+<div class="line"><a id="l02002" name="l02002"></a><span class="lineno"> 2002</span><span class="preprocessor">        ((_mgr)-&gt;chacha20_poly1305_finalize((_ctx), (_tag), (_tagl)))</span></div>
+<div class="line"><a id="l02003" name="l02003"></a><span class="lineno"> 2003</span> </div>
+<div class="line"><a id="l02004" name="l02004"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8f6a258b6a13952fad9c217194c716f0"> 2004</a></span><span class="preprocessor">#define IMB_CHACHA20_POLY1305_DEC_FINALIZE(_mgr, _ctx, _tag, _tagl)           \</span></div>
+<div class="line"><a id="l02005" name="l02005"></a><span class="lineno"> 2005</span><span class="preprocessor">        ((_mgr)-&gt;chacha20_poly1305_finalize((_ctx), (_tag), (_tagl)))</span></div>
 <div class="line"><a id="l02006" name="l02006"></a><span class="lineno"> 2006</span> </div>
-<div class="line"><a id="l02017" name="l02017"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adb23f957dde69fb3bb4c6798d1a69da4"> 2017</a></span><span class="preprocessor">#define IMB_ZUC_EEA3_1_BUFFER(_mgr, _key, _iv, _src, _dst, _len)         \</span></div>
-<div class="line"><a id="l02018" name="l02018"></a><span class="lineno"> 2018</span><span class="preprocessor">        ((_mgr)-&gt;eea3_1_buffer((_key), (_iv), (_src), (_dst), (_len)))</span></div>
-<div class="line"><a id="l02019" name="l02019"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a57445dd863838d04cf44f4d79c4dbcaf"> 2019</a></span><span class="preprocessor">#define IMB_ZUC_EEA3_4_BUFFER(_mgr, _key, _iv, _src, _dst, _len)         \</span></div>
-<div class="line"><a id="l02020" name="l02020"></a><span class="lineno"> 2020</span><span class="preprocessor">        ((_mgr)-&gt;eea3_4_buffer((_key), (_iv), (_src), (_dst), (_len)))</span></div>
-<div class="line"><a id="l02021" name="l02021"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6382e3185f31e61f995ab90110c52991"> 2021</a></span><span class="preprocessor">#define IMB_ZUC_EEA3_N_BUFFER(_mgr, _key, _iv, _src, _dst, _len, _count) \</span></div>
-<div class="line"><a id="l02022" name="l02022"></a><span class="lineno"> 2022</span><span class="preprocessor">        ((_mgr)-&gt;eea3_n_buffer((_key), (_iv), (_src), (_dst), (_len), (_count)))</span></div>
-<div class="line"><a id="l02023" name="l02023"></a><span class="lineno"> 2023</span> </div>
-<div class="line"><a id="l02024" name="l02024"></a><span class="lineno"> 2024</span> </div>
-<div class="line"><a id="l02035" name="l02035"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac789fe54f3a8f92144831a67b14501d4"> 2035</a></span><span class="preprocessor">#define IMB_ZUC_EIA3_1_BUFFER(_mgr, _key, _iv, _src, _len, _tag)         \</span></div>
-<div class="line"><a id="l02036" name="l02036"></a><span class="lineno"> 2036</span><span class="preprocessor">        ((_mgr)-&gt;eia3_1_buffer((_key), (_iv), (_src), (_len), (_tag)))</span></div>
-<div class="line"><a id="l02037" name="l02037"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae840d62f1246c0c4270c3319ef356d3c"> 2037</a></span><span class="preprocessor">#define IMB_ZUC_EIA3_N_BUFFER(_mgr, _key, _iv, _src, _len, _tag, _count) \</span></div>
-<div class="line"><a id="l02038" name="l02038"></a><span class="lineno"> 2038</span><span class="preprocessor">        ((_mgr)-&gt;eia3_n_buffer((_key), (_iv), (_src), (_len), (_tag), (_count)))</span></div>
-<div class="line"><a id="l02039" name="l02039"></a><span class="lineno"> 2039</span> </div>
-<div class="line"><a id="l02040" name="l02040"></a><span class="lineno"> 2040</span> </div>
-<div class="line"><a id="l02041" name="l02041"></a><span class="lineno"> 2041</span><span class="comment">/* KASUMI F8/F9 functions */</span></div>
+<div class="line"><a id="l02007" name="l02007"></a><span class="lineno"> 2007</span><span class="comment">/* ZUC EEA3/EIA3 functions */</span></div>
+<div class="line"><a id="l02008" name="l02008"></a><span class="lineno"> 2008</span> </div>
+<div class="line"><a id="l02019" name="l02019"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adb23f957dde69fb3bb4c6798d1a69da4"> 2019</a></span><span class="preprocessor">#define IMB_ZUC_EEA3_1_BUFFER(_mgr, _key, _iv, _src, _dst, _len)         \</span></div>
+<div class="line"><a id="l02020" name="l02020"></a><span class="lineno"> 2020</span><span class="preprocessor">        ((_mgr)-&gt;eea3_1_buffer((_key), (_iv), (_src), (_dst), (_len)))</span></div>
+<div class="line"><a id="l02021" name="l02021"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a57445dd863838d04cf44f4d79c4dbcaf"> 2021</a></span><span class="preprocessor">#define IMB_ZUC_EEA3_4_BUFFER(_mgr, _key, _iv, _src, _dst, _len)         \</span></div>
+<div class="line"><a id="l02022" name="l02022"></a><span class="lineno"> 2022</span><span class="preprocessor">        ((_mgr)-&gt;eea3_4_buffer((_key), (_iv), (_src), (_dst), (_len)))</span></div>
+<div class="line"><a id="l02023" name="l02023"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6382e3185f31e61f995ab90110c52991"> 2023</a></span><span class="preprocessor">#define IMB_ZUC_EEA3_N_BUFFER(_mgr, _key, _iv, _src, _dst, _len, _count) \</span></div>
+<div class="line"><a id="l02024" name="l02024"></a><span class="lineno"> 2024</span><span class="preprocessor">        ((_mgr)-&gt;eea3_n_buffer((_key), (_iv), (_src), (_dst), (_len), (_count)))</span></div>
+<div class="line"><a id="l02025" name="l02025"></a><span class="lineno"> 2025</span> </div>
+<div class="line"><a id="l02026" name="l02026"></a><span class="lineno"> 2026</span> </div>
+<div class="line"><a id="l02037" name="l02037"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac789fe54f3a8f92144831a67b14501d4"> 2037</a></span><span class="preprocessor">#define IMB_ZUC_EIA3_1_BUFFER(_mgr, _key, _iv, _src, _len, _tag)         \</span></div>
+<div class="line"><a id="l02038" name="l02038"></a><span class="lineno"> 2038</span><span class="preprocessor">        ((_mgr)-&gt;eia3_1_buffer((_key), (_iv), (_src), (_len), (_tag)))</span></div>
+<div class="line"><a id="l02039" name="l02039"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae840d62f1246c0c4270c3319ef356d3c"> 2039</a></span><span class="preprocessor">#define IMB_ZUC_EIA3_N_BUFFER(_mgr, _key, _iv, _src, _len, _tag, _count) \</span></div>
+<div class="line"><a id="l02040" name="l02040"></a><span class="lineno"> 2040</span><span class="preprocessor">        ((_mgr)-&gt;eia3_n_buffer((_key), (_iv), (_src), (_len), (_tag), (_count)))</span></div>
+<div class="line"><a id="l02041" name="l02041"></a><span class="lineno"> 2041</span> </div>
 <div class="line"><a id="l02042" name="l02042"></a><span class="lineno"> 2042</span> </div>
-<div class="line"><a id="l02058" name="l02058"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a45ac331e1f9241e53fc35a1f88dec6ce"> 2058</a></span><span class="preprocessor">#define IMB_KASUMI_F8_1_BUFFER(_mgr, _exp_key, _iv, _src, _dst, _len) \</span></div>
-<div class="line"><a id="l02059" name="l02059"></a><span class="lineno"> 2059</span><span class="preprocessor">        ((_mgr)-&gt;f8_1_buffer((_exp_key), (_iv), (_src), (_dst), (_len)))</span></div>
-<div class="line"><a id="l02060" name="l02060"></a><span class="lineno"> 2060</span> </div>
-<div class="line"><a id="l02077" name="l02077"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae3befb703f7dec2c0695e61542f3212c"> 2077</a></span><span class="preprocessor">#define IMB_KASUMI_F8_1_BUFFER_BIT(_mgr, _exp_key, _iv, _src, _dst, _len,  \</span></div>
-<div class="line"><a id="l02078" name="l02078"></a><span class="lineno"> 2078</span><span class="preprocessor">                                   _offset)                                 \</span></div>
-<div class="line"><a id="l02079" name="l02079"></a><span class="lineno"> 2079</span><span class="preprocessor">        ((_mgr)-&gt;f8_1_buffer_bit((_exp_key), (_iv), (_src), (_dst), (_len), \</span></div>
-<div class="line"><a id="l02080" name="l02080"></a><span class="lineno"> 2080</span><span class="preprocessor">                                 (_offset)))</span></div>
-<div class="line"><a id="l02081" name="l02081"></a><span class="lineno"> 2081</span> </div>
-<div class="line"><a id="l02101" name="l02101"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a884bfa72fc232c7e84043d0faee719ee"> 2101</a></span><span class="preprocessor">#define IMB_KASUMI_F8_2_BUFFER(_mgr, _exp_key, _iv1, _iv2, _src1, _dst1,   \</span></div>
-<div class="line"><a id="l02102" name="l02102"></a><span class="lineno"> 2102</span><span class="preprocessor">                               _len1, _src2, _dst2, _len2)                 \</span></div>
-<div class="line"><a id="l02103" name="l02103"></a><span class="lineno"> 2103</span><span class="preprocessor">        ((_mgr)-&gt;f8_2_buffer((_exp_key), (_iv1), (_iv2), (_src1), (_dst1), \</span></div>
-<div class="line"><a id="l02104" name="l02104"></a><span class="lineno"> 2104</span><span class="preprocessor">                             (_len1), (_src2), (_dst2), (_len2)))</span></div>
-<div class="line"><a id="l02126" name="l02126"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af35e87948218048e4bbad7162208fe41"> 2126</a></span><span class="preprocessor">#define IMB_KASUMI_F8_3_BUFFER(_mgr, _exp_key, _iv1, _iv2, _iv3, _src1, _dst1, \</span></div>
-<div class="line"><a id="l02127" name="l02127"></a><span class="lineno"> 2127</span><span class="preprocessor">                               _src2, _dst2, _src3, _dst3, _len)               \</span></div>
-<div class="line"><a id="l02128" name="l02128"></a><span class="lineno"> 2128</span><span class="preprocessor">        ((_mgr)-&gt;f8_3_buffer((_exp_key), (_iv1), (_iv2), (_iv3), (_src1),      \</span></div>
-<div class="line"><a id="l02129" name="l02129"></a><span class="lineno"> 2129</span><span class="preprocessor">                             (_dst1), (_src2), (_dst2), (_src3), (_dst3),      \</span></div>
-<div class="line"><a id="l02130" name="l02130"></a><span class="lineno"> 2130</span><span class="preprocessor">                             (_len)))</span></div>
-<div class="line"><a id="l02155" name="l02155"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7ed6be7362e5ff7553fb4e7633bee76a"> 2155</a></span><span class="preprocessor">#define IMB_KASUMI_F8_4_BUFFER(_mgr, _exp_key, _iv1, _iv2, _iv3, _iv4,   \</span></div>
-<div class="line"><a id="l02156" name="l02156"></a><span class="lineno"> 2156</span><span class="preprocessor">                               _src1, _dst1, _src2, _dst2, _src3, _dst3, \</span></div>
-<div class="line"><a id="l02157" name="l02157"></a><span class="lineno"> 2157</span><span class="preprocessor">                               _src4, _dst4, _len)                       \</span></div>
-<div class="line"><a id="l02158" name="l02158"></a><span class="lineno"> 2158</span><span class="preprocessor">        ((_mgr)-&gt;f8_4_buffer((_exp_key), (_iv1), (_iv2), (_iv3), (_iv4), \</span></div>
-<div class="line"><a id="l02159" name="l02159"></a><span class="lineno"> 2159</span><span class="preprocessor">                             (_src1), (_dst1), (_src2), (_dst2),         \</span></div>
-<div class="line"><a id="l02160" name="l02160"></a><span class="lineno"> 2160</span><span class="preprocessor">                             (_src3), (_dst3), (_src4), (_dst4), (_len)))</span></div>
-<div class="line"><a id="l02176" name="l02176"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a65b1afbadee23111046746a4d302bb0d"> 2176</a></span><span class="preprocessor">#define IMB_KASUMI_F8_N_BUFFER(_mgr, _exp_key, _iv, _src, _dst, _len, _count) \</span></div>
-<div class="line"><a id="l02177" name="l02177"></a><span class="lineno"> 2177</span><span class="preprocessor">        ((_mgr)-&gt;f8_n_buffer((_exp_key), (_iv), (_src), (_dst), (_len),       \</span></div>
-<div class="line"><a id="l02178" name="l02178"></a><span class="lineno"> 2178</span><span class="preprocessor">                             (_count)))</span></div>
-<div class="line"><a id="l02194" name="l02194"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a43c13bbdf83e2c75d6dd29d01dec4a1f"> 2194</a></span><span class="preprocessor">#define IMB_KASUMI_F9_1_BUFFER(_mgr, _exp_key,  _src, _len, _tag) \</span></div>
-<div class="line"><a id="l02195" name="l02195"></a><span class="lineno"> 2195</span><span class="preprocessor">        ((_mgr)-&gt;f9_1_buffer((_exp_key), (_src), (_len), (_tag)))</span></div>
-<div class="line"><a id="l02196" name="l02196"></a><span class="lineno"> 2196</span> </div>
-<div class="line"><a id="l02211" name="l02211"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a66dcf1985c046ef619141a6706159940"> 2211</a></span><span class="preprocessor">#define IMB_KASUMI_F9_1_BUFFER_USER(_mgr, _exp_key, _iv, _src, _len, _tag,    \</span></div>
-<div class="line"><a id="l02212" name="l02212"></a><span class="lineno"> 2212</span><span class="preprocessor">                                    _dir)                                     \</span></div>
-<div class="line"><a id="l02213" name="l02213"></a><span class="lineno"> 2213</span><span class="preprocessor">        ((_mgr)-&gt;f9_1_buffer_user((_exp_key), (_iv), (_src), (_len),          \</span></div>
-<div class="line"><a id="l02214" name="l02214"></a><span class="lineno"> 2214</span><span class="preprocessor">                                  (_tag), (_dir)))</span></div>
-<div class="line"><a id="l02215" name="l02215"></a><span class="lineno"> 2215</span> </div>
-<div class="line"><a id="l02225" name="l02225"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aafcc540a047a6036adf4da0613ea5272"> 2225</a></span><span class="preprocessor">#define IMB_KASUMI_INIT_F8_KEY_SCHED(_mgr, _key, _exp_key)     \</span></div>
-<div class="line"><a id="l02226" name="l02226"></a><span class="lineno"> 2226</span><span class="preprocessor">        ((_mgr)-&gt;kasumi_init_f8_key_sched((_key), (_exp_key)))</span></div>
-<div class="line"><a id="l02227" name="l02227"></a><span class="lineno"> 2227</span> </div>
-<div class="line"><a id="l02237" name="l02237"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a80a71ab95fd99c8427e171e45cebbd92"> 2237</a></span><span class="preprocessor">#define IMB_KASUMI_INIT_F9_KEY_SCHED(_mgr, _key, _exp_key)     \</span></div>
-<div class="line"><a id="l02238" name="l02238"></a><span class="lineno"> 2238</span><span class="preprocessor">        ((_mgr)-&gt;kasumi_init_f9_key_sched((_key), (_exp_key)))</span></div>
-<div class="line"><a id="l02239" name="l02239"></a><span class="lineno"> 2239</span> </div>
-<div class="line"><a id="l02249" name="l02249"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae3812840fbe6b9b5ea5e84a6b86a7ed3"> 2249</a></span><span class="preprocessor">#define IMB_KASUMI_KEY_SCHED_SIZE(_mgr)((_mgr)-&gt;kasumi_key_sched_size())</span></div>
-<div class="line"><a id="l02250" name="l02250"></a><span class="lineno"> 2250</span> </div>
-<div class="line"><a id="l02251" name="l02251"></a><span class="lineno"> 2251</span> </div>
-<div class="line"><a id="l02252" name="l02252"></a><span class="lineno"> 2252</span><span class="comment">/* SNOW3G F8/F9 functions */</span></div>
+<div class="line"><a id="l02043" name="l02043"></a><span class="lineno"> 2043</span><span class="comment">/* KASUMI F8/F9 functions */</span></div>
+<div class="line"><a id="l02044" name="l02044"></a><span class="lineno"> 2044</span> </div>
+<div class="line"><a id="l02060" name="l02060"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a45ac331e1f9241e53fc35a1f88dec6ce"> 2060</a></span><span class="preprocessor">#define IMB_KASUMI_F8_1_BUFFER(_mgr, _exp_key, _iv, _src, _dst, _len) \</span></div>
+<div class="line"><a id="l02061" name="l02061"></a><span class="lineno"> 2061</span><span class="preprocessor">        ((_mgr)-&gt;f8_1_buffer((_exp_key), (_iv), (_src), (_dst), (_len)))</span></div>
+<div class="line"><a id="l02062" name="l02062"></a><span class="lineno"> 2062</span> </div>
+<div class="line"><a id="l02079" name="l02079"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae3befb703f7dec2c0695e61542f3212c"> 2079</a></span><span class="preprocessor">#define IMB_KASUMI_F8_1_BUFFER_BIT(_mgr, _exp_key, _iv, _src, _dst, _len,  \</span></div>
+<div class="line"><a id="l02080" name="l02080"></a><span class="lineno"> 2080</span><span class="preprocessor">                                   _offset)                                 \</span></div>
+<div class="line"><a id="l02081" name="l02081"></a><span class="lineno"> 2081</span><span class="preprocessor">        ((_mgr)-&gt;f8_1_buffer_bit((_exp_key), (_iv), (_src), (_dst), (_len), \</span></div>
+<div class="line"><a id="l02082" name="l02082"></a><span class="lineno"> 2082</span><span class="preprocessor">                                 (_offset)))</span></div>
+<div class="line"><a id="l02083" name="l02083"></a><span class="lineno"> 2083</span> </div>
+<div class="line"><a id="l02103" name="l02103"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a884bfa72fc232c7e84043d0faee719ee"> 2103</a></span><span class="preprocessor">#define IMB_KASUMI_F8_2_BUFFER(_mgr, _exp_key, _iv1, _iv2, _src1, _dst1,   \</span></div>
+<div class="line"><a id="l02104" name="l02104"></a><span class="lineno"> 2104</span><span class="preprocessor">                               _len1, _src2, _dst2, _len2)                 \</span></div>
+<div class="line"><a id="l02105" name="l02105"></a><span class="lineno"> 2105</span><span class="preprocessor">        ((_mgr)-&gt;f8_2_buffer((_exp_key), (_iv1), (_iv2), (_src1), (_dst1), \</span></div>
+<div class="line"><a id="l02106" name="l02106"></a><span class="lineno"> 2106</span><span class="preprocessor">                             (_len1), (_src2), (_dst2), (_len2)))</span></div>
+<div class="line"><a id="l02128" name="l02128"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af35e87948218048e4bbad7162208fe41"> 2128</a></span><span class="preprocessor">#define IMB_KASUMI_F8_3_BUFFER(_mgr, _exp_key, _iv1, _iv2, _iv3, _src1, _dst1, \</span></div>
+<div class="line"><a id="l02129" name="l02129"></a><span class="lineno"> 2129</span><span class="preprocessor">                               _src2, _dst2, _src3, _dst3, _len)               \</span></div>
+<div class="line"><a id="l02130" name="l02130"></a><span class="lineno"> 2130</span><span class="preprocessor">        ((_mgr)-&gt;f8_3_buffer((_exp_key), (_iv1), (_iv2), (_iv3), (_src1),      \</span></div>
+<div class="line"><a id="l02131" name="l02131"></a><span class="lineno"> 2131</span><span class="preprocessor">                             (_dst1), (_src2), (_dst2), (_src3), (_dst3),      \</span></div>
+<div class="line"><a id="l02132" name="l02132"></a><span class="lineno"> 2132</span><span class="preprocessor">                             (_len)))</span></div>
+<div class="line"><a id="l02157" name="l02157"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7ed6be7362e5ff7553fb4e7633bee76a"> 2157</a></span><span class="preprocessor">#define IMB_KASUMI_F8_4_BUFFER(_mgr, _exp_key, _iv1, _iv2, _iv3, _iv4,   \</span></div>
+<div class="line"><a id="l02158" name="l02158"></a><span class="lineno"> 2158</span><span class="preprocessor">                               _src1, _dst1, _src2, _dst2, _src3, _dst3, \</span></div>
+<div class="line"><a id="l02159" name="l02159"></a><span class="lineno"> 2159</span><span class="preprocessor">                               _src4, _dst4, _len)                       \</span></div>
+<div class="line"><a id="l02160" name="l02160"></a><span class="lineno"> 2160</span><span class="preprocessor">        ((_mgr)-&gt;f8_4_buffer((_exp_key), (_iv1), (_iv2), (_iv3), (_iv4), \</span></div>
+<div class="line"><a id="l02161" name="l02161"></a><span class="lineno"> 2161</span><span class="preprocessor">                             (_src1), (_dst1), (_src2), (_dst2),         \</span></div>
+<div class="line"><a id="l02162" name="l02162"></a><span class="lineno"> 2162</span><span class="preprocessor">                             (_src3), (_dst3), (_src4), (_dst4), (_len)))</span></div>
+<div class="line"><a id="l02178" name="l02178"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a65b1afbadee23111046746a4d302bb0d"> 2178</a></span><span class="preprocessor">#define IMB_KASUMI_F8_N_BUFFER(_mgr, _exp_key, _iv, _src, _dst, _len, _count) \</span></div>
+<div class="line"><a id="l02179" name="l02179"></a><span class="lineno"> 2179</span><span class="preprocessor">        ((_mgr)-&gt;f8_n_buffer((_exp_key), (_iv), (_src), (_dst), (_len),       \</span></div>
+<div class="line"><a id="l02180" name="l02180"></a><span class="lineno"> 2180</span><span class="preprocessor">                             (_count)))</span></div>
+<div class="line"><a id="l02196" name="l02196"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a43c13bbdf83e2c75d6dd29d01dec4a1f"> 2196</a></span><span class="preprocessor">#define IMB_KASUMI_F9_1_BUFFER(_mgr, _exp_key,  _src, _len, _tag) \</span></div>
+<div class="line"><a id="l02197" name="l02197"></a><span class="lineno"> 2197</span><span class="preprocessor">        ((_mgr)-&gt;f9_1_buffer((_exp_key), (_src), (_len), (_tag)))</span></div>
+<div class="line"><a id="l02198" name="l02198"></a><span class="lineno"> 2198</span> </div>
+<div class="line"><a id="l02213" name="l02213"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a66dcf1985c046ef619141a6706159940"> 2213</a></span><span class="preprocessor">#define IMB_KASUMI_F9_1_BUFFER_USER(_mgr, _exp_key, _iv, _src, _len, _tag,    \</span></div>
+<div class="line"><a id="l02214" name="l02214"></a><span class="lineno"> 2214</span><span class="preprocessor">                                    _dir)                                     \</span></div>
+<div class="line"><a id="l02215" name="l02215"></a><span class="lineno"> 2215</span><span class="preprocessor">        ((_mgr)-&gt;f9_1_buffer_user((_exp_key), (_iv), (_src), (_len),          \</span></div>
+<div class="line"><a id="l02216" name="l02216"></a><span class="lineno"> 2216</span><span class="preprocessor">                                  (_tag), (_dir)))</span></div>
+<div class="line"><a id="l02217" name="l02217"></a><span class="lineno"> 2217</span> </div>
+<div class="line"><a id="l02227" name="l02227"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aafcc540a047a6036adf4da0613ea5272"> 2227</a></span><span class="preprocessor">#define IMB_KASUMI_INIT_F8_KEY_SCHED(_mgr, _key, _exp_key)     \</span></div>
+<div class="line"><a id="l02228" name="l02228"></a><span class="lineno"> 2228</span><span class="preprocessor">        ((_mgr)-&gt;kasumi_init_f8_key_sched((_key), (_exp_key)))</span></div>
+<div class="line"><a id="l02229" name="l02229"></a><span class="lineno"> 2229</span> </div>
+<div class="line"><a id="l02239" name="l02239"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a80a71ab95fd99c8427e171e45cebbd92"> 2239</a></span><span class="preprocessor">#define IMB_KASUMI_INIT_F9_KEY_SCHED(_mgr, _key, _exp_key)     \</span></div>
+<div class="line"><a id="l02240" name="l02240"></a><span class="lineno"> 2240</span><span class="preprocessor">        ((_mgr)-&gt;kasumi_init_f9_key_sched((_key), (_exp_key)))</span></div>
+<div class="line"><a id="l02241" name="l02241"></a><span class="lineno"> 2241</span> </div>
+<div class="line"><a id="l02251" name="l02251"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae3812840fbe6b9b5ea5e84a6b86a7ed3"> 2251</a></span><span class="preprocessor">#define IMB_KASUMI_KEY_SCHED_SIZE(_mgr)((_mgr)-&gt;kasumi_key_sched_size())</span></div>
+<div class="line"><a id="l02252" name="l02252"></a><span class="lineno"> 2252</span> </div>
 <div class="line"><a id="l02253" name="l02253"></a><span class="lineno"> 2253</span> </div>
-<div class="line"><a id="l02269" name="l02269"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5d7a9e694b932b1c198782e22dc1ead5"> 2269</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_1_BUFFER_BIT(_mgr, _exp_key, _iv, _src, _dst,     \</span></div>
-<div class="line"><a id="l02270" name="l02270"></a><span class="lineno"> 2270</span><span class="preprocessor">                                   _len, _offset)                       \</span></div>
-<div class="line"><a id="l02271" name="l02271"></a><span class="lineno"> 2271</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_1_buffer_bit((_exp_key), (_iv), (_src),      \</span></div>
-<div class="line"><a id="l02272" name="l02272"></a><span class="lineno"> 2272</span><span class="preprocessor">                                        (_dst), (_len), (_offset)))</span></div>
-<div class="line"><a id="l02273" name="l02273"></a><span class="lineno"> 2273</span> </div>
-<div class="line"><a id="l02288" name="l02288"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4bcfbb70da38433f8bcd3468779026f1"> 2288</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_1_BUFFER(_mgr, _exp_key, _iv, _src, _dst, _len)        \</span></div>
-<div class="line"><a id="l02289" name="l02289"></a><span class="lineno"> 2289</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_1_buffer((_exp_key), (_iv), (_src), (_dst), (_len)))</span></div>
-<div class="line"><a id="l02290" name="l02290"></a><span class="lineno"> 2290</span> </div>
-<div class="line"><a id="l02307" name="l02307"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a51085837f0775feae26fe3885f7459b7"> 2307</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_2_BUFFER(_mgr, _exp_key, _iv1, _iv2,              \</span></div>
-<div class="line"><a id="l02308" name="l02308"></a><span class="lineno"> 2308</span><span class="preprocessor">                               _src1, _dst1, _len1,                     \</span></div>
-<div class="line"><a id="l02309" name="l02309"></a><span class="lineno"> 2309</span><span class="preprocessor">                               _src2, _dst2, _len2)                     \</span></div>
-<div class="line"><a id="l02310" name="l02310"></a><span class="lineno"> 2310</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_2_buffer((_exp_key), (_iv1), (_iv2),         \</span></div>
-<div class="line"><a id="l02311" name="l02311"></a><span class="lineno"> 2311</span><span class="preprocessor">                                    (_src1), (_dst1), (_len1),          \</span></div>
-<div class="line"><a id="l02312" name="l02312"></a><span class="lineno"> 2312</span><span class="preprocessor">                                    (_src2), (_dst2), (_len2)))</span></div>
-<div class="line"><a id="l02313" name="l02313"></a><span class="lineno"> 2313</span> </div>
-<div class="line"><a id="l02339" name="l02339"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a79b873457a74ad6c50e689709d79a0fb"> 2339</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_4_BUFFER(_mgr, _exp_key, _iv1, _iv2, _iv3, _iv4,   \</span></div>
-<div class="line"><a id="l02340" name="l02340"></a><span class="lineno"> 2340</span><span class="preprocessor">                               _src1, _dst1, _len1,                      \</span></div>
-<div class="line"><a id="l02341" name="l02341"></a><span class="lineno"> 2341</span><span class="preprocessor">                               _src2, _dst2, _len2,                      \</span></div>
-<div class="line"><a id="l02342" name="l02342"></a><span class="lineno"> 2342</span><span class="preprocessor">                               _src3, _dst3, _len3,                      \</span></div>
-<div class="line"><a id="l02343" name="l02343"></a><span class="lineno"> 2343</span><span class="preprocessor">                               _src4, _dst4, _len4)                      \</span></div>
-<div class="line"><a id="l02344" name="l02344"></a><span class="lineno"> 2344</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_4_buffer((_exp_key), (_iv1), (_iv2), (_iv3),  \</span></div>
-<div class="line"><a id="l02345" name="l02345"></a><span class="lineno"> 2345</span><span class="preprocessor">                                    (_iv4), (_src1), (_dst1), (_len1),   \</span></div>
-<div class="line"><a id="l02346" name="l02346"></a><span class="lineno"> 2346</span><span class="preprocessor">                                    (_src2), (_dst2), (_len2),           \</span></div>
-<div class="line"><a id="l02347" name="l02347"></a><span class="lineno"> 2347</span><span class="preprocessor">                                    (_src3), (_dst3), (_len3),           \</span></div>
-<div class="line"><a id="l02348" name="l02348"></a><span class="lineno"> 2348</span><span class="preprocessor">                                    (_src4), (_dst4), (_len4)))</span></div>
-<div class="line"><a id="l02349" name="l02349"></a><span class="lineno"> 2349</span> </div>
-<div class="line"><a id="l02391" name="l02391"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8536e68d053999123eb104762ef51932"> 2391</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_8_BUFFER(_mgr, _exp_key, _iv1, _iv2, _iv3, _iv4,   \</span></div>
-<div class="line"><a id="l02392" name="l02392"></a><span class="lineno"> 2392</span><span class="preprocessor">                               _iv5, _iv6, _iv7, _iv8,                   \</span></div>
-<div class="line"><a id="l02393" name="l02393"></a><span class="lineno"> 2393</span><span class="preprocessor">                               _src1, _dst1, _len1,                      \</span></div>
-<div class="line"><a id="l02394" name="l02394"></a><span class="lineno"> 2394</span><span class="preprocessor">                               _src2, _dst2, _len2,                      \</span></div>
-<div class="line"><a id="l02395" name="l02395"></a><span class="lineno"> 2395</span><span class="preprocessor">                               _src3, _dst3, _len3,                      \</span></div>
-<div class="line"><a id="l02396" name="l02396"></a><span class="lineno"> 2396</span><span class="preprocessor">                               _src4, _dst4, _len4,                      \</span></div>
-<div class="line"><a id="l02397" name="l02397"></a><span class="lineno"> 2397</span><span class="preprocessor">                               _src5, _dst5, _len5,                      \</span></div>
-<div class="line"><a id="l02398" name="l02398"></a><span class="lineno"> 2398</span><span class="preprocessor">                               _src6, _dst6, _len6,                      \</span></div>
-<div class="line"><a id="l02399" name="l02399"></a><span class="lineno"> 2399</span><span class="preprocessor">                               _src7, _dst7, _len7,                      \</span></div>
-<div class="line"><a id="l02400" name="l02400"></a><span class="lineno"> 2400</span><span class="preprocessor">                               _src8, _dst8, _len8)                      \</span></div>
-<div class="line"><a id="l02401" name="l02401"></a><span class="lineno"> 2401</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_8_buffer((_exp_key), (_iv1), (_iv2), (_iv3),  \</span></div>
-<div class="line"><a id="l02402" name="l02402"></a><span class="lineno"> 2402</span><span class="preprocessor">                                    (_iv4), (_iv5), (_iv6), (_iv7),      \</span></div>
-<div class="line"><a id="l02403" name="l02403"></a><span class="lineno"> 2403</span><span class="preprocessor">                                    (_iv8), (_src1), (_dst1), (_len1),   \</span></div>
-<div class="line"><a id="l02404" name="l02404"></a><span class="lineno"> 2404</span><span class="preprocessor">                                    (_src2), (_dst2), (_len2),           \</span></div>
-<div class="line"><a id="l02405" name="l02405"></a><span class="lineno"> 2405</span><span class="preprocessor">                                    (_src3), (_dst3), (_len3),           \</span></div>
-<div class="line"><a id="l02406" name="l02406"></a><span class="lineno"> 2406</span><span class="preprocessor">                                    (_src4), (_dst4), (_len4),           \</span></div>
-<div class="line"><a id="l02407" name="l02407"></a><span class="lineno"> 2407</span><span class="preprocessor">                                    (_src5), (_dst5), (_len5),           \</span></div>
-<div class="line"><a id="l02408" name="l02408"></a><span class="lineno"> 2408</span><span class="preprocessor">                                    (_src6), (_dst6), (_len6),           \</span></div>
-<div class="line"><a id="l02409" name="l02409"></a><span class="lineno"> 2409</span><span class="preprocessor">                                    (_src7), (_dst7), (_len7),           \</span></div>
-<div class="line"><a id="l02410" name="l02410"></a><span class="lineno"> 2410</span><span class="preprocessor">                                    (_src8), (_dst8), (_len8)))</span></div>
-<div class="line"><a id="l02424" name="l02424"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aca8fb428a3b291950cd9dc6277ad801a"> 2424</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_8_BUFFER_MULTIKEY(_mgr, _exp_key, _iv, _src, _dst, _len) \</span></div>
-<div class="line"><a id="l02425" name="l02425"></a><span class="lineno"> 2425</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_8_buffer_multikey((_exp_key), (_iv), (_src), (_dst),\</span></div>
-<div class="line"><a id="l02426" name="l02426"></a><span class="lineno"> 2426</span><span class="preprocessor">                                             (_len)))</span></div>
-<div class="line"><a id="l02427" name="l02427"></a><span class="lineno"> 2427</span> </div>
-<div class="line"><a id="l02442" name="l02442"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4538b34eaf3a3d402041ada1e8d03e2c"> 2442</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_N_BUFFER(_mgr, _exp_key, _iv, _src, _dst, _len, _count) \</span></div>
-<div class="line"><a id="l02443" name="l02443"></a><span class="lineno"> 2443</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_n_buffer((_exp_key), (_iv), (_src), \</span></div>
-<div class="line"><a id="l02444" name="l02444"></a><span class="lineno"> 2444</span><span class="preprocessor">                                    (_dst), (_len), (_count)))</span></div>
-<div class="line"><a id="l02445" name="l02445"></a><span class="lineno"> 2445</span> </div>
-<div class="line"><a id="l02460" name="l02460"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4a5ae1b04c7aee099c2f8fcbd488c38c"> 2460</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_N_BUFFER_MULTIKEY(_mgr, _exp_key, _iv, _src,           \</span></div>
-<div class="line"><a id="l02461" name="l02461"></a><span class="lineno"> 2461</span><span class="preprocessor">                                        _dst, _len, _count)             \</span></div>
-<div class="line"><a id="l02462" name="l02462"></a><span class="lineno"> 2462</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_n_buffer_multikey((_exp_key), (_iv), (_src),      \</span></div>
-<div class="line"><a id="l02463" name="l02463"></a><span class="lineno"> 2463</span><span class="preprocessor">                                             (_dst), (_len), (_count)))</span></div>
-<div class="line"><a id="l02464" name="l02464"></a><span class="lineno"> 2464</span> </div>
-<div class="line"><a id="l02480" name="l02480"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa6a951033156fc06c25afb4f79de8851"> 2480</a></span><span class="preprocessor">#define IMB_SNOW3G_F9_1_BUFFER(_mgr, _exp_key, _iv, _src, _len, _tag)     \</span></div>
-<div class="line"><a id="l02481" name="l02481"></a><span class="lineno"> 2481</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f9_1_buffer((_exp_key), (_iv), (_src), (_len), (_tag)))</span></div>
-<div class="line"><a id="l02482" name="l02482"></a><span class="lineno"> 2482</span> </div>
-<div class="line"><a id="l02493" name="l02493"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac5b5ff1cc9cf44ea8587a7d054b7459d"> 2493</a></span><span class="preprocessor">#define IMB_SNOW3G_INIT_KEY_SCHED(_mgr, _key, _exp_key)     \</span></div>
-<div class="line"><a id="l02494" name="l02494"></a><span class="lineno"> 2494</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_init_key_sched((_key), (_exp_key)))</span></div>
-<div class="line"><a id="l02495" name="l02495"></a><span class="lineno"> 2495</span> </div>
-<div class="line"><a id="l02505" name="l02505"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1ddd766994cb5d0b8e9ef5cd580cdcd2"> 2505</a></span><span class="preprocessor">#define IMB_SNOW3G_KEY_SCHED_SIZE(_mgr)((_mgr)-&gt;snow3g_key_sched_size())</span></div>
-<div class="line"><a id="l02506" name="l02506"></a><span class="lineno"> 2506</span> </div>
-<div class="line"><a id="l02510" name="l02510"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a37996cede66ee8036b1b113af5f553ac"> 2510</a></span><span class="preprocessor">#define IMB_HEC_32(_mgr, _src)((_mgr)-&gt;hec_32(_src))</span></div>
-<div class="line"><a id="l02511" name="l02511"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa0b62ba2c9fb07a1ad3c8105ec4374a4"> 2511</a></span><span class="preprocessor">#define IMB_HEC_64(_mgr, _src)((_mgr)-&gt;hec_64(_src))</span></div>
-<div class="line"><a id="l02512" name="l02512"></a><span class="lineno"> 2512</span> </div>
-<div class="line"><a id="l02516" name="l02516"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a075757c7f7b132a8f2ae13c18f36e2af"> 2516</a></span><span class="preprocessor">#define IMB_CRC32_ETHERNET_FCS(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02517" name="l02517"></a><span class="lineno"> 2517</span><span class="preprocessor">        (_mgr)-&gt;crc32_ethernet_fcs(_src, _len)</span></div>
-<div class="line"><a id="l02518" name="l02518"></a><span class="lineno"> 2518</span> </div>
-<div class="line"><a id="l02522" name="l02522"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a78217e8116876c0ecbe82fd3d417cc1c"> 2522</a></span><span class="preprocessor">#define IMB_CRC16_X25(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02523" name="l02523"></a><span class="lineno"> 2523</span><span class="preprocessor">        (_mgr)-&gt;crc16_x25(_src, _len)</span></div>
-<div class="line"><a id="l02524" name="l02524"></a><span class="lineno"> 2524</span> </div>
-<div class="line"><a id="l02528" name="l02528"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a86753ed15fcd8aab177d276dd4ebf169"> 2528</a></span><span class="preprocessor">#define IMB_CRC32_SCTP(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02529" name="l02529"></a><span class="lineno"> 2529</span><span class="preprocessor">        (_mgr)-&gt;crc32_sctp(_src, _len)</span></div>
-<div class="line"><a id="l02530" name="l02530"></a><span class="lineno"> 2530</span> </div>
-<div class="line"><a id="l02534" name="l02534"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6ff60117e0ff260865cd80323306479b"> 2534</a></span><span class="preprocessor">#define IMB_CRC24_LTE_A(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02535" name="l02535"></a><span class="lineno"> 2535</span><span class="preprocessor">        (_mgr)-&gt;crc24_lte_a(_src, _len)</span></div>
-<div class="line"><a id="l02536" name="l02536"></a><span class="lineno"> 2536</span> </div>
-<div class="line"><a id="l02540" name="l02540"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae07e15be0652ca8faa23c6f907d83e03"> 2540</a></span><span class="preprocessor">#define IMB_CRC24_LTE_B(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02541" name="l02541"></a><span class="lineno"> 2541</span><span class="preprocessor">        (_mgr)-&gt;crc24_lte_b(_src, _len)</span></div>
-<div class="line"><a id="l02542" name="l02542"></a><span class="lineno"> 2542</span> </div>
-<div class="line"><a id="l02546" name="l02546"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abe747d2365eb0393ab748c218029e3c6"> 2546</a></span><span class="preprocessor">#define IMB_CRC16_FP_DATA(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02547" name="l02547"></a><span class="lineno"> 2547</span><span class="preprocessor">        (_mgr)-&gt;crc16_fp_data(_src, _len)</span></div>
-<div class="line"><a id="l02548" name="l02548"></a><span class="lineno"> 2548</span> </div>
-<div class="line"><a id="l02552" name="l02552"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae35b6b1b19ef6d599d47591f6c1e1732"> 2552</a></span><span class="preprocessor">#define IMB_CRC11_FP_HEADER(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02553" name="l02553"></a><span class="lineno"> 2553</span><span class="preprocessor">        (_mgr)-&gt;crc11_fp_header(_src, _len)</span></div>
-<div class="line"><a id="l02554" name="l02554"></a><span class="lineno"> 2554</span> </div>
-<div class="line"><a id="l02558" name="l02558"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a23fe73b1f9d40348bc98f92f859df60b"> 2558</a></span><span class="preprocessor">#define IMB_CRC7_FP_HEADER(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02559" name="l02559"></a><span class="lineno"> 2559</span><span class="preprocessor">        (_mgr)-&gt;crc7_fp_header(_src, _len)</span></div>
-<div class="line"><a id="l02560" name="l02560"></a><span class="lineno"> 2560</span> </div>
-<div class="line"><a id="l02564" name="l02564"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7406ab5572b4af93ff8dbbc8ee0c961"> 2564</a></span><span class="preprocessor">#define IMB_CRC10_IUUP_DATA(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02565" name="l02565"></a><span class="lineno"> 2565</span><span class="preprocessor">        (_mgr)-&gt;crc10_iuup_data(_src, _len)</span></div>
-<div class="line"><a id="l02566" name="l02566"></a><span class="lineno"> 2566</span> </div>
-<div class="line"><a id="l02570" name="l02570"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7c45b0788456473390ca178275f9a34"> 2570</a></span><span class="preprocessor">#define IMB_CRC6_IUUP_HEADER(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02571" name="l02571"></a><span class="lineno"> 2571</span><span class="preprocessor">        (_mgr)-&gt;crc6_iuup_header(_src, _len)</span></div>
-<div class="line"><a id="l02572" name="l02572"></a><span class="lineno"> 2572</span> </div>
-<div class="line"><a id="l02576" name="l02576"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab0a9f19127f3417cc78cfdf9091af33e"> 2576</a></span><span class="preprocessor">#define IMB_CRC32_WIMAX_OFDMA_DATA(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02577" name="l02577"></a><span class="lineno"> 2577</span><span class="preprocessor">        (_mgr)-&gt;crc32_wimax_ofdma_data(_src, _len)</span></div>
-<div class="line"><a id="l02578" name="l02578"></a><span class="lineno"> 2578</span> </div>
-<div class="line"><a id="l02582" name="l02582"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0edd5fa8f3351ee214f7f2a267949f6d"> 2582</a></span><span class="preprocessor">#define IMB_CRC8_WIMAX_OFDMA_HCS(_mgr, _src, _len) \</span></div>
-<div class="line"><a id="l02583" name="l02583"></a><span class="lineno"> 2583</span><span class="preprocessor">        (_mgr)-&gt;crc8_wimax_ofdma_hcs(_src, _len)</span></div>
-<div class="line"><a id="l02584" name="l02584"></a><span class="lineno"> 2584</span> </div>
-<div class="line"><a id="l02585" name="l02585"></a><span class="lineno"> 2585</span><span class="comment">/* Auxiliary functions */</span></div>
+<div class="line"><a id="l02254" name="l02254"></a><span class="lineno"> 2254</span><span class="comment">/* SNOW3G F8/F9 functions */</span></div>
+<div class="line"><a id="l02255" name="l02255"></a><span class="lineno"> 2255</span> </div>
+<div class="line"><a id="l02271" name="l02271"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5d7a9e694b932b1c198782e22dc1ead5"> 2271</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_1_BUFFER_BIT(_mgr, _exp_key, _iv, _src, _dst,     \</span></div>
+<div class="line"><a id="l02272" name="l02272"></a><span class="lineno"> 2272</span><span class="preprocessor">                                   _len, _offset)                       \</span></div>
+<div class="line"><a id="l02273" name="l02273"></a><span class="lineno"> 2273</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_1_buffer_bit((_exp_key), (_iv), (_src),      \</span></div>
+<div class="line"><a id="l02274" name="l02274"></a><span class="lineno"> 2274</span><span class="preprocessor">                                        (_dst), (_len), (_offset)))</span></div>
+<div class="line"><a id="l02275" name="l02275"></a><span class="lineno"> 2275</span> </div>
+<div class="line"><a id="l02290" name="l02290"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4bcfbb70da38433f8bcd3468779026f1"> 2290</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_1_BUFFER(_mgr, _exp_key, _iv, _src, _dst, _len)        \</span></div>
+<div class="line"><a id="l02291" name="l02291"></a><span class="lineno"> 2291</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_1_buffer((_exp_key), (_iv), (_src), (_dst), (_len)))</span></div>
+<div class="line"><a id="l02292" name="l02292"></a><span class="lineno"> 2292</span> </div>
+<div class="line"><a id="l02309" name="l02309"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a51085837f0775feae26fe3885f7459b7"> 2309</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_2_BUFFER(_mgr, _exp_key, _iv1, _iv2,              \</span></div>
+<div class="line"><a id="l02310" name="l02310"></a><span class="lineno"> 2310</span><span class="preprocessor">                               _src1, _dst1, _len1,                     \</span></div>
+<div class="line"><a id="l02311" name="l02311"></a><span class="lineno"> 2311</span><span class="preprocessor">                               _src2, _dst2, _len2)                     \</span></div>
+<div class="line"><a id="l02312" name="l02312"></a><span class="lineno"> 2312</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_2_buffer((_exp_key), (_iv1), (_iv2),         \</span></div>
+<div class="line"><a id="l02313" name="l02313"></a><span class="lineno"> 2313</span><span class="preprocessor">                                    (_src1), (_dst1), (_len1),          \</span></div>
+<div class="line"><a id="l02314" name="l02314"></a><span class="lineno"> 2314</span><span class="preprocessor">                                    (_src2), (_dst2), (_len2)))</span></div>
+<div class="line"><a id="l02315" name="l02315"></a><span class="lineno"> 2315</span> </div>
+<div class="line"><a id="l02341" name="l02341"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a79b873457a74ad6c50e689709d79a0fb"> 2341</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_4_BUFFER(_mgr, _exp_key, _iv1, _iv2, _iv3, _iv4,   \</span></div>
+<div class="line"><a id="l02342" name="l02342"></a><span class="lineno"> 2342</span><span class="preprocessor">                               _src1, _dst1, _len1,                      \</span></div>
+<div class="line"><a id="l02343" name="l02343"></a><span class="lineno"> 2343</span><span class="preprocessor">                               _src2, _dst2, _len2,                      \</span></div>
+<div class="line"><a id="l02344" name="l02344"></a><span class="lineno"> 2344</span><span class="preprocessor">                               _src3, _dst3, _len3,                      \</span></div>
+<div class="line"><a id="l02345" name="l02345"></a><span class="lineno"> 2345</span><span class="preprocessor">                               _src4, _dst4, _len4)                      \</span></div>
+<div class="line"><a id="l02346" name="l02346"></a><span class="lineno"> 2346</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_4_buffer((_exp_key), (_iv1), (_iv2), (_iv3),  \</span></div>
+<div class="line"><a id="l02347" name="l02347"></a><span class="lineno"> 2347</span><span class="preprocessor">                                    (_iv4), (_src1), (_dst1), (_len1),   \</span></div>
+<div class="line"><a id="l02348" name="l02348"></a><span class="lineno"> 2348</span><span class="preprocessor">                                    (_src2), (_dst2), (_len2),           \</span></div>
+<div class="line"><a id="l02349" name="l02349"></a><span class="lineno"> 2349</span><span class="preprocessor">                                    (_src3), (_dst3), (_len3),           \</span></div>
+<div class="line"><a id="l02350" name="l02350"></a><span class="lineno"> 2350</span><span class="preprocessor">                                    (_src4), (_dst4), (_len4)))</span></div>
+<div class="line"><a id="l02351" name="l02351"></a><span class="lineno"> 2351</span> </div>
+<div class="line"><a id="l02393" name="l02393"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8536e68d053999123eb104762ef51932"> 2393</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_8_BUFFER(_mgr, _exp_key, _iv1, _iv2, _iv3, _iv4,   \</span></div>
+<div class="line"><a id="l02394" name="l02394"></a><span class="lineno"> 2394</span><span class="preprocessor">                               _iv5, _iv6, _iv7, _iv8,                   \</span></div>
+<div class="line"><a id="l02395" name="l02395"></a><span class="lineno"> 2395</span><span class="preprocessor">                               _src1, _dst1, _len1,                      \</span></div>
+<div class="line"><a id="l02396" name="l02396"></a><span class="lineno"> 2396</span><span class="preprocessor">                               _src2, _dst2, _len2,                      \</span></div>
+<div class="line"><a id="l02397" name="l02397"></a><span class="lineno"> 2397</span><span class="preprocessor">                               _src3, _dst3, _len3,                      \</span></div>
+<div class="line"><a id="l02398" name="l02398"></a><span class="lineno"> 2398</span><span class="preprocessor">                               _src4, _dst4, _len4,                      \</span></div>
+<div class="line"><a id="l02399" name="l02399"></a><span class="lineno"> 2399</span><span class="preprocessor">                               _src5, _dst5, _len5,                      \</span></div>
+<div class="line"><a id="l02400" name="l02400"></a><span class="lineno"> 2400</span><span class="preprocessor">                               _src6, _dst6, _len6,                      \</span></div>
+<div class="line"><a id="l02401" name="l02401"></a><span class="lineno"> 2401</span><span class="preprocessor">                               _src7, _dst7, _len7,                      \</span></div>
+<div class="line"><a id="l02402" name="l02402"></a><span class="lineno"> 2402</span><span class="preprocessor">                               _src8, _dst8, _len8)                      \</span></div>
+<div class="line"><a id="l02403" name="l02403"></a><span class="lineno"> 2403</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_8_buffer((_exp_key), (_iv1), (_iv2), (_iv3),  \</span></div>
+<div class="line"><a id="l02404" name="l02404"></a><span class="lineno"> 2404</span><span class="preprocessor">                                    (_iv4), (_iv5), (_iv6), (_iv7),      \</span></div>
+<div class="line"><a id="l02405" name="l02405"></a><span class="lineno"> 2405</span><span class="preprocessor">                                    (_iv8), (_src1), (_dst1), (_len1),   \</span></div>
+<div class="line"><a id="l02406" name="l02406"></a><span class="lineno"> 2406</span><span class="preprocessor">                                    (_src2), (_dst2), (_len2),           \</span></div>
+<div class="line"><a id="l02407" name="l02407"></a><span class="lineno"> 2407</span><span class="preprocessor">                                    (_src3), (_dst3), (_len3),           \</span></div>
+<div class="line"><a id="l02408" name="l02408"></a><span class="lineno"> 2408</span><span class="preprocessor">                                    (_src4), (_dst4), (_len4),           \</span></div>
+<div class="line"><a id="l02409" name="l02409"></a><span class="lineno"> 2409</span><span class="preprocessor">                                    (_src5), (_dst5), (_len5),           \</span></div>
+<div class="line"><a id="l02410" name="l02410"></a><span class="lineno"> 2410</span><span class="preprocessor">                                    (_src6), (_dst6), (_len6),           \</span></div>
+<div class="line"><a id="l02411" name="l02411"></a><span class="lineno"> 2411</span><span class="preprocessor">                                    (_src7), (_dst7), (_len7),           \</span></div>
+<div class="line"><a id="l02412" name="l02412"></a><span class="lineno"> 2412</span><span class="preprocessor">                                    (_src8), (_dst8), (_len8)))</span></div>
+<div class="line"><a id="l02426" name="l02426"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aca8fb428a3b291950cd9dc6277ad801a"> 2426</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_8_BUFFER_MULTIKEY(_mgr, _exp_key, _iv, _src, _dst, _len) \</span></div>
+<div class="line"><a id="l02427" name="l02427"></a><span class="lineno"> 2427</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_8_buffer_multikey((_exp_key), (_iv), (_src), (_dst),\</span></div>
+<div class="line"><a id="l02428" name="l02428"></a><span class="lineno"> 2428</span><span class="preprocessor">                                             (_len)))</span></div>
+<div class="line"><a id="l02429" name="l02429"></a><span class="lineno"> 2429</span> </div>
+<div class="line"><a id="l02444" name="l02444"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4538b34eaf3a3d402041ada1e8d03e2c"> 2444</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_N_BUFFER(_mgr, _exp_key, _iv, _src, _dst, _len, _count) \</span></div>
+<div class="line"><a id="l02445" name="l02445"></a><span class="lineno"> 2445</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_n_buffer((_exp_key), (_iv), (_src), \</span></div>
+<div class="line"><a id="l02446" name="l02446"></a><span class="lineno"> 2446</span><span class="preprocessor">                                    (_dst), (_len), (_count)))</span></div>
+<div class="line"><a id="l02447" name="l02447"></a><span class="lineno"> 2447</span> </div>
+<div class="line"><a id="l02462" name="l02462"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4a5ae1b04c7aee099c2f8fcbd488c38c"> 2462</a></span><span class="preprocessor">#define IMB_SNOW3G_F8_N_BUFFER_MULTIKEY(_mgr, _exp_key, _iv, _src,           \</span></div>
+<div class="line"><a id="l02463" name="l02463"></a><span class="lineno"> 2463</span><span class="preprocessor">                                        _dst, _len, _count)             \</span></div>
+<div class="line"><a id="l02464" name="l02464"></a><span class="lineno"> 2464</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f8_n_buffer_multikey((_exp_key), (_iv), (_src),      \</span></div>
+<div class="line"><a id="l02465" name="l02465"></a><span class="lineno"> 2465</span><span class="preprocessor">                                             (_dst), (_len), (_count)))</span></div>
+<div class="line"><a id="l02466" name="l02466"></a><span class="lineno"> 2466</span> </div>
+<div class="line"><a id="l02482" name="l02482"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa6a951033156fc06c25afb4f79de8851"> 2482</a></span><span class="preprocessor">#define IMB_SNOW3G_F9_1_BUFFER(_mgr, _exp_key, _iv, _src, _len, _tag)     \</span></div>
+<div class="line"><a id="l02483" name="l02483"></a><span class="lineno"> 2483</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_f9_1_buffer((_exp_key), (_iv), (_src), (_len), (_tag)))</span></div>
+<div class="line"><a id="l02484" name="l02484"></a><span class="lineno"> 2484</span> </div>
+<div class="line"><a id="l02495" name="l02495"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac5b5ff1cc9cf44ea8587a7d054b7459d"> 2495</a></span><span class="preprocessor">#define IMB_SNOW3G_INIT_KEY_SCHED(_mgr, _key, _exp_key)     \</span></div>
+<div class="line"><a id="l02496" name="l02496"></a><span class="lineno"> 2496</span><span class="preprocessor">        ((_mgr)-&gt;snow3g_init_key_sched((_key), (_exp_key)))</span></div>
+<div class="line"><a id="l02497" name="l02497"></a><span class="lineno"> 2497</span> </div>
+<div class="line"><a id="l02507" name="l02507"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1ddd766994cb5d0b8e9ef5cd580cdcd2"> 2507</a></span><span class="preprocessor">#define IMB_SNOW3G_KEY_SCHED_SIZE(_mgr)((_mgr)-&gt;snow3g_key_sched_size())</span></div>
+<div class="line"><a id="l02508" name="l02508"></a><span class="lineno"> 2508</span> </div>
+<div class="line"><a id="l02512" name="l02512"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a37996cede66ee8036b1b113af5f553ac"> 2512</a></span><span class="preprocessor">#define IMB_HEC_32(_mgr, _src)((_mgr)-&gt;hec_32(_src))</span></div>
+<div class="line"><a id="l02513" name="l02513"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa0b62ba2c9fb07a1ad3c8105ec4374a4"> 2513</a></span><span class="preprocessor">#define IMB_HEC_64(_mgr, _src)((_mgr)-&gt;hec_64(_src))</span></div>
+<div class="line"><a id="l02514" name="l02514"></a><span class="lineno"> 2514</span> </div>
+<div class="line"><a id="l02518" name="l02518"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a075757c7f7b132a8f2ae13c18f36e2af"> 2518</a></span><span class="preprocessor">#define IMB_CRC32_ETHERNET_FCS(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02519" name="l02519"></a><span class="lineno"> 2519</span><span class="preprocessor">        (_mgr)-&gt;crc32_ethernet_fcs(_src, _len)</span></div>
+<div class="line"><a id="l02520" name="l02520"></a><span class="lineno"> 2520</span> </div>
+<div class="line"><a id="l02524" name="l02524"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a78217e8116876c0ecbe82fd3d417cc1c"> 2524</a></span><span class="preprocessor">#define IMB_CRC16_X25(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02525" name="l02525"></a><span class="lineno"> 2525</span><span class="preprocessor">        (_mgr)-&gt;crc16_x25(_src, _len)</span></div>
+<div class="line"><a id="l02526" name="l02526"></a><span class="lineno"> 2526</span> </div>
+<div class="line"><a id="l02530" name="l02530"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a86753ed15fcd8aab177d276dd4ebf169"> 2530</a></span><span class="preprocessor">#define IMB_CRC32_SCTP(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02531" name="l02531"></a><span class="lineno"> 2531</span><span class="preprocessor">        (_mgr)-&gt;crc32_sctp(_src, _len)</span></div>
+<div class="line"><a id="l02532" name="l02532"></a><span class="lineno"> 2532</span> </div>
+<div class="line"><a id="l02536" name="l02536"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6ff60117e0ff260865cd80323306479b"> 2536</a></span><span class="preprocessor">#define IMB_CRC24_LTE_A(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02537" name="l02537"></a><span class="lineno"> 2537</span><span class="preprocessor">        (_mgr)-&gt;crc24_lte_a(_src, _len)</span></div>
+<div class="line"><a id="l02538" name="l02538"></a><span class="lineno"> 2538</span> </div>
+<div class="line"><a id="l02542" name="l02542"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae07e15be0652ca8faa23c6f907d83e03"> 2542</a></span><span class="preprocessor">#define IMB_CRC24_LTE_B(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02543" name="l02543"></a><span class="lineno"> 2543</span><span class="preprocessor">        (_mgr)-&gt;crc24_lte_b(_src, _len)</span></div>
+<div class="line"><a id="l02544" name="l02544"></a><span class="lineno"> 2544</span> </div>
+<div class="line"><a id="l02548" name="l02548"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abe747d2365eb0393ab748c218029e3c6"> 2548</a></span><span class="preprocessor">#define IMB_CRC16_FP_DATA(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02549" name="l02549"></a><span class="lineno"> 2549</span><span class="preprocessor">        (_mgr)-&gt;crc16_fp_data(_src, _len)</span></div>
+<div class="line"><a id="l02550" name="l02550"></a><span class="lineno"> 2550</span> </div>
+<div class="line"><a id="l02554" name="l02554"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae35b6b1b19ef6d599d47591f6c1e1732"> 2554</a></span><span class="preprocessor">#define IMB_CRC11_FP_HEADER(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02555" name="l02555"></a><span class="lineno"> 2555</span><span class="preprocessor">        (_mgr)-&gt;crc11_fp_header(_src, _len)</span></div>
+<div class="line"><a id="l02556" name="l02556"></a><span class="lineno"> 2556</span> </div>
+<div class="line"><a id="l02560" name="l02560"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a23fe73b1f9d40348bc98f92f859df60b"> 2560</a></span><span class="preprocessor">#define IMB_CRC7_FP_HEADER(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02561" name="l02561"></a><span class="lineno"> 2561</span><span class="preprocessor">        (_mgr)-&gt;crc7_fp_header(_src, _len)</span></div>
+<div class="line"><a id="l02562" name="l02562"></a><span class="lineno"> 2562</span> </div>
+<div class="line"><a id="l02566" name="l02566"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7406ab5572b4af93ff8dbbc8ee0c961"> 2566</a></span><span class="preprocessor">#define IMB_CRC10_IUUP_DATA(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02567" name="l02567"></a><span class="lineno"> 2567</span><span class="preprocessor">        (_mgr)-&gt;crc10_iuup_data(_src, _len)</span></div>
+<div class="line"><a id="l02568" name="l02568"></a><span class="lineno"> 2568</span> </div>
+<div class="line"><a id="l02572" name="l02572"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7c45b0788456473390ca178275f9a34"> 2572</a></span><span class="preprocessor">#define IMB_CRC6_IUUP_HEADER(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02573" name="l02573"></a><span class="lineno"> 2573</span><span class="preprocessor">        (_mgr)-&gt;crc6_iuup_header(_src, _len)</span></div>
+<div class="line"><a id="l02574" name="l02574"></a><span class="lineno"> 2574</span> </div>
+<div class="line"><a id="l02578" name="l02578"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab0a9f19127f3417cc78cfdf9091af33e"> 2578</a></span><span class="preprocessor">#define IMB_CRC32_WIMAX_OFDMA_DATA(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02579" name="l02579"></a><span class="lineno"> 2579</span><span class="preprocessor">        (_mgr)-&gt;crc32_wimax_ofdma_data(_src, _len)</span></div>
+<div class="line"><a id="l02580" name="l02580"></a><span class="lineno"> 2580</span> </div>
+<div class="line"><a id="l02584" name="l02584"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0edd5fa8f3351ee214f7f2a267949f6d"> 2584</a></span><span class="preprocessor">#define IMB_CRC8_WIMAX_OFDMA_HCS(_mgr, _src, _len) \</span></div>
+<div class="line"><a id="l02585" name="l02585"></a><span class="lineno"> 2585</span><span class="preprocessor">        (_mgr)-&gt;crc8_wimax_ofdma_hcs(_src, _len)</span></div>
 <div class="line"><a id="l02586" name="l02586"></a><span class="lineno"> 2586</span> </div>
-<div class="line"><a id="l02599" name="l02599"></a><span class="lineno"> 2599</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span></div>
-<div class="line"><a id="l02600" name="l02600"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9911462fe4689c7420b827bb13fc3440"> 2600</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a9911462fe4689c7420b827bb13fc3440">des_key_schedule</a>(uint64_t *ks, <span class="keyword">const</span> <span class="keywordtype">void</span> *key);</div>
-<div class="line"><a id="l02601" name="l02601"></a><span class="lineno"> 2601</span> </div>
-<div class="line"><a id="l02609" name="l02609"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a37491294dc799c5477e3979e89e0cf92"> 2609</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a37491294dc799c5477e3979e89e0cf92">sha1_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02610" name="l02610"></a><span class="lineno"> 2610</span>                             <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02611" name="l02611"></a><span class="lineno"> 2611</span> </div>
-<div class="line"><a id="l02615" name="l02615"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9478828dde5161c2a1b43cb0da0f9f67"> 2615</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a9478828dde5161c2a1b43cb0da0f9f67">sha1_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02616" name="l02616"></a><span class="lineno"> 2616</span>                             <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02620" name="l02620"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac13d60c1ddbd3c770f9d85d59821e520"> 2620</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac13d60c1ddbd3c770f9d85d59821e520">sha1_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02621" name="l02621"></a><span class="lineno"> 2621</span>                              <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02625" name="l02625"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad9b42865aff95b5bcde6efa4b4e83fe8"> 2625</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ad9b42865aff95b5bcde6efa4b4e83fe8">sha1_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02626" name="l02626"></a><span class="lineno"> 2626</span>                                 <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02627" name="l02627"></a><span class="lineno"> 2627</span> </div>
-<div class="line"><a id="l02634" name="l02634"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a99f608f81f6b692eaeea1d68cac25a28"> 2634</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a99f608f81f6b692eaeea1d68cac25a28">sha1_one_block_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02638" name="l02638"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a532582e6d066b9c6b1c2189ba1b36f27"> 2638</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a532582e6d066b9c6b1c2189ba1b36f27">sha1_one_block_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02642" name="l02642"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af1a63afff082c9d14bbe22f14bd6b5d9"> 2642</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#af1a63afff082c9d14bbe22f14bd6b5d9">sha1_one_block_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02646" name="l02646"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a745c97ce8263ebc67f4d8070f5c9ee50"> 2646</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a745c97ce8263ebc67f4d8070f5c9ee50">sha1_one_block_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02647" name="l02647"></a><span class="lineno"> 2647</span> </div>
-<div class="line"><a id="l02655" name="l02655"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2ef2c1513632e69da882a895a075aa2c"> 2655</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2ef2c1513632e69da882a895a075aa2c">sha224_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02656" name="l02656"></a><span class="lineno"> 2656</span>                               <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02660" name="l02660"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af0e48b520099db5a76190aa5395c90d3"> 2660</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#af0e48b520099db5a76190aa5395c90d3">sha224_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02661" name="l02661"></a><span class="lineno"> 2661</span>                               <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02665" name="l02665"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad5945d85d451ccf9b3ba06c06c10d4e9"> 2665</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ad5945d85d451ccf9b3ba06c06c10d4e9">sha224_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02666" name="l02666"></a><span class="lineno"> 2666</span>                                <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02670" name="l02670"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a51c522a828b36d9c69dd7c357b556fc9"> 2670</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a51c522a828b36d9c69dd7c357b556fc9">sha224_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02671" name="l02671"></a><span class="lineno"> 2671</span>                                  <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02672" name="l02672"></a><span class="lineno"> 2672</span> </div>
-<div class="line"><a id="l02679" name="l02679"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6a15b62259d7475edd02b11b775b7a38"> 2679</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a6a15b62259d7475edd02b11b775b7a38">sha224_one_block_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02683" name="l02683"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a76d64c2094522011f741de4ac8a03125"> 2683</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a76d64c2094522011f741de4ac8a03125">sha224_one_block_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02687" name="l02687"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a58916afb9e72f42a1c8c2658e248703a"> 2687</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a58916afb9e72f42a1c8c2658e248703a">sha224_one_block_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02691" name="l02691"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a16f7bd134f4a667f14261a89ca541126"> 2691</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a16f7bd134f4a667f14261a89ca541126">sha224_one_block_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02692" name="l02692"></a><span class="lineno"> 2692</span> </div>
-<div class="line"><a id="l02700" name="l02700"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4d9d41b8311d2649ec1b43d6e6edd398"> 2700</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a4d9d41b8311d2649ec1b43d6e6edd398">sha256_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02701" name="l02701"></a><span class="lineno"> 2701</span>                               <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02705" name="l02705"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7976461101f011a77d19f4fa480d5be3"> 2705</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a7976461101f011a77d19f4fa480d5be3">sha256_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02706" name="l02706"></a><span class="lineno"> 2706</span>                               <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02710" name="l02710"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aec411a6b29d7adff67e6eaa1b13b3975"> 2710</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aec411a6b29d7adff67e6eaa1b13b3975">sha256_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02711" name="l02711"></a><span class="lineno"> 2711</span>                                <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02715" name="l02715"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1020a70f15b89b7146733d8cbc2bcee8"> 2715</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a1020a70f15b89b7146733d8cbc2bcee8">sha256_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02716" name="l02716"></a><span class="lineno"> 2716</span>                                  <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02717" name="l02717"></a><span class="lineno"> 2717</span> </div>
-<div class="line"><a id="l02724" name="l02724"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae5ce647166e6f9f8b1d616584ee5d1d6"> 2724</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ae5ce647166e6f9f8b1d616584ee5d1d6">sha256_one_block_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02728" name="l02728"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2e481e815eb9c8109460e8a8dac62ce9"> 2728</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2e481e815eb9c8109460e8a8dac62ce9">sha256_one_block_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02732" name="l02732"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0a3c025cfbe9b6e72e9b9f4805f0ca1f"> 2732</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a0a3c025cfbe9b6e72e9b9f4805f0ca1f">sha256_one_block_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02736" name="l02736"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac2bfb5dca839523118362b48115d7c18"> 2736</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac2bfb5dca839523118362b48115d7c18">sha256_one_block_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02737" name="l02737"></a><span class="lineno"> 2737</span> </div>
-<div class="line"><a id="l02745" name="l02745"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad63e21495f9b798250f5c68371af4f37"> 2745</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ad63e21495f9b798250f5c68371af4f37">sha384_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02746" name="l02746"></a><span class="lineno"> 2746</span>                               <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02750" name="l02750"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7b656d085ad03ff43a6c3a4751bfbf56"> 2750</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a7b656d085ad03ff43a6c3a4751bfbf56">sha384_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02751" name="l02751"></a><span class="lineno"> 2751</span>                               <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02755" name="l02755"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a389b88f838e79306acea6c8bd157c712"> 2755</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a389b88f838e79306acea6c8bd157c712">sha384_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02756" name="l02756"></a><span class="lineno"> 2756</span>                                <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02760" name="l02760"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a908b9e33df6e434c4bb0c74fa20ceece"> 2760</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a908b9e33df6e434c4bb0c74fa20ceece">sha384_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02761" name="l02761"></a><span class="lineno"> 2761</span>                                  <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02762" name="l02762"></a><span class="lineno"> 2762</span> </div>
-<div class="line"><a id="l02769" name="l02769"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa3bf3d1bd2a5d62035c972fe38827549"> 2769</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aa3bf3d1bd2a5d62035c972fe38827549">sha384_one_block_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02773" name="l02773"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aef8af95a47ec01a8c280802a16d0f0c7"> 2773</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aef8af95a47ec01a8c280802a16d0f0c7">sha384_one_block_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02777" name="l02777"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae5cf8bca3e0f1c7c40c110b88168669e"> 2777</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ae5cf8bca3e0f1c7c40c110b88168669e">sha384_one_block_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02781" name="l02781"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a39fa05d7d02e8911e3d882f379d8661e"> 2781</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a39fa05d7d02e8911e3d882f379d8661e">sha384_one_block_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02782" name="l02782"></a><span class="lineno"> 2782</span> </div>
-<div class="line"><a id="l02790" name="l02790"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a392a99d0622122fe0e3c17611ef276a7"> 2790</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a392a99d0622122fe0e3c17611ef276a7">sha512_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02791" name="l02791"></a><span class="lineno"> 2791</span>                               <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02795" name="l02795"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a17c4f20de186e1f04580d04d6551e844"> 2795</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a17c4f20de186e1f04580d04d6551e844">sha512_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02796" name="l02796"></a><span class="lineno"> 2796</span>                               <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02800" name="l02800"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afc6b16cbe9cf1f840723aa6be3913131"> 2800</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#afc6b16cbe9cf1f840723aa6be3913131">sha512_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02801" name="l02801"></a><span class="lineno"> 2801</span>                                <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02805" name="l02805"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7fa788fbcd353c13fd1eac251f658f1c"> 2805</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a7fa788fbcd353c13fd1eac251f658f1c">sha512_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keyword">const</span> uint64_t length,</div>
-<div class="line"><a id="l02806" name="l02806"></a><span class="lineno"> 2806</span>                                  <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02807" name="l02807"></a><span class="lineno"> 2807</span> </div>
-<div class="line"><a id="l02814" name="l02814"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa5e8c4861339d101c718449cf544d5c4"> 2814</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aa5e8c4861339d101c718449cf544d5c4">sha512_one_block_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02818" name="l02818"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7d95ff83cbadc815cbe8c11b0af74b7e"> 2818</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a7d95ff83cbadc815cbe8c11b0af74b7e">sha512_one_block_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02822" name="l02822"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ada14329d2331d02241efaafc3ba26ffd"> 2822</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ada14329d2331d02241efaafc3ba26ffd">sha512_one_block_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02826" name="l02826"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5d2e35fbfc14d979d87b5b9a63bf19c9"> 2826</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a5d2e35fbfc14d979d87b5b9a63bf19c9">sha512_one_block_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02827" name="l02827"></a><span class="lineno"> 2827</span> </div>
-<div class="line"><a id="l02834" name="l02834"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9d883a3a629240fe86efedd180294433"> 2834</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a9d883a3a629240fe86efedd180294433">md5_one_block_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02838" name="l02838"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7addeb4d0c6ddcdaa031b9e7b4dd35c2"> 2838</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a7addeb4d0c6ddcdaa031b9e7b4dd35c2">md5_one_block_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02842" name="l02842"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8b912812c65f4d3b592875cdd233704d"> 2842</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a8b912812c65f4d3b592875cdd233704d">md5_one_block_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02846" name="l02846"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7f4da2fc0601ad50851e7e43f53e0cf"> 2846</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac7f4da2fc0601ad50851e7e43f53e0cf">md5_one_block_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
-<div class="line"><a id="l02847" name="l02847"></a><span class="lineno"> 2847</span> </div>
-<div class="line"><a id="l02848" name="l02848"></a><span class="lineno"> 2848</span> </div>
-<div class="line"><a id="l02856" name="l02856"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a32bcda3484b33b7d01124dbfeb9a229b"> 2856</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a32bcda3484b33b7d01124dbfeb9a229b">aes_keyexp_128_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02857" name="l02857"></a><span class="lineno"> 2857</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02861" name="l02861"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aec7fe23c32ee94de88e5feba8f373a04"> 2861</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aec7fe23c32ee94de88e5feba8f373a04">aes_keyexp_128_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02862" name="l02862"></a><span class="lineno"> 2862</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02866" name="l02866"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4fc7f88bdb263ae0d45f37af7e4cb930"> 2866</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a4fc7f88bdb263ae0d45f37af7e4cb930">aes_keyexp_128_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02867" name="l02867"></a><span class="lineno"> 2867</span>                                        <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02871" name="l02871"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9b7faaf3e5235d0a3c4b784f1035896d"> 2871</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a9b7faaf3e5235d0a3c4b784f1035896d">aes_keyexp_128_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02872" name="l02872"></a><span class="lineno"> 2872</span>                                          <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02873" name="l02873"></a><span class="lineno"> 2873</span> </div>
-<div class="line"><a id="l02881" name="l02881"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7681d777bb5f991ab59b5581bc854562"> 2881</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a7681d777bb5f991ab59b5581bc854562">aes_keyexp_192_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02882" name="l02882"></a><span class="lineno"> 2882</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02886" name="l02886"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3bc56101b48217094086ae3120b0e086"> 2886</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a3bc56101b48217094086ae3120b0e086">aes_keyexp_192_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02887" name="l02887"></a><span class="lineno"> 2887</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02891" name="l02891"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aba6dd2e633819829740cb7917ba6b1b2"> 2891</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aba6dd2e633819829740cb7917ba6b1b2">aes_keyexp_192_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02892" name="l02892"></a><span class="lineno"> 2892</span>                                        <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02896" name="l02896"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1f69c0a43de83f8fba19107a63c07831"> 2896</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a1f69c0a43de83f8fba19107a63c07831">aes_keyexp_192_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02897" name="l02897"></a><span class="lineno"> 2897</span>                                          <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02898" name="l02898"></a><span class="lineno"> 2898</span> </div>
-<div class="line"><a id="l02906" name="l02906"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5105a8d995cd8e4354c7de7ac94886cb"> 2906</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a5105a8d995cd8e4354c7de7ac94886cb">aes_keyexp_256_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02907" name="l02907"></a><span class="lineno"> 2907</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02911" name="l02911"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5b92ee3873b2e2cd02c9312b6040ee91"> 2911</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a5b92ee3873b2e2cd02c9312b6040ee91">aes_keyexp_256_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02912" name="l02912"></a><span class="lineno"> 2912</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02916" name="l02916"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af1f440855a00edbf95c124a1e1d18c37"> 2916</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#af1f440855a00edbf95c124a1e1d18c37">aes_keyexp_256_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02917" name="l02917"></a><span class="lineno"> 2917</span>                                        <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02921" name="l02921"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a37e0f61656618413fcfd919dfe79ca45"> 2921</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a37e0f61656618413fcfd919dfe79ca45">aes_keyexp_256_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
-<div class="line"><a id="l02922" name="l02922"></a><span class="lineno"> 2922</span>                                          <span class="keywordtype">void</span> *dec_exp_keys);</div>
-<div class="line"><a id="l02923" name="l02923"></a><span class="lineno"> 2923</span> </div>
-<div class="line"><a id="l02930" name="l02930"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a270621a2f73134d8d021b5dd57ad6817"> 2930</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a270621a2f73134d8d021b5dd57ad6817">aes_keyexp_128_enc_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l02931" name="l02931"></a><span class="lineno"> 2931</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
-<div class="line"><a id="l02935" name="l02935"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7d7c889a25730d82ddee27bad7f0a63"> 2935</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac7d7c889a25730d82ddee27bad7f0a63">aes_keyexp_128_enc_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l02936" name="l02936"></a><span class="lineno"> 2936</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
-<div class="line"><a id="l02940" name="l02940"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a84e76bdfb5a69dba7b515dd0b4fb4312"> 2940</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a84e76bdfb5a69dba7b515dd0b4fb4312">aes_keyexp_128_enc_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l02941" name="l02941"></a><span class="lineno"> 2941</span>                                            <span class="keywordtype">void</span> *enc_exp_keys);</div>
-<div class="line"><a id="l02945" name="l02945"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a68e6a0e99a2091d3630bf3315fe9d95c"> 2945</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a68e6a0e99a2091d3630bf3315fe9d95c">aes_keyexp_128_enc_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l02946" name="l02946"></a><span class="lineno"> 2946</span>                                              <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02587" name="l02587"></a><span class="lineno"> 2587</span><span class="comment">/* Auxiliary functions */</span></div>
+<div class="line"><a id="l02588" name="l02588"></a><span class="lineno"> 2588</span> </div>
+<div class="line"><a id="l02601" name="l02601"></a><span class="lineno"> 2601</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span></div>
+<div class="line"><a id="l02602" name="l02602"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9911462fe4689c7420b827bb13fc3440"> 2602</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a9911462fe4689c7420b827bb13fc3440">des_key_schedule</a>(uint64_t *ks, <span class="keyword">const</span> <span class="keywordtype">void</span> *key);</div>
+<div class="line"><a id="l02603" name="l02603"></a><span class="lineno"> 2603</span> </div>
+<div class="line"><a id="l02614" name="l02614"></a><span class="lineno"> 2614</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l02615" name="l02615"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab5ecb9fd270d0bfc42e46c5a3a9225fe"> 2615</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ab5ecb9fd270d0bfc42e46c5a3a9225fe">imb_hmac_ipad_opad</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *mb_mgr, <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">IMB_HASH_ALG</a> sha_type,</div>
+<div class="line"><a id="l02616" name="l02616"></a><span class="lineno"> 2616</span>                   <span class="keyword">const</span> <span class="keywordtype">void</span> *pkey, <span class="keyword">const</span> <span class="keywordtype">size_t</span> key_len,</div>
+<div class="line"><a id="l02617" name="l02617"></a><span class="lineno"> 2617</span>                   <span class="keywordtype">void</span> *ipad_hash, <span class="keywordtype">void</span> *opad_hash);</div>
+<div class="line"><a id="l02618" name="l02618"></a><span class="lineno"> 2618</span> </div>
+<div class="line"><a id="l02631" name="l02631"></a><span class="lineno"> 2631</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l02632" name="l02632"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a71a0353411f5307a2177ae9b2814f522"> 2632</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a71a0353411f5307a2177ae9b2814f522">des_cfb_one</a>(<span class="keywordtype">void</span> *out, <span class="keyword">const</span> <span class="keywordtype">void</span> *in, <span class="keyword">const</span> uint64_t *iv,</div>
+<div class="line"><a id="l02633" name="l02633"></a><span class="lineno"> 2633</span>            <span class="keyword">const</span> uint64_t *ks, <span class="keyword">const</span> <span class="keywordtype">int</span> len);</div>
+<div class="line"><a id="l02634" name="l02634"></a><span class="lineno"> 2634</span> </div>
+<div class="line"><a id="l02641" name="l02641"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9d883a3a629240fe86efedd180294433"> 2641</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a9d883a3a629240fe86efedd180294433">md5_one_block_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
+<div class="line"><a id="l02645" name="l02645"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7addeb4d0c6ddcdaa031b9e7b4dd35c2"> 2645</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a7addeb4d0c6ddcdaa031b9e7b4dd35c2">md5_one_block_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
+<div class="line"><a id="l02649" name="l02649"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8b912812c65f4d3b592875cdd233704d"> 2649</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a8b912812c65f4d3b592875cdd233704d">md5_one_block_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
+<div class="line"><a id="l02653" name="l02653"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7f4da2fc0601ad50851e7e43f53e0cf"> 2653</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac7f4da2fc0601ad50851e7e43f53e0cf">md5_one_block_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *data, <span class="keywordtype">void</span> *digest);</div>
+<div class="line"><a id="l02654" name="l02654"></a><span class="lineno"> 2654</span> </div>
+<div class="line"><a id="l02655" name="l02655"></a><span class="lineno"> 2655</span> </div>
+<div class="line"><a id="l02663" name="l02663"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a32bcda3484b33b7d01124dbfeb9a229b"> 2663</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a32bcda3484b33b7d01124dbfeb9a229b">aes_keyexp_128_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02664" name="l02664"></a><span class="lineno"> 2664</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02668" name="l02668"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aec7fe23c32ee94de88e5feba8f373a04"> 2668</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aec7fe23c32ee94de88e5feba8f373a04">aes_keyexp_128_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02669" name="l02669"></a><span class="lineno"> 2669</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02673" name="l02673"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4fc7f88bdb263ae0d45f37af7e4cb930"> 2673</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a4fc7f88bdb263ae0d45f37af7e4cb930">aes_keyexp_128_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02674" name="l02674"></a><span class="lineno"> 2674</span>                                        <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02678" name="l02678"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9b7faaf3e5235d0a3c4b784f1035896d"> 2678</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a9b7faaf3e5235d0a3c4b784f1035896d">aes_keyexp_128_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02679" name="l02679"></a><span class="lineno"> 2679</span>                                          <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02680" name="l02680"></a><span class="lineno"> 2680</span> </div>
+<div class="line"><a id="l02688" name="l02688"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7681d777bb5f991ab59b5581bc854562"> 2688</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a7681d777bb5f991ab59b5581bc854562">aes_keyexp_192_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02689" name="l02689"></a><span class="lineno"> 2689</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02693" name="l02693"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3bc56101b48217094086ae3120b0e086"> 2693</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a3bc56101b48217094086ae3120b0e086">aes_keyexp_192_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02694" name="l02694"></a><span class="lineno"> 2694</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02698" name="l02698"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aba6dd2e633819829740cb7917ba6b1b2"> 2698</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aba6dd2e633819829740cb7917ba6b1b2">aes_keyexp_192_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02699" name="l02699"></a><span class="lineno"> 2699</span>                                        <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02703" name="l02703"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1f69c0a43de83f8fba19107a63c07831"> 2703</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a1f69c0a43de83f8fba19107a63c07831">aes_keyexp_192_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02704" name="l02704"></a><span class="lineno"> 2704</span>                                          <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02705" name="l02705"></a><span class="lineno"> 2705</span> </div>
+<div class="line"><a id="l02713" name="l02713"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5105a8d995cd8e4354c7de7ac94886cb"> 2713</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a5105a8d995cd8e4354c7de7ac94886cb">aes_keyexp_256_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02714" name="l02714"></a><span class="lineno"> 2714</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02718" name="l02718"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5b92ee3873b2e2cd02c9312b6040ee91"> 2718</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a5b92ee3873b2e2cd02c9312b6040ee91">aes_keyexp_256_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02719" name="l02719"></a><span class="lineno"> 2719</span>                                       <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02723" name="l02723"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af1f440855a00edbf95c124a1e1d18c37"> 2723</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#af1f440855a00edbf95c124a1e1d18c37">aes_keyexp_256_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02724" name="l02724"></a><span class="lineno"> 2724</span>                                        <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02728" name="l02728"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a37e0f61656618413fcfd919dfe79ca45"> 2728</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a37e0f61656618413fcfd919dfe79ca45">aes_keyexp_256_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *enc_exp_keys,</div>
+<div class="line"><a id="l02729" name="l02729"></a><span class="lineno"> 2729</span>                                          <span class="keywordtype">void</span> *dec_exp_keys);</div>
+<div class="line"><a id="l02730" name="l02730"></a><span class="lineno"> 2730</span> </div>
+<div class="line"><a id="l02737" name="l02737"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a270621a2f73134d8d021b5dd57ad6817"> 2737</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a270621a2f73134d8d021b5dd57ad6817">aes_keyexp_128_enc_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02738" name="l02738"></a><span class="lineno"> 2738</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02742" name="l02742"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac7d7c889a25730d82ddee27bad7f0a63"> 2742</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac7d7c889a25730d82ddee27bad7f0a63">aes_keyexp_128_enc_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02743" name="l02743"></a><span class="lineno"> 2743</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02747" name="l02747"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a84e76bdfb5a69dba7b515dd0b4fb4312"> 2747</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a84e76bdfb5a69dba7b515dd0b4fb4312">aes_keyexp_128_enc_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02748" name="l02748"></a><span class="lineno"> 2748</span>                                            <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02752" name="l02752"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a68e6a0e99a2091d3630bf3315fe9d95c"> 2752</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a68e6a0e99a2091d3630bf3315fe9d95c">aes_keyexp_128_enc_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02753" name="l02753"></a><span class="lineno"> 2753</span>                                              <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02754" name="l02754"></a><span class="lineno"> 2754</span> </div>
+<div class="line"><a id="l02761" name="l02761"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0a843e722f2af7a645340f6a98cfa4c2"> 2761</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a0a843e722f2af7a645340f6a98cfa4c2">aes_keyexp_192_enc_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02762" name="l02762"></a><span class="lineno"> 2762</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02766" name="l02766"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5350b81ab574c990d6a5b9dc3b203c51"> 2766</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a5350b81ab574c990d6a5b9dc3b203c51">aes_keyexp_192_enc_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02767" name="l02767"></a><span class="lineno"> 2767</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02771" name="l02771"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a460853c072adc3a0f431e861d3e5bba1"> 2771</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a460853c072adc3a0f431e861d3e5bba1">aes_keyexp_192_enc_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02772" name="l02772"></a><span class="lineno"> 2772</span>                                            <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02776" name="l02776"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a72807e8300208b22b5d532e274385127"> 2776</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a72807e8300208b22b5d532e274385127">aes_keyexp_192_enc_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02777" name="l02777"></a><span class="lineno"> 2777</span>                                              <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02778" name="l02778"></a><span class="lineno"> 2778</span> </div>
+<div class="line"><a id="l02785" name="l02785"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afa369dee8def2ef620e7f33db86a3356"> 2785</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#afa369dee8def2ef620e7f33db86a3356">aes_keyexp_256_enc_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02786" name="l02786"></a><span class="lineno"> 2786</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02790" name="l02790"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a22096fdd9b5d32095571f04a838d66a9"> 2790</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a22096fdd9b5d32095571f04a838d66a9">aes_keyexp_256_enc_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02791" name="l02791"></a><span class="lineno"> 2791</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02795" name="l02795"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a73da5625112ad845a3ec94ee84590f54"> 2795</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a73da5625112ad845a3ec94ee84590f54">aes_keyexp_256_enc_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02796" name="l02796"></a><span class="lineno"> 2796</span>                                            <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02800" name="l02800"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9fb47323b270bffc87ad8e77985e827d"> 2800</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a9fb47323b270bffc87ad8e77985e827d">aes_keyexp_256_enc_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l02801" name="l02801"></a><span class="lineno"> 2801</span>                                              <span class="keywordtype">void</span> *enc_exp_keys);</div>
+<div class="line"><a id="l02802" name="l02802"></a><span class="lineno"> 2802</span> </div>
+<div class="line"><a id="l02811" name="l02811"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aefb28e46620cbf65a2af3073b2401e40"> 2811</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aefb28e46620cbf65a2af3073b2401e40">aes_xcbc_expand_key_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *k1_exp,</div>
+<div class="line"><a id="l02812" name="l02812"></a><span class="lineno"> 2812</span>                                            <span class="keywordtype">void</span> *k2, <span class="keywordtype">void</span> *k3);</div>
+<div class="line"><a id="l02816" name="l02816"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afe460e4ff6a7b0c7a6edcc87e9976121"> 2816</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#afe460e4ff6a7b0c7a6edcc87e9976121">aes_xcbc_expand_key_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *k1_exp,</div>
+<div class="line"><a id="l02817" name="l02817"></a><span class="lineno"> 2817</span>                                            <span class="keywordtype">void</span> *k2, <span class="keywordtype">void</span> *k3);</div>
+<div class="line"><a id="l02821" name="l02821"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac3f27672ce30d74f5cdc28f1903f68b1"> 2821</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac3f27672ce30d74f5cdc28f1903f68b1">aes_xcbc_expand_key_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *k1_exp,</div>
+<div class="line"><a id="l02822" name="l02822"></a><span class="lineno"> 2822</span>                                             <span class="keywordtype">void</span> *k2, <span class="keywordtype">void</span> *k3);</div>
+<div class="line"><a id="l02826" name="l02826"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a1308be648182642b8d73ff27d9344564"> 2826</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a1308be648182642b8d73ff27d9344564">aes_xcbc_expand_key_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key, <span class="keywordtype">void</span> *k1_exp,</div>
+<div class="line"><a id="l02827" name="l02827"></a><span class="lineno"> 2827</span>                                               <span class="keywordtype">void</span> *k2, <span class="keywordtype">void</span> *k3);</div>
+<div class="line"><a id="l02828" name="l02828"></a><span class="lineno"> 2828</span> </div>
+<div class="line"><a id="l02836" name="l02836"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4dafe82f4933670f68e1bf34d55a691d"> 2836</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a4dafe82f4933670f68e1bf34d55a691d">aes_cmac_subkey_gen_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key_exp, <span class="keywordtype">void</span> *key1,</div>
+<div class="line"><a id="l02837" name="l02837"></a><span class="lineno"> 2837</span>                                            <span class="keywordtype">void</span> *key2);</div>
+<div class="line"><a id="l02841" name="l02841"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6541825066a8d2b8b3c7b6e2c4b28c83"> 2841</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a6541825066a8d2b8b3c7b6e2c4b28c83">aes_cmac_subkey_gen_avx</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key_exp, <span class="keywordtype">void</span> *key1,</div>
+<div class="line"><a id="l02842" name="l02842"></a><span class="lineno"> 2842</span>                                            <span class="keywordtype">void</span> *key2);</div>
+<div class="line"><a id="l02846" name="l02846"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6903e1e0dfb8fd75c2f556596f3efa1b"> 2846</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a6903e1e0dfb8fd75c2f556596f3efa1b">aes_cmac_subkey_gen_avx2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key_exp, <span class="keywordtype">void</span> *key1,</div>
+<div class="line"><a id="l02847" name="l02847"></a><span class="lineno"> 2847</span>                                             <span class="keywordtype">void</span> *key2);</div>
+<div class="line"><a id="l02851" name="l02851"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a730f18bd7cdcbbb995e24931307867fc"> 2851</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a730f18bd7cdcbbb995e24931307867fc">aes_cmac_subkey_gen_avx512</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key_exp, <span class="keywordtype">void</span> *key1,</div>
+<div class="line"><a id="l02852" name="l02852"></a><span class="lineno"> 2852</span>                                               <span class="keywordtype">void</span> *key2);</div>
+<div class="line"><a id="l02853" name="l02853"></a><span class="lineno"> 2853</span> </div>
+<div class="line"><a id="l02854" name="l02854"></a><span class="lineno"> 2854</span><span class="comment">/*</span></div>
+<div class="line"><a id="l02855" name="l02855"></a><span class="lineno"> 2855</span><span class="comment"> * Direct GCM API.</span></div>
+<div class="line"><a id="l02856" name="l02856"></a><span class="lineno"> 2856</span><span class="comment"> * Note that GCM is also available through job API.</span></div>
+<div class="line"><a id="l02857" name="l02857"></a><span class="lineno"> 2857</span><span class="comment"> */</span></div>
+<div class="line"><a id="l02858" name="l02858"></a><span class="lineno"> 2858</span> </div>
+<div class="line"><a id="l02877" name="l02877"></a><span class="lineno"> 2877</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l02878" name="l02878"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aad9e6c466a5274b974d20330f91add50"> 2878</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#aad9e6c466a5274b974d20330f91add50">aes_gcm_enc_128_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l02879" name="l02879"></a><span class="lineno"> 2879</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l02880" name="l02880"></a><span class="lineno"> 2880</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l02881" name="l02881"></a><span class="lineno"> 2881</span>                    <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l02882" name="l02882"></a><span class="lineno"> 2882</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l02886" name="l02886"></a><span class="lineno"> 2886</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l02887" name="l02887"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af33d7afa861dcedc2c284330a5a66164"> 2887</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#af33d7afa861dcedc2c284330a5a66164">aes_gcm_enc_128_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l02888" name="l02888"></a><span class="lineno"> 2888</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l02889" name="l02889"></a><span class="lineno"> 2889</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l02890" name="l02890"></a><span class="lineno"> 2890</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l02891" name="l02891"></a><span class="lineno"> 2891</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l02892" name="l02892"></a><span class="lineno"> 2892</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l02896" name="l02896"></a><span class="lineno"> 2896</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l02897" name="l02897"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa17c919e873b6cfd7ac990977eef7601"> 2897</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#aa17c919e873b6cfd7ac990977eef7601">aes_gcm_enc_128_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l02898" name="l02898"></a><span class="lineno"> 2898</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l02899" name="l02899"></a><span class="lineno"> 2899</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l02900" name="l02900"></a><span class="lineno"> 2900</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l02901" name="l02901"></a><span class="lineno"> 2901</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l02902" name="l02902"></a><span class="lineno"> 2902</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l02921" name="l02921"></a><span class="lineno"> 2921</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l02922" name="l02922"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adec2f9778622b3e226f12bb326e75076"> 2922</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#adec2f9778622b3e226f12bb326e75076">aes_gcm_enc_192_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l02923" name="l02923"></a><span class="lineno"> 2923</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l02924" name="l02924"></a><span class="lineno"> 2924</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l02925" name="l02925"></a><span class="lineno"> 2925</span>                    <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l02926" name="l02926"></a><span class="lineno"> 2926</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l02930" name="l02930"></a><span class="lineno"> 2930</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
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+<div class="line"><a id="l02932" name="l02932"></a><span class="lineno"> 2932</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l02933" name="l02933"></a><span class="lineno"> 2933</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l02934" name="l02934"></a><span class="lineno"> 2934</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l02935" name="l02935"></a><span class="lineno"> 2935</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l02936" name="l02936"></a><span class="lineno"> 2936</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l02940" name="l02940"></a><span class="lineno"> 2940</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l02941" name="l02941"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9b462a3c00471e4338f0bae7d5abbda7"> 2941</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a9b462a3c00471e4338f0bae7d5abbda7">aes_gcm_enc_192_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l02942" name="l02942"></a><span class="lineno"> 2942</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l02943" name="l02943"></a><span class="lineno"> 2943</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l02944" name="l02944"></a><span class="lineno"> 2944</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l02945" name="l02945"></a><span class="lineno"> 2945</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l02946" name="l02946"></a><span class="lineno"> 2946</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
 <div class="line"><a id="l02947" name="l02947"></a><span class="lineno"> 2947</span> </div>
-<div class="line"><a id="l02954" name="l02954"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0a843e722f2af7a645340f6a98cfa4c2"> 2954</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a0a843e722f2af7a645340f6a98cfa4c2">aes_keyexp_192_enc_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l02955" name="l02955"></a><span class="lineno"> 2955</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
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-<div class="line"><a id="l02960" name="l02960"></a><span class="lineno"> 2960</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
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-<div class="line"><a id="l02965" name="l02965"></a><span class="lineno"> 2965</span>                                            <span class="keywordtype">void</span> *enc_exp_keys);</div>
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-<div class="line"><a id="l02970" name="l02970"></a><span class="lineno"> 2970</span>                                              <span class="keywordtype">void</span> *enc_exp_keys);</div>
-<div class="line"><a id="l02971" name="l02971"></a><span class="lineno"> 2971</span> </div>
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-<div class="line"><a id="l02979" name="l02979"></a><span class="lineno"> 2979</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
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-<div class="line"><a id="l02984" name="l02984"></a><span class="lineno"> 2984</span>                                           <span class="keywordtype">void</span> *enc_exp_keys);</div>
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-<div class="line"><a id="l02989" name="l02989"></a><span class="lineno"> 2989</span>                                            <span class="keywordtype">void</span> *enc_exp_keys);</div>
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-<div class="line"><a id="l02994" name="l02994"></a><span class="lineno"> 2994</span>                                              <span class="keywordtype">void</span> *enc_exp_keys);</div>
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-<div class="line"><a id="l03010" name="l03010"></a><span class="lineno"> 3010</span>                                            <span class="keywordtype">void</span> *k2, <span class="keywordtype">void</span> *k3);</div>
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-<div class="line"><a id="l03020" name="l03020"></a><span class="lineno"> 3020</span>                                               <span class="keywordtype">void</span> *k2, <span class="keywordtype">void</span> *k3);</div>
-<div class="line"><a id="l03021" name="l03021"></a><span class="lineno"> 3021</span> </div>
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-<div class="line"><a id="l03030" name="l03030"></a><span class="lineno"> 3030</span>                                            <span class="keywordtype">void</span> *key2);</div>
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-<div class="line"><a id="l03035" name="l03035"></a><span class="lineno"> 3035</span>                                            <span class="keywordtype">void</span> *key2);</div>
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-<div class="line"><a id="l03040" name="l03040"></a><span class="lineno"> 3040</span>                                             <span class="keywordtype">void</span> *key2);</div>
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-<div class="line"><a id="l03045" name="l03045"></a><span class="lineno"> 3045</span>                                               <span class="keywordtype">void</span> *key2);</div>
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-<div class="line"><a id="l03059" name="l03059"></a><span class="lineno"> 3059</span>                                        <span class="keyword">const</span> <span class="keywordtype">void</span> *iv, <span class="keyword">const</span> <span class="keywordtype">void</span> *keys,</div>
-<div class="line"><a id="l03060" name="l03060"></a><span class="lineno"> 3060</span>                                        uint64_t len);</div>
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-<div class="line"><a id="l03065" name="l03065"></a><span class="lineno"> 3065</span>                                        <span class="keyword">const</span> <span class="keywordtype">void</span> *iv, <span class="keyword">const</span> <span class="keywordtype">void</span> *keys,</div>
-<div class="line"><a id="l03066" name="l03066"></a><span class="lineno"> 3066</span>                                        uint64_t len);</div>
-<div class="line"><a id="l03070" name="l03070"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7046666312bdba42b05bfbf63d0e1c6a"> 3070</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a7046666312bdba42b05bfbf63d0e1c6a">aes_cfb_128_one_avx2</a>(<span class="keywordtype">void</span> *out, <span class="keyword">const</span> <span class="keywordtype">void</span> *in,</div>
-<div class="line"><a id="l03071" name="l03071"></a><span class="lineno"> 3071</span>                                         <span class="keyword">const</span> <span class="keywordtype">void</span> *iv, <span class="keyword">const</span> <span class="keywordtype">void</span> *keys,</div>
-<div class="line"><a id="l03072" name="l03072"></a><span class="lineno"> 3072</span>                                         uint64_t len);</div>
-<div class="line"><a id="l03076" name="l03076"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abb7c6395420af2addd92a3fa46e0fd28"> 3076</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#abb7c6395420af2addd92a3fa46e0fd28">aes_cfb_128_one_avx512</a>(<span class="keywordtype">void</span> *out, <span class="keyword">const</span> <span class="keywordtype">void</span> *in,</div>
-<div class="line"><a id="l03077" name="l03077"></a><span class="lineno"> 3077</span>                                           <span class="keyword">const</span> <span class="keywordtype">void</span> *iv, <span class="keyword">const</span> <span class="keywordtype">void</span> *keys,</div>
-<div class="line"><a id="l03078" name="l03078"></a><span class="lineno"> 3078</span>                                           uint64_t len);</div>
-<div class="line"><a id="l03079" name="l03079"></a><span class="lineno"> 3079</span> </div>
-<div class="line"><a id="l03080" name="l03080"></a><span class="lineno"> 3080</span><span class="comment">/*</span></div>
-<div class="line"><a id="l03081" name="l03081"></a><span class="lineno"> 3081</span><span class="comment"> * Direct GCM API.</span></div>
-<div class="line"><a id="l03082" name="l03082"></a><span class="lineno"> 3082</span><span class="comment"> * Note that GCM is also available through job API.</span></div>
-<div class="line"><a id="l03083" name="l03083"></a><span class="lineno"> 3083</span><span class="comment"> */</span></div>
-<div class="line"><a id="l03084" name="l03084"></a><span class="lineno"> 3084</span> </div>
-<div class="line"><a id="l03103" name="l03103"></a><span class="lineno"> 3103</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03104" name="l03104"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aad9e6c466a5274b974d20330f91add50"> 3104</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#aad9e6c466a5274b974d20330f91add50">aes_gcm_enc_128_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03105" name="l03105"></a><span class="lineno"> 3105</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03106" name="l03106"></a><span class="lineno"> 3106</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03107" name="l03107"></a><span class="lineno"> 3107</span>                    <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03108" name="l03108"></a><span class="lineno"> 3108</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03112" name="l03112"></a><span class="lineno"> 3112</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03113" name="l03113"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af33d7afa861dcedc2c284330a5a66164"> 3113</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#af33d7afa861dcedc2c284330a5a66164">aes_gcm_enc_128_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03114" name="l03114"></a><span class="lineno"> 3114</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03115" name="l03115"></a><span class="lineno"> 3115</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03116" name="l03116"></a><span class="lineno"> 3116</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03117" name="l03117"></a><span class="lineno"> 3117</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03118" name="l03118"></a><span class="lineno"> 3118</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03122" name="l03122"></a><span class="lineno"> 3122</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03123" name="l03123"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa17c919e873b6cfd7ac990977eef7601"> 3123</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#aa17c919e873b6cfd7ac990977eef7601">aes_gcm_enc_128_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03124" name="l03124"></a><span class="lineno"> 3124</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03125" name="l03125"></a><span class="lineno"> 3125</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03126" name="l03126"></a><span class="lineno"> 3126</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03127" name="l03127"></a><span class="lineno"> 3127</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03128" name="l03128"></a><span class="lineno"> 3128</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03147" name="l03147"></a><span class="lineno"> 3147</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03148" name="l03148"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adec2f9778622b3e226f12bb326e75076"> 3148</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#adec2f9778622b3e226f12bb326e75076">aes_gcm_enc_192_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03149" name="l03149"></a><span class="lineno"> 3149</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03150" name="l03150"></a><span class="lineno"> 3150</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03151" name="l03151"></a><span class="lineno"> 3151</span>                    <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03152" name="l03152"></a><span class="lineno"> 3152</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l02966" name="l02966"></a><span class="lineno"> 2966</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l02967" name="l02967"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a460ad1ebcb7df39e39c9aca214d8109c"> 2967</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a460ad1ebcb7df39e39c9aca214d8109c">aes_gcm_enc_256_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l02968" name="l02968"></a><span class="lineno"> 2968</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l02969" name="l02969"></a><span class="lineno"> 2969</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l02970" name="l02970"></a><span class="lineno"> 2970</span>                    <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l02971" name="l02971"></a><span class="lineno"> 2971</span>                    uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l02972" name="l02972"></a><span class="lineno"> 2972</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l02976" name="l02976"></a><span class="lineno"> 2976</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l02977" name="l02977"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a45dea093699e6e2dd462b6cafccee672"> 2977</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a45dea093699e6e2dd462b6cafccee672">aes_gcm_enc_256_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l02978" name="l02978"></a><span class="lineno"> 2978</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l02979" name="l02979"></a><span class="lineno"> 2979</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l02980" name="l02980"></a><span class="lineno"> 2980</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l02981" name="l02981"></a><span class="lineno"> 2981</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l02982" name="l02982"></a><span class="lineno"> 2982</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l02986" name="l02986"></a><span class="lineno"> 2986</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l02987" name="l02987"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a52c0913f10dd41fea5fe328037561ff8"> 2987</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a52c0913f10dd41fea5fe328037561ff8">aes_gcm_enc_256_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l02988" name="l02988"></a><span class="lineno"> 2988</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l02989" name="l02989"></a><span class="lineno"> 2989</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l02990" name="l02990"></a><span class="lineno"> 2990</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l02991" name="l02991"></a><span class="lineno"> 2991</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l02992" name="l02992"></a><span class="lineno"> 2992</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l02993" name="l02993"></a><span class="lineno"> 2993</span> </div>
+<div class="line"><a id="l03012" name="l03012"></a><span class="lineno"> 3012</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03013" name="l03013"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#add2f5aafaf55cd0e0b20b2b62fcb025d"> 3013</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#add2f5aafaf55cd0e0b20b2b62fcb025d">aes_gcm_dec_128_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03014" name="l03014"></a><span class="lineno"> 3014</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03015" name="l03015"></a><span class="lineno"> 3015</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l03016" name="l03016"></a><span class="lineno"> 3016</span>                    <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l03017" name="l03017"></a><span class="lineno"> 3017</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03021" name="l03021"></a><span class="lineno"> 3021</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03022" name="l03022"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8c9a7e51599dbce89a416e0d8422742b"> 3022</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a8c9a7e51599dbce89a416e0d8422742b">aes_gcm_dec_128_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03023" name="l03023"></a><span class="lineno"> 3023</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03024" name="l03024"></a><span class="lineno"> 3024</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l03025" name="l03025"></a><span class="lineno"> 3025</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03026" name="l03026"></a><span class="lineno"> 3026</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l03027" name="l03027"></a><span class="lineno"> 3027</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03031" name="l03031"></a><span class="lineno"> 3031</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03032" name="l03032"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae1e8e1b4425af520048a9e1fe5689e4d"> 3032</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ae1e8e1b4425af520048a9e1fe5689e4d">aes_gcm_dec_128_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03033" name="l03033"></a><span class="lineno"> 3033</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03034" name="l03034"></a><span class="lineno"> 3034</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l03035" name="l03035"></a><span class="lineno"> 3035</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03036" name="l03036"></a><span class="lineno"> 3036</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l03037" name="l03037"></a><span class="lineno"> 3037</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03038" name="l03038"></a><span class="lineno"> 3038</span> </div>
+<div class="line"><a id="l03057" name="l03057"></a><span class="lineno"> 3057</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03058" name="l03058"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#acaff83c8ca568201805e0ada5a79f6e1"> 3058</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#acaff83c8ca568201805e0ada5a79f6e1">aes_gcm_dec_192_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03059" name="l03059"></a><span class="lineno"> 3059</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03060" name="l03060"></a><span class="lineno"> 3060</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l03061" name="l03061"></a><span class="lineno"> 3061</span>                    <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l03062" name="l03062"></a><span class="lineno"> 3062</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03066" name="l03066"></a><span class="lineno"> 3066</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03067" name="l03067"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad45e83e263506684c786b4e7012055ac"> 3067</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ad45e83e263506684c786b4e7012055ac">aes_gcm_dec_192_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03068" name="l03068"></a><span class="lineno"> 3068</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03069" name="l03069"></a><span class="lineno"> 3069</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l03070" name="l03070"></a><span class="lineno"> 3070</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03071" name="l03071"></a><span class="lineno"> 3071</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l03072" name="l03072"></a><span class="lineno"> 3072</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03076" name="l03076"></a><span class="lineno"> 3076</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03077" name="l03077"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5ccd87fbcfffc238fbcd1fc816eb06ee"> 3077</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a5ccd87fbcfffc238fbcd1fc816eb06ee">aes_gcm_dec_192_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03078" name="l03078"></a><span class="lineno"> 3078</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03079" name="l03079"></a><span class="lineno"> 3079</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l03080" name="l03080"></a><span class="lineno"> 3080</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03081" name="l03081"></a><span class="lineno"> 3081</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l03082" name="l03082"></a><span class="lineno"> 3082</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03083" name="l03083"></a><span class="lineno"> 3083</span> </div>
+<div class="line"><a id="l03102" name="l03102"></a><span class="lineno"> 3102</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03103" name="l03103"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd8763c66749e9bc5e4e5eb2ac130e43"> 3103</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#afd8763c66749e9bc5e4e5eb2ac130e43">aes_gcm_dec_256_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03104" name="l03104"></a><span class="lineno"> 3104</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03105" name="l03105"></a><span class="lineno"> 3105</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l03106" name="l03106"></a><span class="lineno"> 3106</span>                    <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l03107" name="l03107"></a><span class="lineno"> 3107</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03111" name="l03111"></a><span class="lineno"> 3111</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03112" name="l03112"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9b79136dc5996baf598e3aeee520871c"> 3112</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a9b79136dc5996baf598e3aeee520871c">aes_gcm_dec_256_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03113" name="l03113"></a><span class="lineno"> 3113</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03114" name="l03114"></a><span class="lineno"> 3114</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l03115" name="l03115"></a><span class="lineno"> 3115</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03116" name="l03116"></a><span class="lineno"> 3116</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l03117" name="l03117"></a><span class="lineno"> 3117</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03121" name="l03121"></a><span class="lineno"> 3121</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03122" name="l03122"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac16384799933d4f7b11cb56d9c66f5da"> 3122</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ac16384799933d4f7b11cb56d9c66f5da">aes_gcm_dec_256_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03123" name="l03123"></a><span class="lineno"> 3123</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03124" name="l03124"></a><span class="lineno"> 3124</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
+<div class="line"><a id="l03125" name="l03125"></a><span class="lineno"> 3125</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03126" name="l03126"></a><span class="lineno"> 3126</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
+<div class="line"><a id="l03127" name="l03127"></a><span class="lineno"> 3127</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03128" name="l03128"></a><span class="lineno"> 3128</span> </div>
+<div class="line"><a id="l03141" name="l03141"></a><span class="lineno"> 3141</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03142" name="l03142"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aca7ab49c370f8f7cb82f93db199bfd1c"> 3142</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#aca7ab49c370f8f7cb82f93db199bfd1c">aes_gcm_init_128_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03143" name="l03143"></a><span class="lineno"> 3143</span>                     <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03144" name="l03144"></a><span class="lineno"> 3144</span>                     <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
+<div class="line"><a id="l03148" name="l03148"></a><span class="lineno"> 3148</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03149" name="l03149"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7a9a24d480dcedac1aa40d53e01b8a76"> 3149</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a7a9a24d480dcedac1aa40d53e01b8a76">aes_gcm_init_128_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03150" name="l03150"></a><span class="lineno"> 3150</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03151" name="l03151"></a><span class="lineno"> 3151</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03152" name="l03152"></a><span class="lineno"> 3152</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
 <div class="line"><a id="l03156" name="l03156"></a><span class="lineno"> 3156</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03157" name="l03157"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0ff9569b5072896a4119a4c7d3849bfc"> 3157</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a0ff9569b5072896a4119a4c7d3849bfc">aes_gcm_enc_192_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03158" name="l03158"></a><span class="lineno"> 3158</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03159" name="l03159"></a><span class="lineno"> 3159</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03160" name="l03160"></a><span class="lineno"> 3160</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03161" name="l03161"></a><span class="lineno"> 3161</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03162" name="l03162"></a><span class="lineno"> 3162</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03166" name="l03166"></a><span class="lineno"> 3166</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03167" name="l03167"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9b462a3c00471e4338f0bae7d5abbda7"> 3167</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a9b462a3c00471e4338f0bae7d5abbda7">aes_gcm_enc_192_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03168" name="l03168"></a><span class="lineno"> 3168</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03169" name="l03169"></a><span class="lineno"> 3169</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03170" name="l03170"></a><span class="lineno"> 3170</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03171" name="l03171"></a><span class="lineno"> 3171</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03172" name="l03172"></a><span class="lineno"> 3172</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03173" name="l03173"></a><span class="lineno"> 3173</span> </div>
-<div class="line"><a id="l03192" name="l03192"></a><span class="lineno"> 3192</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03193" name="l03193"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a460ad1ebcb7df39e39c9aca214d8109c"> 3193</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a460ad1ebcb7df39e39c9aca214d8109c">aes_gcm_enc_256_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03194" name="l03194"></a><span class="lineno"> 3194</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03195" name="l03195"></a><span class="lineno"> 3195</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03196" name="l03196"></a><span class="lineno"> 3196</span>                    <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03197" name="l03197"></a><span class="lineno"> 3197</span>                    uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03198" name="l03198"></a><span class="lineno"> 3198</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03202" name="l03202"></a><span class="lineno"> 3202</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03203" name="l03203"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a45dea093699e6e2dd462b6cafccee672"> 3203</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a45dea093699e6e2dd462b6cafccee672">aes_gcm_enc_256_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03204" name="l03204"></a><span class="lineno"> 3204</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03205" name="l03205"></a><span class="lineno"> 3205</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03206" name="l03206"></a><span class="lineno"> 3206</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03207" name="l03207"></a><span class="lineno"> 3207</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03208" name="l03208"></a><span class="lineno"> 3208</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03157" name="l03157"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8d225d08a5cf144208dacb155e192cb6"> 3157</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a8d225d08a5cf144208dacb155e192cb6">aes_gcm_init_128_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03158" name="l03158"></a><span class="lineno"> 3158</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03159" name="l03159"></a><span class="lineno"> 3159</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03160" name="l03160"></a><span class="lineno"> 3160</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
+<div class="line"><a id="l03173" name="l03173"></a><span class="lineno"> 3173</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03174" name="l03174"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5bbf84135701f572ec2ecb0c0898848b"> 3174</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a5bbf84135701f572ec2ecb0c0898848b">aes_gcm_init_192_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03175" name="l03175"></a><span class="lineno"> 3175</span>                     <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03176" name="l03176"></a><span class="lineno"> 3176</span>                     <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
+<div class="line"><a id="l03180" name="l03180"></a><span class="lineno"> 3180</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03181" name="l03181"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac24548c2955399fd84b03216ad5b36fb"> 3181</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ac24548c2955399fd84b03216ad5b36fb">aes_gcm_init_192_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03182" name="l03182"></a><span class="lineno"> 3182</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03183" name="l03183"></a><span class="lineno"> 3183</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03184" name="l03184"></a><span class="lineno"> 3184</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
+<div class="line"><a id="l03188" name="l03188"></a><span class="lineno"> 3188</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03189" name="l03189"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a757cd199a2e993c6610bbcdfc1da1ae4"> 3189</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a757cd199a2e993c6610bbcdfc1da1ae4">aes_gcm_init_192_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03190" name="l03190"></a><span class="lineno"> 3190</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03191" name="l03191"></a><span class="lineno"> 3191</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03192" name="l03192"></a><span class="lineno"> 3192</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
+<div class="line"><a id="l03205" name="l03205"></a><span class="lineno"> 3205</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03206" name="l03206"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a09949bd5112eec14773dce239ca39033"> 3206</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a09949bd5112eec14773dce239ca39033">aes_gcm_init_256_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03207" name="l03207"></a><span class="lineno"> 3207</span>                     <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03208" name="l03208"></a><span class="lineno"> 3208</span>                     <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
 <div class="line"><a id="l03212" name="l03212"></a><span class="lineno"> 3212</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03213" name="l03213"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a52c0913f10dd41fea5fe328037561ff8"> 3213</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a52c0913f10dd41fea5fe328037561ff8">aes_gcm_enc_256_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03214" name="l03214"></a><span class="lineno"> 3214</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03215" name="l03215"></a><span class="lineno"> 3215</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03216" name="l03216"></a><span class="lineno"> 3216</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03217" name="l03217"></a><span class="lineno"> 3217</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03218" name="l03218"></a><span class="lineno"> 3218</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03219" name="l03219"></a><span class="lineno"> 3219</span> </div>
-<div class="line"><a id="l03238" name="l03238"></a><span class="lineno"> 3238</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03239" name="l03239"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#add2f5aafaf55cd0e0b20b2b62fcb025d"> 3239</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#add2f5aafaf55cd0e0b20b2b62fcb025d">aes_gcm_dec_128_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03240" name="l03240"></a><span class="lineno"> 3240</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03241" name="l03241"></a><span class="lineno"> 3241</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03242" name="l03242"></a><span class="lineno"> 3242</span>                    <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03243" name="l03243"></a><span class="lineno"> 3243</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03247" name="l03247"></a><span class="lineno"> 3247</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03248" name="l03248"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8c9a7e51599dbce89a416e0d8422742b"> 3248</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a8c9a7e51599dbce89a416e0d8422742b">aes_gcm_dec_128_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03249" name="l03249"></a><span class="lineno"> 3249</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03250" name="l03250"></a><span class="lineno"> 3250</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03251" name="l03251"></a><span class="lineno"> 3251</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03252" name="l03252"></a><span class="lineno"> 3252</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03253" name="l03253"></a><span class="lineno"> 3253</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03257" name="l03257"></a><span class="lineno"> 3257</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03258" name="l03258"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae1e8e1b4425af520048a9e1fe5689e4d"> 3258</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ae1e8e1b4425af520048a9e1fe5689e4d">aes_gcm_dec_128_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03259" name="l03259"></a><span class="lineno"> 3259</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03260" name="l03260"></a><span class="lineno"> 3260</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03261" name="l03261"></a><span class="lineno"> 3261</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03262" name="l03262"></a><span class="lineno"> 3262</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03263" name="l03263"></a><span class="lineno"> 3263</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03264" name="l03264"></a><span class="lineno"> 3264</span> </div>
-<div class="line"><a id="l03283" name="l03283"></a><span class="lineno"> 3283</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03284" name="l03284"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#acaff83c8ca568201805e0ada5a79f6e1"> 3284</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#acaff83c8ca568201805e0ada5a79f6e1">aes_gcm_dec_192_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03285" name="l03285"></a><span class="lineno"> 3285</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03286" name="l03286"></a><span class="lineno"> 3286</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03287" name="l03287"></a><span class="lineno"> 3287</span>                    <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03288" name="l03288"></a><span class="lineno"> 3288</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03292" name="l03292"></a><span class="lineno"> 3292</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03293" name="l03293"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad45e83e263506684c786b4e7012055ac"> 3293</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ad45e83e263506684c786b4e7012055ac">aes_gcm_dec_192_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03294" name="l03294"></a><span class="lineno"> 3294</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03295" name="l03295"></a><span class="lineno"> 3295</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03296" name="l03296"></a><span class="lineno"> 3296</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03297" name="l03297"></a><span class="lineno"> 3297</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03298" name="l03298"></a><span class="lineno"> 3298</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03302" name="l03302"></a><span class="lineno"> 3302</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03303" name="l03303"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5ccd87fbcfffc238fbcd1fc816eb06ee"> 3303</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a5ccd87fbcfffc238fbcd1fc816eb06ee">aes_gcm_dec_192_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03304" name="l03304"></a><span class="lineno"> 3304</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03305" name="l03305"></a><span class="lineno"> 3305</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03306" name="l03306"></a><span class="lineno"> 3306</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03307" name="l03307"></a><span class="lineno"> 3307</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03308" name="l03308"></a><span class="lineno"> 3308</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
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+<div class="line"><a id="l03214" name="l03214"></a><span class="lineno"> 3214</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03215" name="l03215"></a><span class="lineno"> 3215</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03216" name="l03216"></a><span class="lineno"> 3216</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
+<div class="line"><a id="l03220" name="l03220"></a><span class="lineno"> 3220</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03221" name="l03221"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a99310b73bc9cde6b69b682e72cd0efc1"> 3221</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a99310b73bc9cde6b69b682e72cd0efc1">aes_gcm_init_256_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03222" name="l03222"></a><span class="lineno"> 3222</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03223" name="l03223"></a><span class="lineno"> 3223</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
+<div class="line"><a id="l03224" name="l03224"></a><span class="lineno"> 3224</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
+<div class="line"><a id="l03225" name="l03225"></a><span class="lineno"> 3225</span> </div>
+<div class="line"><a id="l03235" name="l03235"></a><span class="lineno"> 3235</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03236" name="l03236"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7b12cabbfebb420022a19124aff78a3f"> 3236</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a7b12cabbfebb420022a19124aff78a3f">aes_gcm_enc_128_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03237" name="l03237"></a><span class="lineno"> 3237</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03238" name="l03238"></a><span class="lineno"> 3238</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03242" name="l03242"></a><span class="lineno"> 3242</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03243" name="l03243"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae3459d38a2ee2e1ce04b9f9f4bf55ea5"> 3243</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ae3459d38a2ee2e1ce04b9f9f4bf55ea5">aes_gcm_enc_128_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03244" name="l03244"></a><span class="lineno"> 3244</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03245" name="l03245"></a><span class="lineno"> 3245</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03249" name="l03249"></a><span class="lineno"> 3249</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03250" name="l03250"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abb5570a161a90391e25b2016bc98381b"> 3250</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#abb5570a161a90391e25b2016bc98381b">aes_gcm_enc_128_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03251" name="l03251"></a><span class="lineno"> 3251</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03252" name="l03252"></a><span class="lineno"> 3252</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03253" name="l03253"></a><span class="lineno"> 3253</span> </div>
+<div class="line"><a id="l03263" name="l03263"></a><span class="lineno"> 3263</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03264" name="l03264"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a46c3df131f9e1e3ed1a283349c4072f7"> 3264</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a46c3df131f9e1e3ed1a283349c4072f7">aes_gcm_enc_192_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03265" name="l03265"></a><span class="lineno"> 3265</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03266" name="l03266"></a><span class="lineno"> 3266</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03270" name="l03270"></a><span class="lineno"> 3270</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03271" name="l03271"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a548fcbb89ff5fb798bf71ab8e4ac88eb"> 3271</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a548fcbb89ff5fb798bf71ab8e4ac88eb">aes_gcm_enc_192_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03272" name="l03272"></a><span class="lineno"> 3272</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03273" name="l03273"></a><span class="lineno"> 3273</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03277" name="l03277"></a><span class="lineno"> 3277</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03278" name="l03278"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a174447b05661285b2729805f66bcef81"> 3278</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a174447b05661285b2729805f66bcef81">aes_gcm_enc_192_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03279" name="l03279"></a><span class="lineno"> 3279</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03280" name="l03280"></a><span class="lineno"> 3280</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03281" name="l03281"></a><span class="lineno"> 3281</span> </div>
+<div class="line"><a id="l03291" name="l03291"></a><span class="lineno"> 3291</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03292" name="l03292"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab831bdb2193a5adc54b51285f23ad5ce"> 3292</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ab831bdb2193a5adc54b51285f23ad5ce">aes_gcm_enc_256_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03293" name="l03293"></a><span class="lineno"> 3293</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03294" name="l03294"></a><span class="lineno"> 3294</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03298" name="l03298"></a><span class="lineno"> 3298</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03299" name="l03299"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a351c2bf07dcab7e01570273c9df1e56f"> 3299</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a351c2bf07dcab7e01570273c9df1e56f">aes_gcm_enc_256_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03300" name="l03300"></a><span class="lineno"> 3300</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03301" name="l03301"></a><span class="lineno"> 3301</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03305" name="l03305"></a><span class="lineno"> 3305</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03306" name="l03306"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad9592051cf26814ea5830826b553c547"> 3306</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ad9592051cf26814ea5830826b553c547">aes_gcm_enc_256_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03307" name="l03307"></a><span class="lineno"> 3307</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03308" name="l03308"></a><span class="lineno"> 3308</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
 <div class="line"><a id="l03309" name="l03309"></a><span class="lineno"> 3309</span> </div>
-<div class="line"><a id="l03328" name="l03328"></a><span class="lineno"> 3328</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03329" name="l03329"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afd8763c66749e9bc5e4e5eb2ac130e43"> 3329</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#afd8763c66749e9bc5e4e5eb2ac130e43">aes_gcm_dec_256_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03330" name="l03330"></a><span class="lineno"> 3330</span>                    <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03331" name="l03331"></a><span class="lineno"> 3331</span>                    uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03332" name="l03332"></a><span class="lineno"> 3332</span>                    <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03333" name="l03333"></a><span class="lineno"> 3333</span>                    uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03337" name="l03337"></a><span class="lineno"> 3337</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03338" name="l03338"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a9b79136dc5996baf598e3aeee520871c"> 3338</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a9b79136dc5996baf598e3aeee520871c">aes_gcm_dec_256_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03339" name="l03339"></a><span class="lineno"> 3339</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03340" name="l03340"></a><span class="lineno"> 3340</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03341" name="l03341"></a><span class="lineno"> 3341</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03342" name="l03342"></a><span class="lineno"> 3342</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03343" name="l03343"></a><span class="lineno"> 3343</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03319" name="l03319"></a><span class="lineno"> 3319</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03320" name="l03320"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2216e461e916668b70d547513b0cf26f"> 3320</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a2216e461e916668b70d547513b0cf26f">aes_gcm_dec_128_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03321" name="l03321"></a><span class="lineno"> 3321</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03322" name="l03322"></a><span class="lineno"> 3322</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03326" name="l03326"></a><span class="lineno"> 3326</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03327" name="l03327"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a796e1df6d2aa233a6e28a867c1a2c628"> 3327</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a796e1df6d2aa233a6e28a867c1a2c628">aes_gcm_dec_128_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03328" name="l03328"></a><span class="lineno"> 3328</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03329" name="l03329"></a><span class="lineno"> 3329</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03333" name="l03333"></a><span class="lineno"> 3333</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03334" name="l03334"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4464684ff4cf4e9cb978409ad350c4d6"> 3334</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a4464684ff4cf4e9cb978409ad350c4d6">aes_gcm_dec_128_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03335" name="l03335"></a><span class="lineno"> 3335</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03336" name="l03336"></a><span class="lineno"> 3336</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03337" name="l03337"></a><span class="lineno"> 3337</span> </div>
 <div class="line"><a id="l03347" name="l03347"></a><span class="lineno"> 3347</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03348" name="l03348"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac16384799933d4f7b11cb56d9c66f5da"> 3348</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ac16384799933d4f7b11cb56d9c66f5da">aes_gcm_dec_256_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03349" name="l03349"></a><span class="lineno"> 3349</span>                         <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03350" name="l03350"></a><span class="lineno"> 3350</span>                         uint8_t *out, uint8_t <span class="keyword">const</span> *in, uint64_t len,</div>
-<div class="line"><a id="l03351" name="l03351"></a><span class="lineno"> 3351</span>                         <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03352" name="l03352"></a><span class="lineno"> 3352</span>                         uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len,</div>
-<div class="line"><a id="l03353" name="l03353"></a><span class="lineno"> 3353</span>                         uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03354" name="l03354"></a><span class="lineno"> 3354</span> </div>
-<div class="line"><a id="l03367" name="l03367"></a><span class="lineno"> 3367</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03368" name="l03368"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aca7ab49c370f8f7cb82f93db199bfd1c"> 3368</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#aca7ab49c370f8f7cb82f93db199bfd1c">aes_gcm_init_128_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03369" name="l03369"></a><span class="lineno"> 3369</span>                     <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03370" name="l03370"></a><span class="lineno"> 3370</span>                     <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
-<div class="line"><a id="l03374" name="l03374"></a><span class="lineno"> 3374</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03375" name="l03375"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7a9a24d480dcedac1aa40d53e01b8a76"> 3375</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a7a9a24d480dcedac1aa40d53e01b8a76">aes_gcm_init_128_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03376" name="l03376"></a><span class="lineno"> 3376</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03377" name="l03377"></a><span class="lineno"> 3377</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03378" name="l03378"></a><span class="lineno"> 3378</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
+<div class="line"><a id="l03348" name="l03348"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a58455aec5650ecfc6077c69c97031f63"> 3348</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a58455aec5650ecfc6077c69c97031f63">aes_gcm_dec_192_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03349" name="l03349"></a><span class="lineno"> 3349</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03350" name="l03350"></a><span class="lineno"> 3350</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03354" name="l03354"></a><span class="lineno"> 3354</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03355" name="l03355"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa81615f7ddfc8e1a794c5e278d22f7fc"> 3355</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#aa81615f7ddfc8e1a794c5e278d22f7fc">aes_gcm_dec_192_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03356" name="l03356"></a><span class="lineno"> 3356</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03357" name="l03357"></a><span class="lineno"> 3357</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03361" name="l03361"></a><span class="lineno"> 3361</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03362" name="l03362"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a615c26f03ba08c8cde73cb074bf6b363"> 3362</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a615c26f03ba08c8cde73cb074bf6b363">aes_gcm_dec_192_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03363" name="l03363"></a><span class="lineno"> 3363</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03364" name="l03364"></a><span class="lineno"> 3364</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03365" name="l03365"></a><span class="lineno"> 3365</span> </div>
+<div class="line"><a id="l03375" name="l03375"></a><span class="lineno"> 3375</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03376" name="l03376"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab1a51ae4b3cf3e8fdb618773d7b24b68"> 3376</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ab1a51ae4b3cf3e8fdb618773d7b24b68">aes_gcm_dec_256_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03377" name="l03377"></a><span class="lineno"> 3377</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03378" name="l03378"></a><span class="lineno"> 3378</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
 <div class="line"><a id="l03382" name="l03382"></a><span class="lineno"> 3382</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03383" name="l03383"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8d225d08a5cf144208dacb155e192cb6"> 3383</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a8d225d08a5cf144208dacb155e192cb6">aes_gcm_init_128_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03384" name="l03384"></a><span class="lineno"> 3384</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03385" name="l03385"></a><span class="lineno"> 3385</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03386" name="l03386"></a><span class="lineno"> 3386</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
-<div class="line"><a id="l03399" name="l03399"></a><span class="lineno"> 3399</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03400" name="l03400"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5bbf84135701f572ec2ecb0c0898848b"> 3400</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a5bbf84135701f572ec2ecb0c0898848b">aes_gcm_init_192_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03401" name="l03401"></a><span class="lineno"> 3401</span>                     <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03402" name="l03402"></a><span class="lineno"> 3402</span>                     <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
-<div class="line"><a id="l03406" name="l03406"></a><span class="lineno"> 3406</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03407" name="l03407"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac24548c2955399fd84b03216ad5b36fb"> 3407</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ac24548c2955399fd84b03216ad5b36fb">aes_gcm_init_192_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03408" name="l03408"></a><span class="lineno"> 3408</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03409" name="l03409"></a><span class="lineno"> 3409</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03410" name="l03410"></a><span class="lineno"> 3410</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
-<div class="line"><a id="l03414" name="l03414"></a><span class="lineno"> 3414</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03415" name="l03415"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a757cd199a2e993c6610bbcdfc1da1ae4"> 3415</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a757cd199a2e993c6610bbcdfc1da1ae4">aes_gcm_init_192_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03416" name="l03416"></a><span class="lineno"> 3416</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03417" name="l03417"></a><span class="lineno"> 3417</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03418" name="l03418"></a><span class="lineno"> 3418</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
-<div class="line"><a id="l03431" name="l03431"></a><span class="lineno"> 3431</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03432" name="l03432"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a09949bd5112eec14773dce239ca39033"> 3432</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a09949bd5112eec14773dce239ca39033">aes_gcm_init_256_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03433" name="l03433"></a><span class="lineno"> 3433</span>                     <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03434" name="l03434"></a><span class="lineno"> 3434</span>                     <span class="keyword">const</span> uint8_t *iv, uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
-<div class="line"><a id="l03438" name="l03438"></a><span class="lineno"> 3438</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03439" name="l03439"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3dd74260f4f34f7a53253c63ad3a6701"> 3439</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a3dd74260f4f34f7a53253c63ad3a6701">aes_gcm_init_256_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03440" name="l03440"></a><span class="lineno"> 3440</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03441" name="l03441"></a><span class="lineno"> 3441</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03442" name="l03442"></a><span class="lineno"> 3442</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
-<div class="line"><a id="l03446" name="l03446"></a><span class="lineno"> 3446</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03447" name="l03447"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a99310b73bc9cde6b69b682e72cd0efc1"> 3447</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a99310b73bc9cde6b69b682e72cd0efc1">aes_gcm_init_256_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03448" name="l03448"></a><span class="lineno"> 3448</span>                          <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03449" name="l03449"></a><span class="lineno"> 3449</span>                          <span class="keyword">const</span> uint8_t *iv,</div>
-<div class="line"><a id="l03450" name="l03450"></a><span class="lineno"> 3450</span>                          uint8_t <span class="keyword">const</span> *aad, uint64_t aad_len);</div>
+<div class="line"><a id="l03383" name="l03383"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0c31c2e2760edc7b252214214159cd7a"> 3383</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a0c31c2e2760edc7b252214214159cd7a">aes_gcm_dec_256_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03384" name="l03384"></a><span class="lineno"> 3384</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03385" name="l03385"></a><span class="lineno"> 3385</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03389" name="l03389"></a><span class="lineno"> 3389</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03390" name="l03390"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a141303c38f4eed1245b542b6e9473296"> 3390</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a141303c38f4eed1245b542b6e9473296">aes_gcm_dec_256_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03391" name="l03391"></a><span class="lineno"> 3391</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03392" name="l03392"></a><span class="lineno"> 3392</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
+<div class="line"><a id="l03393" name="l03393"></a><span class="lineno"> 3393</span> </div>
+<div class="line"><a id="l03404" name="l03404"></a><span class="lineno"> 3404</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03405" name="l03405"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af63ae2246c6d89b7d6630623948d3886"> 3405</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#af63ae2246c6d89b7d6630623948d3886">aes_gcm_enc_128_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03406" name="l03406"></a><span class="lineno"> 3406</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03407" name="l03407"></a><span class="lineno"> 3407</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03411" name="l03411"></a><span class="lineno"> 3411</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03412" name="l03412"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a40a83ee6dec0440cd99e5ff600e3803d"> 3412</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a40a83ee6dec0440cd99e5ff600e3803d">aes_gcm_enc_128_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03413" name="l03413"></a><span class="lineno"> 3413</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03414" name="l03414"></a><span class="lineno"> 3414</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03418" name="l03418"></a><span class="lineno"> 3418</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03419" name="l03419"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a004c38b922d25d8631252854426ebf44"> 3419</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a004c38b922d25d8631252854426ebf44">aes_gcm_enc_128_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03420" name="l03420"></a><span class="lineno"> 3420</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03421" name="l03421"></a><span class="lineno"> 3421</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03422" name="l03422"></a><span class="lineno"> 3422</span> </div>
+<div class="line"><a id="l03433" name="l03433"></a><span class="lineno"> 3433</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03434" name="l03434"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5dcb5c37d1a5377967888e9b76208f8c"> 3434</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a5dcb5c37d1a5377967888e9b76208f8c">aes_gcm_enc_192_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03435" name="l03435"></a><span class="lineno"> 3435</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03436" name="l03436"></a><span class="lineno"> 3436</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03440" name="l03440"></a><span class="lineno"> 3440</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03441" name="l03441"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5177757ae4a75ba41d5e7a8a534edc06"> 3441</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a5177757ae4a75ba41d5e7a8a534edc06">aes_gcm_enc_192_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03442" name="l03442"></a><span class="lineno"> 3442</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03443" name="l03443"></a><span class="lineno"> 3443</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03447" name="l03447"></a><span class="lineno"> 3447</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03448" name="l03448"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4f76beaee47ffeeeb6f94a132f898339"> 3448</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a4f76beaee47ffeeeb6f94a132f898339">aes_gcm_enc_192_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03449" name="l03449"></a><span class="lineno"> 3449</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03450" name="l03450"></a><span class="lineno"> 3450</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
 <div class="line"><a id="l03451" name="l03451"></a><span class="lineno"> 3451</span> </div>
-<div class="line"><a id="l03461" name="l03461"></a><span class="lineno"> 3461</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03462" name="l03462"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7b12cabbfebb420022a19124aff78a3f"> 3462</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a7b12cabbfebb420022a19124aff78a3f">aes_gcm_enc_128_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03463" name="l03463"></a><span class="lineno"> 3463</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03464" name="l03464"></a><span class="lineno"> 3464</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03468" name="l03468"></a><span class="lineno"> 3468</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03469" name="l03469"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae3459d38a2ee2e1ce04b9f9f4bf55ea5"> 3469</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ae3459d38a2ee2e1ce04b9f9f4bf55ea5">aes_gcm_enc_128_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03470" name="l03470"></a><span class="lineno"> 3470</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03471" name="l03471"></a><span class="lineno"> 3471</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03475" name="l03475"></a><span class="lineno"> 3475</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03476" name="l03476"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abb5570a161a90391e25b2016bc98381b"> 3476</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#abb5570a161a90391e25b2016bc98381b">aes_gcm_enc_128_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03477" name="l03477"></a><span class="lineno"> 3477</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03478" name="l03478"></a><span class="lineno"> 3478</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03479" name="l03479"></a><span class="lineno"> 3479</span> </div>
-<div class="line"><a id="l03489" name="l03489"></a><span class="lineno"> 3489</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03490" name="l03490"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a46c3df131f9e1e3ed1a283349c4072f7"> 3490</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a46c3df131f9e1e3ed1a283349c4072f7">aes_gcm_enc_192_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03491" name="l03491"></a><span class="lineno"> 3491</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03492" name="l03492"></a><span class="lineno"> 3492</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03496" name="l03496"></a><span class="lineno"> 3496</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03497" name="l03497"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a548fcbb89ff5fb798bf71ab8e4ac88eb"> 3497</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a548fcbb89ff5fb798bf71ab8e4ac88eb">aes_gcm_enc_192_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03498" name="l03498"></a><span class="lineno"> 3498</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03499" name="l03499"></a><span class="lineno"> 3499</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03503" name="l03503"></a><span class="lineno"> 3503</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03504" name="l03504"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a174447b05661285b2729805f66bcef81"> 3504</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a174447b05661285b2729805f66bcef81">aes_gcm_enc_192_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03505" name="l03505"></a><span class="lineno"> 3505</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03506" name="l03506"></a><span class="lineno"> 3506</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03507" name="l03507"></a><span class="lineno"> 3507</span> </div>
-<div class="line"><a id="l03517" name="l03517"></a><span class="lineno"> 3517</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03518" name="l03518"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab831bdb2193a5adc54b51285f23ad5ce"> 3518</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ab831bdb2193a5adc54b51285f23ad5ce">aes_gcm_enc_256_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03519" name="l03519"></a><span class="lineno"> 3519</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03520" name="l03520"></a><span class="lineno"> 3520</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03524" name="l03524"></a><span class="lineno"> 3524</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03525" name="l03525"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a351c2bf07dcab7e01570273c9df1e56f"> 3525</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a351c2bf07dcab7e01570273c9df1e56f">aes_gcm_enc_256_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03526" name="l03526"></a><span class="lineno"> 3526</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03527" name="l03527"></a><span class="lineno"> 3527</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03531" name="l03531"></a><span class="lineno"> 3531</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03532" name="l03532"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ad9592051cf26814ea5830826b553c547"> 3532</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ad9592051cf26814ea5830826b553c547">aes_gcm_enc_256_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03533" name="l03533"></a><span class="lineno"> 3533</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03534" name="l03534"></a><span class="lineno"> 3534</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03535" name="l03535"></a><span class="lineno"> 3535</span> </div>
-<div class="line"><a id="l03545" name="l03545"></a><span class="lineno"> 3545</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03546" name="l03546"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2216e461e916668b70d547513b0cf26f"> 3546</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a2216e461e916668b70d547513b0cf26f">aes_gcm_dec_128_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03547" name="l03547"></a><span class="lineno"> 3547</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03548" name="l03548"></a><span class="lineno"> 3548</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03552" name="l03552"></a><span class="lineno"> 3552</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03553" name="l03553"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a796e1df6d2aa233a6e28a867c1a2c628"> 3553</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a796e1df6d2aa233a6e28a867c1a2c628">aes_gcm_dec_128_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03554" name="l03554"></a><span class="lineno"> 3554</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03555" name="l03555"></a><span class="lineno"> 3555</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03559" name="l03559"></a><span class="lineno"> 3559</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03560" name="l03560"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4464684ff4cf4e9cb978409ad350c4d6"> 3560</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a4464684ff4cf4e9cb978409ad350c4d6">aes_gcm_dec_128_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03561" name="l03561"></a><span class="lineno"> 3561</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03562" name="l03562"></a><span class="lineno"> 3562</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03563" name="l03563"></a><span class="lineno"> 3563</span> </div>
-<div class="line"><a id="l03573" name="l03573"></a><span class="lineno"> 3573</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03574" name="l03574"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a58455aec5650ecfc6077c69c97031f63"> 3574</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a58455aec5650ecfc6077c69c97031f63">aes_gcm_dec_192_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03575" name="l03575"></a><span class="lineno"> 3575</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03576" name="l03576"></a><span class="lineno"> 3576</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03580" name="l03580"></a><span class="lineno"> 3580</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03581" name="l03581"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aa81615f7ddfc8e1a794c5e278d22f7fc"> 3581</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#aa81615f7ddfc8e1a794c5e278d22f7fc">aes_gcm_dec_192_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03582" name="l03582"></a><span class="lineno"> 3582</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03583" name="l03583"></a><span class="lineno"> 3583</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03587" name="l03587"></a><span class="lineno"> 3587</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03588" name="l03588"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a615c26f03ba08c8cde73cb074bf6b363"> 3588</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a615c26f03ba08c8cde73cb074bf6b363">aes_gcm_dec_192_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03589" name="l03589"></a><span class="lineno"> 3589</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03590" name="l03590"></a><span class="lineno"> 3590</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03591" name="l03591"></a><span class="lineno"> 3591</span> </div>
-<div class="line"><a id="l03601" name="l03601"></a><span class="lineno"> 3601</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03602" name="l03602"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab1a51ae4b3cf3e8fdb618773d7b24b68"> 3602</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ab1a51ae4b3cf3e8fdb618773d7b24b68">aes_gcm_dec_256_update_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03603" name="l03603"></a><span class="lineno"> 3603</span>                           <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03604" name="l03604"></a><span class="lineno"> 3604</span>                           uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03608" name="l03608"></a><span class="lineno"> 3608</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03609" name="l03609"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0c31c2e2760edc7b252214214159cd7a"> 3609</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a0c31c2e2760edc7b252214214159cd7a">aes_gcm_dec_256_update_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03610" name="l03610"></a><span class="lineno"> 3610</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03611" name="l03611"></a><span class="lineno"> 3611</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03615" name="l03615"></a><span class="lineno"> 3615</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03616" name="l03616"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a141303c38f4eed1245b542b6e9473296"> 3616</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a141303c38f4eed1245b542b6e9473296">aes_gcm_dec_256_update_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03617" name="l03617"></a><span class="lineno"> 3617</span>                                <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03618" name="l03618"></a><span class="lineno"> 3618</span>                                uint8_t *out, <span class="keyword">const</span> uint8_t *in, uint64_t len);</div>
-<div class="line"><a id="l03619" name="l03619"></a><span class="lineno"> 3619</span> </div>
-<div class="line"><a id="l03630" name="l03630"></a><span class="lineno"> 3630</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03631" name="l03631"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#af63ae2246c6d89b7d6630623948d3886"> 3631</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#af63ae2246c6d89b7d6630623948d3886">aes_gcm_enc_128_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03632" name="l03632"></a><span class="lineno"> 3632</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03633" name="l03633"></a><span class="lineno"> 3633</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03637" name="l03637"></a><span class="lineno"> 3637</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03638" name="l03638"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a40a83ee6dec0440cd99e5ff600e3803d"> 3638</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a40a83ee6dec0440cd99e5ff600e3803d">aes_gcm_enc_128_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03639" name="l03639"></a><span class="lineno"> 3639</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03640" name="l03640"></a><span class="lineno"> 3640</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03644" name="l03644"></a><span class="lineno"> 3644</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03645" name="l03645"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a004c38b922d25d8631252854426ebf44"> 3645</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a004c38b922d25d8631252854426ebf44">aes_gcm_enc_128_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03646" name="l03646"></a><span class="lineno"> 3646</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03647" name="l03647"></a><span class="lineno"> 3647</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03648" name="l03648"></a><span class="lineno"> 3648</span> </div>
-<div class="line"><a id="l03659" name="l03659"></a><span class="lineno"> 3659</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03660" name="l03660"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5dcb5c37d1a5377967888e9b76208f8c"> 3660</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a5dcb5c37d1a5377967888e9b76208f8c">aes_gcm_enc_192_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03661" name="l03661"></a><span class="lineno"> 3661</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03662" name="l03662"></a><span class="lineno"> 3662</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03666" name="l03666"></a><span class="lineno"> 3666</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03667" name="l03667"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5177757ae4a75ba41d5e7a8a534edc06"> 3667</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a5177757ae4a75ba41d5e7a8a534edc06">aes_gcm_enc_192_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03668" name="l03668"></a><span class="lineno"> 3668</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03669" name="l03669"></a><span class="lineno"> 3669</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03673" name="l03673"></a><span class="lineno"> 3673</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03674" name="l03674"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4f76beaee47ffeeeb6f94a132f898339"> 3674</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a4f76beaee47ffeeeb6f94a132f898339">aes_gcm_enc_192_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03675" name="l03675"></a><span class="lineno"> 3675</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03676" name="l03676"></a><span class="lineno"> 3676</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03677" name="l03677"></a><span class="lineno"> 3677</span> </div>
-<div class="line"><a id="l03688" name="l03688"></a><span class="lineno"> 3688</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03689" name="l03689"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afcdedeabc7516e7506fa5c81d07f6fd8"> 3689</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#afcdedeabc7516e7506fa5c81d07f6fd8">aes_gcm_enc_256_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03690" name="l03690"></a><span class="lineno"> 3690</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03691" name="l03691"></a><span class="lineno"> 3691</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03695" name="l03695"></a><span class="lineno"> 3695</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03696" name="l03696"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7fa5d4f44bb44600fa7b86697ccc385f"> 3696</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a7fa5d4f44bb44600fa7b86697ccc385f">aes_gcm_enc_256_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03697" name="l03697"></a><span class="lineno"> 3697</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03698" name="l03698"></a><span class="lineno"> 3698</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03702" name="l03702"></a><span class="lineno"> 3702</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03703" name="l03703"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a873a75e2175acd3741b5cfc41180fe2c"> 3703</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a873a75e2175acd3741b5cfc41180fe2c">aes_gcm_enc_256_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03704" name="l03704"></a><span class="lineno"> 3704</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03705" name="l03705"></a><span class="lineno"> 3705</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03706" name="l03706"></a><span class="lineno"> 3706</span> </div>
-<div class="line"><a id="l03717" name="l03717"></a><span class="lineno"> 3717</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03718" name="l03718"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a08603861ac18d1dce7b322b0c3fb69c5"> 3718</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a08603861ac18d1dce7b322b0c3fb69c5">aes_gcm_dec_128_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03719" name="l03719"></a><span class="lineno"> 3719</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03720" name="l03720"></a><span class="lineno"> 3720</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03724" name="l03724"></a><span class="lineno"> 3724</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03725" name="l03725"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac173e4fb252a820edb25ad790065ad39"> 3725</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ac173e4fb252a820edb25ad790065ad39">aes_gcm_dec_128_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03726" name="l03726"></a><span class="lineno"> 3726</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03727" name="l03727"></a><span class="lineno"> 3727</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03731" name="l03731"></a><span class="lineno"> 3731</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03732" name="l03732"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8e2bc4fff9de3c70ac140ff30e1cdce0"> 3732</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a8e2bc4fff9de3c70ac140ff30e1cdce0">aes_gcm_dec_128_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03733" name="l03733"></a><span class="lineno"> 3733</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03734" name="l03734"></a><span class="lineno"> 3734</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03735" name="l03735"></a><span class="lineno"> 3735</span> </div>
-<div class="line"><a id="l03746" name="l03746"></a><span class="lineno"> 3746</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03747" name="l03747"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0fd357a1794d78ac2168bc7eff0442ce"> 3747</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a0fd357a1794d78ac2168bc7eff0442ce">aes_gcm_dec_192_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03748" name="l03748"></a><span class="lineno"> 3748</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03749" name="l03749"></a><span class="lineno"> 3749</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03753" name="l03753"></a><span class="lineno"> 3753</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03754" name="l03754"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aacc19f04c9ac80d1bf7391661e191798"> 3754</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#aacc19f04c9ac80d1bf7391661e191798">aes_gcm_dec_192_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03755" name="l03755"></a><span class="lineno"> 3755</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03756" name="l03756"></a><span class="lineno"> 3756</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03760" name="l03760"></a><span class="lineno"> 3760</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03761" name="l03761"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afa136a3c06d45e914d15415dee27f001"> 3761</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#afa136a3c06d45e914d15415dee27f001">aes_gcm_dec_192_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03762" name="l03762"></a><span class="lineno"> 3762</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03763" name="l03763"></a><span class="lineno"> 3763</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03764" name="l03764"></a><span class="lineno"> 3764</span> </div>
-<div class="line"><a id="l03775" name="l03775"></a><span class="lineno"> 3775</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03776" name="l03776"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adf7aa2e79dce7a9ed79134c086715fd0"> 3776</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#adf7aa2e79dce7a9ed79134c086715fd0">aes_gcm_dec_256_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03777" name="l03777"></a><span class="lineno"> 3777</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03778" name="l03778"></a><span class="lineno"> 3778</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03782" name="l03782"></a><span class="lineno"> 3782</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03783" name="l03783"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a72f76caa84e2803b2b4a26c81623f89e"> 3783</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a72f76caa84e2803b2b4a26c81623f89e">aes_gcm_dec_256_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03784" name="l03784"></a><span class="lineno"> 3784</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03785" name="l03785"></a><span class="lineno"> 3785</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03789" name="l03789"></a><span class="lineno"> 3789</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
-<div class="line"><a id="l03790" name="l03790"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a791be274839adc3d26d9a32aa319dc3b"> 3790</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a791be274839adc3d26d9a32aa319dc3b">aes_gcm_dec_256_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
-<div class="line"><a id="l03791" name="l03791"></a><span class="lineno"> 3791</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
-<div class="line"><a id="l03792" name="l03792"></a><span class="lineno"> 3792</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
-<div class="line"><a id="l03793" name="l03793"></a><span class="lineno"> 3793</span> </div>
-<div class="line"><a id="l03802" name="l03802"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a46253857355ddae8d17bab1403289d0f"> 3802</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a46253857355ddae8d17bab1403289d0f">aes_gcm_precomp_128_sse</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03803" name="l03803"></a><span class="lineno"> 3803</span> </div>
-<div class="line"><a id="l03807" name="l03807"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ade16ed4c31baa50f8a10e3c85156a942"> 3807</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ade16ed4c31baa50f8a10e3c85156a942">aes_gcm_precomp_128_avx_gen2</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03808" name="l03808"></a><span class="lineno"> 3808</span> </div>
-<div class="line"><a id="l03812" name="l03812"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aecf7277999128599c6cf8432b242ba36"> 3812</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aecf7277999128599c6cf8432b242ba36">aes_gcm_precomp_128_avx_gen4</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03813" name="l03813"></a><span class="lineno"> 3813</span> </div>
-<div class="line"><a id="l03822" name="l03822"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a72d93e3249806eee186d465dc04c09e6"> 3822</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a72d93e3249806eee186d465dc04c09e6">aes_gcm_precomp_192_sse</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03823" name="l03823"></a><span class="lineno"> 3823</span> </div>
-<div class="line"><a id="l03827" name="l03827"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab0055e3b7d00cdb578647921207a1de7"> 3827</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ab0055e3b7d00cdb578647921207a1de7">aes_gcm_precomp_192_avx_gen2</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03828" name="l03828"></a><span class="lineno"> 3828</span> </div>
-<div class="line"><a id="l03832" name="l03832"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6cb54cf9321dfb95af2eeb812f41fa8f"> 3832</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a6cb54cf9321dfb95af2eeb812f41fa8f">aes_gcm_precomp_192_avx_gen4</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03833" name="l03833"></a><span class="lineno"> 3833</span> </div>
-<div class="line"><a id="l03842" name="l03842"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a18001897ea80cdce1f4f608b0922f767"> 3842</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a18001897ea80cdce1f4f608b0922f767">aes_gcm_precomp_256_sse</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03843" name="l03843"></a><span class="lineno"> 3843</span> </div>
-<div class="line"><a id="l03847" name="l03847"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2a883085207ee21caca109ab8250db08"> 3847</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2a883085207ee21caca109ab8250db08">aes_gcm_precomp_256_avx_gen2</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03848" name="l03848"></a><span class="lineno"> 3848</span> </div>
-<div class="line"><a id="l03852" name="l03852"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abef922c52013630ad70273cef095c564"> 3852</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#abef922c52013630ad70273cef095c564">aes_gcm_precomp_256_avx_gen4</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03853" name="l03853"></a><span class="lineno"> 3853</span> </div>
-<div class="line"><a id="l03863" name="l03863"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5d02ac2586befa6cd3fd4921858c33fd"> 3863</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a5d02ac2586befa6cd3fd4921858c33fd">aes_gcm_pre_128_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l03864" name="l03864"></a><span class="lineno"> 3864</span>                                        <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03868" name="l03868"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2f60098fff25e8b71b35e42cc7854339"> 3868</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2f60098fff25e8b71b35e42cc7854339">aes_gcm_pre_128_avx_gen2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l03869" name="l03869"></a><span class="lineno"> 3869</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03873" name="l03873"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3d7b8bc454b44abbeaa8f435280f8cb1"> 3873</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a3d7b8bc454b44abbeaa8f435280f8cb1">aes_gcm_pre_128_avx_gen4</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l03874" name="l03874"></a><span class="lineno"> 3874</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03884" name="l03884"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac0ebc1e7678bde75c25d5c0ec7ab2f7a"> 3884</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac0ebc1e7678bde75c25d5c0ec7ab2f7a">aes_gcm_pre_192_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l03885" name="l03885"></a><span class="lineno"> 3885</span>                                        <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03889" name="l03889"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6c9c0b179633aca3ba5c520bee32662f"> 3889</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a6c9c0b179633aca3ba5c520bee32662f">aes_gcm_pre_192_avx_gen2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l03890" name="l03890"></a><span class="lineno"> 3890</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03894" name="l03894"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab71c95df9bd059e1a5e108d2513a0e2c"> 3894</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ab71c95df9bd059e1a5e108d2513a0e2c">aes_gcm_pre_192_avx_gen4</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l03895" name="l03895"></a><span class="lineno"> 3895</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03905" name="l03905"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a18fac8ea0f3acabb4d5ffab1152f477f"> 3905</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a18fac8ea0f3acabb4d5ffab1152f477f">aes_gcm_pre_256_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l03906" name="l03906"></a><span class="lineno"> 3906</span>                                        <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03910" name="l03910"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aaaabf4acdd43f98b6c2d31c8013ebbf4"> 3910</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aaaabf4acdd43f98b6c2d31c8013ebbf4">aes_gcm_pre_256_avx_gen2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l03911" name="l03911"></a><span class="lineno"> 3911</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03915" name="l03915"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a082773f106f399ca73afc56583805a8c"> 3915</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a082773f106f399ca73afc56583805a8c">aes_gcm_pre_256_avx_gen4</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
-<div class="line"><a id="l03916" name="l03916"></a><span class="lineno"> 3916</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
-<div class="line"><a id="l03917" name="l03917"></a><span class="lineno"> 3917</span> </div>
-<div class="line"><a id="l03930" name="l03930"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4931dd6b1b91456bfe885e28ada0aaf3"> 3930</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a4931dd6b1b91456bfe885e28ada0aaf3">zuc_eea3_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
-<div class="line"><a id="l03931" name="l03931"></a><span class="lineno"> 3931</span>                                   <span class="keyword">const</span> uint8_t bearer,</div>
-<div class="line"><a id="l03932" name="l03932"></a><span class="lineno"> 3932</span>                                   <span class="keyword">const</span> uint8_t dir,</div>
-<div class="line"><a id="l03933" name="l03933"></a><span class="lineno"> 3933</span>                                   <span class="keywordtype">void</span> *iv_ptr);</div>
-<div class="line"><a id="l03946" name="l03946"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae3cefd0e992f1390110f0ef9a3aa510f"> 3946</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ae3cefd0e992f1390110f0ef9a3aa510f">zuc_eia3_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
-<div class="line"><a id="l03947" name="l03947"></a><span class="lineno"> 3947</span>                                   <span class="keyword">const</span> uint8_t bearer,</div>
-<div class="line"><a id="l03948" name="l03948"></a><span class="lineno"> 3948</span>                                   <span class="keyword">const</span> uint8_t dir,</div>
-<div class="line"><a id="l03949" name="l03949"></a><span class="lineno"> 3949</span>                                   <span class="keywordtype">void</span> *iv_ptr);</div>
-<div class="line"><a id="l03950" name="l03950"></a><span class="lineno"> 3950</span> </div>
-<div class="line"><a id="l03963" name="l03963"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3876dca52c5c210dd0827b2a472e6d0b"> 3963</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a3876dca52c5c210dd0827b2a472e6d0b">kasumi_f8_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
-<div class="line"><a id="l03964" name="l03964"></a><span class="lineno"> 3964</span>                                    <span class="keyword">const</span> uint8_t bearer,</div>
-<div class="line"><a id="l03965" name="l03965"></a><span class="lineno"> 3965</span>                                    <span class="keyword">const</span> uint8_t dir,</div>
-<div class="line"><a id="l03966" name="l03966"></a><span class="lineno"> 3966</span>                                    <span class="keywordtype">void</span> *iv_ptr);</div>
-<div class="line"><a id="l03978" name="l03978"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac886170fc4e70b467383fdf09f0724cf"> 3978</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac886170fc4e70b467383fdf09f0724cf">kasumi_f9_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
-<div class="line"><a id="l03979" name="l03979"></a><span class="lineno"> 3979</span>                                    <span class="keyword">const</span> uint32_t fresh,</div>
-<div class="line"><a id="l03980" name="l03980"></a><span class="lineno"> 3980</span>                                    <span class="keywordtype">void</span> *iv_ptr);</div>
-<div class="line"><a id="l03981" name="l03981"></a><span class="lineno"> 3981</span> </div>
-<div class="line"><a id="l03997" name="l03997"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2cbdb64c0b305cb5af010f9c98f70a43"> 3997</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2cbdb64c0b305cb5af010f9c98f70a43">snow3g_f8_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
-<div class="line"><a id="l03998" name="l03998"></a><span class="lineno"> 3998</span>                                    <span class="keyword">const</span> uint8_t bearer,</div>
-<div class="line"><a id="l03999" name="l03999"></a><span class="lineno"> 3999</span>                                    <span class="keyword">const</span> uint8_t dir,</div>
-<div class="line"><a id="l04000" name="l04000"></a><span class="lineno"> 4000</span>                                    <span class="keywordtype">void</span> *iv_ptr);</div>
-<div class="line"><a id="l04016" name="l04016"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a93e7a99927bc37fb4cb03f966fa4ebdd"> 4016</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a93e7a99927bc37fb4cb03f966fa4ebdd">snow3g_f9_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
-<div class="line"><a id="l04017" name="l04017"></a><span class="lineno"> 4017</span>                                    <span class="keyword">const</span> uint32_t fresh,</div>
-<div class="line"><a id="l04018" name="l04018"></a><span class="lineno"> 4018</span>                                    <span class="keyword">const</span> uint8_t dir,</div>
-<div class="line"><a id="l04019" name="l04019"></a><span class="lineno"> 4019</span>                                    <span class="keywordtype">void</span> *iv_ptr);</div>
-<div class="line"><a id="l04026" name="l04026"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6"> 4026</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6">imb_clear_mem</a>(<span class="keywordtype">void</span> *mem, <span class="keyword">const</span> <span class="keywordtype">size_t</span> size);</div>
-<div class="line"><a id="l04027" name="l04027"></a><span class="lineno"> 4027</span> </div>
-<div class="line"><a id="l04028" name="l04028"></a><span class="lineno"> 4028</span><span class="preprocessor">#ifdef __cplusplus</span></div>
-<div class="line"><a id="l04029" name="l04029"></a><span class="lineno"> 4029</span>}</div>
-<div class="line"><a id="l04030" name="l04030"></a><span class="lineno"> 4030</span><span class="preprocessor">#endif</span></div>
-<div class="line"><a id="l04031" name="l04031"></a><span class="lineno"> 4031</span> </div>
-<div class="line"><a id="l04032" name="l04032"></a><span class="lineno"> 4032</span><span class="preprocessor">#endif </span><span class="comment">/* IMB_IPSEC_MB_H */</span><span class="preprocessor"></span></div>
+<div class="line"><a id="l03462" name="l03462"></a><span class="lineno"> 3462</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03463" name="l03463"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afcdedeabc7516e7506fa5c81d07f6fd8"> 3463</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#afcdedeabc7516e7506fa5c81d07f6fd8">aes_gcm_enc_256_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03464" name="l03464"></a><span class="lineno"> 3464</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03465" name="l03465"></a><span class="lineno"> 3465</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03469" name="l03469"></a><span class="lineno"> 3469</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03470" name="l03470"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a7fa5d4f44bb44600fa7b86697ccc385f"> 3470</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a7fa5d4f44bb44600fa7b86697ccc385f">aes_gcm_enc_256_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03471" name="l03471"></a><span class="lineno"> 3471</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03472" name="l03472"></a><span class="lineno"> 3472</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03476" name="l03476"></a><span class="lineno"> 3476</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03477" name="l03477"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a873a75e2175acd3741b5cfc41180fe2c"> 3477</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a873a75e2175acd3741b5cfc41180fe2c">aes_gcm_enc_256_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03478" name="l03478"></a><span class="lineno"> 3478</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03479" name="l03479"></a><span class="lineno"> 3479</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03480" name="l03480"></a><span class="lineno"> 3480</span> </div>
+<div class="line"><a id="l03491" name="l03491"></a><span class="lineno"> 3491</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03492" name="l03492"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a08603861ac18d1dce7b322b0c3fb69c5"> 3492</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a08603861ac18d1dce7b322b0c3fb69c5">aes_gcm_dec_128_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03493" name="l03493"></a><span class="lineno"> 3493</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03494" name="l03494"></a><span class="lineno"> 3494</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03498" name="l03498"></a><span class="lineno"> 3498</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03499" name="l03499"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac173e4fb252a820edb25ad790065ad39"> 3499</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#ac173e4fb252a820edb25ad790065ad39">aes_gcm_dec_128_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03500" name="l03500"></a><span class="lineno"> 3500</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03501" name="l03501"></a><span class="lineno"> 3501</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03505" name="l03505"></a><span class="lineno"> 3505</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03506" name="l03506"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8e2bc4fff9de3c70ac140ff30e1cdce0"> 3506</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a8e2bc4fff9de3c70ac140ff30e1cdce0">aes_gcm_dec_128_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03507" name="l03507"></a><span class="lineno"> 3507</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03508" name="l03508"></a><span class="lineno"> 3508</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03509" name="l03509"></a><span class="lineno"> 3509</span> </div>
+<div class="line"><a id="l03520" name="l03520"></a><span class="lineno"> 3520</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03521" name="l03521"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a0fd357a1794d78ac2168bc7eff0442ce"> 3521</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a0fd357a1794d78ac2168bc7eff0442ce">aes_gcm_dec_192_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03522" name="l03522"></a><span class="lineno"> 3522</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03523" name="l03523"></a><span class="lineno"> 3523</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03527" name="l03527"></a><span class="lineno"> 3527</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03528" name="l03528"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aacc19f04c9ac80d1bf7391661e191798"> 3528</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#aacc19f04c9ac80d1bf7391661e191798">aes_gcm_dec_192_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03529" name="l03529"></a><span class="lineno"> 3529</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03530" name="l03530"></a><span class="lineno"> 3530</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03534" name="l03534"></a><span class="lineno"> 3534</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03535" name="l03535"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#afa136a3c06d45e914d15415dee27f001"> 3535</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#afa136a3c06d45e914d15415dee27f001">aes_gcm_dec_192_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03536" name="l03536"></a><span class="lineno"> 3536</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03537" name="l03537"></a><span class="lineno"> 3537</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03538" name="l03538"></a><span class="lineno"> 3538</span> </div>
+<div class="line"><a id="l03549" name="l03549"></a><span class="lineno"> 3549</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03550" name="l03550"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#adf7aa2e79dce7a9ed79134c086715fd0"> 3550</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#adf7aa2e79dce7a9ed79134c086715fd0">aes_gcm_dec_256_finalize_sse</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03551" name="l03551"></a><span class="lineno"> 3551</span>                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03552" name="l03552"></a><span class="lineno"> 3552</span>                             uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03556" name="l03556"></a><span class="lineno"> 3556</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03557" name="l03557"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a72f76caa84e2803b2b4a26c81623f89e"> 3557</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a72f76caa84e2803b2b4a26c81623f89e">aes_gcm_dec_256_finalize_avx_gen2</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03558" name="l03558"></a><span class="lineno"> 3558</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03559" name="l03559"></a><span class="lineno"> 3559</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03563" name="l03563"></a><span class="lineno"> 3563</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03564" name="l03564"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a791be274839adc3d26d9a32aa319dc3b"> 3564</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a791be274839adc3d26d9a32aa319dc3b">aes_gcm_dec_256_finalize_avx_gen4</a>(<span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03565" name="l03565"></a><span class="lineno"> 3565</span>                                  <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__context__data.html">gcm_context_data</a> *context_data,</div>
+<div class="line"><a id="l03566" name="l03566"></a><span class="lineno"> 3566</span>                                  uint8_t *auth_tag, uint64_t auth_tag_len);</div>
+<div class="line"><a id="l03567" name="l03567"></a><span class="lineno"> 3567</span> </div>
+<div class="line"><a id="l03576" name="l03576"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a46253857355ddae8d17bab1403289d0f"> 3576</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a46253857355ddae8d17bab1403289d0f">aes_gcm_precomp_128_sse</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03577" name="l03577"></a><span class="lineno"> 3577</span> </div>
+<div class="line"><a id="l03581" name="l03581"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ade16ed4c31baa50f8a10e3c85156a942"> 3581</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ade16ed4c31baa50f8a10e3c85156a942">aes_gcm_precomp_128_avx_gen2</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03582" name="l03582"></a><span class="lineno"> 3582</span> </div>
+<div class="line"><a id="l03586" name="l03586"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aecf7277999128599c6cf8432b242ba36"> 3586</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aecf7277999128599c6cf8432b242ba36">aes_gcm_precomp_128_avx_gen4</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03587" name="l03587"></a><span class="lineno"> 3587</span> </div>
+<div class="line"><a id="l03596" name="l03596"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a72d93e3249806eee186d465dc04c09e6"> 3596</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a72d93e3249806eee186d465dc04c09e6">aes_gcm_precomp_192_sse</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03597" name="l03597"></a><span class="lineno"> 3597</span> </div>
+<div class="line"><a id="l03601" name="l03601"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab0055e3b7d00cdb578647921207a1de7"> 3601</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ab0055e3b7d00cdb578647921207a1de7">aes_gcm_precomp_192_avx_gen2</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03602" name="l03602"></a><span class="lineno"> 3602</span> </div>
+<div class="line"><a id="l03606" name="l03606"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6cb54cf9321dfb95af2eeb812f41fa8f"> 3606</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a6cb54cf9321dfb95af2eeb812f41fa8f">aes_gcm_precomp_192_avx_gen4</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03607" name="l03607"></a><span class="lineno"> 3607</span> </div>
+<div class="line"><a id="l03616" name="l03616"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a18001897ea80cdce1f4f608b0922f767"> 3616</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a18001897ea80cdce1f4f608b0922f767">aes_gcm_precomp_256_sse</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03617" name="l03617"></a><span class="lineno"> 3617</span> </div>
+<div class="line"><a id="l03621" name="l03621"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2a883085207ee21caca109ab8250db08"> 3621</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2a883085207ee21caca109ab8250db08">aes_gcm_precomp_256_avx_gen2</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03622" name="l03622"></a><span class="lineno"> 3622</span> </div>
+<div class="line"><a id="l03626" name="l03626"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#abef922c52013630ad70273cef095c564"> 3626</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#abef922c52013630ad70273cef095c564">aes_gcm_precomp_256_avx_gen4</a>(<span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03627" name="l03627"></a><span class="lineno"> 3627</span> </div>
+<div class="line"><a id="l03637" name="l03637"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a5d02ac2586befa6cd3fd4921858c33fd"> 3637</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a5d02ac2586befa6cd3fd4921858c33fd">aes_gcm_pre_128_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l03638" name="l03638"></a><span class="lineno"> 3638</span>                                        <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03642" name="l03642"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2f60098fff25e8b71b35e42cc7854339"> 3642</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2f60098fff25e8b71b35e42cc7854339">aes_gcm_pre_128_avx_gen2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l03643" name="l03643"></a><span class="lineno"> 3643</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03647" name="l03647"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3d7b8bc454b44abbeaa8f435280f8cb1"> 3647</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a3d7b8bc454b44abbeaa8f435280f8cb1">aes_gcm_pre_128_avx_gen4</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l03648" name="l03648"></a><span class="lineno"> 3648</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03658" name="l03658"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac0ebc1e7678bde75c25d5c0ec7ab2f7a"> 3658</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac0ebc1e7678bde75c25d5c0ec7ab2f7a">aes_gcm_pre_192_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l03659" name="l03659"></a><span class="lineno"> 3659</span>                                        <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03663" name="l03663"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a6c9c0b179633aca3ba5c520bee32662f"> 3663</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a6c9c0b179633aca3ba5c520bee32662f">aes_gcm_pre_192_avx_gen2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l03664" name="l03664"></a><span class="lineno"> 3664</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03668" name="l03668"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ab71c95df9bd059e1a5e108d2513a0e2c"> 3668</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ab71c95df9bd059e1a5e108d2513a0e2c">aes_gcm_pre_192_avx_gen4</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l03669" name="l03669"></a><span class="lineno"> 3669</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03679" name="l03679"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a18fac8ea0f3acabb4d5ffab1152f477f"> 3679</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a18fac8ea0f3acabb4d5ffab1152f477f">aes_gcm_pre_256_sse</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l03680" name="l03680"></a><span class="lineno"> 3680</span>                                        <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03684" name="l03684"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aaaabf4acdd43f98b6c2d31c8013ebbf4"> 3684</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aaaabf4acdd43f98b6c2d31c8013ebbf4">aes_gcm_pre_256_avx_gen2</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l03685" name="l03685"></a><span class="lineno"> 3685</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03689" name="l03689"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a082773f106f399ca73afc56583805a8c"> 3689</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a082773f106f399ca73afc56583805a8c">aes_gcm_pre_256_avx_gen4</a>(<span class="keyword">const</span> <span class="keywordtype">void</span> *key,</div>
+<div class="line"><a id="l03690" name="l03690"></a><span class="lineno"> 3690</span>                                             <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data);</div>
+<div class="line"><a id="l03691" name="l03691"></a><span class="lineno"> 3691</span> </div>
+<div class="line"><a id="l03704" name="l03704"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a4931dd6b1b91456bfe885e28ada0aaf3"> 3704</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a4931dd6b1b91456bfe885e28ada0aaf3">zuc_eea3_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
+<div class="line"><a id="l03705" name="l03705"></a><span class="lineno"> 3705</span>                                   <span class="keyword">const</span> uint8_t bearer,</div>
+<div class="line"><a id="l03706" name="l03706"></a><span class="lineno"> 3706</span>                                   <span class="keyword">const</span> uint8_t dir,</div>
+<div class="line"><a id="l03707" name="l03707"></a><span class="lineno"> 3707</span>                                   <span class="keywordtype">void</span> *iv_ptr);</div>
+<div class="line"><a id="l03720" name="l03720"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ae3cefd0e992f1390110f0ef9a3aa510f"> 3720</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ae3cefd0e992f1390110f0ef9a3aa510f">zuc_eia3_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
+<div class="line"><a id="l03721" name="l03721"></a><span class="lineno"> 3721</span>                                   <span class="keyword">const</span> uint8_t bearer,</div>
+<div class="line"><a id="l03722" name="l03722"></a><span class="lineno"> 3722</span>                                   <span class="keyword">const</span> uint8_t dir,</div>
+<div class="line"><a id="l03723" name="l03723"></a><span class="lineno"> 3723</span>                                   <span class="keywordtype">void</span> *iv_ptr);</div>
+<div class="line"><a id="l03724" name="l03724"></a><span class="lineno"> 3724</span> </div>
+<div class="line"><a id="l03737" name="l03737"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a3876dca52c5c210dd0827b2a472e6d0b"> 3737</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a3876dca52c5c210dd0827b2a472e6d0b">kasumi_f8_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
+<div class="line"><a id="l03738" name="l03738"></a><span class="lineno"> 3738</span>                                    <span class="keyword">const</span> uint8_t bearer,</div>
+<div class="line"><a id="l03739" name="l03739"></a><span class="lineno"> 3739</span>                                    <span class="keyword">const</span> uint8_t dir,</div>
+<div class="line"><a id="l03740" name="l03740"></a><span class="lineno"> 3740</span>                                    <span class="keywordtype">void</span> *iv_ptr);</div>
+<div class="line"><a id="l03752" name="l03752"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ac886170fc4e70b467383fdf09f0724cf"> 3752</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#ac886170fc4e70b467383fdf09f0724cf">kasumi_f9_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
+<div class="line"><a id="l03753" name="l03753"></a><span class="lineno"> 3753</span>                                    <span class="keyword">const</span> uint32_t fresh,</div>
+<div class="line"><a id="l03754" name="l03754"></a><span class="lineno"> 3754</span>                                    <span class="keywordtype">void</span> *iv_ptr);</div>
+<div class="line"><a id="l03755" name="l03755"></a><span class="lineno"> 3755</span> </div>
+<div class="line"><a id="l03771" name="l03771"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a2cbdb64c0b305cb5af010f9c98f70a43"> 3771</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a2cbdb64c0b305cb5af010f9c98f70a43">snow3g_f8_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
+<div class="line"><a id="l03772" name="l03772"></a><span class="lineno"> 3772</span>                                    <span class="keyword">const</span> uint8_t bearer,</div>
+<div class="line"><a id="l03773" name="l03773"></a><span class="lineno"> 3773</span>                                    <span class="keyword">const</span> uint8_t dir,</div>
+<div class="line"><a id="l03774" name="l03774"></a><span class="lineno"> 3774</span>                                    <span class="keywordtype">void</span> *iv_ptr);</div>
+<div class="line"><a id="l03790" name="l03790"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a93e7a99927bc37fb4cb03f966fa4ebdd"> 3790</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">int</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#a93e7a99927bc37fb4cb03f966fa4ebdd">snow3g_f9_iv_gen</a>(<span class="keyword">const</span> uint32_t count,</div>
+<div class="line"><a id="l03791" name="l03791"></a><span class="lineno"> 3791</span>                                    <span class="keyword">const</span> uint32_t fresh,</div>
+<div class="line"><a id="l03792" name="l03792"></a><span class="lineno"> 3792</span>                                    <span class="keyword">const</span> uint8_t dir,</div>
+<div class="line"><a id="l03793" name="l03793"></a><span class="lineno"> 3793</span>                                    <span class="keywordtype">void</span> *iv_ptr);</div>
+<div class="line"><a id="l03800" name="l03800"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6"> 3800</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code hl_function" href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6">imb_clear_mem</a>(<span class="keywordtype">void</span> *mem, <span class="keyword">const</span> <span class="keywordtype">size_t</span> size);</div>
+<div class="line"><a id="l03801" name="l03801"></a><span class="lineno"> 3801</span> </div>
+<div class="line"><a id="l03823" name="l03823"></a><span class="lineno"> 3823</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03824" name="l03824"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a8faae8f9387983904125d862c4cac9ab"> 3824</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a8faae8f9387983904125d862c4cac9ab">imb_quic_aes_gcm</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state,</div>
+<div class="line"><a id="l03825" name="l03825"></a><span class="lineno"> 3825</span>                 <span class="keyword">const</span> <span class="keyword">struct</span> <a class="code hl_struct" href="structgcm__key__data.html">gcm_key_data</a> *key_data,</div>
+<div class="line"><a id="l03826" name="l03826"></a><span class="lineno"> 3826</span>                 <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a> key_size,</div>
+<div class="line"><a id="l03827" name="l03827"></a><span class="lineno"> 3827</span>                 <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">IMB_CIPHER_DIRECTION</a> cipher_dir,</div>
+<div class="line"><a id="l03828" name="l03828"></a><span class="lineno"> 3828</span>                 <span class="keywordtype">void</span> *dst_ptr_array[],</div>
+<div class="line"><a id="l03829" name="l03829"></a><span class="lineno"> 3829</span>                 <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> src_ptr_array[],</div>
+<div class="line"><a id="l03830" name="l03830"></a><span class="lineno"> 3830</span>                 <span class="keyword">const</span> uint64_t len_array[],</div>
+<div class="line"><a id="l03831" name="l03831"></a><span class="lineno"> 3831</span>                 <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> iv_ptr_array[],</div>
+<div class="line"><a id="l03832" name="l03832"></a><span class="lineno"> 3832</span>                 <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> aad_ptr_array[],</div>
+<div class="line"><a id="l03833" name="l03833"></a><span class="lineno"> 3833</span>                 <span class="keyword">const</span> uint64_t aad_len,</div>
+<div class="line"><a id="l03834" name="l03834"></a><span class="lineno"> 3834</span>                 <span class="keywordtype">void</span> *tag_ptr_array[],</div>
+<div class="line"><a id="l03835" name="l03835"></a><span class="lineno"> 3835</span>                 <span class="keyword">const</span> uint64_t tag_len,</div>
+<div class="line"><a id="l03836" name="l03836"></a><span class="lineno"> 3836</span>                 <span class="keyword">const</span> uint64_t num_packets);</div>
+<div class="line"><a id="l03837" name="l03837"></a><span class="lineno"> 3837</span> </div>
+<div class="line"><a id="l03852" name="l03852"></a><span class="lineno"> 3852</span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span></div>
+<div class="line"><a id="l03853" name="l03853"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#a89f9807d10f3459444bb649caf9b64ca"> 3853</a></span><a class="code hl_function" href="intel-ipsec-mb_8h.html#a89f9807d10f3459444bb649caf9b64ca">imb_quic_hp_aes_ecb</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state,</div>
+<div class="line"><a id="l03854" name="l03854"></a><span class="lineno"> 3854</span>                    <span class="keyword">const</span> <span class="keywordtype">void</span> *exp_key_data,</div>
+<div class="line"><a id="l03855" name="l03855"></a><span class="lineno"> 3855</span>                    <span class="keywordtype">void</span> *dst_ptr_array[],</div>
+<div class="line"><a id="l03856" name="l03856"></a><span class="lineno"> 3856</span>                    <span class="keyword">const</span> <span class="keywordtype">void</span> * <span class="keyword">const</span> src_ptr_array[],</div>
+<div class="line"><a id="l03857" name="l03857"></a><span class="lineno"> 3857</span>                    <span class="keyword">const</span> uint64_t num_packets,</div>
+<div class="line"><a id="l03858" name="l03858"></a><span class="lineno"> 3858</span>                    <span class="keyword">const</span> <a class="code hl_enumeration" href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a> key_size);</div>
+<div class="line"><a id="l03859" name="l03859"></a><span class="lineno"> 3859</span> </div>
+<div class="line"><a id="l03899" name="l03899"></a><span class="lineno"><a class="line" href="intel-ipsec-mb_8h.html#ada304337e78ef5a462c97c1f8151ef67"> 3899</a></span><a class="code hl_define" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> uint32_t <a class="code hl_function" href="intel-ipsec-mb_8h.html#ada304337e78ef5a462c97c1f8151ef67">imb_set_session</a>(<a class="code hl_struct" href="structIMB__MGR.html">IMB_MGR</a> *state, <a class="code hl_struct" href="structIMB__JOB.html">IMB_JOB</a> *job);</div>
+<div class="line"><a id="l03900" name="l03900"></a><span class="lineno"> 3900</span> </div>
+<div class="line"><a id="l03901" name="l03901"></a><span class="lineno"> 3901</span><span class="preprocessor">#ifdef __cplusplus</span></div>
+<div class="line"><a id="l03902" name="l03902"></a><span class="lineno"> 3902</span>}</div>
+<div class="line"><a id="l03903" name="l03903"></a><span class="lineno"> 3903</span><span class="preprocessor">#endif</span></div>
+<div class="line"><a id="l03904" name="l03904"></a><span class="lineno"> 3904</span> </div>
+<div class="line"><a id="l03905" name="l03905"></a><span class="lineno"> 3905</span><span class="preprocessor">#endif </span><span class="comment">/* IMB_IPSEC_MB_H */</span><span class="preprocessor"></span></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a004c38b922d25d8631252854426ebf44"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a004c38b922d25d8631252854426ebf44">aes_gcm_enc_128_finalize_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_128_finalize_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End encryption of a AES-GCM-128 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a055db1f6f16bc17724bdc64d0f313871"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a055db1f6f16bc17724bdc64d0f313871">get_next_job_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * get_next_job_sse(IMB_MGR *state)</div><div class="ttdoc">Get next available job.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a071e04977525b67c8d1accc60937eb67"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a071e04977525b67c8d1accc60937eb67">KASUMI_KEY_SCHEDULE_SIZE</a></div><div class="ttdeci">#define KASUMI_KEY_SCHEDULE_SIZE</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:648</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a071e04977525b67c8d1accc60937eb67"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a071e04977525b67c8d1accc60937eb67">KASUMI_KEY_SCHEDULE_SIZE</a></div><div class="ttdeci">#define KASUMI_KEY_SCHEDULE_SIZE</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:558</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a082773f106f399ca73afc56583805a8c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a082773f106f399ca73afc56583805a8c">aes_gcm_pre_256_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_pre_256_avx_gen4(const void *key, struct gcm_key_data *key_data)</div><div class="ttdoc">Pre-processes AES-GCM-256 key data.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a08603861ac18d1dce7b322b0c3fb69c5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a08603861ac18d1dce7b322b0c3fb69c5">aes_gcm_dec_128_finalize_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_128_finalize_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End decryption of a AES-GCM-128 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a09949bd5112eec14773dce239ca39033"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a09949bd5112eec14773dce239ca39033">aes_gcm_init_256_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_init_256_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</div><div class="ttdoc">Initialize a gcm_context_data structure to prepare for AES-GCM-256 Encryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a0a3032f0698c42bd486d053e90c44fdd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0a3032f0698c42bd486d053e90c44fdd">zuc_eea3_1_buffer_t</a></div><div class="ttdeci">void(* zuc_eea3_1_buffer_t)(const void *, const void *, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:853</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a0a3c025cfbe9b6e72e9b9f4805f0ca1f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0a3c025cfbe9b6e72e9b9f4805f0ca1f">sha256_one_block_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha256_one_block_avx2(const void *data, void *digest)</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a0a3032f0698c42bd486d053e90c44fdd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0a3032f0698c42bd486d053e90c44fdd">zuc_eea3_1_buffer_t</a></div><div class="ttdeci">void(* zuc_eea3_1_buffer_t)(const void *, const void *, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:770</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a0a843e722f2af7a645340f6a98cfa4c2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0a843e722f2af7a645340f6a98cfa4c2">aes_keyexp_192_enc_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_192_enc_sse(const void *key, void *enc_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a0c31c2e2760edc7b252214214159cd7a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0c31c2e2760edc7b252214214159cd7a">aes_gcm_dec_256_update_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_256_update_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Decrypt a block of a AES-GCM-256 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a0c6f54ab6663187fa401c766a981a41e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a></div><div class="ttdeci">#define IMB_GCM_ENC_KEY_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:718</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a0cf6acb86385bc984ec5f916fe6e1066"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0cf6acb86385bc984ec5f916fe6e1066">submit_burst_t</a></div><div class="ttdeci">uint32_t(* submit_burst_t)(struct IMB_MGR *, struct IMB_JOB *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:785</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a0c6f54ab6663187fa401c766a981a41e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0c6f54ab6663187fa401c766a981a41e">IMB_GCM_ENC_KEY_LEN</a></div><div class="ttdeci">#define IMB_GCM_ENC_KEY_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:628</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a0fd357a1794d78ac2168bc7eff0442ce"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0fd357a1794d78ac2168bc7eff0442ce">aes_gcm_dec_192_finalize_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_192_finalize_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End decryption of a AES-GCM-192 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a0ff9569b5072896a4119a4c7d3849bfc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a0ff9569b5072896a4119a4c7d3849bfc">aes_gcm_enc_192_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_192_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-192 Encryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a1020a70f15b89b7146733d8cbc2bcee8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a1020a70f15b89b7146733d8cbc2bcee8">sha256_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha256_avx512(const void *data, const uint64_t length, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a109b2a72d05bbe05a373ed5cf3c1f201"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a109b2a72d05bbe05a373ed5cf3c1f201">snow3g_f8_8_buffer_multikey_t</a></div><div class="ttdeci">void(* snow3g_f8_8_buffer_multikey_t)(const snow3g_key_schedule_t *const [], const void *const [], const void *const [], void *[], const uint32_t[])</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:962</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a11e10a3ac7a08801dc68949fb0f428af"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a></div><div class="ttdeci">void(* aes_gcm_pre_t)(const void *, struct gcm_key_data *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:830</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a12e0c05f0ecec8d75d4b288a7ec11c84"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a12e0c05f0ecec8d75d4b288a7ec11c84">ghash_t</a></div><div class="ttdeci">void(* ghash_t)(const struct gcm_key_data *, const void *, const uint64_t, void *, const uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:850</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a109b2a72d05bbe05a373ed5cf3c1f201"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a109b2a72d05bbe05a373ed5cf3c1f201">snow3g_f8_8_buffer_multikey_t</a></div><div class="ttdeci">void(* snow3g_f8_8_buffer_multikey_t)(const snow3g_key_schedule_t *const [], const void *const [], const void *const [], void *[], const uint32_t[])</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:879</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a11e10a3ac7a08801dc68949fb0f428af"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af">aes_gcm_pre_t</a></div><div class="ttdeci">void(* aes_gcm_pre_t)(const void *, struct gcm_key_data *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:747</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a12e0c05f0ecec8d75d4b288a7ec11c84"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a12e0c05f0ecec8d75d4b288a7ec11c84">ghash_t</a></div><div class="ttdeci">void(* ghash_t)(const struct gcm_key_data *, const void *, const uint64_t, void *, const uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:767</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a1308be648182642b8d73ff27d9344564"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a1308be648182642b8d73ff27d9344564">aes_xcbc_expand_key_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_xcbc_expand_key_avx512(const void *key, void *k1_exp, void *k2, void *k3)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a141303c38f4eed1245b542b6e9473296"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a141303c38f4eed1245b542b6e9473296">aes_gcm_dec_256_update_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_256_update_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Decrypt a block of a AES-GCM-256 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a16f7bd134f4a667f14261a89ca541126"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a16f7bd134f4a667f14261a89ca541126">sha224_one_block_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha224_one_block_avx512(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a174447b05661285b2729805f66bcef81"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a174447b05661285b2729805f66bcef81">aes_gcm_enc_192_update_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_192_update_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Encrypt a block of a AES-GCM-192 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a17c4f20de186e1f04580d04d6551e844"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a17c4f20de186e1f04580d04d6551e844">sha512_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha512_avx(const void *data, const uint64_t length, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a18001897ea80cdce1f4f608b0922f767"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a18001897ea80cdce1f4f608b0922f767">aes_gcm_precomp_256_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_precomp_256_sse(struct gcm_key_data *key_data)</div><div class="ttdoc">Precomputation of AES-GCM-256 HashKey constants.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a18fac8ea0f3acabb4d5ffab1152f477f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a18fac8ea0f3acabb4d5ffab1152f477f">aes_gcm_pre_256_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_pre_256_sse(const void *key, struct gcm_key_data *key_data)</div><div class="ttdoc">Pre-processes AES-GCM-256 key data.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a1a96f063bf1bd07de158985b57cff4a0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a1a96f063bf1bd07de158985b57cff4a0">chacha_poly_finalize_t</a></div><div class="ttdeci">void(* chacha_poly_finalize_t)(struct chacha20_poly1305_context_data *, void *, const uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:848</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a1a96f063bf1bd07de158985b57cff4a0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a1a96f063bf1bd07de158985b57cff4a0">chacha_poly_finalize_t</a></div><div class="ttdeci">void(* chacha_poly_finalize_t)(struct chacha20_poly1305_context_data *, void *, const uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:765</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a1f69c0a43de83f8fba19107a63c07831"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a1f69c0a43de83f8fba19107a63c07831">aes_keyexp_192_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_192_avx512(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a203fa854f71a1cca79f3f3ec251a33cc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a></div><div class="ttdeci">IMB_KEY_SIZE_BYTES</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:442</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a203fa854f71a1cca79f3f3ec251a33cca573d62aa6a04d9ce2b3c34e226846598"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cca573d62aa6a04d9ce2b3c34e226846598">IMB_KEY_192_BYTES</a></div><div class="ttdeci">@ IMB_KEY_192_BYTES</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:444</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a203fa854f71a1cca79f3f3ec251a33ccac139e7555c9b30725359698833eb213a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccac139e7555c9b30725359698833eb213a">IMB_KEY_256_BYTES</a></div><div class="ttdeci">@ IMB_KEY_256_BYTES</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:445</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a203fa854f71a1cca79f3f3ec251a33ccaf3e82db9a8b5b1b229c201735938969d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaf3e82db9a8b5b1b229c201735938969d">IMB_KEY_128_BYTES</a></div><div class="ttdeci">@ IMB_KEY_128_BYTES</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:443</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a203fa854f71a1cca79f3f3ec251a33cc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cc">IMB_KEY_SIZE_BYTES</a></div><div class="ttdeci">IMB_KEY_SIZE_BYTES</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:348</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a203fa854f71a1cca79f3f3ec251a33cca573d62aa6a04d9ce2b3c34e226846598"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33cca573d62aa6a04d9ce2b3c34e226846598">IMB_KEY_192_BYTES</a></div><div class="ttdeci">@ IMB_KEY_192_BYTES</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:351</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a203fa854f71a1cca79f3f3ec251a33ccaa1eb9eb83fca5f5dd6578f27733eb390"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaa1eb9eb83fca5f5dd6578f27733eb390">IMB_KEY_64_BYTES</a></div><div class="ttdeci">@ IMB_KEY_64_BYTES</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:349</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a203fa854f71a1cca79f3f3ec251a33ccac139e7555c9b30725359698833eb213a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccac139e7555c9b30725359698833eb213a">IMB_KEY_256_BYTES</a></div><div class="ttdeci">@ IMB_KEY_256_BYTES</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:352</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a203fa854f71a1cca79f3f3ec251a33ccaf3e82db9a8b5b1b229c201735938969d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a203fa854f71a1cca79f3f3ec251a33ccaf3e82db9a8b5b1b229c201735938969d">IMB_KEY_128_BYTES</a></div><div class="ttdeci">@ IMB_KEY_128_BYTES</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:350</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a22096fdd9b5d32095571f04a838d66a9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a22096fdd9b5d32095571f04a838d66a9">aes_keyexp_256_enc_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_256_enc_avx(const void *key, void *enc_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a2216e461e916668b70d547513b0cf26f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a2216e461e916668b70d547513b0cf26f">aes_gcm_dec_128_update_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_128_update_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Decrypt a block of a AES-GCM-128 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a238b96cc36c0dc64798a1244b94add8b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a238b96cc36c0dc64798a1244b94add8b">free_mb_mgr</a></div><div class="ttdeci">IMB_DLL_EXPORT void free_mb_mgr(IMB_MGR *ptr)</div><div class="ttdoc">Frees memory allocated previously by alloc_mb_mgr()</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a267a718472e0c1b6585402e81e44e7e9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a267a718472e0c1b6585402e81e44e7e9">get_completed_job_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * get_completed_job_sse(IMB_MGR *state)</div><div class="ttdoc">Get next completed job.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a270621a2f73134d8d021b5dd57ad6817"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a270621a2f73134d8d021b5dd57ad6817">aes_keyexp_128_enc_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_128_enc_sse(const void *key, void *enc_exp_keys)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a281315fb8b441d837ebed541b3a23380"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a281315fb8b441d837ebed541b3a23380">snow3g_f8_1_buffer_t</a></div><div class="ttdeci">void(* snow3g_f8_1_buffer_t)(const snow3g_key_schedule_t *, const void *, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:927</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a281315fb8b441d837ebed541b3a23380"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a281315fb8b441d837ebed541b3a23380">snow3g_f8_1_buffer_t</a></div><div class="ttdeci">void(* snow3g_f8_1_buffer_t)(const snow3g_key_schedule_t *, const void *, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:844</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a2a883085207ee21caca109ab8250db08"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a2a883085207ee21caca109ab8250db08">aes_gcm_precomp_256_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_precomp_256_avx_gen2(struct gcm_key_data *key_data)</div><div class="ttdoc">Precomputation of AES-GCM-256 HashKey constants.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a2ad1941fe5d77b8bb2d6445679e3b0c5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a2ad1941fe5d77b8bb2d6445679e3b0c5">init_mb_mgr_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void init_mb_mgr_sse(IMB_MGR *state)</div><div class="ttdoc">Initialize Multi-Buffer Manager structure.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a2cbbd032835837fd0aa83b04f5337638"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a2cbbd032835837fd0aa83b04f5337638">init_mb_mgr_auto</a></div><div class="ttdeci">IMB_DLL_EXPORT void init_mb_mgr_auto(IMB_MGR *state, IMB_ARCH *arch)</div><div class="ttdoc">Automatically initialize most performant Multi-buffer manager based on CPU features.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a2cbdb64c0b305cb5af010f9c98f70a43"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a2cbdb64c0b305cb5af010f9c98f70a43">snow3g_f8_iv_gen</a></div><div class="ttdeci">IMB_DLL_EXPORT int snow3g_f8_iv_gen(const uint32_t count, const uint8_t bearer, const uint8_t dir, void *iv_ptr)</div><div class="ttdoc">Generation of SNOW3G F8 Initialization Vector.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a2e481e815eb9c8109460e8a8dac62ce9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a2e481e815eb9c8109460e8a8dac62ce9">sha256_one_block_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha256_one_block_avx(const void *data, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a2ef2c1513632e69da882a895a075aa2c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a2ef2c1513632e69da882a895a075aa2c">sha224_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha224_sse(const void *data, const uint64_t length, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a2f60098fff25e8b71b35e42cc7854339"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a2f60098fff25e8b71b35e42cc7854339">aes_gcm_pre_128_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_pre_128_avx_gen2(const void *key, struct gcm_key_data *key_data)</div><div class="ttdoc">Pre-processes AES-GCM-128 key data.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a303f2dd11b1193938596b4ec69edf8cc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a303f2dd11b1193938596b4ec69edf8cc">zuc_eea3_n_buffer_t</a></div><div class="ttdeci">void(* zuc_eea3_n_buffer_t)(const void *const *, const void *const *, const void *const *, void **, const uint32_t *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:860</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a31987251c968435d720e8656ae4621a0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">aes_gmac_init_t</a></div><div class="ttdeci">void(* aes_gmac_init_t)(const struct gcm_key_data *, struct gcm_context_data *, const uint8_t *, const uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:832</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a303f2dd11b1193938596b4ec69edf8cc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a303f2dd11b1193938596b4ec69edf8cc">zuc_eea3_n_buffer_t</a></div><div class="ttdeci">void(* zuc_eea3_n_buffer_t)(const void *const *, const void *const *, const void *const *, void **, const uint32_t *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:777</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a31987251c968435d720e8656ae4621a0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0">aes_gmac_init_t</a></div><div class="ttdeci">void(* aes_gmac_init_t)(const struct gcm_key_data *, struct gcm_context_data *, const uint8_t *, const uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:749</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a32bcda3484b33b7d01124dbfeb9a229b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a32bcda3484b33b7d01124dbfeb9a229b">aes_keyexp_128_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_128_sse(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a3518b02f06a82e9f83cd0435f3cf25c9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3518b02f06a82e9f83cd0435f3cf25c9">get_next_job_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * get_next_job_avx(IMB_MGR *state)</div><div class="ttdoc">Get next available job.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a351c2bf07dcab7e01570273c9df1e56f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a351c2bf07dcab7e01570273c9df1e56f">aes_gcm_enc_256_update_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_256_update_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Encrypt a block of a AES-GCM-256 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a35e4c8a3d2eba8a612f021572621f98e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a35e4c8a3d2eba8a612f021572621f98e">submit_job_nocheck_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * submit_job_nocheck_sse(IMB_MGR *state)</div><div class="ttdoc">Submit job for processing without validating.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a37491294dc799c5477e3979e89e0cf92"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a37491294dc799c5477e3979e89e0cf92">sha1_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha1_sse(const void *data, const uint64_t length, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a37e0f61656618413fcfd919dfe79ca45"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a37e0f61656618413fcfd919dfe79ca45">aes_keyexp_256_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_256_avx512(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a3876dca52c5c210dd0827b2a472e6d0b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3876dca52c5c210dd0827b2a472e6d0b">kasumi_f8_iv_gen</a></div><div class="ttdeci">IMB_DLL_EXPORT int kasumi_f8_iv_gen(const uint32_t count, const uint8_t bearer, const uint8_t dir, void *iv_ptr)</div><div class="ttdoc">Generation of KASUMI F8 Initialization Vector.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a389b88f838e79306acea6c8bd157c712"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a389b88f838e79306acea6c8bd157c712">sha384_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha384_avx2(const void *data, const uint64_t length, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a392a99d0622122fe0e3c17611ef276a7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a392a99d0622122fe0e3c17611ef276a7">sha512_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha512_sse(const void *data, const uint64_t length, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a39fa05d7d02e8911e3d882f379d8661e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a39fa05d7d02e8911e3d882f379d8661e">sha384_one_block_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha384_one_block_avx512(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a3a825e903d1f8f8611b98b60fcaa5a81"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3a825e903d1f8f8611b98b60fcaa5a81">imb_set_pointers_mb_mgr</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_MGR * imb_set_pointers_mb_mgr(void *ptr, const uint64_t flags, const unsigned reset_mgr)</div><div class="ttdoc">Initializes IMB_MGR pointers to out-of-order managers with use of externally allocated memory.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a3bc56101b48217094086ae3120b0e086"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3bc56101b48217094086ae3120b0e086">aes_keyexp_192_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_192_avx(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334c">IMB_CIPHER_MODE</a></div><div class="ttdeci">IMB_CIPHER_MODE</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:355</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca049e85047492494fac0a4ec785707851"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca049e85047492494fac0a4ec785707851">IMB_CIPHER_DES</a></div><div class="ttdeci">@ IMB_CIPHER_DES</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:362</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca0bebd24d7311dedce100455dd3a8ddf6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0bebd24d7311dedce100455dd3a8ddf6">IMB_CIPHER_NULL</a></div><div class="ttdeci">@ IMB_CIPHER_NULL</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:358</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca0e2ebfcfd101ab4a39129082b2de517f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0e2ebfcfd101ab4a39129082b2de517f">IMB_CIPHER_CBC</a></div><div class="ttdeci">@ IMB_CIPHER_CBC</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:356</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca0f97344e525fef167a92d1a59a0492aa"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0f97344e525fef167a92d1a59a0492aa">IMB_CIPHER_GCM</a></div><div class="ttdeci">@ IMB_CIPHER_GCM</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:360</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca357dec895f8dfa3371add1feaa001f56"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca357dec895f8dfa3371add1feaa001f56">IMB_CIPHER_ECB</a></div><div class="ttdeci">@ IMB_CIPHER_ECB</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:367</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca3618bfaab3c19aabc8a93a03ae121efc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3618bfaab3c19aabc8a93a03ae121efc">IMB_CIPHER_ZUC_EEA3</a></div><div class="ttdeci">@ IMB_CIPHER_ZUC_EEA3</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:369</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca39d8d7ebca424a1c1a65bc04b5f64741"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca39d8d7ebca424a1c1a65bc04b5f64741">IMB_CIPHER_CHACHA20</a></div><div class="ttdeci">@ IMB_CIPHER_CHACHA20</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:373</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca3f7a3edb272955efea015c5bb8572e3b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3f7a3edb272955efea015c5bb8572e3b">IMB_CIPHER_KASUMI_UEA1_BITLEN</a></div><div class="ttdeci">@ IMB_CIPHER_KASUMI_UEA1_BITLEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:371</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca40926d8b731a401ec3e86ffa2089a1eb"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca40926d8b731a401ec3e86ffa2089a1eb">IMB_CIPHER_CHACHA20_POLY1305_SGL</a></div><div class="ttdeci">@ IMB_CIPHER_CHACHA20_POLY1305_SGL</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:375</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca4301726c71a4faf412a1a011cc4f0df8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca4301726c71a4faf412a1a011cc4f0df8">IMB_CIPHER_CUSTOM</a></div><div class="ttdeci">@ IMB_CIPHER_CUSTOM</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:361</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca48e024bc875c46b714b19a1c19908918"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca48e024bc875c46b714b19a1c19908918">IMB_CIPHER_GCM_SGL</a></div><div class="ttdeci">@ IMB_CIPHER_GCM_SGL</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:378</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca5b4126e439eaff0975846425594201ea"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca5b4126e439eaff0975846425594201ea">IMB_CIPHER_CNTR</a></div><div class="ttdeci">@ IMB_CIPHER_CNTR</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:357</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca639b1382de364a2b810f7876189bc64f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca639b1382de364a2b810f7876189bc64f">IMB_CIPHER_DES3</a></div><div class="ttdeci">@ IMB_CIPHER_DES3</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:365</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca6f69815480531651948b5549fa84023a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca6f69815480531651948b5549fa84023a">IMB_CIPHER_CNTR_BITLEN</a></div><div class="ttdeci">@ IMB_CIPHER_CNTR_BITLEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:368</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca71d87659793f7377d1d8b3315a3559f8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca71d87659793f7377d1d8b3315a3559f8">IMB_CIPHER_CBCS_1_9</a></div><div class="ttdeci">@ IMB_CIPHER_CBCS_1_9</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:372</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca78c470d405fb36037e41224b99d23c75"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca78c470d405fb36037e41224b99d23c75">IMB_CIPHER_NUM</a></div><div class="ttdeci">@ IMB_CIPHER_NUM</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:379</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca7d3946d77e4364bc45a9e72499bf817f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca7d3946d77e4364bc45a9e72499bf817f">IMB_CIPHER_CCM</a></div><div class="ttdeci">@ IMB_CIPHER_CCM</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:364</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca88c3ff9a6816b3629dc5b4815b47607e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca88c3ff9a6816b3629dc5b4815b47607e">IMB_CIPHER_SNOW3G_UEA2_BITLEN</a></div><div class="ttdeci">@ IMB_CIPHER_SNOW3G_UEA2_BITLEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:370</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca896285cd2fe56f73011b908e490cbbea"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca896285cd2fe56f73011b908e490cbbea">IMB_CIPHER_PON_AES_CNTR</a></div><div class="ttdeci">@ IMB_CIPHER_PON_AES_CNTR</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:366</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334caa5c375f97dce274a2446c8abf90aa61a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caa5c375f97dce274a2446c8abf90aa61a">IMB_CIPHER_CHACHA20_POLY1305</a></div><div class="ttdeci">@ IMB_CIPHER_CHACHA20_POLY1305</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:374</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334cada26994f8467300f862dbf45b5a22409"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cada26994f8467300f862dbf45b5a22409">IMB_CIPHER_SNOW_V_AEAD</a></div><div class="ttdeci">@ IMB_CIPHER_SNOW_V_AEAD</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:377</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334caed8ba68d7d2d7602407f17305d1d99b7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caed8ba68d7d2d7602407f17305d1d99b7">IMB_CIPHER_DOCSIS_SEC_BPI</a></div><div class="ttdeci">@ IMB_CIPHER_DOCSIS_SEC_BPI</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:359</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334caf9d62e1ff3a1a8b2ed1dcc515a3ffe1b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caf9d62e1ff3a1a8b2ed1dcc515a3ffe1b">IMB_CIPHER_DOCSIS_DES</a></div><div class="ttdeci">@ IMB_CIPHER_DOCSIS_DES</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:363</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334cafea56410df85a0b006963e50fba78465"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cafea56410df85a0b006963e50fba78465">IMB_CIPHER_SNOW_V</a></div><div class="ttdeci">@ IMB_CIPHER_SNOW_V</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:376</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334c">IMB_CIPHER_MODE</a></div><div class="ttdeci">IMB_CIPHER_MODE</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:261</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca049e85047492494fac0a4ec785707851"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca049e85047492494fac0a4ec785707851">IMB_CIPHER_DES</a></div><div class="ttdeci">@ IMB_CIPHER_DES</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:268</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca0bebd24d7311dedce100455dd3a8ddf6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0bebd24d7311dedce100455dd3a8ddf6">IMB_CIPHER_NULL</a></div><div class="ttdeci">@ IMB_CIPHER_NULL</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:264</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca0e2ebfcfd101ab4a39129082b2de517f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0e2ebfcfd101ab4a39129082b2de517f">IMB_CIPHER_CBC</a></div><div class="ttdeci">@ IMB_CIPHER_CBC</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:262</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca0f97344e525fef167a92d1a59a0492aa"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca0f97344e525fef167a92d1a59a0492aa">IMB_CIPHER_GCM</a></div><div class="ttdeci">@ IMB_CIPHER_GCM</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:266</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca357dec895f8dfa3371add1feaa001f56"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca357dec895f8dfa3371add1feaa001f56">IMB_CIPHER_ECB</a></div><div class="ttdeci">@ IMB_CIPHER_ECB</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:273</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca3618bfaab3c19aabc8a93a03ae121efc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3618bfaab3c19aabc8a93a03ae121efc">IMB_CIPHER_ZUC_EEA3</a></div><div class="ttdeci">@ IMB_CIPHER_ZUC_EEA3</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:275</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca39d8d7ebca424a1c1a65bc04b5f64741"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca39d8d7ebca424a1c1a65bc04b5f64741">IMB_CIPHER_CHACHA20</a></div><div class="ttdeci">@ IMB_CIPHER_CHACHA20</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:279</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca3f7a3edb272955efea015c5bb8572e3b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca3f7a3edb272955efea015c5bb8572e3b">IMB_CIPHER_KASUMI_UEA1_BITLEN</a></div><div class="ttdeci">@ IMB_CIPHER_KASUMI_UEA1_BITLEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:277</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca40926d8b731a401ec3e86ffa2089a1eb"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca40926d8b731a401ec3e86ffa2089a1eb">IMB_CIPHER_CHACHA20_POLY1305_SGL</a></div><div class="ttdeci">@ IMB_CIPHER_CHACHA20_POLY1305_SGL</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:281</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca4301726c71a4faf412a1a011cc4f0df8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca4301726c71a4faf412a1a011cc4f0df8">IMB_CIPHER_CUSTOM</a></div><div class="ttdeci">@ IMB_CIPHER_CUSTOM</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:267</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca48e024bc875c46b714b19a1c19908918"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca48e024bc875c46b714b19a1c19908918">IMB_CIPHER_GCM_SGL</a></div><div class="ttdeci">@ IMB_CIPHER_GCM_SGL</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:284</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca5b4126e439eaff0975846425594201ea"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca5b4126e439eaff0975846425594201ea">IMB_CIPHER_CNTR</a></div><div class="ttdeci">@ IMB_CIPHER_CNTR</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:263</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca639b1382de364a2b810f7876189bc64f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca639b1382de364a2b810f7876189bc64f">IMB_CIPHER_DES3</a></div><div class="ttdeci">@ IMB_CIPHER_DES3</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:271</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca6f69815480531651948b5549fa84023a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca6f69815480531651948b5549fa84023a">IMB_CIPHER_CNTR_BITLEN</a></div><div class="ttdeci">@ IMB_CIPHER_CNTR_BITLEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:274</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca71d87659793f7377d1d8b3315a3559f8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca71d87659793f7377d1d8b3315a3559f8">IMB_CIPHER_CBCS_1_9</a></div><div class="ttdeci">@ IMB_CIPHER_CBCS_1_9</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:278</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca78c470d405fb36037e41224b99d23c75"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca78c470d405fb36037e41224b99d23c75">IMB_CIPHER_NUM</a></div><div class="ttdeci">@ IMB_CIPHER_NUM</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:285</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca7d3946d77e4364bc45a9e72499bf817f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca7d3946d77e4364bc45a9e72499bf817f">IMB_CIPHER_CCM</a></div><div class="ttdeci">@ IMB_CIPHER_CCM</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:270</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca88c3ff9a6816b3629dc5b4815b47607e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca88c3ff9a6816b3629dc5b4815b47607e">IMB_CIPHER_SNOW3G_UEA2_BITLEN</a></div><div class="ttdeci">@ IMB_CIPHER_SNOW3G_UEA2_BITLEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:276</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334ca896285cd2fe56f73011b908e490cbbea"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334ca896285cd2fe56f73011b908e490cbbea">IMB_CIPHER_PON_AES_CNTR</a></div><div class="ttdeci">@ IMB_CIPHER_PON_AES_CNTR</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:272</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334caa5c375f97dce274a2446c8abf90aa61a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caa5c375f97dce274a2446c8abf90aa61a">IMB_CIPHER_CHACHA20_POLY1305</a></div><div class="ttdeci">@ IMB_CIPHER_CHACHA20_POLY1305</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:280</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334cada26994f8467300f862dbf45b5a22409"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cada26994f8467300f862dbf45b5a22409">IMB_CIPHER_SNOW_V_AEAD</a></div><div class="ttdeci">@ IMB_CIPHER_SNOW_V_AEAD</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:283</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334caed8ba68d7d2d7602407f17305d1d99b7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caed8ba68d7d2d7602407f17305d1d99b7">IMB_CIPHER_DOCSIS_SEC_BPI</a></div><div class="ttdeci">@ IMB_CIPHER_DOCSIS_SEC_BPI</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:265</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334caf9d62e1ff3a1a8b2ed1dcc515a3ffe1b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334caf9d62e1ff3a1a8b2ed1dcc515a3ffe1b">IMB_CIPHER_DOCSIS_DES</a></div><div class="ttdeci">@ IMB_CIPHER_DOCSIS_DES</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:269</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a3be1dfb4cbd4bd13dfdb2cf881f8334cafea56410df85a0b006963e50fba78465"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3be1dfb4cbd4bd13dfdb2cf881f8334cafea56410df85a0b006963e50fba78465">IMB_CIPHER_SNOW_V</a></div><div class="ttdeci">@ IMB_CIPHER_SNOW_V</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:282</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a3d7b8bc454b44abbeaa8f435280f8cb1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3d7b8bc454b44abbeaa8f435280f8cb1">aes_gcm_pre_128_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_pre_128_avx_gen4(const void *key, struct gcm_key_data *key_data)</div><div class="ttdoc">Pre-processes AES-GCM-128 key data.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a3dd74260f4f34f7a53253c63ad3a6701"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a3dd74260f4f34f7a53253c63ad3a6701">aes_gcm_init_256_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_init_256_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</div><div class="ttdoc">Initialize a gcm_context_data structure to prepare for AES-GCM-256 Encryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a4049b601f9da6542e25d903efe524bc1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4049b601f9da6542e25d903efe524bc1">snow3g_f8_n_buffer_multikey_t</a></div><div class="ttdeci">void(* snow3g_f8_n_buffer_multikey_t)(const snow3g_key_schedule_t *const [], const void *const [], const void *const [], void *[], const uint32_t[], const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:973</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a4049b601f9da6542e25d903efe524bc1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4049b601f9da6542e25d903efe524bc1">snow3g_f8_n_buffer_multikey_t</a></div><div class="ttdeci">void(* snow3g_f8_n_buffer_multikey_t)(const snow3g_key_schedule_t *const [], const void *const [], const void *const [], void *[], const uint32_t[], const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:890</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a40a83ee6dec0440cd99e5ff600e3803d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a40a83ee6dec0440cd99e5ff600e3803d">aes_gcm_enc_128_finalize_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_128_finalize_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End encryption of a AES-GCM-128 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a40c08ba2c387e24f2096b1213c46c812"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a40c08ba2c387e24f2096b1213c46c812">get_next_job_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * get_next_job_avx512(IMB_MGR *state)</div><div class="ttdoc">Get next available job.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a41297d789b434157e746e338f0af96ec"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a41297d789b434157e746e338f0af96ec">submit_job_t</a></div><div class="ttdeci">IMB_JOB *(* submit_job_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:781</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a437de868b8dba4f9b878d99a82f80548"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548">chacha_poly_enc_dec_update_t</a></div><div class="ttdeci">void(* chacha_poly_enc_dec_update_t)(const void *, struct chacha20_poly1305_context_data *, void *, const void *, const uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:845</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a41297d789b434157e746e338f0af96ec"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a41297d789b434157e746e338f0af96ec">submit_job_t</a></div><div class="ttdeci">IMB_JOB *(* submit_job_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:697</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a437de868b8dba4f9b878d99a82f80548"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a437de868b8dba4f9b878d99a82f80548">chacha_poly_enc_dec_update_t</a></div><div class="ttdeci">void(* chacha_poly_enc_dec_update_t)(const void *, struct chacha20_poly1305_context_data *, void *, const void *, const uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:762</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a4464684ff4cf4e9cb978409ad350c4d6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4464684ff4cf4e9cb978409ad350c4d6">aes_gcm_dec_128_update_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_128_update_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Decrypt a block of a AES-GCM-128 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a4490e7b324236315f1a9e141b39f99f2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4490e7b324236315f1a9e141b39f99f2">imb_get_version_str</a></div><div class="ttdeci">IMB_DLL_EXPORT const char * imb_get_version_str(void)</div><div class="ttdoc">Get library version in string format.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a45dea093699e6e2dd462b6cafccee672"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a45dea093699e6e2dd462b6cafccee672">aes_gcm_enc_256_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_256_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-256 Encryption.</div></div>
@@ -2254,613 +2152,600 @@ $(document).ready(function(){initNavTree('intel-ipsec-mb_8h_source.html',''); in
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a46c3df131f9e1e3ed1a283349c4072f7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a46c3df131f9e1e3ed1a283349c4072f7">aes_gcm_enc_192_update_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_192_update_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Encrypt a block of a AES-GCM-192 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a4931dd6b1b91456bfe885e28ada0aaf3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4931dd6b1b91456bfe885e28ada0aaf3">zuc_eea3_iv_gen</a></div><div class="ttdeci">IMB_DLL_EXPORT int zuc_eea3_iv_gen(const uint32_t count, const uint8_t bearer, const uint8_t dir, void *iv_ptr)</div><div class="ttdoc">Generation of ZUC-EEA3 Initialization Vector.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a49a3d54979188b3c68bdd621043125f7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a49a3d54979188b3c68bdd621043125f7">get_next_job_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * get_next_job_avx2(IMB_MGR *state)</div><div class="ttdoc">Get next available job.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a4a72299215a4838a93cdce6e5a37cfa5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5">IMB_CHAIN_ORDER</a></div><div class="ttdeci">IMB_CHAIN_ORDER</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:437</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a4a72299215a4838a93cdce6e5a37cfa5a5de8d032616267941d99dad14801044d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5de8d032616267941d99dad14801044d">IMB_ORDER_HASH_CIPHER</a></div><div class="ttdeci">@ IMB_ORDER_HASH_CIPHER</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:439</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a4a72299215a4838a93cdce6e5a37cfa5a5e3ab845752ce3d16e40ea7802ce4a52"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5e3ab845752ce3d16e40ea7802ce4a52">IMB_ORDER_CIPHER_HASH</a></div><div class="ttdeci">@ IMB_ORDER_CIPHER_HASH</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:438</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a4b0b9ffa331f8d675d24911639f0374f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4b0b9ffa331f8d675d24911639f0374f">chacha_poly_init_t</a></div><div class="ttdeci">void(* chacha_poly_init_t)(const void *, struct chacha20_poly1305_context_data *, const void *, const void *, const uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:842</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a4d9d41b8311d2649ec1b43d6e6edd398"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4d9d41b8311d2649ec1b43d6e6edd398">sha256_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha256_sse(const void *data, const uint64_t length, void *digest)</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a4a72299215a4838a93cdce6e5a37cfa5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5">IMB_CHAIN_ORDER</a></div><div class="ttdeci">IMB_CHAIN_ORDER</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:343</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a4a72299215a4838a93cdce6e5a37cfa5a5de8d032616267941d99dad14801044d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5de8d032616267941d99dad14801044d">IMB_ORDER_HASH_CIPHER</a></div><div class="ttdeci">@ IMB_ORDER_HASH_CIPHER</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:345</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a4a72299215a4838a93cdce6e5a37cfa5a5e3ab845752ce3d16e40ea7802ce4a52"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4a72299215a4838a93cdce6e5a37cfa5a5e3ab845752ce3d16e40ea7802ce4a52">IMB_ORDER_CIPHER_HASH</a></div><div class="ttdeci">@ IMB_ORDER_CIPHER_HASH</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:344</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a4b0b9ffa331f8d675d24911639f0374f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4b0b9ffa331f8d675d24911639f0374f">chacha_poly_init_t</a></div><div class="ttdeci">void(* chacha_poly_init_t)(const void *, struct chacha20_poly1305_context_data *, const void *, const void *, const uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:759</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a4dafe82f4933670f68e1bf34d55a691d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4dafe82f4933670f68e1bf34d55a691d">aes_cmac_subkey_gen_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_cmac_subkey_gen_sse(const void *key_exp, void *key1, void *key2)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a4e8912e7e55a2ac891f85c19e7f29328"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4e8912e7e55a2ac891f85c19e7f29328">snow3g_f8_2_buffer_t</a></div><div class="ttdeci">void(* snow3g_f8_2_buffer_t)(const snow3g_key_schedule_t *, const void *, const void *, const void *, void *, const uint32_t, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:935</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a4f6fca648737cec9ee869786e9c240b5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5">submit_hash_burst_t</a></div><div class="ttdeci">uint32_t(* submit_hash_burst_t)(struct IMB_MGR *, struct IMB_JOB *, const uint32_t, const IMB_HASH_ALG hash)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:793</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a4e8912e7e55a2ac891f85c19e7f29328"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4e8912e7e55a2ac891f85c19e7f29328">snow3g_f8_2_buffer_t</a></div><div class="ttdeci">void(* snow3g_f8_2_buffer_t)(const snow3g_key_schedule_t *, const void *, const void *, const void *, void *, const uint32_t, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:852</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a4f6fca648737cec9ee869786e9c240b5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4f6fca648737cec9ee869786e9c240b5">submit_hash_burst_t</a></div><div class="ttdeci">uint32_t(* submit_hash_burst_t)(struct IMB_MGR *, struct IMB_JOB *, const uint32_t, const IMB_HASH_ALG hash)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:710</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a4f76beaee47ffeeeb6f94a132f898339"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4f76beaee47ffeeeb6f94a132f898339">aes_gcm_enc_192_finalize_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_192_finalize_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End encryption of a AES-GCM-192 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a4fc7f88bdb263ae0d45f37af7e4cb930"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a4fc7f88bdb263ae0d45f37af7e4cb930">aes_keyexp_128_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_128_avx2(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a5105a8d995cd8e4354c7de7ac94886cb"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5105a8d995cd8e4354c7de7ac94886cb">aes_keyexp_256_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_256_sse(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a5177757ae4a75ba41d5e7a8a534edc06"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5177757ae4a75ba41d5e7a8a534edc06">aes_gcm_enc_192_finalize_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_192_finalize_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End encryption of a AES-GCM-192 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a51bbde186cdd437b6f9448e19a58e8a1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a51bbde186cdd437b6f9448e19a58e8a1">kasumi_f8_n_buffer_t</a></div><div class="ttdeci">void(* kasumi_f8_n_buffer_t)(const kasumi_key_sched_t *, const uint64_t *, const void *const *, void **, const uint32_t *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:901</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a51bbde186cdd437b6f9448e19a58e8a1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a51bbde186cdd437b6f9448e19a58e8a1">kasumi_f8_n_buffer_t</a></div><div class="ttdeci">void(* kasumi_f8_n_buffer_t)(const kasumi_key_sched_t *, const uint64_t *, const void *const *, void **, const uint32_t *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:818</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a51c0426a4b57c9e7db2b091692dff472"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a51c0426a4b57c9e7db2b091692dff472">queue_size_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT uint32_t queue_size_avx512(IMB_MGR *state)</div><div class="ttdoc">Get number of jobs queued to be processed.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a51c522a828b36d9c69dd7c357b556fc9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a51c522a828b36d9c69dd7c357b556fc9">sha224_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha224_avx512(const void *data, const uint64_t length, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a52c0913f10dd41fea5fe328037561ff8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a52c0913f10dd41fea5fe328037561ff8">aes_gcm_enc_256_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_256_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-256 Encryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a532582e6d066b9c6b1c2189ba1b36f27"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a532582e6d066b9c6b1c2189ba1b36f27">sha1_one_block_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha1_one_block_avx(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a5350b81ab574c990d6a5b9dc3b203c51"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5350b81ab574c990d6a5b9dc3b203c51">aes_keyexp_192_enc_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_192_enc_avx(const void *key, void *enc_exp_keys)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a53ecac7e009fcbeee603f975a45d3012"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a53ecac7e009fcbeee603f975a45d3012">kasumi_f8_3_buffer_t</a></div><div class="ttdeci">void(* kasumi_f8_3_buffer_t)(const kasumi_key_sched_t *, const uint64_t, const uint64_t, const uint64_t, const void *, void *, const void *, void *, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:886</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a53ecac7e009fcbeee603f975a45d3012"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a53ecac7e009fcbeee603f975a45d3012">kasumi_f8_3_buffer_t</a></div><div class="ttdeci">void(* kasumi_f8_3_buffer_t)(const kasumi_key_sched_t *, const uint64_t, const uint64_t, const uint64_t, const void *, void *, const void *, void *, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:803</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a548fcbb89ff5fb798bf71ab8e4ac88eb"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a548fcbb89ff5fb798bf71ab8e4ac88eb">aes_gcm_enc_192_update_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_192_update_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Encrypt a block of a AES-GCM-192 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a56dd197c301ad27dc9ec0862721cb73d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a></div><div class="ttdeci">uint32_t(* crc32_fn_t)(const void *, const uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:991</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a56dd197c301ad27dc9ec0862721cb73d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a56dd197c301ad27dc9ec0862721cb73d">crc32_fn_t</a></div><div class="ttdeci">uint32_t(* crc32_fn_t)(const void *, const uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:908</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a58455aec5650ecfc6077c69c97031f63"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a58455aec5650ecfc6077c69c97031f63">aes_gcm_dec_192_update_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_192_update_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Decrypt a block of a AES-GCM-192 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a58916afb9e72f42a1c8c2658e248703a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a58916afb9e72f42a1c8c2658e248703a">sha224_one_block_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha224_one_block_avx2(const void *data, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a59def6ed420a4ef91ce4a6562cc2c4d5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">IMB_GCM_BLOCK_LEN</a></div><div class="ttdeci">#define IMB_GCM_BLOCK_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:660</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a5a330bd4ed945f830c88dd6e1066652d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5a330bd4ed945f830c88dd6e1066652d">aes_cfb_128_one_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_cfb_128_one_avx(void *out, const void *in, const void *iv, const void *keys, uint64_t len)</div><div class="ttdoc">AES-CFB-128 Encrypt/Decrypt up to one block.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a5a533d852e3b65e9e5978fec37da43b5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5a533d852e3b65e9e5978fec37da43b5">get_next_job_t</a></div><div class="ttdeci">IMB_JOB *(* get_next_job_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:780</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a59def6ed420a4ef91ce4a6562cc2c4d5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a59def6ed420a4ef91ce4a6562cc2c4d5">IMB_GCM_BLOCK_LEN</a></div><div class="ttdeci">#define IMB_GCM_BLOCK_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:570</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a5a533d852e3b65e9e5978fec37da43b5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5a533d852e3b65e9e5978fec37da43b5">get_next_job_t</a></div><div class="ttdeci">IMB_JOB *(* get_next_job_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:696</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a5a95b9268508d68b9027df98167d22cd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5a95b9268508d68b9027df98167d22cd">submit_job_nocheck_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * submit_job_nocheck_avx512(IMB_MGR *state)</div><div class="ttdoc">Submit job for processing without validating.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a5b92ee3873b2e2cd02c9312b6040ee91"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5b92ee3873b2e2cd02c9312b6040ee91">aes_keyexp_256_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_256_avx(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a5bbf84135701f572ec2ecb0c0898848b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5bbf84135701f572ec2ecb0c0898848b">aes_gcm_init_192_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_init_192_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</div><div class="ttdoc">Initialize a gcm_context_data structure to prepare for AES-GCM-192 Encryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a5ccd87fbcfffc238fbcd1fc816eb06ee"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5ccd87fbcfffc238fbcd1fc816eb06ee">aes_gcm_dec_192_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_192_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-192 Decryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a5d02ac2586befa6cd3fd4921858c33fd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5d02ac2586befa6cd3fd4921858c33fd">aes_gcm_pre_128_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_pre_128_sse(const void *key, struct gcm_key_data *key_data)</div><div class="ttdoc">Pre-processes AES-GCM-128 key data.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a5d2e35fbfc14d979d87b5b9a63bf19c9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5d2e35fbfc14d979d87b5b9a63bf19c9">sha512_one_block_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha512_one_block_avx512(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a5dcb5c37d1a5377967888e9b76208f8c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a5dcb5c37d1a5377967888e9b76208f8c">aes_gcm_enc_192_finalize_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_192_finalize_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End encryption of a AES-GCM-192 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a60a93569304a978c798bb8c4a4f7f52f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a60a93569304a978c798bb8c4a4f7f52f">des_keysched_t</a></div><div class="ttdeci">int(* des_keysched_t)(uint64_t *, const void *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:802</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a60de89a391c8d6d9c51c742a87effb6f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">keyexp_t</a></div><div class="ttdeci">void(* keyexp_t)(const void *, void *, void *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:797</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a6155f472c6794e88289235752d83154a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6155f472c6794e88289235752d83154a">snow3g_f8_8_buffer_t</a></div><div class="ttdeci">void(* snow3g_f8_8_buffer_t)(const snow3g_key_schedule_t *, const void *, const void *, const void *, const void *, const void *, const void *, const void *, const void *, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:948</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a60a93569304a978c798bb8c4a4f7f52f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a60a93569304a978c798bb8c4a4f7f52f">des_keysched_t</a></div><div class="ttdeci">int(* des_keysched_t)(uint64_t *, const void *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:719</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a60de89a391c8d6d9c51c742a87effb6f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a60de89a391c8d6d9c51c742a87effb6f">keyexp_t</a></div><div class="ttdeci">void(* keyexp_t)(const void *, void *, void *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:714</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a6155f472c6794e88289235752d83154a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6155f472c6794e88289235752d83154a">snow3g_f8_8_buffer_t</a></div><div class="ttdeci">void(* snow3g_f8_8_buffer_t)(const snow3g_key_schedule_t *, const void *, const void *, const void *, const void *, const void *, const void *, const void *, const void *, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:865</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a615c26f03ba08c8cde73cb074bf6b363"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a615c26f03ba08c8cde73cb074bf6b363">aes_gcm_dec_192_update_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_192_update_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Decrypt a block of a AES-GCM-192 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a61f664448a862fbb02e728ce518ff8e4"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a61f664448a862fbb02e728ce518ff8e4">imb_get_strerror</a></div><div class="ttdeci">IMB_DLL_EXPORT const char * imb_get_strerror(int errnum)</div><div class="ttdoc">API to get description for errnum.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a6541825066a8d2b8b3c7b6e2c4b28c83"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6541825066a8d2b8b3c7b6e2c4b28c83">aes_cmac_subkey_gen_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_cmac_subkey_gen_avx(const void *key_exp, void *key1, void *key2)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a65f909001359ad986640155f8756a11d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d">aes_gcm_init_var_iv_t</a></div><div class="ttdeci">void(* aes_gcm_init_var_iv_t)(const struct gcm_key_data *, struct gcm_context_data *, const uint8_t *, const uint64_t, const uint8_t *, const uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:819</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a65f909001359ad986640155f8756a11d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d">aes_gcm_init_var_iv_t</a></div><div class="ttdeci">void(* aes_gcm_init_var_iv_t)(const struct gcm_key_data *, struct gcm_context_data *, const uint8_t *, const uint64_t, const uint8_t *, const uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:736</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a68e6a0e99a2091d3630bf3315fe9d95c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a68e6a0e99a2091d3630bf3315fe9d95c">aes_keyexp_128_enc_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_128_enc_avx512(const void *key, void *enc_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a6903e1e0dfb8fd75c2f556596f3efa1b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6903e1e0dfb8fd75c2f556596f3efa1b">aes_cmac_subkey_gen_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_cmac_subkey_gen_avx2(const void *key_exp, void *key1, void *key2)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a693afd528fcc0809cc667b6c38de84dc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a693afd528fcc0809cc667b6c38de84dc">get_completed_job_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * get_completed_job_avx512(IMB_MGR *state)</div><div class="ttdoc">Get next completed job.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a6a15b62259d7475edd02b11b775b7a38"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6a15b62259d7475edd02b11b775b7a38">sha224_one_block_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha224_one_block_sse(const void *data, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a6a4a1da950207c9ed04f3f18ae1b7e43"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6a4a1da950207c9ed04f3f18ae1b7e43">snow3g_f8_n_buffer_t</a></div><div class="ttdeci">void(* snow3g_f8_n_buffer_t)(const snow3g_key_schedule_t *, const void *const [], const void *const [], void *[], const uint32_t[], const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:966</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a6b93fe0c0d7cdc520e6b465ddd93ec3d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3d">IMB_SGL_STATE</a></div><div class="ttdeci">IMB_SGL_STATE</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:448</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a6b93fe0c0d7cdc520e6b465ddd93ec3da15c5d0aeeb9d5eb4e4c4878c837c5977"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da15c5d0aeeb9d5eb4e4c4878c837c5977">IMB_SGL_UPDATE</a></div><div class="ttdeci">@ IMB_SGL_UPDATE</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:450</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a6b93fe0c0d7cdc520e6b465ddd93ec3da2f0678ab7ad9bb30c040e0b3ee2fa408"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da2f0678ab7ad9bb30c040e0b3ee2fa408">IMB_SGL_ALL</a></div><div class="ttdeci">@ IMB_SGL_ALL</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:452</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a6b93fe0c0d7cdc520e6b465ddd93ec3dab7a602903c0fbaad7ffb893cb2547975"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3dab7a602903c0fbaad7ffb893cb2547975">IMB_SGL_COMPLETE</a></div><div class="ttdeci">@ IMB_SGL_COMPLETE</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:451</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a6b93fe0c0d7cdc520e6b465ddd93ec3daf6e77a48759ab366cc1160725ff4261e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3daf6e77a48759ab366cc1160725ff4261e">IMB_SGL_INIT</a></div><div class="ttdeci">@ IMB_SGL_INIT</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:449</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a6a4a1da950207c9ed04f3f18ae1b7e43"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6a4a1da950207c9ed04f3f18ae1b7e43">snow3g_f8_n_buffer_t</a></div><div class="ttdeci">void(* snow3g_f8_n_buffer_t)(const snow3g_key_schedule_t *, const void *const [], const void *const [], void *[], const uint32_t[], const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:883</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a6b93fe0c0d7cdc520e6b465ddd93ec3d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3d">IMB_SGL_STATE</a></div><div class="ttdeci">IMB_SGL_STATE</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:355</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a6b93fe0c0d7cdc520e6b465ddd93ec3da15c5d0aeeb9d5eb4e4c4878c837c5977"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da15c5d0aeeb9d5eb4e4c4878c837c5977">IMB_SGL_UPDATE</a></div><div class="ttdeci">@ IMB_SGL_UPDATE</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:357</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a6b93fe0c0d7cdc520e6b465ddd93ec3da2f0678ab7ad9bb30c040e0b3ee2fa408"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3da2f0678ab7ad9bb30c040e0b3ee2fa408">IMB_SGL_ALL</a></div><div class="ttdeci">@ IMB_SGL_ALL</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:359</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a6b93fe0c0d7cdc520e6b465ddd93ec3dab7a602903c0fbaad7ffb893cb2547975"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3dab7a602903c0fbaad7ffb893cb2547975">IMB_SGL_COMPLETE</a></div><div class="ttdeci">@ IMB_SGL_COMPLETE</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:358</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a6b93fe0c0d7cdc520e6b465ddd93ec3daf6e77a48759ab366cc1160725ff4261e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6b93fe0c0d7cdc520e6b465ddd93ec3daf6e77a48759ab366cc1160725ff4261e">IMB_SGL_INIT</a></div><div class="ttdeci">@ IMB_SGL_INIT</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:356</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a6c9c0b179633aca3ba5c520bee32662f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6c9c0b179633aca3ba5c520bee32662f">aes_gcm_pre_192_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_pre_192_avx_gen2(const void *key, struct gcm_key_data *key_data)</div><div class="ttdoc">Pre-processes AES-GCM-192 key data.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a6cb54cf9321dfb95af2eeb812f41fa8f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a6cb54cf9321dfb95af2eeb812f41fa8f">aes_gcm_precomp_192_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_precomp_192_avx_gen4(struct gcm_key_data *key_data)</div><div class="ttdoc">Precomputation of AES-GCM-192 HashKey constants.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a7046666312bdba42b05bfbf63d0e1c6a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7046666312bdba42b05bfbf63d0e1c6a">aes_cfb_128_one_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_cfb_128_one_avx2(void *out, const void *in, const void *iv, const void *keys, uint64_t len)</div><div class="ttdoc">AES-CFB-128 Encrypt/Decrypt up to one block.</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a71a0353411f5307a2177ae9b2814f522"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a71a0353411f5307a2177ae9b2814f522">des_cfb_one</a></div><div class="ttdeci">IMB_DLL_EXPORT void des_cfb_one(void *out, const void *in, const uint64_t *iv, const uint64_t *ks, const int len)</div><div class="ttdoc">DES-CFB Encrypt/Decrypt up to one block.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a71b6563b6b4c0c504cd9b8302a242cfa"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a71b6563b6b4c0c504cd9b8302a242cfa">init_mb_mgr_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void init_mb_mgr_avx2(IMB_MGR *state)</div><div class="ttdoc">Initialize Multi-Buffer Manager structure.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a71fb9f25bcab533a98f3d1c5cc2c7f48"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a71fb9f25bcab533a98f3d1c5cc2c7f48">aes_gcm_enc_dec_t</a></div><div class="ttdeci">void(* aes_gcm_enc_dec_t)(const struct gcm_key_data *, struct gcm_context_data *, uint8_t *, uint8_t const *, uint64_t, const uint8_t *, uint8_t const *, uint64_t, uint8_t *, uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:805</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a71fb9f25bcab533a98f3d1c5cc2c7f48"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a71fb9f25bcab533a98f3d1c5cc2c7f48">aes_gcm_enc_dec_t</a></div><div class="ttdeci">void(* aes_gcm_enc_dec_t)(const struct gcm_key_data *, struct gcm_context_data *, uint8_t *, uint8_t const *, uint64_t, const uint8_t *, uint8_t const *, uint64_t, uint8_t *, uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:722</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a725703ff6da6b402bde7041a2fabfddf"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a725703ff6da6b402bde7041a2fabfddf">imb_get_feature_flags</a></div><div class="ttdeci">IMB_DLL_EXPORT uint64_t imb_get_feature_flags(void)</div><div class="ttdoc">Retrieves the bitmask with the features supported by the library, without having to allocate/initiali...</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a72807e8300208b22b5d532e274385127"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a72807e8300208b22b5d532e274385127">aes_keyexp_192_enc_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_192_enc_avx512(const void *key, void *enc_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a72caaf8162ae6f802f7c1fe570afe42e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a72caaf8162ae6f802f7c1fe570afe42e">submit_job_nocheck_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * submit_job_nocheck_avx2(IMB_MGR *state)</div><div class="ttdoc">Submit job for processing without validating.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a72d93e3249806eee186d465dc04c09e6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a72d93e3249806eee186d465dc04c09e6">aes_gcm_precomp_192_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_precomp_192_sse(struct gcm_key_data *key_data)</div><div class="ttdoc">Precomputation of AES-GCM-192 HashKey constants.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a72f76caa84e2803b2b4a26c81623f89e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a72f76caa84e2803b2b4a26c81623f89e">aes_gcm_dec_256_finalize_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_256_finalize_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End decryption of a AES-GCM-256 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a730f18bd7cdcbbb995e24931307867fc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a730f18bd7cdcbbb995e24931307867fc">aes_cmac_subkey_gen_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_cmac_subkey_gen_avx512(const void *key_exp, void *key1, void *key2)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a73715b8c1ba918ce6d5c21749841b47b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a73715b8c1ba918ce6d5c21749841b47b">IMB_GCM_KEY_SETS</a></div><div class="ttdeci">#define IMB_GCM_KEY_SETS</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:719</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a73715b8c1ba918ce6d5c21749841b47b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a73715b8c1ba918ce6d5c21749841b47b">IMB_GCM_KEY_SETS</a></div><div class="ttdeci">#define IMB_GCM_KEY_SETS</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:629</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a73da5625112ad845a3ec94ee84590f54"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a73da5625112ad845a3ec94ee84590f54">aes_keyexp_256_enc_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_256_enc_avx2(const void *key, void *enc_exp_keys)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a745c97ce8263ebc67f4d8070f5c9ee50"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a745c97ce8263ebc67f4d8070f5c9ee50">sha1_one_block_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha1_one_block_avx512(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a757cd199a2e993c6610bbcdfc1da1ae4"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a757cd199a2e993c6610bbcdfc1da1ae4">aes_gcm_init_192_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_init_192_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</div><div class="ttdoc">Initialize a gcm_context_data structure to prepare for AES-GCM-192 Encryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a75cc0d090470e47cd8be04451ee31a68"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a75cc0d090470e47cd8be04451ee31a68">submit_job_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * submit_job_avx512(IMB_MGR *state)</div><div class="ttdoc">Submit job for processing after validating.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a7681d777bb5f991ab59b5581bc854562"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7681d777bb5f991ab59b5581bc854562">aes_keyexp_192_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_192_sse(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a76d64c2094522011f741de4ac8a03125"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a76d64c2094522011f741de4ac8a03125">sha224_one_block_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha224_one_block_avx(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a7700e90058a74980bfd7d462a19d32a0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7700e90058a74980bfd7d462a19d32a0">submit_job_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * submit_job_sse(IMB_MGR *state)</div><div class="ttdoc">Submit job for processing after validating.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a791be274839adc3d26d9a32aa319dc3b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a791be274839adc3d26d9a32aa319dc3b">aes_gcm_dec_256_finalize_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_256_finalize_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End decryption of a AES-GCM-256 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a796e1df6d2aa233a6e28a867c1a2c628"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a796e1df6d2aa233a6e28a867c1a2c628">aes_gcm_dec_128_update_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_128_update_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Decrypt a block of a AES-GCM-128 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a7976461101f011a77d19f4fa480d5be3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7976461101f011a77d19f4fa480d5be3">sha256_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha256_avx(const void *data, const uint64_t length, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a79f60b2bffbe91dac3e4f8b486e7ab10"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a79f60b2bffbe91dac3e4f8b486e7ab10">imb_get_errno</a></div><div class="ttdeci">IMB_DLL_EXPORT int imb_get_errno(IMB_MGR *mb_mgr)</div><div class="ttdoc">API to get error status.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a7a9a24d480dcedac1aa40d53e01b8a76"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7a9a24d480dcedac1aa40d53e01b8a76">aes_gcm_init_128_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_init_128_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</div><div class="ttdoc">Initialize a gcm_context_data structure to prepare for AES-GCM-128 Encryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a7addeb4d0c6ddcdaa031b9e7b4dd35c2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7addeb4d0c6ddcdaa031b9e7b4dd35c2">md5_one_block_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void md5_one_block_avx(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a7b12cabbfebb420022a19124aff78a3f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7b12cabbfebb420022a19124aff78a3f">aes_gcm_enc_128_update_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_128_update_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Encrypt a block of a AES-GCM-128 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a7b656d085ad03ff43a6c3a4751bfbf56"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7b656d085ad03ff43a6c3a4751bfbf56">sha384_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha384_avx(const void *data, const uint64_t length, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a7bc28362ae2fb8a4d624b8a7a00adebd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7bc28362ae2fb8a4d624b8a7a00adebd">aes_cfb_128_one_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_cfb_128_one_sse(void *out, const void *in, const void *iv, const void *keys, uint64_t len)</div><div class="ttdoc">AES-CFB-128 Encrypt/Decrypt up to one block.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a7bd00b31d12260305accf0d37b60c958"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7bd00b31d12260305accf0d37b60c958">snow3g_f8_1_buffer_bit_t</a></div><div class="ttdeci">void(* snow3g_f8_1_buffer_bit_t)(const snow3g_key_schedule_t *, const void *, const void *, void *, const uint32_t, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:931</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a7bec62666456d8962676961cf187ac80"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7bec62666456d8962676961cf187ac80">kasumi_init_f8_key_sched_t</a></div><div class="ttdeci">int(* kasumi_init_f8_key_sched_t)(const void *, kasumi_key_sched_t *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:912</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a7d95ff83cbadc815cbe8c11b0af74b7e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7d95ff83cbadc815cbe8c11b0af74b7e">sha512_one_block_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha512_one_block_avx(const void *data, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a7df2e3f063333d677ef7668626126c4d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7df2e3f063333d677ef7668626126c4d">zuc_eea3_4_buffer_t</a></div><div class="ttdeci">void(* zuc_eea3_4_buffer_t)(const void *const *, const void *const *, const void *const *, void **, const uint32_t *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:856</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a7bd00b31d12260305accf0d37b60c958"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7bd00b31d12260305accf0d37b60c958">snow3g_f8_1_buffer_bit_t</a></div><div class="ttdeci">void(* snow3g_f8_1_buffer_bit_t)(const snow3g_key_schedule_t *, const void *, const void *, void *, const uint32_t, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:848</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a7bec62666456d8962676961cf187ac80"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7bec62666456d8962676961cf187ac80">kasumi_init_f8_key_sched_t</a></div><div class="ttdeci">int(* kasumi_init_f8_key_sched_t)(const void *, kasumi_key_sched_t *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:829</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a7df2e3f063333d677ef7668626126c4d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7df2e3f063333d677ef7668626126c4d">zuc_eea3_4_buffer_t</a></div><div class="ttdeci">void(* zuc_eea3_4_buffer_t)(const void *const *, const void *const *, const void *const *, void **, const uint32_t *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:773</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a7fa5d4f44bb44600fa7b86697ccc385f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7fa5d4f44bb44600fa7b86697ccc385f">aes_gcm_enc_256_finalize_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_256_finalize_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End encryption of a AES-GCM-256 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a7fa788fbcd353c13fd1eac251f658f1c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a7fa788fbcd353c13fd1eac251f658f1c">sha512_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha512_avx512(const void *data, const uint64_t length, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a800c395d326e718a2b520d0bb91cbb89"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a800c395d326e718a2b520d0bb91cbb89">queue_size_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT uint32_t queue_size_avx(IMB_MGR *state)</div><div class="ttdoc">Get number of jobs queued to be processed.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a80f792744558de173ea97d722c58e5c1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a80f792744558de173ea97d722c58e5c1">queue_size_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT uint32_t queue_size_sse(IMB_MGR *state)</div><div class="ttdoc">Get number of jobs queued to be processed.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a81afa744fb5669fe37cf0dce2193d8a7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a81afa744fb5669fe37cf0dce2193d8a7">kasumi_f8_1_buffer_bit_t</a></div><div class="ttdeci">void(* kasumi_f8_1_buffer_bit_t)(const kasumi_key_sched_t *, const uint64_t, const void *, void *, const uint32_t, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:876</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a81afa744fb5669fe37cf0dce2193d8a7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a81afa744fb5669fe37cf0dce2193d8a7">kasumi_f8_1_buffer_bit_t</a></div><div class="ttdeci">void(* kasumi_f8_1_buffer_bit_t)(const kasumi_key_sched_t *, const uint64_t, const void *, void *, const uint32_t, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:793</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a82d6866ebcf1bd46b684fe473b4b73f2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a82d6866ebcf1bd46b684fe473b4b73f2">kasumi_key_sched_t</a></div><div class="ttdeci">struct kasumi_key_sched_s kasumi_key_sched_t</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">IMB_HASH_ALG</a></div><div class="ttdeci">IMB_HASH_ALG</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:387</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205">IMB_AUTH_AES_CMAC_256</a></div><div class="ttdeci">@ IMB_AUTH_AES_CMAC_256</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:414</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a17deb61684701b7ec37f68bd34b6d454"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a17deb61684701b7ec37f68bd34b6d454">IMB_AUTH_AES_XCBC</a></div><div class="ttdeci">@ IMB_AUTH_AES_XCBC</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:393</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b">IMB_AUTH_ZUC_EIA3_BITLEN</a></div><div class="ttdeci">@ IMB_AUTH_ZUC_EIA3_BITLEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:407</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0">IMB_AUTH_AES_GMAC_128</a></div><div class="ttdeci">@ IMB_AUTH_AES_GMAC_128</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:411</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a22e2e766cbec475508af01c6a722c2c3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a22e2e766cbec475508af01c6a722c2c3">IMB_AUTH_CRC16_X25</a></div><div class="ttdeci">@ IMB_AUTH_CRC16_X25</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:426</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a25f47297460775ab891a0abb8240b8e0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a25f47297460775ab891a0abb8240b8e0">IMB_AUTH_NULL</a></div><div class="ttdeci">@ IMB_AUTH_NULL</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:395</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a2fcc080535b4dd16502ecd2b01c14048"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a2fcc080535b4dd16502ecd2b01c14048">IMB_AUTH_PON_CRC_BIP</a></div><div class="ttdeci">@ IMB_AUTH_PON_CRC_BIP</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:406</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325">IMB_AUTH_SHA_224</a></div><div class="ttdeci">@ IMB_AUTH_SHA_224</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:401</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a3a8aa07fe9f70ece22f9351db0f8bb31"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3a8aa07fe9f70ece22f9351db0f8bb31">IMB_AUTH_CRC24_LTE_A</a></div><div class="ttdeci">@ IMB_AUTH_CRC24_LTE_A</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:424</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a421294f9a35f87e796f96b48257e6dc2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a421294f9a35f87e796f96b48257e6dc2">IMB_AUTH_CRC32_ETHERNET_FCS</a></div><div class="ttdeci">@ IMB_AUTH_CRC32_ETHERNET_FCS</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:421</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a">IMB_AUTH_KASUMI_UIA1</a></div><div class="ttdeci">@ IMB_AUTH_KASUMI_UIA1</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:410</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58">IMB_AUTH_HMAC_SHA_1</a></div><div class="ttdeci">@ IMB_AUTH_HMAC_SHA_1</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:388</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88">IMB_AUTH_SHA_256</a></div><div class="ttdeci">@ IMB_AUTH_SHA_256</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:402</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b">IMB_AUTH_SNOW3G_UIA2_BITLEN</a></div><div class="ttdeci">@ IMB_AUTH_SNOW3G_UIA2_BITLEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:409</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a53ff331c62b01fb8427e63e18fc433f6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff331c62b01fb8427e63e18fc433f6">IMB_AUTH_SNOW_V_AEAD</a></div><div class="ttdeci">@ IMB_AUTH_SNOW_V_AEAD</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:419</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a53ff8b335b5391fc33c80c076590de44"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff8b335b5391fc33c80c076590de44">IMB_AUTH_CRC32_SCTP</a></div><div class="ttdeci">@ IMB_AUTH_CRC32_SCTP</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:422</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a5d34120f8a1c5cde857baf32536868af"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a5d34120f8a1c5cde857baf32536868af">IMB_AUTH_NUM</a></div><div class="ttdeci">@ IMB_AUTH_NUM</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:434</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995">IMB_AUTH_HMAC_SHA_256</a></div><div class="ttdeci">@ IMB_AUTH_HMAC_SHA_256</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:390</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a67297eacd4913bd65a1aae650c3a22e3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a67297eacd4913bd65a1aae650c3a22e3">IMB_AUTH_GHASH</a></div><div class="ttdeci">@ IMB_AUTH_GHASH</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:433</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a70151af8840242c8f5bdb375f2f1135b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a70151af8840242c8f5bdb375f2f1135b">IMB_AUTH_CUSTOM</a></div><div class="ttdeci">@ IMB_AUTH_CUSTOM</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:397</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a71119edfbe668d423e910b11c0efb712"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a71119edfbe668d423e910b11c0efb712">IMB_AUTH_CHACHA20_POLY1305_SGL</a></div><div class="ttdeci">@ IMB_AUTH_CHACHA20_POLY1305_SGL</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:417</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a77ccdf9abd97310f6808c8cf12c1a395"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a77ccdf9abd97310f6808c8cf12c1a395">IMB_AUTH_CRC24_LTE_B</a></div><div class="ttdeci">@ IMB_AUTH_CRC24_LTE_B</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:425</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a7c535075abfb0878168a00600a762fe0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a7c535075abfb0878168a00600a762fe0">IMB_AUTH_ZUC256_EIA3_BITLEN</a></div><div class="ttdeci">@ IMB_AUTH_ZUC256_EIA3_BITLEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:418</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e">IMB_AUTH_AES_CCM</a></div><div class="ttdeci">@ IMB_AUTH_AES_CCM</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:398</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a88175070e077037332ad5cd5fdece46f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a88175070e077037332ad5cd5fdece46f">IMB_AUTH_CRC6_IUUP_HEADER</a></div><div class="ttdeci">@ IMB_AUTH_CRC6_IUUP_HEADER</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:432</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a93e6c082f7ec5926a087d139a2bd2e56"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a93e6c082f7ec5926a087d139a2bd2e56">IMB_AUTH_POLY1305</a></div><div class="ttdeci">@ IMB_AUTH_POLY1305</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:415</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe">IMB_AUTH_MD5</a></div><div class="ttdeci">@ IMB_AUTH_MD5</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:394</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d">IMB_AUTH_SHA_512</a></div><div class="ttdeci">@ IMB_AUTH_SHA_512</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:404</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006aa1496e45f00afe54aeeb527089e14a0d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa1496e45f00afe54aeeb527089e14a0d">IMB_AUTH_AES_GMAC</a></div><div class="ttdeci">@ IMB_AUTH_AES_GMAC</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:396</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006aa78e695260f8fe6bb56d242771624ccc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa78e695260f8fe6bb56d242771624ccc">IMB_AUTH_CRC16_FP_DATA</a></div><div class="ttdeci">@ IMB_AUTH_CRC16_FP_DATA</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:427</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83">IMB_AUTH_AES_CMAC_BITLEN</a></div><div class="ttdeci">@ IMB_AUTH_AES_CMAC_BITLEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:405</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ab0f02ac14a03f137a83bb7d6dff539fc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab0f02ac14a03f137a83bb7d6dff539fc">IMB_AUTH_CRC11_FP_HEADER</a></div><div class="ttdeci">@ IMB_AUTH_CRC11_FP_HEADER</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:428</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ab737fa5ff7244ddf5024905f6477ae01"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab737fa5ff7244ddf5024905f6477ae01">IMB_AUTH_CHACHA20_POLY1305</a></div><div class="ttdeci">@ IMB_AUTH_CHACHA20_POLY1305</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:416</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ab7f1372ade9da040caf195b13f2b79f0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab7f1372ade9da040caf195b13f2b79f0">IMB_AUTH_CRC7_FP_HEADER</a></div><div class="ttdeci">@ IMB_AUTH_CRC7_FP_HEADER</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:431</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ac27de87b2687b1e2a293544be6d3fab9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ac27de87b2687b1e2a293544be6d3fab9">IMB_AUTH_CRC10_IUUP_DATA</a></div><div class="ttdeci">@ IMB_AUTH_CRC10_IUUP_DATA</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:429</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca">IMB_AUTH_HMAC_SHA_224</a></div><div class="ttdeci">@ IMB_AUTH_HMAC_SHA_224</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:389</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ad3936131d6804e6c6aa3bd497ae675ab"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad3936131d6804e6c6aa3bd497ae675ab">IMB_AUTH_CRC32_WIMAX_OFDMA_DATA</a></div><div class="ttdeci">@ IMB_AUTH_CRC32_WIMAX_OFDMA_DATA</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:423</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1">IMB_AUTH_HMAC_SHA_512</a></div><div class="ttdeci">@ IMB_AUTH_HMAC_SHA_512</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:392</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ada7d3fc165b6855ae3e83467de9916b2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ada7d3fc165b6855ae3e83467de9916b2">IMB_AUTH_GCM_SGL</a></div><div class="ttdeci">@ IMB_AUTH_GCM_SGL</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:420</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77">IMB_AUTH_SHA_1</a></div><div class="ttdeci">@ IMB_AUTH_SHA_1</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:400</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66">IMB_AUTH_AES_GMAC_192</a></div><div class="ttdeci">@ IMB_AUTH_AES_GMAC_192</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:412</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc">IMB_AUTH_DOCSIS_CRC32</a></div><div class="ttdeci">@ IMB_AUTH_DOCSIS_CRC32</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:408</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ae62fe411b683840a5f25c199b66c7f42"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae62fe411b683840a5f25c199b66c7f42">IMB_AUTH_CRC8_WIMAX_OFDMA_HCS</a></div><div class="ttdeci">@ IMB_AUTH_CRC8_WIMAX_OFDMA_HCS</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:430</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af">IMB_AUTH_AES_GMAC_256</a></div><div class="ttdeci">@ IMB_AUTH_AES_GMAC_256</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:413</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9">IMB_AUTH_HMAC_SHA_384</a></div><div class="ttdeci">@ IMB_AUTH_HMAC_SHA_384</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:391</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48">IMB_AUTH_AES_CMAC</a></div><div class="ttdeci">@ IMB_AUTH_AES_CMAC</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:399</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc">IMB_AUTH_SHA_384</a></div><div class="ttdeci">@ IMB_AUTH_SHA_384</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:403</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006">IMB_HASH_ALG</a></div><div class="ttdeci">IMB_HASH_ALG</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:293</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a0d0cad9513b19110454c9e4e9c549205">IMB_AUTH_AES_CMAC_256</a></div><div class="ttdeci">@ IMB_AUTH_AES_CMAC_256</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:320</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a17deb61684701b7ec37f68bd34b6d454"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a17deb61684701b7ec37f68bd34b6d454">IMB_AUTH_AES_XCBC</a></div><div class="ttdeci">@ IMB_AUTH_AES_XCBC</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:299</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a188c2297dc5228820e690e8938cd407b">IMB_AUTH_ZUC_EIA3_BITLEN</a></div><div class="ttdeci">@ IMB_AUTH_ZUC_EIA3_BITLEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:313</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a189af960a1558b7ac3289c0892739ea0">IMB_AUTH_AES_GMAC_128</a></div><div class="ttdeci">@ IMB_AUTH_AES_GMAC_128</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:317</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a22e2e766cbec475508af01c6a722c2c3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a22e2e766cbec475508af01c6a722c2c3">IMB_AUTH_CRC16_X25</a></div><div class="ttdeci">@ IMB_AUTH_CRC16_X25</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:332</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a25f47297460775ab891a0abb8240b8e0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a25f47297460775ab891a0abb8240b8e0">IMB_AUTH_NULL</a></div><div class="ttdeci">@ IMB_AUTH_NULL</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:301</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a2fcc080535b4dd16502ecd2b01c14048"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a2fcc080535b4dd16502ecd2b01c14048">IMB_AUTH_PON_CRC_BIP</a></div><div class="ttdeci">@ IMB_AUTH_PON_CRC_BIP</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:312</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3936068075b4572d859c9b1984312325">IMB_AUTH_SHA_224</a></div><div class="ttdeci">@ IMB_AUTH_SHA_224</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:307</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a3a8aa07fe9f70ece22f9351db0f8bb31"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a3a8aa07fe9f70ece22f9351db0f8bb31">IMB_AUTH_CRC24_LTE_A</a></div><div class="ttdeci">@ IMB_AUTH_CRC24_LTE_A</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:330</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a421294f9a35f87e796f96b48257e6dc2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a421294f9a35f87e796f96b48257e6dc2">IMB_AUTH_CRC32_ETHERNET_FCS</a></div><div class="ttdeci">@ IMB_AUTH_CRC32_ETHERNET_FCS</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:327</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a42dc1dc990059b61ef784813e0f8f49a">IMB_AUTH_KASUMI_UIA1</a></div><div class="ttdeci">@ IMB_AUTH_KASUMI_UIA1</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:316</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a441cc344587709b2ff2fc26f36ff1e58">IMB_AUTH_HMAC_SHA_1</a></div><div class="ttdeci">@ IMB_AUTH_HMAC_SHA_1</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:294</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4962dbdf6fcb8d743e4ab55ce23c4b88">IMB_AUTH_SHA_256</a></div><div class="ttdeci">@ IMB_AUTH_SHA_256</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:308</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a4eadf3270a81eb2567388843da2fa89b">IMB_AUTH_SNOW3G_UIA2_BITLEN</a></div><div class="ttdeci">@ IMB_AUTH_SNOW3G_UIA2_BITLEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:315</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a53ff331c62b01fb8427e63e18fc433f6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff331c62b01fb8427e63e18fc433f6">IMB_AUTH_SNOW_V_AEAD</a></div><div class="ttdeci">@ IMB_AUTH_SNOW_V_AEAD</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:325</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a53ff8b335b5391fc33c80c076590de44"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a53ff8b335b5391fc33c80c076590de44">IMB_AUTH_CRC32_SCTP</a></div><div class="ttdeci">@ IMB_AUTH_CRC32_SCTP</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:328</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a5d34120f8a1c5cde857baf32536868af"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a5d34120f8a1c5cde857baf32536868af">IMB_AUTH_NUM</a></div><div class="ttdeci">@ IMB_AUTH_NUM</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:340</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a60c1e71108516903aded4534f0f2e995">IMB_AUTH_HMAC_SHA_256</a></div><div class="ttdeci">@ IMB_AUTH_HMAC_SHA_256</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:296</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a67297eacd4913bd65a1aae650c3a22e3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a67297eacd4913bd65a1aae650c3a22e3">IMB_AUTH_GHASH</a></div><div class="ttdeci">@ IMB_AUTH_GHASH</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:339</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a70151af8840242c8f5bdb375f2f1135b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a70151af8840242c8f5bdb375f2f1135b">IMB_AUTH_CUSTOM</a></div><div class="ttdeci">@ IMB_AUTH_CUSTOM</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:303</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a71119edfbe668d423e910b11c0efb712"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a71119edfbe668d423e910b11c0efb712">IMB_AUTH_CHACHA20_POLY1305_SGL</a></div><div class="ttdeci">@ IMB_AUTH_CHACHA20_POLY1305_SGL</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:323</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a77ccdf9abd97310f6808c8cf12c1a395"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a77ccdf9abd97310f6808c8cf12c1a395">IMB_AUTH_CRC24_LTE_B</a></div><div class="ttdeci">@ IMB_AUTH_CRC24_LTE_B</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:331</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a7c535075abfb0878168a00600a762fe0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a7c535075abfb0878168a00600a762fe0">IMB_AUTH_ZUC256_EIA3_BITLEN</a></div><div class="ttdeci">@ IMB_AUTH_ZUC256_EIA3_BITLEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:324</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a824187b143cb8d4b1778d10bcedbce3e">IMB_AUTH_AES_CCM</a></div><div class="ttdeci">@ IMB_AUTH_AES_CCM</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:304</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a88175070e077037332ad5cd5fdece46f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a88175070e077037332ad5cd5fdece46f">IMB_AUTH_CRC6_IUUP_HEADER</a></div><div class="ttdeci">@ IMB_AUTH_CRC6_IUUP_HEADER</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:338</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a93e6c082f7ec5926a087d139a2bd2e56"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a93e6c082f7ec5926a087d139a2bd2e56">IMB_AUTH_POLY1305</a></div><div class="ttdeci">@ IMB_AUTH_POLY1305</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:321</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006a958fb278e4745955ebc791ba652954fe">IMB_AUTH_MD5</a></div><div class="ttdeci">@ IMB_AUTH_MD5</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:300</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa12aca10078adbe0bc2a021190663e2d">IMB_AUTH_SHA_512</a></div><div class="ttdeci">@ IMB_AUTH_SHA_512</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:310</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006aa1496e45f00afe54aeeb527089e14a0d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa1496e45f00afe54aeeb527089e14a0d">IMB_AUTH_AES_GMAC</a></div><div class="ttdeci">@ IMB_AUTH_AES_GMAC</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:302</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006aa78e695260f8fe6bb56d242771624ccc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa78e695260f8fe6bb56d242771624ccc">IMB_AUTH_CRC16_FP_DATA</a></div><div class="ttdeci">@ IMB_AUTH_CRC16_FP_DATA</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:333</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aa9a94b55feed30ce57ecadf17b7c1a83">IMB_AUTH_AES_CMAC_BITLEN</a></div><div class="ttdeci">@ IMB_AUTH_AES_CMAC_BITLEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:311</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ab0f02ac14a03f137a83bb7d6dff539fc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab0f02ac14a03f137a83bb7d6dff539fc">IMB_AUTH_CRC11_FP_HEADER</a></div><div class="ttdeci">@ IMB_AUTH_CRC11_FP_HEADER</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:334</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ab737fa5ff7244ddf5024905f6477ae01"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab737fa5ff7244ddf5024905f6477ae01">IMB_AUTH_CHACHA20_POLY1305</a></div><div class="ttdeci">@ IMB_AUTH_CHACHA20_POLY1305</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:322</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ab7f1372ade9da040caf195b13f2b79f0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ab7f1372ade9da040caf195b13f2b79f0">IMB_AUTH_CRC7_FP_HEADER</a></div><div class="ttdeci">@ IMB_AUTH_CRC7_FP_HEADER</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:337</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ac27de87b2687b1e2a293544be6d3fab9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ac27de87b2687b1e2a293544be6d3fab9">IMB_AUTH_CRC10_IUUP_DATA</a></div><div class="ttdeci">@ IMB_AUTH_CRC10_IUUP_DATA</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:335</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad0ad42ef3cb8cef38a29bcc667e70fca">IMB_AUTH_HMAC_SHA_224</a></div><div class="ttdeci">@ IMB_AUTH_HMAC_SHA_224</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:295</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ad3936131d6804e6c6aa3bd497ae675ab"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad3936131d6804e6c6aa3bd497ae675ab">IMB_AUTH_CRC32_WIMAX_OFDMA_DATA</a></div><div class="ttdeci">@ IMB_AUTH_CRC32_WIMAX_OFDMA_DATA</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:329</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ad8f7bc68ad10fe75665692a27ada55f1">IMB_AUTH_HMAC_SHA_512</a></div><div class="ttdeci">@ IMB_AUTH_HMAC_SHA_512</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:298</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ada7d3fc165b6855ae3e83467de9916b2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ada7d3fc165b6855ae3e83467de9916b2">IMB_AUTH_GCM_SGL</a></div><div class="ttdeci">@ IMB_AUTH_GCM_SGL</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:326</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adcaf4a43c9c114bcdb75ff44ba1bea77">IMB_AUTH_SHA_1</a></div><div class="ttdeci">@ IMB_AUTH_SHA_1</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:306</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006adfd8db9df85ef929d9e4a38612f07d66">IMB_AUTH_AES_GMAC_192</a></div><div class="ttdeci">@ IMB_AUTH_AES_GMAC_192</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:318</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae006c86697198ca852fc612d376135dc">IMB_AUTH_DOCSIS_CRC32</a></div><div class="ttdeci">@ IMB_AUTH_DOCSIS_CRC32</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:314</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ae62fe411b683840a5f25c199b66c7f42"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae62fe411b683840a5f25c199b66c7f42">IMB_AUTH_CRC8_WIMAX_OFDMA_HCS</a></div><div class="ttdeci">@ IMB_AUTH_CRC8_WIMAX_OFDMA_HCS</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:336</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae6fab01dbaf8b0110ca8ccdce98547af">IMB_AUTH_AES_GMAC_256</a></div><div class="ttdeci">@ IMB_AUTH_AES_GMAC_256</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:319</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006ae98f8f8e42b7a026bb2aa2a402a291b9">IMB_AUTH_HMAC_SHA_384</a></div><div class="ttdeci">@ IMB_AUTH_HMAC_SHA_384</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:297</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006aed85279dbff19be59c16216364375a48">IMB_AUTH_AES_CMAC</a></div><div class="ttdeci">@ IMB_AUTH_AES_CMAC</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:305</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a83132be2c4a6bf0453550bd1ae720006afe74859581d19e70b8667773662081bc">IMB_AUTH_SHA_384</a></div><div class="ttdeci">@ IMB_AUTH_SHA_384</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:309</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a84e76bdfb5a69dba7b515dd0b4fb4312"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a84e76bdfb5a69dba7b515dd0b4fb4312">aes_keyexp_128_enc_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_128_enc_avx2(const void *key, void *enc_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a873a75e2175acd3741b5cfc41180fe2c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a873a75e2175acd3741b5cfc41180fe2c">aes_gcm_enc_256_finalize_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_256_finalize_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End encryption of a AES-GCM-256 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a8913995859e45005f8de57a3456c93cf"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8913995859e45005f8de57a3456c93cf">submit_job_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * submit_job_avx2(IMB_MGR *state)</div><div class="ttdoc">Submit job for processing after validating.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a89fe975f0388b71765be494d04b034f4"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a89fe975f0388b71765be494d04b034f4">kasumi_f8_1_buffer_t</a></div><div class="ttdeci">void(* kasumi_f8_1_buffer_t)(const kasumi_key_sched_t *, const uint64_t, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:873</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a89f9807d10f3459444bb649caf9b64ca"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a89f9807d10f3459444bb649caf9b64ca">imb_quic_hp_aes_ecb</a></div><div class="ttdeci">IMB_DLL_EXPORT void imb_quic_hp_aes_ecb(IMB_MGR *state, const void *exp_key_data, void *dst_ptr_array[], const void *const src_ptr_array[], const uint64_t num_packets, const IMB_KEY_SIZE_BYTES key_size)</div><div class="ttdoc">Batch of AES-ECB encrypt/decrypt operations with the same key.</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a89fe975f0388b71765be494d04b034f4"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a89fe975f0388b71765be494d04b034f4">kasumi_f8_1_buffer_t</a></div><div class="ttdeci">void(* kasumi_f8_1_buffer_t)(const kasumi_key_sched_t *, const uint64_t, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:790</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a8a540000c08366ad47d95e23ed5b2918"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8a540000c08366ad47d95e23ed5b2918">queue_size_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT uint32_t queue_size_avx2(IMB_MGR *state)</div><div class="ttdoc">Get number of jobs queued to be processed.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a8b02114f003b5fe0e1ccbfdc13ac55e4"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8b02114f003b5fe0e1ccbfdc13ac55e4">kasumi_f9_1_buffer_t</a></div><div class="ttdeci">void(* kasumi_f9_1_buffer_t)(const kasumi_key_sched_t *, const void *, const uint32_t, void *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:909</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a8b30db8462aca1c039c3fd20646f342c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8b30db8462aca1c039c3fd20646f342c">kasumi_init_f9_key_sched_t</a></div><div class="ttdeci">int(* kasumi_init_f9_key_sched_t)(const void *, kasumi_key_sched_t *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:914</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a8b02114f003b5fe0e1ccbfdc13ac55e4"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8b02114f003b5fe0e1ccbfdc13ac55e4">kasumi_f9_1_buffer_t</a></div><div class="ttdeci">void(* kasumi_f9_1_buffer_t)(const kasumi_key_sched_t *, const void *, const uint32_t, void *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:826</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a8b30db8462aca1c039c3fd20646f342c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8b30db8462aca1c039c3fd20646f342c">kasumi_init_f9_key_sched_t</a></div><div class="ttdeci">int(* kasumi_init_f9_key_sched_t)(const void *, kasumi_key_sched_t *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:831</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a8b912812c65f4d3b592875cdd233704d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8b912812c65f4d3b592875cdd233704d">md5_one_block_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void md5_one_block_avx2(const void *data, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a8c85430db7a8b695a2836dcb96653bc5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a></div><div class="ttdeci">void(* aes_gcm_enc_dec_finalize_t)(const struct gcm_key_data *, struct gcm_context_data *, uint8_t *, uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:826</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a8c85430db7a8b695a2836dcb96653bc5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5">aes_gcm_enc_dec_finalize_t</a></div><div class="ttdeci">void(* aes_gcm_enc_dec_finalize_t)(const struct gcm_key_data *, struct gcm_context_data *, uint8_t *, uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:743</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a8c9a7e51599dbce89a416e0d8422742b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8c9a7e51599dbce89a416e0d8422742b">aes_gcm_dec_128_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_128_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-128 Decryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a8d225d08a5cf144208dacb155e192cb6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8d225d08a5cf144208dacb155e192cb6">aes_gcm_init_128_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_init_128_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</div><div class="ttdoc">Initialize a gcm_context_data structure to prepare for AES-GCM-128 Encryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a8e2bc4fff9de3c70ac140ff30e1cdce0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8e2bc4fff9de3c70ac140ff30e1cdce0">aes_gcm_dec_128_finalize_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_128_finalize_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End decryption of a AES-GCM-128 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a908b9e33df6e434c4bb0c74fa20ceece"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a908b9e33df6e434c4bb0c74fa20ceece">sha384_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha384_avx512(const void *data, const uint64_t length, void *digest)</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a8faae8f9387983904125d862c4cac9ab"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a8faae8f9387983904125d862c4cac9ab">imb_quic_aes_gcm</a></div><div class="ttdeci">IMB_DLL_EXPORT void imb_quic_aes_gcm(IMB_MGR *state, const struct gcm_key_data *key_data, const IMB_KEY_SIZE_BYTES key_size, const IMB_CIPHER_DIRECTION cipher_dir, void *dst_ptr_array[], const void *const src_ptr_array[], const uint64_t len_array[], const void *const iv_ptr_array[], const void *const aad_ptr_array[], const uint64_t aad_len, void *tag_ptr_array[], const uint64_t tag_len, const uint64_t num_packets)</div><div class="ttdoc">Batch of GCM encrypt/decrypt operations with the same key.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a93e7a99927bc37fb4cb03f966fa4ebdd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a93e7a99927bc37fb4cb03f966fa4ebdd">snow3g_f9_iv_gen</a></div><div class="ttdeci">IMB_DLL_EXPORT int snow3g_f9_iv_gen(const uint32_t count, const uint32_t fresh, const uint8_t dir, void *iv_ptr)</div><div class="ttdoc">Generation of SNOW3G F9 Initialization Vector.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a9478828dde5161c2a1b43cb0da0f9f67"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a9478828dde5161c2a1b43cb0da0f9f67">sha1_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha1_avx(const void *data, const uint64_t length, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a950bf3b7a3c63a371b561ea20aaf3a18"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a950bf3b7a3c63a371b561ea20aaf3a18">submit_job_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * submit_job_avx(IMB_MGR *state)</div><div class="ttdoc">Submit job for processing after validating.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a95ed5580686f708ba2313179cd6064a8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a95ed5580686f708ba2313179cd6064a8">zuc_eia3_1_buffer_t</a></div><div class="ttdeci">void(* zuc_eia3_1_buffer_t)(const void *, const void *, const void *, const uint32_t, uint32_t *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:864</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a95ed5580686f708ba2313179cd6064a8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a95ed5580686f708ba2313179cd6064a8">zuc_eia3_1_buffer_t</a></div><div class="ttdeci">void(* zuc_eia3_1_buffer_t)(const void *, const void *, const void *, const uint32_t, uint32_t *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:781</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a96b880b8a32b0466f880d4f22d95cc3b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a96b880b8a32b0466f880d4f22d95cc3b">flush_job_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * flush_job_sse(IMB_MGR *state)</div><div class="ttdoc">Force processing until next job in queue is completed.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a986643689f56109161597f67eb9d7b40"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a></div><div class="ttdeci">#define IMB_DLL_EXPORT</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:86</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a9884ae92b598dd504f7d0ef8be5051d6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a9884ae92b598dd504f7d0ef8be5051d6">queue_size_t</a></div><div class="ttdeci">uint32_t(* queue_size_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:784</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a986643689f56109161597f67eb9d7b40"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a></div><div class="ttdeci">#define IMB_DLL_EXPORT</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:86</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_a9884ae92b598dd504f7d0ef8be5051d6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a9884ae92b598dd504f7d0ef8be5051d6">queue_size_t</a></div><div class="ttdeci">uint32_t(* queue_size_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:700</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a98932a3c61d798b0c8a560dcc3dce16f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a98932a3c61d798b0c8a560dcc3dce16f">init_mb_mgr_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void init_mb_mgr_avx512(IMB_MGR *state)</div><div class="ttdoc">Initialize Multi-Buffer Manager structure.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a9911462fe4689c7420b827bb13fc3440"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a9911462fe4689c7420b827bb13fc3440">des_key_schedule</a></div><div class="ttdeci">IMB_DLL_EXPORT int des_key_schedule(uint64_t *ks, const void *key)</div><div class="ttdoc">DES key schedule set up.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a99310b73bc9cde6b69b682e72cd0efc1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a99310b73bc9cde6b69b682e72cd0efc1">aes_gcm_init_256_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_init_256_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</div><div class="ttdoc">Initialize a gcm_context_data structure to prepare for AES-GCM-256 Encryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a99f608f81f6b692eaeea1d68cac25a28"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a99f608f81f6b692eaeea1d68cac25a28">sha1_one_block_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha1_one_block_sse(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a9b462a3c00471e4338f0bae7d5abbda7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a9b462a3c00471e4338f0bae7d5abbda7">aes_gcm_enc_192_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_192_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-192 Encryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a9b79136dc5996baf598e3aeee520871c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a9b79136dc5996baf598e3aeee520871c">aes_gcm_dec_256_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_256_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-256 Decryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a9b7faaf3e5235d0a3c4b784f1035896d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a9b7faaf3e5235d0a3c4b784f1035896d">aes_keyexp_128_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_128_avx512(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a9d115c47670330bd01b960f2188169d9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a9d115c47670330bd01b960f2188169d9">get_completed_job_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * get_completed_job_avx(IMB_MGR *state)</div><div class="ttdoc">Get next completed job.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a9d883a3a629240fe86efedd180294433"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a9d883a3a629240fe86efedd180294433">md5_one_block_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void md5_one_block_sse(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_a9fb47323b270bffc87ad8e77985e827d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a9fb47323b270bffc87ad8e77985e827d">aes_keyexp_256_enc_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_256_enc_avx512(const void *key, void *enc_exp_keys)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0b">IMB_ERR</a></div><div class="ttdeci">IMB_ERR</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:178</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38">IMB_ERR_NULL_JOB</a></div><div class="ttdeci">@ IMB_ERR_NULL_JOB</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:226</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba05f9212af539a22ad65b12a9abc8e5c0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba05f9212af539a22ad65b12a9abc8e5c0">IMB_ERR_JOB_NULL_SGL_CTX</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_SGL_CTX</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:198</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba0ad3ade3fe22c5887d9bf444ff3923aa"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0ad3ade3fe22c5887d9bf444ff3923aa">IMB_ERR_AAD_LEN</a></div><div class="ttdeci">@ IMB_ERR_AAD_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:213</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba0b57ec134f6e10e11c3fbcf77ede282d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0b57ec134f6e10e11c3fbcf77ede282d">IMB_ERR_NULL_CTX</a></div><div class="ttdeci">@ IMB_ERR_NULL_CTX</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:216</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba0d35070d6476cde0202deb5531ae09c2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0d35070d6476cde0202deb5531ae09c2">IMB_ERR_JOB_NULL_IV</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_IV</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:184</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba15f55e87bb42cf5494dd01b9a1c4d712"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba15f55e87bb42cf5494dd01b9a1c4d712">IMB_ERR_JOB_NULL_HMAC_IPAD</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_HMAC_IPAD</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:219</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba1a61dcc99a1a9725c89076dec3c02e02"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1a61dcc99a1a9725c89076dec3c02e02">IMB_ERR_NULL_DST</a></div><div class="ttdeci">@ IMB_ERR_NULL_DST</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:202</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba1b7e4c43808275e9cd63ca21091e5ab2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1b7e4c43808275e9cd63ca21091e5ab2">IMB_ERR_JOB_AUTH_TAG_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_AUTH_TAG_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:191</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba1e20954ec8a501093175d640631550c1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1e20954ec8a501093175d640631550c1">IMB_ERR_NULL_AUTH</a></div><div class="ttdeci">@ IMB_ERR_NULL_AUTH</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:206</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba207979780b5d8472dfef2f5e12998d22"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba207979780b5d8472dfef2f5e12998d22">IMB_ERR_JOB_SRC_OFFSET</a></div><div class="ttdeci">@ IMB_ERR_JOB_SRC_OFFSET</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:193</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba20dfbdc8feb8332a9efe51de48fa6e09"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba20dfbdc8feb8332a9efe51de48fa6e09">IMB_ERR_SRC_OFFSET</a></div><div class="ttdeci">@ IMB_ERR_SRC_OFFSET</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:214</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba22402460340d6b34492ece390a7913c0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba22402460340d6b34492ece390a7913c0">IMB_ERR_JOB_NULL_KEY</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_KEY</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:183</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba308819b7cbdadfd6bbee290408880302"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba308819b7cbdadfd6bbee290408880302">IMB_ERR_NULL_SRC</a></div><div class="ttdeci">@ IMB_ERR_NULL_SRC</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:201</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba31a6b672b95d7d100a97fa6d788c0dd6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba31a6b672b95d7d100a97fa6d788c0dd6">IMB_ERR_JOB_AAD_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_AAD_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:192</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba390f91827f87bbd3233ad6e1f104b2b4"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba390f91827f87bbd3233ad6e1f104b2b4">IMB_ERR_JOB_IV_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_IV_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:189</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba3b60a570372529486da69c6d2b7be382"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3b60a570372529486da69c6d2b7be382">IMB_ERR_NULL_EXP_KEY</a></div><div class="ttdeci">@ IMB_ERR_NULL_EXP_KEY</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:204</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba3ef3d3180e3052862c796cf89320d60c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3ef3d3180e3052862c796cf89320d60c">IMB_ERR_JOB_NULL_AAD</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_AAD</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:186</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba3f9d55f356a0caf413d2114a468ba659"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3f9d55f356a0caf413d2114a468ba659">IMB_ERR_MIN</a></div><div class="ttdeci">@ IMB_ERR_MIN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:179</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba4496bf14e2ddf1133a384f9fbf96d5dc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4496bf14e2ddf1133a384f9fbf96d5dc">IMB_ERR_NO_AESNI_EMU</a></div><div class="ttdeci">@ IMB_ERR_NO_AESNI_EMU</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:217</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba4bc6a784afa9bb88c5afe4fd1b5f610d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4bc6a784afa9bb88c5afe4fd1b5f610d">IMB_ERR_JOB_NULL_SRC</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_SRC</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:181</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba503544043c60c2195003c00b18141beb"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba503544043c60c2195003c00b18141beb">IMB_ERR_JOB_NULL_AUTH</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_AUTH</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:185</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba55b3ddc1a48cb14ad020031b8d5b4927"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba55b3ddc1a48cb14ad020031b8d5b4927">IMB_ERR_JOB_NULL_DST</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_DST</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:182</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba61a411feda0e8cf5aff8c58ad2e92bdd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba61a411feda0e8cf5aff8c58ad2e92bdd">IMB_ERR_CIPH_MODE</a></div><div class="ttdeci">@ IMB_ERR_CIPH_MODE</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:195</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba63029e3673eef74345ad80867f7ba0ef"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba63029e3673eef74345ad80867f7ba0ef">IMB_ERR_NULL_KEY</a></div><div class="ttdeci">@ IMB_ERR_NULL_KEY</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:203</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba69bf9e54fdf84b154284eab071c98804"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69bf9e54fdf84b154284eab071c98804">IMB_ERR_JOB_NULL_XCBC_K1_EXP</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_XCBC_K1_EXP</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:220</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba69dd17473dc4afb2f04c417fe6882608"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69dd17473dc4afb2f04c417fe6882608">IMB_ERR_JOB_AUTH_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_AUTH_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:188</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba6af5bd8fb7690b46afe3d2c1e623808e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6af5bd8fb7690b46afe3d2c1e623808e">IMB_ERR_AUTH_TAG_LEN</a></div><div class="ttdeci">@ IMB_ERR_AUTH_TAG_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:212</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9">IMB_ERR_JOB_NULL_GHASH_INIT_TAG</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_GHASH_INIT_TAG</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:224</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba8ac2802661bd9928d0c766129db2a814"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8ac2802661bd9928d0c766129db2a814">IMB_ERR_HASH_ALGO</a></div><div class="ttdeci">@ IMB_ERR_HASH_ALGO</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:196</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba8d6b3ea721216bb12fbe40e72a5bd768"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8d6b3ea721216bb12fbe40e72a5bd768">IMB_ERR_KEY_LEN</a></div><div class="ttdeci">@ IMB_ERR_KEY_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:211</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba97fb89f93299f67de86aac919bb83aa9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba97fb89f93299f67de86aac919bb83aa9">IMB_ERR_JOB_NULL_AUTH_KEY</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_AUTH_KEY</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:197</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba983561202b1623b0bd1f691bd6036039"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba983561202b1623b0bd1f691bd6036039">IMB_ERR_JOB_NULL_NEXT_IV</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_NEXT_IV</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:199</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba9ba69cc32a2d17e3e7b4d4c982f26abd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba9ba69cc32a2d17e3e7b4d4c982f26abd">IMB_ERR_NULL_MBMGR</a></div><div class="ttdeci">@ IMB_ERR_NULL_MBMGR</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:180</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0baa4f5aeab78ed40a4c19389b8f691306c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baa4f5aeab78ed40a4c19389b8f691306c">IMB_ERR_NULL_AUTH_KEY</a></div><div class="ttdeci">@ IMB_ERR_NULL_AUTH_KEY</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:215</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0baac8500b58709f0bd05ad129337bb6af2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baac8500b58709f0bd05ad129337bb6af2">IMB_ERR_IV_LEN</a></div><div class="ttdeci">@ IMB_ERR_IV_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:210</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bab5a2b4c1df7778c3efc236976062ed94"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bab5a2b4c1df7778c3efc236976062ed94">IMB_ERR_CIPH_LEN</a></div><div class="ttdeci">@ IMB_ERR_CIPH_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:208</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60">IMB_ERR_MISSING_CPUFLAGS_INIT_MGR</a></div><div class="ttdeci">@ IMB_ERR_MISSING_CPUFLAGS_INIT_MGR</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:225</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6">IMB_ERR_MAX</a></div><div class="ttdeci">@ IMB_ERR_MAX</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:228</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bacaec18a061b4bf792178408d69775950"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacaec18a061b4bf792178408d69775950">IMB_ERR_JOB_CHAIN_ORDER</a></div><div class="ttdeci">@ IMB_ERR_JOB_CHAIN_ORDER</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:194</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bacb9286af7533993ab79982b288aab97a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacb9286af7533993ab79982b288aab97a">IMB_ERR_JOB_NULL_HMAC_OPAD</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_HMAC_OPAD</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:218</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bacbf5d148be9963df1d46400ff26396db"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacbf5d148be9963df1d46400ff26396db">IMB_ERR_JOB_CIPH_DIR</a></div><div class="ttdeci">@ IMB_ERR_JOB_CIPH_DIR</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:223</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bace7e834842ddef5b063c99544d00b303"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bace7e834842ddef5b063c99544d00b303">IMB_ERR_JOB_PON_PLI</a></div><div class="ttdeci">@ IMB_ERR_JOB_PON_PLI</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:200</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bad7fbd09092821fb8605e11384dcdc428"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bad7fbd09092821fb8605e11384dcdc428">IMB_ERR_JOB_NULL_XCBC_K2</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_XCBC_K2</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:221</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0badc7d17d90012d5c14fd8a12d9ea12543"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badc7d17d90012d5c14fd8a12d9ea12543">IMB_ERR_NULL_AAD</a></div><div class="ttdeci">@ IMB_ERR_NULL_AAD</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:207</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0badfea107da94936d30900f23ad22b5285"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badfea107da94936d30900f23ad22b5285">IMB_ERR_JOB_KEY_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_KEY_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:190</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bae1c9e58d4be3fdd7bb37247667472920"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae1c9e58d4be3fdd7bb37247667472920">IMB_ERR_JOB_CIPH_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_CIPH_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:187</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0baf12955208a99c8feeeb580fee940b7c3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baf12955208a99c8feeeb580fee940b7c3">IMB_ERR_JOB_NULL_XCBC_K3</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_XCBC_K3</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:222</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bafcfe882ee9730fd1724b587106f2f419"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafcfe882ee9730fd1724b587106f2f419">IMB_ERR_NULL_IV</a></div><div class="ttdeci">@ IMB_ERR_NULL_IV</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:205</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bafe5af1c17e1caece14b3a5f659a1336d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafe5af1c17e1caece14b3a5f659a1336d">IMB_ERR_AUTH_LEN</a></div><div class="ttdeci">@ IMB_ERR_AUTH_LEN</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:209</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0b">IMB_ERR</a></div><div class="ttdeci">IMB_ERR</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:192</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba007c436f8e21f317e8f9225c5b009d38">IMB_ERR_NULL_JOB</a></div><div class="ttdeci">@ IMB_ERR_NULL_JOB</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:240</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba05f9212af539a22ad65b12a9abc8e5c0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba05f9212af539a22ad65b12a9abc8e5c0">IMB_ERR_JOB_NULL_SGL_CTX</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_SGL_CTX</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:212</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba0ad3ade3fe22c5887d9bf444ff3923aa"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0ad3ade3fe22c5887d9bf444ff3923aa">IMB_ERR_AAD_LEN</a></div><div class="ttdeci">@ IMB_ERR_AAD_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:227</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba0b57ec134f6e10e11c3fbcf77ede282d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0b57ec134f6e10e11c3fbcf77ede282d">IMB_ERR_NULL_CTX</a></div><div class="ttdeci">@ IMB_ERR_NULL_CTX</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:230</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba0d35070d6476cde0202deb5531ae09c2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba0d35070d6476cde0202deb5531ae09c2">IMB_ERR_JOB_NULL_IV</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_IV</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:198</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba15f55e87bb42cf5494dd01b9a1c4d712"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba15f55e87bb42cf5494dd01b9a1c4d712">IMB_ERR_JOB_NULL_HMAC_IPAD</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_HMAC_IPAD</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:233</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba1873d38b8aaf5ebcd3f542b15c418829"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1873d38b8aaf5ebcd3f542b15c418829">IMB_ERR_SELFTEST</a></div><div class="ttdeci">@ IMB_ERR_SELFTEST</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:245</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba1a61dcc99a1a9725c89076dec3c02e02"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1a61dcc99a1a9725c89076dec3c02e02">IMB_ERR_NULL_DST</a></div><div class="ttdeci">@ IMB_ERR_NULL_DST</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:216</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba1b7e4c43808275e9cd63ca21091e5ab2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1b7e4c43808275e9cd63ca21091e5ab2">IMB_ERR_JOB_AUTH_TAG_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_AUTH_TAG_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:205</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba1e20954ec8a501093175d640631550c1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba1e20954ec8a501093175d640631550c1">IMB_ERR_NULL_AUTH</a></div><div class="ttdeci">@ IMB_ERR_NULL_AUTH</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:220</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba207979780b5d8472dfef2f5e12998d22"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba207979780b5d8472dfef2f5e12998d22">IMB_ERR_JOB_SRC_OFFSET</a></div><div class="ttdeci">@ IMB_ERR_JOB_SRC_OFFSET</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:207</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba20dfbdc8feb8332a9efe51de48fa6e09"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba20dfbdc8feb8332a9efe51de48fa6e09">IMB_ERR_SRC_OFFSET</a></div><div class="ttdeci">@ IMB_ERR_SRC_OFFSET</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:228</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba22402460340d6b34492ece390a7913c0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba22402460340d6b34492ece390a7913c0">IMB_ERR_JOB_NULL_KEY</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_KEY</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:197</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba308819b7cbdadfd6bbee290408880302"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba308819b7cbdadfd6bbee290408880302">IMB_ERR_NULL_SRC</a></div><div class="ttdeci">@ IMB_ERR_NULL_SRC</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:215</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba31a6b672b95d7d100a97fa6d788c0dd6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba31a6b672b95d7d100a97fa6d788c0dd6">IMB_ERR_JOB_AAD_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_AAD_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:206</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba390f91827f87bbd3233ad6e1f104b2b4"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba390f91827f87bbd3233ad6e1f104b2b4">IMB_ERR_JOB_IV_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_IV_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:203</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba3b60a570372529486da69c6d2b7be382"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3b60a570372529486da69c6d2b7be382">IMB_ERR_NULL_EXP_KEY</a></div><div class="ttdeci">@ IMB_ERR_NULL_EXP_KEY</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:218</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba3ef3d3180e3052862c796cf89320d60c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3ef3d3180e3052862c796cf89320d60c">IMB_ERR_JOB_NULL_AAD</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_AAD</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:200</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba3f9d55f356a0caf413d2114a468ba659"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba3f9d55f356a0caf413d2114a468ba659">IMB_ERR_MIN</a></div><div class="ttdeci">@ IMB_ERR_MIN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:193</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba436eb6f9e045a02e3ad5998da8c13d78"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba436eb6f9e045a02e3ad5998da8c13d78">IMB_ERR_BURST_SUITE_ID</a></div><div class="ttdeci">@ IMB_ERR_BURST_SUITE_ID</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:246</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba4496bf14e2ddf1133a384f9fbf96d5dc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4496bf14e2ddf1133a384f9fbf96d5dc">IMB_ERR_NO_AESNI_EMU</a></div><div class="ttdeci">@ IMB_ERR_NO_AESNI_EMU</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:231</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba4bc6a784afa9bb88c5afe4fd1b5f610d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4bc6a784afa9bb88c5afe4fd1b5f610d">IMB_ERR_JOB_NULL_SRC</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_SRC</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:195</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba4f73ed8232981b84df1fee21024e01ac"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba4f73ed8232981b84df1fee21024e01ac">IMB_ERR_QUEUE_SPACE</a></div><div class="ttdeci">@ IMB_ERR_QUEUE_SPACE</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:241</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba503544043c60c2195003c00b18141beb"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba503544043c60c2195003c00b18141beb">IMB_ERR_JOB_NULL_AUTH</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_AUTH</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:199</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba55b3ddc1a48cb14ad020031b8d5b4927"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba55b3ddc1a48cb14ad020031b8d5b4927">IMB_ERR_JOB_NULL_DST</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_DST</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:196</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba61a411feda0e8cf5aff8c58ad2e92bdd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba61a411feda0e8cf5aff8c58ad2e92bdd">IMB_ERR_CIPH_MODE</a></div><div class="ttdeci">@ IMB_ERR_CIPH_MODE</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:209</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba63029e3673eef74345ad80867f7ba0ef"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba63029e3673eef74345ad80867f7ba0ef">IMB_ERR_NULL_KEY</a></div><div class="ttdeci">@ IMB_ERR_NULL_KEY</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:217</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba69bf9e54fdf84b154284eab071c98804"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69bf9e54fdf84b154284eab071c98804">IMB_ERR_JOB_NULL_XCBC_K1_EXP</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_XCBC_K1_EXP</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:234</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba69dd17473dc4afb2f04c417fe6882608"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba69dd17473dc4afb2f04c417fe6882608">IMB_ERR_JOB_AUTH_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_AUTH_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:202</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba6af5bd8fb7690b46afe3d2c1e623808e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6af5bd8fb7690b46afe3d2c1e623808e">IMB_ERR_AUTH_TAG_LEN</a></div><div class="ttdeci">@ IMB_ERR_AUTH_TAG_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:226</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba6c97704719f286b14204ca144bbdc7a9">IMB_ERR_JOB_NULL_GHASH_INIT_TAG</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_GHASH_INIT_TAG</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:238</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba8ac2802661bd9928d0c766129db2a814"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8ac2802661bd9928d0c766129db2a814">IMB_ERR_HASH_ALGO</a></div><div class="ttdeci">@ IMB_ERR_HASH_ALGO</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:210</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba8d6b3ea721216bb12fbe40e72a5bd768"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba8d6b3ea721216bb12fbe40e72a5bd768">IMB_ERR_KEY_LEN</a></div><div class="ttdeci">@ IMB_ERR_KEY_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:225</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba97fb89f93299f67de86aac919bb83aa9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba97fb89f93299f67de86aac919bb83aa9">IMB_ERR_JOB_NULL_AUTH_KEY</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_AUTH_KEY</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:211</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba983561202b1623b0bd1f691bd6036039"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba983561202b1623b0bd1f691bd6036039">IMB_ERR_JOB_NULL_NEXT_IV</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_NEXT_IV</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:213</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba99d845a176cd571dd6f99b0a430291c6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba99d845a176cd571dd6f99b0a430291c6">IMB_ERR_NULL_BURST</a></div><div class="ttdeci">@ IMB_ERR_NULL_BURST</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:242</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0ba9ba69cc32a2d17e3e7b4d4c982f26abd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0ba9ba69cc32a2d17e3e7b4d4c982f26abd">IMB_ERR_NULL_MBMGR</a></div><div class="ttdeci">@ IMB_ERR_NULL_MBMGR</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:194</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0baa4f5aeab78ed40a4c19389b8f691306c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baa4f5aeab78ed40a4c19389b8f691306c">IMB_ERR_NULL_AUTH_KEY</a></div><div class="ttdeci">@ IMB_ERR_NULL_AUTH_KEY</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:229</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0baac8500b58709f0bd05ad129337bb6af2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baac8500b58709f0bd05ad129337bb6af2">IMB_ERR_IV_LEN</a></div><div class="ttdeci">@ IMB_ERR_IV_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:224</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bab5a2b4c1df7778c3efc236976062ed94"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bab5a2b4c1df7778c3efc236976062ed94">IMB_ERR_CIPH_LEN</a></div><div class="ttdeci">@ IMB_ERR_CIPH_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:222</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0babdd0b7bc92e7dcf166d36a9bcd118d60">IMB_ERR_MISSING_CPUFLAGS_INIT_MGR</a></div><div class="ttdeci">@ IMB_ERR_MISSING_CPUFLAGS_INIT_MGR</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:239</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bac773be615f9904fd69e961451fb0fac6">IMB_ERR_MAX</a></div><div class="ttdeci">@ IMB_ERR_MAX</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:248</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bacaec18a061b4bf792178408d69775950"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacaec18a061b4bf792178408d69775950">IMB_ERR_JOB_CHAIN_ORDER</a></div><div class="ttdeci">@ IMB_ERR_JOB_CHAIN_ORDER</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:208</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bacb9286af7533993ab79982b288aab97a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacb9286af7533993ab79982b288aab97a">IMB_ERR_JOB_NULL_HMAC_OPAD</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_HMAC_OPAD</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:232</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bacbf5d148be9963df1d46400ff26396db"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bacbf5d148be9963df1d46400ff26396db">IMB_ERR_JOB_CIPH_DIR</a></div><div class="ttdeci">@ IMB_ERR_JOB_CIPH_DIR</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:237</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bace7e834842ddef5b063c99544d00b303"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bace7e834842ddef5b063c99544d00b303">IMB_ERR_JOB_PON_PLI</a></div><div class="ttdeci">@ IMB_ERR_JOB_PON_PLI</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:214</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bad7fbd09092821fb8605e11384dcdc428"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bad7fbd09092821fb8605e11384dcdc428">IMB_ERR_JOB_NULL_XCBC_K2</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_XCBC_K2</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:235</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0badc7d17d90012d5c14fd8a12d9ea12543"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badc7d17d90012d5c14fd8a12d9ea12543">IMB_ERR_NULL_AAD</a></div><div class="ttdeci">@ IMB_ERR_NULL_AAD</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:221</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0badfea107da94936d30900f23ad22b5285"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0badfea107da94936d30900f23ad22b5285">IMB_ERR_JOB_KEY_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_KEY_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:204</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bae1c9e58d4be3fdd7bb37247667472920"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae1c9e58d4be3fdd7bb37247667472920">IMB_ERR_JOB_CIPH_LEN</a></div><div class="ttdeci">@ IMB_ERR_JOB_CIPH_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:201</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bae2bc238b157942636836eaf0eedb5ddf"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae2bc238b157942636836eaf0eedb5ddf">IMB_ERR_BURST_SIZE</a></div><div class="ttdeci">@ IMB_ERR_BURST_SIZE</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:243</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bae4584575cf7134ba02ca1d38bb3f6444"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bae4584575cf7134ba02ca1d38bb3f6444">IMB_ERR_BURST_OOO</a></div><div class="ttdeci">@ IMB_ERR_BURST_OOO</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:244</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0baf12955208a99c8feeeb580fee940b7c3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0baf12955208a99c8feeeb580fee940b7c3">IMB_ERR_JOB_NULL_XCBC_K3</a></div><div class="ttdeci">@ IMB_ERR_JOB_NULL_XCBC_K3</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:236</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bafcfe882ee9730fd1724b587106f2f419"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafcfe882ee9730fd1724b587106f2f419">IMB_ERR_NULL_IV</a></div><div class="ttdeci">@ IMB_ERR_NULL_IV</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:219</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa12c6dbc4b212887ef528c215f513e0bafe5af1c17e1caece14b3a5f659a1336d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa12c6dbc4b212887ef528c215f513e0bafe5af1c17e1caece14b3a5f659a1336d">IMB_ERR_AUTH_LEN</a></div><div class="ttdeci">@ IMB_ERR_AUTH_LEN</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:223</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aa17c919e873b6cfd7ac990977eef7601"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa17c919e873b6cfd7ac990977eef7601">aes_gcm_enc_128_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_128_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-128 Encryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa34b11bf4be97c764b283aedc0589575"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa34b11bf4be97c764b283aedc0589575">hec_32_t</a></div><div class="ttdeci">uint32_t(* hec_32_t)(const uint8_t *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:988</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa3bf3d1bd2a5d62035c972fe38827549"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa3bf3d1bd2a5d62035c972fe38827549">sha384_one_block_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha384_one_block_sse(const void *data, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa5e8c4861339d101c718449cf544d5c4"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa5e8c4861339d101c718449cf544d5c4">sha512_one_block_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha512_one_block_sse(const void *data, void *digest)</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa34b11bf4be97c764b283aedc0589575"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa34b11bf4be97c764b283aedc0589575">hec_32_t</a></div><div class="ttdeci">uint32_t(* hec_32_t)(const uint8_t *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:905</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aa81615f7ddfc8e1a794c5e278d22f7fc"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa81615f7ddfc8e1a794c5e278d22f7fc">aes_gcm_dec_192_update_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_192_update_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Decrypt a block of a AES-GCM-192 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aa9afd4ee91f0d82729afcf5f1cdcb808"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa9afd4ee91f0d82729afcf5f1cdcb808">hec_64_t</a></div><div class="ttdeci">uint64_t(* hec_64_t)(const uint8_t *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:989</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aa9afd4ee91f0d82729afcf5f1cdcb808"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aa9afd4ee91f0d82729afcf5f1cdcb808">hec_64_t</a></div><div class="ttdeci">uint64_t(* hec_64_t)(const uint8_t *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:906</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aaaabf4acdd43f98b6c2d31c8013ebbf4"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aaaabf4acdd43f98b6c2d31c8013ebbf4">aes_gcm_pre_256_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_pre_256_avx_gen2(const void *key, struct gcm_key_data *key_data)</div><div class="ttdoc">Pre-processes AES-GCM-256 key data.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aab07996d622d682adc1db8286e633cb3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aab07996d622d682adc1db8286e633cb3">cmac_subkey_gen_t</a></div><div class="ttdeci">void(* cmac_subkey_gen_t)(const void *, void *, void *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:798</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aab07996d622d682adc1db8286e633cb3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aab07996d622d682adc1db8286e633cb3">cmac_subkey_gen_t</a></div><div class="ttdeci">void(* cmac_subkey_gen_t)(const void *, void *, void *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:715</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aacc19f04c9ac80d1bf7391661e191798"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aacc19f04c9ac80d1bf7391661e191798">aes_gcm_dec_192_finalize_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_192_finalize_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End decryption of a AES-GCM-192 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aad9e6c466a5274b974d20330f91add50"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aad9e6c466a5274b974d20330f91add50">aes_gcm_enc_128_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_128_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-128 Encryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aade58eb541a45650ed7d875dc2be97fa"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a></div><div class="ttdeci">void(* hash_one_block_t)(const void *, void *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:799</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aade58eb541a45650ed7d875dc2be97fa"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aade58eb541a45650ed7d875dc2be97fa">hash_one_block_t</a></div><div class="ttdeci">void(* hash_one_block_t)(const void *, void *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:716</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aaeed8e5ec28aba6b8deef269b7c4bb28"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aaeed8e5ec28aba6b8deef269b7c4bb28">burst_fn_t</a></div><div class="ttdeci">uint32_t(* burst_fn_t)(struct IMB_MGR *, const uint32_t, struct IMB_JOB **)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:701</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ab0055e3b7d00cdb578647921207a1de7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ab0055e3b7d00cdb578647921207a1de7">aes_gcm_precomp_192_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_precomp_192_avx_gen2(struct gcm_key_data *key_data)</div><div class="ttdoc">Precomputation of AES-GCM-192 HashKey constants.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ab12d22470a68b5d3852c8dd972784d97"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ab12d22470a68b5d3852c8dd972784d97">IMB_MAX_JOBS</a></div><div class="ttdeci">#define IMB_MAX_JOBS</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1041</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ab12d22470a68b5d3852c8dd972784d97"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ab12d22470a68b5d3852c8dd972784d97">IMB_MAX_JOBS</a></div><div class="ttdeci">#define IMB_MAX_JOBS</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:978</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ab1a51ae4b3cf3e8fdb618773d7b24b68"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ab1a51ae4b3cf3e8fdb618773d7b24b68">aes_gcm_dec_256_update_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_256_update_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Decrypt a block of a AES-GCM-256 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ab50906d68121cb8e6edf2a3493a60c5c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">aes_gcm_precomp_t</a></div><div class="ttdeci">void(* aes_gcm_precomp_t)(struct gcm_key_data *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:829</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ab50906d68121cb8e6edf2a3493a60c5c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c">aes_gcm_precomp_t</a></div><div class="ttdeci">void(* aes_gcm_precomp_t)(struct gcm_key_data *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:746</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ab5ecb9fd270d0bfc42e46c5a3a9225fe"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ab5ecb9fd270d0bfc42e46c5a3a9225fe">imb_hmac_ipad_opad</a></div><div class="ttdeci">IMB_DLL_EXPORT void imb_hmac_ipad_opad(struct IMB_MGR *mb_mgr, const IMB_HASH_ALG sha_type, const void *pkey, const size_t key_len, void *ipad_hash, void *opad_hash)</div><div class="ttdoc">Ipad Opad padding for HMAC.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ab71c95df9bd059e1a5e108d2513a0e2c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ab71c95df9bd059e1a5e108d2513a0e2c">aes_gcm_pre_192_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_pre_192_avx_gen4(const void *key, struct gcm_key_data *key_data)</div><div class="ttdoc">Pre-processes AES-GCM-192 key data.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ab831bdb2193a5adc54b51285f23ad5ce"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ab831bdb2193a5adc54b51285f23ad5ce">aes_gcm_enc_256_update_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_256_update_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Encrypt a block of a AES-GCM-256 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ab8dc617feb010b0f4cd74fd9e1eabb5e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ab8dc617feb010b0f4cd74fd9e1eabb5e">alloc_mb_mgr</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_MGR * alloc_mb_mgr(uint64_t flags)</div><div class="ttdoc">Allocates memory for multi-buffer manager instance.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aba0ac59064802c6d0a182a5164568c18"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">aes_gmac_update_t</a></div><div class="ttdeci">void(* aes_gmac_update_t)(const struct gcm_key_data *, struct gcm_context_data *, const uint8_t *, const uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:835</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aba0ac59064802c6d0a182a5164568c18"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18">aes_gmac_update_t</a></div><div class="ttdeci">void(* aes_gmac_update_t)(const struct gcm_key_data *, struct gcm_context_data *, const uint8_t *, const uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:752</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aba6dd2e633819829740cb7917ba6b1b2"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aba6dd2e633819829740cb7917ba6b1b2">aes_keyexp_192_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_192_avx2(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_abb36f71b9fb4d928c2ad9fa462b80ae6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abb36f71b9fb4d928c2ad9fa462b80ae6">xcbc_keyexp_t</a></div><div class="ttdeci">void(* xcbc_keyexp_t)(const void *, void *, void *, void *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:801</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_abb36f71b9fb4d928c2ad9fa462b80ae6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abb36f71b9fb4d928c2ad9fa462b80ae6">xcbc_keyexp_t</a></div><div class="ttdeci">void(* xcbc_keyexp_t)(const void *, void *, void *, void *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:718</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_abb5570a161a90391e25b2016bc98381b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abb5570a161a90391e25b2016bc98381b">aes_gcm_enc_128_update_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_128_update_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Encrypt a block of a AES-GCM-128 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_abb7c6395420af2addd92a3fa46e0fd28"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abb7c6395420af2addd92a3fa46e0fd28">aes_cfb_128_one_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_cfb_128_one_avx512(void *out, const void *in, const void *iv, const void *keys, uint64_t len)</div><div class="ttdoc">AES-CFB-128 Encrypt/Decrypt up to one block.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_abc6b0f1c857f26b834f22b6bd8f51846"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abc6b0f1c857f26b834f22b6bd8f51846">flush_job_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * flush_job_avx(IMB_MGR *state)</div><div class="ttdoc">Force processing until next job in queue is completed.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_abdbf0bd32da801c52993cadb7a49c9ee"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">IMB_CIPHER_DIRECTION</a></div><div class="ttdeci">IMB_CIPHER_DIRECTION</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:382</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_abdbf0bd32da801c52993cadb7a49c9eea881652011955c227d94a881d2d2c5c59"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eea881652011955c227d94a881d2d2c5c59">IMB_DIR_DECRYPT</a></div><div class="ttdeci">@ IMB_DIR_DECRYPT</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:384</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_abdbf0bd32da801c52993cadb7a49c9eeabed12e936823e8f8b2de70388a2d15ce"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eeabed12e936823e8f8b2de70388a2d15ce">IMB_DIR_ENCRYPT</a></div><div class="ttdeci">@ IMB_DIR_ENCRYPT</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:383</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_abdbf0bd32da801c52993cadb7a49c9ee"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9ee">IMB_CIPHER_DIRECTION</a></div><div class="ttdeci">IMB_CIPHER_DIRECTION</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:288</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_abdbf0bd32da801c52993cadb7a49c9eea881652011955c227d94a881d2d2c5c59"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eea881652011955c227d94a881d2d2c5c59">IMB_DIR_DECRYPT</a></div><div class="ttdeci">@ IMB_DIR_DECRYPT</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:290</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_abdbf0bd32da801c52993cadb7a49c9eeabed12e936823e8f8b2de70388a2d15ce"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abdbf0bd32da801c52993cadb7a49c9eeabed12e936823e8f8b2de70388a2d15ce">IMB_DIR_ENCRYPT</a></div><div class="ttdeci">@ IMB_DIR_ENCRYPT</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:289</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_abef922c52013630ad70273cef095c564"><div class="ttname"><a href="intel-ipsec-mb_8h.html#abef922c52013630ad70273cef095c564">aes_gcm_precomp_256_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_precomp_256_avx_gen4(struct gcm_key_data *key_data)</div><div class="ttdoc">Precomputation of AES-GCM-256 HashKey constants.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac0ebc1e7678bde75c25d5c0ec7ab2f7a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac0ebc1e7678bde75c25d5c0ec7ab2f7a">aes_gcm_pre_192_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_pre_192_sse(const void *key, struct gcm_key_data *key_data)</div><div class="ttdoc">Pre-processes AES-GCM-192 key data.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ac13d60c1ddbd3c770f9d85d59821e520"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac13d60c1ddbd3c770f9d85d59821e520">sha1_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha1_avx2(const void *data, const uint64_t length, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac16384799933d4f7b11cb56d9c66f5da"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac16384799933d4f7b11cb56d9c66f5da">aes_gcm_dec_256_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_256_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-256 Decryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ac17147d04602964bea59322ff31ebf59"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac17147d04602964bea59322ff31ebf59">kasumi_f9_1_buffer_user_t</a></div><div class="ttdeci">void(* kasumi_f9_1_buffer_user_t)(const kasumi_key_sched_t *, const uint64_t, const void *, const uint32_t, void *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:905</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ac17147d04602964bea59322ff31ebf59"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac17147d04602964bea59322ff31ebf59">kasumi_f9_1_buffer_user_t</a></div><div class="ttdeci">void(* kasumi_f9_1_buffer_user_t)(const kasumi_key_sched_t *, const uint64_t, const void *, const uint32_t, void *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:822</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac173e4fb252a820edb25ad790065ad39"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac173e4fb252a820edb25ad790065ad39">aes_gcm_dec_128_finalize_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_128_finalize_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End decryption of a AES-GCM-128 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac24548c2955399fd84b03216ad5b36fb"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac24548c2955399fd84b03216ad5b36fb">aes_gcm_init_192_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_init_192_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</div><div class="ttdoc">Initialize a gcm_context_data structure to prepare for AES-GCM-192 Encryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ac2bfb5dca839523118362b48115d7c18"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac2bfb5dca839523118362b48115d7c18">sha256_one_block_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha256_one_block_avx512(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac3f27672ce30d74f5cdc28f1903f68b1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac3f27672ce30d74f5cdc28f1903f68b1">aes_xcbc_expand_key_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_xcbc_expand_key_avx2(const void *key, void *k1_exp, void *k2, void *k3)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ac4bd89ab3cb1341eb4f30c4c501a9009"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009">submit_cipher_burst_t</a></div><div class="ttdeci">uint32_t(* submit_cipher_burst_t)(struct IMB_MGR *, struct IMB_JOB *, const uint32_t, const IMB_CIPHER_MODE cipher, const IMB_CIPHER_DIRECTION dir, const IMB_KEY_SIZE_BYTES key_size)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:787</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ac5bfb31d18fdc55451cd325c4af032c7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac5bfb31d18fdc55451cd325c4af032c7">aes_gcm_enc_dec_iv_t</a></div><div class="ttdeci">void(* aes_gcm_enc_dec_iv_t)(const struct gcm_key_data *, struct gcm_context_data *, uint8_t *, uint8_t const *, const uint64_t, const uint8_t *, uint8_t const *, const uint64_t, uint8_t *, const uint64_t, const uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:810</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ac4bd89ab3cb1341eb4f30c4c501a9009"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac4bd89ab3cb1341eb4f30c4c501a9009">submit_cipher_burst_t</a></div><div class="ttdeci">uint32_t(* submit_cipher_burst_t)(struct IMB_MGR *, struct IMB_JOB *, const uint32_t, const IMB_CIPHER_MODE cipher, const IMB_CIPHER_DIRECTION dir, const IMB_KEY_SIZE_BYTES key_size)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:704</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ac5bfb31d18fdc55451cd325c4af032c7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac5bfb31d18fdc55451cd325c4af032c7">aes_gcm_enc_dec_iv_t</a></div><div class="ttdeci">void(* aes_gcm_enc_dec_iv_t)(const struct gcm_key_data *, struct gcm_context_data *, uint8_t *, uint8_t const *, const uint64_t, const uint8_t *, uint8_t const *, const uint64_t, uint8_t *, const uint64_t, const uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:727</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac7aec54f653aeee2554ba980d62fd491"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac7aec54f653aeee2554ba980d62fd491">flush_job_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * flush_job_avx512(IMB_MGR *state)</div><div class="ttdoc">Force processing until next job in queue is completed.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac7b339426753d3a7c44625a5ded3170a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac7b339426753d3a7c44625a5ded3170a">submit_job_nocheck_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * submit_job_nocheck_avx(IMB_MGR *state)</div><div class="ttdoc">Submit job for processing without validating.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac7d7c889a25730d82ddee27bad7f0a63"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac7d7c889a25730d82ddee27bad7f0a63">aes_keyexp_128_enc_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_128_enc_avx(const void *key, void *enc_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac7f4da2fc0601ad50851e7e43f53e0cf"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac7f4da2fc0601ad50851e7e43f53e0cf">md5_one_block_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void md5_one_block_avx512(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac8379ada0d6ec030ebad9828fbea9459"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac8379ada0d6ec030ebad9828fbea9459">imb_get_mb_mgr_size</a></div><div class="ttdeci">IMB_DLL_EXPORT size_t imb_get_mb_mgr_size(void)</div><div class="ttdoc">Calculates necessary memory size for IMB_MGR.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ac886170fc4e70b467383fdf09f0724cf"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac886170fc4e70b467383fdf09f0724cf">kasumi_f9_iv_gen</a></div><div class="ttdeci">IMB_DLL_EXPORT int kasumi_f9_iv_gen(const uint32_t count, const uint32_t fresh, void *iv_ptr)</div><div class="ttdoc">Generation of KASUMI F9 Initialization Vector.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ac8cb9a545cdef14f60f36fe8888e6e7c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac8cb9a545cdef14f60f36fe8888e6e7c">get_completed_job_t</a></div><div class="ttdeci">IMB_JOB *(* get_completed_job_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:782</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ac8cb9a545cdef14f60f36fe8888e6e7c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ac8cb9a545cdef14f60f36fe8888e6e7c">get_completed_job_t</a></div><div class="ttdeci">IMB_JOB *(* get_completed_job_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:698</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aca7ab49c370f8f7cb82f93db199bfd1c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aca7ab49c370f8f7cb82f93db199bfd1c">aes_gcm_init_128_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_init_128_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len)</div><div class="ttdoc">Initialize a gcm_context_data structure to prepare for AES-GCM-128 Encryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_acaff83c8ca568201805e0ada5a79f6e1"><div class="ttname"><a href="intel-ipsec-mb_8h.html#acaff83c8ca568201805e0ada5a79f6e1">aes_gcm_dec_192_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_192_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-192 Decryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_accf08a616e22a2c56e6a37d56f38b354"><div class="ttname"><a href="intel-ipsec-mb_8h.html#accf08a616e22a2c56e6a37d56f38b354">kasumi_f8_4_buffer_t</a></div><div class="ttdeci">void(* kasumi_f8_4_buffer_t)(const kasumi_key_sched_t *, const uint64_t, const uint64_t, const uint64_t, const uint64_t, const void *, void *, const void *, void *, const void *, void *, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:893</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6">IMB_ARCH</a></div><div class="ttdeci">IMB_ARCH</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:119</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6a1df4f12c5769b52a95f1a4b89a8163c8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6a1df4f12c5769b52a95f1a4b89a8163c8">IMB_ARCH_AVX512</a></div><div class="ttdeci">@ IMB_ARCH_AVX512</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:125</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6a1ff5121849f183accf83fd652b854733"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6a1ff5121849f183accf83fd652b854733">IMB_ARCH_NONE</a></div><div class="ttdeci">@ IMB_ARCH_NONE</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:120</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6a3c2ccbe898a62cbaed5bad7717fdfa16"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6a3c2ccbe898a62cbaed5bad7717fdfa16">IMB_ARCH_SSE</a></div><div class="ttdeci">@ IMB_ARCH_SSE</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:122</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6a6a5b29422391adbb6806575bf7ccae44"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6a6a5b29422391adbb6806575bf7ccae44">IMB_ARCH_NOAESNI</a></div><div class="ttdeci">@ IMB_ARCH_NOAESNI</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:121</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6a701628fddfdd84d56495839f20573de6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6a701628fddfdd84d56495839f20573de6">IMB_ARCH_AVX2</a></div><div class="ttdeci">@ IMB_ARCH_AVX2</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:124</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6aa831f565e051aa13fcad5b224358e57d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6aa831f565e051aa13fcad5b224358e57d">IMB_ARCH_AVX</a></div><div class="ttdeci">@ IMB_ARCH_AVX</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:123</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6ae6536a65a8d0cd53faa325d5ee4dcdda"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6ae6536a65a8d0cd53faa325d5ee4dcdda">IMB_ARCH_NUM</a></div><div class="ttdeci">@ IMB_ARCH_NUM</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:126</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_accf08a616e22a2c56e6a37d56f38b354"><div class="ttname"><a href="intel-ipsec-mb_8h.html#accf08a616e22a2c56e6a37d56f38b354">kasumi_f8_4_buffer_t</a></div><div class="ttdeci">void(* kasumi_f8_4_buffer_t)(const kasumi_key_sched_t *, const uint64_t, const uint64_t, const uint64_t, const uint64_t, const void *, void *, const void *, void *, const void *, void *, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:810</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6">IMB_ARCH</a></div><div class="ttdeci">IMB_ARCH</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:119</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6a1df4f12c5769b52a95f1a4b89a8163c8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6a1df4f12c5769b52a95f1a4b89a8163c8">IMB_ARCH_AVX512</a></div><div class="ttdeci">@ IMB_ARCH_AVX512</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:125</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6a1ff5121849f183accf83fd652b854733"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6a1ff5121849f183accf83fd652b854733">IMB_ARCH_NONE</a></div><div class="ttdeci">@ IMB_ARCH_NONE</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:120</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6a3c2ccbe898a62cbaed5bad7717fdfa16"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6a3c2ccbe898a62cbaed5bad7717fdfa16">IMB_ARCH_SSE</a></div><div class="ttdeci">@ IMB_ARCH_SSE</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:122</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6a6a5b29422391adbb6806575bf7ccae44"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6a6a5b29422391adbb6806575bf7ccae44">IMB_ARCH_NOAESNI</a></div><div class="ttdeci">@ IMB_ARCH_NOAESNI</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:121</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6a701628fddfdd84d56495839f20573de6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6a701628fddfdd84d56495839f20573de6">IMB_ARCH_AVX2</a></div><div class="ttdeci">@ IMB_ARCH_AVX2</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:124</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6aa831f565e051aa13fcad5b224358e57d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6aa831f565e051aa13fcad5b224358e57d">IMB_ARCH_AVX</a></div><div class="ttdeci">@ IMB_ARCH_AVX</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:123</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad138a5bf5508a0be5d3d61f018d5ebb6ae6536a65a8d0cd53faa325d5ee4dcdda"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad138a5bf5508a0be5d3d61f018d5ebb6ae6536a65a8d0cd53faa325d5ee4dcdda">IMB_ARCH_NUM</a></div><div class="ttdeci">@ IMB_ARCH_NUM</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:126</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ad45e83e263506684c786b4e7012055ac"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad45e83e263506684c786b4e7012055ac">aes_gcm_dec_192_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_192_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-192 Decryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad5945d85d451ccf9b3ba06c06c10d4e9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad5945d85d451ccf9b3ba06c06c10d4e9">sha224_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha224_avx2(const void *data, const uint64_t length, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad63e21495f9b798250f5c68371af4f37"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad63e21495f9b798250f5c68371af4f37">sha384_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha384_sse(const void *data, const uint64_t length, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad7444c36024a63025e7682c16946a00a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad7444c36024a63025e7682c16946a00a">kasumi_key_sched_size_t</a></div><div class="ttdeci">size_t(* kasumi_key_sched_size_t)(void)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:916</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad78a4f1c0d6de808f7046c0fbcd98d8f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad78a4f1c0d6de808f7046c0fbcd98d8f">snow3g_key_sched_size_t</a></div><div class="ttdeci">size_t(* snow3g_key_sched_size_t)(void)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:986</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad7444c36024a63025e7682c16946a00a"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad7444c36024a63025e7682c16946a00a">kasumi_key_sched_size_t</a></div><div class="ttdeci">size_t(* kasumi_key_sched_size_t)(void)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:833</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad78a4f1c0d6de808f7046c0fbcd98d8f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad78a4f1c0d6de808f7046c0fbcd98d8f">snow3g_key_sched_size_t</a></div><div class="ttdeci">size_t(* snow3g_key_sched_size_t)(void)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:903</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ad85bdbf56038fd72ceda7e50deea586e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad85bdbf56038fd72ceda7e50deea586e">get_completed_job_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * get_completed_job_avx2(IMB_MGR *state)</div><div class="ttdoc">Get next completed job.</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ad907e0caa52fcb257275464179620643"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad907e0caa52fcb257275464179620643">aes_ecb_quic_t</a></div><div class="ttdeci">void(* aes_ecb_quic_t)(const void *, const void *, void *out, uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:910</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ad9592051cf26814ea5830826b553c547"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad9592051cf26814ea5830826b553c547">aes_gcm_enc_256_update_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_256_update_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Encrypt a block of a AES-GCM-256 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ad9b42865aff95b5bcde6efa4b4e83fe8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ad9b42865aff95b5bcde6efa4b4e83fe8">sha1_avx512</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha1_avx512(const void *data, const uint64_t length, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ada14329d2331d02241efaafc3ba26ffd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ada14329d2331d02241efaafc3ba26ffd">sha512_one_block_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha512_one_block_avx2(const void *data, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ada45082bb04dd727c0deec5c4fc96fed"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ada45082bb04dd727c0deec5c4fc96fed">zuc_eia3_n_buffer_t</a></div><div class="ttdeci">void(* zuc_eia3_n_buffer_t)(const void *const *, const void *const *, const void *const *, const uint32_t *, uint32_t **, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:867</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ada304337e78ef5a462c97c1f8151ef67"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ada304337e78ef5a462c97c1f8151ef67">imb_set_session</a></div><div class="ttdeci">IMB_DLL_EXPORT uint32_t imb_set_session(IMB_MGR *state, IMB_JOB *job)</div><div class="ttdoc">Sets up suite_id and session_id fields for selected cipher suite in provided job structure.</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ada45082bb04dd727c0deec5c4fc96fed"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ada45082bb04dd727c0deec5c4fc96fed">zuc_eia3_n_buffer_t</a></div><div class="ttdeci">void(* zuc_eia3_n_buffer_t)(const void *const *, const void *const *, const void *const *, const uint32_t *, uint32_t **, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:784</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_add2f5aafaf55cd0e0b20b2b62fcb025d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#add2f5aafaf55cd0e0b20b2b62fcb025d">aes_gcm_dec_128_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_128_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-128 Decryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ade16ed4c31baa50f8a10e3c85156a942"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ade16ed4c31baa50f8a10e3c85156a942">aes_gcm_precomp_128_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_precomp_128_avx_gen2(struct gcm_key_data *key_data)</div><div class="ttdoc">Precomputation of AES-GCM-128 HashKey constants.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_adec2f9778622b3e226f12bb326e75076"><div class="ttname"><a href="intel-ipsec-mb_8h.html#adec2f9778622b3e226f12bb326e75076">aes_gcm_enc_192_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_192_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-192 Encryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_adeecd4bac067493d8465e8d7b6b7dd6d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#adeecd4bac067493d8465e8d7b6b7dd6d">aes_gcm_init_t</a></div><div class="ttdeci">void(* aes_gcm_init_t)(const struct gcm_key_data *, struct gcm_context_data *, const uint8_t *, uint8_t const *, uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:816</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_adeecd4bac067493d8465e8d7b6b7dd6d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#adeecd4bac067493d8465e8d7b6b7dd6d">aes_gcm_init_t</a></div><div class="ttdeci">void(* aes_gcm_init_t)(const struct gcm_key_data *, struct gcm_context_data *, const uint8_t *, uint8_t const *, uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:733</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_adf7aa2e79dce7a9ed79134c086715fd0"><div class="ttname"><a href="intel-ipsec-mb_8h.html#adf7aa2e79dce7a9ed79134c086715fd0">aes_gcm_dec_256_finalize_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_256_finalize_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End decryption of a AES-GCM-256 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_adfa182361f1c179d75129b4e46841af5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#adfa182361f1c179d75129b4e46841af5">snow3g_init_key_sched_t</a></div><div class="ttdeci">int(* snow3g_init_key_sched_t)(const void *, snow3g_key_schedule_t *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:983</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ae13b1154dcc13ca562e81471659d6099"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae13b1154dcc13ca562e81471659d6099">snow3g_f8_4_buffer_t</a></div><div class="ttdeci">void(* snow3g_f8_4_buffer_t)(const snow3g_key_schedule_t *, const void *, const void *, const void *, const void *, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:940</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_adfa182361f1c179d75129b4e46841af5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#adfa182361f1c179d75129b4e46841af5">snow3g_init_key_sched_t</a></div><div class="ttdeci">int(* snow3g_init_key_sched_t)(const void *, snow3g_key_schedule_t *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:900</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ae13b1154dcc13ca562e81471659d6099"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae13b1154dcc13ca562e81471659d6099">snow3g_f8_4_buffer_t</a></div><div class="ttdeci">void(* snow3g_f8_4_buffer_t)(const snow3g_key_schedule_t *, const void *, const void *, const void *, const void *, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:857</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ae1e8e1b4425af520048a9e1fe5689e4d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae1e8e1b4425af520048a9e1fe5689e4d">aes_gcm_dec_128_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_128_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-128 Decryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ae242d142065172898129f30e6bc40d8c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae242d142065172898129f30e6bc40d8c">flush_job_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT IMB_JOB * flush_job_avx2(IMB_MGR *state)</div><div class="ttdoc">Force processing until next job in queue is completed.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ae3459d38a2ee2e1ce04b9f9f4bf55ea5"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae3459d38a2ee2e1ce04b9f9f4bf55ea5">aes_gcm_enc_128_update_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_128_update_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, const uint8_t *in, uint64_t len)</div><div class="ttdoc">Encrypt a block of a AES-GCM-128 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ae3cefd0e992f1390110f0ef9a3aa510f"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae3cefd0e992f1390110f0ef9a3aa510f">zuc_eia3_iv_gen</a></div><div class="ttdeci">IMB_DLL_EXPORT int zuc_eia3_iv_gen(const uint32_t count, const uint8_t bearer, const uint8_t dir, void *iv_ptr)</div><div class="ttdoc">Generation of ZUC-EIA3 Initialization Vector.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_ae50b48832b41b4b468cf933b44849213"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae50b48832b41b4b468cf933b44849213">snow3g_key_schedule_t</a></div><div class="ttdeci">struct snow3g_key_schedule_s snow3g_key_schedule_t</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ae5ce647166e6f9f8b1d616584ee5d1d6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae5ce647166e6f9f8b1d616584ee5d1d6">sha256_one_block_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha256_one_block_sse(const void *data, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ae5cf8bca3e0f1c7c40c110b88168669e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae5cf8bca3e0f1c7c40c110b88168669e">sha384_one_block_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha384_one_block_avx2(const void *data, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ae64d0f677e42b8f8d50289113cf5e01e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae64d0f677e42b8f8d50289113cf5e01e">flush_job_t</a></div><div class="ttdeci">IMB_JOB *(* flush_job_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:783</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_ae7a48386f7190b4e46cd113eee413733"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae7a48386f7190b4e46cd113eee413733">snow3g_f9_1_buffer_t</a></div><div class="ttdeci">void(* snow3g_f9_1_buffer_t)(const snow3g_key_schedule_t *, const void *, const void *, const uint64_t, void *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:979</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aeb837fda81cdf56ffcfa4e68b5877a35"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aeb837fda81cdf56ffcfa4e68b5877a35">aes_cfb_t</a></div><div class="ttdeci">void(* aes_cfb_t)(void *, const void *, const void *, const void *, uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:803</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aec411a6b29d7adff67e6eaa1b13b3975"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aec411a6b29d7adff67e6eaa1b13b3975">sha256_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha256_avx2(const void *data, const uint64_t length, void *digest)</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ae64d0f677e42b8f8d50289113cf5e01e"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae64d0f677e42b8f8d50289113cf5e01e">flush_job_t</a></div><div class="ttdeci">IMB_JOB *(* flush_job_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:699</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_ae7a48386f7190b4e46cd113eee413733"><div class="ttname"><a href="intel-ipsec-mb_8h.html#ae7a48386f7190b4e46cd113eee413733">snow3g_f9_1_buffer_t</a></div><div class="ttdeci">void(* snow3g_f9_1_buffer_t)(const snow3g_key_schedule_t *, const void *, const void *, const uint64_t, void *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:896</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_aeb837fda81cdf56ffcfa4e68b5877a35"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aeb837fda81cdf56ffcfa4e68b5877a35">aes_cfb_t</a></div><div class="ttdeci">void(* aes_cfb_t)(void *, const void *, const void *, const void *, uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:720</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aec7fe23c32ee94de88e5feba8f373a04"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aec7fe23c32ee94de88e5feba8f373a04">aes_keyexp_128_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_128_avx(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aecdd69541b6d2a83d19ca804ef4b78d6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6">imb_clear_mem</a></div><div class="ttdeci">IMB_DLL_EXPORT void imb_clear_mem(void *mem, const size_t size)</div><div class="ttdoc">Force clearing/zeroing of memory.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aecf7277999128599c6cf8432b242ba36"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aecf7277999128599c6cf8432b242ba36">aes_gcm_precomp_128_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_precomp_128_avx_gen4(struct gcm_key_data *key_data)</div><div class="ttdoc">Precomputation of AES-GCM-128 HashKey constants.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aee02bcb3a5e5eaee3632086f75c3d78d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aee02bcb3a5e5eaee3632086f75c3d78d">imb_get_version</a></div><div class="ttdeci">IMB_DLL_EXPORT unsigned imb_get_version(void)</div><div class="ttdoc">Get library version in numerical format.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aee547b1b9e70e12c84d9949317e41c6c"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aee547b1b9e70e12c84d9949317e41c6c">init_mb_mgr_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void init_mb_mgr_avx(IMB_MGR *state)</div><div class="ttdoc">Initialize Multi-Buffer Manager structure.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aef8af95a47ec01a8c280802a16d0f0c7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aef8af95a47ec01a8c280802a16d0f0c7">sha384_one_block_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha384_one_block_avx(const void *data, void *digest)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_aefb28e46620cbf65a2af3073b2401e40"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aefb28e46620cbf65a2af3073b2401e40">aes_xcbc_expand_key_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_xcbc_expand_key_sse(const void *key, void *k1_exp, void *k2, void *k3)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_af0c38ca0a5aac81d8db7e0cc2811426b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af0c38ca0a5aac81d8db7e0cc2811426b">init_mb_mgr_t</a></div><div class="ttdeci">void(* init_mb_mgr_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:779</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_af0e48b520099db5a76190aa5395c90d3"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af0e48b520099db5a76190aa5395c90d3">sha224_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha224_avx(const void *data, const uint64_t length, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_af1a63afff082c9d14bbe22f14bd6b5d9"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af1a63afff082c9d14bbe22f14bd6b5d9">sha1_one_block_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha1_one_block_avx2(const void *data, void *digest)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_af1eb074f5da469fa655d1404be8701dd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af1eb074f5da469fa655d1404be8701dd">kasumi_f8_2_buffer_t</a></div><div class="ttdeci">void(* kasumi_f8_2_buffer_t)(const kasumi_key_sched_t *, const uint64_t, const uint64_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:880</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_af0c38ca0a5aac81d8db7e0cc2811426b"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af0c38ca0a5aac81d8db7e0cc2811426b">init_mb_mgr_t</a></div><div class="ttdeci">void(* init_mb_mgr_t)(struct IMB_MGR *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:695</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_af1eb074f5da469fa655d1404be8701dd"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af1eb074f5da469fa655d1404be8701dd">kasumi_f8_2_buffer_t</a></div><div class="ttdeci">void(* kasumi_f8_2_buffer_t)(const kasumi_key_sched_t *, const uint64_t, const uint64_t, const void *, void *, const uint32_t, const void *, void *, const uint32_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:797</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_af1f440855a00edbf95c124a1e1d18c37"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af1f440855a00edbf95c124a1e1d18c37">aes_keyexp_256_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_256_avx2(const void *key, void *enc_exp_keys, void *dec_exp_keys)</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_af33d7afa861dcedc2c284330a5a66164"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af33d7afa861dcedc2c284330a5a66164">aes_gcm_enc_128_avx_gen2</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_128_avx_gen2(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-128 Encryption.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_af3f75897a0ec8b3f22c4e2b01f7f48b7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">aes_gmac_finalize_t</a></div><div class="ttdeci">void(* aes_gmac_finalize_t)(const struct gcm_key_data *, struct gcm_context_data *, uint8_t *, const uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:838</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_af3f75897a0ec8b3f22c4e2b01f7f48b7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7">aes_gmac_finalize_t</a></div><div class="ttdeci">void(* aes_gmac_finalize_t)(const struct gcm_key_data *, struct gcm_context_data *, uint8_t *, const uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:755</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_af63ae2246c6d89b7d6630623948d3886"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af63ae2246c6d89b7d6630623948d3886">aes_gcm_enc_128_finalize_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_128_finalize_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End encryption of a AES-GCM-128 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_af701adcd98fd95084d76e0cb0f926fef"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af701adcd98fd95084d76e0cb0f926fef">aes_gcm_enc_dec_update_t</a></div><div class="ttdeci">void(* aes_gcm_enc_dec_update_t)(const struct gcm_key_data *, struct gcm_context_data *, uint8_t *, const uint8_t *, uint64_t)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:823</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_af701adcd98fd95084d76e0cb0f926fef"><div class="ttname"><a href="intel-ipsec-mb_8h.html#af701adcd98fd95084d76e0cb0f926fef">aes_gcm_enc_dec_update_t</a></div><div class="ttdeci">void(* aes_gcm_enc_dec_update_t)(const struct gcm_key_data *, struct gcm_context_data *, uint8_t *, const uint8_t *, uint64_t)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:740</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_afa136a3c06d45e914d15415dee27f001"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afa136a3c06d45e914d15415dee27f001">aes_gcm_dec_192_finalize_avx_gen4</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_192_finalize_avx_gen4(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End decryption of a AES-GCM-192 encryption message.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_afa369dee8def2ef620e7f33db86a3356"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afa369dee8def2ef620e7f33db86a3356">aes_keyexp_256_enc_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_keyexp_256_enc_sse(const void *key, void *enc_exp_keys)</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_afacacc8b74c05c80a0ee255c68637490"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">hash_fn_t</a></div><div class="ttdeci">void(* hash_fn_t)(const void *, const uint64_t, void *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:800</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_afc6b16cbe9cf1f840723aa6be3913131"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afc6b16cbe9cf1f840723aa6be3913131">sha512_avx2</a></div><div class="ttdeci">IMB_DLL_EXPORT void sha512_avx2(const void *data, const uint64_t length, void *digest)</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_afacacc8b74c05c80a0ee255c68637490"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afacacc8b74c05c80a0ee255c68637490">hash_fn_t</a></div><div class="ttdeci">void(* hash_fn_t)(const void *, const uint64_t, void *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:717</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_afcdedeabc7516e7506fa5c81d07f6fd8"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afcdedeabc7516e7506fa5c81d07f6fd8">aes_gcm_enc_256_finalize_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_enc_256_finalize_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">End encryption of a AES-GCM-256 encryption message.</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066ab"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066ab">IMB_STATUS</a></div><div class="ttdeci">IMB_STATUS</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:164</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066aba0ef40895610ac6343d171f65be676a1d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba0ef40895610ac6343d171f65be676a1d">IMB_STATUS_ERROR</a></div><div class="ttdeci">@ IMB_STATUS_ERROR</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:172</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066aba508a9f195acee09621542ca687ba2341"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba508a9f195acee09621542ca687ba2341">IMB_STATUS_COMPLETED</a></div><div class="ttdeci">@ IMB_STATUS_COMPLETED</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:168</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066aba546465b9d4cfb1f9c98c864bf5ed51fb"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba546465b9d4cfb1f9c98c864bf5ed51fb">IMB_STATUS_INTERNAL_ERROR</a></div><div class="ttdeci">@ IMB_STATUS_INTERNAL_ERROR</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:171</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066aba6fcaccd3853c9e8cf3b402edc3e22089"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba6fcaccd3853c9e8cf3b402edc3e22089">IMB_STATUS_COMPLETED_CIPHER</a></div><div class="ttdeci">@ IMB_STATUS_COMPLETED_CIPHER</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:166</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066aba79df83a15cdafc2a6c79751457ae9792"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba79df83a15cdafc2a6c79751457ae9792">IMB_STATUS_COMPLETED_AUTH</a></div><div class="ttdeci">@ IMB_STATUS_COMPLETED_AUTH</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:167</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066abaa562b01ade81e0196fc23cd79d534141"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066abaa562b01ade81e0196fc23cd79d534141">IMB_STATUS_BEING_PROCESSED</a></div><div class="ttdeci">@ IMB_STATUS_BEING_PROCESSED</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:165</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066abaee85b6a8bc33e0b39001e9ff538540b7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066abaee85b6a8bc33e0b39001e9ff538540b7">IMB_STATUS_INVALID_ARGS</a></div><div class="ttdeci">@ IMB_STATUS_INVALID_ARGS</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:170</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066ab"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066ab">IMB_STATUS</a></div><div class="ttdeci">IMB_STATUS</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:178</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066aba0ef40895610ac6343d171f65be676a1d"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba0ef40895610ac6343d171f65be676a1d">IMB_STATUS_ERROR</a></div><div class="ttdeci">@ IMB_STATUS_ERROR</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:186</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066aba508a9f195acee09621542ca687ba2341"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba508a9f195acee09621542ca687ba2341">IMB_STATUS_COMPLETED</a></div><div class="ttdeci">@ IMB_STATUS_COMPLETED</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:182</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066aba546465b9d4cfb1f9c98c864bf5ed51fb"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba546465b9d4cfb1f9c98c864bf5ed51fb">IMB_STATUS_INTERNAL_ERROR</a></div><div class="ttdeci">@ IMB_STATUS_INTERNAL_ERROR</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:185</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066aba6fcaccd3853c9e8cf3b402edc3e22089"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba6fcaccd3853c9e8cf3b402edc3e22089">IMB_STATUS_COMPLETED_CIPHER</a></div><div class="ttdeci">@ IMB_STATUS_COMPLETED_CIPHER</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:180</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066aba79df83a15cdafc2a6c79751457ae9792"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066aba79df83a15cdafc2a6c79751457ae9792">IMB_STATUS_COMPLETED_AUTH</a></div><div class="ttdeci">@ IMB_STATUS_COMPLETED_AUTH</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:181</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066abaa562b01ade81e0196fc23cd79d534141"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066abaa562b01ade81e0196fc23cd79d534141">IMB_STATUS_BEING_PROCESSED</a></div><div class="ttdeci">@ IMB_STATUS_BEING_PROCESSED</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:179</div></div>
+<div class="ttc" id="aintel-ipsec-mb_8h_html_afd5f50bd2277b5f92f0ec786c8f066abaee85b6a8bc33e0b39001e9ff538540b7"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd5f50bd2277b5f92f0ec786c8f066abaee85b6a8bc33e0b39001e9ff538540b7">IMB_STATUS_INVALID_ARGS</a></div><div class="ttdeci">@ IMB_STATUS_INVALID_ARGS</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:184</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_afd8763c66749e9bc5e4e5eb2ac130e43"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afd8763c66749e9bc5e4e5eb2ac130e43">aes_gcm_dec_256_sse</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_gcm_dec_256_sse(const struct gcm_key_data *key_data, struct gcm_context_data *context_data, uint8_t *out, uint8_t const *in, uint64_t len, const uint8_t *iv, uint8_t const *aad, uint64_t aad_len, uint8_t *auth_tag, uint64_t auth_tag_len)</div><div class="ttdoc">AES-GCM-256 Decryption.</div></div>
 <div class="ttc" id="aintel-ipsec-mb_8h_html_afe460e4ff6a7b0c7a6edcc87e9976121"><div class="ttname"><a href="intel-ipsec-mb_8h.html#afe460e4ff6a7b0c7a6edcc87e9976121">aes_xcbc_expand_key_avx</a></div><div class="ttdeci">IMB_DLL_EXPORT void aes_xcbc_expand_key_avx(const void *key, void *k1_exp, void *k2, void *k3)</div></div>
-<div class="ttc" id="astructIMB__JOB_html"><div class="ttname"><a href="structIMB__JOB.html">IMB_JOB</a></div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:483</div></div>
+<div class="ttc" id="astructIMB__JOB_html"><div class="ttname"><a href="structIMB__JOB.html">IMB_JOB</a></div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:390</div></div>
 <div class="ttc" id="astructIMB__JOB_html_a006bf024dd3e809fad23c3df813c6fb2"><div class="ttname"><a href="structIMB__JOB.html#a006bf024dd3e809fad23c3df813c6fb2">IMB_JOB::cipher_fields</a></div><div class="ttdeci">union IMB_JOB::@11 cipher_fields</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a053ceeb65e611c48a97a3e10d03d47eb"><div class="ttname"><a href="structIMB__JOB.html#a053ceeb65e611c48a97a3e10d03d47eb">IMB_JOB::ctx</a></div><div class="ttdeci">struct gcm_context_data * ctx</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:561</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a053ceeb65e611c48a97a3e10d03d47eb"><div class="ttname"><a href="structIMB__JOB.html#a053ceeb65e611c48a97a3e10d03d47eb">IMB_JOB::ctx</a></div><div class="ttdeci">struct gcm_context_data * ctx</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:468</div></div>
 <div class="ttc" id="astructIMB__JOB_html_a07832e4571ec56f377dffa477b7aafe0"><div class="ttname"><a href="structIMB__JOB.html#a07832e4571ec56f377dffa477b7aafe0">IMB_JOB::GMAC</a></div><div class="ttdeci">struct IMB_JOB::@10::_AES_GMAC_specific_fields GMAC</div></div>
 <div class="ttc" id="astructIMB__JOB_html_a11f452fba9d5cad2b2cdb929b7f244e9"><div class="ttname"><a href="structIMB__JOB.html#a11f452fba9d5cad2b2cdb929b7f244e9">IMB_JOB::KASUMI_UIA1</a></div><div class="ttdeci">struct IMB_JOB::@10::_KASUMI_UIA1_specific_fields KASUMI_UIA1</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a1449c51b88ccdb2f855525b89c05eb84"><div class="ttname"><a href="structIMB__JOB.html#a1449c51b88ccdb2f855525b89c05eb84">IMB_JOB::cipher_direction</a></div><div class="ttdeci">IMB_CIPHER_DIRECTION cipher_direction</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:619</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a1449c51b88ccdb2f855525b89c05eb84"><div class="ttname"><a href="structIMB__JOB.html#a1449c51b88ccdb2f855525b89c05eb84">IMB_JOB::cipher_direction</a></div><div class="ttdeci">IMB_CIPHER_DIRECTION cipher_direction</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:526</div></div>
 <div class="ttc" id="astructIMB__JOB_html_a15f9c1a5ab25dca6e3a550ff00ad2419"><div class="ttname"><a href="structIMB__JOB.html#a15f9c1a5ab25dca6e3a550ff00ad2419">IMB_JOB::POLY1305</a></div><div class="ttdeci">struct IMB_JOB::@10::_POLY1305_specific_fields POLY1305</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a1d0a6baa8d8f7d9714fe86fe7085b8bb"><div class="ttname"><a href="structIMB__JOB.html#a1d0a6baa8d8f7d9714fe86fe7085b8bb">IMB_JOB::num_sgl_io_segs</a></div><div class="ttdeci">uint64_t num_sgl_io_segs</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:498</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a1e2fc881ce9c84173168df1dbda851f8"><div class="ttname"><a href="structIMB__JOB.html#a1e2fc881ce9c84173168df1dbda851f8">IMB_JOB::_init_tag</a></div><div class="ttdeci">const void * _init_tag</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:593</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a2462f9efb16c31ae615df7493dddb343"><div class="ttname"><a href="structIMB__JOB.html#a2462f9efb16c31ae615df7493dddb343">IMB_JOB::sgl_io_segs</a></div><div class="ttdeci">const struct IMB_SGL_IOV * sgl_io_segs</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:491</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a25b4ce8aec20f64cfc393b245d62a09e"><div class="ttname"><a href="structIMB__JOB.html#a25b4ce8aec20f64cfc393b245d62a09e">IMB_JOB::iv_len_in_bytes</a></div><div class="ttdeci">uint64_t iv_len_in_bytes</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:523</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a1d0a6baa8d8f7d9714fe86fe7085b8bb"><div class="ttname"><a href="structIMB__JOB.html#a1d0a6baa8d8f7d9714fe86fe7085b8bb">IMB_JOB::num_sgl_io_segs</a></div><div class="ttdeci">uint64_t num_sgl_io_segs</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:405</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a1e2fc881ce9c84173168df1dbda851f8"><div class="ttname"><a href="structIMB__JOB.html#a1e2fc881ce9c84173168df1dbda851f8">IMB_JOB::_init_tag</a></div><div class="ttdeci">const void * _init_tag</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:500</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a2462f9efb16c31ae615df7493dddb343"><div class="ttname"><a href="structIMB__JOB.html#a2462f9efb16c31ae615df7493dddb343">IMB_JOB::sgl_io_segs</a></div><div class="ttdeci">const struct IMB_SGL_IOV * sgl_io_segs</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:398</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a25b4ce8aec20f64cfc393b245d62a09e"><div class="ttname"><a href="structIMB__JOB.html#a25b4ce8aec20f64cfc393b245d62a09e">IMB_JOB::iv_len_in_bytes</a></div><div class="ttdeci">uint64_t iv_len_in_bytes</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:430</div></div>
 <div class="ttc" id="astructIMB__JOB_html_a2a48f64b9344d0b6ca6775a4fdbe21b7"><div class="ttname"><a href="structIMB__JOB.html#a2a48f64b9344d0b6ca6775a4fdbe21b7">IMB_JOB::SNOW3G_UIA2</a></div><div class="ttdeci">struct IMB_JOB::@10::_SNOW3G_UIA2_specific_fields SNOW3G_UIA2</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a2bd093b1609dad73bbef2a728995d12f"><div class="ttname"><a href="structIMB__JOB.html#a2bd093b1609dad73bbef2a728995d12f">IMB_JOB::_iv23</a></div><div class="ttdeci">const uint8_t * _iv23</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:569</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a2e74bbeeed2c70f97e6b30a0a12aec0e"><div class="ttname"><a href="structIMB__JOB.html#a2e74bbeeed2c70f97e6b30a0a12aec0e">IMB_JOB::_hashed_auth_key_xor_ipad</a></div><div class="ttdeci">const uint8_t * _hashed_auth_key_xor_ipad</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:531</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a2bd093b1609dad73bbef2a728995d12f"><div class="ttname"><a href="structIMB__JOB.html#a2bd093b1609dad73bbef2a728995d12f">IMB_JOB::_iv23</a></div><div class="ttdeci">const uint8_t * _iv23</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:476</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a2e74bbeeed2c70f97e6b30a0a12aec0e"><div class="ttname"><a href="structIMB__JOB.html#a2e74bbeeed2c70f97e6b30a0a12aec0e">IMB_JOB::_hashed_auth_key_xor_ipad</a></div><div class="ttdeci">const uint8_t * _hashed_auth_key_xor_ipad</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:438</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a2e8f1fefae0b0fe245eb20e5cc2aa830"><div class="ttname"><a href="structIMB__JOB.html#a2e8f1fefae0b0fe245eb20e5cc2aa830">IMB_JOB::suite_id</a></div><div class="ttdeci">void * suite_id[4]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:550</div></div>
 <div class="ttc" id="astructIMB__JOB_html_a3508ac7d49477dffb93b6b9cfbf0ebf3"><div class="ttname"><a href="structIMB__JOB.html#a3508ac7d49477dffb93b6b9cfbf0ebf3">IMB_JOB::XCBC</a></div><div class="ttdeci">struct IMB_JOB::@10::_AES_XCBC_specific_fields XCBC</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a3b3f616759b854553a351e6b44e08471"><div class="ttname"><a href="structIMB__JOB.html#a3b3f616759b854553a351e6b44e08471">IMB_JOB::_key</a></div><div class="ttdeci">const struct gcm_key_data * _key</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:583</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a3d7e363be004999d02db464c721e9751"><div class="ttname"><a href="structIMB__JOB.html#a3d7e363be004999d02db464c721e9751">IMB_JOB::sgl_state</a></div><div class="ttdeci">IMB_SGL_STATE sgl_state</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:632</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a40caf02dcd7e45dd91cfae33159ca26e"><div class="ttname"><a href="structIMB__JOB.html#a40caf02dcd7e45dd91cfae33159ca26e">IMB_JOB::msg_len_to_hash_in_bytes</a></div><div class="ttdeci">uint64_t msg_len_to_hash_in_bytes</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:517</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a41e9fa248ebb040ce1e074a2444b55d2"><div class="ttname"><a href="structIMB__JOB.html#a41e9fa248ebb040ce1e074a2444b55d2">IMB_JOB::chain_order</a></div><div class="ttdeci">IMB_CHAIN_ORDER chain_order</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:621</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a425d57ff565bb2ff76e2b0351b00c751"><div class="ttname"><a href="structIMB__JOB.html#a425d57ff565bb2ff76e2b0351b00c751">IMB_JOB::msg_len_to_cipher_in_bits</a></div><div class="ttdeci">uint64_t msg_len_to_cipher_in_bits</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:512</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a4415e6851e770734c5ec1b46a828ce55"><div class="ttname"><a href="structIMB__JOB.html#a4415e6851e770734c5ec1b46a828ce55">IMB_JOB::_iv</a></div><div class="ttdeci">const void * _iv</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:575</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a3b3f616759b854553a351e6b44e08471"><div class="ttname"><a href="structIMB__JOB.html#a3b3f616759b854553a351e6b44e08471">IMB_JOB::_key</a></div><div class="ttdeci">const struct gcm_key_data * _key</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:490</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a3d7e363be004999d02db464c721e9751"><div class="ttname"><a href="structIMB__JOB.html#a3d7e363be004999d02db464c721e9751">IMB_JOB::sgl_state</a></div><div class="ttdeci">IMB_SGL_STATE sgl_state</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:539</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a40caf02dcd7e45dd91cfae33159ca26e"><div class="ttname"><a href="structIMB__JOB.html#a40caf02dcd7e45dd91cfae33159ca26e">IMB_JOB::msg_len_to_hash_in_bytes</a></div><div class="ttdeci">uint64_t msg_len_to_hash_in_bytes</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:424</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a41e9fa248ebb040ce1e074a2444b55d2"><div class="ttname"><a href="structIMB__JOB.html#a41e9fa248ebb040ce1e074a2444b55d2">IMB_JOB::chain_order</a></div><div class="ttdeci">IMB_CHAIN_ORDER chain_order</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:528</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a425d57ff565bb2ff76e2b0351b00c751"><div class="ttname"><a href="structIMB__JOB.html#a425d57ff565bb2ff76e2b0351b00c751">IMB_JOB::msg_len_to_cipher_in_bits</a></div><div class="ttdeci">uint64_t msg_len_to_cipher_in_bits</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:419</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a4415e6851e770734c5ec1b46a828ce55"><div class="ttname"><a href="structIMB__JOB.html#a4415e6851e770734c5ec1b46a828ce55">IMB_JOB::_iv</a></div><div class="ttdeci">const void * _iv</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:482</div></div>
 <div class="ttc" id="astructIMB__JOB_html_a499c1e90c9004ab7bb50fac98b6a9048"><div class="ttname"><a href="structIMB__JOB.html#a499c1e90c9004ab7bb50fac98b6a9048">IMB_JOB::CMAC</a></div><div class="ttdeci">struct IMB_JOB::@10::_AES_CMAC_specific_fields CMAC</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a4abdf3311d861979dc39669b3b7f1ed8"><div class="ttname"><a href="structIMB__JOB.html#a4abdf3311d861979dc39669b3b7f1ed8">IMB_JOB::ctx</a></div><div class="ttdeci">struct chacha20_poly1305_context_data * ctx</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:604</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a4c943fcac7f5c4f5d6d030547840071e"><div class="ttname"><a href="structIMB__JOB.html#a4c943fcac7f5c4f5d6d030547840071e">IMB_JOB::aad</a></div><div class="ttdeci">const void * aad</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:547</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a4e68c8cf14552db625e26477650dfb8b"><div class="ttname"><a href="structIMB__JOB.html#a4e68c8cf14552db625e26477650dfb8b">IMB_JOB::user_data2</a></div><div class="ttdeci">void * user_data2</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:625</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a5d473d9cb01f8e2818a6f5f0c9483bd7"><div class="ttname"><a href="structIMB__JOB.html#a5d473d9cb01f8e2818a6f5f0c9483bd7">IMB_JOB::next_iv</a></div><div class="ttdeci">void * next_iv</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:638</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a4abdf3311d861979dc39669b3b7f1ed8"><div class="ttname"><a href="structIMB__JOB.html#a4abdf3311d861979dc39669b3b7f1ed8">IMB_JOB::ctx</a></div><div class="ttdeci">struct chacha20_poly1305_context_data * ctx</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:511</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a4c943fcac7f5c4f5d6d030547840071e"><div class="ttname"><a href="structIMB__JOB.html#a4c943fcac7f5c4f5d6d030547840071e">IMB_JOB::aad</a></div><div class="ttdeci">const void * aad</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:454</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a4e68c8cf14552db625e26477650dfb8b"><div class="ttname"><a href="structIMB__JOB.html#a4e68c8cf14552db625e26477650dfb8b">IMB_JOB::user_data2</a></div><div class="ttdeci">void * user_data2</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:532</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a5d473d9cb01f8e2818a6f5f0c9483bd7"><div class="ttname"><a href="structIMB__JOB.html#a5d473d9cb01f8e2818a6f5f0c9483bd7">IMB_JOB::next_iv</a></div><div class="ttdeci">void * next_iv</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:545</div></div>
 <div class="ttc" id="astructIMB__JOB_html_a5e6d8702069bf88ce81cd750df66bcbc"><div class="ttname"><a href="structIMB__JOB.html#a5e6d8702069bf88ce81cd750df66bcbc">IMB_JOB::u</a></div><div class="ttdeci">union IMB_JOB::@10 u</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a60a01da0056367a6f0a326265e4da4fb"><div class="ttname"><a href="structIMB__JOB.html#a60a01da0056367a6f0a326265e4da4fb">IMB_JOB::cipher_start_offset_in_bits</a></div><div class="ttdeci">uint64_t cipher_start_offset_in_bits</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:506</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a62883bf8707d09816753832bef5d2902"><div class="ttname"><a href="structIMB__JOB.html#a62883bf8707d09816753832bef5d2902">IMB_JOB::hash_func</a></div><div class="ttdeci">int(* hash_func)(struct IMB_JOB *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:629</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a652eb3eee14e59be703bf28e69ca0671"><div class="ttname"><a href="structIMB__JOB.html#a652eb3eee14e59be703bf28e69ca0671">IMB_JOB::cipher_func</a></div><div class="ttdeci">int(* cipher_func)(struct IMB_JOB *)</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:627</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a684b751d0a275a28d345a3d1051204ef"><div class="ttname"><a href="structIMB__JOB.html#a684b751d0a275a28d345a3d1051204ef">IMB_JOB::_hashed_auth_key_xor_opad</a></div><div class="ttdeci">const uint8_t * _hashed_auth_key_xor_opad</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:534</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a750df4fa7330e2387138409d0eb50e0f"><div class="ttname"><a href="structIMB__JOB.html#a750df4fa7330e2387138409d0eb50e0f">IMB_JOB::auth_tag_output_len_in_bytes</a></div><div class="ttdeci">uint64_t auth_tag_output_len_in_bytes</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:525</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a76d55a988c71e40c577c6f8f5d0496de"><div class="ttname"><a href="structIMB__JOB.html#a76d55a988c71e40c577c6f8f5d0496de">IMB_JOB::_k1_expanded</a></div><div class="ttdeci">const uint32_t * _k1_expanded</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:539</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a78113e875fdb681e775fd32ee67c7597"><div class="ttname"><a href="structIMB__JOB.html#a78113e875fdb681e775fd32ee67c7597">IMB_JOB::cipher_mode</a></div><div class="ttdeci">IMB_CIPHER_MODE cipher_mode</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:618</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a7a62dc4b2ef35231a93ce035561c4153"><div class="ttname"><a href="structIMB__JOB.html#a7a62dc4b2ef35231a93ce035561c4153">IMB_JOB::_key</a></div><div class="ttdeci">const void * _key</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:573</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a7ba1fdbcc6ed2e3840990d2e34dac8e8"><div class="ttname"><a href="structIMB__JOB.html#a7ba1fdbcc6ed2e3840990d2e34dac8e8">IMB_JOB::_key</a></div><div class="ttdeci">const uint8_t * _key</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:565</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a60a01da0056367a6f0a326265e4da4fb"><div class="ttname"><a href="structIMB__JOB.html#a60a01da0056367a6f0a326265e4da4fb">IMB_JOB::cipher_start_offset_in_bits</a></div><div class="ttdeci">uint64_t cipher_start_offset_in_bits</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:413</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a62883bf8707d09816753832bef5d2902"><div class="ttname"><a href="structIMB__JOB.html#a62883bf8707d09816753832bef5d2902">IMB_JOB::hash_func</a></div><div class="ttdeci">int(* hash_func)(struct IMB_JOB *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:536</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a652eb3eee14e59be703bf28e69ca0671"><div class="ttname"><a href="structIMB__JOB.html#a652eb3eee14e59be703bf28e69ca0671">IMB_JOB::cipher_func</a></div><div class="ttdeci">int(* cipher_func)(struct IMB_JOB *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:534</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a684b751d0a275a28d345a3d1051204ef"><div class="ttname"><a href="structIMB__JOB.html#a684b751d0a275a28d345a3d1051204ef">IMB_JOB::_hashed_auth_key_xor_opad</a></div><div class="ttdeci">const uint8_t * _hashed_auth_key_xor_opad</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:441</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a750df4fa7330e2387138409d0eb50e0f"><div class="ttname"><a href="structIMB__JOB.html#a750df4fa7330e2387138409d0eb50e0f">IMB_JOB::auth_tag_output_len_in_bytes</a></div><div class="ttdeci">uint64_t auth_tag_output_len_in_bytes</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:432</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a76d55a988c71e40c577c6f8f5d0496de"><div class="ttname"><a href="structIMB__JOB.html#a76d55a988c71e40c577c6f8f5d0496de">IMB_JOB::_k1_expanded</a></div><div class="ttdeci">const uint32_t * _k1_expanded</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:446</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a78113e875fdb681e775fd32ee67c7597"><div class="ttname"><a href="structIMB__JOB.html#a78113e875fdb681e775fd32ee67c7597">IMB_JOB::cipher_mode</a></div><div class="ttdeci">IMB_CIPHER_MODE cipher_mode</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:525</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a7a62dc4b2ef35231a93ce035561c4153"><div class="ttname"><a href="structIMB__JOB.html#a7a62dc4b2ef35231a93ce035561c4153">IMB_JOB::_key</a></div><div class="ttdeci">const void * _key</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:480</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a7ba1fdbcc6ed2e3840990d2e34dac8e8"><div class="ttname"><a href="structIMB__JOB.html#a7ba1fdbcc6ed2e3840990d2e34dac8e8">IMB_JOB::_key</a></div><div class="ttdeci">const uint8_t * _key</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:472</div></div>
 <div class="ttc" id="astructIMB__JOB_html_a832c73263792bf8895cf028035730c4e"><div class="ttname"><a href="structIMB__JOB.html#a832c73263792bf8895cf028035730c4e">IMB_JOB::CBCS</a></div><div class="ttdeci">struct IMB_JOB::@11::_CBCS_specific_fields CBCS</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a8e8143e461eab3b2b04333c5f1c17a82"><div class="ttname"><a href="structIMB__JOB.html#a8e8143e461eab3b2b04333c5f1c17a82">IMB_JOB::_skey2</a></div><div class="ttdeci">const void * _skey2</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:555</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a95cc77e0c079f43dec1a46a2b75422a0"><div class="ttname"><a href="structIMB__JOB.html#a95cc77e0c079f43dec1a46a2b75422a0">IMB_JOB::_key_expanded</a></div><div class="ttdeci">const void * _key_expanded</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:552</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a960fdd62c1c10d2d3cc0a765c0a6531d"><div class="ttname"><a href="structIMB__JOB.html#a960fdd62c1c10d2d3cc0a765c0a6531d">IMB_JOB::iv</a></div><div class="ttdeci">const uint8_t * iv</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:522</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a9c2e008fdb76df46a33300f692f92265"><div class="ttname"><a href="structIMB__JOB.html#a9c2e008fdb76df46a33300f692f92265">IMB_JOB::msg_len_to_cipher_in_bytes</a></div><div class="ttdeci">uint64_t msg_len_to_cipher_in_bytes</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:510</div></div>
-<div class="ttc" id="astructIMB__JOB_html_a9d5e67861edf38dfa23160b650c7caa9"><div class="ttname"><a href="structIMB__JOB.html#a9d5e67861edf38dfa23160b650c7caa9">IMB_JOB::reserved</a></div><div class="ttdeci">void * reserved</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:612</div></div>
-<div class="ttc" id="astructIMB__JOB_html_aa4d9b62d3353150aba88aec5d8d08853"><div class="ttname"><a href="structIMB__JOB.html#aa4d9b62d3353150aba88aec5d8d08853">IMB_JOB::hash_alg</a></div><div class="ttdeci">IMB_HASH_ALG hash_alg</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:620</div></div>
-<div class="ttc" id="astructIMB__JOB_html_aa607a780bc2c8509270625c7520a11f1"><div class="ttname"><a href="structIMB__JOB.html#aa607a780bc2c8509270625c7520a11f1">IMB_JOB::aad_len_in_bytes</a></div><div class="ttdeci">uint64_t aad_len_in_bytes</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:549</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a8e8143e461eab3b2b04333c5f1c17a82"><div class="ttname"><a href="structIMB__JOB.html#a8e8143e461eab3b2b04333c5f1c17a82">IMB_JOB::_skey2</a></div><div class="ttdeci">const void * _skey2</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:462</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a95cc77e0c079f43dec1a46a2b75422a0"><div class="ttname"><a href="structIMB__JOB.html#a95cc77e0c079f43dec1a46a2b75422a0">IMB_JOB::_key_expanded</a></div><div class="ttdeci">const void * _key_expanded</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:459</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a960fdd62c1c10d2d3cc0a765c0a6531d"><div class="ttname"><a href="structIMB__JOB.html#a960fdd62c1c10d2d3cc0a765c0a6531d">IMB_JOB::iv</a></div><div class="ttdeci">const uint8_t * iv</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:429</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a9c2e008fdb76df46a33300f692f92265"><div class="ttname"><a href="structIMB__JOB.html#a9c2e008fdb76df46a33300f692f92265">IMB_JOB::msg_len_to_cipher_in_bytes</a></div><div class="ttdeci">uint64_t msg_len_to_cipher_in_bytes</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:417</div></div>
+<div class="ttc" id="astructIMB__JOB_html_a9d5e67861edf38dfa23160b650c7caa9"><div class="ttname"><a href="structIMB__JOB.html#a9d5e67861edf38dfa23160b650c7caa9">IMB_JOB::reserved</a></div><div class="ttdeci">void * reserved</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:519</div></div>
+<div class="ttc" id="astructIMB__JOB_html_aa4d9b62d3353150aba88aec5d8d08853"><div class="ttname"><a href="structIMB__JOB.html#aa4d9b62d3353150aba88aec5d8d08853">IMB_JOB::hash_alg</a></div><div class="ttdeci">IMB_HASH_ALG hash_alg</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:527</div></div>
+<div class="ttc" id="astructIMB__JOB_html_aa607a780bc2c8509270625c7520a11f1"><div class="ttname"><a href="structIMB__JOB.html#aa607a780bc2c8509270625c7520a11f1">IMB_JOB::aad_len_in_bytes</a></div><div class="ttdeci">uint64_t aad_len_in_bytes</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:456</div></div>
 <div class="ttc" id="astructIMB__JOB_html_aa84f5eefd378ab65ebe0b302ccb0df92"><div class="ttname"><a href="structIMB__JOB.html#aa84f5eefd378ab65ebe0b302ccb0df92">IMB_JOB::HMAC</a></div><div class="ttdeci">struct IMB_JOB::@10::_HMAC_specific_fields HMAC</div></div>
 <div class="ttc" id="astructIMB__JOB_html_ab42f79355b9173c63aca9b0b577a2b61"><div class="ttname"><a href="structIMB__JOB.html#ab42f79355b9173c63aca9b0b577a2b61">IMB_JOB::ZUC_EIA3</a></div><div class="ttdeci">struct IMB_JOB::@10::_ZUC_EIA3_specific_fields ZUC_EIA3</div></div>
-<div class="ttc" id="astructIMB__JOB_html_ab64e8f6bf8dfaf56305b9023103ea5e2"><div class="ttname"><a href="structIMB__JOB.html#ab64e8f6bf8dfaf56305b9023103ea5e2">IMB_JOB::_skey1</a></div><div class="ttdeci">const void * _skey1</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:554</div></div>
-<div class="ttc" id="astructIMB__JOB_html_abd56907c9485830817f7b30870726aeb"><div class="ttname"><a href="structIMB__JOB.html#abd56907c9485830817f7b30870726aeb">IMB_JOB::user_data</a></div><div class="ttdeci">void * user_data</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:624</div></div>
-<div class="ttc" id="astructIMB__JOB_html_abdd8a58a37e8d2daa1c2d333b826a65c"><div class="ttname"><a href="structIMB__JOB.html#abdd8a58a37e8d2daa1c2d333b826a65c">IMB_JOB::key_len_in_bytes</a></div><div class="ttdeci">uint64_t key_len_in_bytes</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:486</div></div>
+<div class="ttc" id="astructIMB__JOB_html_ab4571657aa5147f768083e8969ea96c9"><div class="ttname"><a href="structIMB__JOB.html#ab4571657aa5147f768083e8969ea96c9">IMB_JOB::session_id</a></div><div class="ttdeci">uint32_t session_id</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:551</div></div>
+<div class="ttc" id="astructIMB__JOB_html_ab64e8f6bf8dfaf56305b9023103ea5e2"><div class="ttname"><a href="structIMB__JOB.html#ab64e8f6bf8dfaf56305b9023103ea5e2">IMB_JOB::_skey1</a></div><div class="ttdeci">const void * _skey1</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:461</div></div>
+<div class="ttc" id="astructIMB__JOB_html_abd56907c9485830817f7b30870726aeb"><div class="ttname"><a href="structIMB__JOB.html#abd56907c9485830817f7b30870726aeb">IMB_JOB::user_data</a></div><div class="ttdeci">void * user_data</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:531</div></div>
+<div class="ttc" id="astructIMB__JOB_html_abdd8a58a37e8d2daa1c2d333b826a65c"><div class="ttname"><a href="structIMB__JOB.html#abdd8a58a37e8d2daa1c2d333b826a65c">IMB_JOB::key_len_in_bytes</a></div><div class="ttdeci">uint64_t key_len_in_bytes</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:393</div></div>
 <div class="ttc" id="astructIMB__JOB_html_abf4a3f2db05c6583de5a99d9590ddca1"><div class="ttname"><a href="structIMB__JOB.html#abf4a3f2db05c6583de5a99d9590ddca1">IMB_JOB::SNOW_V_AEAD</a></div><div class="ttdeci">struct IMB_JOB::@10::_SNOW_V_AEAD_specific_fields SNOW_V_AEAD</div></div>
-<div class="ttc" id="astructIMB__JOB_html_ac1f7c363e7709cf1a7de1364aa8625e2"><div class="ttname"><a href="structIMB__JOB.html#ac1f7c363e7709cf1a7de1364aa8625e2">IMB_JOB::dst</a></div><div class="ttdeci">uint8_t * dst</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:495</div></div>
-<div class="ttc" id="astructIMB__JOB_html_ac37080ddb0baf56c9589e65960430b32"><div class="ttname"><a href="structIMB__JOB.html#ac37080ddb0baf56c9589e65960430b32">IMB_JOB::auth_tag_output</a></div><div class="ttdeci">uint8_t * auth_tag_output</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:524</div></div>
-<div class="ttc" id="astructIMB__JOB_html_ac656e2d98f36bd5547cc9fa297c1de62"><div class="ttname"><a href="structIMB__JOB.html#ac656e2d98f36bd5547cc9fa297c1de62">IMB_JOB::enc_keys</a></div><div class="ttdeci">const void * enc_keys</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:484</div></div>
+<div class="ttc" id="astructIMB__JOB_html_ac1f7c363e7709cf1a7de1364aa8625e2"><div class="ttname"><a href="structIMB__JOB.html#ac1f7c363e7709cf1a7de1364aa8625e2">IMB_JOB::dst</a></div><div class="ttdeci">uint8_t * dst</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:402</div></div>
+<div class="ttc" id="astructIMB__JOB_html_ac37080ddb0baf56c9589e65960430b32"><div class="ttname"><a href="structIMB__JOB.html#ac37080ddb0baf56c9589e65960430b32">IMB_JOB::auth_tag_output</a></div><div class="ttdeci">uint8_t * auth_tag_output</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:431</div></div>
+<div class="ttc" id="astructIMB__JOB_html_ac656e2d98f36bd5547cc9fa297c1de62"><div class="ttname"><a href="structIMB__JOB.html#ac656e2d98f36bd5547cc9fa297c1de62">IMB_JOB::enc_keys</a></div><div class="ttdeci">const void * enc_keys</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:391</div></div>
 <div class="ttc" id="astructIMB__JOB_html_ac9fc7aef831cfc1ca598a55b250dd858"><div class="ttname"><a href="structIMB__JOB.html#ac9fc7aef831cfc1ca598a55b250dd858">IMB_JOB::GCM</a></div><div class="ttdeci">struct IMB_JOB::@10::_AES_GCM_specific_fields GCM</div></div>
 <div class="ttc" id="astructIMB__JOB_html_ace537bcd7b871fddd4514b7fd4f678a3"><div class="ttname"><a href="structIMB__JOB.html#ace537bcd7b871fddd4514b7fd4f678a3">IMB_JOB::CHACHA20_POLY1305</a></div><div class="ttdeci">struct IMB_JOB::@10::_CHACHA20_POLY1305_specific_fields CHACHA20_POLY1305</div></div>
 <div class="ttc" id="astructIMB__JOB_html_ad43a9c9149ec16b8e9164771ec38d379"><div class="ttname"><a href="structIMB__JOB.html#ad43a9c9149ec16b8e9164771ec38d379">IMB_JOB::CCM</a></div><div class="ttdeci">struct IMB_JOB::@10::_AES_CCM_specific_fields CCM</div></div>
-<div class="ttc" id="astructIMB__JOB_html_ad4e08611eee5188cb84cb2dc337ef9f0"><div class="ttname"><a href="structIMB__JOB.html#ad4e08611eee5188cb84cb2dc337ef9f0">IMB_JOB::status</a></div><div class="ttdeci">IMB_STATUS status</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:617</div></div>
-<div class="ttc" id="astructIMB__JOB_html_adc47d4af15c88dcb7abf01bb07e79e63"><div class="ttname"><a href="structIMB__JOB.html#adc47d4af15c88dcb7abf01bb07e79e63">IMB_JOB::_k2</a></div><div class="ttdeci">const uint8_t * _k2</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:541</div></div>
-<div class="ttc" id="astructIMB__JOB_html_adda0b9bd22d445402bb9866e423707c4"><div class="ttname"><a href="structIMB__JOB.html#adda0b9bd22d445402bb9866e423707c4">IMB_JOB::cipher_start_src_offset_in_bytes</a></div><div class="ttdeci">uint64_t cipher_start_src_offset_in_bytes</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:502</div></div>
-<div class="ttc" id="astructIMB__JOB_html_ae45d78dcef87042ffa1daf951f715d42"><div class="ttname"><a href="structIMB__JOB.html#ae45d78dcef87042ffa1daf951f715d42">IMB_JOB::msg_len_to_hash_in_bits</a></div><div class="ttdeci">uint64_t msg_len_to_hash_in_bits</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:519</div></div>
-<div class="ttc" id="astructIMB__JOB_html_ae571147592c332cea0d90a36e133e6a5"><div class="ttname"><a href="structIMB__JOB.html#ae571147592c332cea0d90a36e133e6a5">IMB_JOB::_iv</a></div><div class="ttdeci">const uint8_t * _iv</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:567</div></div>
+<div class="ttc" id="astructIMB__JOB_html_ad4e08611eee5188cb84cb2dc337ef9f0"><div class="ttname"><a href="structIMB__JOB.html#ad4e08611eee5188cb84cb2dc337ef9f0">IMB_JOB::status</a></div><div class="ttdeci">IMB_STATUS status</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:524</div></div>
+<div class="ttc" id="astructIMB__JOB_html_adc47d4af15c88dcb7abf01bb07e79e63"><div class="ttname"><a href="structIMB__JOB.html#adc47d4af15c88dcb7abf01bb07e79e63">IMB_JOB::_k2</a></div><div class="ttdeci">const uint8_t * _k2</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:448</div></div>
+<div class="ttc" id="astructIMB__JOB_html_adda0b9bd22d445402bb9866e423707c4"><div class="ttname"><a href="structIMB__JOB.html#adda0b9bd22d445402bb9866e423707c4">IMB_JOB::cipher_start_src_offset_in_bytes</a></div><div class="ttdeci">uint64_t cipher_start_src_offset_in_bytes</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:409</div></div>
+<div class="ttc" id="astructIMB__JOB_html_ae45d78dcef87042ffa1daf951f715d42"><div class="ttname"><a href="structIMB__JOB.html#ae45d78dcef87042ffa1daf951f715d42">IMB_JOB::msg_len_to_hash_in_bits</a></div><div class="ttdeci">uint64_t msg_len_to_hash_in_bits</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:426</div></div>
+<div class="ttc" id="astructIMB__JOB_html_ae571147592c332cea0d90a36e133e6a5"><div class="ttname"><a href="structIMB__JOB.html#ae571147592c332cea0d90a36e133e6a5">IMB_JOB::_iv</a></div><div class="ttdeci">const uint8_t * _iv</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:474</div></div>
 <div class="ttc" id="astructIMB__JOB_html_af24c379b5414a5d3ec290954b98b1c72"><div class="ttname"><a href="structIMB__JOB.html#af24c379b5414a5d3ec290954b98b1c72">IMB_JOB::GHASH</a></div><div class="ttdeci">struct IMB_JOB::@10::_GHASH_specific_fields GHASH</div></div>
-<div class="ttc" id="astructIMB__JOB_html_af5c226d1c875c4e30a8f7bd7c03f05b1"><div class="ttname"><a href="structIMB__JOB.html#af5c226d1c875c4e30a8f7bd7c03f05b1">IMB_JOB::cipher_start_src_offset_in_bits</a></div><div class="ttdeci">uint64_t cipher_start_src_offset_in_bits</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:504</div></div>
-<div class="ttc" id="astructIMB__JOB_html_af78a3df5a9f79f329c8d1095b9ecea05"><div class="ttname"><a href="structIMB__JOB.html#af78a3df5a9f79f329c8d1095b9ecea05">IMB_JOB::dec_keys</a></div><div class="ttdeci">const void * dec_keys</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:485</div></div>
-<div class="ttc" id="astructIMB__JOB_html_af7cdc3d086f6e2b12d21c1383b2bd152"><div class="ttname"><a href="structIMB__JOB.html#af7cdc3d086f6e2b12d21c1383b2bd152">IMB_JOB::hash_start_src_offset_in_bytes</a></div><div class="ttdeci">uint64_t hash_start_src_offset_in_bytes</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:515</div></div>
-<div class="ttc" id="astructIMB__JOB_html_af83d63eb71a4f26b4915562bea554f28"><div class="ttname"><a href="structIMB__JOB.html#af83d63eb71a4f26b4915562bea554f28">IMB_JOB::src</a></div><div class="ttdeci">const uint8_t * src</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:488</div></div>
-<div class="ttc" id="astructIMB__JOB_html_afa62af4d5f1ecbb80f5216ec298fcfe8"><div class="ttname"><a href="structIMB__JOB.html#afa62af4d5f1ecbb80f5216ec298fcfe8">IMB_JOB::_k3</a></div><div class="ttdeci">const uint8_t * _k3</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:543</div></div>
-<div class="ttc" id="astructIMB__MGR_html"><div class="ttname"><a href="structIMB__MGR.html">IMB_MGR</a></div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1043</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a000b24d7fbb9b57ed6bd4147d225e015"><div class="ttname"><a href="structIMB__MGR.html#a000b24d7fbb9b57ed6bd4147d225e015">IMB_MGR::gmac192_finalize</a></div><div class="ttdeci">aes_gmac_finalize_t gmac192_finalize</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1154</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a006315a7045996d451c7dfd03b96a076"><div class="ttname"><a href="structIMB__MGR.html#a006315a7045996d451c7dfd03b96a076">IMB_MGR::gcm192_init</a></div><div class="ttdeci">aes_gcm_init_t gcm192_init</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1091</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a00ce9a8422a961166ce9855d4815cc2e"><div class="ttname"><a href="structIMB__MGR.html#a00ce9a8422a961166ce9855d4815cc2e">IMB_MGR::gmac128_finalize</a></div><div class="ttdeci">aes_gmac_finalize_t gmac128_finalize</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1153</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a04c28bfe763544b68dac98e23aa0a8d9"><div class="ttname"><a href="structIMB__MGR.html#a04c28bfe763544b68dac98e23aa0a8d9">IMB_MGR::aes256_ccm_ooo</a></div><div class="ttdeci">void * aes256_ccm_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1219</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a058cfc60f2fdd68678b36f4f038270ac"><div class="ttname"><a href="structIMB__MGR.html#a058cfc60f2fdd68678b36f4f038270ac">IMB_MGR::crc24_lte_a</a></div><div class="ttdeci">crc32_fn_t crc24_lte_a</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1163</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a0720a1fc9c0652c6b3aa7dfab070f73d"><div class="ttname"><a href="structIMB__MGR.html#a0720a1fc9c0652c6b3aa7dfab070f73d">IMB_MGR::gmac256_update</a></div><div class="ttdeci">aes_gmac_update_t gmac256_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1152</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a0863c9f64126aba5cb47628493dae582"><div class="ttname"><a href="structIMB__MGR.html#a0863c9f64126aba5cb47628493dae582">IMB_MGR::hec_32</a></div><div class="ttdeci">hec_32_t hec_32</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1156</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a0ab7a3dfdfd8442f591699e2310df11f"><div class="ttname"><a href="structIMB__MGR.html#a0ab7a3dfdfd8442f591699e2310df11f">IMB_MGR::imb_errno</a></div><div class="ttdeci">int imb_errno</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1051</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a0bd2acac3a6c3f90a998ed53a7d28e57"><div class="ttname"><a href="structIMB__MGR.html#a0bd2acac3a6c3f90a998ed53a7d28e57">IMB_MGR::aes_cmac_ooo</a></div><div class="ttdeci">void * aes_cmac_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1213</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a106ebd60d876e56bfc6bcc03d20acce4"><div class="ttname"><a href="structIMB__MGR.html#a106ebd60d876e56bfc6bcc03d20acce4">IMB_MGR::next_job</a></div><div class="ttdeci">int next_job</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1187</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a1098c38784f6c6e4e3a3380f8be8ecc1"><div class="ttname"><a href="structIMB__MGR.html#a1098c38784f6c6e4e3a3380f8be8ecc1">IMB_MGR::gmac128_init</a></div><div class="ttdeci">aes_gmac_init_t gmac128_init</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1147</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a136697eb37d5a06eeada0f338abd8b51"><div class="ttname"><a href="structIMB__MGR.html#a136697eb37d5a06eeada0f338abd8b51">IMB_MGR::reserved</a></div><div class="ttdeci">uint64_t reserved[5]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1048</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a149b463ecf68ee78d39c33e183ed8997"><div class="ttname"><a href="structIMB__MGR.html#a149b463ecf68ee78d39c33e183ed8997">IMB_MGR::gcm192_pre</a></div><div class="ttdeci">aes_gcm_pre_t gcm192_pre</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1109</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a194a0f15a7345ee369780dbdeb4f52f6"><div class="ttname"><a href="structIMB__MGR.html#a194a0f15a7345ee369780dbdeb4f52f6">IMB_MGR::snow3g_f8_4_buffer</a></div><div class="ttdeci">snow3g_f8_4_buffer_t snow3g_f8_4_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1132</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a1ea15abc11b618ceb438c7f282643c52"><div class="ttname"><a href="structIMB__MGR.html#a1ea15abc11b618ceb438c7f282643c52">IMB_MGR::gcm256_precomp</a></div><div class="ttdeci">aes_gcm_precomp_t gcm256_precomp</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1107</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a207c78e01e4aa1a35de1bbd2cc0a6ee2"><div class="ttname"><a href="structIMB__MGR.html#a207c78e01e4aa1a35de1bbd2cc0a6ee2">IMB_MGR::gcm128_pre</a></div><div class="ttdeci">aes_gcm_pre_t gcm128_pre</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1108</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a20a3d4d1e40aed26d83db5395b7ccc83"><div class="ttname"><a href="structIMB__MGR.html#a20a3d4d1e40aed26d83db5395b7ccc83">IMB_MGR::submit_hash_burst</a></div><div class="ttdeci">submit_hash_burst_t submit_hash_burst</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1182</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a225e3b35eef8e18fd09c429fbb2f70b5"><div class="ttname"><a href="structIMB__MGR.html#a225e3b35eef8e18fd09c429fbb2f70b5">IMB_MGR::flush_job</a></div><div class="ttdeci">flush_job_t flush_job</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1063</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a25f46509b2f8926902a73e2210d697fd"><div class="ttname"><a href="structIMB__MGR.html#a25f46509b2f8926902a73e2210d697fd">IMB_MGR::snow3g_f8_2_buffer</a></div><div class="ttdeci">snow3g_f8_2_buffer_t snow3g_f8_2_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1131</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a26d22c5ff963b9c7ffc8af19292bce5c"><div class="ttname"><a href="structIMB__MGR.html#a26d22c5ff963b9c7ffc8af19292bce5c">IMB_MGR::zuc_eea3_ooo</a></div><div class="ttdeci">void * zuc_eea3_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1214</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a28ddfed1a807fedb9c77c99736278dcb"><div class="ttname"><a href="structIMB__MGR.html#a28ddfed1a807fedb9c77c99736278dcb">IMB_MGR::gcm128_dec_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm128_dec_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1096</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a2ab69fdbef6a9a0574fcbb5ea9a7da3b"><div class="ttname"><a href="structIMB__MGR.html#a2ab69fdbef6a9a0574fcbb5ea9a7da3b">IMB_MGR::des3_dec_ooo</a></div><div class="ttdeci">void * des3_dec_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1201</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a2bd7444a318de06b5f53178abf9c37ff"><div class="ttname"><a href="structIMB__MGR.html#a2bd7444a318de06b5f53178abf9c37ff">IMB_MGR::keyexp_192</a></div><div class="ttdeci">keyexp_t keyexp_192</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1066</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a2ce2f6e6d61953b24a5859279534b02a"><div class="ttname"><a href="structIMB__MGR.html#a2ce2f6e6d61953b24a5859279534b02a">IMB_MGR::gcm128_dec</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm128_dec</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1087</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a35939892cd168eb7ce9c6c29c5401709"><div class="ttname"><a href="structIMB__MGR.html#a35939892cd168eb7ce9c6c29c5401709">IMB_MGR::get_next_job</a></div><div class="ttdeci">get_next_job_t get_next_job</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1059</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a37fc5ccae7af099a8517566a20751265"><div class="ttname"><a href="structIMB__MGR.html#a37fc5ccae7af099a8517566a20751265">IMB_MGR::sha_256_ooo</a></div><div class="ttdeci">void * sha_256_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1225</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a38ff0528815be4d92481948664366ca9"><div class="ttname"><a href="structIMB__MGR.html#a38ff0528815be4d92481948664366ca9">IMB_MGR::snow3g_init_key_sched</a></div><div class="ttdeci">snow3g_init_key_sched_t snow3g_init_key_sched</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1138</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a3b5c3407cc4595420dbe43e98090e558"><div class="ttname"><a href="structIMB__MGR.html#a3b5c3407cc4595420dbe43e98090e558">IMB_MGR::gcm192_enc_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm192_enc_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1094</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a3bb98c9a9c8545f363b74627870c7038"><div class="ttname"><a href="structIMB__MGR.html#a3bb98c9a9c8545f363b74627870c7038">IMB_MGR::gmac256_finalize</a></div><div class="ttdeci">aes_gmac_finalize_t gmac256_finalize</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1155</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a3d5173cea3d4932576f0a5b3abbc1f40"><div class="ttname"><a href="structIMB__MGR.html#a3d5173cea3d4932576f0a5b3abbc1f40">IMB_MGR::docsis_des_dec_ooo</a></div><div class="ttdeci">void * docsis_des_dec_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1203</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a3dd58a9d9b4fb6cf85fa26175ffac9a6"><div class="ttname"><a href="structIMB__MGR.html#a3dd58a9d9b4fb6cf85fa26175ffac9a6">IMB_MGR::gmac192_init</a></div><div class="ttdeci">aes_gmac_init_t gmac192_init</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1148</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a3ed58bdf37ab6d5f0d28271882d52327"><div class="ttname"><a href="structIMB__MGR.html#a3ed58bdf37ab6d5f0d28271882d52327">IMB_MGR::eia3_1_buffer</a></div><div class="ttdeci">zuc_eia3_1_buffer_t eia3_1_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1115</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a3eeeead99056e46d8cb1ed316f587aaf"><div class="ttname"><a href="structIMB__MGR.html#a3eeeead99056e46d8cb1ed316f587aaf">IMB_MGR::aes_ccm_ooo</a></div><div class="ttdeci">void * aes_ccm_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1212</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a4128ee02f4cbef5aa1e6b0bb5fd46097"><div class="ttname"><a href="structIMB__MGR.html#a4128ee02f4cbef5aa1e6b0bb5fd46097">IMB_MGR::hec_64</a></div><div class="ttdeci">hec_64_t hec_64</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1157</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a431e99ddb3837a32bedb6cd426054bcc"><div class="ttname"><a href="structIMB__MGR.html#a431e99ddb3837a32bedb6cd426054bcc">IMB_MGR::keyexp_256</a></div><div class="ttdeci">keyexp_t keyexp_256</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1067</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a44b0b9d218043be965a84c29ced2584b"><div class="ttname"><a href="structIMB__MGR.html#a44b0b9d218043be965a84c29ced2584b">IMB_MGR::gcm256_pre</a></div><div class="ttdeci">aes_gcm_pre_t gcm256_pre</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1110</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a44b6c95f8ce611828b6acacdb459cdc9"><div class="ttname"><a href="structIMB__MGR.html#a44b6c95f8ce611828b6acacdb459cdc9">IMB_MGR::used_arch</a></div><div class="ttdeci">uint32_t used_arch</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1049</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a49be1d77b96d338c08200dce82e452d3"><div class="ttname"><a href="structIMB__MGR.html#a49be1d77b96d338c08200dce82e452d3">IMB_MGR::hmac_sha_1_ooo</a></div><div class="ttdeci">void * hmac_sha_1_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1205</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a4aed66c9e73808a65a062e1a5b0f66aa"><div class="ttname"><a href="structIMB__MGR.html#a4aed66c9e73808a65a062e1a5b0f66aa">IMB_MGR::crc32_sctp</a></div><div class="ttdeci">crc32_fn_t crc32_sctp</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1162</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a4b901916c2f262f1c873e4cec7b7f474"><div class="ttname"><a href="structIMB__MGR.html#a4b901916c2f262f1c873e4cec7b7f474">IMB_MGR::crc11_fp_header</a></div><div class="ttdeci">crc32_fn_t crc11_fp_header</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1166</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a4d7879172344be144b92be68b2e2a81a"><div class="ttname"><a href="structIMB__MGR.html#a4d7879172344be144b92be68b2e2a81a">IMB_MGR::gcm192_dec_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm192_dec_finalize</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1103</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a4fbdac066c9d0fbd1d586a2e5b2319c3"><div class="ttname"><a href="structIMB__MGR.html#a4fbdac066c9d0fbd1d586a2e5b2319c3">IMB_MGR::f9_1_buffer_user</a></div><div class="ttdeci">kasumi_f9_1_buffer_user_t f9_1_buffer_user</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1124</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a51a499114f84eed88cb48bd3b461bd1c"><div class="ttname"><a href="structIMB__MGR.html#a51a499114f84eed88cb48bd3b461bd1c">IMB_MGR::sha_384_ooo</a></div><div class="ttdeci">void * sha_384_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1226</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a5220f0d243291ae5a2f43fbc93d18725"><div class="ttname"><a href="structIMB__MGR.html#a5220f0d243291ae5a2f43fbc93d18725">IMB_MGR::gmac192_update</a></div><div class="ttdeci">aes_gmac_update_t gmac192_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1151</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a52a7ab10d6434820e9b31d0e772ea0bc"><div class="ttname"><a href="structIMB__MGR.html#a52a7ab10d6434820e9b31d0e772ea0bc">IMB_MGR::crc16_x25</a></div><div class="ttdeci">crc32_fn_t crc16_x25</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1161</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a52e26b8805b28d1298ac48e5762412b5"><div class="ttname"><a href="structIMB__MGR.html#a52e26b8805b28d1298ac48e5762412b5">IMB_MGR::sha224</a></div><div class="ttdeci">hash_fn_t sha224</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1078</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a54b5f7b625ce226ebd46a2a19e9bc724"><div class="ttname"><a href="structIMB__MGR.html#a54b5f7b625ce226ebd46a2a19e9bc724">IMB_MGR::md5_one_block</a></div><div class="ttdeci">hash_one_block_t md5_one_block</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1076</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a54ec50411917f1aa9016db268ac638c1"><div class="ttname"><a href="structIMB__MGR.html#a54ec50411917f1aa9016db268ac638c1">IMB_MGR::des_enc_ooo</a></div><div class="ttdeci">void * des_enc_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1198</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a58ad87104b08ba5b56fc65928677a639"><div class="ttname"><a href="structIMB__MGR.html#a58ad87104b08ba5b56fc65928677a639">IMB_MGR::kasumi_init_f9_key_sched</a></div><div class="ttdeci">kasumi_init_f9_key_sched_t kasumi_init_f9_key_sched</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1126</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a5a35c9c2a1c8eb5b4aa239a3b04f4fbf"><div class="ttname"><a href="structIMB__MGR.html#a5a35c9c2a1c8eb5b4aa239a3b04f4fbf">IMB_MGR::queue_size</a></div><div class="ttdeci">queue_size_t queue_size</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1064</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a5c2e4a1296e33f5c9eaff2067a6432d4"><div class="ttname"><a href="structIMB__MGR.html#a5c2e4a1296e33f5c9eaff2067a6432d4">IMB_MGR::gcm256_dec_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm256_dec_finalize</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1104</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a5e0002330399f643e8f0ca0c1b96a7a0"><div class="ttname"><a href="structIMB__MGR.html#a5e0002330399f643e8f0ca0c1b96a7a0">IMB_MGR::snow3g_key_sched_size</a></div><div class="ttdeci">snow3g_key_sched_size_t snow3g_key_sched_size</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1139</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a5e5be572c46ed01ac11fc95738373e2a"><div class="ttname"><a href="structIMB__MGR.html#a5e5be572c46ed01ac11fc95738373e2a">IMB_MGR::crc8_wimax_ofdma_hcs</a></div><div class="ttdeci">crc32_fn_t crc8_wimax_ofdma_hcs</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1171</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a5f8744a8d64273d3f4cbcd9ad41ce3d5"><div class="ttname"><a href="structIMB__MGR.html#a5f8744a8d64273d3f4cbcd9ad41ce3d5">IMB_MGR::zuc256_eia3_ooo</a></div><div class="ttdeci">void * zuc256_eia3_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1218</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a620d2d75bb50784aa0000b458197afaf"><div class="ttname"><a href="structIMB__MGR.html#a620d2d75bb50784aa0000b458197afaf">IMB_MGR::snow3g_f8_8_buffer</a></div><div class="ttdeci">snow3g_f8_8_buffer_t snow3g_f8_8_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1133</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a62ebdd5e2b5a59c9e648511caf56f3f1"><div class="ttname"><a href="structIMB__MGR.html#a62ebdd5e2b5a59c9e648511caf56f3f1">IMB_MGR::sha512</a></div><div class="ttdeci">hash_fn_t sha512</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1081</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a633807f7eaae35ada650a2c22f1366be"><div class="ttname"><a href="structIMB__MGR.html#a633807f7eaae35ada650a2c22f1366be">IMB_MGR::hmac_sha_256_ooo</a></div><div class="ttdeci">void * hmac_sha_256_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1207</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a63a2a5f74e7cc2fc637896bdaeb6b262"><div class="ttname"><a href="structIMB__MGR.html#a63a2a5f74e7cc2fc637896bdaeb6b262">IMB_MGR::snow3g_f8_n_buffer_multikey</a></div><div class="ttdeci">snow3g_f8_n_buffer_multikey_t snow3g_f8_n_buffer_multikey</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1136</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a66fa94f9c07061f3d93b78ed505931e3"><div class="ttname"><a href="structIMB__MGR.html#a66fa94f9c07061f3d93b78ed505931e3">IMB_MGR::gcm192_dec_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm192_dec_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1097</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a67b96b1b26fa25391f9f4b83a7a4b6c0"><div class="ttname"><a href="structIMB__MGR.html#a67b96b1b26fa25391f9f4b83a7a4b6c0">IMB_MGR::chacha20_poly1305_init</a></div><div class="ttdeci">chacha_poly_init_t chacha20_poly1305_init</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1173</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a67d8a55ba87742b8cf282d23ed9e3ef5"><div class="ttname"><a href="structIMB__MGR.html#a67d8a55ba87742b8cf282d23ed9e3ef5">IMB_MGR::eea3_n_buffer</a></div><div class="ttdeci">zuc_eea3_n_buffer_t eea3_n_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1114</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a69e4dd044703cd3aa9c4c36e04b2a701"><div class="ttname"><a href="structIMB__MGR.html#a69e4dd044703cd3aa9c4c36e04b2a701">IMB_MGR::gcm128_precomp</a></div><div class="ttdeci">aes_gcm_precomp_t gcm128_precomp</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1105</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a6a790b2aa04138fce78c3347e285a31b"><div class="ttname"><a href="structIMB__MGR.html#a6a790b2aa04138fce78c3347e285a31b">IMB_MGR::submit_burst</a></div><div class="ttdeci">submit_burst_t submit_burst</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1178</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a6abbf129001cb44003a10105115e52b7"><div class="ttname"><a href="structIMB__MGR.html#a6abbf129001cb44003a10105115e52b7">IMB_MGR::aes256_ooo</a></div><div class="ttdeci">void * aes256_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1193</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a6d05b0a20196be514182920710dce2a8"><div class="ttname"><a href="structIMB__MGR.html#a6d05b0a20196be514182920710dce2a8">IMB_MGR::zuc256_eea3_ooo</a></div><div class="ttdeci">void * zuc256_eea3_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1217</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a6e1ab772182b97f931af3d4685785353"><div class="ttname"><a href="structIMB__MGR.html#a6e1ab772182b97f931af3d4685785353">IMB_MGR::end_ooo</a></div><div class="ttdeci">void * end_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1228</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a6e21e034cd011b695bac5a711be65da1"><div class="ttname"><a href="structIMB__MGR.html#a6e21e034cd011b695bac5a711be65da1">IMB_MGR::sha_512_ooo</a></div><div class="ttdeci">void * sha_512_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1227</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a715aede4176564ac475e42c8a377bd8d"><div class="ttname"><a href="structIMB__MGR.html#a715aede4176564ac475e42c8a377bd8d">IMB_MGR::chacha20_poly1305_dec_update</a></div><div class="ttdeci">chacha_poly_enc_dec_update_t chacha20_poly1305_dec_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1175</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a79767326692a8d4faabe5ab435dc5df8"><div class="ttname"><a href="structIMB__MGR.html#a79767326692a8d4faabe5ab435dc5df8">IMB_MGR::gcm256_enc</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm256_enc</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1086</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a7bfa7b17c0fb36dc832138a86948991f"><div class="ttname"><a href="structIMB__MGR.html#a7bfa7b17c0fb36dc832138a86948991f">IMB_MGR::gcm192_init_var_iv</a></div><div class="ttdeci">aes_gcm_init_var_iv_t gcm192_init_var_iv</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1144</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a7c97c5361b90abe325db55530b6f198e"><div class="ttname"><a href="structIMB__MGR.html#a7c97c5361b90abe325db55530b6f198e">IMB_MGR::keyexp_128</a></div><div class="ttdeci">keyexp_t keyexp_128</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1065</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a7d0979deda4e2ff7ac202c82611ce94c"><div class="ttname"><a href="structIMB__MGR.html#a7d0979deda4e2ff7ac202c82611ce94c">IMB_MGR::crc10_iuup_data</a></div><div class="ttdeci">crc32_fn_t crc10_iuup_data</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1168</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a809782eb9dcbd264442bcd9edd2f4c2f"><div class="ttname"><a href="structIMB__MGR.html#a809782eb9dcbd264442bcd9edd2f4c2f">IMB_MGR::submit_hash_burst_nocheck</a></div><div class="ttdeci">submit_hash_burst_t submit_hash_burst_nocheck</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1183</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a80a26be9a12f561a68b70d65e096cde9"><div class="ttname"><a href="structIMB__MGR.html#a80a26be9a12f561a68b70d65e096cde9">IMB_MGR::sha1_one_block</a></div><div class="ttdeci">hash_one_block_t sha1_one_block</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1071</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a829c4cf1157dfc3fcb829df31e408e9d"><div class="ttname"><a href="structIMB__MGR.html#a829c4cf1157dfc3fcb829df31e408e9d">IMB_MGR::snow3g_f8_n_buffer</a></div><div class="ttdeci">snow3g_f8_n_buffer_t snow3g_f8_n_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1134</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a82aaedc800096aaa55062c56131e0b13"><div class="ttname"><a href="structIMB__MGR.html#a82aaedc800096aaa55062c56131e0b13">IMB_MGR::sha1</a></div><div class="ttdeci">hash_fn_t sha1</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1077</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a8483109fbe42f8b7fa6e7f53e016d5ec"><div class="ttname"><a href="structIMB__MGR.html#a8483109fbe42f8b7fa6e7f53e016d5ec">IMB_MGR::crc32_ethernet_fcs</a></div><div class="ttdeci">crc32_fn_t crc32_ethernet_fcs</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1160</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a855d14df536b22ceb175dc495ced891c"><div class="ttname"><a href="structIMB__MGR.html#a855d14df536b22ceb175dc495ced891c">IMB_MGR::hmac_md5_ooo</a></div><div class="ttdeci">void * hmac_md5_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1210</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a87f7566634911b4dba48a19a0c3a4993"><div class="ttname"><a href="structIMB__MGR.html#a87f7566634911b4dba48a19a0c3a4993">IMB_MGR::des3_enc_ooo</a></div><div class="ttdeci">void * des3_enc_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1200</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a88f1060a2adb8098fc085fc2b812addc"><div class="ttname"><a href="structIMB__MGR.html#a88f1060a2adb8098fc085fc2b812addc">IMB_MGR::sha512_one_block</a></div><div class="ttdeci">hash_one_block_t sha512_one_block</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1075</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a8987d7d491628d9d80f12820468ac541"><div class="ttname"><a href="structIMB__MGR.html#a8987d7d491628d9d80f12820468ac541">IMB_MGR::gcm256_init</a></div><div class="ttdeci">aes_gcm_init_t gcm256_init</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1092</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a898a4c56e1a746a328529c3665c5682e"><div class="ttname"><a href="structIMB__MGR.html#a898a4c56e1a746a328529c3665c5682e">IMB_MGR::snow3g_f8_8_buffer_multikey</a></div><div class="ttdeci">snow3g_f8_8_buffer_multikey_t snow3g_f8_8_buffer_multikey</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1135</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a8b52f1b3ca92eff48b945929a0eab839"><div class="ttname"><a href="structIMB__MGR.html#a8b52f1b3ca92eff48b945929a0eab839">IMB_MGR::submit_cipher_burst</a></div><div class="ttdeci">submit_cipher_burst_t submit_cipher_burst</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1180</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a8d978764a953e220b3c799990bae490b"><div class="ttname"><a href="structIMB__MGR.html#a8d978764a953e220b3c799990bae490b">IMB_MGR::sha256</a></div><div class="ttdeci">hash_fn_t sha256</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1079</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a8efc0cf95907805289a297c024ce0cac"><div class="ttname"><a href="structIMB__MGR.html#a8efc0cf95907805289a297c024ce0cac">IMB_MGR::gcm128_enc_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm128_enc_finalize</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1099</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a90aad4f47448a1959b7cf747438d7ce9"><div class="ttname"><a href="structIMB__MGR.html#a90aad4f47448a1959b7cf747438d7ce9">IMB_MGR::gmac128_update</a></div><div class="ttdeci">aes_gmac_update_t gmac128_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1150</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a910f747aa1a0e6a46f87b0dfd2189219"><div class="ttname"><a href="structIMB__MGR.html#a910f747aa1a0e6a46f87b0dfd2189219">IMB_MGR::zuc_eia3_ooo</a></div><div class="ttdeci">void * zuc_eia3_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1215</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a91ad9ce7a4b3c9ceeffa9dd712013915"><div class="ttname"><a href="structIMB__MGR.html#a91ad9ce7a4b3c9ceeffa9dd712013915">IMB_MGR::gcm192_enc_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm192_enc_finalize</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1100</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a929b9c50bc98bf37daec7a1603f10118"><div class="ttname"><a href="structIMB__MGR.html#a929b9c50bc98bf37daec7a1603f10118">IMB_MGR::f8_3_buffer</a></div><div class="ttdeci">kasumi_f8_3_buffer_t f8_3_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1120</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a92b7ff145f0016dd46eabf9271ef03f1"><div class="ttname"><a href="structIMB__MGR.html#a92b7ff145f0016dd46eabf9271ef03f1">IMB_MGR::sha384_one_block</a></div><div class="ttdeci">hash_one_block_t sha384_one_block</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1074</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a937fb0d3b113d203ee1a4beaf5b5b98f"><div class="ttname"><a href="structIMB__MGR.html#a937fb0d3b113d203ee1a4beaf5b5b98f">IMB_MGR::docsis_des_enc_ooo</a></div><div class="ttdeci">void * docsis_des_enc_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1202</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a93cb5904608e179c49917f80c64fabd1"><div class="ttname"><a href="structIMB__MGR.html#a93cb5904608e179c49917f80c64fabd1">IMB_MGR::docsis128_sec_ooo</a></div><div class="ttdeci">void * docsis128_sec_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1194</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a9764d27efef2491a86d517f38dd9b6ef"><div class="ttname"><a href="structIMB__MGR.html#a9764d27efef2491a86d517f38dd9b6ef">IMB_MGR::gcm256_enc_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm256_enc_finalize</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1101</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a97fd05a4057fc898f647955a7ba8501b"><div class="ttname"><a href="structIMB__MGR.html#a97fd05a4057fc898f647955a7ba8501b">IMB_MGR::aes128_ooo</a></div><div class="ttdeci">void * aes128_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1191</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a99b7111c8fc59161e0bf291d13b1f195"><div class="ttname"><a href="structIMB__MGR.html#a99b7111c8fc59161e0bf291d13b1f195">IMB_MGR::get_completed_job</a></div><div class="ttdeci">get_completed_job_t get_completed_job</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1062</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a99fcb1d18fa45044063c6c288b0fc769"><div class="ttname"><a href="structIMB__MGR.html#a99fcb1d18fa45044063c6c288b0fc769">IMB_MGR::gcm256_dec_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm256_dec_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1098</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a9a4d2148b6e8b4426b2946e9fe695461"><div class="ttname"><a href="structIMB__MGR.html#a9a4d2148b6e8b4426b2946e9fe695461">IMB_MGR::snow3g_f9_1_buffer</a></div><div class="ttdeci">snow3g_f9_1_buffer_t snow3g_f9_1_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1137</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a9c72f3341a9a4837595338d06c3eda5c"><div class="ttname"><a href="structIMB__MGR.html#a9c72f3341a9a4837595338d06c3eda5c">IMB_MGR::aes128_cbcs_ooo</a></div><div class="ttdeci">void * aes128_cbcs_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1216</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a9f8b9687fbb17f7a78fc4ba79e2749fd"><div class="ttname"><a href="structIMB__MGR.html#a9f8b9687fbb17f7a78fc4ba79e2749fd">IMB_MGR::gcm128_enc</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm128_enc</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1084</div></div>
-<div class="ttc" id="astructIMB__MGR_html_a9ffcce0ba9aef3cd68bdd7f6e9e3e2a0"><div class="ttname"><a href="structIMB__MGR.html#a9ffcce0ba9aef3cd68bdd7f6e9e3e2a0">IMB_MGR::sha384</a></div><div class="ttdeci">hash_fn_t sha384</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1080</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aa174bf6846067a48f3f47ee5ebd74877"><div class="ttname"><a href="structIMB__MGR.html#aa174bf6846067a48f3f47ee5ebd74877">IMB_MGR::sha_224_ooo</a></div><div class="ttdeci">void * sha_224_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1224</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aa3404b7811d57821ea574994e0c88995"><div class="ttname"><a href="structIMB__MGR.html#aa3404b7811d57821ea574994e0c88995">IMB_MGR::cmac_subkey_gen_128</a></div><div class="ttdeci">cmac_subkey_gen_t cmac_subkey_gen_128</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1068</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aa610dc7226673020be410762b995b725"><div class="ttname"><a href="structIMB__MGR.html#aa610dc7226673020be410762b995b725">IMB_MGR::crc6_iuup_header</a></div><div class="ttdeci">crc32_fn_t crc6_iuup_header</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1169</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aa7d4cfe53e0d70c22d3a274b8cd218af"><div class="ttname"><a href="structIMB__MGR.html#aa7d4cfe53e0d70c22d3a274b8cd218af">IMB_MGR::snow3g_uia2_ooo</a></div><div class="ttdeci">void * snow3g_uia2_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1222</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aaaeb1676e0cf19e3558d10e537f71bda"><div class="ttname"><a href="structIMB__MGR.html#aaaeb1676e0cf19e3558d10e537f71bda">IMB_MGR::gcm192_enc</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm192_enc</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1085</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aab7350eeecc56b1ef45606b83519a72c"><div class="ttname"><a href="structIMB__MGR.html#aab7350eeecc56b1ef45606b83519a72c">IMB_MGR::submit_job_nocheck</a></div><div class="ttdeci">submit_job_t submit_job_nocheck</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1061</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aacf6ce3f508fef115dcd2dc415ca7379"><div class="ttname"><a href="structIMB__MGR.html#aacf6ce3f508fef115dcd2dc415ca7379">IMB_MGR::f8_1_buffer_bit</a></div><div class="ttdeci">kasumi_f8_1_buffer_bit_t f8_1_buffer_bit</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1118</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aacf8209094d12ceceed96d4d0fae193c"><div class="ttname"><a href="structIMB__MGR.html#aacf8209094d12ceceed96d4d0fae193c">IMB_MGR::sha224_one_block</a></div><div class="ttdeci">hash_one_block_t sha224_one_block</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1072</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aae9afac5c2c1bf7b27d187d10778a1ee"><div class="ttname"><a href="structIMB__MGR.html#aae9afac5c2c1bf7b27d187d10778a1ee">IMB_MGR::des_key_sched</a></div><div class="ttdeci">des_keysched_t des_key_sched</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1070</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ab0193bf46978026a82803c25e11acbfb"><div class="ttname"><a href="structIMB__MGR.html#ab0193bf46978026a82803c25e11acbfb">IMB_MGR::snow3g_uea2_ooo</a></div><div class="ttdeci">void * snow3g_uea2_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1221</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ab143534d96e0d585b19dfc19553e929b"><div class="ttname"><a href="structIMB__MGR.html#ab143534d96e0d585b19dfc19553e929b">IMB_MGR::submit_job</a></div><div class="ttdeci">submit_job_t submit_job</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1060</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ab18b3fcba2aa252bb31f66093bc62abb"><div class="ttname"><a href="structIMB__MGR.html#ab18b3fcba2aa252bb31f66093bc62abb">IMB_MGR::chacha20_poly1305_finalize</a></div><div class="ttdeci">chacha_poly_finalize_t chacha20_poly1305_finalize</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1176</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ab2c87c40f9844795e3987536c602ce03"><div class="ttname"><a href="structIMB__MGR.html#ab2c87c40f9844795e3987536c602ce03">IMB_MGR::chacha20_poly1305_enc_update</a></div><div class="ttdeci">chacha_poly_enc_dec_update_t chacha20_poly1305_enc_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1174</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ab32d67f27cb6f06980080e09db133b24"><div class="ttname"><a href="structIMB__MGR.html#ab32d67f27cb6f06980080e09db133b24">IMB_MGR::kasumi_init_f8_key_sched</a></div><div class="ttdeci">kasumi_init_f8_key_sched_t kasumi_init_f8_key_sched</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1125</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ab342224dce812fb13a9e935e7a7b0617"><div class="ttname"><a href="structIMB__MGR.html#ab342224dce812fb13a9e935e7a7b0617">IMB_MGR::jobs</a></div><div class="ttdeci">IMB_JOB jobs[IMB_MAX_JOBS]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1188</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ab515c5aec39b1a9a31454b945e5ccd35"><div class="ttname"><a href="structIMB__MGR.html#ab515c5aec39b1a9a31454b945e5ccd35">IMB_MGR::eia3_n_buffer</a></div><div class="ttdeci">zuc_eia3_n_buffer_t eia3_n_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1142</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ab70cbec09a61b5adeae37260c10234ce"><div class="ttname"><a href="structIMB__MGR.html#ab70cbec09a61b5adeae37260c10234ce">IMB_MGR::snow3g_f8_1_buffer</a></div><div class="ttdeci">snow3g_f8_1_buffer_t snow3g_f8_1_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1130</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ab9226cf37e41c2a13ae6003305654193"><div class="ttname"><a href="structIMB__MGR.html#ab9226cf37e41c2a13ae6003305654193">IMB_MGR::hmac_sha_224_ooo</a></div><div class="ttdeci">void * hmac_sha_224_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1206</div></div>
-<div class="ttc" id="astructIMB__MGR_html_abd0c855a3e43df48f5f21686a095f358"><div class="ttname"><a href="structIMB__MGR.html#abd0c855a3e43df48f5f21686a095f358">IMB_MGR::kasumi_key_sched_size</a></div><div class="ttdeci">kasumi_key_sched_size_t kasumi_key_sched_size</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1127</div></div>
-<div class="ttc" id="astructIMB__MGR_html_abd468de03563a40da0b21b0885f44cbe"><div class="ttname"><a href="structIMB__MGR.html#abd468de03563a40da0b21b0885f44cbe">IMB_MGR::aes128_cfb_one</a></div><div class="ttdeci">aes_cfb_t aes128_cfb_one</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1082</div></div>
-<div class="ttc" id="astructIMB__MGR_html_abd500d2cc03f6470ac6988785bebdf76"><div class="ttname"><a href="structIMB__MGR.html#abd500d2cc03f6470ac6988785bebdf76">IMB_MGR::cmac_subkey_gen_256</a></div><div class="ttdeci">cmac_subkey_gen_t cmac_subkey_gen_256</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1158</div></div>
-<div class="ttc" id="astructIMB__MGR_html_abe8406f3582d3540edb770e153b74c3e"><div class="ttname"><a href="structIMB__MGR.html#abe8406f3582d3540edb770e153b74c3e">IMB_MGR::crc24_lte_b</a></div><div class="ttdeci">crc32_fn_t crc24_lte_b</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1164</div></div>
-<div class="ttc" id="astructIMB__MGR_html_abec8bdb319ca132028d5b787bf60a895"><div class="ttname"><a href="structIMB__MGR.html#abec8bdb319ca132028d5b787bf60a895">IMB_MGR::gcm192_precomp</a></div><div class="ttdeci">aes_gcm_precomp_t gcm192_precomp</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1106</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ac131ceec0dcb0d08097b76c8abe9e024"><div class="ttname"><a href="structIMB__MGR.html#ac131ceec0dcb0d08097b76c8abe9e024">IMB_MGR::gcm256_enc_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm256_enc_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1095</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ac5ad1bf8ecdcfc51eaf681fb353c9621"><div class="ttname"><a href="structIMB__MGR.html#ac5ad1bf8ecdcfc51eaf681fb353c9621">IMB_MGR::eea3_4_buffer</a></div><div class="ttdeci">zuc_eea3_4_buffer_t eea3_4_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1113</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ac5cd33ac3bf985dc31ccc716fb3a7747"><div class="ttname"><a href="structIMB__MGR.html#ac5cd33ac3bf985dc31ccc716fb3a7747">IMB_MGR::earliest_job</a></div><div class="ttdeci">int earliest_job</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1186</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ac733fc4c5ee6e80e8e71b20a9bb2dc6e"><div class="ttname"><a href="structIMB__MGR.html#ac733fc4c5ee6e80e8e71b20a9bb2dc6e">IMB_MGR::f8_2_buffer</a></div><div class="ttdeci">kasumi_f8_2_buffer_t f8_2_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1119</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ac819ddcc968604186983d58f275bd24b"><div class="ttname"><a href="structIMB__MGR.html#ac819ddcc968604186983d58f275bd24b">IMB_MGR::crc7_fp_header</a></div><div class="ttdeci">crc32_fn_t crc7_fp_header</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1167</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aca7d6388863eb76b60651e7b16c41b82"><div class="ttname"><a href="structIMB__MGR.html#aca7d6388863eb76b60651e7b16c41b82">IMB_MGR::gmac256_init</a></div><div class="ttdeci">aes_gmac_init_t gmac256_init</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1149</div></div>
-<div class="ttc" id="astructIMB__MGR_html_acb2ee84d30247bb257635063db3ae308"><div class="ttname"><a href="structIMB__MGR.html#acb2ee84d30247bb257635063db3ae308">IMB_MGR::submit_cipher_burst_nocheck</a></div><div class="ttdeci">submit_cipher_burst_t submit_cipher_burst_nocheck</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1181</div></div>
-<div class="ttc" id="astructIMB__MGR_html_acb6e3b70e16194274e2eaefdff8f9e89"><div class="ttname"><a href="structIMB__MGR.html#acb6e3b70e16194274e2eaefdff8f9e89">IMB_MGR::docsis256_sec_ooo</a></div><div class="ttdeci">void * docsis256_sec_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1196</div></div>
-<div class="ttc" id="astructIMB__MGR_html_acbd18bab8176262daab2bd808ca30616"><div class="ttname"><a href="structIMB__MGR.html#acbd18bab8176262daab2bd808ca30616">IMB_MGR::aes256_cmac_ooo</a></div><div class="ttdeci">void * aes256_cmac_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1220</div></div>
-<div class="ttc" id="astructIMB__MGR_html_acdb53e812f3e4a307a497eeab28c4256"><div class="ttname"><a href="structIMB__MGR.html#acdb53e812f3e4a307a497eeab28c4256">IMB_MGR::sha_1_ooo</a></div><div class="ttdeci">void * sha_1_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1223</div></div>
-<div class="ttc" id="astructIMB__MGR_html_acf438b50cb95a4fff1276b6666d22ad4"><div class="ttname"><a href="structIMB__MGR.html#acf438b50cb95a4fff1276b6666d22ad4">IMB_MGR::docsis128_crc32_sec_ooo</a></div><div class="ttdeci">void * docsis128_crc32_sec_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1195</div></div>
-<div class="ttc" id="astructIMB__MGR_html_acfdfb511771cac71e032c5bf1c9273b7"><div class="ttname"><a href="structIMB__MGR.html#acfdfb511771cac71e032c5bf1c9273b7">IMB_MGR::gcm256_dec</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm256_dec</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1089</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ad08e44bc4edc54c556ea2245f848b974"><div class="ttname"><a href="structIMB__MGR.html#ad08e44bc4edc54c556ea2245f848b974">IMB_MGR::crc32_wimax_ofdma_data</a></div><div class="ttdeci">crc32_fn_t crc32_wimax_ofdma_data</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1170</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ad16230a6a671adbd597675abbc0f0a87"><div class="ttname"><a href="structIMB__MGR.html#ad16230a6a671adbd597675abbc0f0a87">IMB_MGR::submit_burst_nocheck</a></div><div class="ttdeci">submit_burst_t submit_burst_nocheck</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1179</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ad2c64d9d5f9ffd65d13e73205cb803cd"><div class="ttname"><a href="structIMB__MGR.html#ad2c64d9d5f9ffd65d13e73205cb803cd">IMB_MGR::gcm128_enc_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm128_enc_update</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1093</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ad554a25793a904ae6cf7ca87250adbd3"><div class="ttname"><a href="structIMB__MGR.html#ad554a25793a904ae6cf7ca87250adbd3">IMB_MGR::aes_xcbc_ooo</a></div><div class="ttdeci">void * aes_xcbc_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1211</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ad566ac43002c2ba8ecb93048d5edc41b"><div class="ttname"><a href="structIMB__MGR.html#ad566ac43002c2ba8ecb93048d5edc41b">IMB_MGR::crc16_fp_data</a></div><div class="ttdeci">crc32_fn_t crc16_fp_data</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1165</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ad85fdcb101391b0a2488a3244d5f442d"><div class="ttname"><a href="structIMB__MGR.html#ad85fdcb101391b0a2488a3244d5f442d">IMB_MGR::snow3g_f8_1_buffer_bit</a></div><div class="ttdeci">snow3g_f8_1_buffer_bit_t snow3g_f8_1_buffer_bit</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1129</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ad8c004899d29974a3f4c034370422c31"><div class="ttname"><a href="structIMB__MGR.html#ad8c004899d29974a3f4c034370422c31">IMB_MGR::gcm128_init</a></div><div class="ttdeci">aes_gcm_init_t gcm128_init</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1090</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ade4a72c39980f0bba790b70529b60158"><div class="ttname"><a href="structIMB__MGR.html#ade4a72c39980f0bba790b70529b60158">IMB_MGR::sha256_one_block</a></div><div class="ttdeci">hash_one_block_t sha256_one_block</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1073</div></div>
-<div class="ttc" id="astructIMB__MGR_html_adff2cf46e7cbb5e2926f348623d8ad2a"><div class="ttname"><a href="structIMB__MGR.html#adff2cf46e7cbb5e2926f348623d8ad2a">IMB_MGR::gcm192_dec</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm192_dec</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1088</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ae0f2316d96e46b64d08e3cf73a93b39d"><div class="ttname"><a href="structIMB__MGR.html#ae0f2316d96e46b64d08e3cf73a93b39d">IMB_MGR::f8_n_buffer</a></div><div class="ttdeci">kasumi_f8_n_buffer_t f8_n_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1122</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ae1a596c9c9d6ca1292c6116575021c14"><div class="ttname"><a href="structIMB__MGR.html#ae1a596c9c9d6ca1292c6116575021c14">IMB_MGR::flags</a></div><div class="ttdeci">uint64_t flags</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1045</div></div>
-<div class="ttc" id="astructIMB__MGR_html_ae575c2350f5fca9a182c541795bb7d4d"><div class="ttname"><a href="structIMB__MGR.html#ae575c2350f5fca9a182c541795bb7d4d">IMB_MGR::xcbc_keyexp</a></div><div class="ttdeci">xcbc_keyexp_t xcbc_keyexp</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1069</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aebd9eab76cd056add559e6bea328dbf0"><div class="ttname"><a href="structIMB__MGR.html#aebd9eab76cd056add559e6bea328dbf0">IMB_MGR::gcm128_init_var_iv</a></div><div class="ttdeci">aes_gcm_init_var_iv_t gcm128_init_var_iv</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1143</div></div>
-<div class="ttc" id="astructIMB__MGR_html_aeff54b370fbe495ce96370811d280140"><div class="ttname"><a href="structIMB__MGR.html#aeff54b370fbe495ce96370811d280140">IMB_MGR::eea3_1_buffer</a></div><div class="ttdeci">zuc_eea3_1_buffer_t eea3_1_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1112</div></div>
-<div class="ttc" id="astructIMB__MGR_html_af03e401b002e2e415c8a927c46e1517b"><div class="ttname"><a href="structIMB__MGR.html#af03e401b002e2e415c8a927c46e1517b">IMB_MGR::des_dec_ooo</a></div><div class="ttdeci">void * des_dec_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1199</div></div>
-<div class="ttc" id="astructIMB__MGR_html_af0b1c5d3b269b252a75a55df8bdf472c"><div class="ttname"><a href="structIMB__MGR.html#af0b1c5d3b269b252a75a55df8bdf472c">IMB_MGR::f8_4_buffer</a></div><div class="ttdeci">kasumi_f8_4_buffer_t f8_4_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1121</div></div>
-<div class="ttc" id="astructIMB__MGR_html_af0cf9149495b0805a4f6f511c0fbff5b"><div class="ttname"><a href="structIMB__MGR.html#af0cf9149495b0805a4f6f511c0fbff5b">IMB_MGR::hmac_sha_512_ooo</a></div><div class="ttdeci">void * hmac_sha_512_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1209</div></div>
-<div class="ttc" id="astructIMB__MGR_html_af6531598b8dd0131a11e0cf95854605d"><div class="ttname"><a href="structIMB__MGR.html#af6531598b8dd0131a11e0cf95854605d">IMB_MGR::docsis256_crc32_sec_ooo</a></div><div class="ttdeci">void * docsis256_crc32_sec_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1197</div></div>
-<div class="ttc" id="astructIMB__MGR_html_af6a1c323981b8c3cfe09f94cd9dd58e2"><div class="ttname"><a href="structIMB__MGR.html#af6a1c323981b8c3cfe09f94cd9dd58e2">IMB_MGR::ghash_pre</a></div><div class="ttdeci">aes_gcm_pre_t ghash_pre</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1159</div></div>
-<div class="ttc" id="astructIMB__MGR_html_af854e664cef84cb8be4495a1af5e9cb5"><div class="ttname"><a href="structIMB__MGR.html#af854e664cef84cb8be4495a1af5e9cb5">IMB_MGR::f8_1_buffer</a></div><div class="ttdeci">kasumi_f8_1_buffer_t f8_1_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1117</div></div>
-<div class="ttc" id="astructIMB__MGR_html_af877c7669265775604857c6b81063bdb"><div class="ttname"><a href="structIMB__MGR.html#af877c7669265775604857c6b81063bdb">IMB_MGR::features</a></div><div class="ttdeci">uint64_t features</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1046</div></div>
-<div class="ttc" id="astructIMB__MGR_html_af95fa831fb24629e19613e8594e5d32a"><div class="ttname"><a href="structIMB__MGR.html#af95fa831fb24629e19613e8594e5d32a">IMB_MGR::gcm128_dec_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm128_dec_finalize</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1102</div></div>
-<div class="ttc" id="astructIMB__MGR_html_afa275308dab467d0c68dc921bd68d1a4"><div class="ttname"><a href="structIMB__MGR.html#afa275308dab467d0c68dc921bd68d1a4">IMB_MGR::gcm256_init_var_iv</a></div><div class="ttdeci">aes_gcm_init_var_iv_t gcm256_init_var_iv</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1145</div></div>
-<div class="ttc" id="astructIMB__MGR_html_afafb95a00fe6633fb6901855928b08bb"><div class="ttname"><a href="structIMB__MGR.html#afafb95a00fe6633fb6901855928b08bb">IMB_MGR::f9_1_buffer</a></div><div class="ttdeci">kasumi_f9_1_buffer_t f9_1_buffer</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1123</div></div>
-<div class="ttc" id="astructIMB__MGR_html_afc7d7ae10e8e6f37b9ec894059818fad"><div class="ttname"><a href="structIMB__MGR.html#afc7d7ae10e8e6f37b9ec894059818fad">IMB_MGR::ghash</a></div><div class="ttdeci">ghash_t ghash</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1141</div></div>
-<div class="ttc" id="astructIMB__MGR_html_afd72d6af1d8ff605e8aaaf984f0700ed"><div class="ttname"><a href="structIMB__MGR.html#afd72d6af1d8ff605e8aaaf984f0700ed">IMB_MGR::hmac_sha_384_ooo</a></div><div class="ttdeci">void * hmac_sha_384_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1208</div></div>
-<div class="ttc" id="astructIMB__MGR_html_afe48187946dff59f6c69103501691921"><div class="ttname"><a href="structIMB__MGR.html#afe48187946dff59f6c69103501691921">IMB_MGR::aes192_ooo</a></div><div class="ttdeci">void * aes192_ooo</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:1192</div></div>
-<div class="ttc" id="astructIMB__SGL__IOV_html"><div class="ttname"><a href="structIMB__SGL__IOV.html">IMB_SGL_IOV</a></div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:458</div></div>
-<div class="ttc" id="astructIMB__SGL__IOV_html_a3a3662456b91011eb0585667492acc88"><div class="ttname"><a href="structIMB__SGL__IOV.html#a3a3662456b91011eb0585667492acc88">IMB_SGL_IOV::len</a></div><div class="ttdeci">uint64_t len</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:461</div></div>
-<div class="ttc" id="astructIMB__SGL__IOV_html_a54b8da76fb8a400f9f7972bdd97f6f53"><div class="ttname"><a href="structIMB__SGL__IOV.html#a54b8da76fb8a400f9f7972bdd97f6f53">IMB_SGL_IOV::out</a></div><div class="ttdeci">void * out</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:460</div></div>
-<div class="ttc" id="astructIMB__SGL__IOV_html_a56c5b0a033d949869cee2d03f1df3129"><div class="ttname"><a href="structIMB__SGL__IOV.html#a56c5b0a033d949869cee2d03f1df3129">IMB_SGL_IOV::in</a></div><div class="ttdeci">const void * in</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:459</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html"><div class="ttname"><a href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a></div><div class="ttdoc">holds Chacha20-Poly1305 operation context</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:681</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html_a74e971fe76c8b946e30e8f0c8cce111a"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#a74e971fe76c8b946e30e8f0c8cce111a">chacha20_poly1305_context_data::remain_ct_bytes</a></div><div class="ttdeci">uint64_t remain_ct_bytes</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:691</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html_a7b5edcebc9a6bec3776daf6d13bf950c"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#a7b5edcebc9a6bec3776daf6d13bf950c">chacha20_poly1305_context_data::aad_len</a></div><div class="ttdeci">uint64_t aad_len</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:683</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html_a84693b96048f6130a749b633c65e2105"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#a84693b96048f6130a749b633c65e2105">chacha20_poly1305_context_data::remain_ks_bytes</a></div><div class="ttdeci">uint64_t remain_ks_bytes</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:689</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html_a908d80ce2c35792099dbc967818b9abd"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#a908d80ce2c35792099dbc967818b9abd">chacha20_poly1305_context_data::poly_scratch</a></div><div class="ttdeci">uint8_t poly_scratch[16]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:687</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html_a9ac4fafe2ca37395264f728c8e99a9b1"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#a9ac4fafe2ca37395264f728c8e99a9b1">chacha20_poly1305_context_data::poly_key</a></div><div class="ttdeci">uint8_t poly_key[32]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:686</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html_ac0d1657fc57308900691369362c56658"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#ac0d1657fc57308900691369362c56658">chacha20_poly1305_context_data::IV</a></div><div class="ttdeci">uint8_t IV[12]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:694</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html_add03511d1f95376b3ac64a7916c27368"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#add03511d1f95376b3ac64a7916c27368">chacha20_poly1305_context_data::last_block_count</a></div><div class="ttdeci">uint64_t last_block_count</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:688</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html_ade4568d041695b318df773787872127f"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#ade4568d041695b318df773787872127f">chacha20_poly1305_context_data::hash_len</a></div><div class="ttdeci">uint64_t hash_len</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:684</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html_ae12447b2fd2e9f8a6f09f443bd303887"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#ae12447b2fd2e9f8a6f09f443bd303887">chacha20_poly1305_context_data::hash</a></div><div class="ttdeci">uint64_t hash[3]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:682</div></div>
-<div class="ttc" id="astructchacha20__poly1305__context__data_html_afc74af4af99449f0b9f01338ae723c1a"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#afc74af4af99449f0b9f01338ae723c1a">chacha20_poly1305_context_data::last_ks</a></div><div class="ttdeci">uint8_t last_ks[64]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:685</div></div>
-<div class="ttc" id="astructgcm__context__data_html"><div class="ttname"><a href="structgcm__context__data.html">gcm_context_data</a></div><div class="ttdoc">holds GCM operation context</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:667</div></div>
-<div class="ttc" id="astructgcm__context__data_html_a0d9e72f85aba9363fcb4f2d757342aa2"><div class="ttname"><a href="structgcm__context__data.html#a0d9e72f85aba9363fcb4f2d757342aa2">gcm_context_data::in_length</a></div><div class="ttdeci">uint64_t in_length</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:670</div></div>
-<div class="ttc" id="astructgcm__context__data_html_a2a454a5e44422aaec135dc7807aa55a4"><div class="ttname"><a href="structgcm__context__data.html#a2a454a5e44422aaec135dc7807aa55a4">gcm_context_data::current_counter</a></div><div class="ttdeci">uint8_t current_counter[IMB_GCM_BLOCK_LEN]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:673</div></div>
-<div class="ttc" id="astructgcm__context__data_html_a2e52ea863c681afe1d3370a987e252f0"><div class="ttname"><a href="structgcm__context__data.html#a2e52ea863c681afe1d3370a987e252f0">gcm_context_data::partial_block_enc_key</a></div><div class="ttdeci">uint8_t partial_block_enc_key[IMB_GCM_BLOCK_LEN]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:671</div></div>
-<div class="ttc" id="astructgcm__context__data_html_a84bac4eabc12b81d26898b6fe6728a63"><div class="ttname"><a href="structgcm__context__data.html#a84bac4eabc12b81d26898b6fe6728a63">gcm_context_data::orig_IV</a></div><div class="ttdeci">uint8_t orig_IV[IMB_GCM_BLOCK_LEN]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:672</div></div>
-<div class="ttc" id="astructgcm__context__data_html_a97411247efd14ab01e7e0da6587bfa0c"><div class="ttname"><a href="structgcm__context__data.html#a97411247efd14ab01e7e0da6587bfa0c">gcm_context_data::partial_block_length</a></div><div class="ttdeci">uint64_t partial_block_length</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:674</div></div>
-<div class="ttc" id="astructgcm__context__data_html_a98c22f35eb0b4d368e2f454b347ed3b9"><div class="ttname"><a href="structgcm__context__data.html#a98c22f35eb0b4d368e2f454b347ed3b9">gcm_context_data::aad_hash</a></div><div class="ttdeci">uint8_t aad_hash[IMB_GCM_BLOCK_LEN]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:668</div></div>
-<div class="ttc" id="astructgcm__context__data_html_ab1dadabcbd2002738ec7db7da332e04f"><div class="ttname"><a href="structgcm__context__data.html#ab1dadabcbd2002738ec7db7da332e04f">gcm_context_data::aad_length</a></div><div class="ttdeci">uint64_t aad_length</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:669</div></div>
-<div class="ttc" id="astructgcm__key__data_html"><div class="ttname"><a href="structgcm__key__data.html">gcm_key_data</a></div><div class="ttdoc">holds intermediate key data needed to improve performance</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:729</div></div>
+<div class="ttc" id="astructIMB__JOB_html_af5c226d1c875c4e30a8f7bd7c03f05b1"><div class="ttname"><a href="structIMB__JOB.html#af5c226d1c875c4e30a8f7bd7c03f05b1">IMB_JOB::cipher_start_src_offset_in_bits</a></div><div class="ttdeci">uint64_t cipher_start_src_offset_in_bits</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:411</div></div>
+<div class="ttc" id="astructIMB__JOB_html_af78a3df5a9f79f329c8d1095b9ecea05"><div class="ttname"><a href="structIMB__JOB.html#af78a3df5a9f79f329c8d1095b9ecea05">IMB_JOB::dec_keys</a></div><div class="ttdeci">const void * dec_keys</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:392</div></div>
+<div class="ttc" id="astructIMB__JOB_html_af7cdc3d086f6e2b12d21c1383b2bd152"><div class="ttname"><a href="structIMB__JOB.html#af7cdc3d086f6e2b12d21c1383b2bd152">IMB_JOB::hash_start_src_offset_in_bytes</a></div><div class="ttdeci">uint64_t hash_start_src_offset_in_bytes</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:422</div></div>
+<div class="ttc" id="astructIMB__JOB_html_af83d63eb71a4f26b4915562bea554f28"><div class="ttname"><a href="structIMB__JOB.html#af83d63eb71a4f26b4915562bea554f28">IMB_JOB::src</a></div><div class="ttdeci">const uint8_t * src</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:395</div></div>
+<div class="ttc" id="astructIMB__JOB_html_afa62af4d5f1ecbb80f5216ec298fcfe8"><div class="ttname"><a href="structIMB__JOB.html#afa62af4d5f1ecbb80f5216ec298fcfe8">IMB_JOB::_k3</a></div><div class="ttdeci">const uint8_t * _k3</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:450</div></div>
+<div class="ttc" id="astructIMB__MGR_html"><div class="ttname"><a href="structIMB__MGR.html">IMB_MGR</a></div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:980</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a000b24d7fbb9b57ed6bd4147d225e015"><div class="ttname"><a href="structIMB__MGR.html#a000b24d7fbb9b57ed6bd4147d225e015">IMB_MGR::gmac192_finalize</a></div><div class="ttdeci">aes_gmac_finalize_t gmac192_finalize</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1091</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a006315a7045996d451c7dfd03b96a076"><div class="ttname"><a href="structIMB__MGR.html#a006315a7045996d451c7dfd03b96a076">IMB_MGR::gcm192_init</a></div><div class="ttdeci">aes_gcm_init_t gcm192_init</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1028</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a00ce9a8422a961166ce9855d4815cc2e"><div class="ttname"><a href="structIMB__MGR.html#a00ce9a8422a961166ce9855d4815cc2e">IMB_MGR::gmac128_finalize</a></div><div class="ttdeci">aes_gmac_finalize_t gmac128_finalize</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1090</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a04c28bfe763544b68dac98e23aa0a8d9"><div class="ttname"><a href="structIMB__MGR.html#a04c28bfe763544b68dac98e23aa0a8d9">IMB_MGR::aes256_ccm_ooo</a></div><div class="ttdeci">void * aes256_ccm_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1164</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a058cfc60f2fdd68678b36f4f038270ac"><div class="ttname"><a href="structIMB__MGR.html#a058cfc60f2fdd68678b36f4f038270ac">IMB_MGR::crc24_lte_a</a></div><div class="ttdeci">crc32_fn_t crc24_lte_a</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1100</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a0720a1fc9c0652c6b3aa7dfab070f73d"><div class="ttname"><a href="structIMB__MGR.html#a0720a1fc9c0652c6b3aa7dfab070f73d">IMB_MGR::gmac256_update</a></div><div class="ttdeci">aes_gmac_update_t gmac256_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1089</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a0863c9f64126aba5cb47628493dae582"><div class="ttname"><a href="structIMB__MGR.html#a0863c9f64126aba5cb47628493dae582">IMB_MGR::hec_32</a></div><div class="ttdeci">hec_32_t hec_32</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1093</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a0ab7a3dfdfd8442f591699e2310df11f"><div class="ttname"><a href="structIMB__MGR.html#a0ab7a3dfdfd8442f591699e2310df11f">IMB_MGR::imb_errno</a></div><div class="ttdeci">int imb_errno</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:988</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a0bd2acac3a6c3f90a998ed53a7d28e57"><div class="ttname"><a href="structIMB__MGR.html#a0bd2acac3a6c3f90a998ed53a7d28e57">IMB_MGR::aes_cmac_ooo</a></div><div class="ttdeci">void * aes_cmac_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1158</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a106ebd60d876e56bfc6bcc03d20acce4"><div class="ttname"><a href="structIMB__MGR.html#a106ebd60d876e56bfc6bcc03d20acce4">IMB_MGR::next_job</a></div><div class="ttdeci">int next_job</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1132</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a1098c38784f6c6e4e3a3380f8be8ecc1"><div class="ttname"><a href="structIMB__MGR.html#a1098c38784f6c6e4e3a3380f8be8ecc1">IMB_MGR::gmac128_init</a></div><div class="ttdeci">aes_gmac_init_t gmac128_init</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1084</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a136697eb37d5a06eeada0f338abd8b51"><div class="ttname"><a href="structIMB__MGR.html#a136697eb37d5a06eeada0f338abd8b51">IMB_MGR::reserved</a></div><div class="ttdeci">uint64_t reserved[5]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:985</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a149b463ecf68ee78d39c33e183ed8997"><div class="ttname"><a href="structIMB__MGR.html#a149b463ecf68ee78d39c33e183ed8997">IMB_MGR::gcm192_pre</a></div><div class="ttdeci">aes_gcm_pre_t gcm192_pre</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1046</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a194a0f15a7345ee369780dbdeb4f52f6"><div class="ttname"><a href="structIMB__MGR.html#a194a0f15a7345ee369780dbdeb4f52f6">IMB_MGR::snow3g_f8_4_buffer</a></div><div class="ttdeci">snow3g_f8_4_buffer_t snow3g_f8_4_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1069</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a1ea15abc11b618ceb438c7f282643c52"><div class="ttname"><a href="structIMB__MGR.html#a1ea15abc11b618ceb438c7f282643c52">IMB_MGR::gcm256_precomp</a></div><div class="ttdeci">aes_gcm_precomp_t gcm256_precomp</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1044</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a207c78e01e4aa1a35de1bbd2cc0a6ee2"><div class="ttname"><a href="structIMB__MGR.html#a207c78e01e4aa1a35de1bbd2cc0a6ee2">IMB_MGR::gcm128_pre</a></div><div class="ttdeci">aes_gcm_pre_t gcm128_pre</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1045</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a20a3d4d1e40aed26d83db5395b7ccc83"><div class="ttname"><a href="structIMB__MGR.html#a20a3d4d1e40aed26d83db5395b7ccc83">IMB_MGR::submit_hash_burst</a></div><div class="ttdeci">submit_hash_burst_t submit_hash_burst</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1121</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a225e3b35eef8e18fd09c429fbb2f70b5"><div class="ttname"><a href="structIMB__MGR.html#a225e3b35eef8e18fd09c429fbb2f70b5">IMB_MGR::flush_job</a></div><div class="ttdeci">flush_job_t flush_job</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1000</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a25f46509b2f8926902a73e2210d697fd"><div class="ttname"><a href="structIMB__MGR.html#a25f46509b2f8926902a73e2210d697fd">IMB_MGR::snow3g_f8_2_buffer</a></div><div class="ttdeci">snow3g_f8_2_buffer_t snow3g_f8_2_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1068</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a26d22c5ff963b9c7ffc8af19292bce5c"><div class="ttname"><a href="structIMB__MGR.html#a26d22c5ff963b9c7ffc8af19292bce5c">IMB_MGR::zuc_eea3_ooo</a></div><div class="ttdeci">void * zuc_eea3_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1159</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a28ddfed1a807fedb9c77c99736278dcb"><div class="ttname"><a href="structIMB__MGR.html#a28ddfed1a807fedb9c77c99736278dcb">IMB_MGR::gcm128_dec_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm128_dec_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1033</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a2ab69fdbef6a9a0574fcbb5ea9a7da3b"><div class="ttname"><a href="structIMB__MGR.html#a2ab69fdbef6a9a0574fcbb5ea9a7da3b">IMB_MGR::des3_dec_ooo</a></div><div class="ttdeci">void * des3_dec_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1146</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a2bd7444a318de06b5f53178abf9c37ff"><div class="ttname"><a href="structIMB__MGR.html#a2bd7444a318de06b5f53178abf9c37ff">IMB_MGR::keyexp_192</a></div><div class="ttdeci">keyexp_t keyexp_192</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1003</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a2ce2f6e6d61953b24a5859279534b02a"><div class="ttname"><a href="structIMB__MGR.html#a2ce2f6e6d61953b24a5859279534b02a">IMB_MGR::gcm128_dec</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm128_dec</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1024</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a34adc55c8041e211c73c632628cd60d3"><div class="ttname"><a href="structIMB__MGR.html#a34adc55c8041e211c73c632628cd60d3">IMB_MGR::submit_burst_nocheck</a></div><div class="ttdeci">burst_fn_t submit_burst_nocheck</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1117</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a35939892cd168eb7ce9c6c29c5401709"><div class="ttname"><a href="structIMB__MGR.html#a35939892cd168eb7ce9c6c29c5401709">IMB_MGR::get_next_job</a></div><div class="ttdeci">get_next_job_t get_next_job</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:996</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a37fc5ccae7af099a8517566a20751265"><div class="ttname"><a href="structIMB__MGR.html#a37fc5ccae7af099a8517566a20751265">IMB_MGR::sha_256_ooo</a></div><div class="ttdeci">void * sha_256_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1170</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a38ff0528815be4d92481948664366ca9"><div class="ttname"><a href="structIMB__MGR.html#a38ff0528815be4d92481948664366ca9">IMB_MGR::snow3g_init_key_sched</a></div><div class="ttdeci">snow3g_init_key_sched_t snow3g_init_key_sched</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1075</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a3b5c3407cc4595420dbe43e98090e558"><div class="ttname"><a href="structIMB__MGR.html#a3b5c3407cc4595420dbe43e98090e558">IMB_MGR::gcm192_enc_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm192_enc_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1031</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a3bb98c9a9c8545f363b74627870c7038"><div class="ttname"><a href="structIMB__MGR.html#a3bb98c9a9c8545f363b74627870c7038">IMB_MGR::gmac256_finalize</a></div><div class="ttdeci">aes_gmac_finalize_t gmac256_finalize</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1092</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a3d5173cea3d4932576f0a5b3abbc1f40"><div class="ttname"><a href="structIMB__MGR.html#a3d5173cea3d4932576f0a5b3abbc1f40">IMB_MGR::docsis_des_dec_ooo</a></div><div class="ttdeci">void * docsis_des_dec_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1148</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a3dd58a9d9b4fb6cf85fa26175ffac9a6"><div class="ttname"><a href="structIMB__MGR.html#a3dd58a9d9b4fb6cf85fa26175ffac9a6">IMB_MGR::gmac192_init</a></div><div class="ttdeci">aes_gmac_init_t gmac192_init</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1085</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a3ed58bdf37ab6d5f0d28271882d52327"><div class="ttname"><a href="structIMB__MGR.html#a3ed58bdf37ab6d5f0d28271882d52327">IMB_MGR::eia3_1_buffer</a></div><div class="ttdeci">zuc_eia3_1_buffer_t eia3_1_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1052</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a3eeeead99056e46d8cb1ed316f587aaf"><div class="ttname"><a href="structIMB__MGR.html#a3eeeead99056e46d8cb1ed316f587aaf">IMB_MGR::aes_ccm_ooo</a></div><div class="ttdeci">void * aes_ccm_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1157</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a4128ee02f4cbef5aa1e6b0bb5fd46097"><div class="ttname"><a href="structIMB__MGR.html#a4128ee02f4cbef5aa1e6b0bb5fd46097">IMB_MGR::hec_64</a></div><div class="ttdeci">hec_64_t hec_64</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1094</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a431e99ddb3837a32bedb6cd426054bcc"><div class="ttname"><a href="structIMB__MGR.html#a431e99ddb3837a32bedb6cd426054bcc">IMB_MGR::keyexp_256</a></div><div class="ttdeci">keyexp_t keyexp_256</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1004</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a436adbd14682855df093afb36c569039"><div class="ttname"><a href="structIMB__MGR.html#a436adbd14682855df093afb36c569039">IMB_MGR::aes_ecb_128_quic</a></div><div class="ttdeci">aes_ecb_quic_t aes_ecb_128_quic</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1125</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a44b0b9d218043be965a84c29ced2584b"><div class="ttname"><a href="structIMB__MGR.html#a44b0b9d218043be965a84c29ced2584b">IMB_MGR::gcm256_pre</a></div><div class="ttdeci">aes_gcm_pre_t gcm256_pre</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1047</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a44b6c95f8ce611828b6acacdb459cdc9"><div class="ttname"><a href="structIMB__MGR.html#a44b6c95f8ce611828b6acacdb459cdc9">IMB_MGR::used_arch</a></div><div class="ttdeci">uint32_t used_arch</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:986</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a49be1d77b96d338c08200dce82e452d3"><div class="ttname"><a href="structIMB__MGR.html#a49be1d77b96d338c08200dce82e452d3">IMB_MGR::hmac_sha_1_ooo</a></div><div class="ttdeci">void * hmac_sha_1_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1150</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a4aed66c9e73808a65a062e1a5b0f66aa"><div class="ttname"><a href="structIMB__MGR.html#a4aed66c9e73808a65a062e1a5b0f66aa">IMB_MGR::crc32_sctp</a></div><div class="ttdeci">crc32_fn_t crc32_sctp</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1099</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a4b901916c2f262f1c873e4cec7b7f474"><div class="ttname"><a href="structIMB__MGR.html#a4b901916c2f262f1c873e4cec7b7f474">IMB_MGR::crc11_fp_header</a></div><div class="ttdeci">crc32_fn_t crc11_fp_header</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1103</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a4d7879172344be144b92be68b2e2a81a"><div class="ttname"><a href="structIMB__MGR.html#a4d7879172344be144b92be68b2e2a81a">IMB_MGR::gcm192_dec_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm192_dec_finalize</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1040</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a4fbdac066c9d0fbd1d586a2e5b2319c3"><div class="ttname"><a href="structIMB__MGR.html#a4fbdac066c9d0fbd1d586a2e5b2319c3">IMB_MGR::f9_1_buffer_user</a></div><div class="ttdeci">kasumi_f9_1_buffer_user_t f9_1_buffer_user</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1061</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a51a499114f84eed88cb48bd3b461bd1c"><div class="ttname"><a href="structIMB__MGR.html#a51a499114f84eed88cb48bd3b461bd1c">IMB_MGR::sha_384_ooo</a></div><div class="ttdeci">void * sha_384_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1171</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a5220f0d243291ae5a2f43fbc93d18725"><div class="ttname"><a href="structIMB__MGR.html#a5220f0d243291ae5a2f43fbc93d18725">IMB_MGR::gmac192_update</a></div><div class="ttdeci">aes_gmac_update_t gmac192_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1088</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a52a7ab10d6434820e9b31d0e772ea0bc"><div class="ttname"><a href="structIMB__MGR.html#a52a7ab10d6434820e9b31d0e772ea0bc">IMB_MGR::crc16_x25</a></div><div class="ttdeci">crc32_fn_t crc16_x25</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1098</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a52e26b8805b28d1298ac48e5762412b5"><div class="ttname"><a href="structIMB__MGR.html#a52e26b8805b28d1298ac48e5762412b5">IMB_MGR::sha224</a></div><div class="ttdeci">hash_fn_t sha224</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1015</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a54b5f7b625ce226ebd46a2a19e9bc724"><div class="ttname"><a href="structIMB__MGR.html#a54b5f7b625ce226ebd46a2a19e9bc724">IMB_MGR::md5_one_block</a></div><div class="ttdeci">hash_one_block_t md5_one_block</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1013</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a54ec50411917f1aa9016db268ac638c1"><div class="ttname"><a href="structIMB__MGR.html#a54ec50411917f1aa9016db268ac638c1">IMB_MGR::des_enc_ooo</a></div><div class="ttdeci">void * des_enc_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1143</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a58ad87104b08ba5b56fc65928677a639"><div class="ttname"><a href="structIMB__MGR.html#a58ad87104b08ba5b56fc65928677a639">IMB_MGR::kasumi_init_f9_key_sched</a></div><div class="ttdeci">kasumi_init_f9_key_sched_t kasumi_init_f9_key_sched</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1063</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a5a35c9c2a1c8eb5b4aa239a3b04f4fbf"><div class="ttname"><a href="structIMB__MGR.html#a5a35c9c2a1c8eb5b4aa239a3b04f4fbf">IMB_MGR::queue_size</a></div><div class="ttdeci">queue_size_t queue_size</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1001</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a5c2e4a1296e33f5c9eaff2067a6432d4"><div class="ttname"><a href="structIMB__MGR.html#a5c2e4a1296e33f5c9eaff2067a6432d4">IMB_MGR::gcm256_dec_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm256_dec_finalize</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1041</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a5e0002330399f643e8f0ca0c1b96a7a0"><div class="ttname"><a href="structIMB__MGR.html#a5e0002330399f643e8f0ca0c1b96a7a0">IMB_MGR::snow3g_key_sched_size</a></div><div class="ttdeci">snow3g_key_sched_size_t snow3g_key_sched_size</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1076</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a5e589dea4f677ad01cfb01d06884a281"><div class="ttname"><a href="structIMB__MGR.html#a5e589dea4f677ad01cfb01d06884a281">IMB_MGR::aes_ecb_256_quic</a></div><div class="ttdeci">aes_ecb_quic_t aes_ecb_256_quic</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1126</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a5e5be572c46ed01ac11fc95738373e2a"><div class="ttname"><a href="structIMB__MGR.html#a5e5be572c46ed01ac11fc95738373e2a">IMB_MGR::crc8_wimax_ofdma_hcs</a></div><div class="ttdeci">crc32_fn_t crc8_wimax_ofdma_hcs</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1108</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a5f8744a8d64273d3f4cbcd9ad41ce3d5"><div class="ttname"><a href="structIMB__MGR.html#a5f8744a8d64273d3f4cbcd9ad41ce3d5">IMB_MGR::zuc256_eia3_ooo</a></div><div class="ttdeci">void * zuc256_eia3_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1163</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a620d2d75bb50784aa0000b458197afaf"><div class="ttname"><a href="structIMB__MGR.html#a620d2d75bb50784aa0000b458197afaf">IMB_MGR::snow3g_f8_8_buffer</a></div><div class="ttdeci">snow3g_f8_8_buffer_t snow3g_f8_8_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1070</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a62ebdd5e2b5a59c9e648511caf56f3f1"><div class="ttname"><a href="structIMB__MGR.html#a62ebdd5e2b5a59c9e648511caf56f3f1">IMB_MGR::sha512</a></div><div class="ttdeci">hash_fn_t sha512</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1018</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a633807f7eaae35ada650a2c22f1366be"><div class="ttname"><a href="structIMB__MGR.html#a633807f7eaae35ada650a2c22f1366be">IMB_MGR::hmac_sha_256_ooo</a></div><div class="ttdeci">void * hmac_sha_256_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1152</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a63a2a5f74e7cc2fc637896bdaeb6b262"><div class="ttname"><a href="structIMB__MGR.html#a63a2a5f74e7cc2fc637896bdaeb6b262">IMB_MGR::snow3g_f8_n_buffer_multikey</a></div><div class="ttdeci">snow3g_f8_n_buffer_multikey_t snow3g_f8_n_buffer_multikey</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1073</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a66fa94f9c07061f3d93b78ed505931e3"><div class="ttname"><a href="structIMB__MGR.html#a66fa94f9c07061f3d93b78ed505931e3">IMB_MGR::gcm192_dec_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm192_dec_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1034</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a67b96b1b26fa25391f9f4b83a7a4b6c0"><div class="ttname"><a href="structIMB__MGR.html#a67b96b1b26fa25391f9f4b83a7a4b6c0">IMB_MGR::chacha20_poly1305_init</a></div><div class="ttdeci">chacha_poly_init_t chacha20_poly1305_init</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1110</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a67d8a55ba87742b8cf282d23ed9e3ef5"><div class="ttname"><a href="structIMB__MGR.html#a67d8a55ba87742b8cf282d23ed9e3ef5">IMB_MGR::eea3_n_buffer</a></div><div class="ttdeci">zuc_eea3_n_buffer_t eea3_n_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1051</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a69e4dd044703cd3aa9c4c36e04b2a701"><div class="ttname"><a href="structIMB__MGR.html#a69e4dd044703cd3aa9c4c36e04b2a701">IMB_MGR::gcm128_precomp</a></div><div class="ttdeci">aes_gcm_precomp_t gcm128_precomp</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1042</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a6abbf129001cb44003a10105115e52b7"><div class="ttname"><a href="structIMB__MGR.html#a6abbf129001cb44003a10105115e52b7">IMB_MGR::aes256_ooo</a></div><div class="ttdeci">void * aes256_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1138</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a6d05b0a20196be514182920710dce2a8"><div class="ttname"><a href="structIMB__MGR.html#a6d05b0a20196be514182920710dce2a8">IMB_MGR::zuc256_eea3_ooo</a></div><div class="ttdeci">void * zuc256_eea3_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1162</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a6e1ab772182b97f931af3d4685785353"><div class="ttname"><a href="structIMB__MGR.html#a6e1ab772182b97f931af3d4685785353">IMB_MGR::end_ooo</a></div><div class="ttdeci">void * end_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1173</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a6e21e034cd011b695bac5a711be65da1"><div class="ttname"><a href="structIMB__MGR.html#a6e21e034cd011b695bac5a711be65da1">IMB_MGR::sha_512_ooo</a></div><div class="ttdeci">void * sha_512_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1172</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a715aede4176564ac475e42c8a377bd8d"><div class="ttname"><a href="structIMB__MGR.html#a715aede4176564ac475e42c8a377bd8d">IMB_MGR::chacha20_poly1305_dec_update</a></div><div class="ttdeci">chacha_poly_enc_dec_update_t chacha20_poly1305_dec_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1112</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a79767326692a8d4faabe5ab435dc5df8"><div class="ttname"><a href="structIMB__MGR.html#a79767326692a8d4faabe5ab435dc5df8">IMB_MGR::gcm256_enc</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm256_enc</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1023</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a7bfa7b17c0fb36dc832138a86948991f"><div class="ttname"><a href="structIMB__MGR.html#a7bfa7b17c0fb36dc832138a86948991f">IMB_MGR::gcm192_init_var_iv</a></div><div class="ttdeci">aes_gcm_init_var_iv_t gcm192_init_var_iv</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1081</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a7c97c5361b90abe325db55530b6f198e"><div class="ttname"><a href="structIMB__MGR.html#a7c97c5361b90abe325db55530b6f198e">IMB_MGR::keyexp_128</a></div><div class="ttdeci">keyexp_t keyexp_128</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1002</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a7d0979deda4e2ff7ac202c82611ce94c"><div class="ttname"><a href="structIMB__MGR.html#a7d0979deda4e2ff7ac202c82611ce94c">IMB_MGR::crc10_iuup_data</a></div><div class="ttdeci">crc32_fn_t crc10_iuup_data</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1105</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a809782eb9dcbd264442bcd9edd2f4c2f"><div class="ttname"><a href="structIMB__MGR.html#a809782eb9dcbd264442bcd9edd2f4c2f">IMB_MGR::submit_hash_burst_nocheck</a></div><div class="ttdeci">submit_hash_burst_t submit_hash_burst_nocheck</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1122</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a80a26be9a12f561a68b70d65e096cde9"><div class="ttname"><a href="structIMB__MGR.html#a80a26be9a12f561a68b70d65e096cde9">IMB_MGR::sha1_one_block</a></div><div class="ttdeci">hash_one_block_t sha1_one_block</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1008</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a829c4cf1157dfc3fcb829df31e408e9d"><div class="ttname"><a href="structIMB__MGR.html#a829c4cf1157dfc3fcb829df31e408e9d">IMB_MGR::snow3g_f8_n_buffer</a></div><div class="ttdeci">snow3g_f8_n_buffer_t snow3g_f8_n_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1071</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a82aaedc800096aaa55062c56131e0b13"><div class="ttname"><a href="structIMB__MGR.html#a82aaedc800096aaa55062c56131e0b13">IMB_MGR::sha1</a></div><div class="ttdeci">hash_fn_t sha1</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1014</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a8483109fbe42f8b7fa6e7f53e016d5ec"><div class="ttname"><a href="structIMB__MGR.html#a8483109fbe42f8b7fa6e7f53e016d5ec">IMB_MGR::crc32_ethernet_fcs</a></div><div class="ttdeci">crc32_fn_t crc32_ethernet_fcs</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1097</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a855d14df536b22ceb175dc495ced891c"><div class="ttname"><a href="structIMB__MGR.html#a855d14df536b22ceb175dc495ced891c">IMB_MGR::hmac_md5_ooo</a></div><div class="ttdeci">void * hmac_md5_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1155</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a87f7566634911b4dba48a19a0c3a4993"><div class="ttname"><a href="structIMB__MGR.html#a87f7566634911b4dba48a19a0c3a4993">IMB_MGR::des3_enc_ooo</a></div><div class="ttdeci">void * des3_enc_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1145</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a88f1060a2adb8098fc085fc2b812addc"><div class="ttname"><a href="structIMB__MGR.html#a88f1060a2adb8098fc085fc2b812addc">IMB_MGR::sha512_one_block</a></div><div class="ttdeci">hash_one_block_t sha512_one_block</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1012</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a8987d7d491628d9d80f12820468ac541"><div class="ttname"><a href="structIMB__MGR.html#a8987d7d491628d9d80f12820468ac541">IMB_MGR::gcm256_init</a></div><div class="ttdeci">aes_gcm_init_t gcm256_init</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1029</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a898a4c56e1a746a328529c3665c5682e"><div class="ttname"><a href="structIMB__MGR.html#a898a4c56e1a746a328529c3665c5682e">IMB_MGR::snow3g_f8_8_buffer_multikey</a></div><div class="ttdeci">snow3g_f8_8_buffer_multikey_t snow3g_f8_8_buffer_multikey</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1072</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a8b52f1b3ca92eff48b945929a0eab839"><div class="ttname"><a href="structIMB__MGR.html#a8b52f1b3ca92eff48b945929a0eab839">IMB_MGR::submit_cipher_burst</a></div><div class="ttdeci">submit_cipher_burst_t submit_cipher_burst</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1119</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a8c6b03b886ce7706a6cc8319345e8acf"><div class="ttname"><a href="structIMB__MGR.html#a8c6b03b886ce7706a6cc8319345e8acf">IMB_MGR::get_next_burst</a></div><div class="ttdeci">burst_fn_t get_next_burst</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1115</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a8d978764a953e220b3c799990bae490b"><div class="ttname"><a href="structIMB__MGR.html#a8d978764a953e220b3c799990bae490b">IMB_MGR::sha256</a></div><div class="ttdeci">hash_fn_t sha256</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1016</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a8efc0cf95907805289a297c024ce0cac"><div class="ttname"><a href="structIMB__MGR.html#a8efc0cf95907805289a297c024ce0cac">IMB_MGR::gcm128_enc_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm128_enc_finalize</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1036</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a90aad4f47448a1959b7cf747438d7ce9"><div class="ttname"><a href="structIMB__MGR.html#a90aad4f47448a1959b7cf747438d7ce9">IMB_MGR::gmac128_update</a></div><div class="ttdeci">aes_gmac_update_t gmac128_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1087</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a910f747aa1a0e6a46f87b0dfd2189219"><div class="ttname"><a href="structIMB__MGR.html#a910f747aa1a0e6a46f87b0dfd2189219">IMB_MGR::zuc_eia3_ooo</a></div><div class="ttdeci">void * zuc_eia3_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1160</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a91ad9ce7a4b3c9ceeffa9dd712013915"><div class="ttname"><a href="structIMB__MGR.html#a91ad9ce7a4b3c9ceeffa9dd712013915">IMB_MGR::gcm192_enc_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm192_enc_finalize</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1037</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a929b9c50bc98bf37daec7a1603f10118"><div class="ttname"><a href="structIMB__MGR.html#a929b9c50bc98bf37daec7a1603f10118">IMB_MGR::f8_3_buffer</a></div><div class="ttdeci">kasumi_f8_3_buffer_t f8_3_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1057</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a92b7ff145f0016dd46eabf9271ef03f1"><div class="ttname"><a href="structIMB__MGR.html#a92b7ff145f0016dd46eabf9271ef03f1">IMB_MGR::sha384_one_block</a></div><div class="ttdeci">hash_one_block_t sha384_one_block</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1011</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a937fb0d3b113d203ee1a4beaf5b5b98f"><div class="ttname"><a href="structIMB__MGR.html#a937fb0d3b113d203ee1a4beaf5b5b98f">IMB_MGR::docsis_des_enc_ooo</a></div><div class="ttdeci">void * docsis_des_enc_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1147</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a93cb5904608e179c49917f80c64fabd1"><div class="ttname"><a href="structIMB__MGR.html#a93cb5904608e179c49917f80c64fabd1">IMB_MGR::docsis128_sec_ooo</a></div><div class="ttdeci">void * docsis128_sec_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1139</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a95209e74a7acff69d46eef91021a1168"><div class="ttname"><a href="structIMB__MGR.html#a95209e74a7acff69d46eef91021a1168">IMB_MGR::set_suite_id</a></div><div class="ttdeci">void(* set_suite_id)(struct IMB_MGR *, IMB_JOB *)</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1128</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a9764d27efef2491a86d517f38dd9b6ef"><div class="ttname"><a href="structIMB__MGR.html#a9764d27efef2491a86d517f38dd9b6ef">IMB_MGR::gcm256_enc_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm256_enc_finalize</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1038</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a97fd05a4057fc898f647955a7ba8501b"><div class="ttname"><a href="structIMB__MGR.html#a97fd05a4057fc898f647955a7ba8501b">IMB_MGR::aes128_ooo</a></div><div class="ttdeci">void * aes128_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1136</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a99b7111c8fc59161e0bf291d13b1f195"><div class="ttname"><a href="structIMB__MGR.html#a99b7111c8fc59161e0bf291d13b1f195">IMB_MGR::get_completed_job</a></div><div class="ttdeci">get_completed_job_t get_completed_job</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:999</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a99fcb1d18fa45044063c6c288b0fc769"><div class="ttname"><a href="structIMB__MGR.html#a99fcb1d18fa45044063c6c288b0fc769">IMB_MGR::gcm256_dec_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm256_dec_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1035</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a9a4d2148b6e8b4426b2946e9fe695461"><div class="ttname"><a href="structIMB__MGR.html#a9a4d2148b6e8b4426b2946e9fe695461">IMB_MGR::snow3g_f9_1_buffer</a></div><div class="ttdeci">snow3g_f9_1_buffer_t snow3g_f9_1_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1074</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a9c72f3341a9a4837595338d06c3eda5c"><div class="ttname"><a href="structIMB__MGR.html#a9c72f3341a9a4837595338d06c3eda5c">IMB_MGR::aes128_cbcs_ooo</a></div><div class="ttdeci">void * aes128_cbcs_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1161</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a9f8b9687fbb17f7a78fc4ba79e2749fd"><div class="ttname"><a href="structIMB__MGR.html#a9f8b9687fbb17f7a78fc4ba79e2749fd">IMB_MGR::gcm128_enc</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm128_enc</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1021</div></div>
+<div class="ttc" id="astructIMB__MGR_html_a9ffcce0ba9aef3cd68bdd7f6e9e3e2a0"><div class="ttname"><a href="structIMB__MGR.html#a9ffcce0ba9aef3cd68bdd7f6e9e3e2a0">IMB_MGR::sha384</a></div><div class="ttdeci">hash_fn_t sha384</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1017</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aa0283df1a5cd7a6dfc78c8f9896ea3ec"><div class="ttname"><a href="structIMB__MGR.html#aa0283df1a5cd7a6dfc78c8f9896ea3ec">IMB_MGR::flush_burst</a></div><div class="ttdeci">burst_fn_t flush_burst</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1118</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aa174bf6846067a48f3f47ee5ebd74877"><div class="ttname"><a href="structIMB__MGR.html#aa174bf6846067a48f3f47ee5ebd74877">IMB_MGR::sha_224_ooo</a></div><div class="ttdeci">void * sha_224_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1169</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aa3404b7811d57821ea574994e0c88995"><div class="ttname"><a href="structIMB__MGR.html#aa3404b7811d57821ea574994e0c88995">IMB_MGR::cmac_subkey_gen_128</a></div><div class="ttdeci">cmac_subkey_gen_t cmac_subkey_gen_128</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1005</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aa610dc7226673020be410762b995b725"><div class="ttname"><a href="structIMB__MGR.html#aa610dc7226673020be410762b995b725">IMB_MGR::crc6_iuup_header</a></div><div class="ttdeci">crc32_fn_t crc6_iuup_header</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1106</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aa69002f8d8e17c0048d7aff9b3a1894e"><div class="ttname"><a href="structIMB__MGR.html#aa69002f8d8e17c0048d7aff9b3a1894e">IMB_MGR::submit_burst</a></div><div class="ttdeci">burst_fn_t submit_burst</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1116</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aa7d4cfe53e0d70c22d3a274b8cd218af"><div class="ttname"><a href="structIMB__MGR.html#aa7d4cfe53e0d70c22d3a274b8cd218af">IMB_MGR::snow3g_uia2_ooo</a></div><div class="ttdeci">void * snow3g_uia2_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1167</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aaaeb1676e0cf19e3558d10e537f71bda"><div class="ttname"><a href="structIMB__MGR.html#aaaeb1676e0cf19e3558d10e537f71bda">IMB_MGR::gcm192_enc</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm192_enc</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1022</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aab7350eeecc56b1ef45606b83519a72c"><div class="ttname"><a href="structIMB__MGR.html#aab7350eeecc56b1ef45606b83519a72c">IMB_MGR::submit_job_nocheck</a></div><div class="ttdeci">submit_job_t submit_job_nocheck</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:998</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aacf6ce3f508fef115dcd2dc415ca7379"><div class="ttname"><a href="structIMB__MGR.html#aacf6ce3f508fef115dcd2dc415ca7379">IMB_MGR::f8_1_buffer_bit</a></div><div class="ttdeci">kasumi_f8_1_buffer_bit_t f8_1_buffer_bit</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1055</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aacf8209094d12ceceed96d4d0fae193c"><div class="ttname"><a href="structIMB__MGR.html#aacf8209094d12ceceed96d4d0fae193c">IMB_MGR::sha224_one_block</a></div><div class="ttdeci">hash_one_block_t sha224_one_block</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1009</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aae9afac5c2c1bf7b27d187d10778a1ee"><div class="ttname"><a href="structIMB__MGR.html#aae9afac5c2c1bf7b27d187d10778a1ee">IMB_MGR::des_key_sched</a></div><div class="ttdeci">des_keysched_t des_key_sched</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1007</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ab0193bf46978026a82803c25e11acbfb"><div class="ttname"><a href="structIMB__MGR.html#ab0193bf46978026a82803c25e11acbfb">IMB_MGR::snow3g_uea2_ooo</a></div><div class="ttdeci">void * snow3g_uea2_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1166</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ab143534d96e0d585b19dfc19553e929b"><div class="ttname"><a href="structIMB__MGR.html#ab143534d96e0d585b19dfc19553e929b">IMB_MGR::submit_job</a></div><div class="ttdeci">submit_job_t submit_job</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:997</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ab18b3fcba2aa252bb31f66093bc62abb"><div class="ttname"><a href="structIMB__MGR.html#ab18b3fcba2aa252bb31f66093bc62abb">IMB_MGR::chacha20_poly1305_finalize</a></div><div class="ttdeci">chacha_poly_finalize_t chacha20_poly1305_finalize</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1113</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ab2c87c40f9844795e3987536c602ce03"><div class="ttname"><a href="structIMB__MGR.html#ab2c87c40f9844795e3987536c602ce03">IMB_MGR::chacha20_poly1305_enc_update</a></div><div class="ttdeci">chacha_poly_enc_dec_update_t chacha20_poly1305_enc_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1111</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ab32d67f27cb6f06980080e09db133b24"><div class="ttname"><a href="structIMB__MGR.html#ab32d67f27cb6f06980080e09db133b24">IMB_MGR::kasumi_init_f8_key_sched</a></div><div class="ttdeci">kasumi_init_f8_key_sched_t kasumi_init_f8_key_sched</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1062</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ab342224dce812fb13a9e935e7a7b0617"><div class="ttname"><a href="structIMB__MGR.html#ab342224dce812fb13a9e935e7a7b0617">IMB_MGR::jobs</a></div><div class="ttdeci">IMB_JOB jobs[IMB_MAX_JOBS]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1133</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ab4e116827875a9dd2573f425081c7eaf"><div class="ttname"><a href="structIMB__MGR.html#ab4e116827875a9dd2573f425081c7eaf">IMB_MGR::aes256_cfb_one</a></div><div class="ttdeci">aes_cfb_t aes256_cfb_one</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1123</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ab515c5aec39b1a9a31454b945e5ccd35"><div class="ttname"><a href="structIMB__MGR.html#ab515c5aec39b1a9a31454b945e5ccd35">IMB_MGR::eia3_n_buffer</a></div><div class="ttdeci">zuc_eia3_n_buffer_t eia3_n_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1079</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ab70cbec09a61b5adeae37260c10234ce"><div class="ttname"><a href="structIMB__MGR.html#ab70cbec09a61b5adeae37260c10234ce">IMB_MGR::snow3g_f8_1_buffer</a></div><div class="ttdeci">snow3g_f8_1_buffer_t snow3g_f8_1_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1067</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ab9226cf37e41c2a13ae6003305654193"><div class="ttname"><a href="structIMB__MGR.html#ab9226cf37e41c2a13ae6003305654193">IMB_MGR::hmac_sha_224_ooo</a></div><div class="ttdeci">void * hmac_sha_224_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1151</div></div>
+<div class="ttc" id="astructIMB__MGR_html_abd0c855a3e43df48f5f21686a095f358"><div class="ttname"><a href="structIMB__MGR.html#abd0c855a3e43df48f5f21686a095f358">IMB_MGR::kasumi_key_sched_size</a></div><div class="ttdeci">kasumi_key_sched_size_t kasumi_key_sched_size</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1064</div></div>
+<div class="ttc" id="astructIMB__MGR_html_abd468de03563a40da0b21b0885f44cbe"><div class="ttname"><a href="structIMB__MGR.html#abd468de03563a40da0b21b0885f44cbe">IMB_MGR::aes128_cfb_one</a></div><div class="ttdeci">aes_cfb_t aes128_cfb_one</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1019</div></div>
+<div class="ttc" id="astructIMB__MGR_html_abd500d2cc03f6470ac6988785bebdf76"><div class="ttname"><a href="structIMB__MGR.html#abd500d2cc03f6470ac6988785bebdf76">IMB_MGR::cmac_subkey_gen_256</a></div><div class="ttdeci">cmac_subkey_gen_t cmac_subkey_gen_256</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1095</div></div>
+<div class="ttc" id="astructIMB__MGR_html_abe8406f3582d3540edb770e153b74c3e"><div class="ttname"><a href="structIMB__MGR.html#abe8406f3582d3540edb770e153b74c3e">IMB_MGR::crc24_lte_b</a></div><div class="ttdeci">crc32_fn_t crc24_lte_b</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1101</div></div>
+<div class="ttc" id="astructIMB__MGR_html_abec8bdb319ca132028d5b787bf60a895"><div class="ttname"><a href="structIMB__MGR.html#abec8bdb319ca132028d5b787bf60a895">IMB_MGR::gcm192_precomp</a></div><div class="ttdeci">aes_gcm_precomp_t gcm192_precomp</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1043</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ac131ceec0dcb0d08097b76c8abe9e024"><div class="ttname"><a href="structIMB__MGR.html#ac131ceec0dcb0d08097b76c8abe9e024">IMB_MGR::gcm256_enc_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm256_enc_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1032</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ac5ad1bf8ecdcfc51eaf681fb353c9621"><div class="ttname"><a href="structIMB__MGR.html#ac5ad1bf8ecdcfc51eaf681fb353c9621">IMB_MGR::eea3_4_buffer</a></div><div class="ttdeci">zuc_eea3_4_buffer_t eea3_4_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1050</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ac5cd33ac3bf985dc31ccc716fb3a7747"><div class="ttname"><a href="structIMB__MGR.html#ac5cd33ac3bf985dc31ccc716fb3a7747">IMB_MGR::earliest_job</a></div><div class="ttdeci">int earliest_job</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1131</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ac733fc4c5ee6e80e8e71b20a9bb2dc6e"><div class="ttname"><a href="structIMB__MGR.html#ac733fc4c5ee6e80e8e71b20a9bb2dc6e">IMB_MGR::f8_2_buffer</a></div><div class="ttdeci">kasumi_f8_2_buffer_t f8_2_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1056</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ac819ddcc968604186983d58f275bd24b"><div class="ttname"><a href="structIMB__MGR.html#ac819ddcc968604186983d58f275bd24b">IMB_MGR::crc7_fp_header</a></div><div class="ttdeci">crc32_fn_t crc7_fp_header</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1104</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aca7d6388863eb76b60651e7b16c41b82"><div class="ttname"><a href="structIMB__MGR.html#aca7d6388863eb76b60651e7b16c41b82">IMB_MGR::gmac256_init</a></div><div class="ttdeci">aes_gmac_init_t gmac256_init</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1086</div></div>
+<div class="ttc" id="astructIMB__MGR_html_acb2ee84d30247bb257635063db3ae308"><div class="ttname"><a href="structIMB__MGR.html#acb2ee84d30247bb257635063db3ae308">IMB_MGR::submit_cipher_burst_nocheck</a></div><div class="ttdeci">submit_cipher_burst_t submit_cipher_burst_nocheck</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1120</div></div>
+<div class="ttc" id="astructIMB__MGR_html_acb6e3b70e16194274e2eaefdff8f9e89"><div class="ttname"><a href="structIMB__MGR.html#acb6e3b70e16194274e2eaefdff8f9e89">IMB_MGR::docsis256_sec_ooo</a></div><div class="ttdeci">void * docsis256_sec_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1141</div></div>
+<div class="ttc" id="astructIMB__MGR_html_acbd18bab8176262daab2bd808ca30616"><div class="ttname"><a href="structIMB__MGR.html#acbd18bab8176262daab2bd808ca30616">IMB_MGR::aes256_cmac_ooo</a></div><div class="ttdeci">void * aes256_cmac_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1165</div></div>
+<div class="ttc" id="astructIMB__MGR_html_acdb53e812f3e4a307a497eeab28c4256"><div class="ttname"><a href="structIMB__MGR.html#acdb53e812f3e4a307a497eeab28c4256">IMB_MGR::sha_1_ooo</a></div><div class="ttdeci">void * sha_1_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1168</div></div>
+<div class="ttc" id="astructIMB__MGR_html_acf438b50cb95a4fff1276b6666d22ad4"><div class="ttname"><a href="structIMB__MGR.html#acf438b50cb95a4fff1276b6666d22ad4">IMB_MGR::docsis128_crc32_sec_ooo</a></div><div class="ttdeci">void * docsis128_crc32_sec_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1140</div></div>
+<div class="ttc" id="astructIMB__MGR_html_acfdfb511771cac71e032c5bf1c9273b7"><div class="ttname"><a href="structIMB__MGR.html#acfdfb511771cac71e032c5bf1c9273b7">IMB_MGR::gcm256_dec</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm256_dec</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1026</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ad08e44bc4edc54c556ea2245f848b974"><div class="ttname"><a href="structIMB__MGR.html#ad08e44bc4edc54c556ea2245f848b974">IMB_MGR::crc32_wimax_ofdma_data</a></div><div class="ttdeci">crc32_fn_t crc32_wimax_ofdma_data</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1107</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ad2c64d9d5f9ffd65d13e73205cb803cd"><div class="ttname"><a href="structIMB__MGR.html#ad2c64d9d5f9ffd65d13e73205cb803cd">IMB_MGR::gcm128_enc_update</a></div><div class="ttdeci">aes_gcm_enc_dec_update_t gcm128_enc_update</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1030</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ad554a25793a904ae6cf7ca87250adbd3"><div class="ttname"><a href="structIMB__MGR.html#ad554a25793a904ae6cf7ca87250adbd3">IMB_MGR::aes_xcbc_ooo</a></div><div class="ttdeci">void * aes_xcbc_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1156</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ad566ac43002c2ba8ecb93048d5edc41b"><div class="ttname"><a href="structIMB__MGR.html#ad566ac43002c2ba8ecb93048d5edc41b">IMB_MGR::crc16_fp_data</a></div><div class="ttdeci">crc32_fn_t crc16_fp_data</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1102</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ad85fdcb101391b0a2488a3244d5f442d"><div class="ttname"><a href="structIMB__MGR.html#ad85fdcb101391b0a2488a3244d5f442d">IMB_MGR::snow3g_f8_1_buffer_bit</a></div><div class="ttdeci">snow3g_f8_1_buffer_bit_t snow3g_f8_1_buffer_bit</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1066</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ad8c004899d29974a3f4c034370422c31"><div class="ttname"><a href="structIMB__MGR.html#ad8c004899d29974a3f4c034370422c31">IMB_MGR::gcm128_init</a></div><div class="ttdeci">aes_gcm_init_t gcm128_init</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1027</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ade4a72c39980f0bba790b70529b60158"><div class="ttname"><a href="structIMB__MGR.html#ade4a72c39980f0bba790b70529b60158">IMB_MGR::sha256_one_block</a></div><div class="ttdeci">hash_one_block_t sha256_one_block</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1010</div></div>
+<div class="ttc" id="astructIMB__MGR_html_adff2cf46e7cbb5e2926f348623d8ad2a"><div class="ttname"><a href="structIMB__MGR.html#adff2cf46e7cbb5e2926f348623d8ad2a">IMB_MGR::gcm192_dec</a></div><div class="ttdeci">aes_gcm_enc_dec_t gcm192_dec</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1025</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ae0f2316d96e46b64d08e3cf73a93b39d"><div class="ttname"><a href="structIMB__MGR.html#ae0f2316d96e46b64d08e3cf73a93b39d">IMB_MGR::f8_n_buffer</a></div><div class="ttdeci">kasumi_f8_n_buffer_t f8_n_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1059</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ae1a596c9c9d6ca1292c6116575021c14"><div class="ttname"><a href="structIMB__MGR.html#ae1a596c9c9d6ca1292c6116575021c14">IMB_MGR::flags</a></div><div class="ttdeci">uint64_t flags</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:982</div></div>
+<div class="ttc" id="astructIMB__MGR_html_ae575c2350f5fca9a182c541795bb7d4d"><div class="ttname"><a href="structIMB__MGR.html#ae575c2350f5fca9a182c541795bb7d4d">IMB_MGR::xcbc_keyexp</a></div><div class="ttdeci">xcbc_keyexp_t xcbc_keyexp</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1006</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aebd9eab76cd056add559e6bea328dbf0"><div class="ttname"><a href="structIMB__MGR.html#aebd9eab76cd056add559e6bea328dbf0">IMB_MGR::gcm128_init_var_iv</a></div><div class="ttdeci">aes_gcm_init_var_iv_t gcm128_init_var_iv</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1080</div></div>
+<div class="ttc" id="astructIMB__MGR_html_aeff54b370fbe495ce96370811d280140"><div class="ttname"><a href="structIMB__MGR.html#aeff54b370fbe495ce96370811d280140">IMB_MGR::eea3_1_buffer</a></div><div class="ttdeci">zuc_eea3_1_buffer_t eea3_1_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1049</div></div>
+<div class="ttc" id="astructIMB__MGR_html_af03e401b002e2e415c8a927c46e1517b"><div class="ttname"><a href="structIMB__MGR.html#af03e401b002e2e415c8a927c46e1517b">IMB_MGR::des_dec_ooo</a></div><div class="ttdeci">void * des_dec_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1144</div></div>
+<div class="ttc" id="astructIMB__MGR_html_af0b1c5d3b269b252a75a55df8bdf472c"><div class="ttname"><a href="structIMB__MGR.html#af0b1c5d3b269b252a75a55df8bdf472c">IMB_MGR::f8_4_buffer</a></div><div class="ttdeci">kasumi_f8_4_buffer_t f8_4_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1058</div></div>
+<div class="ttc" id="astructIMB__MGR_html_af0cf9149495b0805a4f6f511c0fbff5b"><div class="ttname"><a href="structIMB__MGR.html#af0cf9149495b0805a4f6f511c0fbff5b">IMB_MGR::hmac_sha_512_ooo</a></div><div class="ttdeci">void * hmac_sha_512_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1154</div></div>
+<div class="ttc" id="astructIMB__MGR_html_af6531598b8dd0131a11e0cf95854605d"><div class="ttname"><a href="structIMB__MGR.html#af6531598b8dd0131a11e0cf95854605d">IMB_MGR::docsis256_crc32_sec_ooo</a></div><div class="ttdeci">void * docsis256_crc32_sec_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1142</div></div>
+<div class="ttc" id="astructIMB__MGR_html_af6a1c323981b8c3cfe09f94cd9dd58e2"><div class="ttname"><a href="structIMB__MGR.html#af6a1c323981b8c3cfe09f94cd9dd58e2">IMB_MGR::ghash_pre</a></div><div class="ttdeci">aes_gcm_pre_t ghash_pre</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1096</div></div>
+<div class="ttc" id="astructIMB__MGR_html_af854e664cef84cb8be4495a1af5e9cb5"><div class="ttname"><a href="structIMB__MGR.html#af854e664cef84cb8be4495a1af5e9cb5">IMB_MGR::f8_1_buffer</a></div><div class="ttdeci">kasumi_f8_1_buffer_t f8_1_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1054</div></div>
+<div class="ttc" id="astructIMB__MGR_html_af877c7669265775604857c6b81063bdb"><div class="ttname"><a href="structIMB__MGR.html#af877c7669265775604857c6b81063bdb">IMB_MGR::features</a></div><div class="ttdeci">uint64_t features</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:983</div></div>
+<div class="ttc" id="astructIMB__MGR_html_af95fa831fb24629e19613e8594e5d32a"><div class="ttname"><a href="structIMB__MGR.html#af95fa831fb24629e19613e8594e5d32a">IMB_MGR::gcm128_dec_finalize</a></div><div class="ttdeci">aes_gcm_enc_dec_finalize_t gcm128_dec_finalize</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1039</div></div>
+<div class="ttc" id="astructIMB__MGR_html_afa275308dab467d0c68dc921bd68d1a4"><div class="ttname"><a href="structIMB__MGR.html#afa275308dab467d0c68dc921bd68d1a4">IMB_MGR::gcm256_init_var_iv</a></div><div class="ttdeci">aes_gcm_init_var_iv_t gcm256_init_var_iv</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1082</div></div>
+<div class="ttc" id="astructIMB__MGR_html_afafb95a00fe6633fb6901855928b08bb"><div class="ttname"><a href="structIMB__MGR.html#afafb95a00fe6633fb6901855928b08bb">IMB_MGR::f9_1_buffer</a></div><div class="ttdeci">kasumi_f9_1_buffer_t f9_1_buffer</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1060</div></div>
+<div class="ttc" id="astructIMB__MGR_html_afc7d7ae10e8e6f37b9ec894059818fad"><div class="ttname"><a href="structIMB__MGR.html#afc7d7ae10e8e6f37b9ec894059818fad">IMB_MGR::ghash</a></div><div class="ttdeci">ghash_t ghash</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1078</div></div>
+<div class="ttc" id="astructIMB__MGR_html_afd72d6af1d8ff605e8aaaf984f0700ed"><div class="ttname"><a href="structIMB__MGR.html#afd72d6af1d8ff605e8aaaf984f0700ed">IMB_MGR::hmac_sha_384_ooo</a></div><div class="ttdeci">void * hmac_sha_384_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1153</div></div>
+<div class="ttc" id="astructIMB__MGR_html_afe48187946dff59f6c69103501691921"><div class="ttname"><a href="structIMB__MGR.html#afe48187946dff59f6c69103501691921">IMB_MGR::aes192_ooo</a></div><div class="ttdeci">void * aes192_ooo</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:1137</div></div>
+<div class="ttc" id="astructIMB__SGL__IOV_html"><div class="ttname"><a href="structIMB__SGL__IOV.html">IMB_SGL_IOV</a></div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:365</div></div>
+<div class="ttc" id="astructIMB__SGL__IOV_html_a3a3662456b91011eb0585667492acc88"><div class="ttname"><a href="structIMB__SGL__IOV.html#a3a3662456b91011eb0585667492acc88">IMB_SGL_IOV::len</a></div><div class="ttdeci">uint64_t len</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:368</div></div>
+<div class="ttc" id="astructIMB__SGL__IOV_html_a54b8da76fb8a400f9f7972bdd97f6f53"><div class="ttname"><a href="structIMB__SGL__IOV.html#a54b8da76fb8a400f9f7972bdd97f6f53">IMB_SGL_IOV::out</a></div><div class="ttdeci">void * out</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:367</div></div>
+<div class="ttc" id="astructIMB__SGL__IOV_html_a56c5b0a033d949869cee2d03f1df3129"><div class="ttname"><a href="structIMB__SGL__IOV.html#a56c5b0a033d949869cee2d03f1df3129">IMB_SGL_IOV::in</a></div><div class="ttdeci">const void * in</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:366</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html"><div class="ttname"><a href="structchacha20__poly1305__context__data.html">chacha20_poly1305_context_data</a></div><div class="ttdoc">holds Chacha20-Poly1305 operation context</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:591</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html_a74e971fe76c8b946e30e8f0c8cce111a"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#a74e971fe76c8b946e30e8f0c8cce111a">chacha20_poly1305_context_data::remain_ct_bytes</a></div><div class="ttdeci">uint64_t remain_ct_bytes</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:601</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html_a7b5edcebc9a6bec3776daf6d13bf950c"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#a7b5edcebc9a6bec3776daf6d13bf950c">chacha20_poly1305_context_data::aad_len</a></div><div class="ttdeci">uint64_t aad_len</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:593</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html_a84693b96048f6130a749b633c65e2105"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#a84693b96048f6130a749b633c65e2105">chacha20_poly1305_context_data::remain_ks_bytes</a></div><div class="ttdeci">uint64_t remain_ks_bytes</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:599</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html_a908d80ce2c35792099dbc967818b9abd"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#a908d80ce2c35792099dbc967818b9abd">chacha20_poly1305_context_data::poly_scratch</a></div><div class="ttdeci">uint8_t poly_scratch[16]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:597</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html_a9ac4fafe2ca37395264f728c8e99a9b1"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#a9ac4fafe2ca37395264f728c8e99a9b1">chacha20_poly1305_context_data::poly_key</a></div><div class="ttdeci">uint8_t poly_key[32]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:596</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html_ac0d1657fc57308900691369362c56658"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#ac0d1657fc57308900691369362c56658">chacha20_poly1305_context_data::IV</a></div><div class="ttdeci">uint8_t IV[12]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:604</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html_add03511d1f95376b3ac64a7916c27368"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#add03511d1f95376b3ac64a7916c27368">chacha20_poly1305_context_data::last_block_count</a></div><div class="ttdeci">uint64_t last_block_count</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:598</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html_ade4568d041695b318df773787872127f"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#ade4568d041695b318df773787872127f">chacha20_poly1305_context_data::hash_len</a></div><div class="ttdeci">uint64_t hash_len</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:594</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html_ae12447b2fd2e9f8a6f09f443bd303887"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#ae12447b2fd2e9f8a6f09f443bd303887">chacha20_poly1305_context_data::hash</a></div><div class="ttdeci">uint64_t hash[3]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:592</div></div>
+<div class="ttc" id="astructchacha20__poly1305__context__data_html_afc74af4af99449f0b9f01338ae723c1a"><div class="ttname"><a href="structchacha20__poly1305__context__data.html#afc74af4af99449f0b9f01338ae723c1a">chacha20_poly1305_context_data::last_ks</a></div><div class="ttdeci">uint8_t last_ks[64]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:595</div></div>
+<div class="ttc" id="astructgcm__context__data_html"><div class="ttname"><a href="structgcm__context__data.html">gcm_context_data</a></div><div class="ttdoc">holds GCM operation context</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:577</div></div>
+<div class="ttc" id="astructgcm__context__data_html_a0d9e72f85aba9363fcb4f2d757342aa2"><div class="ttname"><a href="structgcm__context__data.html#a0d9e72f85aba9363fcb4f2d757342aa2">gcm_context_data::in_length</a></div><div class="ttdeci">uint64_t in_length</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:580</div></div>
+<div class="ttc" id="astructgcm__context__data_html_a2a454a5e44422aaec135dc7807aa55a4"><div class="ttname"><a href="structgcm__context__data.html#a2a454a5e44422aaec135dc7807aa55a4">gcm_context_data::current_counter</a></div><div class="ttdeci">uint8_t current_counter[IMB_GCM_BLOCK_LEN]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:583</div></div>
+<div class="ttc" id="astructgcm__context__data_html_a2e52ea863c681afe1d3370a987e252f0"><div class="ttname"><a href="structgcm__context__data.html#a2e52ea863c681afe1d3370a987e252f0">gcm_context_data::partial_block_enc_key</a></div><div class="ttdeci">uint8_t partial_block_enc_key[IMB_GCM_BLOCK_LEN]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:581</div></div>
+<div class="ttc" id="astructgcm__context__data_html_a84bac4eabc12b81d26898b6fe6728a63"><div class="ttname"><a href="structgcm__context__data.html#a84bac4eabc12b81d26898b6fe6728a63">gcm_context_data::orig_IV</a></div><div class="ttdeci">uint8_t orig_IV[IMB_GCM_BLOCK_LEN]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:582</div></div>
+<div class="ttc" id="astructgcm__context__data_html_a97411247efd14ab01e7e0da6587bfa0c"><div class="ttname"><a href="structgcm__context__data.html#a97411247efd14ab01e7e0da6587bfa0c">gcm_context_data::partial_block_length</a></div><div class="ttdeci">uint64_t partial_block_length</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:584</div></div>
+<div class="ttc" id="astructgcm__context__data_html_a98c22f35eb0b4d368e2f454b347ed3b9"><div class="ttname"><a href="structgcm__context__data.html#a98c22f35eb0b4d368e2f454b347ed3b9">gcm_context_data::aad_hash</a></div><div class="ttdeci">uint8_t aad_hash[IMB_GCM_BLOCK_LEN]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:578</div></div>
+<div class="ttc" id="astructgcm__context__data_html_ab1dadabcbd2002738ec7db7da332e04f"><div class="ttname"><a href="structgcm__context__data.html#ab1dadabcbd2002738ec7db7da332e04f">gcm_context_data::aad_length</a></div><div class="ttdeci">uint64_t aad_length</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:579</div></div>
+<div class="ttc" id="astructgcm__key__data_html"><div class="ttname"><a href="structgcm__key__data.html">gcm_key_data</a></div><div class="ttdoc">holds intermediate key data needed to improve performance</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:639</div></div>
+<div class="ttc" id="astructgcm__key__data_html_a1c73e3891c50c5e03e82715ceda77d17"><div class="ttname"><a href="structgcm__key__data.html#a1c73e3891c50c5e03e82715ceda77d17">gcm_key_data::shifted_hkey</a></div><div class="ttdeci">uint8_t shifted_hkey[IMB_GCM_ENC_KEY_LEN *8]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:649</div></div>
 <div class="ttc" id="astructgcm__key__data_html_a3f231fdc1d521cd15c111667e4aea818"><div class="ttname"><a href="structgcm__key__data.html#a3f231fdc1d521cd15c111667e4aea818">gcm_key_data::avx2_avx512</a></div><div class="ttdeci">struct gcm_key_data::@12::@14 avx2_avx512</div></div>
-<div class="ttc" id="astructgcm__key__data_html_a570a82f076ceb5da6719d1a554584820"><div class="ttname"><a href="structgcm__key__data.html#a570a82f076ceb5da6719d1a554584820">gcm_key_data::shifted_hkey_k</a></div><div class="ttdeci">uint8_t shifted_hkey_k[IMB_GCM_ENC_KEY_LEN *8]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:748</div></div>
-<div class="ttc" id="astructgcm__key__data_html_a73b61a77635c0357b36b83aaf69d1237"><div class="ttname"><a href="structgcm__key__data.html#a73b61a77635c0357b36b83aaf69d1237">gcm_key_data::shifted_hkey</a></div><div class="ttdeci">uint8_t shifted_hkey[IMB_GCM_ENC_KEY_LEN *8]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:739</div></div>
+<div class="ttc" id="astructgcm__key__data_html_a570a82f076ceb5da6719d1a554584820"><div class="ttname"><a href="structgcm__key__data.html#a570a82f076ceb5da6719d1a554584820">gcm_key_data::shifted_hkey_k</a></div><div class="ttdeci">uint8_t shifted_hkey_k[IMB_GCM_ENC_KEY_LEN *8]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:658</div></div>
 <div class="ttc" id="astructgcm__key__data_html_a7ad44e105b23e41b7f79530b6370e509"><div class="ttname"><a href="structgcm__key__data.html#a7ad44e105b23e41b7f79530b6370e509">gcm_key_data::vaes_avx512</a></div><div class="ttdeci">struct gcm_key_data::@12::@15 vaes_avx512</div></div>
 <div class="ttc" id="astructgcm__key__data_html_a908988e25607cd3e092bfcea9964deb1"><div class="ttname"><a href="structgcm__key__data.html#a908988e25607cd3e092bfcea9964deb1">gcm_key_data::sse_avx</a></div><div class="ttdeci">struct gcm_key_data::@12::@13 sse_avx</div></div>
-<div class="ttc" id="astructgcm__key__data_html_aa5bda4f55b8393be151cfe28a9dc1ca9"><div class="ttname"><a href="structgcm__key__data.html#aa5bda4f55b8393be151cfe28a9dc1ca9">gcm_key_data::expanded_keys</a></div><div class="ttdeci">uint8_t expanded_keys[IMB_GCM_ENC_KEY_LEN *IMB_GCM_KEY_SETS]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:730</div></div>
+<div class="ttc" id="astructgcm__key__data_html_aa5bda4f55b8393be151cfe28a9dc1ca9"><div class="ttname"><a href="structgcm__key__data.html#aa5bda4f55b8393be151cfe28a9dc1ca9">gcm_key_data::expanded_keys</a></div><div class="ttdeci">uint8_t expanded_keys[IMB_GCM_ENC_KEY_LEN *IMB_GCM_KEY_SETS]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:640</div></div>
 <div class="ttc" id="astructgcm__key__data_html_af5adb4225d569050207cfcfe00fe273a"><div class="ttname"><a href="structgcm__key__data.html#af5adb4225d569050207cfcfe00fe273a">gcm_key_data::ghash_keys</a></div><div class="ttdeci">union gcm_key_data::@12 ghash_keys</div></div>
-<div class="ttc" id="astructimb__uint128__t_html"><div class="ttname"><a href="structimb__uint128__t.html">imb_uint128_t</a></div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:40</div></div>
-<div class="ttc" id="astructimb__uint128__t_html_a30e60cc86acb6eafaa4079c0e46ba622"><div class="ttname"><a href="structimb__uint128__t.html#a30e60cc86acb6eafaa4079c0e46ba622">imb_uint128_t::low</a></div><div class="ttdeci">uint64_t low</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:41</div></div>
-<div class="ttc" id="astructimb__uint128__t_html_aa65815c9b383e888758ae21d0c6159c9"><div class="ttname"><a href="structimb__uint128__t.html#aa65815c9b383e888758ae21d0c6159c9">imb_uint128_t::high</a></div><div class="ttdeci">uint64_t high</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:42</div></div>
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-<div class="ttc" id="astructkasumi__key__sched__s_html_a091988e7975015d654ccb6904c4fdf39"><div class="ttname"><a href="structkasumi__key__sched__s.html#a091988e7975015d654ccb6904c4fdf39">kasumi_key_sched_s::msk16</a></div><div class="ttdeci">uint16_t msk16[KASUMI_KEY_SCHEDULE_SIZE]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:656</div></div>
-<div class="ttc" id="astructkasumi__key__sched__s_html_a7e69de411b81753c10776442bbe03100"><div class="ttname"><a href="structkasumi__key__sched__s.html#a7e69de411b81753c10776442bbe03100">kasumi_key_sched_s::sk16</a></div><div class="ttdeci">uint16_t sk16[KASUMI_KEY_SCHEDULE_SIZE]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:655</div></div>
-<div class="ttc" id="astructsnow3g__key__schedule__s_html"><div class="ttname"><a href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_s</a></div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:922</div></div>
-<div class="ttc" id="astructsnow3g__key__schedule__s_html_ae0ca8cd2581836c0297b34eea1effb12"><div class="ttname"><a href="structsnow3g__key__schedule__s.html#ae0ca8cd2581836c0297b34eea1effb12">snow3g_key_schedule_s::k</a></div><div class="ttdeci">uint32_t k[4]</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:924</div></div>
+<div class="ttc" id="astructimb__uint128__t_html"><div class="ttname"><a href="structimb__uint128__t.html">imb_uint128_t</a></div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:40</div></div>
+<div class="ttc" id="astructimb__uint128__t_html_a30e60cc86acb6eafaa4079c0e46ba622"><div class="ttname"><a href="structimb__uint128__t.html#a30e60cc86acb6eafaa4079c0e46ba622">imb_uint128_t::low</a></div><div class="ttdeci">uint64_t low</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:41</div></div>
+<div class="ttc" id="astructimb__uint128__t_html_aa65815c9b383e888758ae21d0c6159c9"><div class="ttname"><a href="structimb__uint128__t.html#aa65815c9b383e888758ae21d0c6159c9">imb_uint128_t::high</a></div><div class="ttdeci">uint64_t high</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:42</div></div>
+<div class="ttc" id="astructkasumi__key__sched__s_html"><div class="ttname"><a href="structkasumi__key__sched__s.html">kasumi_key_sched_s</a></div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:563</div></div>
+<div class="ttc" id="astructkasumi__key__sched__s_html_a091988e7975015d654ccb6904c4fdf39"><div class="ttname"><a href="structkasumi__key__sched__s.html#a091988e7975015d654ccb6904c4fdf39">kasumi_key_sched_s::msk16</a></div><div class="ttdeci">uint16_t msk16[KASUMI_KEY_SCHEDULE_SIZE]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:566</div></div>
+<div class="ttc" id="astructkasumi__key__sched__s_html_a7e69de411b81753c10776442bbe03100"><div class="ttname"><a href="structkasumi__key__sched__s.html#a7e69de411b81753c10776442bbe03100">kasumi_key_sched_s::sk16</a></div><div class="ttdeci">uint16_t sk16[KASUMI_KEY_SCHEDULE_SIZE]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:565</div></div>
+<div class="ttc" id="astructsnow3g__key__schedule__s_html"><div class="ttname"><a href="structsnow3g__key__schedule__s.html">snow3g_key_schedule_s</a></div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:839</div></div>
+<div class="ttc" id="astructsnow3g__key__schedule__s_html_ae0ca8cd2581836c0297b34eea1effb12"><div class="ttname"><a href="structsnow3g__key__schedule__s.html#ae0ca8cd2581836c0297b34eea1effb12">snow3g_key_schedule_s::k</a></div><div class="ttdeci">uint32_t k[4]</div><div class="ttdef"><b>Definition</b> intel-ipsec-mb.h:841</div></div>
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+/*! jQuery UI - v1.13.2 - 2022-08-01
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-<div class="title">README </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p><a href="https://scan.coverity.com/projects/intel-ipsec-mb"><object type="image/svg+xml" data="https://scan.coverity.com/projects/16449/badge.svg" style="pointer-events: none;">Coverity Status</object></a> <object type="image/svg+xml" data="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_gcc.yml/badge.svg" style="pointer-events: none;">Linux Build Shared gcc</object> <object type="image/svg+xml" data="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_static_gcc.yml/badge.svg" style="pointer-events: none;">Linux Build Static gcc</object> <object type="image/svg+xml" data="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_clang.yml/badge.svg" style="pointer-events: none;">Linux Build Shared clang</object> <object type="image/svg+xml" data="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_static_clang.yml/badge.svg" style="pointer-events: none;">Linux Build Static clang</object> <object type="image/svg+xml" data="https://github.com/intel/intel-ipsec-mb/actions/workflows/linux_build_shared_clang_aesni_emu.yml/badge.svg" style="pointer-events: none;">Linux Build Shared clang AESNI emulation</object> <object type="image/svg+xml" data="https://github.com/intel/intel-ipsec-mb/actions/workflows/freebsd_build_shared_clang.yml/badge.svg" style="pointer-events: none;">FreeBSD Build Shared clang</object> <object type="image/svg+xml" data="https://github.com/intel/intel-ipsec-mb/actions/workflows/freebsd_build_shared_gcc.yml/badge.svg" style="pointer-events: none;">FreeBSD Build Shared gcc</object></p>
-<h1><a class="anchor" id="autotoc_md0"></a>
-Intel(R) Multi-Buffer Crypto for IPsec Library</h1>
-<p>The library provides software crypto acceleration primarily targeting packet processing applications. It can be used for application such as: IPsec, TLS, Wireless (RAN), Cable or MPEG DRM.</p>
-<p>The library is used as software crypto provider in <a href="https://www.dpdk.org/">DPDK</a>, <a href="https://github.com/intel/QAT_Engine">Intel(R) QAT Engine</a> and <a href="https://fd.io/">FD.io</a>.</p>
-<p>Using crypto interfaces from the above frameworks gives freedom to change providers without subsequent application modifications. The library can also be used directly through its native API.</p>
-<p>Key differentiating features:</p>
-<ul>
-<li>operation chaining (encryption and authentication)</li>
-<li>advanced cryptographic pipelining<ul>
-<li>job manager with scheduling and dispatching functions</li>
-<li>API hides underlying implementation details from an application</li>
-</ul>
-</li>
-<li>multi-buffer and function stitching innovations</li>
-<li>low level implementations using latest instruction extensions</li>
-</ul>
-<h1><a class="anchor" id="autotoc_md1"></a>
-Contents</h1>
-<ol type="1">
-<li>Overview</li>
-<li>Processor Extensions</li>
-<li>Recommendations</li>
-<li>Package Content</li>
-<li>Compilation</li>
-<li>Security Considerations &amp; Options for Increased Security</li>
-<li>Installation</li>
-<li>Backwards compatibility</li>
-<li>Disclaimer (ZUC, KASUMI, SNOW3G)</li>
-<li>Legal Disclaimer</li>
-</ol>
-<h1><a class="anchor" id="autotoc_md2"></a>
-1\. Overview</h1>
-<p>Intel Multi-Buffer Crypto for IPsec Library is highly-optimized software implementations of the core cryptographic processing for IPsec, which provides industry-leading performance on a range of Intel(R) Processors.</p>
-<p>For information on how the library works, see the Intel White Paper: "Fast Multi-buffer IPsec Implementations on Intel Architecture Processors". Jim Guilford, Sean Gulley, et. al.</p>
-<p>The easiest way to find it is to search the Internet for the title and Intel White Paper.</p>
-<p>Table 1. List of supported cipher algorithms and their implementations. </p><div class="fragment"><div class="line">+----------------------------------------------------------------------+</div>
-<div class="line">|                |                   Implementation                    |</div>
-<div class="line">| Encryption     +-----------------------------------------------------|</div>
-<div class="line">|                | x86_64 | SSE    | AVX    | AVX2   | AVX512 | VAES(5)|</div>
-<div class="line">|----------------+--------+--------+--------+--------+--------+--------|</div>
-<div class="line">| AES128-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| AES192-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| AES256-GCM     | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| AES128-CCM     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |</div>
-<div class="line">| AES256-CCM     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |</div>
-<div class="line">| AES128-CBC     | N      | Y(1)   | Y(3)   | N      | N      | Y(6)   |</div>
-<div class="line">| AES192-CBC     | N      | Y(1)   | Y(3)   | N      | N      | Y(6)   |</div>
-<div class="line">| AES256-CBC     | N      | Y(1)   | Y(3)   | N      | N      | Y(6)   |</div>
-<div class="line">| AES128-CTR     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |</div>
-<div class="line">| AES192-CTR     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |</div>
-<div class="line">| AES256-CTR     | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |</div>
-<div class="line">| AES128-ECB     | N      | Y(1)   | Y  by8 | Y(10)  | N      | Y by16 |</div>
-<div class="line">| AES192-ECB     | N      | Y(1)   | Y  by8 | Y(10)  | N      | Y by16 |</div>
-<div class="line">| AES256-ECB     | N      | Y(1)   | Y  by8 | Y(10)  | N      | Y by16 |</div>
-<div class="line">| NULL           | Y      | N      | N      | N      | N      | N      |</div>
-<div class="line">| AES128-DOCSIS  | N      | Y(2)   | Y(4)   | N      | Y(7)   | Y(8)   |</div>
-<div class="line">| AES256-DOCSIS  | N      | Y(2)   | Y(4)   | N      | Y(7)   | Y(8)   |</div>
-<div class="line">| DES-DOCSIS     | Y      | N      | N      | N      | Y  x16 | N      |</div>
-<div class="line">| 3DES           | Y      | N      | N      | N      | Y  x16 | N      |</div>
-<div class="line">| DES            | Y      | N      | N      | N      | Y  x16 | N      |</div>
-<div class="line">| KASUMI-F8      | Y      | N      | N      | N      | N      | N      |</div>
-<div class="line">| ZUC-EEA3       | N      | Y  x4  | Y  x4  | Y  x8  | Y  x16 | Y  x16 |</div>
-<div class="line">| ZUC-EEA3-256   | N      | Y  x4  | Y  x4  | Y  x8  | Y  x16 | Y  x16 |</div>
-<div class="line">| SNOW3G-UEA2    | N      | Y  x4  | Y      | Y      | Y  x16 | Y  x16 |</div>
-<div class="line">| AES128-CBCS(9) | N      | Y(1)   | Y(3)   | N      | N      | Y(6)   |</div>
-<div class="line">| Chacha20       | N      | Y      | Y      | Y      | Y      | N      |</div>
-<div class="line">| Chacha20 AEAD  | N      | Y      | Y      | Y      | Y      | N      |</div>
-<div class="line">| SNOW-V         | N      | Y      | Y      | N      | N      | N      |</div>
-<div class="line">| SNOW-V AEAD    | N      | Y      | Y      | N      | N      | N      |</div>
-<div class="line">| PON-CRC-BIP    | N      | Y  by8 | Y  by8 | N      | N      | Y      |</div>
-<div class="line">+----------------------------------------------------------------------+</div>
-</div><!-- fragment --><p>Notes: <br  />
- (1,2) - By default, decryption is by4 and encryption is x4. <br  />
- On CPU's supporting GFNI, decryption is by8 and encryption is x8. <br  />
- (3,4) - decryption is by8 and encryption is x8 <br  />
- (5) - AVX512 plus VAES, VPCLMULQDQ and GFNI extensions <br  />
- (6) - decryption is by16 and encryption is x16 <br  />
- (7) - same as AES128-CBC for AVX, combines cipher and CRC32 <br  />
- (8) - decryption is by16 and encryption is x16 <br  />
- (9) - currently 1:9 crypt:skip pattern supported <br  />
- (10) - by default, decryption and encryption are AVX by8. <br  />
- On CPUs supporting VAES, decryption and encryption are AVX2-VAES by16. <br  />
-</p>
-<p>Legend: <br  />
- <code>byY</code> - single buffer Y blocks at a time <br  />
- <code>xY</code> - Y buffers at a time</p>
-<p>As an example of how to read table 1 and 2, if one uses AVX512 interface to perform AES128-CBC encryption then there is no native AVX512 implementation for this cipher. In such case, the library uses best available implementation which is AVX for AES128-CBC.</p>
-<p>Table 2. List of supported integrity algorithms and their implementations. </p><div class="fragment"><div class="line">+-------------------------------------------------------------------------+</div>
-<div class="line">|                   |                   Implementation                    |</div>
-<div class="line">| Integrity         +-----------------------------------------------------|</div>
-<div class="line">|                   | x86_64 | SSE    | AVX    | AVX2   | AVX512 | VAES(3)|</div>
-<div class="line">|-------------------+--------+--------+--------+--------+--------+--------|</div>
-<div class="line">| AES-XCBC-96       | N      | Y   x4 | Y   x8 | N      | N      | Y x16  |</div>
-<div class="line">| HMAC-MD5-96       | Y(1)   | Y x4x2 | Y x4x2 | Y x8x2 | N      | N      |</div>
-<div class="line">| HMAC-SHA1-96      | N      | Y(2)x4 | Y   x4 | Y   x8 | Y  x16 | N      |</div>
-<div class="line">| HMAC-SHA2-224_112 | N      | Y(2)x4 | Y   x4 | Y   x8 | Y  x16 | N      |</div>
-<div class="line">| HMAC-SHA2-256_128 | N      | Y(2)x4 | Y   x4 | Y   x8 | Y  x16 | N      |</div>
-<div class="line">| HMAC-SHA2-384_192 | N      | Y   x2 | Y   x2 | Y   x4 | Y   x8 | N      |</div>
-<div class="line">| HMAC-SHA2-512_256 | N      | Y   x2 | Y   x2 | Y   x4 | Y   x8 | N      |</div>
-<div class="line">| SHA1              | N      | Y(2)x4 | Y   x4 | Y   x8 | Y  x16 | N      |</div>
-<div class="line">| SHA2-224          | N      | Y(2)x4 | Y   x4 | Y   x8 | Y  x16 | N      |</div>
-<div class="line">| SHA2-256          | N      | Y(2)x4 | Y   x4 | Y   x8 | Y  x16 | N      |</div>
-<div class="line">| SHA2-384          | N      | Y   x2 | Y   x2 | Y   x4 | Y   x8 | N      |</div>
-<div class="line">| SHA2-512          | N      | Y   x2 | Y   x2 | Y   x4 | Y   x8 | N      |</div>
-<div class="line">| AES128-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| AES192-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| AES256-GMAC       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| NULL              | Y      | N      | N      | N      | N      | N      |</div>
-<div class="line">| AES128-CCM        | N      | Y(5)x4 | Y   x8 | N      | N      | Y x16  |</div>
-<div class="line">| AES256-CCM        | N      | Y(5)x4 | Y   x8 | N      | N      | Y x16  |</div>
-<div class="line">| AES128-CMAC-96    | Y      | Y(5)x4 | Y   x8 | N      | N      | Y x16  |</div>
-<div class="line">| AES256-CMAC-96    | Y      | Y(5)x4 | Y   x8 | N      | N      | Y x16  |</div>
-<div class="line">| KASUMI-F9         | Y      | N      | N      | N      | N      | N      |</div>
-<div class="line">| ZUC-EIA3          | N      | Y  x4  | Y  x4  | Y  x8  | Y  x16 | Y  x16 |</div>
-<div class="line">| ZUC-EIA3-256      | N      | Y  x4  | Y  x4  | Y  x8  | Y  x16 | Y  x16 |</div>
-<div class="line">| SNOW3G-UIA2(8)    | N      | Y by4  | Y by4  | N      | Y by32 | Y by32 |</div>
-<div class="line">| DOCSIS-CRC32(4)   | N      | Y      | Y      | N      | Y      | Y      |</div>
-<div class="line">| HEC               | N      | Y      | Y      | N      | N      | N      |</div>
-<div class="line">| POLY1305          | Y      | N      | N      | N      | Y      | Y      |</div>
-<div class="line">| POLY1305 AEAD     | Y      | N      | N      | N      | Y      | Y      |</div>
-<div class="line">| SNOW-V AEAD       | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| GHASH             | N      | Y  by8 | Y  by8 | Y  by8 | Y  by8 | Y by48 |</div>
-<div class="line">| CRC(6)            | N      | Y  by8 | Y  by8 | N      | N      | Y by16 |</div>
-<div class="line">| PON-CRC-BIP(7)    | N      | Y      | Y      | N      | N      | Y      |</div>
-<div class="line">+-------------------------------------------------------------------------+</div>
-</div><!-- fragment --><p>Notes: <br  />
- (1) - MD5 over one block implemented in C <br  />
- (2) - Implementation using SHANI extensions is x2 <br  />
- (3) - AVX512 plus VAES, VPCLMULQDQ, GFNI and IFMA extensions <br  />
- (4) - used only with AES256-DOCSIS and AES128-DOCSIS ciphers <br  />
- (5) - x8 on selected CPU's supporting GFNI <br  />
- (6) - Supported CRC types:</p><ul>
-<li>CRC32: Ethernet FCS, SCTP, WIMAX OFDMA <br  />
-</li>
-<li>CRC24: LTE A, LTE B <br  />
-</li>
-<li>CRC16: X25, FP data <br  />
-</li>
-<li>CRC11: FP header <br  />
-</li>
-<li>CRC10: IUUP data <br  />
-</li>
-<li>CRC8: WIMAX OFDMA HCS <br  />
-</li>
-<li>CRC7: FP header <br  />
-</li>
-<li>CRC6: IUUP header <br  />
- (7) - used only with PON-AES128-CTR cipher <br  />
- (8) - x4/x16 for init keystream generation, then by4/by32 <br  />
-</li>
-</ul>
-<p>Legend: <br  />
- <code>byY</code>- single buffer Y blocks at a time <br  />
- <code>xY</code>- Y buffers at a time <br  />
-</p>
-<p>Table 3. Encryption and integrity algorithm combinations </p><div class="fragment"><div class="line">+---------------------------------------------------------------------+</div>
-<div class="line">| Encryption    | Allowed Integrity Algorithms                        |</div>
-<div class="line">|---------------+-----------------------------------------------------|</div>
-<div class="line">| AES128-GCM    | AES128-GMAC                                         |</div>
-<div class="line">|---------------+-----------------------------------------------------|</div>
-<div class="line">| AES192-GCM    | AES192-GMAC                                         |</div>
-<div class="line">|---------------+-----------------------------------------------------|</div>
-<div class="line">| AES256-GCM    | AES256-GMAC                                         |</div>
-<div class="line">|---------------+-----------------------------------------------------|</div>
-<div class="line">| AES128-CCM    | AES128-CCM                                          |</div>
-<div class="line">|---------------+-----------------------------------------------------|</div>
-<div class="line">| AES256-CCM    | AES256-CCM                                          |</div>
-<div class="line">|---------------+-----------------------------------------------------|</div>
-<div class="line">| AES128-CBC,   | AES-XCBC-96,                                        |</div>
-<div class="line">| AES192-CBC,   | HMAC-SHA1-96, HMAC-SHA2-224_112, HMAC-SHA2-256_128, |</div>
-<div class="line">| AES256-CBC,   | HMAC-SHA2-384_192, HMAC-SHA2-512_256,               |</div>
-<div class="line">| AES128-CTR,   | AES128-CMAC-96,                                     |</div>
-<div class="line">| AES192-CTR,   | NULL,                                               |</div>
-<div class="line">| AES256-CTR,   | KASUMI-F9,                                          |</div>
-<div class="line">| AES128-ECB,   | ZUC-EIA3, ZUC-EIA3-256,                             |</div>
-<div class="line">| AES192-ECB,   | SNOW3G-UIA3,                                        |</div>
-<div class="line">| AES256-ECB,   | POLY1305,                                           |</div>
-<div class="line">| NULL,         | AES128-GMAC, AES192-GMAC, AES256-GMAC, GHASH        |</div>
-<div class="line">| AES128-DOCSIS,|                                                     |</div>
-<div class="line">| AES256-DOCSIS,|                                                     |</div>
-<div class="line">| DES-DOCSIS,   |                                                     |</div>
-<div class="line">| 3DES,         |                                                     |</div>
-<div class="line">| DES,          |                                                     |</div>
-<div class="line">| Chacha20,     |                                                     |</div>
-<div class="line">| KASUMI-F8,    |                                                     |</div>
-<div class="line">| ZUC-EEA3,     |                                                     |</div>
-<div class="line">| ZUC-EEA3-256, |                                                     |</div>
-<div class="line">| SNOW3G-UEA3   |                                                     |</div>
-<div class="line">| SNOW-V        |                                                     |</div>
-<div class="line">|---------------+-----------------------------------------------------|</div>
-<div class="line">| AES128-DOCSIS,| DOCSIS-CRC32                                        |</div>
-<div class="line">| AES256-DOCSIS |                                                     |</div>
-<div class="line">|---------------+-----------------------------------------------------|</div>
-<div class="line">| PON-AES128-CTR| PON-CRC-BIP                                         |</div>
-<div class="line">|---------------+-----------------------------------------------------|</div>
-<div class="line">| CHACHA20 AEAD | POLY1305 AEAD                                       |</div>
-<div class="line">+---------------+-----------------------------------------------------+</div>
-<div class="line">| SNOW-V AEAD   | SNOW-V AEAD (GHASH)                                 |</div>
-<div class="line">+---------------+-----------------------------------------------------+</div>
-</div><!-- fragment --><h1><a class="anchor" id="autotoc_md3"></a>
-2\. Processor Extensions</h1>
-<p>Table 4. Processor extensions used in the library </p><div class="fragment"><div class="line">+-------------------------------------------------------------------------+</div>
-<div class="line">| Algorithm         | Interface | Extensions                              |</div>
-<div class="line">|-------------------+-----------+-----------------------------------------|</div>
-<div class="line">| HMAC-SHA1-96,     | AVX512    | AVX512F, AVX512BW, AVX512VL             |</div>
-<div class="line">| HMAC-SHA2-224_112,|           |                                         |</div>
-<div class="line">| HMAC-SHA2-256_128,|           |                                         |</div>
-<div class="line">| HMAC-SHA2-384_192,|           |                                         |</div>
-<div class="line">| HMAC-SHA2-512_256 |           |                                         |</div>
-<div class="line">|-------------------+-----------+-----------------------------------------|</div>
-<div class="line">| DES, 3DES,        | AVX512    | AVX512F, AVX512BW                       |</div>
-<div class="line">| DOCSIS-DES        |           |                                         |</div>
-<div class="line">|-------------------+-----------+-----------------------------------------|</div>
-<div class="line">| HMAC-SHA1-96,     | SSE       | SHANI                                   |</div>
-<div class="line">| HMAC-SHA2-224_112,|           | - presence is autodetected and library  |</div>
-<div class="line">| HMAC-SHA2-256_128,|           |   falls back to SSE implementation      |</div>
-<div class="line">| HMAC-SHA2-384_192,|           |   if not present                        |</div>
-<div class="line">| HMAC-SHA2-512_256 |           |                                         |</div>
-<div class="line">+-------------------+-----------+-----------------------------------------+</div>
-</div><!-- fragment --><h1><a class="anchor" id="autotoc_md4"></a>
-3\. Recommendations</h1>
-<p>Legacy or to be avoided algorithms listed in the table below are implemented in the library in order to support legacy applications. Please use corresponding alternative algorithms instead. </p><div class="fragment"><div class="line">+--------------------------------------------------------------+</div>
-<div class="line">| # | Algorithm           | Recommendation | Alternative       |</div>
-<div class="line">|---+---------------------+----------------+-------------------|</div>
-<div class="line">| 1 | DES encryption      | Avoid          | AES encryption    |</div>
-<div class="line">|---+---------------------+----------------+-------------------|</div>
-<div class="line">| 2 | 3DES encryption     | Avoid          | AES encryption    |</div>
-<div class="line">|---+---------------------+----------------+-------------------|</div>
-<div class="line">| 3 | HMAC-MD5 integrity  | Legacy         | HMAC-SHA256       |</div>
-<div class="line">|---+---------------------+----------------+-------------------|</div>
-<div class="line">| 4 | AES-ECB encryption  | Avoid          | AES-CBC, AES-CNTR |</div>
-<div class="line">|---+---------------------+----------------+-------------------|</div>
-<div class="line">| 3 | HMAC-SHA1 integrity | Avoid          | HMAC-SHA256       |</div>
-<div class="line">+--------------------------------------------------------------+</div>
-</div><!-- fragment --><p>Intel(R) Multi-Buffer Crypto for IPsec Library depends on C library and it is recommended to use its latest version.</p>
-<p>Applications using the Intel(R) Multi-Buffer Crypto for IPsec Library rely on Operating System to provide process isolation. As the result, it is recommended to use latest Operating System patches and security updates.</p>
-<h1><a class="anchor" id="autotoc_md5"></a>
-4\. Package Content</h1>
-<ul>
-<li>test - Library test applications</li>
-<li>perf - Library performance application</li>
-<li>lib - Library source files</li>
-<li>lib/sse - Intel(R) SSE optimized routines</li>
-<li>lib/avx - Intel(R) AVX optimized routines</li>
-<li>lib/avx2 - Intel(R) AVX2 optimized routines</li>
-<li>lib/avx512 - Intel(R) AVX512 optimized routines</li>
-<li>lib/no-aesni - Non-AESNI accelerated routines</li>
-</ul>
-<p><b>Note:</b> <br  />
- There is just one branch used in the project. All development is done on the master branch. <br  />
- Code taken from the tip of the master branch should not be considered fit for production. <br  />
-</p>
-<p>Refer to the releases tab for stable code versions: <br  />
- <a href="https://github.com/intel/intel-ipsec-mb/releases">https://github.com/intel/intel-ipsec-mb/releases</a></p>
-<h1><a class="anchor" id="autotoc_md6"></a>
-5\. Compilation</h1>
-<h2><a class="anchor" id="autotoc_md7"></a>
-Linux (64-bit only)</h2>
-<p>Required tools: <br  />
-</p><ul>
-<li>GNU make <br  />
-</li>
-<li>NASM version 2.14 (or newer) <br  />
-</li>
-<li>gcc (GCC) 4.8.3 (or newer) <br  />
-</li>
-</ul>
-<p>Shared library: <br  />
- <code>&gt; make</code></p>
-<p>Static library: <br  />
- <code>&gt; make SHARED=n</code></p>
-<p>Clean the build: <br  />
- <code>&gt; make clean</code> <br  />
- or <br  />
- <code>&gt; make clean SHARED=n</code></p>
-<p>Build with debugging information: <br  />
- <code>&gt; make DEBUG=y</code></p>
-<p>Build with AESNI emulation support (disabled by default): <br  />
- <code>&gt; make AESNI_EMU=y</code></p>
-<p><b>Note:</b> Building with debugging information is not advised for production use.</p>
-<p>For more build options and their explanation run: <br  />
- <code>&gt; make help</code></p>
-<h2><a class="anchor" id="autotoc_md8"></a>
-Windows MSVS (x64 only)</h2>
-<p>Required tools: <br  />
-</p><ul>
-<li>Microsoft (R) Visual Studio 2015: <br  />
-<ul>
-<li>NMAKE: Microsoft (R) Program Maintenance Utility Version 14.00.24210.0 <br  />
-</li>
-<li>CL: Microsoft (R) C/C++ Optimizing Compiler Version 19.00.24215.1 for x64 <br  />
-</li>
-<li>LIB: Microsoft (R) Library Manager Version 14.00.24215.1 <br  />
-</li>
-<li>LINK: Microsoft (R) Incremental Linker Version 14.00.24215.1 <br  />
-</li>
-<li>Note: Building on later versions should work but is not verified <br  />
-</li>
-</ul>
-</li>
-<li>NASM version 2.14 (or newer) <br  />
-</li>
-</ul>
-<p>Shared library (DLL): <br  />
- <code>&gt; nmake /f win_x64.mak</code></p>
-<p>Static library: <br  />
- <code>&gt; nmake /f win_x64.mak SHARED=n</code></p>
-<p>Clean the build: <br  />
- <code>&gt; nmake /f win_x64.mak clean</code> <br  />
- or <br  />
- <code>&gt; nmake /f win_x64.mak clean SHARED=n</code></p>
-<p>Build without safety features: <br  />
-</p><ul>
-<li>SAFE_DATA clears sensitive information stored temporarily on stack, registers or internal data structures <br  />
-</li>
-<li>SAFE_PARAM adds extra checks on input parameters <br  />
-</li>
-<li>SAFE_LOOKUP uses constant-time lookups (enabled by default) <br  />
-</li>
-<li>SAFE_OPTIONS additional option to disable all safe options. Enabled by default. <br  />
- Disable to turn off: SAFE_DATA, SAFE_PARAM and SAFE_LOOKUP. <br  />
-</li>
-</ul>
-<p><code>&gt; nmake /f win_x64.mak SAFE_DATA=n SAFE_PARAM=n</code> <code>&gt; nmake /f win_x64.mak SAFE_OPTIONS=n</code></p>
-<p>Build with debugging information: <br  />
- <code>&gt; nmake /f win_x64.mak DEBUG=y</code></p>
-<p>Build with AESNI emulation support (disabled by default): <br  />
- <code>&gt; nmake /f win_x64.mak AESNI_EMU=y</code></p>
-<p><b>Note:</b> Building with debugging information is not advised for production use.</p>
-<p>For more build options and their explanation run: <br  />
- <code>&gt; nmake /f win_x64.mak help</code></p>
-<h2><a class="anchor" id="autotoc_md9"></a>
-Windows Mingw-w64 (64-bit only)</h2>
-<p>Required tools: <br  />
-</p><ul>
-<li>GNU mingw32-make.exe <br  />
-</li>
-<li>NASM version 2.14 (or newer) <br  />
-</li>
-<li>gcc (GCC) 10.3.0 (or newer)</li>
-</ul>
-<p>Shared library: <br  />
- <code>&gt; mingw32-make.exe</code></p>
-<p>Static library: <br  />
- <code>&gt; mingw32-make.exe SHARED=n</code></p>
-<p>Clean the build: <br  />
- <code>&gt; mingw32-make.exe clean</code> <br  />
- or <br  />
- <code>&gt; mingw32-make.exe clean SHARED=n</code></p>
-<p>Build with debugging information: <br  />
- <code>&gt; mingw32-make.exe DEBUG=y</code></p>
-<p><b>Note:</b> Building with debugging information is not advised for production use.</p>
-<p>For more build options and their explanation run: <br  />
- <code>&gt; mingw32-make.exe help</code></p>
-<h2><a class="anchor" id="autotoc_md10"></a>
-FreeBSD (64-bit only)</h2>
-<p>Required tools: <br  />
-</p><ul>
-<li>GNU make <br  />
-</li>
-<li>NASM version 2.14 (or newer) <br  />
-</li>
-<li>gcc (GCC) 4.8.3 (or newer) / clang 5.0 (or newer) <br  />
-</li>
-</ul>
-<p>Shared library: <br  />
- <code>&gt; gmake</code></p>
-<p>Static library: <br  />
- <code>&gt; gmake SHARED=n</code></p>
-<p>Clean the build: <br  />
- <code>&gt; gmake clean</code> <br  />
- or <br  />
- <code>&gt; gmake clean SHARED=n</code></p>
-<p>Build with debugging information: <br  />
- <code>&gt; gmake DEBUG=y</code></p>
-<p><b>Note:</b> Building with debugging information is not advised for production use.</p>
-<p>For more build options and their explanation run: <br  />
- <code>&gt; gmake help</code></p>
-<h1><a class="anchor" id="autotoc_md11"></a>
-6\. Security Considerations &amp; Options for Increased Security</h1>
-<h3><a class="anchor" id="autotoc_md12"></a>
-Security Considerations</h3>
-<p>The security of a system that uses cryptography depends on the strength of the cryptographic algorithms as well as the strength of the keys. Cryptographic key strength is dependent on several factors, with some of the most important factors including the length of the key, the entropy of the key bits, and maintaining the secrecy of the key.</p>
-<p>The selection of an appropriate algorithm and mode of operation critically affects the security of a system. Appropriate selection criteria is beyond the scope of this document and should be determined based upon usage, appropriate standards and consultation with a cryptographic expert. This library includes some algorithms, which are considered cryptographically weak and are included only for legacy and interoperability reasons. See the "Recommendations" section for more details.</p>
-<p>Secure creation of key material is not a part of this library. This library assumes that cryptographic keys have been created using approved methods with an appropriate and secure entropy source. Users of this library are referred to NIST SP800-133 Revision 1, Recommendation for Cryptographic Key Generation, found at <a href="https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-133r1.pdf">https://nvlpubs.nist.gov/nistpubs/SpecialPublications/NIST.SP.800-133r1.pdf</a></p>
-<p>Even with the use of strong cryptographic algorithms and robustly generated keys, software implementations of cryptographic algorithms may be attacked at the implementation through cache-timing attacks, buffer-over-reads, and other software vulnerabilities. Counter-measures against these types of attacks are possible but require additional processing cycles. Whether a particular system should provide such counter-measures depends on the threats to that system, and cannot be determined by a general library such as this one. In order to provide the most flexible implementation, this library allows certain counter-measures to be enabled or disabled at compile time. These options are listed below as the "Options for Increased Security" and are enabled through various build flags.</p>
-<h3><a class="anchor" id="autotoc_md13"></a>
-Options for Increased Security</h3>
-<p>There are three build options that are used to increase safety in the code and help protect external functions from incorrect input data. The SAFE_DATA, SAFE_PARAM and SAFE_LOOKUP options are enabled by default. Due to the potential performance impact associated to the extra code, these can be disabled by setting the parameter equal to "n" (e.g. make SAFE_LOOKUP=n).</p>
-<p>No specific code has been added, and no specific validation or security tests have been performed to help protect against or check for side-channel attacks.</p>
-<h3><a class="anchor" id="autotoc_md14"></a>
-SAFE_DATA</h3>
-<p>Stack and registers containing sensitive information, such as keys or IVs, are cleared upon completion of a function call.</p>
-<h3><a class="anchor" id="autotoc_md15"></a>
-SAFE_PARAM</h3>
-<p>Input parameters are checked, looking generally for NULL pointers or an incorrect input length.</p>
-<h3><a class="anchor" id="autotoc_md16"></a>
-SAFE_LOOKUP</h3>
-<p>Lookups which depend on sensitive information are implemented with constant time functions.</p>
-<p>Algorithms where these constant time functions are used are the following: <br  />
-</p><ul>
-<li>AESNI emulation <br  />
-</li>
-<li>DES: SSE, AVX and AVX2 implementations <br  />
-</li>
-<li>KASUMI: all architectures <br  />
-</li>
-<li>SNOW3G: all architectures <br  />
-</li>
-</ul>
-<p>If SAFE_LOOKUP is not enabled in the build (e.g. make SAFE_LOOKUP=n) then the algorithms listed above may be susceptible to timing attacks which could expose the cryptographic key.</p>
-<h3><a class="anchor" id="autotoc_md17"></a>
-SAFE_OPTIONS</h3>
-<p>SAFE_OPTIONS is a parameter that can be used to disable/enable all supported safe options (i.e. SAFE_DATA, SAFE_PARAM, SAFE_LOOKUP). It is set to <code>y</code> by default and all safe options are enabled. <code>SAFE_OPTIONS=n</code> disables all safe options.</p>
-<h3><a class="anchor" id="autotoc_md18"></a>
-Security API</h3>
-<p><b>Force clearing/zeroing of memory</b> </p><div class="fragment"><div class="line"><a class="code" href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a> <span class="keywordtype">void</span> <a class="code" href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6">imb_clear_mem</a>(<span class="keywordtype">void</span> *mem, <span class="keyword">const</span> <span class="keywordtype">size_t</span> size);</div>
-</div><!-- fragment --><p>To assist in clearing sensitive application data such as keys, plaintext etc. the library provides the <code><a class="el" href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6" title="Force clearing/zeroing of memory.">imb_clear_mem()</a></code> API. This API zeros _'size'_ bytes of memory pointed to by _'mem'_ followed by the <em>sfence</em> instruction to ensure memory is cleared before the function returns.</p>
-<h3><a class="anchor" id="autotoc_md19"></a>
-Galois Counter Mode (GCM) TAG Size</h3>
-<p>The library GCM and GMAC implementation provides flexibility as to tag size selection. As explained in <a href="https://csrc.nist.gov/publications/detail/sp/800-38d/final">NIST Special Publication 800-38D</a> section 5.2.1.2 and Appendix C, using tag sizes shorter than 96 bits can be insecure. Please refer to the aforementioned sections to understand the details, trade offs and mitigations of using shorter tag sizes.</p>
-<h1><a class="anchor" id="autotoc_md20"></a>
-7\. Installation</h1>
-<h2><a class="anchor" id="autotoc_md21"></a>
-Linux (64-bit only)</h2>
-<p>First compile the library and then install: <br  />
- <code>&gt; make</code> <br  />
- <code>&gt; sudo make install</code></p>
-<p>To uninstall the library run: <br  />
- <code>&gt; sudo make uninstall</code></p>
-<p>If you want to change install location then define PREFIX: <br  />
- <code>&gt; sudo make install PREFIX=&lt;path&gt;</code></p>
-<p>If there is no need to run ldconfig at install stage please use NOLDCONFIG=y option: <br  />
- <code>&gt; sudo make install NOLDCONFIG=y</code></p>
-<p>If library was compiled as an archive (not a default option) then install it using SHARED=n option: <br  />
- <code>&gt; sudo make install SHARED=n</code></p>
-<h2><a class="anchor" id="autotoc_md22"></a>
-Windows (x64 only)</h2>
-<p>First compile the library and then install from a command prompt in administrator mode: <br  />
- <code>&gt; nmake /f win_x64.mak</code> <br  />
- <code>&gt; nmake /f win_x64.mak install</code></p>
-<p>To uninstall the library run: <br  />
- <code>&gt; nmake /f win_x64.mak uninstall</code></p>
-<p>If you want to change install location then define PREFIX (default C:\Program Files): <br  />
- <code>&gt; nmake /f win_x64.mak install PREFIX=&lt;path&gt;</code></p>
-<p>If library was compiled as a static library (not a default option) then install it using SHARED=n option: <br  />
- <code>&gt; nmake /f win_x64.mak install SHARED=n</code></p>
-<h2><a class="anchor" id="autotoc_md23"></a>
-FreeBSD (64-bit only)</h2>
-<p>First compile the library and then install: <br  />
- <code>&gt; gmake</code> <br  />
- <code>&gt; sudo gmake install</code></p>
-<p>To uninstall the library run: <br  />
- <code>&gt; sudo gmake uninstall</code></p>
-<p>If you want to change install location then define PREFIX: <br  />
- <code>&gt; sudo gmake install PREFIX=&lt;path&gt;</code></p>
-<p>If there is no need to run ldconfig at install stage please use NOLDCONFIG=y option: <br  />
- <code>&gt; sudo gmake install NOLDCONFIG=y</code></p>
-<p>If library was compiled as an archive (not a default option) then install it using SHARED=n option: <br  />
- <code>&gt; sudo gmake install SHARED=n</code></p>
-<h1><a class="anchor" id="autotoc_md24"></a>
-8\. Backwards compatibility</h1>
-<p>In version 0.54, some symbols have been renamed to avoid too generic names (such as cipher modes or hash algorithms).</p>
-<p>When building an application and linking it against the IPSec Multi Buffer library, by default the old symbols (up to v0.53) are exported, to maintain backwards compatibility.</p>
-<p>Applications should move to the new API as soon as possible, as the old symbols are marked as deprecated and will be removed in a future release.</p>
-<p>For applications which face symbol conflicts due to these old generic names, they should be compiled with the flag -DNO_COMPAT_IMB_API_053, which will not export the old symbols.</p>
-<h1><a class="anchor" id="autotoc_md25"></a>
-9\. Disclaimer (ZUC, KASUMI, SNOW3G)</h1>
-<p>Please note that cryptographic material, such as ciphering algorithms, may be subject to national regulations. What is more, use of some algorithms in real networks and production equipment can be subject to agreement or licensing by the GSMA and/or the ETSI.</p>
-<p>For more details please see: <br  />
-</p><ul>
-<li>GSMA <a href="https://www.gsma.com/security/security-algorithms/">https://www.gsma.com/security/security-algorithms/</a> <br  />
-</li>
-<li>ETSI <a href="https://www.etsi.org/security-algorithms-and-codes/cellular-algorithm-licences">https://www.etsi.org/security-algorithms-and-codes/cellular-algorithm-licences</a></li>
-</ul>
-<h1><a class="anchor" id="autotoc_md26"></a>
-10\. Legal Disclaimer</h1>
-<p>THIS SOFTWARE IS PROVIDED BY INTEL"AS IS". NO LICENSE, EXPRESS OR <br  />
- IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS <br  />
- ARE GRANTED THROUGH USE. EXCEPT AS PROVIDED IN INTEL'S TERMS AND <br  />
- CONDITIONS OF SALE, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL <br  />
- DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR <br  />
- USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO <br  />
- FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT <br  />
- OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. <br  />
- </p>
-</div></div><!-- contents -->
-</div><!-- PageDoc -->
-<div class="ttc" id="aintel-ipsec-mb_8h_html_a986643689f56109161597f67eb9d7b40"><div class="ttname"><a href="intel-ipsec-mb_8h.html#a986643689f56109161597f67eb9d7b40">IMB_DLL_EXPORT</a></div><div class="ttdeci">#define IMB_DLL_EXPORT</div><div class="ttdef"><b>Definition:</b> intel-ipsec-mb.h:86</div></div>
-<div class="ttc" id="aintel-ipsec-mb_8h_html_aecdd69541b6d2a83d19ca804ef4b78d6"><div class="ttname"><a href="intel-ipsec-mb_8h.html#aecdd69541b6d2a83d19ca804ef4b78d6">imb_clear_mem</a></div><div class="ttdeci">IMB_DLL_EXPORT void imb_clear_mem(void *mem, const size_t size)</div><div class="ttdoc">Force clearing/zeroing of memory.</div></div>
-<!-- start footer part -->
-<hr class="footer"/><address class="footer"><small>
-Generated by &#160;<a href="http://www.doxygen.org/index.html">
-<img class="footer" src="doxygen.png" alt="doxygen"/>
-</a> 1.8.17
-</small></address>
-</body>
-</html>
diff --git a/docs/menu.js b/docs/menu.js
deleted file mode 100644
index 433c15b8..00000000
--- a/docs/menu.js
+++ /dev/null
@@ -1,50 +0,0 @@
-/*
- @licstart  The following is the entire license notice for the
- JavaScript code in this file.
-
- Copyright (C) 1997-2017 by Dimitri van Heesch
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License along
- with this program; if not, write to the Free Software Foundation, Inc.,
- 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-
- @licend  The above is the entire license notice
- for the JavaScript code in this file
- */
-function initMenu(relPath,searchEnabled,serverSide,searchPage,search) {
-  function makeTree(data,relPath) {
-    var result='';
-    if ('children' in data) {
-      result+='<ul>';
-      for (var i in data.children) {
-        result+='<li><a href="'+relPath+data.children[i].url+'">'+
-                                data.children[i].text+'</a>'+
-                                makeTree(data.children[i],relPath)+'</li>';
-      }
-      result+='</ul>';
-    }
-    return result;
-  }
-
-  $('#main-nav').append(makeTree(menudata,relPath));
-  $('#main-nav').children(':first').addClass('sm sm-dox').attr('id','main-menu');
-  if (searchEnabled) {
-    if (serverSide) {
-      $('#main-menu').append('<li style="float:right"><div id="MSearchBox" class="MSearchBoxInactive"><div class="left"><form id="FSearchBox" action="'+relPath+searchPage+'" method="get"><img id="MSearchSelect" src="'+relPath+'search/mag.png" alt=""/><input type="text" id="MSearchField" name="query" value="'+search+'" size="20" accesskey="S" onfocus="searchBox.OnSearchFieldFocus(true)" onblur="searchBox.OnSearchFieldFocus(false)"></form></div><div class="right"></div></div></li>');
-    } else {
-      $('#main-menu').append('<li style="float:right"><div id="MSearchBox" class="MSearchBoxInactive"><span class="left"><img id="MSearchSelect" src="'+relPath+'search/mag_sel.png" onmouseover="return searchBox.OnSearchSelectShow()" onmouseout="return searchBox.OnSearchSelectHide()" alt=""/><input type="text" id="MSearchField" value="'+search+'" accesskey="S" onfocus="searchBox.OnSearchFieldFocus(true)" onblur="searchBox.OnSearchFieldFocus(false)" onkeyup="searchBox.OnSearchFieldChange(event)"/></span><span class="right"><a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="'+relPath+'search/close.png" alt=""/></a></span></div></li>');
-    }
-  }
-  $('#main-menu').smartmenus();
-}
-/* @license-end */
diff --git a/docs/menudata.js b/docs/menudata.js
deleted file mode 100644
index 9058e7b3..00000000
--- a/docs/menudata.js
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
-@licstart  The following is the entire license notice for the
-JavaScript code in this file.
-
-Copyright (C) 1997-2019 by Dimitri van Heesch
-
-This program is free software; you can redistribute it and/or modify
-it under the terms of version 2 of the GNU General Public License as published by
-the Free Software Foundation
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License along
-with this program; if not, write to the Free Software Foundation, Inc.,
-51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
-
-@licend  The above is the entire license notice
-for the JavaScript code in this file
-*/
-var menudata={children:[
-{text:"Main Page",url:"index.html"},
-{text:"Data Structures",url:"annotated.html",children:[
-{text:"Data Structures",url:"annotated.html"},
-{text:"Data Structure Index",url:"classes.html"},
-{text:"Data Fields",url:"functions.html",children:[
-{text:"All",url:"functions.html",children:[
-{text:"_",url:"functions.html#index__5F"},
-{text:"a",url:"functions_a.html#index_a"},
-{text:"c",url:"functions_c.html#index_c"},
-{text:"d",url:"functions_d.html#index_d"},
-{text:"e",url:"functions_e.html#index_e"},
-{text:"f",url:"functions_f.html#index_f"},
-{text:"g",url:"functions_g.html#index_g"},
-{text:"h",url:"functions_h.html#index_h"},
-{text:"i",url:"functions_i.html#index_i"},
-{text:"j",url:"functions_j.html#index_j"},
-{text:"k",url:"functions_k.html#index_k"},
-{text:"l",url:"functions_l.html#index_l"},
-{text:"m",url:"functions_m.html#index_m"},
-{text:"n",url:"functions_n.html#index_n"},
-{text:"o",url:"functions_o.html#index_o"},
-{text:"p",url:"functions_p.html#index_p"},
-{text:"q",url:"functions_q.html#index_q"},
-{text:"r",url:"functions_r.html#index_r"},
-{text:"s",url:"functions_s.html#index_s"},
-{text:"u",url:"functions_u.html#index_u"},
-{text:"v",url:"functions_v.html#index_v"},
-{text:"x",url:"functions_x.html#index_x"},
-{text:"z",url:"functions_z.html#index_z"}]},
-{text:"Variables",url:"functions_vars.html",children:[
-{text:"_",url:"functions_vars.html#index__5F"},
-{text:"a",url:"functions_vars_a.html#index_a"},
-{text:"c",url:"functions_vars_c.html#index_c"},
-{text:"d",url:"functions_vars_d.html#index_d"},
-{text:"e",url:"functions_vars_e.html#index_e"},
-{text:"f",url:"functions_vars_f.html#index_f"},
-{text:"g",url:"functions_vars_g.html#index_g"},
-{text:"h",url:"functions_vars_h.html#index_h"},
-{text:"i",url:"functions_vars_i.html#index_i"},
-{text:"j",url:"functions_vars_j.html#index_j"},
-{text:"k",url:"functions_vars_k.html#index_k"},
-{text:"l",url:"functions_vars_l.html#index_l"},
-{text:"m",url:"functions_vars_m.html#index_m"},
-{text:"n",url:"functions_vars_n.html#index_n"},
-{text:"o",url:"functions_vars_o.html#index_o"},
-{text:"p",url:"functions_vars_p.html#index_p"},
-{text:"q",url:"functions_vars_q.html#index_q"},
-{text:"r",url:"functions_vars_r.html#index_r"},
-{text:"s",url:"functions_vars_s.html#index_s"},
-{text:"u",url:"functions_vars_u.html#index_u"},
-{text:"v",url:"functions_vars_v.html#index_v"},
-{text:"x",url:"functions_vars_x.html#index_x"},
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-{text:"Files",url:"files.html",children:[
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-{text:"Globals",url:"globals.html",children:[
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-{text:"s",url:"globals_s.html#index_s"},
-{text:"x",url:"globals_x.html#index_x"},
-{text:"z",url:"globals_z.html#index_z"}]},
-{text:"Functions",url:"globals_func.html",children:[
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-{text:"d",url:"globals_func_d.html#index_d"},
-{text:"f",url:"globals_func_f.html#index_f"},
-{text:"g",url:"globals_func_g.html#index_g"},
-{text:"i",url:"globals_func_i.html#index_i"},
-{text:"k",url:"globals_func_k.html#index_k"},
-{text:"m",url:"globals_func_m.html#index_m"},
-{text:"q",url:"globals_func_q.html#index_q"},
-{text:"s",url:"globals_func_s.html#index_s"},
-{text:"z",url:"globals_func_z.html#index_z"}]},
-{text:"Typedefs",url:"globals_type.html",children:[
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-{text:"c",url:"globals_type.html#index_c"},
-{text:"d",url:"globals_type.html#index_d"},
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-{text:"h",url:"globals_type.html#index_h"},
-{text:"i",url:"globals_type.html#index_i"},
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-{text:"q",url:"globals_type.html#index_q"},
-{text:"s",url:"globals_type.html#index_s"},
-{text:"x",url:"globals_type.html#index_x"},
-{text:"z",url:"globals_type.html#index_z"}]},
-{text:"Enumerations",url:"globals_enum.html"},
-{text:"Enumerator",url:"globals_eval.html",children:[
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diff --git a/docs/nav_fd.png b/docs/nav_fd.png
new file mode 100644
index 0000000000000000000000000000000000000000..032fbdd4c54f54fa9a2e6423b94ef4b2ebdfaceb
GIT binary patch
literal 169
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diff --git a/docs/nav_hd.png b/docs/nav_hd.png
new file mode 100644
index 0000000000000000000000000000000000000000..de80f18ad6488b9990303f267a76fdc83f0ffd80
GIT binary patch
literal 114
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literal 0
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diff --git a/docs/navtree.css b/docs/navtree.css
index d8a311a2..c8a7766a 100644
--- a/docs/navtree.css
+++ b/docs/navtree.css
@@ -22,8 +22,13 @@
 #nav-tree .selected {
   background-image: url('tab_a.png');
   background-repeat:repeat-x;
-  color: #fff;
-  text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0);
+  color: var(--nav-text-active-color);
+  text-shadow: var(--nav-text-active-shadow);
+}
+
+#nav-tree .selected .arrow {
+  color: var(--nav-arrow-selected-color);
+  text-shadow: none;
 }
 
 #nav-tree img {
@@ -43,7 +48,7 @@
 #nav-tree .label {
   margin:0px;
   padding:0px;
-  font: 12px 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif;
+  font: 12px var(--font-family-nav);
 }
 
 #nav-tree .label a {
@@ -52,7 +57,7 @@
 
 #nav-tree .selected a {
   text-decoration:none;
-  color:#fff;
+  color:var(--nav-text-active-color);
 }
 
 #nav-tree .children_ul {
@@ -67,7 +72,6 @@
 
 #nav-tree {
   padding: 0px 0px;
-  background-color: #FAFAFF; 
   font-size:14px;
   overflow:auto;
 }
@@ -86,7 +90,7 @@
   display:block;
   position: absolute;
   left: 0px;
-  width: 250px;
+  width: $width;
   overflow : hidden;
 }
 
@@ -95,7 +99,7 @@
 }
 
 .ui-resizable-e {
-  background-image:url("splitbar.png");
+  background-image:var(--nav-splitbar-image);
   background-size:100%;
   background-repeat:repeat-y;
   background-attachment: scroll;
@@ -118,9 +122,8 @@
 }
 
 #nav-tree {
-  background-image:url('nav_h.png');
   background-repeat:repeat-x;
-  background-color: #F9FAFC;
+  background-color: var(--nav-background-color);
   -webkit-overflow-scrolling : touch; /* iOS 5+ */
 }
 
diff --git a/docs/navtree.js b/docs/navtree.js
index 27983687..f23e9849 100644
--- a/docs/navtree.js
+++ b/docs/navtree.js
@@ -545,5 +545,12 @@ function initNavTree(toroot,relpath)
        navTo(o,toroot,hashUrl(),relpath);
      }
   })
+
+  $("div.toc a[href]").click(function(e) {
+    e.preventDefault();
+    var docContent = $('#doc-content');
+    var aname = $(this).attr("href");
+    gotoAnchor($(aname),aname,true);
+  })
 }
 /* @license-end */
diff --git a/docs/navtreedata.js b/docs/navtreedata.js
index ae77138e..490d8f8b 100644
--- a/docs/navtreedata.js
+++ b/docs/navtreedata.js
@@ -25,28 +25,57 @@
 var NAVTREE =
 [
   [ "intel-ipsec-mb", "index.html", [
-    [ "Intel(R) Multi-Buffer Crypto for IPsec Library", "index.html#autotoc_md0", null ],
-    [ "Contents", "index.html#autotoc_md1", null ],
-    [ "1. Overview", "index.html#autotoc_md2", null ],
-    [ "2. Processor Extensions", "index.html#autotoc_md3", null ],
-    [ "3. Recommendations", "index.html#autotoc_md4", null ],
-    [ "4. Package Content", "index.html#autotoc_md5", null ],
-    [ "5. Documentation", "index.html#autotoc_md6", null ],
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-      [ "FreeBSD (64-bit only)", "index.html#autotoc_md11", null ]
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-      [ "Windows (x64 only)", "index.html#autotoc_md23", null ],
-      [ "FreeBSD (64-bit only)", "index.html#autotoc_md24", null ]
+    [ "Intel(R) Multi-Buffer Crypto for IPsec Library", "index.html#autotoc_md0", [
+      [ "Contents", "index.html#autotoc_md1", null ],
+      [ "1. Overview", "index.html#autotoc_md2", null ],
+      [ "2. Processor Extensions", "index.html#autotoc_md3", null ],
+      [ "3. Recommendations", "index.html#autotoc_md4", null ],
+      [ "4. Package Content", "index.html#autotoc_md5", null ],
+      [ "5. Documentation", "index.html#autotoc_md6", null ],
+      [ "6. Compilation", "index.html#autotoc_md7", [
+        [ "Linux (64-bit only)", "index.html#autotoc_md8", null ],
+        [ "Windows MSVS (x64 only)", "index.html#autotoc_md9", null ],
+        [ "Windows Mingw-w64 (64-bit only)", "index.html#autotoc_md10", null ],
+        [ "FreeBSD (64-bit only)", "index.html#autotoc_md11", null ],
+        [ "Building with CMake (experimental)", "index.html#autotoc_md12", [
+          [ "Unix Makefiles (Linux and FreeBSD)", "index.html#autotoc_md13", null ],
+          [ "Windows MSVS (x64 only)", "index.html#autotoc_md14", null ],
+          [ "Ninja (Linux, FreeBSD and Windows):", "index.html#autotoc_md15", null ]
+        ] ]
+      ] ],
+      [ "7. Security Considerations & Options for Increased Security", "index.html#autotoc_md16", [
+        [ "Security Considerations", "index.html#autotoc_md17", null ],
+        [ "Options for Increased Security", "index.html#autotoc_md18", null ],
+        [ "SAFE_DATA", "index.html#autotoc_md19", null ],
+        [ "SAFE_PARAM", "index.html#autotoc_md20", null ],
+        [ "SAFE_LOOKUP", "index.html#autotoc_md21", null ],
+        [ "SAFE_OPTIONS", "index.html#autotoc_md22", null ],
+        [ "Security API", "index.html#autotoc_md23", null ],
+        [ "Galois Counter Mode (GCM) TAG Size", "index.html#autotoc_md24", null ]
+      ] ],
+      [ "8. Installation", "index.html#autotoc_md25", [
+        [ "Linux (64-bit only)", "index.html#autotoc_md26", null ],
+        [ "Windows (x64 only)", "index.html#autotoc_md27", null ],
+        [ "FreeBSD (64-bit only)", "index.html#autotoc_md28", null ]
+      ] ],
+      [ "Installing with CMake (experimental)", "index.html#autotoc_md29", [
+        [ "Unix (Linux and FreeBSD)", "index.html#autotoc_md30", null ],
+        [ "Windows (x64 only)", "index.html#autotoc_md31", null ]
+      ] ],
+      [ "9. Backwards compatibility", "index.html#autotoc_md32", null ],
+      [ "10. Disclaimer (ZUC, KASUMI, SNOW3G)", "index.html#autotoc_md33", null ],
+      [ "11. Legal Disclaimer", "index.html#autotoc_md34", null ],
+      [ "12. FIPS Compliance", "index.html#autotoc_md35", [
+        [ "CAVP", "index.html#autotoc_md36", null ],
+        [ "CAVP Algorithm Parameters", "index.html#autotoc_md37", null ],
+        [ "Self-Test", "index.html#autotoc_md38", null ]
+      ] ],
+      [ "13.DLL Injection Attack", "index.html#autotoc_md39", [
+        [ "Problem", "index.html#autotoc_md40", null ],
+        [ "Solutions", "index.html#autotoc_md41", null ],
+        [ "Resources and Solution Details", "index.html#autotoc_md42", null ]
+      ] ]
     ] ],
-    [ "9. Backwards compatibility", "index.html#autotoc_md25", null ],
-    [ "10. Disclaimer (ZUC, KASUMI, SNOW3G)", "index.html#autotoc_md26", null ],
-    [ "11. Legal Disclaimer", "index.html#autotoc_md27", null ],
     [ "Data Structures", "annotated.html", [
       [ "Data Structures", "annotated.html", "annotated_dup" ],
       [ "Data Structure Index", "classes.html", null ],
@@ -59,11 +88,11 @@ var NAVTREE =
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       [ "Globals", "globals.html", [
         [ "All", "globals.html", "globals_dup" ],
-        [ "Functions", "globals_func.html", "globals_func" ],
+        [ "Functions", "globals_func.html", null ],
         [ "Typedefs", "globals_type.html", null ],
         [ "Enumerations", "globals_enum.html", null ],
         [ "Enumerator", "globals_eval.html", null ],
-        [ "Macros", "globals_defs.html", null ]
+        [ "Macros", "globals_defs.html", "globals_defs" ]
       ] ]
     ] ]
   ] ]
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 var SYNCONMSG = 'click to disable panel synchronisation';
diff --git a/docs/navtreeindex0.js b/docs/navtreeindex0.js
index d36dc2f4..d4e8a938 100644
--- a/docs/navtreeindex0.js
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@@ -1,253 +1,253 @@
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-  ['submit_5fjob_5fnocheck_5favx_45',['submit_job_nocheck_avx',['../intel-ipsec-mb_8h.html#ac7b339426753d3a7c44625a5ded3170a',1,'intel-ipsec-mb.h']]],
-  ['submit_5fjob_5fnocheck_5favx2_46',['submit_job_nocheck_avx2',['../intel-ipsec-mb_8h.html#a72caaf8162ae6f802f7c1fe570afe42e',1,'intel-ipsec-mb.h']]],
-  ['submit_5fjob_5fnocheck_5favx512_47',['submit_job_nocheck_avx512',['../intel-ipsec-mb_8h.html#a5a95b9268508d68b9027df98167d22cd',1,'intel-ipsec-mb.h']]],
-  ['submit_5fjob_5fnocheck_5fsse_48',['submit_job_nocheck_sse',['../intel-ipsec-mb_8h.html#a35e4c8a3d2eba8a612f021572621f98e',1,'intel-ipsec-mb.h']]],
-  ['submit_5fjob_5fsse_49',['submit_job_sse',['../intel-ipsec-mb_8h.html#a7700e90058a74980bfd7d462a19d32a0',1,'intel-ipsec-mb.h']]]
+  ['snow3g_5ff8_5fiv_5fgen_0',['snow3g_f8_iv_gen',['../intel-ipsec-mb_8h.html#a2cbdb64c0b305cb5af010f9c98f70a43',1,'intel-ipsec-mb.h']]],
+  ['snow3g_5ff9_5fiv_5fgen_1',['snow3g_f9_iv_gen',['../intel-ipsec-mb_8h.html#a93e7a99927bc37fb4cb03f966fa4ebdd',1,'intel-ipsec-mb.h']]],
+  ['submit_5fjob_5favx_2',['submit_job_avx',['../intel-ipsec-mb_8h.html#a950bf3b7a3c63a371b561ea20aaf3a18',1,'intel-ipsec-mb.h']]],
+  ['submit_5fjob_5favx2_3',['submit_job_avx2',['../intel-ipsec-mb_8h.html#a8913995859e45005f8de57a3456c93cf',1,'intel-ipsec-mb.h']]],
+  ['submit_5fjob_5favx512_4',['submit_job_avx512',['../intel-ipsec-mb_8h.html#a75cc0d090470e47cd8be04451ee31a68',1,'intel-ipsec-mb.h']]],
+  ['submit_5fjob_5fnocheck_5favx_5',['submit_job_nocheck_avx',['../intel-ipsec-mb_8h.html#ac7b339426753d3a7c44625a5ded3170a',1,'intel-ipsec-mb.h']]],
+  ['submit_5fjob_5fnocheck_5favx2_6',['submit_job_nocheck_avx2',['../intel-ipsec-mb_8h.html#a72caaf8162ae6f802f7c1fe570afe42e',1,'intel-ipsec-mb.h']]],
+  ['submit_5fjob_5fnocheck_5favx512_7',['submit_job_nocheck_avx512',['../intel-ipsec-mb_8h.html#a5a95b9268508d68b9027df98167d22cd',1,'intel-ipsec-mb.h']]],
+  ['submit_5fjob_5fnocheck_5fsse_8',['submit_job_nocheck_sse',['../intel-ipsec-mb_8h.html#a35e4c8a3d2eba8a612f021572621f98e',1,'intel-ipsec-mb.h']]],
+  ['submit_5fjob_5fsse_9',['submit_job_sse',['../intel-ipsec-mb_8h.html#a7700e90058a74980bfd7d462a19d32a0',1,'intel-ipsec-mb.h']]]
 ];
diff --git a/docs/search/functions_9.html b/docs/search/functions_9.html
deleted file mode 100644
index 51225e83..00000000
--- a/docs/search/functions_9.html
+++ /dev/null
@@ -1,37 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head><title></title>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta name="generator" content="Doxygen 1.9.5"/>
-<link rel="stylesheet" type="text/css" href="search.css"/>
-<script type="text/javascript" src="functions_9.js"></script>
-<script type="text/javascript" src="search.js"></script>
-</head>
-<body class="SRPage">
-<div id="SRIndex">
-<div class="SRStatus" id="Loading">Loading...</div>
-<div id="SRResults"></div>
-<script type="text/javascript">
-/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
-createResults();
-/* @license-end */
-</script>
-<div class="SRStatus" id="Searching">Searching...</div>
-<div class="SRStatus" id="NoMatches">No Matches</div>
-<script type="text/javascript">
-/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
-document.getElementById("Loading").style.display="none";
-document.getElementById("NoMatches").style.display="none";
-var searchResults = new SearchResults("searchResults");
-searchResults.Search();
-window.addEventListener("message", function(event) {
-  if (event.data == "take_focus") {
-    var elem = searchResults.NavNext(0);
-    if (elem) elem.focus();
-  }
-});
-/* @license-end */
-</script>
-</div>
-</body>
-</html>
diff --git a/docs/search/mag.svg b/docs/search/mag.svg
new file mode 100644
index 00000000..ffb6cf0d
--- /dev/null
+++ b/docs/search/mag.svg
@@ -0,0 +1,24 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN"
+ "https://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
+<svg
+   xmlns="http://www.w3.org/2000/svg"
+   xmlns:xlink="http://www.w3.org/1999/xlink"
+   viewBox="0 0 20 19"
+   height="19"
+   width="20"
+   id="svg2"
+   version="1.1">
+  <defs
+     id="defs6" />
+  <circle
+     r="3.5"
+     cy="8.5"
+     cx="5.5"
+     id="path4611"
+     style="fill:#000000;fill-opacity:0;stroke:#656565;stroke-width:1.4;stroke-opacity:1;stroke-miterlimit:4;stroke-dasharray:none" />
+  <path
+     id="path4630"
+     d="m 8.1085854,11.109059 2.7823556,2.782356"
+     style="fill:none;stroke:#656565;stroke-width:1.4;stroke-linecap:round;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1" />
+</svg>
diff --git a/docs/search/mag_d.svg b/docs/search/mag_d.svg
new file mode 100644
index 00000000..4122773f
--- /dev/null
+++ b/docs/search/mag_d.svg
@@ -0,0 +1,24 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN"
+ "https://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
+<svg
+   xmlns="http://www.w3.org/2000/svg"
+   xmlns:xlink="http://www.w3.org/1999/xlink"
+   viewBox="0 0 20 19"
+   height="19"
+   width="20"
+   id="svg2"
+   version="1.1">
+  <defs
+     id="defs6" />
+  <circle
+     r="3.5"
+     cy="8.5"
+     cx="5.5"
+     id="path4611"
+     style="fill:#000000;fill-opacity:0;stroke:#C5C5C5;stroke-width:1.4;stroke-opacity:1;stroke-miterlimit:4;stroke-dasharray:none" />
+  <path
+     id="path4630"
+     d="m 8.1085854,11.109059 2.7823556,2.782356"
+     style="fill:none;stroke:#C5C5C5;stroke-width:1.4;stroke-linecap:round;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1" />
+</svg>
diff --git a/docs/search/mag_sel.png b/docs/search/mag_sel.png
deleted file mode 100644
index 39c0ed52a25dd9d080ee0d42ae6c6042bdfa04d7..0000000000000000000000000000000000000000
GIT binary patch
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diff --git a/docs/search/mag_sel.svg b/docs/search/mag_sel.svg
index 03626f64..553dba87 100644
--- a/docs/search/mag_sel.svg
+++ b/docs/search/mag_sel.svg
@@ -1,59 +1,17 @@
 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
 <!-- Created with Inkscape (http://www.inkscape.org/) -->
-
+<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN"
+ "https://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
 <svg
-   xmlns:dc="http://purl.org/dc/elements/1.1/"
-   xmlns:cc="http://creativecommons.org/ns#"
-   xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
-   xmlns:svg="http://www.w3.org/2000/svg"
    xmlns="http://www.w3.org/2000/svg"
-   xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
-   xmlns:inkscape="http://www.inkscape.org/namespaces/inkscape"
    version="1.1"
    id="svg2"
    width="20"
    height="19"
    viewBox="0 0 20 19"
-   sodipodi:docname="mag_sel.svg"
-   inkscape:version="0.92.5 (2060ec1f9f, 2020-04-08)">
-  <metadata
-     id="metadata8">
-    <rdf:RDF>
-      <cc:Work
-         rdf:about="">
-        <dc:format>image/svg+xml</dc:format>
-        <dc:type
-           rdf:resource="http://purl.org/dc/dcmitype/StillImage" />
-        <dc:title></dc:title>
-      </cc:Work>
-    </rdf:RDF>
-  </metadata>
+  >
   <defs
      id="defs6" />
-  <sodipodi:namedview
-     pagecolor="#ffffff"
-     bordercolor="#666666"
-     borderopacity="1"
-     objecttolerance="10"
-     gridtolerance="10"
-     guidetolerance="10"
-     inkscape:pageopacity="0"
-     inkscape:pageshadow="2"
-     inkscape:window-width="1920"
-     inkscape:window-height="2096"
-     id="namedview4"
-     showgrid="false"
-     fit-margin-top="0"
-     fit-margin-left="0"
-     fit-margin-right="0"
-     fit-margin-bottom="0"
-     inkscape:zoom="32"
-     inkscape:cx="5.9792688"
-     inkscape:cy="1.1436277"
-     inkscape:window-x="1920"
-     inkscape:window-y="27"
-     inkscape:window-maximized="0"
-     inkscape:current-layer="svg2" />
   <circle
      style="fill:#000000;fill-opacity:0;stroke:#656565;stroke-width:1.4;stroke-opacity:1;stroke-miterlimit:4;stroke-dasharray:none"
      id="path4611"
@@ -64,11 +22,10 @@
      style="fill:#656565;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
      d="M 11,7 13.5,10 16,7 Z"
      id="path4609"
-     inkscape:connector-curvature="0"
-     sodipodi:nodetypes="cccc" />
+     />
   <path
      style="fill:none;stroke:#656565;stroke-width:1.4;stroke-linecap:round;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1"
      d="m 8.1085854,11.109059 2.7823556,2.782356"
      id="path4630"
-     inkscape:connector-curvature="0" />
+     />
 </svg>
diff --git a/docs/search/mag_seld.svg b/docs/search/mag_seld.svg
new file mode 100644
index 00000000..c906f84c
--- /dev/null
+++ b/docs/search/mag_seld.svg
@@ -0,0 +1,31 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<!-- Created with Inkscape (http://www.inkscape.org/) -->
+<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN"
+ "https://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
+<svg
+   xmlns="http://www.w3.org/2000/svg"
+   version="1.1"
+   id="svg2"
+   width="20"
+   height="19"
+   viewBox="0 0 20 19"
+  >
+  <defs
+     id="defs6" />
+  <circle
+     style="fill:#000000;fill-opacity:0;stroke:#c5C5C5;stroke-width:1.4;stroke-opacity:1;stroke-miterlimit:4;stroke-dasharray:none"
+     id="path4611"
+     cx="5.5"
+     cy="8.5"
+     r="3.5" />
+  <path
+     style="fill:#c5C5C5;fill-opacity:1;stroke:none;stroke-width:1px;stroke-linecap:butt;stroke-linejoin:miter;stroke-opacity:1"
+     d="M 11,7 13.5,10 16,7 Z"
+     id="path4609"
+     />
+  <path
+     style="fill:none;stroke:#c5C5C5;stroke-width:1.4;stroke-linecap:round;stroke-linejoin:miter;stroke-miterlimit:4;stroke-dasharray:none;stroke-opacity:1"
+     d="m 8.1085854,11.109059 2.7823556,2.782356"
+     id="path4630"
+     />
+</svg>
diff --git a/docs/search/nomatches.html b/docs/search/nomatches.html
deleted file mode 100644
index 2b9360b6..00000000
--- a/docs/search/nomatches.html
+++ /dev/null
@@ -1,13 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head><title></title>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<link rel="stylesheet" type="text/css" href="search.css"/>
-<script type="text/javascript" src="search.js"></script>
-</head>
-<body class="SRPage">
-<div id="SRIndex">
-<div class="SRStatus" id="NoMatches">No Matches</div>
-</div>
-</body>
-</html>
diff --git a/docs/search/pages_0.html b/docs/search/pages_0.html
deleted file mode 100644
index 14584eba..00000000
--- a/docs/search/pages_0.html
+++ /dev/null
@@ -1,37 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head><title></title>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta name="generator" content="Doxygen 1.9.5"/>
-<link rel="stylesheet" type="text/css" href="search.css"/>
-<script type="text/javascript" src="pages_0.js"></script>
-<script type="text/javascript" src="search.js"></script>
-</head>
-<body class="SRPage">
-<div id="SRIndex">
-<div class="SRStatus" id="Loading">Loading...</div>
-<div id="SRResults"></div>
-<script type="text/javascript">
-/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
-createResults();
-/* @license-end */
-</script>
-<div class="SRStatus" id="Searching">Searching...</div>
-<div class="SRStatus" id="NoMatches">No Matches</div>
-<script type="text/javascript">
-/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
-document.getElementById("Loading").style.display="none";
-document.getElementById("NoMatches").style.display="none";
-var searchResults = new SearchResults("searchResults");
-searchResults.Search();
-window.addEventListener("message", function(event) {
-  if (event.data == "take_focus") {
-    var elem = searchResults.NavNext(0);
-    if (elem) elem.focus();
-  }
-});
-/* @license-end */
-</script>
-</div>
-</body>
-</html>
diff --git a/docs/search/search.css b/docs/search/search.css
index 7f54c5c3..a53214fc 100644
--- a/docs/search/search.css
+++ b/docs/search/search.css
@@ -1,107 +1,119 @@
 /*---------------- Search Box */
 
-#FSearchBox {
-    float: left;
+#MSearchBox {
+    position: absolute;
+    right: 5px;
+}
+/*---------------- Search box styling */
+
+.SRPage * {
+    font-weight: normal;
+    line-height: normal;
+}
+
+dark-mode-toggle {
+    margin-left: 5px;
+    display: flex;
+    float: right;
 }
 
 #MSearchBox {
+    display: inline-block;
     white-space : nowrap;
-    float: none;
-    margin-top: 0px;
-    width: 161px;
-    height: 24px;
+    background: var(--search-background-color);
+    border-radius: 0.65em;
+    box-shadow: var(--search-box-shadow);
     z-index: 102;
-    right: 10px;
-    display: inline;
-    position: absolute;
 }
 
-#MSearchBox .left
-{
-    display:block;
-    position:absolute;
-    left:10px;
-    width:20px;
-    height:19px;
-    background:url('search_l.png') no-repeat;
-    background-position:right;
+#MSearchBox .left {
+    display: inline-block;
+    vertical-align: middle;
+    height: 1.4em;
 }
 
 #MSearchSelect {
-    display:block;
-    position:absolute;
-    width:20px;
-    height:19px;
+    display: inline-block;
+    vertical-align: middle;
+    width: 20px;
+    height: 19px;
+    background-image: var(--search-magnification-select-image);
+    margin: 0 0 0 0.3em;
+    padding: 0;
 }
 
-.left #MSearchSelect {
-    left:4px;
+#MSearchSelectExt {
+    display: inline-block;
+    vertical-align: middle;
+    width: 10px;
+    height: 19px;
+    background-image: var(--search-magnification-image);
+    margin: 0 0 0 0.5em;
+    padding: 0;
 }
 
-.right #MSearchSelect {
-    right:5px;
-}
 
 #MSearchField {
-    display:block;
-    position:absolute;
-    height:19px;
-    background:url('search_m.png') repeat-x;
+    display: inline-block;
+    vertical-align: middle;
+    width: 7.5em;
+    height: 19px;
+    margin: 0 0.15em;
+    padding: 0;
+    line-height: 1em;
     border:none;
-    width:111px;
-    margin-left:20px;
-    padding-left:4px;
-    color: #909090;
+    color: var(--search-foreground-color);
     outline: none;
-    font: 9pt Arial, Verdana, sans-serif;
+    font-family: var(--font-family-search);
     -webkit-border-radius: 0px;
+    border-radius: 0px;
+    background: none;
 }
 
-#FSearchBox #MSearchField {
-    margin-left:15px;
+@media(hover: none) {
+    /* to avoid zooming on iOS */
+    #MSearchField {
+        font-size: 16px;
+    }
 }
 
 #MSearchBox .right {
-    display:block;
-    position:absolute;
-    left:141px;
-    width:20px;
-    height:19px;
-    background:url('search_r.png') no-repeat;
-    background-position:left;
+    display: inline-block;
+    vertical-align: middle;
+    width: 1.4em;
+    height: 1.4em;
 }
 
 #MSearchClose {
     display: none;
-    position: absolute;
-    top: 4px;
+    font-size: inherit;
     background : none;
     border: none;
-    margin: 0px 4px 0px 0px;
-    padding: 0px 0px;
+    margin: 0;
+    padding: 0;
     outline: none;
-}
 
-.left #MSearchClose {
-    left: 6px;
 }
 
-.right #MSearchClose {
-    right: 2px;
+#MSearchCloseImg {
+    padding: 0.3em;
+    margin: 0;
 }
 
 .MSearchBoxActive #MSearchField {
-    color: #000000;
+    color: var(--search-active-color);
 }
 
+
+
 /*---------------- Search filter selection */
 
 #MSearchSelectWindow {
     display: none;
     position: absolute;
     left: 0; top: 0;
-    border: 1px solid #90A5CE;
-    background-color: #F9FAFC;
+    border: 1px solid var(--search-filter-border-color);
+    background-color: var(--search-filter-background-color);
     z-index: 10001;
     padding-top: 4px;
     padding-bottom: 4px;
@@ -114,7 +126,7 @@
 }
 
 .SelectItem {
-    font: 8pt Arial, Verdana, sans-serif;
+    font: 8pt var(--font-family-search);
     padding-left:  2px;
     padding-right: 12px;
     border: 0px;
@@ -122,7 +134,7 @@
 
 span.SelectionMark {
     margin-right: 4px;
-    font-family: monospace;
+    font-family: var(--font-family-monospace);
     outline-style: none;
     text-decoration: none;
 }
@@ -130,7 +142,7 @@ span.SelectionMark {
 a.SelectItem {
     display: block;
     outline-style: none;
-    color: #000000; 
+    color: var(--search-filter-foreground-color);
     text-decoration: none;
     padding-left:   6px;
     padding-right: 12px;
@@ -138,14 +150,14 @@ a.SelectItem {
 
 a.SelectItem:focus,
 a.SelectItem:active {
-    color: #000000; 
+    color: var(--search-filter-foreground-color);
     outline-style: none;
     text-decoration: none;
 }
 
 a.SelectItem:hover {
-    color: #FFFFFF;
-    background-color: #3D578C;
+    color: var(--search-filter-highlight-text-color);
+    background-color: var(--search-filter-highlight-bg-color);
     outline-style: none;
     text-decoration: none;
     cursor: pointer;
@@ -163,9 +175,12 @@ iframe#MSearchResults {
     display: none;
     position: absolute;
     left: 0; top: 0;
-    border: 1px solid #000;
-    background-color: #EEF1F7;
+    border: 1px solid var(--search-results-border-color);
+    background-color: var(--search-results-background-color);
     z-index:10000;
+    width: 300px;
+    height: 400px;
+    overflow: auto;
 }
 
 /* ----------------------------------- */
@@ -173,7 +188,6 @@ iframe#MSearchResults {
 
 #SRIndex {
     clear:both; 
-    padding-bottom: 15px;
 }
 
 .SREntry {
@@ -186,8 +200,9 @@ iframe#MSearchResults {
     padding: 1px 5px;
 }
 
-body.SRPage {
+div.SRPage {
     margin: 5px 2px;
+    background-color: var(--search-results-background-color);
 }
 
 .SRChildren {
@@ -199,17 +214,18 @@ body.SRPage {
 }
 
 .SRSymbol {
-    font-weight: bold; 
-    color: #425E97;
-    font-family: Arial, Verdana, sans-serif;
+    font-weight: bold;
+    color: var(--search-results-foreground-color);
+    font-family: var(--font-family-search);
     text-decoration: none;
     outline: none;
 }
 
 a.SRScope {
     display: block;
-    color: #425E97; 
-    font-family: Arial, Verdana, sans-serif;
+    color: var(--search-results-foreground-color);
+    font-family: var(--font-family-search);
+    font-size: 8pt;
     text-decoration: none;
     outline: none;
 }
@@ -221,14 +237,14 @@ a.SRScope:focus, a.SRScope:active {
 
 span.SRScope {
     padding-left: 4px;
-    font-family: Arial, Verdana, sans-serif;
+    font-family: var(--font-family-search);
 }
 
 .SRPage .SRStatus {
     padding: 2px 5px;
     font-size: 8pt;
     font-style: italic;
-    font-family: Arial, Verdana, sans-serif;
+    font-family: var(--font-family-search);
 }
 
 .SRResult {
@@ -242,14 +258,10 @@ div.searchresults {
 
 /*---------------- External search page results */
 
-.searchresult {
-    background-color: #F0F3F8;
-}
-
 .pages b {
    color: white;
    padding: 5px 5px 3px 5px;
-   background-image: url("../tab_a.png");
+   background-image: var(--nav-gradient-active-image-parent);
    background-repeat: repeat-x;
    text-shadow: 0 1px 1px #000000;
 }
diff --git a/docs/search/search.js b/docs/search/search.js
index 4c674e0e..9b7a52a1 100644
--- a/docs/search/search.js
+++ b/docs/search/search.js
@@ -73,6 +73,8 @@ function getYPos(item)
   return y;
 }
 
+var searchResults = new SearchResults("searchResults");
+
 /* A class handling everything associated with the search panel.
 
    Parameters:
@@ -154,7 +156,7 @@ function SearchBox(name, resultsPath, extension)
 
   this.OnSearchSelectHide = function()
   {
-    this.hideTimeout = setTimeout(this.name +".CloseSelectionWindow()",
+    this.hideTimeout = setTimeout(this.CloseSelectionWindow.bind(this),
                                   this.closeSelectionTimeout);
   }
 
@@ -187,7 +189,8 @@ function SearchBox(name, resultsPath, extension)
       }
       else
       {
-        window.frames.MSearchResults.postMessage("take_focus", "*");
+        var elem = searchResults.NavNext(0);
+        if (elem) elem.focus();
       }
     }
     else if (e.keyCode==27) // Escape out of the search field
@@ -208,7 +211,7 @@ function SearchBox(name, resultsPath, extension)
       if (searchValue != "") // non-empty search
       {
         // set timer for search update
-        this.keyTimeout = setTimeout(this.name + '.Search()',
+        this.keyTimeout = setTimeout(this.Search.bind(this),
                                      this.keyTimeoutLength);
       }
       else // empty search field
@@ -323,48 +326,70 @@ function SearchBox(name, resultsPath, extension)
       idxChar = searchValue.substr(0, 2);
     }
 
-    var resultsPage;
-    var resultsPageWithSearch;
-    var hasResultsPage;
+    var jsFile;
 
     var idx = indexSectionsWithContent[this.searchIndex].indexOf(idxChar);
     if (idx!=-1)
     {
        var hexCode=idx.toString(16);
-       resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + this.extension;
-       resultsPageWithSearch = resultsPage+'?'+escape(searchValue);
-       hasResultsPage = true;
+       jsFile = this.resultsPath + indexSectionNames[this.searchIndex] + '_' + hexCode + '.js';
     }
-    else // nothing available for this search term
-    {
-       resultsPage = this.resultsPath + '/nomatches' + this.extension;
-       resultsPageWithSearch = resultsPage;
-       hasResultsPage = false;
+
+    var loadJS = function(url, impl, loc){
+      var scriptTag = document.createElement('script');
+      scriptTag.src = url;
+      scriptTag.onload = impl;
+      scriptTag.onreadystatechange = impl;
+      loc.appendChild(scriptTag);
     }
 
-    window.frames.MSearchResults.location = resultsPageWithSearch;
     var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow();
+    var domSearchBox = this.DOMSearchBox();
+    var domPopupSearchResults = this.DOMPopupSearchResults();
+    var domSearchClose = this.DOMSearchClose();
+    var resultsPath = this.resultsPath;
+
+    var handleResults = function() {
+      document.getElementById("Loading").style.display="none";
+      if (typeof searchData !== 'undefined') {
+        createResults(resultsPath);
+        document.getElementById("NoMatches").style.display="none";
+      }
+ 
+      if (idx!=-1) {
+        searchResults.Search(searchValue);
+      } else { // no file with search results => force empty search results
+        searchResults.Search('====');
+      }
 
-    if (domPopupSearchResultsWindow.style.display!='block')
-    {
-       var domSearchBox = this.DOMSearchBox();
-       this.DOMSearchClose().style.display = 'inline-block';
-       var domPopupSearchResults = this.DOMPopupSearchResults();
-       var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth;
-       var top  = getYPos(domSearchBox) + 20;  // domSearchBox.offsetHeight + 1;
-       domPopupSearchResultsWindow.style.display = 'block';
-       left -= domPopupSearchResults.offsetWidth;
-       var maxWidth = document.body.clientWidth;
-       var width = 400;
-       if (left<10) left=10;
-       if (width+left+8>maxWidth) width=maxWidth-left-8;
-       domPopupSearchResultsWindow.style.top     = top  + 'px';
-       domPopupSearchResultsWindow.style.left    = left + 'px';
-       domPopupSearchResultsWindow.style.width   = width + 'px';
+      if (domPopupSearchResultsWindow.style.display!='block')
+      {
+        domSearchClose.style.display = 'inline-block';
+        var left = getXPos(domSearchBox) + 150;
+        var top  = getYPos(domSearchBox) + 20;
+        domPopupSearchResultsWindow.style.display = 'block';
+        left -= domPopupSearchResults.offsetWidth;
+        var maxWidth  = document.body.clientWidth;
+        var maxHeight = document.body.clientHeight;
+        var width = 300;
+        if (left<10) left=10;
+        if (width+left+8>maxWidth) width=maxWidth-left-8;
+        var height = 400;
+        if (height+top+8>maxHeight) height=maxHeight-top-8;
+        domPopupSearchResultsWindow.style.top     = top  + 'px';
+        domPopupSearchResultsWindow.style.left    = left + 'px';
+        domPopupSearchResultsWindow.style.width   = width + 'px';
+        domPopupSearchResultsWindow.style.height  = height + 'px';
+      }
+    }
+
+    if (jsFile) {
+      loadJS(jsFile, handleResults, this.DOMPopupSearchResultsWindow());
+    } else {
+      handleResults();
     }
 
     this.lastSearchValue = searchValue;
-    this.lastResultsPage = resultsPage;
   }
 
   // -------- Activation Functions
@@ -386,6 +411,7 @@ function SearchBox(name, resultsPath, extension)
       this.searchActive             = false;
       this.lastSearchValue          = ''
       this.lastResultsPage          = '';
+      this.DOMSearchField().value   = '';
     }
   }
 }
@@ -614,7 +640,7 @@ function SearchResults(name)
         }
         else // return focus to search field
         {
-           parent.document.getElementById("MSearchField").focus();
+           document.getElementById("MSearchField").focus();
         }
       }
       else if (this.lastKey==40) // Down
@@ -644,8 +670,8 @@ function SearchResults(name)
       }
       else if (this.lastKey==27) // Escape
       {
-        parent.searchBox.CloseResultsWindow();
-        parent.document.getElementById("MSearchField").focus();
+        searchBox.CloseResultsWindow();
+        document.getElementById("MSearchField").focus();
       }
       else if (this.lastKey==13) // Enter
       {
@@ -687,8 +713,8 @@ function SearchResults(name)
       }
       else if (this.lastKey==27) // Escape
       {
-        parent.searchBox.CloseResultsWindow();
-        parent.document.getElementById("MSearchField").focus();
+        searchBox.CloseResultsWindow();
+        document.getElementById("MSearchField").focus();
       }
       else if (this.lastKey==13) // Enter
       {
@@ -711,9 +737,10 @@ function setClassAttr(elem,attr)
   elem.setAttribute('className',attr);
 }
 
-function createResults()
+function createResults(resultsPath)
 {
   var results = document.getElementById("SRResults");
+  results.innerHTML = '';
   for (var e=0; e<searchData.length; e++)
   {
     var id = searchData[e][0];
@@ -730,8 +757,8 @@ function createResults()
     srEntry.appendChild(srLink);
     if (searchData[e][1].length==2) // single result
     {
-      srLink.setAttribute('href',searchData[e][1][1][0]);
-      srLink.setAttribute('onclick','parent.searchBox.CloseResultsWindow()');
+      srLink.setAttribute('href',resultsPath+searchData[e][1][1][0]);
+      srLink.setAttribute('onclick','searchBox.CloseResultsWindow()');
       if (searchData[e][1][1][1])
       {
        srLink.setAttribute('target','_parent');
@@ -756,8 +783,8 @@ function createResults()
         srChild.setAttribute('id','Item'+e+'_c'+c);
         setKeyActions(srChild,'return searchResults.NavChild(event,'+e+','+c+')');
         setClassAttr(srChild,'SRScope');
-        srChild.setAttribute('href',searchData[e][1][c+1][0]);
-        srChild.setAttribute('onclick','parent.searchBox.CloseResultsWindow()');
+        srChild.setAttribute('href',resultsPath+searchData[e][1][c+1][0]);
+        srChild.setAttribute('onclick','searchBox.CloseResultsWindow()');
         if (searchData[e][1][c+1][1])
         {
          srChild.setAttribute('target','_parent');
diff --git a/docs/search/search_l.png b/docs/search/search_l.png
deleted file mode 100644
index fd5f7daa41a4c79b4ae9bea5aa7bdfb94e14084b..0000000000000000000000000000000000000000
GIT binary patch
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diff --git a/docs/search/searchdata.js b/docs/search/searchdata.js
index 2769faa3..a0d02f7b 100644
--- a/docs/search/searchdata.js
+++ b/docs/search/searchdata.js
@@ -1,11 +1,11 @@
 var indexSectionsWithContent =
 {
-  0: "_acdefghijklmnopqrsuvxz",
+  0: "_abcdefghijklmnopqrsuvxz",
   1: "cgiks",
   2: "ir",
   3: "adfgikmqsz",
   4: "_acdefghijklmnopqrsuvxz",
-  5: "acdfghikqsxz",
+  5: "abcdfghikqsxz",
   6: "i",
   7: "i",
   8: "_dik",
diff --git a/docs/search/typedefs_0.html b/docs/search/typedefs_0.html
deleted file mode 100644
index 83d96e48..00000000
--- a/docs/search/typedefs_0.html
+++ /dev/null
@@ -1,37 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "https://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head><title></title>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta name="generator" content="Doxygen 1.9.5"/>
-<link rel="stylesheet" type="text/css" href="search.css"/>
-<script type="text/javascript" src="typedefs_0.js"></script>
-<script type="text/javascript" src="search.js"></script>
-</head>
-<body class="SRPage">
-<div id="SRIndex">
-<div class="SRStatus" id="Loading">Loading...</div>
-<div id="SRResults"></div>
-<script type="text/javascript">
-/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
-createResults();
-/* @license-end */
-</script>
-<div class="SRStatus" id="Searching">Searching...</div>
-<div class="SRStatus" id="NoMatches">No Matches</div>
-<script type="text/javascript">
-/* @license magnet:?xt=urn:btih:d3d9a9a6595521f9666a5e94cc830dab83b65699&amp;dn=expat.txt MIT */
-document.getElementById("Loading").style.display="none";
-document.getElementById("NoMatches").style.display="none";
-var searchResults = new SearchResults("searchResults");
-searchResults.Search();
-window.addEventListener("message", function(event) {
-  if (event.data == "take_focus") {
-    var elem = searchResults.NavNext(0);
-    if (elem) elem.focus();
-  }
-});
-/* @license-end */
-</script>
-</div>
-</body>
-</html>
diff --git a/docs/search/typedefs_0.js b/docs/search/typedefs_0.js
index be4fc8b6..0d4aa3ff 100644
--- a/docs/search/typedefs_0.js
+++ b/docs/search/typedefs_0.js
@@ -1,15 +1,16 @@
 var searchData=
 [
   ['aes_5fcfb_5ft_0',['aes_cfb_t',['../intel-ipsec-mb_8h.html#aeb837fda81cdf56ffcfa4e68b5877a35',1,'intel-ipsec-mb.h']]],
-  ['aes_5fgcm_5fenc_5fdec_5ffinalize_5ft_1',['aes_gcm_enc_dec_finalize_t',['../intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5',1,'intel-ipsec-mb.h']]],
-  ['aes_5fgcm_5fenc_5fdec_5fiv_5ft_2',['aes_gcm_enc_dec_iv_t',['../intel-ipsec-mb_8h.html#ac5bfb31d18fdc55451cd325c4af032c7',1,'intel-ipsec-mb.h']]],
-  ['aes_5fgcm_5fenc_5fdec_5ft_3',['aes_gcm_enc_dec_t',['../intel-ipsec-mb_8h.html#a71fb9f25bcab533a98f3d1c5cc2c7f48',1,'intel-ipsec-mb.h']]],
-  ['aes_5fgcm_5fenc_5fdec_5fupdate_5ft_4',['aes_gcm_enc_dec_update_t',['../intel-ipsec-mb_8h.html#af701adcd98fd95084d76e0cb0f926fef',1,'intel-ipsec-mb.h']]],
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-  ['aes_5fgcm_5finit_5fvar_5fiv_5ft_6',['aes_gcm_init_var_iv_t',['../intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d',1,'intel-ipsec-mb.h']]],
-  ['aes_5fgcm_5fpre_5ft_7',['aes_gcm_pre_t',['../intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af',1,'intel-ipsec-mb.h']]],
-  ['aes_5fgcm_5fprecomp_5ft_8',['aes_gcm_precomp_t',['../intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c',1,'intel-ipsec-mb.h']]],
-  ['aes_5fgmac_5ffinalize_5ft_9',['aes_gmac_finalize_t',['../intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7',1,'intel-ipsec-mb.h']]],
-  ['aes_5fgmac_5finit_5ft_10',['aes_gmac_init_t',['../intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0',1,'intel-ipsec-mb.h']]],
-  ['aes_5fgmac_5fupdate_5ft_11',['aes_gmac_update_t',['../intel-ipsec-mb_8h.html#aba0ac59064802c6d0a182a5164568c18',1,'intel-ipsec-mb.h']]]
+  ['aes_5fecb_5fquic_5ft_1',['aes_ecb_quic_t',['../intel-ipsec-mb_8h.html#ad907e0caa52fcb257275464179620643',1,'intel-ipsec-mb.h']]],
+  ['aes_5fgcm_5fenc_5fdec_5ffinalize_5ft_2',['aes_gcm_enc_dec_finalize_t',['../intel-ipsec-mb_8h.html#a8c85430db7a8b695a2836dcb96653bc5',1,'intel-ipsec-mb.h']]],
+  ['aes_5fgcm_5fenc_5fdec_5fiv_5ft_3',['aes_gcm_enc_dec_iv_t',['../intel-ipsec-mb_8h.html#ac5bfb31d18fdc55451cd325c4af032c7',1,'intel-ipsec-mb.h']]],
+  ['aes_5fgcm_5fenc_5fdec_5ft_4',['aes_gcm_enc_dec_t',['../intel-ipsec-mb_8h.html#a71fb9f25bcab533a98f3d1c5cc2c7f48',1,'intel-ipsec-mb.h']]],
+  ['aes_5fgcm_5fenc_5fdec_5fupdate_5ft_5',['aes_gcm_enc_dec_update_t',['../intel-ipsec-mb_8h.html#af701adcd98fd95084d76e0cb0f926fef',1,'intel-ipsec-mb.h']]],
+  ['aes_5fgcm_5finit_5ft_6',['aes_gcm_init_t',['../intel-ipsec-mb_8h.html#adeecd4bac067493d8465e8d7b6b7dd6d',1,'intel-ipsec-mb.h']]],
+  ['aes_5fgcm_5finit_5fvar_5fiv_5ft_7',['aes_gcm_init_var_iv_t',['../intel-ipsec-mb_8h.html#a65f909001359ad986640155f8756a11d',1,'intel-ipsec-mb.h']]],
+  ['aes_5fgcm_5fpre_5ft_8',['aes_gcm_pre_t',['../intel-ipsec-mb_8h.html#a11e10a3ac7a08801dc68949fb0f428af',1,'intel-ipsec-mb.h']]],
+  ['aes_5fgcm_5fprecomp_5ft_9',['aes_gcm_precomp_t',['../intel-ipsec-mb_8h.html#ab50906d68121cb8e6edf2a3493a60c5c',1,'intel-ipsec-mb.h']]],
+  ['aes_5fgmac_5ffinalize_5ft_10',['aes_gmac_finalize_t',['../intel-ipsec-mb_8h.html#af3f75897a0ec8b3f22c4e2b01f7f48b7',1,'intel-ipsec-mb.h']]],
+  ['aes_5fgmac_5finit_5ft_11',['aes_gmac_init_t',['../intel-ipsec-mb_8h.html#a31987251c968435d720e8656ae4621a0',1,'intel-ipsec-mb.h']]],
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 <a name="details" id="details"></a><h2 class="groupheader">Detailed Description</h2>
-<div class="textblock"><p >Job structure.</p>
-<p >For AES, enc_keys and dec_keys are expected to point to expanded keys structure.</p><ul>
+<div class="textblock"><p>Job structure.</p>
+<p>For AES, enc_keys and dec_keys are expected to point to expanded keys structure.</p><ul>
 <li>AES-CTR, AES-ECB and AES-CCM, only enc_keys is used</li>
 <li>DOCSIS (AES-CBC + AES-CFB), both pointers are used enc_keys has to be set always for the partial block</li>
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+<p>For DES, enc_keys and dec_keys are expected to point to DES key schedule.</p><ul>
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-<p >For 3DES, enc_keys and dec_keys are expected to point to an array of 3 pointers for the corresponding 3 key schedules.</p><ul>
+<p>For 3DES, enc_keys and dec_keys are expected to point to an array of 3 pointers for the corresponding 3 key schedules.</p><ul>
 <li>same key schedule used for enc and dec operations </li>
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-<p >Offset into input buffer to start ciphering </p>
+<p>Offset into input buffer to start ciphering </p>
 
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-<p >Length of message to cipher </p>
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span.scroll-down-arrow{position:absolute;top:0;left:50%;margin-left:-6px;width:0;height:0;overflow:hidden;border-width:6px;border-style:dashed dashed solid dashed;border-color:transparent transparent var(--nav-menu-foreground-color) transparent}.sm-dox span.scroll-down-arrow{top:8px;border-style:solid dashed dashed dashed;border-color:var(--nav-menu-foreground-color) transparent transparent transparent}.sm-dox.sm-rtl a.has-submenu{padding-right:12px;padding-left:24px}.sm-dox.sm-rtl a span.sub-arrow{right:auto;left:12px}.sm-dox.sm-rtl.sm-vertical a.has-submenu{padding:10px 20px}.sm-dox.sm-rtl.sm-vertical a span.sub-arrow{right:auto;left:8px;border-style:dashed solid dashed dashed;border-color:transparent #555 transparent transparent}.sm-dox.sm-rtl>li>ul:before{left:auto;right:30px}.sm-dox.sm-rtl>li>ul:after{left:auto;right:31px}.sm-dox.sm-rtl ul a.has-submenu{padding:10px 20px !important}.sm-dox.sm-rtl ul a span.sub-arrow{right:auto;left:8px;border-style:dashed solid dashed dashed;border-color:transparent #555 transparent transparent}.sm-dox.sm-vertical{padding:10px 0;-moz-border-radius:5px;-webkit-border-radius:5px;border-radius:5px}.sm-dox.sm-vertical a{padding:10px 20px}.sm-dox.sm-vertical a:hover,.sm-dox.sm-vertical a:focus,.sm-dox.sm-vertical a:active,.sm-dox.sm-vertical a.highlighted{background:#fff}.sm-dox.sm-vertical a.disabled{background-image:var(--nav-gradient-image)}.sm-dox.sm-vertical a span.sub-arrow{right:8px;top:50%;margin-top:-5px;border-width:5px;border-style:dashed dashed dashed solid;border-color:transparent transparent transparent #555}.sm-dox.sm-vertical>li>ul:before,.sm-dox.sm-vertical>li>ul:after{display:none}.sm-dox.sm-vertical ul a{padding:10px 20px}.sm-dox.sm-vertical ul a:hover,.sm-dox.sm-vertical ul a:focus,.sm-dox.sm-vertical ul a:active,.sm-dox.sm-vertical ul a.highlighted{background:#eee}.sm-dox.sm-vertical ul a.disabled{background:var(--nav-menu-background-color)}}
\ No newline at end of file
-- 
GitLab


From 562dbe52c289868989129e047b86a10a5e2d3d67 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 6 Jun 2023 08:58:23 +0100
Subject: [PATCH 322/332] Version bump to 1.4

---
 ReleaseNotes.txt             | 6 ++++--
 lib/api_doxygen.conf         | 2 +-
 lib/intel-ipsec-mb.h         | 2 +-
 rpm/SUSE/intel-ipsec-mb.spec | 2 +-
 rpm/intel-ipsec-mb.spec      | 5 ++++-
 5 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/ReleaseNotes.txt b/ReleaseNotes.txt
index e10ede53..d6fe961e 100644
--- a/ReleaseNotes.txt
+++ b/ReleaseNotes.txt
@@ -1,8 +1,8 @@
 ========================================================================
 Release Notes for Intel(R) Multi-Buffer Crypto for IPsec Library
 
-Unreleased
-==========
+v1.4 June 2023
+==============
 
 General
 - Experimental CMake support for Linux, FreeBSD and Windows added
@@ -16,6 +16,8 @@ Library
 - QUIC AES-GCM-128/256 AEAD API added.
 - Removed v0.53 (and older) compatibility symbol mapping (NO_COMPAT_IMB_API_053 not defined).
 
+Test Applications
+
 v1.3 September 2022
 ========================================================================
 
diff --git a/lib/api_doxygen.conf b/lib/api_doxygen.conf
index 202c99f5..e1b057ad 100644
--- a/lib/api_doxygen.conf
+++ b/lib/api_doxygen.conf
@@ -12,7 +12,7 @@ PROJECT_NAME           = "intel-ipsec-mb"
 # could be handy for archiving the generated documentation or if some version
 # control system is used.
 
-PROJECT_NUMBER         =
+PROJECT_NUMBER         = 1.4
 
 # Using the PROJECT_BRIEF tag one can provide an optional one line description
 # for a project that appears at the top of each page and should give viewer a
diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 4fea2196..7f108c93 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -91,7 +91,7 @@ typedef struct {
 /**
  * Library version
  */
-#define IMB_VERSION_STR "1.4.0-dev"
+#define IMB_VERSION_STR "1.4.0"
 #define IMB_VERSION_NUM 0x10400
 
 /**
diff --git a/rpm/SUSE/intel-ipsec-mb.spec b/rpm/SUSE/intel-ipsec-mb.spec
index e1c7d673..576b6f89 100644
--- a/rpm/SUSE/intel-ipsec-mb.spec
+++ b/rpm/SUSE/intel-ipsec-mb.spec
@@ -18,7 +18,7 @@
 
 # Versions numbers
 %global major        1
-%global minor        3
+%global minor        4
 %global patch        0
 
 # GitHub properties
diff --git a/rpm/intel-ipsec-mb.spec b/rpm/intel-ipsec-mb.spec
index 1ba73250..6dda5280 100644
--- a/rpm/intel-ipsec-mb.spec
+++ b/rpm/intel-ipsec-mb.spec
@@ -25,7 +25,7 @@
 
 # Versions numbers
 %global major        1
-%global minor        3
+%global minor        4
 %global patch        0
 %global fullversion  %{major}.%{minor}.%{patch}
 
@@ -109,6 +109,9 @@ ln -s libIPSec_MB.so.%{fullversion} libIPSec_MB.so
 %{_libdir}/libIPSec_MB.so
 
 %changelog
+* Tue Jun 06 2023 Pablo de Lara Guarch <pablo.de.lara.guarch@intel.com> 1.4.0-1
+- Update for release package v1.4
+
 * Tue Sep 20 2022 Stephen Mcintyre <stephen.mcintyre@intel.com> 1.3.0-1
 - Update for release package v1.3
 
-- 
GitLab


From 60968ff6949faf63300fa9f7a38785f3c29677f7 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 6 Jun 2023 11:55:03 +0100
Subject: [PATCH 323/332] doc: [README] update list of ACVP tested algorithms

---
 README.md | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/README.md b/README.md
index 054ceb41..63026fc2 100644
--- a/README.md
+++ b/README.md
@@ -748,6 +748,8 @@ ACVP test application located in `test` directory is to support CAVP process. It
 - AES-GMAC  
 - AES-CCM  
 - AES-CBC  
+- AES-EBC  
+- TDES-EDE-CBC  
 - AES-CTR  
 - AES-CMAC  
 - SHA1 (SHA-1)  
-- 
GitLab


From 88400261c1c5c614bc4aa5eb59c7a6b54ed6c869 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 6 Jun 2023 12:00:48 +0100
Subject: [PATCH 324/332] Update copyright headers

---
 CMakeLists.txt                                                  | 2 +-
 LICENSE                                                         | 2 +-
 Makefile                                                        | 2 +-
 lib/CMakeLists.txt                                              | 2 +-
 lib/Makefile                                                    | 2 +-
 lib/avx2_t1/aes128_gcm_by8_avx2.asm                             | 2 +-
 lib/avx2_t1/aes192_gcm_by8_avx2.asm                             | 2 +-
 lib/avx2_t1/aes256_gcm_by8_avx2.asm                             | 2 +-
 lib/avx2_t1/chacha20_avx2.asm                                   | 2 +-
 lib/avx2_t1/mb_mgr_avx2.c                                       | 2 +-
 lib/avx2_t1/mb_mgr_avx2_t1.c                                    | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm                      | 2 +-
 lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm                     | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm                     | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm                    | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha224_flush_avx2.asm                   | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha224_submit_avx2.asm                  | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm                   | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm                  | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha384_flush_avx2.asm                   | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha384_submit_avx2.asm                  | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm                   | 2 +-
 lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm                  | 2 +-
 lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm                    | 2 +-
 lib/avx2_t1/md5_x8x2_avx2.asm                                   | 2 +-
 lib/avx2_t1/sha1_x8_avx2.asm                                    | 2 +-
 lib/avx2_t1/sha256_oct_avx2.asm                                 | 2 +-
 lib/avx2_t1/sha512_x4_avx2.asm                                  | 2 +-
 lib/avx2_t1/sha_mb_avx2.c                                       | 2 +-
 lib/avx2_t1/snow3g_avx2.c                                       | 2 +-
 lib/avx2_t1/zuc_top_avx2.c                                      | 2 +-
 lib/avx2_t1/zuc_x8_avx2.asm                                     | 2 +-
 lib/avx2_t2/aes128_ecb_vaes_avx2.asm                            | 2 +-
 lib/avx2_t2/aes192_ecb_vaes_avx2.asm                            | 2 +-
 lib/avx2_t2/aes256_ecb_vaes_avx2.asm                            | 2 +-
 lib/avx2_t2/mb_mgr_avx2_t2.c                                    | 2 +-
 lib/avx2_t2/mb_mgr_zuc_submit_flush_gfni_avx2.asm               | 2 +-
 lib/avx2_t2/zuc_x8_gfni_avx2.asm                                | 2 +-
 lib/avx512_t1/aes128_gcm_by8_avx512.asm                         | 2 +-
 lib/avx512_t1/aes192_gcm_by8_avx512.asm                         | 2 +-
 lib/avx512_t1/aes256_gcm_by8_avx512.asm                         | 2 +-
 lib/avx512_t1/chacha20_avx512.asm                               | 2 +-
 lib/avx512_t1/des_x16_avx512.asm                                | 2 +-
 lib/avx512_t1/mb_mgr_avx512.c                                   | 2 +-
 lib/avx512_t1/mb_mgr_avx512_t1.c                                | 2 +-
 lib/avx512_t1/mb_mgr_des_avx512.asm                             | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm                 | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm                | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha224_flush_avx512.asm               | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha224_submit_avx512.asm              | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm               | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm              | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha384_flush_avx512.asm               | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha384_submit_avx512.asm              | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm               | 2 +-
 lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm              | 2 +-
 lib/avx512_t1/poly_avx512.asm                                   | 2 +-
 lib/avx512_t1/sha1_x16_avx512.asm                               | 2 +-
 lib/avx512_t1/sha256_x16_avx512.asm                             | 2 +-
 lib/avx512_t1/sha512_x8_avx512.asm                              | 2 +-
 lib/avx512_t1/sha_mb_avx512.c                                   | 2 +-
 lib/avx512_t1/snow3g_avx512.c                                   | 2 +-
 lib/avx512_t1/zuc_top_avx512.c                                  | 2 +-
 lib/avx512_t1/zuc_x16_avx512.asm                                | 2 +-
 lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm                    | 2 +-
 lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm                   | 2 +-
 lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm                    | 2 +-
 lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm                   | 2 +-
 lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm                    | 2 +-
 lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm                | 2 +-
 lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm                   | 2 +-
 lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm                  | 2 +-
 lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm                       | 2 +-
 lib/avx512_t2/aes_cbcs_dec_by16_vaes_avx512.asm                 | 2 +-
 lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm                      | 2 +-
 lib/avx512_t2/aes_cntr_api_by16_vaes_avx512.asm                 | 2 +-
 lib/avx512_t2/aes_cntr_bit_api_by16_vaes_avx512.asm             | 2 +-
 lib/avx512_t2/aes_cntr_ccm_api_by16_vaes_avx512.asm             | 2 +-
 lib/avx512_t2/aes_cntr_pon_api_by16_vaes_avx512.asm             | 2 +-
 lib/avx512_t2/aes_docsis_dec_avx512.asm                         | 2 +-
 lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm                    | 2 +-
 lib/avx512_t2/aes_docsis_enc_avx512.asm                         | 2 +-
 lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm                    | 2 +-
 lib/avx512_t2/aes_ecb_vaes_avx512.asm                           | 2 +-
 lib/avx512_t2/crc16_x25_avx512.asm                              | 2 +-
 lib/avx512_t2/crc32_by16_vclmul_avx512.asm                      | 2 +-
 lib/avx512_t2/crc32_fp_avx512.asm                               | 2 +-
 lib/avx512_t2/crc32_iuup_avx512.asm                             | 2 +-
 lib/avx512_t2/crc32_lte_avx512.asm                              | 2 +-
 lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm                 | 2 +-
 lib/avx512_t2/crc32_sctp_avx512.asm                             | 2 +-
 lib/avx512_t2/crc32_wimax_avx512.asm                            | 2 +-
 lib/avx512_t2/ethernet_fcs_avx512.asm                           | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm            | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm           | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbcs_1_9_flush_avx512.asm           | 2 +-
 lib/avx512_t2/mb_mgr_aes128_cbcs_1_9_submit_avx512.asm          | 2 +-
 .../mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm         | 2 +-
 .../mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm         | 2 +-
 lib/avx512_t2/mb_mgr_aes192_cbc_enc_flush_avx512.asm            | 2 +-
 lib/avx512_t2/mb_mgr_aes192_cbc_enc_submit_avx512.asm           | 2 +-
 lib/avx512_t2/mb_mgr_aes256_cbc_enc_flush_avx512.asm            | 2 +-
 lib/avx512_t2/mb_mgr_aes256_cbc_enc_submit_avx512.asm           | 2 +-
 .../mb_mgr_aes256_ccm_auth_submit_flush_x16_vaes_avx512.asm     | 2 +-
 .../mb_mgr_aes256_cmac_submit_flush_x16_vaes_avx512.asm         | 2 +-
 lib/avx512_t2/mb_mgr_avx512_t2.c                                | 2 +-
 lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm   | 2 +-
 lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm   | 2 +-
 lib/avx512_t2/mb_mgr_zuc_submit_flush_gfni_avx512.asm           | 2 +-
 lib/avx512_t2/poly_fma_avx512.asm                               | 2 +-
 lib/avx512_t2/pon_vaes_avx512.asm                               | 2 +-
 lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm                  | 2 +-
 lib/avx512_t2/zuc_x16_vaes_avx512.asm                           | 2 +-
 lib/avx_t1/aes128_cbc_dec_by8_avx.asm                           | 2 +-
 lib/avx_t1/aes128_cbc_enc_x8_avx.asm                            | 2 +-
 lib/avx_t1/aes128_cbc_mac_x8_avx.asm                            | 2 +-
 lib/avx_t1/aes128_cbcs_1_9_dec_by8_avx.asm                      | 2 +-
 lib/avx_t1/aes128_cbcs_1_9_enc_x8_avx.asm                       | 2 +-
 lib/avx_t1/aes128_cntr_by8_avx.asm                              | 2 +-
 lib/avx_t1/aes128_cntr_ccm_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes128_ecb_by8_avx.asm                               | 2 +-
 lib/avx_t1/aes128_xcbc_mac_x8_avx.asm                           | 2 +-
 lib/avx_t1/aes192_cbc_dec_by8_avx.asm                           | 2 +-
 lib/avx_t1/aes192_cbc_enc_x8_avx.asm                            | 2 +-
 lib/avx_t1/aes192_cntr_by8_avx.asm                              | 2 +-
 lib/avx_t1/aes192_ecb_by8_avx.asm                               | 2 +-
 lib/avx_t1/aes256_cbc_dec_by8_avx.asm                           | 2 +-
 lib/avx_t1/aes256_cbc_enc_x8_avx.asm                            | 2 +-
 lib/avx_t1/aes256_cbc_mac_x8_avx.asm                            | 2 +-
 lib/avx_t1/aes256_cntr_by8_avx.asm                              | 2 +-
 lib/avx_t1/aes256_cntr_ccm_by8_avx.asm                          | 2 +-
 lib/avx_t1/aes256_ecb_by8_avx.asm                               | 2 +-
 lib/avx_t1/aes_cfb_avx.asm                                      | 2 +-
 lib/avx_t1/chacha20_avx.asm                                     | 2 +-
 lib/avx_t1/crc16_x25_avx.asm                                    | 2 +-
 lib/avx_t1/crc32_by8_avx.asm                                    | 2 +-
 lib/avx_t1/crc32_fp_avx.asm                                     | 2 +-
 lib/avx_t1/crc32_iuup_avx.asm                                   | 2 +-
 lib/avx_t1/crc32_lte_avx.asm                                    | 2 +-
 lib/avx_t1/crc32_refl_by8_avx.asm                               | 2 +-
 lib/avx_t1/crc32_sctp_avx.asm                                   | 2 +-
 lib/avx_t1/crc32_wimax_avx.asm                                  | 2 +-
 lib/avx_t1/ethernet_fcs_avx.asm                                 | 2 +-
 lib/avx_t1/kasumi_avx.c                                         | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm                  | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm                | 2 +-
 lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm       | 2 +-
 lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm           | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm                  | 2 +-
 lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_aes192_cbc_enc_flush_avx.asm                  | 2 +-
 lib/avx_t1/mb_mgr_aes192_cbc_enc_submit_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_aes256_cbc_enc_flush_avx.asm                  | 2 +-
 lib/avx_t1/mb_mgr_aes256_cbc_enc_submit_avx.asm                 | 2 +-
 lib/avx_t1/mb_mgr_aes256_ccm_auth_submit_flush_x8_avx.asm       | 2 +-
 lib/avx_t1/mb_mgr_aes256_cmac_submit_flush_x8_avx.asm           | 2 +-
 lib/avx_t1/mb_mgr_avx.c                                         | 2 +-
 lib/avx_t1/mb_mgr_avx_t1.c                                      | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm                        | 2 +-
 lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm                       | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm                       | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm                      | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha224_flush_avx.asm                     | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha224_submit_avx.asm                    | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm                     | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm                    | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha384_flush_avx.asm                     | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha384_submit_avx.asm                    | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm                     | 2 +-
 lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm                    | 2 +-
 lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm                      | 2 +-
 lib/avx_t1/md5_x4x2_avx.asm                                     | 2 +-
 lib/avx_t1/memcpy_avx.asm                                       | 2 +-
 lib/avx_t1/pon_by8_avx.asm                                      | 2 +-
 lib/avx_t1/sha1_one_block_avx.asm                               | 2 +-
 lib/avx_t1/sha1_x4_avx.asm                                      | 2 +-
 lib/avx_t1/sha224_one_block_avx.asm                             | 2 +-
 lib/avx_t1/sha256_mult_avx.asm                                  | 2 +-
 lib/avx_t1/sha256_one_block_avx.asm                             | 2 +-
 lib/avx_t1/sha384_one_block_avx.asm                             | 2 +-
 lib/avx_t1/sha512_one_block_avx.asm                             | 2 +-
 lib/avx_t1/sha512_x2_avx.asm                                    | 2 +-
 lib/avx_t1/sha_avx.c                                            | 2 +-
 lib/avx_t1/sha_mb_avx.c                                         | 2 +-
 lib/avx_t1/snow3g_avx.c                                         | 2 +-
 lib/avx_t1/snow3g_uia2_by4_avx.asm                              | 2 +-
 lib/avx_t1/zuc_top_avx.c                                        | 2 +-
 lib/avx_t1/zuc_x4_avx.asm                                       | 2 +-
 lib/avx_t2/mb_mgr_avx_t2.c                                      | 2 +-
 lib/include/aes_cntr_by16_vaes_avx512.inc                       | 2 +-
 lib/include/aes_common.inc                                      | 2 +-
 lib/include/aesni_emu.h                                         | 2 +-
 lib/include/aesni_emu.inc                                       | 2 +-
 lib/include/arch_avx2_type1.h                                   | 2 +-
 lib/include/arch_avx2_type2.h                                   | 2 +-
 lib/include/arch_avx512_type1.h                                 | 2 +-
 lib/include/arch_avx512_type2.h                                 | 2 +-
 lib/include/arch_avx_type1.h                                    | 2 +-
 lib/include/arch_noaesni.h                                      | 2 +-
 lib/include/arch_sse_type1.h                                    | 2 +-
 lib/include/arch_sse_type2.h                                    | 2 +-
 lib/include/arch_sse_type3.h                                    | 2 +-
 lib/include/arch_x86_64.h                                       | 2 +-
 lib/include/cet.inc                                             | 2 +-
 lib/include/chacha20_poly1305.h                                 | 2 +-
 lib/include/chacha_poly_defines.inc                             | 2 +-
 lib/include/clear_regs.inc                                      | 2 +-
 lib/include/clear_regs_mem.h                                    | 2 +-
 lib/include/const.inc                                           | 2 +-
 lib/include/constant_lookup.h                                   | 2 +-
 lib/include/constant_lookup.inc                                 | 2 +-
 lib/include/constants.h                                         | 2 +-
 lib/include/constants.inc                                       | 2 +-
 lib/include/cpu_feature.h                                       | 2 +-
 lib/include/crc32.inc                                           | 2 +-
 lib/include/crc32_const.inc                                     | 2 +-
 lib/include/crc32_refl.inc                                      | 2 +-
 lib/include/crc32_refl_const.inc                                | 2 +-
 lib/include/datastruct.inc                                      | 2 +-
 lib/include/dbgprint.inc                                        | 2 +-
 lib/include/des.h                                               | 2 +-
 lib/include/des_utils.h                                         | 2 +-
 lib/include/docsis_common.h                                     | 2 +-
 lib/include/error.h                                             | 2 +-
 lib/include/error.inc                                           | 2 +-
 lib/include/gcm.h                                               | 2 +-
 lib/include/gcm_api_sse.inc                                     | 2 +-
 lib/include/gcm_api_vaes_avx512.inc                             | 2 +-
 lib/include/gcm_common.inc                                      | 2 +-
 lib/include/gcm_defines.inc                                     | 2 +-
 lib/include/gcm_gmac_api_sse.inc                                | 2 +-
 lib/include/gcm_gmac_api_vaes_avx512.inc                        | 2 +-
 lib/include/gcm_keys_avx2_avx512.inc                            | 2 +-
 lib/include/gcm_keys_sse_avx.inc                                | 2 +-
 lib/include/gcm_keys_vaes_avx512.inc                            | 2 +-
 lib/include/gcm_sgl_api_sse.inc                                 | 2 +-
 lib/include/gcm_sgl_api_vaes_avx512.inc                         | 2 +-
 lib/include/gcm_vaes_avx512.inc                                 | 2 +-
 lib/include/imb_job.inc                                         | 2 +-
 lib/include/ipsec_ooo_mgr.h                                     | 2 +-
 lib/include/job_api_docsis.h                                    | 2 +-
 lib/include/job_api_gcm.h                                       | 2 +-
 lib/include/job_api_kasumi.h                                    | 2 +-
 lib/include/job_api_snowv.h                                     | 2 +-
 lib/include/kasumi_interface.h                                  | 2 +-
 lib/include/kasumi_internal.h                                   | 2 +-
 lib/include/mb_mgr_burst.h                                      | 2 +-
 lib/include/mb_mgr_burst_async.h                                | 2 +-
 lib/include/mb_mgr_code.h                                       | 2 +-
 lib/include/mb_mgr_datastruct.inc                               | 2 +-
 lib/include/mb_mgr_job_api.h                                    | 2 +-
 lib/include/mb_mgr_job_check.h                                  | 2 +-
 lib/include/memcpy.h                                            | 2 +-
 lib/include/memcpy.inc                                          | 2 +-
 lib/include/noaesni.h                                           | 2 +-
 lib/include/ooo_mgr_reset.h                                     | 2 +-
 lib/include/os.inc                                              | 2 +-
 lib/include/reg_sizes.inc                                       | 2 +-
 lib/include/save_xmms.h                                         | 2 +-
 lib/include/sha_generic.h                                       | 2 +-
 lib/include/sha_mb_mgr.h                                        | 2 +-
 lib/include/snow3g.h                                            | 2 +-
 lib/include/snow3g_common.h                                     | 2 +-
 lib/include/snow3g_submit.h                                     | 2 +-
 lib/include/snow3g_tables.h                                     | 2 +-
 lib/include/snow3g_uea2_by16_vaes_avx512.inc                    | 2 +-
 lib/include/snow3g_uea2_by4_sse.inc                             | 2 +-
 lib/include/transpose_avx2.inc                                  | 2 +-
 lib/include/transpose_avx512.inc                                | 2 +-
 lib/include/transpose_sse.inc                                   | 2 +-
 lib/include/wireless_common.h                                   | 2 +-
 lib/include/zuc_internal.h                                      | 2 +-
 lib/include/zuc_sbox.inc                                        | 2 +-
 lib/libipsec-mb.7                                               | 2 +-
 lib/no-aesni/aes128_cbc_dec_by4_sse_no_aesni.asm                | 2 +-
 lib/no-aesni/aes128_cbc_enc_x4_sse_no_aesni.asm                 | 2 +-
 lib/no-aesni/aes128_cbc_mac_x4_sse_no_aesni.asm                 | 2 +-
 lib/no-aesni/aes128_cbcs_1_9_dec_by4_sse_no_aesni.asm           | 2 +-
 lib/no-aesni/aes128_cbcs_1_9_enc_x4_sse_no_aesni.asm            | 2 +-
 lib/no-aesni/aes128_cntr_by8_sse_no_aesni.asm                   | 2 +-
 lib/no-aesni/aes128_cntr_ccm_by8_sse_no_aesni.asm               | 2 +-
 lib/no-aesni/aes128_xcbc_mac_x4_sse_no_aesni.asm                | 2 +-
 lib/no-aesni/aes192_cbc_dec_by4_sse_no_aesni.asm                | 2 +-
 lib/no-aesni/aes192_cbc_enc_x4_sse_no_aesni.asm                 | 2 +-
 lib/no-aesni/aes192_cntr_by8_sse_no_aesni.asm                   | 2 +-
 lib/no-aesni/aes256_cbc_dec_by4_sse_no_aesni.asm                | 2 +-
 lib/no-aesni/aes256_cbc_enc_x4_sse_no_aesni.asm                 | 2 +-
 lib/no-aesni/aes256_cbc_mac_x4_sse_no_aesni.asm                 | 2 +-
 lib/no-aesni/aes256_cntr_by8_sse_no_aesni.asm                   | 2 +-
 lib/no-aesni/aes256_cntr_ccm_by8_sse_no_aesni.asm               | 2 +-
 lib/no-aesni/aes_cfb_sse_no_aesni.asm                           | 2 +-
 lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm                       | 2 +-
 lib/no-aesni/aesni_emu.c                                        | 2 +-
 lib/no-aesni/crc16_x25_sse_no_aesni.asm                         | 2 +-
 lib/no-aesni/crc32_by8_sse_no_aesni.asm                         | 2 +-
 lib/no-aesni/crc32_fp_sse_no_aesni.asm                          | 2 +-
 lib/no-aesni/crc32_iuup_sse_no_aesni.asm                        | 2 +-
 lib/no-aesni/crc32_lte_sse_no_aesni.asm                         | 2 +-
 lib/no-aesni/crc32_refl_by8_sse_no_aesni.asm                    | 2 +-
 lib/no-aesni/crc32_sctp_sse_no_aesni.asm                        | 2 +-
 lib/no-aesni/crc32_wimax_sse_no_aesni.asm                       | 2 +-
 lib/no-aesni/ethernet_fcs_sse_no_aesni.asm                      | 2 +-
 lib/no-aesni/gcm128_api_sse_no_aesni.asm                        | 2 +-
 lib/no-aesni/gcm128_gmac_api_sse_no_aesni.asm                   | 2 +-
 lib/no-aesni/gcm128_sgl_api_sse_no_aesni.asm                    | 2 +-
 lib/no-aesni/gcm192_api_sse_no_aesni.asm                        | 2 +-
 lib/no-aesni/gcm192_gmac_api_sse_no_aesni.asm                   | 2 +-
 lib/no-aesni/gcm192_sgl_api_sse_no_aesni.asm                    | 2 +-
 lib/no-aesni/gcm256_api_sse_no_aesni.asm                        | 2 +-
 lib/no-aesni/gcm256_gmac_api_sse_no_aesni.asm                   | 2 +-
 lib/no-aesni/gcm256_sgl_api_sse_no_aesni.asm                    | 2 +-
 lib/no-aesni/mb_mgr_aes128_cbc_enc_flush_sse_no_aesni.asm       | 2 +-
 lib/no-aesni/mb_mgr_aes128_cbc_enc_submit_sse_no_aesni.asm      | 2 +-
 lib/no-aesni/mb_mgr_aes128_cbcs_1_9_flush_sse_no_aesni.asm      | 2 +-
 lib/no-aesni/mb_mgr_aes128_cbcs_1_9_submit_sse_no_aesni.asm     | 2 +-
 .../mb_mgr_aes128_ccm_auth_submit_flush_sse_no_aesni.asm        | 2 +-
 lib/no-aesni/mb_mgr_aes128_cmac_submit_flush_sse_no_aesni.asm   | 2 +-
 lib/no-aesni/mb_mgr_aes128_xcbc_flush_sse_no_aesni.asm          | 2 +-
 lib/no-aesni/mb_mgr_aes128_xcbc_submit_sse_no_aesni.asm         | 2 +-
 lib/no-aesni/mb_mgr_aes192_cbc_enc_flush_sse_no_aesni.asm       | 2 +-
 lib/no-aesni/mb_mgr_aes192_cbc_enc_submit_sse_no_aesni.asm      | 2 +-
 lib/no-aesni/mb_mgr_aes256_cbc_enc_flush_sse_no_aesni.asm       | 2 +-
 lib/no-aesni/mb_mgr_aes256_cbc_enc_submit_sse_no_aesni.asm      | 2 +-
 .../mb_mgr_aes256_ccm_auth_submit_flush_sse_no_aesni.asm        | 2 +-
 lib/no-aesni/mb_mgr_aes256_cmac_submit_flush_sse_no_aesni.asm   | 2 +-
 lib/no-aesni/mb_mgr_sse_no_aesni.c                              | 2 +-
 lib/no-aesni/mb_mgr_zuc_submit_flush_sse_no_aesni.asm           | 2 +-
 lib/no-aesni/pon_sse_no_aesni.asm                               | 2 +-
 lib/no-aesni/snow3g_sse_no_aesni.c                              | 2 +-
 lib/no-aesni/snow3g_uia2_sse_no_aesni.asm                       | 2 +-
 lib/no-aesni/snow_v_sse_no_aesni.asm                            | 2 +-
 lib/no-aesni/zuc_sse_no_aesni.asm                               | 2 +-
 lib/no-aesni/zuc_top_sse_no_aesni.c                             | 2 +-
 lib/sse_t1/aes128_cbc_dec_by4_sse.asm                           | 2 +-
 lib/sse_t1/aes128_cbc_enc_x4_sse.asm                            | 2 +-
 lib/sse_t1/aes128_cbc_mac_x4_sse.asm                            | 2 +-
 lib/sse_t1/aes128_cbcs_1_9_dec_by4_sse.asm                      | 2 +-
 lib/sse_t1/aes128_cbcs_1_9_enc_x4_sse.asm                       | 2 +-
 lib/sse_t1/aes128_cntr_by8_sse.asm                              | 2 +-
 lib/sse_t1/aes128_cntr_ccm_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes128_ecb_by4_sse.asm                               | 2 +-
 lib/sse_t1/aes128_xcbc_mac_x4_sse.asm                           | 2 +-
 lib/sse_t1/aes192_cbc_dec_by4_sse.asm                           | 2 +-
 lib/sse_t1/aes192_cbc_enc_x4_sse.asm                            | 2 +-
 lib/sse_t1/aes192_cntr_by8_sse.asm                              | 2 +-
 lib/sse_t1/aes192_ecb_by4_sse.asm                               | 2 +-
 lib/sse_t1/aes256_cbc_dec_by4_sse.asm                           | 2 +-
 lib/sse_t1/aes256_cbc_enc_x4_sse.asm                            | 2 +-
 lib/sse_t1/aes256_cbc_mac_x4_sse.asm                            | 2 +-
 lib/sse_t1/aes256_cntr_by8_sse.asm                              | 2 +-
 lib/sse_t1/aes256_cntr_ccm_by8_sse.asm                          | 2 +-
 lib/sse_t1/aes256_ecb_by4_sse.asm                               | 2 +-
 lib/sse_t1/aes_cfb_sse.asm                                      | 2 +-
 lib/sse_t1/chacha20_sse.asm                                     | 2 +-
 lib/sse_t1/crc16_x25_sse.asm                                    | 2 +-
 lib/sse_t1/crc32_by8_sse.asm                                    | 2 +-
 lib/sse_t1/crc32_fp_sse.asm                                     | 2 +-
 lib/sse_t1/crc32_iuup_sse.asm                                   | 2 +-
 lib/sse_t1/crc32_lte_sse.asm                                    | 2 +-
 lib/sse_t1/crc32_refl_by8_sse.asm                               | 2 +-
 lib/sse_t1/crc32_sctp_sse.asm                                   | 2 +-
 lib/sse_t1/crc32_wimax_sse.asm                                  | 2 +-
 lib/sse_t1/ethernet_fcs_sse.asm                                 | 2 +-
 lib/sse_t1/gcm128_api_by8_sse.asm                               | 2 +-
 lib/sse_t1/gcm128_gmac_api_by8_sse.asm                          | 2 +-
 lib/sse_t1/gcm128_sgl_api_by8_sse.asm                           | 2 +-
 lib/sse_t1/gcm192_api_by8_sse.asm                               | 2 +-
 lib/sse_t1/gcm192_gmac_api_by8_sse.asm                          | 2 +-
 lib/sse_t1/gcm192_sgl_api_by8_sse.asm                           | 2 +-
 lib/sse_t1/gcm256_api_by8_sse.asm                               | 2 +-
 lib/sse_t1/gcm256_gmac_api_by8_sse.asm                          | 2 +-
 lib/sse_t1/gcm256_sgl_api_by8_sse.asm                           | 2 +-
 lib/sse_t1/kasumi_sse.c                                         | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm               | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm              | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm                | 2 +-
 lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm                  | 2 +-
 lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm                 | 2 +-
 lib/sse_t1/mb_mgr_aes192_cbc_enc_flush_x4_sse.asm               | 2 +-
 lib/sse_t1/mb_mgr_aes192_cbc_enc_submit_x4_sse.asm              | 2 +-
 lib/sse_t1/mb_mgr_aes256_cbc_enc_flush_x4_sse.asm               | 2 +-
 lib/sse_t1/mb_mgr_aes256_cbc_enc_submit_x4_sse.asm              | 2 +-
 lib/sse_t1/mb_mgr_aes256_ccm_auth_submit_flush_x4_sse.asm       | 2 +-
 lib/sse_t1/mb_mgr_aes256_cmac_submit_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm                        | 2 +-
 lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm                       | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm                       | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm                      | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha224_flush_sse.asm                     | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha224_submit_sse.asm                    | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm                     | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm                    | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha384_flush_sse.asm                     | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha384_submit_sse.asm                    | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm                     | 2 +-
 lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm                    | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm           | 2 +-
 lib/sse_t1/mb_mgr_sse.c                                         | 2 +-
 lib/sse_t1/mb_mgr_sse_t1.c                                      | 2 +-
 lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm                      | 2 +-
 lib/sse_t1/md5_x4x2_sse.asm                                     | 2 +-
 lib/sse_t1/memcpy_sse.asm                                       | 2 +-
 lib/sse_t1/pon_by8_sse.asm                                      | 2 +-
 lib/sse_t1/sha1_one_block_sse.asm                               | 2 +-
 lib/sse_t1/sha1_x4_sse.asm                                      | 2 +-
 lib/sse_t1/sha224_one_block_sse.asm                             | 2 +-
 lib/sse_t1/sha256_mult_sse.asm                                  | 2 +-
 lib/sse_t1/sha256_one_block_sse.asm                             | 2 +-
 lib/sse_t1/sha384_one_block_sse.asm                             | 2 +-
 lib/sse_t1/sha512_one_block_sse.asm                             | 2 +-
 lib/sse_t1/sha512_x2_sse.asm                                    | 2 +-
 lib/sse_t1/sha_mb_sse.c                                         | 2 +-
 lib/sse_t1/sha_sse.c                                            | 2 +-
 lib/sse_t1/snow3g_sse.c                                         | 2 +-
 lib/sse_t1/snow3g_uia2_by4_sse.asm                              | 2 +-
 lib/sse_t1/zuc_top_sse.c                                        | 2 +-
 lib/sse_t1/zuc_x4_sse.asm                                       | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm                    | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm                   | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha224_flush_ni_sse.asm                  | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha224_submit_ni_sse.asm                 | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm                  | 2 +-
 lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm                 | 2 +-
 lib/sse_t2/mb_mgr_sse_t2.c                                      | 2 +-
 lib/sse_t2/sha1_ni_x1_sse.asm                                   | 2 +-
 lib/sse_t2/sha1_ni_x2_sse.asm                                   | 2 +-
 lib/sse_t2/sha256_ni_x1_sse.asm                                 | 2 +-
 lib/sse_t2/sha256_ni_x2_sse.asm                                 | 2 +-
 lib/sse_t2/sha_ni_mb_sse.c                                      | 2 +-
 lib/sse_t3/aes128_cbc_dec_by8_sse.asm                           | 2 +-
 lib/sse_t3/aes128_cbc_enc_x8_sse.asm                            | 2 +-
 lib/sse_t3/aes128_cbc_mac_x8_sse.asm                            | 2 +-
 lib/sse_t3/aes128_ecb_by8_sse.asm                               | 2 +-
 lib/sse_t3/aes192_cbc_dec_by8_sse.asm                           | 2 +-
 lib/sse_t3/aes192_cbc_enc_x8_sse.asm                            | 2 +-
 lib/sse_t3/aes192_ecb_by8_sse.asm                               | 2 +-
 lib/sse_t3/aes256_cbc_dec_by8_sse.asm                           | 2 +-
 lib/sse_t3/aes256_cbc_enc_x8_sse.asm                            | 2 +-
 lib/sse_t3/aes256_cbc_mac_x8_sse.asm                            | 2 +-
 lib/sse_t3/aes256_ecb_by8_sse.asm                               | 2 +-
 lib/sse_t3/mb_mgr_aes128_cbc_enc_flush_x8_sse.asm               | 2 +-
 lib/sse_t3/mb_mgr_aes128_cbc_enc_submit_x8_sse.asm              | 2 +-
 lib/sse_t3/mb_mgr_aes128_ccm_auth_submit_flush_x8_sse.asm       | 2 +-
 lib/sse_t3/mb_mgr_aes128_cmac_submit_flush_x8_sse.asm           | 2 +-
 lib/sse_t3/mb_mgr_aes192_cbc_enc_flush_x8_sse.asm               | 2 +-
 lib/sse_t3/mb_mgr_aes192_cbc_enc_submit_x8_sse.asm              | 2 +-
 lib/sse_t3/mb_mgr_aes256_cbc_enc_flush_x8_sse.asm               | 2 +-
 lib/sse_t3/mb_mgr_aes256_cbc_enc_submit_x8_sse.asm              | 2 +-
 lib/sse_t3/mb_mgr_aes256_ccm_auth_submit_flush_x8_sse.asm       | 2 +-
 lib/sse_t3/mb_mgr_aes256_cmac_submit_flush_x8_sse.asm           | 2 +-
 lib/sse_t3/mb_mgr_sse_t3.c                                      | 2 +-
 lib/sse_t3/mb_mgr_zuc_submit_flush_gfni_sse.asm                 | 2 +-
 lib/sse_t3/zuc_x4_gfni_sse.asm                                  | 2 +-
 lib/win_x64.mak                                                 | 2 +-
 lib/x86_64/aes128_ecbenc_x3.asm                                 | 2 +-
 lib/x86_64/aes_cmac_subkey_gen.asm                              | 2 +-
 lib/x86_64/aes_keyexp_128.asm                                   | 2 +-
 lib/x86_64/aes_keyexp_192.asm                                   | 2 +-
 lib/x86_64/aes_keyexp_256.asm                                   | 2 +-
 lib/x86_64/aes_xcbc_expand_key.c                                | 2 +-
 lib/x86_64/alloc.c                                              | 2 +-
 lib/x86_64/chacha20_poly1305.c                                  | 2 +-
 lib/x86_64/clear_regs_mem_fns.asm                               | 2 +-
 lib/x86_64/const.asm                                            | 2 +-
 lib/x86_64/constant_lookup_fns.asm                              | 2 +-
 lib/x86_64/cpu_feature.c                                        | 2 +-
 lib/x86_64/crc32_const.asm                                      | 2 +-
 lib/x86_64/crc32_refl_const.asm                                 | 2 +-
 lib/x86_64/des_basic.c                                          | 2 +-
 lib/x86_64/des_key.c                                            | 2 +-
 lib/x86_64/error.c                                              | 2 +-
 lib/x86_64/gcm.c                                                | 2 +-
 lib/x86_64/kasumi_iv.c                                          | 2 +-
 lib/x86_64/mb_mgr_auto.c                                        | 2 +-
 lib/x86_64/md5_one_block.c                                      | 2 +-
 lib/x86_64/ooo_mgr_reset.c                                      | 2 +-
 lib/x86_64/poly1305.asm                                         | 2 +-
 lib/x86_64/save_xmms.asm                                        | 2 +-
 lib/x86_64/self_test.c                                          | 2 +-
 lib/x86_64/snow3g_iv.c                                          | 2 +-
 lib/x86_64/snow3g_tables.c                                      | 2 +-
 lib/x86_64/version.c                                            | 2 +-
 lib/x86_64/wireless_common.asm                                  | 2 +-
 lib/x86_64/zuc_common.asm                                       | 2 +-
 lib/x86_64/zuc_iv.c                                             | 2 +-
 mkdep.bat                                                       | 2 +-
 perf/ipsec_diff_tool.py                                         | 2 +-
 perf/ipsec_perf.c                                               | 2 +-
 perf/ipsec_perf_tool.py                                         | 2 +-
 perf/misc.asm                                                   | 2 +-
 perf/misc.h                                                     | 2 +-
 perf/msr.c                                                      | 2 +-
 perf/msr.h                                                      | 2 +-
 perf/win_x64.mak                                                | 2 +-
 rpm/SUSE/intel-ipsec-mb.spec                                    | 2 +-
 rpm/intel-ipsec-mb.spec                                         | 2 +-
 test/CMakeLists.txt                                             | 2 +-
 test/acvp-app/acvp_app_main.c                                   | 2 +-
 test/common/utils.c                                             | 2 +-
 test/common/win_x64_common.mk                                   | 2 +-
 test/fuzz-app/direct_api_fuzz_test.c                            | 2 +-
 test/fuzz-app/job_api_fuzz_test.c                               | 2 +-
 test/include/aead_test.h                                        | 2 +-
 test/include/mac_test.h                                         | 2 +-
 test/include/utils.h                                            | 2 +-
 test/kat-app/aes_cbcs_test.c                                    | 2 +-
 test/kat-app/aes_test.c                                         | 2 +-
 test/kat-app/api_test.c                                         | 2 +-
 test/kat-app/ccm_test.c                                         | 2 +-
 test/kat-app/chacha20_poly1305_test.c                           | 2 +-
 test/kat-app/chacha_test.c                                      | 2 +-
 test/kat-app/chained_test.c                                     | 2 +-
 test/kat-app/clear_mem_test.c                                   | 2 +-
 test/kat-app/cmac_test.c                                        | 2 +-
 test/kat-app/crc_test.c                                         | 2 +-
 test/kat-app/ctr_test.c                                         | 2 +-
 test/kat-app/customop_test.c                                    | 2 +-
 test/kat-app/customop_test.h                                    | 2 +-
 test/kat-app/des_test.c                                         | 2 +-
 test/kat-app/direct_api_param_test.c                            | 2 +-
 test/kat-app/direct_api_param_test.c_template                   | 2 +-
 test/kat-app/direct_api_test.c                                  | 2 +-
 test/kat-app/do_test.h                                          | 2 +-
 test/kat-app/ecb_test.c                                         | 2 +-
 test/kat-app/gcm_ctr_vectors_test.h                             | 2 +-
 test/kat-app/gcm_test.c                                         | 2 +-
 test/kat-app/hec_test.c                                         | 2 +-
 test/kat-app/hmac_md5_test.c                                    | 2 +-
 test/kat-app/hmac_sha1_test.c                                   | 2 +-
 test/kat-app/hmac_sha256_sha512_test.c                          | 2 +-
 test/kat-app/kasumi_test.c                                      | 2 +-
 test/kat-app/kasumi_test_vectors.h                              | 2 +-
 test/kat-app/main.c                                             | 2 +-
 test/kat-app/null_test.c                                        | 2 +-
 test/kat-app/poly1305_test.c                                    | 2 +-
 test/kat-app/pon_test.c                                         | 2 +-
 test/kat-app/sha_test.c                                         | 2 +-
 test/kat-app/snow3g_test.c                                      | 2 +-
 test/kat-app/snow3g_test_vectors.h                              | 2 +-
 test/kat-app/snow_v_test.c                                      | 2 +-
 test/kat-app/test_api.py                                        | 2 +-
 test/kat-app/xcbc_test.c                                        | 2 +-
 test/kat-app/zuc_test.c                                         | 2 +-
 test/kat-app/zuc_test_vectors.h                                 | 2 +-
 test/win_x64.mak                                                | 2 +-
 test/wycheproof-app/aes_ccm_test.json.c                         | 2 +-
 test/wycheproof-app/aes_cmac_test.json.c                        | 2 +-
 test/wycheproof-app/aes_gcm_test.json.c                         | 2 +-
 test/wycheproof-app/chacha20_poly1305_test.json.c               | 2 +-
 test/wycheproof-app/gmac_test.json.c                            | 2 +-
 test/wycheproof-app/hmac_sha1_test.json.c                       | 2 +-
 test/wycheproof-app/hmac_sha224_test.json.c                     | 2 +-
 test/wycheproof-app/hmac_sha256_test.json.c                     | 2 +-
 test/wycheproof-app/hmac_sha384_test.json.c                     | 2 +-
 test/wycheproof-app/hmac_sha512_test.json.c                     | 2 +-
 test/wycheproof-app/win_x64.mak                                 | 2 +-
 test/wycheproof-app/wycheproof.c                                | 2 +-
 test/xvalid-app/ipsec_xvalid.c                                  | 2 +-
 test/xvalid-app/misc.asm                                        | 2 +-
 test/xvalid-app/misc.h                                          | 2 +-
 win_x64.mak                                                     | 2 +-
 570 files changed, 570 insertions(+), 570 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 3a445f7b..9b432ad9 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -1,4 +1,4 @@
-# Copyright (c) 2022, Intel Corporation
+# Copyright (c) 2022-2023, Intel Corporation
 # Copyright 2000-2023 Kitware, Inc. and Contributors
 #
 # Redistribution and use in source and binary forms, with or without
diff --git a/LICENSE b/LICENSE
index 2cc1947b..a0f261ff 100644
--- a/LICENSE
+++ b/LICENSE
@@ -1,4 +1,4 @@
-Copyright (c) 2012-2022, Intel Corporation
+Copyright (c) 2012-2023, Intel Corporation
 
 Redistribution and use in source and binary forms, with or without
 modification, are permitted provided that the following conditions are met:
diff --git a/Makefile b/Makefile
index 3792af36..69154512 100644
--- a/Makefile
+++ b/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2020-2022, Intel Corporation
+# Copyright (c) 2020-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
diff --git a/lib/CMakeLists.txt b/lib/CMakeLists.txt
index 7f9e8d5f..af1de6f6 100644
--- a/lib/CMakeLists.txt
+++ b/lib/CMakeLists.txt
@@ -1,4 +1,4 @@
-# Copyright (c) 2022, Intel Corporation
+# Copyright (c) 2022-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
diff --git a/lib/Makefile b/lib/Makefile
index c89e2a90..cdda52d7 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2012-2022, Intel Corporation
+# Copyright (c) 2012-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/aes128_gcm_by8_avx2.asm b/lib/avx2_t1/aes128_gcm_by8_avx2.asm
index 853ec920..be3a4d15 100644
--- a/lib/avx2_t1/aes128_gcm_by8_avx2.asm
+++ b/lib/avx2_t1/aes128_gcm_by8_avx2.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2017-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2017-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx2_t1/aes192_gcm_by8_avx2.asm b/lib/avx2_t1/aes192_gcm_by8_avx2.asm
index b3b792d3..4d28c0d6 100644
--- a/lib/avx2_t1/aes192_gcm_by8_avx2.asm
+++ b/lib/avx2_t1/aes192_gcm_by8_avx2.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2017-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2017-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx2_t1/aes256_gcm_by8_avx2.asm b/lib/avx2_t1/aes256_gcm_by8_avx2.asm
index d07966e1..63c87273 100644
--- a/lib/avx2_t1/aes256_gcm_by8_avx2.asm
+++ b/lib/avx2_t1/aes256_gcm_by8_avx2.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2017-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2017-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx2_t1/chacha20_avx2.asm b/lib/avx2_t1/chacha20_avx2.asm
index acc6b3d4..7c65f2fb 100644
--- a/lib/avx2_t1/chacha20_avx2.asm
+++ b/lib/avx2_t1/chacha20_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_avx2.c b/lib/avx2_t1/mb_mgr_avx2.c
index ac98218c..150f5b15 100644
--- a/lib/avx2_t1/mb_mgr_avx2.c
+++ b/lib/avx2_t1/mb_mgr_avx2.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2012-2022, Intel Corporation
+ Copyright (c) 2012-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_avx2_t1.c b/lib/avx2_t1/mb_mgr_avx2_t1.c
index 4440dafe..b390bb59 100644
--- a/lib/avx2_t1/mb_mgr_avx2_t1.c
+++ b/lib/avx2_t1/mb_mgr_avx2_t1.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
index 14952529..55c1bd06 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_flush_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
index 8bb7857e..ea6736f8 100644
--- a/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_md5_submit_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
index 413fa085..0bb10dc9 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_flush_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
index d9d2065c..765875e1 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha1_submit_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha224_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha224_flush_avx2.asm
index bae687b7..66845ef3 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha224_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha224_flush_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha224_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha224_submit_avx2.asm
index 0b6c7fde..2527060f 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha224_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha224_submit_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
index b9f02aa7..ffac80f0 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_flush_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
index a3ec0942..45bf85ae 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha256_submit_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha384_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha384_flush_avx2.asm
index 9f4c13dd..57575696 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha384_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha384_flush_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha384_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha384_submit_avx2.asm
index a7687b52..007991e1 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha384_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha384_submit_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
index cb75aafd..1009817e 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_flush_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
index b9972c57..8ec61467 100644
--- a/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_hmac_sha512_submit_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
index 785622f7..c0a6e79f 100644
--- a/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
+++ b/lib/avx2_t1/mb_mgr_zuc_submit_flush_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/md5_x8x2_avx2.asm b/lib/avx2_t1/md5_x8x2_avx2.asm
index 436334d4..019be9c3 100644
--- a/lib/avx2_t1/md5_x8x2_avx2.asm
+++ b/lib/avx2_t1/md5_x8x2_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/sha1_x8_avx2.asm b/lib/avx2_t1/sha1_x8_avx2.asm
index cc0e0109..7f665cf7 100644
--- a/lib/avx2_t1/sha1_x8_avx2.asm
+++ b/lib/avx2_t1/sha1_x8_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/sha256_oct_avx2.asm b/lib/avx2_t1/sha256_oct_avx2.asm
index c00d0b33..d6f7c531 100644
--- a/lib/avx2_t1/sha256_oct_avx2.asm
+++ b/lib/avx2_t1/sha256_oct_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/sha512_x4_avx2.asm b/lib/avx2_t1/sha512_x4_avx2.asm
index b3729920..db5258f8 100644
--- a/lib/avx2_t1/sha512_x4_avx2.asm
+++ b/lib/avx2_t1/sha512_x4_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/sha_mb_avx2.c b/lib/avx2_t1/sha_mb_avx2.c
index fcca3021..e97193d8 100644
--- a/lib/avx2_t1/sha_mb_avx2.c
+++ b/lib/avx2_t1/sha_mb_avx2.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/snow3g_avx2.c b/lib/avx2_t1/snow3g_avx2.c
index 82f1976e..8daad666 100644
--- a/lib/avx2_t1/snow3g_avx2.c
+++ b/lib/avx2_t1/snow3g_avx2.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2019-2022, Intel Corporation
+  Copyright (c) 2019-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/zuc_top_avx2.c b/lib/avx2_t1/zuc_top_avx2.c
index 4781b434..752480e5 100644
--- a/lib/avx2_t1/zuc_top_avx2.c
+++ b/lib/avx2_t1/zuc_top_avx2.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2020-2022, Intel Corporation
+  Copyright (c) 2020-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t1/zuc_x8_avx2.asm b/lib/avx2_t1/zuc_x8_avx2.asm
index d3262e39..5c32833e 100644
--- a/lib/avx2_t1/zuc_x8_avx2.asm
+++ b/lib/avx2_t1/zuc_x8_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t2/aes128_ecb_vaes_avx2.asm b/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
index ea56a27a..941fe273 100644
--- a/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
+++ b/lib/avx2_t2/aes128_ecb_vaes_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t2/aes192_ecb_vaes_avx2.asm b/lib/avx2_t2/aes192_ecb_vaes_avx2.asm
index 03508ade..c78eeafe 100644
--- a/lib/avx2_t2/aes192_ecb_vaes_avx2.asm
+++ b/lib/avx2_t2/aes192_ecb_vaes_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t2/aes256_ecb_vaes_avx2.asm b/lib/avx2_t2/aes256_ecb_vaes_avx2.asm
index b1abb269..e9f14450 100644
--- a/lib/avx2_t2/aes256_ecb_vaes_avx2.asm
+++ b/lib/avx2_t2/aes256_ecb_vaes_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t2/mb_mgr_avx2_t2.c b/lib/avx2_t2/mb_mgr_avx2_t2.c
index a265ff40..a55bb855 100644
--- a/lib/avx2_t2/mb_mgr_avx2_t2.c
+++ b/lib/avx2_t2/mb_mgr_avx2_t2.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t2/mb_mgr_zuc_submit_flush_gfni_avx2.asm b/lib/avx2_t2/mb_mgr_zuc_submit_flush_gfni_avx2.asm
index 62d1c100..88859b3d 100644
--- a/lib/avx2_t2/mb_mgr_zuc_submit_flush_gfni_avx2.asm
+++ b/lib/avx2_t2/mb_mgr_zuc_submit_flush_gfni_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx2_t2/zuc_x8_gfni_avx2.asm b/lib/avx2_t2/zuc_x8_gfni_avx2.asm
index 4753b6e8..44159fe3 100644
--- a/lib/avx2_t2/zuc_x8_gfni_avx2.asm
+++ b/lib/avx2_t2/zuc_x8_gfni_avx2.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/aes128_gcm_by8_avx512.asm b/lib/avx512_t1/aes128_gcm_by8_avx512.asm
index fa38757b..5487a4fe 100644
--- a/lib/avx512_t1/aes128_gcm_by8_avx512.asm
+++ b/lib/avx512_t1/aes128_gcm_by8_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t1/aes192_gcm_by8_avx512.asm b/lib/avx512_t1/aes192_gcm_by8_avx512.asm
index 3aa46b5f..9a1e645f 100644
--- a/lib/avx512_t1/aes192_gcm_by8_avx512.asm
+++ b/lib/avx512_t1/aes192_gcm_by8_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t1/aes256_gcm_by8_avx512.asm b/lib/avx512_t1/aes256_gcm_by8_avx512.asm
index 10bdaf2c..ea7728b7 100644
--- a/lib/avx512_t1/aes256_gcm_by8_avx512.asm
+++ b/lib/avx512_t1/aes256_gcm_by8_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t1/chacha20_avx512.asm b/lib/avx512_t1/chacha20_avx512.asm
index 2eecb809..e38042a5 100644
--- a/lib/avx512_t1/chacha20_avx512.asm
+++ b/lib/avx512_t1/chacha20_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/des_x16_avx512.asm b/lib/avx512_t1/des_x16_avx512.asm
index 9ed36475..c940dd8d 100644
--- a/lib/avx512_t1/des_x16_avx512.asm
+++ b/lib/avx512_t1/des_x16_avx512.asm
@@ -1,5 +1,5 @@
 ;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_avx512.c b/lib/avx512_t1/mb_mgr_avx512.c
index d83bd29b..c8ac566e 100644
--- a/lib/avx512_t1/mb_mgr_avx512.c
+++ b/lib/avx512_t1/mb_mgr_avx512.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2012-2022, Intel Corporation
+ Copyright (c) 2012-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_avx512_t1.c b/lib/avx512_t1/mb_mgr_avx512_t1.c
index 7bec3e61..9ce52317 100644
--- a/lib/avx512_t1/mb_mgr_avx512_t1.c
+++ b/lib/avx512_t1/mb_mgr_avx512_t1.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_des_avx512.asm b/lib/avx512_t1/mb_mgr_des_avx512.asm
index 05fe58ee..efdb0067 100644
--- a/lib/avx512_t1/mb_mgr_des_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_des_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
index 26d30096..4f8b97c9 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_flush_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
index 9d2cf755..c9d723ff 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha1_submit_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha224_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha224_flush_avx512.asm
index b7467c31..b740bb44 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha224_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha224_flush_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha224_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha224_submit_avx512.asm
index d8828b45..a3db8f73 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha224_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha224_submit_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
index 567d4181..01c5ce03 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_flush_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
index fc606edd..454ea930 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha256_submit_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha384_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha384_flush_avx512.asm
index 70037f6d..3184d8e1 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha384_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha384_flush_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha384_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha384_submit_avx512.asm
index 2fc8063c..998dd4ef 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha384_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha384_submit_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
index 08c3652c..2904a016 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_flush_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
index c4039a4c..277def8c 100644
--- a/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
+++ b/lib/avx512_t1/mb_mgr_hmac_sha512_submit_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/poly_avx512.asm b/lib/avx512_t1/poly_avx512.asm
index edda1fd1..c21b93b5 100644
--- a/lib/avx512_t1/poly_avx512.asm
+++ b/lib/avx512_t1/poly_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/sha1_x16_avx512.asm b/lib/avx512_t1/sha1_x16_avx512.asm
index 0c47597c..80f648c3 100644
--- a/lib/avx512_t1/sha1_x16_avx512.asm
+++ b/lib/avx512_t1/sha1_x16_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/sha256_x16_avx512.asm b/lib/avx512_t1/sha256_x16_avx512.asm
index ecee8ce5..209100b7 100644
--- a/lib/avx512_t1/sha256_x16_avx512.asm
+++ b/lib/avx512_t1/sha256_x16_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/sha512_x8_avx512.asm b/lib/avx512_t1/sha512_x8_avx512.asm
index a4fefb50..11e8f8e1 100644
--- a/lib/avx512_t1/sha512_x8_avx512.asm
+++ b/lib/avx512_t1/sha512_x8_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/sha_mb_avx512.c b/lib/avx512_t1/sha_mb_avx512.c
index 6b283fc2..85ae8b40 100644
--- a/lib/avx512_t1/sha_mb_avx512.c
+++ b/lib/avx512_t1/sha_mb_avx512.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/snow3g_avx512.c b/lib/avx512_t1/snow3g_avx512.c
index 36d9eed7..188b2c1f 100644
--- a/lib/avx512_t1/snow3g_avx512.c
+++ b/lib/avx512_t1/snow3g_avx512.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2021-2022, Intel Corporation
+  Copyright (c) 2021-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/zuc_top_avx512.c b/lib/avx512_t1/zuc_top_avx512.c
index da6beaac..bc4f6d23 100644
--- a/lib/avx512_t1/zuc_top_avx512.c
+++ b/lib/avx512_t1/zuc_top_avx512.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2020-2022, Intel Corporation
+  Copyright (c) 2020-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t1/zuc_x16_avx512.asm b/lib/avx512_t1/zuc_x16_avx512.asm
index ef711ef0..974cd553 100644
--- a/lib/avx512_t1/zuc_x16_avx512.asm
+++ b/lib/avx512_t1/zuc_x16_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm b/lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm
index 3a3aa938..5134d9cc 100644
--- a/lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes128_gcm_api_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm b/lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm
index b4521311..34961612 100644
--- a/lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes128_gcm_sgl_api_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm b/lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm
index 6b2fb721..099484ca 100644
--- a/lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes128_gmac_api_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm b/lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm
index 011f7cfa..47ec33da 100644
--- a/lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes192_gcm_api_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm b/lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm
index fa315411..0d1600bb 100644
--- a/lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes192_gcm_sgl_api_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm b/lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm
index 505fbdf0..d82a5e20 100644
--- a/lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes192_gmac_api_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm b/lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm
index c3591419..1e765b61 100644
--- a/lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes256_gcm_api_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm b/lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm
index 30563a89..dc73ee79 100644
--- a/lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes256_gcm_sgl_api_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm b/lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm
index 3e68cdba..422e2ba4 100644
--- a/lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm
+++ b/lib/avx512_t2/aes256_gmac_api_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
index 1c856c39..df2cb807 100644
--- a/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbc_dec_by16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm b/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
index 735689a4..3decdb2f 100644
--- a/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbc_enc_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/aes_cbcs_dec_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cbcs_dec_by16_vaes_avx512.asm
index 2f5adea4..fed2ab86 100644
--- a/lib/avx512_t2/aes_cbcs_dec_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbcs_dec_by16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm b/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
index 5464c8f8..1d617bc5 100644
--- a/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cbcs_enc_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/aes_cntr_api_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cntr_api_by16_vaes_avx512.asm
index 311f9cf4..4e75d7bc 100644
--- a/lib/avx512_t2/aes_cntr_api_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cntr_api_by16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2019-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2019-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes_cntr_bit_api_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cntr_bit_api_by16_vaes_avx512.asm
index 18aaf5e4..b03d69f3 100644
--- a/lib/avx512_t2/aes_cntr_bit_api_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cntr_bit_api_by16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2019-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2019-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes_cntr_ccm_api_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cntr_ccm_api_by16_vaes_avx512.asm
index 3c0e65f7..5e81d4f9 100644
--- a/lib/avx512_t2/aes_cntr_ccm_api_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cntr_ccm_api_by16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2019-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2019-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes_cntr_pon_api_by16_vaes_avx512.asm b/lib/avx512_t2/aes_cntr_pon_api_by16_vaes_avx512.asm
index 9812b010..7352543e 100644
--- a/lib/avx512_t2/aes_cntr_pon_api_by16_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_cntr_pon_api_by16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2019-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2019-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx512_t2/aes_docsis_dec_avx512.asm b/lib/avx512_t2/aes_docsis_dec_avx512.asm
index 2e939468..fb099c12 100644
--- a/lib/avx512_t2/aes_docsis_dec_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
index 37dd892d..ec1538e7 100644
--- a/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_dec_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/aes_docsis_enc_avx512.asm b/lib/avx512_t2/aes_docsis_enc_avx512.asm
index ad21314c..b6a34984 100644
--- a/lib/avx512_t2/aes_docsis_enc_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
index 00a881a8..a10387c6 100644
--- a/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_docsis_enc_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/aes_ecb_vaes_avx512.asm b/lib/avx512_t2/aes_ecb_vaes_avx512.asm
index 7e0e669e..3c2fe3f3 100644
--- a/lib/avx512_t2/aes_ecb_vaes_avx512.asm
+++ b/lib/avx512_t2/aes_ecb_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/crc16_x25_avx512.asm b/lib/avx512_t2/crc16_x25_avx512.asm
index 8540ba43..bc4cf6eb 100644
--- a/lib/avx512_t2/crc16_x25_avx512.asm
+++ b/lib/avx512_t2/crc16_x25_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/crc32_by16_vclmul_avx512.asm b/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
index 2e90ca78..70288ac1 100644
--- a/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
+++ b/lib/avx512_t2/crc32_by16_vclmul_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/crc32_fp_avx512.asm b/lib/avx512_t2/crc32_fp_avx512.asm
index b8f30aaf..09ab985c 100644
--- a/lib/avx512_t2/crc32_fp_avx512.asm
+++ b/lib/avx512_t2/crc32_fp_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/crc32_iuup_avx512.asm b/lib/avx512_t2/crc32_iuup_avx512.asm
index e36c1de2..e3647324 100644
--- a/lib/avx512_t2/crc32_iuup_avx512.asm
+++ b/lib/avx512_t2/crc32_iuup_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/crc32_lte_avx512.asm b/lib/avx512_t2/crc32_lte_avx512.asm
index 518f6658..683152a4 100644
--- a/lib/avx512_t2/crc32_lte_avx512.asm
+++ b/lib/avx512_t2/crc32_lte_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm b/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
index ce238185..67dfb645 100644
--- a/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
+++ b/lib/avx512_t2/crc32_refl_by16_vclmul_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/crc32_sctp_avx512.asm b/lib/avx512_t2/crc32_sctp_avx512.asm
index d8a15e41..2e1d3acd 100644
--- a/lib/avx512_t2/crc32_sctp_avx512.asm
+++ b/lib/avx512_t2/crc32_sctp_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/crc32_wimax_avx512.asm b/lib/avx512_t2/crc32_wimax_avx512.asm
index 4c6bd00f..79a14cf2 100644
--- a/lib/avx512_t2/crc32_wimax_avx512.asm
+++ b/lib/avx512_t2/crc32_wimax_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/ethernet_fcs_avx512.asm b/lib/avx512_t2/ethernet_fcs_avx512.asm
index 8b22f73e..80574de0 100644
--- a/lib/avx512_t2/ethernet_fcs_avx512.asm
+++ b/lib/avx512_t2/ethernet_fcs_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
index f1c2e44a..6b7e28bf 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_flush_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
index 05e05838..291d916c 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbc_enc_submit_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbcs_1_9_flush_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbcs_1_9_flush_avx512.asm
index f7bb94f6..0ea4b153 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbcs_1_9_flush_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbcs_1_9_flush_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes128_cbcs_1_9_submit_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cbcs_1_9_submit_avx512.asm
index 6497f60f..91a6a768 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cbcs_1_9_submit_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cbcs_1_9_submit_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
index a888e498..f04a6d81 100644
--- a/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_ccm_auth_submit_flush_x16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
index ce8434d7..3fe23b67 100644
--- a/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_cmac_submit_flush_x16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
index 2b2bdd9b..0ae7f2a0 100644
--- a/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes128_xcbc_submit_flush_x16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes192_cbc_enc_flush_avx512.asm b/lib/avx512_t2/mb_mgr_aes192_cbc_enc_flush_avx512.asm
index 8a0416c9..c254dd34 100644
--- a/lib/avx512_t2/mb_mgr_aes192_cbc_enc_flush_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes192_cbc_enc_flush_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes192_cbc_enc_submit_avx512.asm b/lib/avx512_t2/mb_mgr_aes192_cbc_enc_submit_avx512.asm
index 1bf43590..0bc55abb 100644
--- a/lib/avx512_t2/mb_mgr_aes192_cbc_enc_submit_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes192_cbc_enc_submit_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes256_cbc_enc_flush_avx512.asm b/lib/avx512_t2/mb_mgr_aes256_cbc_enc_flush_avx512.asm
index a3ec6b0c..a6acbcbe 100644
--- a/lib/avx512_t2/mb_mgr_aes256_cbc_enc_flush_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes256_cbc_enc_flush_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes256_cbc_enc_submit_avx512.asm b/lib/avx512_t2/mb_mgr_aes256_cbc_enc_submit_avx512.asm
index 3e001baf..7f7b0f39 100644
--- a/lib/avx512_t2/mb_mgr_aes256_cbc_enc_submit_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes256_cbc_enc_submit_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes256_ccm_auth_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes256_ccm_auth_submit_flush_x16_vaes_avx512.asm
index 6bfdf6ea..a16a41d4 100644
--- a/lib/avx512_t2/mb_mgr_aes256_ccm_auth_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes256_ccm_auth_submit_flush_x16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_aes256_cmac_submit_flush_x16_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_aes256_cmac_submit_flush_x16_vaes_avx512.asm
index d0224cf0..e3fe10da 100644
--- a/lib/avx512_t2/mb_mgr_aes256_cmac_submit_flush_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_aes256_cmac_submit_flush_x16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_avx512_t2.c b/lib/avx512_t2/mb_mgr_avx512_t2.c
index ef40c0e8..c01682dd 100644
--- a/lib/avx512_t2/mb_mgr_avx512_t2.c
+++ b/lib/avx512_t2/mb_mgr_avx512_t2.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
index 9e09dbc3..c6682477 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uea2_submit_flush_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
index 317d1cee..d4043388 100644
--- a/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_snow3g_uia2_submit_flush_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/mb_mgr_zuc_submit_flush_gfni_avx512.asm b/lib/avx512_t2/mb_mgr_zuc_submit_flush_gfni_avx512.asm
index 76649d36..abf8acf0 100644
--- a/lib/avx512_t2/mb_mgr_zuc_submit_flush_gfni_avx512.asm
+++ b/lib/avx512_t2/mb_mgr_zuc_submit_flush_gfni_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/poly_fma_avx512.asm b/lib/avx512_t2/poly_fma_avx512.asm
index d4a1e3dc..3e04eef8 100644
--- a/lib/avx512_t2/poly_fma_avx512.asm
+++ b/lib/avx512_t2/poly_fma_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/pon_vaes_avx512.asm b/lib/avx512_t2/pon_vaes_avx512.asm
index d07b7800..895c6dc9 100644
--- a/lib/avx512_t2/pon_vaes_avx512.asm
+++ b/lib/avx512_t2/pon_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm b/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
index f88ca3d0..a815c7e6 100644
--- a/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
+++ b/lib/avx512_t2/snow3g_uia2_by32_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx512_t2/zuc_x16_vaes_avx512.asm b/lib/avx512_t2/zuc_x16_vaes_avx512.asm
index 42446d4f..98ad69b0 100644
--- a/lib/avx512_t2/zuc_x16_vaes_avx512.asm
+++ b/lib/avx512_t2/zuc_x16_vaes_avx512.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/avx_t1/aes128_cbc_dec_by8_avx.asm b/lib/avx_t1/aes128_cbc_dec_by8_avx.asm
index 02de3d35..93ab4b06 100644
--- a/lib/avx_t1/aes128_cbc_dec_by8_avx.asm
+++ b/lib/avx_t1/aes128_cbc_dec_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes128_cbc_enc_x8_avx.asm b/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
index 9478c88a..16e3b5cf 100644
--- a/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes128_cbc_mac_x8_avx.asm b/lib/avx_t1/aes128_cbc_mac_x8_avx.asm
index 870da05e..b54e904d 100644
--- a/lib/avx_t1/aes128_cbc_mac_x8_avx.asm
+++ b/lib/avx_t1/aes128_cbc_mac_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes128_cbcs_1_9_dec_by8_avx.asm b/lib/avx_t1/aes128_cbcs_1_9_dec_by8_avx.asm
index b0982c2f..be8a60ad 100644
--- a/lib/avx_t1/aes128_cbcs_1_9_dec_by8_avx.asm
+++ b/lib/avx_t1/aes128_cbcs_1_9_dec_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes128_cbcs_1_9_enc_x8_avx.asm b/lib/avx_t1/aes128_cbcs_1_9_enc_x8_avx.asm
index d3051f2f..bafe2e4c 100644
--- a/lib/avx_t1/aes128_cbcs_1_9_enc_x8_avx.asm
+++ b/lib/avx_t1/aes128_cbcs_1_9_enc_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes128_cntr_by8_avx.asm b/lib/avx_t1/aes128_cntr_by8_avx.asm
index 66e56183..af1407bf 100644
--- a/lib/avx_t1/aes128_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes128_cntr_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes128_cntr_ccm_by8_avx.asm b/lib/avx_t1/aes128_cntr_ccm_by8_avx.asm
index 37bb556c..92229bb0 100644
--- a/lib/avx_t1/aes128_cntr_ccm_by8_avx.asm
+++ b/lib/avx_t1/aes128_cntr_ccm_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes128_ecb_by8_avx.asm b/lib/avx_t1/aes128_ecb_by8_avx.asm
index 63f72241..de2ba008 100644
--- a/lib/avx_t1/aes128_ecb_by8_avx.asm
+++ b/lib/avx_t1/aes128_ecb_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes128_xcbc_mac_x8_avx.asm b/lib/avx_t1/aes128_xcbc_mac_x8_avx.asm
index 9d9ec414..4ff183eb 100644
--- a/lib/avx_t1/aes128_xcbc_mac_x8_avx.asm
+++ b/lib/avx_t1/aes128_xcbc_mac_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes192_cbc_dec_by8_avx.asm b/lib/avx_t1/aes192_cbc_dec_by8_avx.asm
index 26809efb..276eb9fd 100644
--- a/lib/avx_t1/aes192_cbc_dec_by8_avx.asm
+++ b/lib/avx_t1/aes192_cbc_dec_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes192_cbc_enc_x8_avx.asm b/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
index ab3def7d..9f314ff2 100644
--- a/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes192_cntr_by8_avx.asm b/lib/avx_t1/aes192_cntr_by8_avx.asm
index cb7594ed..577c8c9e 100644
--- a/lib/avx_t1/aes192_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes192_cntr_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes192_ecb_by8_avx.asm b/lib/avx_t1/aes192_ecb_by8_avx.asm
index 8163795a..7b7f7fdc 100644
--- a/lib/avx_t1/aes192_ecb_by8_avx.asm
+++ b/lib/avx_t1/aes192_ecb_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes256_cbc_dec_by8_avx.asm b/lib/avx_t1/aes256_cbc_dec_by8_avx.asm
index 5f911b58..78b80f6b 100644
--- a/lib/avx_t1/aes256_cbc_dec_by8_avx.asm
+++ b/lib/avx_t1/aes256_cbc_dec_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes256_cbc_enc_x8_avx.asm b/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
index b527babb..616615eb 100644
--- a/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes256_cbc_mac_x8_avx.asm b/lib/avx_t1/aes256_cbc_mac_x8_avx.asm
index 842eea9d..46312beb 100644
--- a/lib/avx_t1/aes256_cbc_mac_x8_avx.asm
+++ b/lib/avx_t1/aes256_cbc_mac_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes256_cntr_by8_avx.asm b/lib/avx_t1/aes256_cntr_by8_avx.asm
index fc272e59..61502bdf 100644
--- a/lib/avx_t1/aes256_cntr_by8_avx.asm
+++ b/lib/avx_t1/aes256_cntr_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes256_cntr_ccm_by8_avx.asm b/lib/avx_t1/aes256_cntr_ccm_by8_avx.asm
index d51bab55..d038b09d 100644
--- a/lib/avx_t1/aes256_cntr_ccm_by8_avx.asm
+++ b/lib/avx_t1/aes256_cntr_ccm_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes256_ecb_by8_avx.asm b/lib/avx_t1/aes256_ecb_by8_avx.asm
index f15c5a33..50e87c91 100644
--- a/lib/avx_t1/aes256_ecb_by8_avx.asm
+++ b/lib/avx_t1/aes256_ecb_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/aes_cfb_avx.asm b/lib/avx_t1/aes_cfb_avx.asm
index 645520d5..3411d573 100644
--- a/lib/avx_t1/aes_cfb_avx.asm
+++ b/lib/avx_t1/aes_cfb_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/chacha20_avx.asm b/lib/avx_t1/chacha20_avx.asm
index 328a9676..d4db3548 100644
--- a/lib/avx_t1/chacha20_avx.asm
+++ b/lib/avx_t1/chacha20_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/crc16_x25_avx.asm b/lib/avx_t1/crc16_x25_avx.asm
index ce8a1149..8556bdd3 100644
--- a/lib/avx_t1/crc16_x25_avx.asm
+++ b/lib/avx_t1/crc16_x25_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/crc32_by8_avx.asm b/lib/avx_t1/crc32_by8_avx.asm
index f25a6ba0..343747b5 100644
--- a/lib/avx_t1/crc32_by8_avx.asm
+++ b/lib/avx_t1/crc32_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/crc32_fp_avx.asm b/lib/avx_t1/crc32_fp_avx.asm
index 2cf1c5e3..ba0fd0e6 100644
--- a/lib/avx_t1/crc32_fp_avx.asm
+++ b/lib/avx_t1/crc32_fp_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/crc32_iuup_avx.asm b/lib/avx_t1/crc32_iuup_avx.asm
index ebc5e5f0..287075a2 100644
--- a/lib/avx_t1/crc32_iuup_avx.asm
+++ b/lib/avx_t1/crc32_iuup_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/crc32_lte_avx.asm b/lib/avx_t1/crc32_lte_avx.asm
index a8fb8b93..4f0ad631 100644
--- a/lib/avx_t1/crc32_lte_avx.asm
+++ b/lib/avx_t1/crc32_lte_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/crc32_refl_by8_avx.asm b/lib/avx_t1/crc32_refl_by8_avx.asm
index 8f801ffc..f7cfa860 100644
--- a/lib/avx_t1/crc32_refl_by8_avx.asm
+++ b/lib/avx_t1/crc32_refl_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/crc32_sctp_avx.asm b/lib/avx_t1/crc32_sctp_avx.asm
index 4d4c9e5b..89ac871d 100644
--- a/lib/avx_t1/crc32_sctp_avx.asm
+++ b/lib/avx_t1/crc32_sctp_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/crc32_wimax_avx.asm b/lib/avx_t1/crc32_wimax_avx.asm
index 06f53cb7..444c8800 100644
--- a/lib/avx_t1/crc32_wimax_avx.asm
+++ b/lib/avx_t1/crc32_wimax_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/ethernet_fcs_avx.asm b/lib/avx_t1/ethernet_fcs_avx.asm
index 296ee2a0..88632f24 100644
--- a/lib/avx_t1/ethernet_fcs_avx.asm
+++ b/lib/avx_t1/ethernet_fcs_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/kasumi_avx.c b/lib/avx_t1/kasumi_avx.c
index 697e4953..eb2f6bac 100644
--- a/lib/avx_t1/kasumi_avx.c
+++ b/lib/avx_t1/kasumi_avx.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
index f4d4398b..f902fa41 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbc_enc_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
index 4bac990d..a6bac0a8 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbc_enc_submit_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
index 822717c7..530d4032 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
index 72b8dd5c..aabfd6b5 100644
--- a/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cbcs_1_9_submit_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
index 40108a72..2f43a83f 100644
--- a/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_ccm_auth_submit_flush_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
index 2886a428..6a730617 100644
--- a/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_cmac_submit_flush_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
index 5a2a1817..76b1d2b6 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_flush_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
index c7e0b4d2..77578930 100644
--- a/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes128_xcbc_submit_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes192_cbc_enc_flush_avx.asm b/lib/avx_t1/mb_mgr_aes192_cbc_enc_flush_avx.asm
index 13797d30..f85a821a 100644
--- a/lib/avx_t1/mb_mgr_aes192_cbc_enc_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes192_cbc_enc_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes192_cbc_enc_submit_avx.asm b/lib/avx_t1/mb_mgr_aes192_cbc_enc_submit_avx.asm
index 1dd9ce6c..7dace4b7 100644
--- a/lib/avx_t1/mb_mgr_aes192_cbc_enc_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes192_cbc_enc_submit_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes256_cbc_enc_flush_avx.asm b/lib/avx_t1/mb_mgr_aes256_cbc_enc_flush_avx.asm
index 75e85042..623b5993 100644
--- a/lib/avx_t1/mb_mgr_aes256_cbc_enc_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes256_cbc_enc_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes256_cbc_enc_submit_avx.asm b/lib/avx_t1/mb_mgr_aes256_cbc_enc_submit_avx.asm
index 8aa20d9d..14f13f33 100644
--- a/lib/avx_t1/mb_mgr_aes256_cbc_enc_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes256_cbc_enc_submit_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes256_ccm_auth_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes256_ccm_auth_submit_flush_x8_avx.asm
index 186f319f..b3e6cdda 100644
--- a/lib/avx_t1/mb_mgr_aes256_ccm_auth_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes256_ccm_auth_submit_flush_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_aes256_cmac_submit_flush_x8_avx.asm b/lib/avx_t1/mb_mgr_aes256_cmac_submit_flush_x8_avx.asm
index 62aa60ef..4884e2b3 100644
--- a/lib/avx_t1/mb_mgr_aes256_cmac_submit_flush_x8_avx.asm
+++ b/lib/avx_t1/mb_mgr_aes256_cmac_submit_flush_x8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_avx.c b/lib/avx_t1/mb_mgr_avx.c
index 21438ed2..cced59a3 100644
--- a/lib/avx_t1/mb_mgr_avx.c
+++ b/lib/avx_t1/mb_mgr_avx.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2012-2022, Intel Corporation
+ Copyright (c) 2012-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_avx_t1.c b/lib/avx_t1/mb_mgr_avx_t1.c
index 92d69894..898d6df3 100644
--- a/lib/avx_t1/mb_mgr_avx_t1.c
+++ b/lib/avx_t1/mb_mgr_avx_t1.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
index cc0f0077..17da322c 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
index 7489cd32..edf3d216 100644
--- a/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_md5_submit_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
index 2dc52567..e54e3e08 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
index f4e35822..54efee09 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha1_submit_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_sha224_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha224_flush_avx.asm
index 1efdcea1..af3bbe52 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha224_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha224_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_sha224_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha224_submit_avx.asm
index d26a0ab6..2000ba97 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha224_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha224_submit_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
index 6f64bc50..fe6c8f02 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
index 0d4c6e95..f95ae24b 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha256_submit_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_sha384_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha384_flush_avx.asm
index 9ee3c124..6505c88e 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha384_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha384_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_sha384_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha384_submit_avx.asm
index 70a90ba8..d58fb927 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha384_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha384_submit_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
index 6fcfe7ee..e8d4292d 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
index 75d57149..ff482c29 100644
--- a/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
+++ b/lib/avx_t1/mb_mgr_hmac_sha512_submit_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
index b3a670fd..57b4c051 100644
--- a/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
+++ b/lib/avx_t1/mb_mgr_zuc_submit_flush_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/md5_x4x2_avx.asm b/lib/avx_t1/md5_x4x2_avx.asm
index 668951f3..ce692928 100644
--- a/lib/avx_t1/md5_x4x2_avx.asm
+++ b/lib/avx_t1/md5_x4x2_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/memcpy_avx.asm b/lib/avx_t1/memcpy_avx.asm
index 9cd396cf..501f8850 100644
--- a/lib/avx_t1/memcpy_avx.asm
+++ b/lib/avx_t1/memcpy_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/pon_by8_avx.asm b/lib/avx_t1/pon_by8_avx.asm
index e82314de..058d1533 100644
--- a/lib/avx_t1/pon_by8_avx.asm
+++ b/lib/avx_t1/pon_by8_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/sha1_one_block_avx.asm b/lib/avx_t1/sha1_one_block_avx.asm
index 93a6434d..b1a609cb 100644
--- a/lib/avx_t1/sha1_one_block_avx.asm
+++ b/lib/avx_t1/sha1_one_block_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/sha1_x4_avx.asm b/lib/avx_t1/sha1_x4_avx.asm
index 8f00db4c..948f71ce 100644
--- a/lib/avx_t1/sha1_x4_avx.asm
+++ b/lib/avx_t1/sha1_x4_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/sha224_one_block_avx.asm b/lib/avx_t1/sha224_one_block_avx.asm
index f80b5579..7c69e36a 100644
--- a/lib/avx_t1/sha224_one_block_avx.asm
+++ b/lib/avx_t1/sha224_one_block_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/sha256_mult_avx.asm b/lib/avx_t1/sha256_mult_avx.asm
index e438739f..304912fe 100644
--- a/lib/avx_t1/sha256_mult_avx.asm
+++ b/lib/avx_t1/sha256_mult_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/sha256_one_block_avx.asm b/lib/avx_t1/sha256_one_block_avx.asm
index 8286c202..cd99354f 100644
--- a/lib/avx_t1/sha256_one_block_avx.asm
+++ b/lib/avx_t1/sha256_one_block_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/sha384_one_block_avx.asm b/lib/avx_t1/sha384_one_block_avx.asm
index fc9bf735..5be46bbd 100644
--- a/lib/avx_t1/sha384_one_block_avx.asm
+++ b/lib/avx_t1/sha384_one_block_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/sha512_one_block_avx.asm b/lib/avx_t1/sha512_one_block_avx.asm
index 1ea90def..592ebc59 100644
--- a/lib/avx_t1/sha512_one_block_avx.asm
+++ b/lib/avx_t1/sha512_one_block_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/sha512_x2_avx.asm b/lib/avx_t1/sha512_x2_avx.asm
index 07156d14..d5b2e392 100644
--- a/lib/avx_t1/sha512_x2_avx.asm
+++ b/lib/avx_t1/sha512_x2_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/sha_avx.c b/lib/avx_t1/sha_avx.c
index 8827c5e7..b0c7845e 100644
--- a/lib/avx_t1/sha_avx.c
+++ b/lib/avx_t1/sha_avx.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2020-2022, Intel Corporation
+  Copyright (c) 2020-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/sha_mb_avx.c b/lib/avx_t1/sha_mb_avx.c
index b8026e7d..b156999d 100644
--- a/lib/avx_t1/sha_mb_avx.c
+++ b/lib/avx_t1/sha_mb_avx.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/snow3g_avx.c b/lib/avx_t1/snow3g_avx.c
index 22a871ac..f1285b06 100644
--- a/lib/avx_t1/snow3g_avx.c
+++ b/lib/avx_t1/snow3g_avx.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2019-2022, Intel Corporation
+  Copyright (c) 2019-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/snow3g_uia2_by4_avx.asm b/lib/avx_t1/snow3g_uia2_by4_avx.asm
index 7dea2639..309b4b70 100644
--- a/lib/avx_t1/snow3g_uia2_by4_avx.asm
+++ b/lib/avx_t1/snow3g_uia2_by4_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/zuc_top_avx.c b/lib/avx_t1/zuc_top_avx.c
index a6f46e8a..dcfad8ed 100644
--- a/lib/avx_t1/zuc_top_avx.c
+++ b/lib/avx_t1/zuc_top_avx.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t1/zuc_x4_avx.asm b/lib/avx_t1/zuc_x4_avx.asm
index 2b44e3bd..98d5e98d 100644
--- a/lib/avx_t1/zuc_x4_avx.asm
+++ b/lib/avx_t1/zuc_x4_avx.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2009-2022, Intel Corporation
+;; Copyright (c) 2009-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/avx_t2/mb_mgr_avx_t2.c b/lib/avx_t2/mb_mgr_avx_t2.c
index 352a26ab..cf38c108 100644
--- a/lib/avx_t2/mb_mgr_avx_t2.c
+++ b/lib/avx_t2/mb_mgr_avx_t2.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/aes_cntr_by16_vaes_avx512.inc b/lib/include/aes_cntr_by16_vaes_avx512.inc
index 389ea65a..af33dfca 100644
--- a/lib/include/aes_cntr_by16_vaes_avx512.inc
+++ b/lib/include/aes_cntr_by16_vaes_avx512.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2019-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2019-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/include/aes_common.inc b/lib/include/aes_common.inc
index 96575aaf..0d0279ad 100644
--- a/lib/include/aes_common.inc
+++ b/lib/include/aes_common.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/aesni_emu.h b/lib/include/aesni_emu.h
index e96f524f..4c5ef3a0 100644
--- a/lib/include/aesni_emu.h
+++ b/lib/include/aesni_emu.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2018-2022, Intel Corporation
+  Copyright (c) 2018-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/aesni_emu.inc b/lib/include/aesni_emu.inc
index 6134352e..30d0eec3 100644
--- a/lib/include/aesni_emu.inc
+++ b/lib/include/aesni_emu.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/arch_avx2_type1.h b/lib/include/arch_avx2_type1.h
index 9a347862..94f14746 100644
--- a/lib/include/arch_avx2_type1.h
+++ b/lib/include/arch_avx2_type1.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/arch_avx2_type2.h b/lib/include/arch_avx2_type2.h
index f4177bf5..08551457 100644
--- a/lib/include/arch_avx2_type2.h
+++ b/lib/include/arch_avx2_type2.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/arch_avx512_type1.h b/lib/include/arch_avx512_type1.h
index 66b924d6..cd2cc0ea 100644
--- a/lib/include/arch_avx512_type1.h
+++ b/lib/include/arch_avx512_type1.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/arch_avx512_type2.h b/lib/include/arch_avx512_type2.h
index fdaa4227..d7fdd41b 100644
--- a/lib/include/arch_avx512_type2.h
+++ b/lib/include/arch_avx512_type2.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2012-2022, Intel Corporation
+  Copyright (c) 2012-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/arch_avx_type1.h b/lib/include/arch_avx_type1.h
index 0e0307ac..0476d1e9 100644
--- a/lib/include/arch_avx_type1.h
+++ b/lib/include/arch_avx_type1.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/arch_noaesni.h b/lib/include/arch_noaesni.h
index e45be836..d3a790b2 100644
--- a/lib/include/arch_noaesni.h
+++ b/lib/include/arch_noaesni.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/arch_sse_type1.h b/lib/include/arch_sse_type1.h
index d7e7ce5a..1503fa97 100644
--- a/lib/include/arch_sse_type1.h
+++ b/lib/include/arch_sse_type1.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/arch_sse_type2.h b/lib/include/arch_sse_type2.h
index af5df55a..2c448a66 100644
--- a/lib/include/arch_sse_type2.h
+++ b/lib/include/arch_sse_type2.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/arch_sse_type3.h b/lib/include/arch_sse_type3.h
index 5becd98d..d13e2212 100644
--- a/lib/include/arch_sse_type3.h
+++ b/lib/include/arch_sse_type3.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/arch_x86_64.h b/lib/include/arch_x86_64.h
index e4bdce20..f18db39f 100644
--- a/lib/include/arch_x86_64.h
+++ b/lib/include/arch_x86_64.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/cet.inc b/lib/include/cet.inc
index b8e9dde8..a89fd94e 100644
--- a/lib/include/cet.inc
+++ b/lib/include/cet.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/chacha20_poly1305.h b/lib/include/chacha20_poly1305.h
index 59b8bcf0..677af8ec 100644
--- a/lib/include/chacha20_poly1305.h
+++ b/lib/include/chacha20_poly1305.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2020-2022, Intel Corporation
+  Copyright (c) 2020-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/chacha_poly_defines.inc b/lib/include/chacha_poly_defines.inc
index 2623095b..793b8758 100644
--- a/lib/include/chacha_poly_defines.inc
+++ b/lib/include/chacha_poly_defines.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/clear_regs.inc b/lib/include/clear_regs.inc
index af1337f7..a5d5f5a9 100644
--- a/lib/include/clear_regs.inc
+++ b/lib/include/clear_regs.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/clear_regs_mem.h b/lib/include/clear_regs_mem.h
index 8b43f517..4b923818 100644
--- a/lib/include/clear_regs_mem.h
+++ b/lib/include/clear_regs_mem.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2019-2022, Intel Corporation
+ Copyright (c) 2019-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/const.inc b/lib/include/const.inc
index 57c475e5..ca3160ed 100644
--- a/lib/include/const.inc
+++ b/lib/include/const.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/constant_lookup.h b/lib/include/constant_lookup.h
index b8728a1a..3f6fea08 100644
--- a/lib/include/constant_lookup.h
+++ b/lib/include/constant_lookup.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2019-2022, Intel Corporation
+  Copyright (c) 2019-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/constant_lookup.inc b/lib/include/constant_lookup.inc
index 46d41833..4b9f19c3 100644
--- a/lib/include/constant_lookup.inc
+++ b/lib/include/constant_lookup.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/constants.h b/lib/include/constants.h
index fd1b342e..91b21afa 100644
--- a/lib/include/constants.h
+++ b/lib/include/constants.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2012-2022, Intel Corporation
+  Copyright (c) 2012-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/constants.inc b/lib/include/constants.inc
index dbb7c19a..152c1ca3 100644
--- a/lib/include/constants.inc
+++ b/lib/include/constants.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/cpu_feature.h b/lib/include/cpu_feature.h
index 97e4d4bd..8e3f3a47 100644
--- a/lib/include/cpu_feature.h
+++ b/lib/include/cpu_feature.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2018-2022, Intel Corporation
+  Copyright (c) 2018-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/crc32.inc b/lib/include/crc32.inc
index cebdb407..80cf2d14 100644
--- a/lib/include/crc32.inc
+++ b/lib/include/crc32.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/crc32_const.inc b/lib/include/crc32_const.inc
index 9bb2b6e4..9977d5e1 100644
--- a/lib/include/crc32_const.inc
+++ b/lib/include/crc32_const.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/crc32_refl.inc b/lib/include/crc32_refl.inc
index 5439a7ac..4dd77fa7 100644
--- a/lib/include/crc32_refl.inc
+++ b/lib/include/crc32_refl.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/crc32_refl_const.inc b/lib/include/crc32_refl_const.inc
index 5f5e466e..ff05e12d 100644
--- a/lib/include/crc32_refl_const.inc
+++ b/lib/include/crc32_refl_const.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/datastruct.inc b/lib/include/datastruct.inc
index b0af5f99..c5afc136 100644
--- a/lib/include/datastruct.inc
+++ b/lib/include/datastruct.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/dbgprint.inc b/lib/include/dbgprint.inc
index ec6944fb..1cd66928 100644
--- a/lib/include/dbgprint.inc
+++ b/lib/include/dbgprint.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/des.h b/lib/include/des.h
index f8944b3a..39ae99ea 100644
--- a/lib/include/des.h
+++ b/lib/include/des.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2017-2022, Intel Corporation
+  Copyright (c) 2017-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/des_utils.h b/lib/include/des_utils.h
index 03554086..cebcb52a 100644
--- a/lib/include/des_utils.h
+++ b/lib/include/des_utils.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2017-2022, Intel Corporation
+  Copyright (c) 2017-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/docsis_common.h b/lib/include/docsis_common.h
index 365fad05..daea8327 100644
--- a/lib/include/docsis_common.h
+++ b/lib/include/docsis_common.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2019-2022, Intel Corporation
+  Copyright (c) 2019-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/error.h b/lib/include/error.h
index 778df4b1..ec9936f0 100644
--- a/lib/include/error.h
+++ b/lib/include/error.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2020-2022, Intel Corporation
+  Copyright (c) 2020-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/error.inc b/lib/include/error.inc
index ae0ec181..28c39722 100644
--- a/lib/include/error.inc
+++ b/lib/include/error.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/gcm.h b/lib/include/gcm.h
index 124d3345..ea539e3d 100644
--- a/lib/include/gcm.h
+++ b/lib/include/gcm.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2018-2022, Intel Corporation
+  Copyright (c) 2018-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/gcm_api_sse.inc b/lib/include/gcm_api_sse.inc
index 87403397..90d681ec 100644
--- a/lib/include/gcm_api_sse.inc
+++ b/lib/include/gcm_api_sse.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/include/gcm_api_vaes_avx512.inc b/lib/include/gcm_api_vaes_avx512.inc
index 14378b10..a897c13c 100644
--- a/lib/include/gcm_api_vaes_avx512.inc
+++ b/lib/include/gcm_api_vaes_avx512.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/include/gcm_common.inc b/lib/include/gcm_common.inc
index 3bdc4f4a..7cab9760 100644
--- a/lib/include/gcm_common.inc
+++ b/lib/include/gcm_common.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/gcm_defines.inc b/lib/include/gcm_defines.inc
index 3d206197..bc405ebc 100644
--- a/lib/include/gcm_defines.inc
+++ b/lib/include/gcm_defines.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/gcm_gmac_api_sse.inc b/lib/include/gcm_gmac_api_sse.inc
index 98e4c2d8..f22fe3c6 100644
--- a/lib/include/gcm_gmac_api_sse.inc
+++ b/lib/include/gcm_gmac_api_sse.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/include/gcm_gmac_api_vaes_avx512.inc b/lib/include/gcm_gmac_api_vaes_avx512.inc
index c8c23b1b..b82e86da 100644
--- a/lib/include/gcm_gmac_api_vaes_avx512.inc
+++ b/lib/include/gcm_gmac_api_vaes_avx512.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/include/gcm_keys_avx2_avx512.inc b/lib/include/gcm_keys_avx2_avx512.inc
index 64fec024..e9605c67 100644
--- a/lib/include/gcm_keys_avx2_avx512.inc
+++ b/lib/include/gcm_keys_avx2_avx512.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/gcm_keys_sse_avx.inc b/lib/include/gcm_keys_sse_avx.inc
index 16eb60d1..5e9eea7a 100644
--- a/lib/include/gcm_keys_sse_avx.inc
+++ b/lib/include/gcm_keys_sse_avx.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/gcm_keys_vaes_avx512.inc b/lib/include/gcm_keys_vaes_avx512.inc
index 84560774..5419f4d6 100644
--- a/lib/include/gcm_keys_vaes_avx512.inc
+++ b/lib/include/gcm_keys_vaes_avx512.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/gcm_sgl_api_sse.inc b/lib/include/gcm_sgl_api_sse.inc
index 63449bc9..a8b9fdab 100644
--- a/lib/include/gcm_sgl_api_sse.inc
+++ b/lib/include/gcm_sgl_api_sse.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/include/gcm_sgl_api_vaes_avx512.inc b/lib/include/gcm_sgl_api_vaes_avx512.inc
index 2ac2c43f..ecdcf4cc 100644
--- a/lib/include/gcm_sgl_api_vaes_avx512.inc
+++ b/lib/include/gcm_sgl_api_vaes_avx512.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/include/gcm_vaes_avx512.inc b/lib/include/gcm_vaes_avx512.inc
index 02e6c536..8298b341 100644
--- a/lib/include/gcm_vaes_avx512.inc
+++ b/lib/include/gcm_vaes_avx512.inc
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/include/imb_job.inc b/lib/include/imb_job.inc
index 0e24adcb..e545b1f9 100644
--- a/lib/include/imb_job.inc
+++ b/lib/include/imb_job.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/ipsec_ooo_mgr.h b/lib/include/ipsec_ooo_mgr.h
index efa54629..ba71c313 100644
--- a/lib/include/ipsec_ooo_mgr.h
+++ b/lib/include/ipsec_ooo_mgr.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2012-2022, Intel Corporation
+  Copyright (c) 2012-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/job_api_docsis.h b/lib/include/job_api_docsis.h
index c3202bd3..7dc694e9 100644
--- a/lib/include/job_api_docsis.h
+++ b/lib/include/job_api_docsis.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/job_api_gcm.h b/lib/include/job_api_gcm.h
index f510aa0b..1aca0758 100644
--- a/lib/include/job_api_gcm.h
+++ b/lib/include/job_api_gcm.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/job_api_kasumi.h b/lib/include/job_api_kasumi.h
index f29df9a3..ee1e3060 100644
--- a/lib/include/job_api_kasumi.h
+++ b/lib/include/job_api_kasumi.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/job_api_snowv.h b/lib/include/job_api_snowv.h
index 826eabfe..cca2938c 100644
--- a/lib/include/job_api_snowv.h
+++ b/lib/include/job_api_snowv.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/kasumi_interface.h b/lib/include/kasumi_interface.h
index b8c6e869..91d02f23 100644
--- a/lib/include/kasumi_interface.h
+++ b/lib/include/kasumi_interface.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/kasumi_internal.h b/lib/include/kasumi_internal.h
index 26b32ed5..d9d26068 100755
--- a/lib/include/kasumi_internal.h
+++ b/lib/include/kasumi_internal.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/mb_mgr_burst.h b/lib/include/mb_mgr_burst.h
index 3ed6a673..37d66934 100644
--- a/lib/include/mb_mgr_burst.h
+++ b/lib/include/mb_mgr_burst.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/mb_mgr_burst_async.h b/lib/include/mb_mgr_burst_async.h
index ee936007..3f42bbae 100644
--- a/lib/include/mb_mgr_burst_async.h
+++ b/lib/include/mb_mgr_burst_async.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/mb_mgr_code.h b/lib/include/mb_mgr_code.h
index e662adba..e2f2f954 100644
--- a/lib/include/mb_mgr_code.h
+++ b/lib/include/mb_mgr_code.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2012-2022, Intel Corporation
+  Copyright (c) 2012-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/mb_mgr_datastruct.inc b/lib/include/mb_mgr_datastruct.inc
index ec7a2c6f..da06c842 100644
--- a/lib/include/mb_mgr_datastruct.inc
+++ b/lib/include/mb_mgr_datastruct.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/mb_mgr_job_api.h b/lib/include/mb_mgr_job_api.h
index a56ea7e5..88a45bac 100644
--- a/lib/include/mb_mgr_job_api.h
+++ b/lib/include/mb_mgr_job_api.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/mb_mgr_job_check.h b/lib/include/mb_mgr_job_check.h
index 2416118b..0149abec 100644
--- a/lib/include/mb_mgr_job_check.h
+++ b/lib/include/mb_mgr_job_check.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/memcpy.h b/lib/include/memcpy.h
index 20e9ac35..89fa0ded 100644
--- a/lib/include/memcpy.h
+++ b/lib/include/memcpy.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2020-2022, Intel Corporation
+ Copyright (c) 2020-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/memcpy.inc b/lib/include/memcpy.inc
index b86d67e8..2596b2b6 100644
--- a/lib/include/memcpy.inc
+++ b/lib/include/memcpy.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/noaesni.h b/lib/include/noaesni.h
index 6e6d9c90..9e89ac72 100644
--- a/lib/include/noaesni.h
+++ b/lib/include/noaesni.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2018-2022, Intel Corporation
+  Copyright (c) 2018-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/ooo_mgr_reset.h b/lib/include/ooo_mgr_reset.h
index 1d4c9476..3b13437a 100644
--- a/lib/include/ooo_mgr_reset.h
+++ b/lib/include/ooo_mgr_reset.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/os.inc b/lib/include/os.inc
index f1ead7ff..f0f30920 100644
--- a/lib/include/os.inc
+++ b/lib/include/os.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/reg_sizes.inc b/lib/include/reg_sizes.inc
index 25629871..42f14e2d 100644
--- a/lib/include/reg_sizes.inc
+++ b/lib/include/reg_sizes.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/save_xmms.h b/lib/include/save_xmms.h
index 4a96d744..4a63c2b0 100644
--- a/lib/include/save_xmms.h
+++ b/lib/include/save_xmms.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
- Copyright (c) 2012-2022, Intel Corporation
+ Copyright (c) 2012-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/sha_generic.h b/lib/include/sha_generic.h
index d71946f4..c7f51e72 100644
--- a/lib/include/sha_generic.h
+++ b/lib/include/sha_generic.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2020-2022, Intel Corporation
+  Copyright (c) 2020-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/sha_mb_mgr.h b/lib/include/sha_mb_mgr.h
index 8b4ce721..c2e61e33 100644
--- a/lib/include/sha_mb_mgr.h
+++ b/lib/include/sha_mb_mgr.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/snow3g.h b/lib/include/snow3g.h
index 24555e2f..825b6309 100644
--- a/lib/include/snow3g.h
+++ b/lib/include/snow3g.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/snow3g_common.h b/lib/include/snow3g_common.h
index f50ce1ee..fe380afd 100644
--- a/lib/include/snow3g_common.h
+++ b/lib/include/snow3g_common.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/snow3g_submit.h b/lib/include/snow3g_submit.h
index 521a4f22..1f729311 100644
--- a/lib/include/snow3g_submit.h
+++ b/lib/include/snow3g_submit.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2012-2022, Intel Corporation
+  Copyright (c) 2012-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/snow3g_tables.h b/lib/include/snow3g_tables.h
index 8b43f286..47fdaaa5 100644
--- a/lib/include/snow3g_tables.h
+++ b/lib/include/snow3g_tables.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/snow3g_uea2_by16_vaes_avx512.inc b/lib/include/snow3g_uea2_by16_vaes_avx512.inc
index 303e83b5..6eea8072 100644
--- a/lib/include/snow3g_uea2_by16_vaes_avx512.inc
+++ b/lib/include/snow3g_uea2_by16_vaes_avx512.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/snow3g_uea2_by4_sse.inc b/lib/include/snow3g_uea2_by4_sse.inc
index 840dbe49..55421776 100644
--- a/lib/include/snow3g_uea2_by4_sse.inc
+++ b/lib/include/snow3g_uea2_by4_sse.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/transpose_avx2.inc b/lib/include/transpose_avx2.inc
index faf121ca..4469a838 100644
--- a/lib/include/transpose_avx2.inc
+++ b/lib/include/transpose_avx2.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/transpose_avx512.inc b/lib/include/transpose_avx512.inc
index 6ece8fc4..f0bac7d9 100644
--- a/lib/include/transpose_avx512.inc
+++ b/lib/include/transpose_avx512.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/transpose_sse.inc b/lib/include/transpose_sse.inc
index 6ada0dc3..5c4b26ea 100644
--- a/lib/include/transpose_sse.inc
+++ b/lib/include/transpose_sse.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/wireless_common.h b/lib/include/wireless_common.h
index 4f838c4a..63416607 100644
--- a/lib/include/wireless_common.h
+++ b/lib/include/wireless_common.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/zuc_internal.h b/lib/include/zuc_internal.h
index 69080215..da5b5595 100755
--- a/lib/include/zuc_internal.h
+++ b/lib/include/zuc_internal.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/include/zuc_sbox.inc b/lib/include/zuc_sbox.inc
index 26c2131d..177b3383 100644
--- a/lib/include/zuc_sbox.inc
+++ b/lib/include/zuc_sbox.inc
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/libipsec-mb.7 b/lib/libipsec-mb.7
index 33360316..306c7e07 100644
--- a/lib/libipsec-mb.7
+++ b/lib/libipsec-mb.7
@@ -1,5 +1,5 @@
 .\"                                      Hey, EMACS: -*- nroff -*-
-.\" Copyright (c) 2018-2022, Intel Corporation, written by Tomasz Kantecki
+.\" Copyright (c) 2018-2023, Intel Corporation, written by Tomasz Kantecki
 .\"     <tomasz.kantecki@intel.com>
 .\"
 .\" %%%LICENSE_START(VERBATIM)
diff --git a/lib/no-aesni/aes128_cbc_dec_by4_sse_no_aesni.asm b/lib/no-aesni/aes128_cbc_dec_by4_sse_no_aesni.asm
index 7fef27fe..7b164d95 100644
--- a/lib/no-aesni/aes128_cbc_dec_by4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes128_cbc_dec_by4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes128_cbc_enc_x4_sse_no_aesni.asm b/lib/no-aesni/aes128_cbc_enc_x4_sse_no_aesni.asm
index c925419a..d51f0e45 100644
--- a/lib/no-aesni/aes128_cbc_enc_x4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes128_cbc_enc_x4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes128_cbc_mac_x4_sse_no_aesni.asm b/lib/no-aesni/aes128_cbc_mac_x4_sse_no_aesni.asm
index 999176ea..d4e52382 100644
--- a/lib/no-aesni/aes128_cbc_mac_x4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes128_cbc_mac_x4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes128_cbcs_1_9_dec_by4_sse_no_aesni.asm b/lib/no-aesni/aes128_cbcs_1_9_dec_by4_sse_no_aesni.asm
index c30441ad..3bdb131e 100644
--- a/lib/no-aesni/aes128_cbcs_1_9_dec_by4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes128_cbcs_1_9_dec_by4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes128_cbcs_1_9_enc_x4_sse_no_aesni.asm b/lib/no-aesni/aes128_cbcs_1_9_enc_x4_sse_no_aesni.asm
index ce0f0cb1..a2002a3d 100644
--- a/lib/no-aesni/aes128_cbcs_1_9_enc_x4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes128_cbcs_1_9_enc_x4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes128_cntr_by8_sse_no_aesni.asm b/lib/no-aesni/aes128_cntr_by8_sse_no_aesni.asm
index 5e001722..12fa2f69 100644
--- a/lib/no-aesni/aes128_cntr_by8_sse_no_aesni.asm
+++ b/lib/no-aesni/aes128_cntr_by8_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes128_cntr_ccm_by8_sse_no_aesni.asm b/lib/no-aesni/aes128_cntr_ccm_by8_sse_no_aesni.asm
index e3e5d0f4..08c6d08b 100644
--- a/lib/no-aesni/aes128_cntr_ccm_by8_sse_no_aesni.asm
+++ b/lib/no-aesni/aes128_cntr_ccm_by8_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes128_xcbc_mac_x4_sse_no_aesni.asm b/lib/no-aesni/aes128_xcbc_mac_x4_sse_no_aesni.asm
index 20c4ff6c..eed20f35 100644
--- a/lib/no-aesni/aes128_xcbc_mac_x4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes128_xcbc_mac_x4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes192_cbc_dec_by4_sse_no_aesni.asm b/lib/no-aesni/aes192_cbc_dec_by4_sse_no_aesni.asm
index b4d9c7ae..c1d37a54 100644
--- a/lib/no-aesni/aes192_cbc_dec_by4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes192_cbc_dec_by4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes192_cbc_enc_x4_sse_no_aesni.asm b/lib/no-aesni/aes192_cbc_enc_x4_sse_no_aesni.asm
index 720ccb50..897ba0e5 100644
--- a/lib/no-aesni/aes192_cbc_enc_x4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes192_cbc_enc_x4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes192_cntr_by8_sse_no_aesni.asm b/lib/no-aesni/aes192_cntr_by8_sse_no_aesni.asm
index 4f9cb9ad..5d45b9d0 100644
--- a/lib/no-aesni/aes192_cntr_by8_sse_no_aesni.asm
+++ b/lib/no-aesni/aes192_cntr_by8_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes256_cbc_dec_by4_sse_no_aesni.asm b/lib/no-aesni/aes256_cbc_dec_by4_sse_no_aesni.asm
index a4f1d010..7a91fa65 100644
--- a/lib/no-aesni/aes256_cbc_dec_by4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes256_cbc_dec_by4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes256_cbc_enc_x4_sse_no_aesni.asm b/lib/no-aesni/aes256_cbc_enc_x4_sse_no_aesni.asm
index 4c6ae009..ce8e21ed 100644
--- a/lib/no-aesni/aes256_cbc_enc_x4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes256_cbc_enc_x4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes256_cbc_mac_x4_sse_no_aesni.asm b/lib/no-aesni/aes256_cbc_mac_x4_sse_no_aesni.asm
index ee31c351..0160a305 100644
--- a/lib/no-aesni/aes256_cbc_mac_x4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes256_cbc_mac_x4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes256_cntr_by8_sse_no_aesni.asm b/lib/no-aesni/aes256_cntr_by8_sse_no_aesni.asm
index 00811ff1..5529e883 100644
--- a/lib/no-aesni/aes256_cntr_by8_sse_no_aesni.asm
+++ b/lib/no-aesni/aes256_cntr_by8_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes256_cntr_ccm_by8_sse_no_aesni.asm b/lib/no-aesni/aes256_cntr_ccm_by8_sse_no_aesni.asm
index 8057968f..d0e12ed8 100644
--- a/lib/no-aesni/aes256_cntr_ccm_by8_sse_no_aesni.asm
+++ b/lib/no-aesni/aes256_cntr_ccm_by8_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes_cfb_sse_no_aesni.asm b/lib/no-aesni/aes_cfb_sse_no_aesni.asm
index 8c033ce4..89108d6c 100644
--- a/lib/no-aesni/aes_cfb_sse_no_aesni.asm
+++ b/lib/no-aesni/aes_cfb_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm b/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm
index 5a20222e..37928841 100644
--- a/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm
+++ b/lib/no-aesni/aes_ecb_by4_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/aesni_emu.c b/lib/no-aesni/aesni_emu.c
index 8e71dd29..26aacc40 100644
--- a/lib/no-aesni/aesni_emu.c
+++ b/lib/no-aesni/aesni_emu.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2018-2022, Intel Corporation
+  Copyright (c) 2018-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/crc16_x25_sse_no_aesni.asm b/lib/no-aesni/crc16_x25_sse_no_aesni.asm
index 9c46b805..bc3f1e9a 100644
--- a/lib/no-aesni/crc16_x25_sse_no_aesni.asm
+++ b/lib/no-aesni/crc16_x25_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/crc32_by8_sse_no_aesni.asm b/lib/no-aesni/crc32_by8_sse_no_aesni.asm
index 141c626b..5f849479 100644
--- a/lib/no-aesni/crc32_by8_sse_no_aesni.asm
+++ b/lib/no-aesni/crc32_by8_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/crc32_fp_sse_no_aesni.asm b/lib/no-aesni/crc32_fp_sse_no_aesni.asm
index 4dccb4e9..2b4405bb 100644
--- a/lib/no-aesni/crc32_fp_sse_no_aesni.asm
+++ b/lib/no-aesni/crc32_fp_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/crc32_iuup_sse_no_aesni.asm b/lib/no-aesni/crc32_iuup_sse_no_aesni.asm
index 663acc2b..3524d85f 100644
--- a/lib/no-aesni/crc32_iuup_sse_no_aesni.asm
+++ b/lib/no-aesni/crc32_iuup_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/crc32_lte_sse_no_aesni.asm b/lib/no-aesni/crc32_lte_sse_no_aesni.asm
index 9b21b49e..7c3af7a6 100644
--- a/lib/no-aesni/crc32_lte_sse_no_aesni.asm
+++ b/lib/no-aesni/crc32_lte_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/crc32_refl_by8_sse_no_aesni.asm b/lib/no-aesni/crc32_refl_by8_sse_no_aesni.asm
index 53027208..fa76463b 100644
--- a/lib/no-aesni/crc32_refl_by8_sse_no_aesni.asm
+++ b/lib/no-aesni/crc32_refl_by8_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/crc32_sctp_sse_no_aesni.asm b/lib/no-aesni/crc32_sctp_sse_no_aesni.asm
index 2f7d9b6b..3399cbcb 100644
--- a/lib/no-aesni/crc32_sctp_sse_no_aesni.asm
+++ b/lib/no-aesni/crc32_sctp_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/crc32_wimax_sse_no_aesni.asm b/lib/no-aesni/crc32_wimax_sse_no_aesni.asm
index 0c694829..ea5b9ff8 100644
--- a/lib/no-aesni/crc32_wimax_sse_no_aesni.asm
+++ b/lib/no-aesni/crc32_wimax_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/ethernet_fcs_sse_no_aesni.asm b/lib/no-aesni/ethernet_fcs_sse_no_aesni.asm
index c0f9f0fc..176eb4bf 100644
--- a/lib/no-aesni/ethernet_fcs_sse_no_aesni.asm
+++ b/lib/no-aesni/ethernet_fcs_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/gcm128_api_sse_no_aesni.asm b/lib/no-aesni/gcm128_api_sse_no_aesni.asm
index e116bcf6..741e841e 100644
--- a/lib/no-aesni/gcm128_api_sse_no_aesni.asm
+++ b/lib/no-aesni/gcm128_api_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/no-aesni/gcm128_gmac_api_sse_no_aesni.asm b/lib/no-aesni/gcm128_gmac_api_sse_no_aesni.asm
index 8fa5c283..aa380e64 100644
--- a/lib/no-aesni/gcm128_gmac_api_sse_no_aesni.asm
+++ b/lib/no-aesni/gcm128_gmac_api_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/no-aesni/gcm128_sgl_api_sse_no_aesni.asm b/lib/no-aesni/gcm128_sgl_api_sse_no_aesni.asm
index a6750c2f..0d3ecb82 100644
--- a/lib/no-aesni/gcm128_sgl_api_sse_no_aesni.asm
+++ b/lib/no-aesni/gcm128_sgl_api_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/no-aesni/gcm192_api_sse_no_aesni.asm b/lib/no-aesni/gcm192_api_sse_no_aesni.asm
index efe16366..25d6d14a 100644
--- a/lib/no-aesni/gcm192_api_sse_no_aesni.asm
+++ b/lib/no-aesni/gcm192_api_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/no-aesni/gcm192_gmac_api_sse_no_aesni.asm b/lib/no-aesni/gcm192_gmac_api_sse_no_aesni.asm
index 8c6345be..331bbf4c 100644
--- a/lib/no-aesni/gcm192_gmac_api_sse_no_aesni.asm
+++ b/lib/no-aesni/gcm192_gmac_api_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/no-aesni/gcm192_sgl_api_sse_no_aesni.asm b/lib/no-aesni/gcm192_sgl_api_sse_no_aesni.asm
index 7a0a962e..c1afbbea 100644
--- a/lib/no-aesni/gcm192_sgl_api_sse_no_aesni.asm
+++ b/lib/no-aesni/gcm192_sgl_api_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/no-aesni/gcm256_api_sse_no_aesni.asm b/lib/no-aesni/gcm256_api_sse_no_aesni.asm
index 320ec91e..cf050440 100644
--- a/lib/no-aesni/gcm256_api_sse_no_aesni.asm
+++ b/lib/no-aesni/gcm256_api_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/no-aesni/gcm256_gmac_api_sse_no_aesni.asm b/lib/no-aesni/gcm256_gmac_api_sse_no_aesni.asm
index 25074319..f6dfbe39 100644
--- a/lib/no-aesni/gcm256_gmac_api_sse_no_aesni.asm
+++ b/lib/no-aesni/gcm256_gmac_api_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/no-aesni/gcm256_sgl_api_sse_no_aesni.asm b/lib/no-aesni/gcm256_sgl_api_sse_no_aesni.asm
index 713924e7..c0a4535c 100644
--- a/lib/no-aesni/gcm256_sgl_api_sse_no_aesni.asm
+++ b/lib/no-aesni/gcm256_sgl_api_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2018-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2018-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/no-aesni/mb_mgr_aes128_cbc_enc_flush_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes128_cbc_enc_flush_sse_no_aesni.asm
index f0cc5e80..d955d1c3 100644
--- a/lib/no-aesni/mb_mgr_aes128_cbc_enc_flush_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes128_cbc_enc_flush_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes128_cbc_enc_submit_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes128_cbc_enc_submit_sse_no_aesni.asm
index 76332f37..efe896e0 100644
--- a/lib/no-aesni/mb_mgr_aes128_cbc_enc_submit_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes128_cbc_enc_submit_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes128_cbcs_1_9_flush_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes128_cbcs_1_9_flush_sse_no_aesni.asm
index a6bca7a0..4d55948f 100644
--- a/lib/no-aesni/mb_mgr_aes128_cbcs_1_9_flush_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes128_cbcs_1_9_flush_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes128_cbcs_1_9_submit_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes128_cbcs_1_9_submit_sse_no_aesni.asm
index 1793d305..83da5c11 100644
--- a/lib/no-aesni/mb_mgr_aes128_cbcs_1_9_submit_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes128_cbcs_1_9_submit_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes128_ccm_auth_submit_flush_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes128_ccm_auth_submit_flush_sse_no_aesni.asm
index e8862839..6a28f6c7 100644
--- a/lib/no-aesni/mb_mgr_aes128_ccm_auth_submit_flush_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes128_ccm_auth_submit_flush_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes128_cmac_submit_flush_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes128_cmac_submit_flush_sse_no_aesni.asm
index dfd49155..13f1a52e 100644
--- a/lib/no-aesni/mb_mgr_aes128_cmac_submit_flush_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes128_cmac_submit_flush_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes128_xcbc_flush_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes128_xcbc_flush_sse_no_aesni.asm
index 116f0ab1..9034f35a 100644
--- a/lib/no-aesni/mb_mgr_aes128_xcbc_flush_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes128_xcbc_flush_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes128_xcbc_submit_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes128_xcbc_submit_sse_no_aesni.asm
index 20b036ea..3b7b0e21 100644
--- a/lib/no-aesni/mb_mgr_aes128_xcbc_submit_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes128_xcbc_submit_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes192_cbc_enc_flush_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes192_cbc_enc_flush_sse_no_aesni.asm
index e700ca62..b78423ad 100644
--- a/lib/no-aesni/mb_mgr_aes192_cbc_enc_flush_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes192_cbc_enc_flush_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes192_cbc_enc_submit_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes192_cbc_enc_submit_sse_no_aesni.asm
index 50c86fe7..99c908b4 100644
--- a/lib/no-aesni/mb_mgr_aes192_cbc_enc_submit_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes192_cbc_enc_submit_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes256_cbc_enc_flush_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes256_cbc_enc_flush_sse_no_aesni.asm
index 4256da5f..66a16597 100644
--- a/lib/no-aesni/mb_mgr_aes256_cbc_enc_flush_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes256_cbc_enc_flush_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes256_cbc_enc_submit_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes256_cbc_enc_submit_sse_no_aesni.asm
index 46de48da..ef98ea86 100644
--- a/lib/no-aesni/mb_mgr_aes256_cbc_enc_submit_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes256_cbc_enc_submit_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes256_ccm_auth_submit_flush_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes256_ccm_auth_submit_flush_sse_no_aesni.asm
index 02af37da..06147ebd 100644
--- a/lib/no-aesni/mb_mgr_aes256_ccm_auth_submit_flush_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes256_ccm_auth_submit_flush_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_aes256_cmac_submit_flush_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_aes256_cmac_submit_flush_sse_no_aesni.asm
index 7d543d0e..f7bcc99e 100644
--- a/lib/no-aesni/mb_mgr_aes256_cmac_submit_flush_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_aes256_cmac_submit_flush_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_sse_no_aesni.c b/lib/no-aesni/mb_mgr_sse_no_aesni.c
index 8fd7076c..1fa32332 100644
--- a/lib/no-aesni/mb_mgr_sse_no_aesni.c
+++ b/lib/no-aesni/mb_mgr_sse_no_aesni.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2018-2022, Intel Corporation
+  Copyright (c) 2018-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/mb_mgr_zuc_submit_flush_sse_no_aesni.asm b/lib/no-aesni/mb_mgr_zuc_submit_flush_sse_no_aesni.asm
index 2b3009c2..5a15500e 100644
--- a/lib/no-aesni/mb_mgr_zuc_submit_flush_sse_no_aesni.asm
+++ b/lib/no-aesni/mb_mgr_zuc_submit_flush_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/pon_sse_no_aesni.asm b/lib/no-aesni/pon_sse_no_aesni.asm
index 65170f1d..a526bf84 100644
--- a/lib/no-aesni/pon_sse_no_aesni.asm
+++ b/lib/no-aesni/pon_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/snow3g_sse_no_aesni.c b/lib/no-aesni/snow3g_sse_no_aesni.c
index 930e5cac..7112221a 100644
--- a/lib/no-aesni/snow3g_sse_no_aesni.c
+++ b/lib/no-aesni/snow3g_sse_no_aesni.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2019-2022, Intel Corporation
+  Copyright (c) 2019-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/snow3g_uia2_sse_no_aesni.asm b/lib/no-aesni/snow3g_uia2_sse_no_aesni.asm
index 676912cf..0ef6fedd 100644
--- a/lib/no-aesni/snow3g_uia2_sse_no_aesni.asm
+++ b/lib/no-aesni/snow3g_uia2_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/snow_v_sse_no_aesni.asm b/lib/no-aesni/snow_v_sse_no_aesni.asm
index 65559065..3f9158e6 100644
--- a/lib/no-aesni/snow_v_sse_no_aesni.asm
+++ b/lib/no-aesni/snow_v_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/zuc_sse_no_aesni.asm b/lib/no-aesni/zuc_sse_no_aesni.asm
index d43e99d7..87ccf5b8 100644
--- a/lib/no-aesni/zuc_sse_no_aesni.asm
+++ b/lib/no-aesni/zuc_sse_no_aesni.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/no-aesni/zuc_top_sse_no_aesni.c b/lib/no-aesni/zuc_top_sse_no_aesni.c
index d0f646f6..ac422e0a 100644
--- a/lib/no-aesni/zuc_top_sse_no_aesni.c
+++ b/lib/no-aesni/zuc_top_sse_no_aesni.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes128_cbc_dec_by4_sse.asm b/lib/sse_t1/aes128_cbc_dec_by4_sse.asm
index 9fdb6115..186d1be1 100644
--- a/lib/sse_t1/aes128_cbc_dec_by4_sse.asm
+++ b/lib/sse_t1/aes128_cbc_dec_by4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes128_cbc_enc_x4_sse.asm b/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
index 18a1628a..8850b66b 100644
--- a/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes128_cbc_enc_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes128_cbc_mac_x4_sse.asm b/lib/sse_t1/aes128_cbc_mac_x4_sse.asm
index 52726f1b..4d0e9182 100644
--- a/lib/sse_t1/aes128_cbc_mac_x4_sse.asm
+++ b/lib/sse_t1/aes128_cbc_mac_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes128_cbcs_1_9_dec_by4_sse.asm b/lib/sse_t1/aes128_cbcs_1_9_dec_by4_sse.asm
index fcef251c..e1deeb92 100644
--- a/lib/sse_t1/aes128_cbcs_1_9_dec_by4_sse.asm
+++ b/lib/sse_t1/aes128_cbcs_1_9_dec_by4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes128_cbcs_1_9_enc_x4_sse.asm b/lib/sse_t1/aes128_cbcs_1_9_enc_x4_sse.asm
index 77e9a3a0..93fc66ed 100644
--- a/lib/sse_t1/aes128_cbcs_1_9_enc_x4_sse.asm
+++ b/lib/sse_t1/aes128_cbcs_1_9_enc_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes128_cntr_by8_sse.asm b/lib/sse_t1/aes128_cntr_by8_sse.asm
index 8d709273..84879607 100644
--- a/lib/sse_t1/aes128_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes128_cntr_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes128_cntr_ccm_by8_sse.asm b/lib/sse_t1/aes128_cntr_ccm_by8_sse.asm
index 3b2e16c8..48d3f067 100644
--- a/lib/sse_t1/aes128_cntr_ccm_by8_sse.asm
+++ b/lib/sse_t1/aes128_cntr_ccm_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes128_ecb_by4_sse.asm b/lib/sse_t1/aes128_ecb_by4_sse.asm
index 72c84159..2bc4dbdf 100644
--- a/lib/sse_t1/aes128_ecb_by4_sse.asm
+++ b/lib/sse_t1/aes128_ecb_by4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes128_xcbc_mac_x4_sse.asm b/lib/sse_t1/aes128_xcbc_mac_x4_sse.asm
index 376327c3..cc142548 100644
--- a/lib/sse_t1/aes128_xcbc_mac_x4_sse.asm
+++ b/lib/sse_t1/aes128_xcbc_mac_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes192_cbc_dec_by4_sse.asm b/lib/sse_t1/aes192_cbc_dec_by4_sse.asm
index 9470cbfc..af883054 100644
--- a/lib/sse_t1/aes192_cbc_dec_by4_sse.asm
+++ b/lib/sse_t1/aes192_cbc_dec_by4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes192_cbc_enc_x4_sse.asm b/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
index f82a6c0e..f86494d6 100644
--- a/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes192_cbc_enc_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes192_cntr_by8_sse.asm b/lib/sse_t1/aes192_cntr_by8_sse.asm
index dda4c4e4..2abfbbb1 100644
--- a/lib/sse_t1/aes192_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes192_cntr_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes192_ecb_by4_sse.asm b/lib/sse_t1/aes192_ecb_by4_sse.asm
index fcad26e5..8a607f12 100644
--- a/lib/sse_t1/aes192_ecb_by4_sse.asm
+++ b/lib/sse_t1/aes192_ecb_by4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes256_cbc_dec_by4_sse.asm b/lib/sse_t1/aes256_cbc_dec_by4_sse.asm
index 72225799..40e29749 100644
--- a/lib/sse_t1/aes256_cbc_dec_by4_sse.asm
+++ b/lib/sse_t1/aes256_cbc_dec_by4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes256_cbc_enc_x4_sse.asm b/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
index abcd8f36..b7f23a8a 100644
--- a/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
+++ b/lib/sse_t1/aes256_cbc_enc_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes256_cbc_mac_x4_sse.asm b/lib/sse_t1/aes256_cbc_mac_x4_sse.asm
index 998c8434..77a9631b 100644
--- a/lib/sse_t1/aes256_cbc_mac_x4_sse.asm
+++ b/lib/sse_t1/aes256_cbc_mac_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes256_cntr_by8_sse.asm b/lib/sse_t1/aes256_cntr_by8_sse.asm
index ca98c2b9..f3e304bb 100644
--- a/lib/sse_t1/aes256_cntr_by8_sse.asm
+++ b/lib/sse_t1/aes256_cntr_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes256_cntr_ccm_by8_sse.asm b/lib/sse_t1/aes256_cntr_ccm_by8_sse.asm
index 94c9c2d2..6129b1a1 100644
--- a/lib/sse_t1/aes256_cntr_ccm_by8_sse.asm
+++ b/lib/sse_t1/aes256_cntr_ccm_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes256_ecb_by4_sse.asm b/lib/sse_t1/aes256_ecb_by4_sse.asm
index 703ede73..cb063e85 100644
--- a/lib/sse_t1/aes256_ecb_by4_sse.asm
+++ b/lib/sse_t1/aes256_ecb_by4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/aes_cfb_sse.asm b/lib/sse_t1/aes_cfb_sse.asm
index dee9caab..4df7df65 100644
--- a/lib/sse_t1/aes_cfb_sse.asm
+++ b/lib/sse_t1/aes_cfb_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/chacha20_sse.asm b/lib/sse_t1/chacha20_sse.asm
index 9c9eb7fe..4458a8f8 100644
--- a/lib/sse_t1/chacha20_sse.asm
+++ b/lib/sse_t1/chacha20_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/crc16_x25_sse.asm b/lib/sse_t1/crc16_x25_sse.asm
index 47154ea7..446701f2 100644
--- a/lib/sse_t1/crc16_x25_sse.asm
+++ b/lib/sse_t1/crc16_x25_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/crc32_by8_sse.asm b/lib/sse_t1/crc32_by8_sse.asm
index 61422bc1..9896f880 100644
--- a/lib/sse_t1/crc32_by8_sse.asm
+++ b/lib/sse_t1/crc32_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/crc32_fp_sse.asm b/lib/sse_t1/crc32_fp_sse.asm
index 0cc943ed..6357916a 100644
--- a/lib/sse_t1/crc32_fp_sse.asm
+++ b/lib/sse_t1/crc32_fp_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/crc32_iuup_sse.asm b/lib/sse_t1/crc32_iuup_sse.asm
index 7de78090..e08c83d3 100644
--- a/lib/sse_t1/crc32_iuup_sse.asm
+++ b/lib/sse_t1/crc32_iuup_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/crc32_lte_sse.asm b/lib/sse_t1/crc32_lte_sse.asm
index 956db449..f490d4db 100644
--- a/lib/sse_t1/crc32_lte_sse.asm
+++ b/lib/sse_t1/crc32_lte_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/crc32_refl_by8_sse.asm b/lib/sse_t1/crc32_refl_by8_sse.asm
index 990c1592..39d20069 100644
--- a/lib/sse_t1/crc32_refl_by8_sse.asm
+++ b/lib/sse_t1/crc32_refl_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/crc32_sctp_sse.asm b/lib/sse_t1/crc32_sctp_sse.asm
index 563ef70e..a2fa5b43 100644
--- a/lib/sse_t1/crc32_sctp_sse.asm
+++ b/lib/sse_t1/crc32_sctp_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/crc32_wimax_sse.asm b/lib/sse_t1/crc32_wimax_sse.asm
index aba2b859..be8e0ba1 100644
--- a/lib/sse_t1/crc32_wimax_sse.asm
+++ b/lib/sse_t1/crc32_wimax_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/ethernet_fcs_sse.asm b/lib/sse_t1/ethernet_fcs_sse.asm
index 2b9180bd..c8271fa9 100644
--- a/lib/sse_t1/ethernet_fcs_sse.asm
+++ b/lib/sse_t1/ethernet_fcs_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/gcm128_api_by8_sse.asm b/lib/sse_t1/gcm128_api_by8_sse.asm
index adbfc880..b2ec5cbe 100644
--- a/lib/sse_t1/gcm128_api_by8_sse.asm
+++ b/lib/sse_t1/gcm128_api_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/sse_t1/gcm128_gmac_api_by8_sse.asm b/lib/sse_t1/gcm128_gmac_api_by8_sse.asm
index 32fbbb42..8674746d 100644
--- a/lib/sse_t1/gcm128_gmac_api_by8_sse.asm
+++ b/lib/sse_t1/gcm128_gmac_api_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/sse_t1/gcm128_sgl_api_by8_sse.asm b/lib/sse_t1/gcm128_sgl_api_by8_sse.asm
index 5c839cbd..3ddbbc65 100644
--- a/lib/sse_t1/gcm128_sgl_api_by8_sse.asm
+++ b/lib/sse_t1/gcm128_sgl_api_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/sse_t1/gcm192_api_by8_sse.asm b/lib/sse_t1/gcm192_api_by8_sse.asm
index 89a6ae56..cac47d10 100644
--- a/lib/sse_t1/gcm192_api_by8_sse.asm
+++ b/lib/sse_t1/gcm192_api_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/sse_t1/gcm192_gmac_api_by8_sse.asm b/lib/sse_t1/gcm192_gmac_api_by8_sse.asm
index 40bcdd61..587d2b0b 100644
--- a/lib/sse_t1/gcm192_gmac_api_by8_sse.asm
+++ b/lib/sse_t1/gcm192_gmac_api_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/sse_t1/gcm192_sgl_api_by8_sse.asm b/lib/sse_t1/gcm192_sgl_api_by8_sse.asm
index 59058ca9..b3b4e48a 100644
--- a/lib/sse_t1/gcm192_sgl_api_by8_sse.asm
+++ b/lib/sse_t1/gcm192_sgl_api_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/sse_t1/gcm256_api_by8_sse.asm b/lib/sse_t1/gcm256_api_by8_sse.asm
index 87d01028..4bff1931 100644
--- a/lib/sse_t1/gcm256_api_by8_sse.asm
+++ b/lib/sse_t1/gcm256_api_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/sse_t1/gcm256_gmac_api_by8_sse.asm b/lib/sse_t1/gcm256_gmac_api_by8_sse.asm
index 4674fa12..c8678ee6 100644
--- a/lib/sse_t1/gcm256_gmac_api_by8_sse.asm
+++ b/lib/sse_t1/gcm256_gmac_api_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/sse_t1/gcm256_sgl_api_by8_sse.asm b/lib/sse_t1/gcm256_sgl_api_by8_sse.asm
index 244b4da6..9bf49c62 100644
--- a/lib/sse_t1/gcm256_sgl_api_by8_sse.asm
+++ b/lib/sse_t1/gcm256_sgl_api_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/lib/sse_t1/kasumi_sse.c b/lib/sse_t1/kasumi_sse.c
index 7bfecce4..3a63917b 100644
--- a/lib/sse_t1/kasumi_sse.c
+++ b/lib/sse_t1/kasumi_sse.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
index ede1b167..c095f759 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbc_enc_flush_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
index c50cfb14..b95ec3cd 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbc_enc_submit_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
index 72efaa1a..3ede4b67 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_flush_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
index d79258cc..815962d4 100644
--- a/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cbcs_1_9_submit_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
index 19566a55..638f50b8 100644
--- a/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_ccm_auth_submit_flush_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
index 8ecef621..dfcc08db 100644
--- a/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_cmac_submit_flush_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
index 3aeaa372..317aae17 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_flush_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
index 8a52366e..541acaeb 100644
--- a/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes128_xcbc_submit_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes192_cbc_enc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes192_cbc_enc_flush_x4_sse.asm
index b0e89607..7b825754 100644
--- a/lib/sse_t1/mb_mgr_aes192_cbc_enc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes192_cbc_enc_flush_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes192_cbc_enc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes192_cbc_enc_submit_x4_sse.asm
index 4ce3d952..e6674529 100644
--- a/lib/sse_t1/mb_mgr_aes192_cbc_enc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes192_cbc_enc_submit_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes256_cbc_enc_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes256_cbc_enc_flush_x4_sse.asm
index 5c82dd21..f5ebb1c8 100644
--- a/lib/sse_t1/mb_mgr_aes256_cbc_enc_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes256_cbc_enc_flush_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes256_cbc_enc_submit_x4_sse.asm b/lib/sse_t1/mb_mgr_aes256_cbc_enc_submit_x4_sse.asm
index 3736b445..3489895b 100644
--- a/lib/sse_t1/mb_mgr_aes256_cbc_enc_submit_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes256_cbc_enc_submit_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes256_ccm_auth_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes256_ccm_auth_submit_flush_x4_sse.asm
index 6dce9dfa..efe85e77 100644
--- a/lib/sse_t1/mb_mgr_aes256_ccm_auth_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes256_ccm_auth_submit_flush_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_aes256_cmac_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_aes256_cmac_submit_flush_x4_sse.asm
index c7c33d97..e05b9d6e 100644
--- a/lib/sse_t1/mb_mgr_aes256_cmac_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_aes256_cmac_submit_flush_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
index e604b422..c0aa2bab 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_flush_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
index 31c7c8fd..bff94e79 100644
--- a/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_md5_submit_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
index 23a567e1..57cde6d6 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_flush_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
index c30edc3d..b76b3ff2 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha1_submit_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_sha224_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha224_flush_sse.asm
index bda20459..e8d05d31 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha224_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha224_flush_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_sha224_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha224_submit_sse.asm
index bddf843e..6fc547f1 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha224_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha224_submit_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
index f4851754..87753084 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_flush_sse.asm
@@ -1,5 +1,5 @@
     ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
index 2ed3158d..d3d35615 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha256_submit_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_sha384_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha384_flush_sse.asm
index 8e95926a..2ffc76b0 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha384_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha384_flush_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_sha384_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha384_submit_sse.asm
index 37349571..dd5d4ecd 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha384_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha384_submit_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
index b8dd8ad1..903a0282 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_flush_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
index 0c254ccd..208dde6f 100644
--- a/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
+++ b/lib/sse_t1/mb_mgr_hmac_sha512_submit_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
index bdf16375..f94ae93e 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uea2_submit_flush_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
index 473bcb71..aff4de79 100644
--- a/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
+++ b/lib/sse_t1/mb_mgr_snow3g_uia2_submit_flush_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_sse.c b/lib/sse_t1/mb_mgr_sse.c
index a116969e..56d3a2e5 100644
--- a/lib/sse_t1/mb_mgr_sse.c
+++ b/lib/sse_t1/mb_mgr_sse.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2012-2022, Intel Corporation
+  Copyright (c) 2012-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_sse_t1.c b/lib/sse_t1/mb_mgr_sse_t1.c
index a4760f9c..7f2b8e2b 100644
--- a/lib/sse_t1/mb_mgr_sse_t1.c
+++ b/lib/sse_t1/mb_mgr_sse_t1.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
index 5ebb544f..0aa664b1 100644
--- a/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
+++ b/lib/sse_t1/mb_mgr_zuc_submit_flush_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/md5_x4x2_sse.asm b/lib/sse_t1/md5_x4x2_sse.asm
index a9f4874f..64f7af8e 100644
--- a/lib/sse_t1/md5_x4x2_sse.asm
+++ b/lib/sse_t1/md5_x4x2_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/memcpy_sse.asm b/lib/sse_t1/memcpy_sse.asm
index 5f369650..769790a0 100644
--- a/lib/sse_t1/memcpy_sse.asm
+++ b/lib/sse_t1/memcpy_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/pon_by8_sse.asm b/lib/sse_t1/pon_by8_sse.asm
index 8e7ccb39..948a95f7 100644
--- a/lib/sse_t1/pon_by8_sse.asm
+++ b/lib/sse_t1/pon_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/sha1_one_block_sse.asm b/lib/sse_t1/sha1_one_block_sse.asm
index 06a8c10f..2893483d 100644
--- a/lib/sse_t1/sha1_one_block_sse.asm
+++ b/lib/sse_t1/sha1_one_block_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/sha1_x4_sse.asm b/lib/sse_t1/sha1_x4_sse.asm
index 21f86d6e..2c755749 100644
--- a/lib/sse_t1/sha1_x4_sse.asm
+++ b/lib/sse_t1/sha1_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/sha224_one_block_sse.asm b/lib/sse_t1/sha224_one_block_sse.asm
index cebbe79f..b83b2bc6 100644
--- a/lib/sse_t1/sha224_one_block_sse.asm
+++ b/lib/sse_t1/sha224_one_block_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/sha256_mult_sse.asm b/lib/sse_t1/sha256_mult_sse.asm
index 447115fd..7179bcd0 100644
--- a/lib/sse_t1/sha256_mult_sse.asm
+++ b/lib/sse_t1/sha256_mult_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/sha256_one_block_sse.asm b/lib/sse_t1/sha256_one_block_sse.asm
index cd4a62c7..2c42280a 100644
--- a/lib/sse_t1/sha256_one_block_sse.asm
+++ b/lib/sse_t1/sha256_one_block_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/sha384_one_block_sse.asm b/lib/sse_t1/sha384_one_block_sse.asm
index 9db43fd9..6f3bef52 100644
--- a/lib/sse_t1/sha384_one_block_sse.asm
+++ b/lib/sse_t1/sha384_one_block_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/sha512_one_block_sse.asm b/lib/sse_t1/sha512_one_block_sse.asm
index 83b7183e..b63766c4 100644
--- a/lib/sse_t1/sha512_one_block_sse.asm
+++ b/lib/sse_t1/sha512_one_block_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/sha512_x2_sse.asm b/lib/sse_t1/sha512_x2_sse.asm
index 49fb5db7..c209e2dd 100644
--- a/lib/sse_t1/sha512_x2_sse.asm
+++ b/lib/sse_t1/sha512_x2_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/sha_mb_sse.c b/lib/sse_t1/sha_mb_sse.c
index e528e6ff..c5d91822 100644
--- a/lib/sse_t1/sha_mb_sse.c
+++ b/lib/sse_t1/sha_mb_sse.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/sha_sse.c b/lib/sse_t1/sha_sse.c
index 277ac97b..e61f6e58 100644
--- a/lib/sse_t1/sha_sse.c
+++ b/lib/sse_t1/sha_sse.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2020-2022, Intel Corporation
+  Copyright (c) 2020-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/snow3g_sse.c b/lib/sse_t1/snow3g_sse.c
index 664007b0..8c54d445 100644
--- a/lib/sse_t1/snow3g_sse.c
+++ b/lib/sse_t1/snow3g_sse.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2019-2022, Intel Corporation
+  Copyright (c) 2019-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/snow3g_uia2_by4_sse.asm b/lib/sse_t1/snow3g_uia2_by4_sse.asm
index 635c1e94..ee5369b6 100644
--- a/lib/sse_t1/snow3g_uia2_by4_sse.asm
+++ b/lib/sse_t1/snow3g_uia2_by4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2021-2022, Intel Corporation
+;; Copyright (c) 2021-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/zuc_top_sse.c b/lib/sse_t1/zuc_top_sse.c
index 9f95761b..101a0dc3 100644
--- a/lib/sse_t1/zuc_top_sse.c
+++ b/lib/sse_t1/zuc_top_sse.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t1/zuc_x4_sse.asm b/lib/sse_t1/zuc_x4_sse.asm
index c689b547..8b2d5527 100644
--- a/lib/sse_t1/zuc_x4_sse.asm
+++ b/lib/sse_t1/zuc_x4_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2009-2022, Intel Corporation
+;; Copyright (c) 2009-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
index ede04f69..3102793b 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_flush_ni_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
index ca29b09d..847f4eb0 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha1_submit_ni_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/mb_mgr_hmac_sha224_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha224_flush_ni_sse.asm
index 213f5361..6aa0e7a9 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha224_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha224_flush_ni_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/mb_mgr_hmac_sha224_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha224_submit_ni_sse.asm
index e95a0ccd..9c7619e7 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha224_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha224_submit_ni_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
index 80bb02f3..f5f91d07 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_flush_ni_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
index 55d2e651..d44ac951 100644
--- a/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
+++ b/lib/sse_t2/mb_mgr_hmac_sha256_submit_ni_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/mb_mgr_sse_t2.c b/lib/sse_t2/mb_mgr_sse_t2.c
index ae47fa3e..3e945ae9 100644
--- a/lib/sse_t2/mb_mgr_sse_t2.c
+++ b/lib/sse_t2/mb_mgr_sse_t2.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/sha1_ni_x1_sse.asm b/lib/sse_t2/sha1_ni_x1_sse.asm
index c77ff495..c3d1581d 100644
--- a/lib/sse_t2/sha1_ni_x1_sse.asm
+++ b/lib/sse_t2/sha1_ni_x1_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/sha1_ni_x2_sse.asm b/lib/sse_t2/sha1_ni_x2_sse.asm
index a95129cb..f69ddee4 100644
--- a/lib/sse_t2/sha1_ni_x2_sse.asm
+++ b/lib/sse_t2/sha1_ni_x2_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/sha256_ni_x1_sse.asm b/lib/sse_t2/sha256_ni_x1_sse.asm
index 87a6bf31..46309a15 100644
--- a/lib/sse_t2/sha256_ni_x1_sse.asm
+++ b/lib/sse_t2/sha256_ni_x1_sse.asm
@@ -1,5 +1,5 @@
 ;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/sha256_ni_x2_sse.asm b/lib/sse_t2/sha256_ni_x2_sse.asm
index 94a1aa5d..0c5cdacd 100644
--- a/lib/sse_t2/sha256_ni_x2_sse.asm
+++ b/lib/sse_t2/sha256_ni_x2_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t2/sha_ni_mb_sse.c b/lib/sse_t2/sha_ni_mb_sse.c
index fa280f8c..b872a5ab 100644
--- a/lib/sse_t2/sha_ni_mb_sse.c
+++ b/lib/sse_t2/sha_ni_mb_sse.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes128_cbc_dec_by8_sse.asm b/lib/sse_t3/aes128_cbc_dec_by8_sse.asm
index e2654891..d9ca933e 100644
--- a/lib/sse_t3/aes128_cbc_dec_by8_sse.asm
+++ b/lib/sse_t3/aes128_cbc_dec_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes128_cbc_enc_x8_sse.asm b/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
index 645020f8..374af500 100644
--- a/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes128_cbc_enc_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes128_cbc_mac_x8_sse.asm b/lib/sse_t3/aes128_cbc_mac_x8_sse.asm
index 119a60d5..9f09c1b9 100644
--- a/lib/sse_t3/aes128_cbc_mac_x8_sse.asm
+++ b/lib/sse_t3/aes128_cbc_mac_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2017-2022, Intel Corporation
+;; Copyright (c) 2017-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes128_ecb_by8_sse.asm b/lib/sse_t3/aes128_ecb_by8_sse.asm
index 46fa220c..caf72a4b 100644
--- a/lib/sse_t3/aes128_ecb_by8_sse.asm
+++ b/lib/sse_t3/aes128_ecb_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes192_cbc_dec_by8_sse.asm b/lib/sse_t3/aes192_cbc_dec_by8_sse.asm
index 08eb25c9..cba77374 100644
--- a/lib/sse_t3/aes192_cbc_dec_by8_sse.asm
+++ b/lib/sse_t3/aes192_cbc_dec_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes192_cbc_enc_x8_sse.asm b/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
index 00f9327e..a630b176 100644
--- a/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes192_cbc_enc_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes192_ecb_by8_sse.asm b/lib/sse_t3/aes192_ecb_by8_sse.asm
index 81817f8e..49e0b267 100644
--- a/lib/sse_t3/aes192_ecb_by8_sse.asm
+++ b/lib/sse_t3/aes192_ecb_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes256_cbc_dec_by8_sse.asm b/lib/sse_t3/aes256_cbc_dec_by8_sse.asm
index b6106a7e..cee35d22 100644
--- a/lib/sse_t3/aes256_cbc_dec_by8_sse.asm
+++ b/lib/sse_t3/aes256_cbc_dec_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes256_cbc_enc_x8_sse.asm b/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
index 38fc2831..964798e6 100644
--- a/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
+++ b/lib/sse_t3/aes256_cbc_enc_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes256_cbc_mac_x8_sse.asm b/lib/sse_t3/aes256_cbc_mac_x8_sse.asm
index 75d861a0..289e4081 100644
--- a/lib/sse_t3/aes256_cbc_mac_x8_sse.asm
+++ b/lib/sse_t3/aes256_cbc_mac_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/aes256_ecb_by8_sse.asm b/lib/sse_t3/aes256_ecb_by8_sse.asm
index 7cfda3d7..56058434 100644
--- a/lib/sse_t3/aes256_ecb_by8_sse.asm
+++ b/lib/sse_t3/aes256_ecb_by8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2022, Intel Corporation
+;; Copyright (c) 2022-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_aes128_cbc_enc_flush_x8_sse.asm b/lib/sse_t3/mb_mgr_aes128_cbc_enc_flush_x8_sse.asm
index 0fa6e860..2cffb8e9 100644
--- a/lib/sse_t3/mb_mgr_aes128_cbc_enc_flush_x8_sse.asm
+++ b/lib/sse_t3/mb_mgr_aes128_cbc_enc_flush_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_aes128_cbc_enc_submit_x8_sse.asm b/lib/sse_t3/mb_mgr_aes128_cbc_enc_submit_x8_sse.asm
index 54244bde..0d792581 100644
--- a/lib/sse_t3/mb_mgr_aes128_cbc_enc_submit_x8_sse.asm
+++ b/lib/sse_t3/mb_mgr_aes128_cbc_enc_submit_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_aes128_ccm_auth_submit_flush_x8_sse.asm b/lib/sse_t3/mb_mgr_aes128_ccm_auth_submit_flush_x8_sse.asm
index 4c74848d..0203de76 100644
--- a/lib/sse_t3/mb_mgr_aes128_ccm_auth_submit_flush_x8_sse.asm
+++ b/lib/sse_t3/mb_mgr_aes128_ccm_auth_submit_flush_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_aes128_cmac_submit_flush_x8_sse.asm b/lib/sse_t3/mb_mgr_aes128_cmac_submit_flush_x8_sse.asm
index e3eebcac..83fd0528 100644
--- a/lib/sse_t3/mb_mgr_aes128_cmac_submit_flush_x8_sse.asm
+++ b/lib/sse_t3/mb_mgr_aes128_cmac_submit_flush_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_aes192_cbc_enc_flush_x8_sse.asm b/lib/sse_t3/mb_mgr_aes192_cbc_enc_flush_x8_sse.asm
index 657b6c6b..de23167f 100644
--- a/lib/sse_t3/mb_mgr_aes192_cbc_enc_flush_x8_sse.asm
+++ b/lib/sse_t3/mb_mgr_aes192_cbc_enc_flush_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_aes192_cbc_enc_submit_x8_sse.asm b/lib/sse_t3/mb_mgr_aes192_cbc_enc_submit_x8_sse.asm
index 28ca090a..a7094a95 100644
--- a/lib/sse_t3/mb_mgr_aes192_cbc_enc_submit_x8_sse.asm
+++ b/lib/sse_t3/mb_mgr_aes192_cbc_enc_submit_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_aes256_cbc_enc_flush_x8_sse.asm b/lib/sse_t3/mb_mgr_aes256_cbc_enc_flush_x8_sse.asm
index 33d72ab7..06bad243 100644
--- a/lib/sse_t3/mb_mgr_aes256_cbc_enc_flush_x8_sse.asm
+++ b/lib/sse_t3/mb_mgr_aes256_cbc_enc_flush_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_aes256_cbc_enc_submit_x8_sse.asm b/lib/sse_t3/mb_mgr_aes256_cbc_enc_submit_x8_sse.asm
index fd2d2a76..9ffa4178 100644
--- a/lib/sse_t3/mb_mgr_aes256_cbc_enc_submit_x8_sse.asm
+++ b/lib/sse_t3/mb_mgr_aes256_cbc_enc_submit_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_aes256_ccm_auth_submit_flush_x8_sse.asm b/lib/sse_t3/mb_mgr_aes256_ccm_auth_submit_flush_x8_sse.asm
index c5407637..17f9f954 100644
--- a/lib/sse_t3/mb_mgr_aes256_ccm_auth_submit_flush_x8_sse.asm
+++ b/lib/sse_t3/mb_mgr_aes256_ccm_auth_submit_flush_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_aes256_cmac_submit_flush_x8_sse.asm b/lib/sse_t3/mb_mgr_aes256_cmac_submit_flush_x8_sse.asm
index 62aeb6e8..90723583 100644
--- a/lib/sse_t3/mb_mgr_aes256_cmac_submit_flush_x8_sse.asm
+++ b/lib/sse_t3/mb_mgr_aes256_cmac_submit_flush_x8_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_sse_t3.c b/lib/sse_t3/mb_mgr_sse_t3.c
index ff54d190..f7243a6d 100644
--- a/lib/sse_t3/mb_mgr_sse_t3.c
+++ b/lib/sse_t3/mb_mgr_sse_t3.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/mb_mgr_zuc_submit_flush_gfni_sse.asm b/lib/sse_t3/mb_mgr_zuc_submit_flush_gfni_sse.asm
index 77d26c1d..d2d49b69 100644
--- a/lib/sse_t3/mb_mgr_zuc_submit_flush_gfni_sse.asm
+++ b/lib/sse_t3/mb_mgr_zuc_submit_flush_gfni_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/sse_t3/zuc_x4_gfni_sse.asm b/lib/sse_t3/zuc_x4_gfni_sse.asm
index 6f269bfe..8b5848fa 100644
--- a/lib/sse_t3/zuc_x4_gfni_sse.asm
+++ b/lib/sse_t3/zuc_x4_gfni_sse.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/win_x64.mak b/lib/win_x64.mak
index ac99ed6a..4d20ab50 100644
--- a/lib/win_x64.mak
+++ b/lib/win_x64.mak
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2017-2022, Intel Corporation
+# Copyright (c) 2017-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/aes128_ecbenc_x3.asm b/lib/x86_64/aes128_ecbenc_x3.asm
index 876ecac4..0550b13b 100644
--- a/lib/x86_64/aes128_ecbenc_x3.asm
+++ b/lib/x86_64/aes128_ecbenc_x3.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/aes_cmac_subkey_gen.asm b/lib/x86_64/aes_cmac_subkey_gen.asm
index c1f27196..36f2c9a1 100644
--- a/lib/x86_64/aes_cmac_subkey_gen.asm
+++ b/lib/x86_64/aes_cmac_subkey_gen.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/aes_keyexp_128.asm b/lib/x86_64/aes_keyexp_128.asm
index a0e74dd4..3298d7e9 100644
--- a/lib/x86_64/aes_keyexp_128.asm
+++ b/lib/x86_64/aes_keyexp_128.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/aes_keyexp_192.asm b/lib/x86_64/aes_keyexp_192.asm
index aaada6fe..fb890182 100644
--- a/lib/x86_64/aes_keyexp_192.asm
+++ b/lib/x86_64/aes_keyexp_192.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/aes_keyexp_256.asm b/lib/x86_64/aes_keyexp_256.asm
index 518f7492..562fcf32 100644
--- a/lib/x86_64/aes_keyexp_256.asm
+++ b/lib/x86_64/aes_keyexp_256.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/aes_xcbc_expand_key.c b/lib/x86_64/aes_xcbc_expand_key.c
index 50219e52..3ae41336 100644
--- a/lib/x86_64/aes_xcbc_expand_key.c
+++ b/lib/x86_64/aes_xcbc_expand_key.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2012-2022, Intel Corporation
+  Copyright (c) 2012-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/alloc.c b/lib/x86_64/alloc.c
index 14128dbe..0a663c68 100644
--- a/lib/x86_64/alloc.c
+++ b/lib/x86_64/alloc.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2018-2022, Intel Corporation
+  Copyright (c) 2018-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/chacha20_poly1305.c b/lib/x86_64/chacha20_poly1305.c
index 06a0c6e0..47c98f00 100644
--- a/lib/x86_64/chacha20_poly1305.c
+++ b/lib/x86_64/chacha20_poly1305.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2020-2022, Intel Corporation
+  Copyright (c) 2020-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/clear_regs_mem_fns.asm b/lib/x86_64/clear_regs_mem_fns.asm
index 83eb4b0b..0238b995 100644
--- a/lib/x86_64/clear_regs_mem_fns.asm
+++ b/lib/x86_64/clear_regs_mem_fns.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/const.asm b/lib/x86_64/const.asm
index e7f2d715..9ac0484b 100644
--- a/lib/x86_64/const.asm
+++ b/lib/x86_64/const.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2018-2022, Intel Corporation
+;; Copyright (c) 2018-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/constant_lookup_fns.asm b/lib/x86_64/constant_lookup_fns.asm
index 48eba196..fbb2d0e6 100644
--- a/lib/x86_64/constant_lookup_fns.asm
+++ b/lib/x86_64/constant_lookup_fns.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/cpu_feature.c b/lib/x86_64/cpu_feature.c
index cd54ae6f..2c0555dd 100644
--- a/lib/x86_64/cpu_feature.c
+++ b/lib/x86_64/cpu_feature.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2018-2022, Intel Corporation
+  Copyright (c) 2018-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/crc32_const.asm b/lib/x86_64/crc32_const.asm
index c8be50c8..d0cea5dd 100644
--- a/lib/x86_64/crc32_const.asm
+++ b/lib/x86_64/crc32_const.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/crc32_refl_const.asm b/lib/x86_64/crc32_refl_const.asm
index fa99d18f..ae3c33fe 100644
--- a/lib/x86_64/crc32_refl_const.asm
+++ b/lib/x86_64/crc32_refl_const.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/des_basic.c b/lib/x86_64/des_basic.c
index fab58b96..87e350de 100644
--- a/lib/x86_64/des_basic.c
+++ b/lib/x86_64/des_basic.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2017-2022, Intel Corporation
+  Copyright (c) 2017-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/des_key.c b/lib/x86_64/des_key.c
index 3b45dc29..5b82f324 100644
--- a/lib/x86_64/des_key.c
+++ b/lib/x86_64/des_key.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2017-2022, Intel Corporation
+  Copyright (c) 2017-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/error.c b/lib/x86_64/error.c
index ccec6ad3..6f229766 100644
--- a/lib/x86_64/error.c
+++ b/lib/x86_64/error.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2020-2022, Intel Corporation
+  Copyright (c) 2020-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/gcm.c b/lib/x86_64/gcm.c
index 617bb7b2..428fa766 100644
--- a/lib/x86_64/gcm.c
+++ b/lib/x86_64/gcm.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2018-2022, Intel Corporation
+  Copyright (c) 2018-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/kasumi_iv.c b/lib/x86_64/kasumi_iv.c
index 0fffe598..4df6a15e 100644
--- a/lib/x86_64/kasumi_iv.c
+++ b/lib/x86_64/kasumi_iv.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2019-2022, Intel Corporation
+  Copyright (c) 2019-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/mb_mgr_auto.c b/lib/x86_64/mb_mgr_auto.c
index b623ca92..cc6e2633 100644
--- a/lib/x86_64/mb_mgr_auto.c
+++ b/lib/x86_64/mb_mgr_auto.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2020-2022, Intel Corporation
+  Copyright (c) 2020-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/md5_one_block.c b/lib/x86_64/md5_one_block.c
index 5a40e195..296e7412 100644
--- a/lib/x86_64/md5_one_block.c
+++ b/lib/x86_64/md5_one_block.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2012-2022, Intel Corporation
+  Copyright (c) 2012-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/ooo_mgr_reset.c b/lib/x86_64/ooo_mgr_reset.c
index 32cc132c..51c0c281 100644
--- a/lib/x86_64/ooo_mgr_reset.c
+++ b/lib/x86_64/ooo_mgr_reset.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/poly1305.asm b/lib/x86_64/poly1305.asm
index 9ad6a2ad..75e7143e 100644
--- a/lib/x86_64/poly1305.asm
+++ b/lib/x86_64/poly1305.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2020-2022, Intel Corporation
+;; Copyright (c) 2020-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/save_xmms.asm b/lib/x86_64/save_xmms.asm
index 1c7b0951..722f91e3 100644
--- a/lib/x86_64/save_xmms.asm
+++ b/lib/x86_64/save_xmms.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2012-2022, Intel Corporation
+;; Copyright (c) 2012-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/self_test.c b/lib/x86_64/self_test.c
index 2b270ce8..a73095cd 100644
--- a/lib/x86_64/self_test.c
+++ b/lib/x86_64/self_test.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/snow3g_iv.c b/lib/x86_64/snow3g_iv.c
index aac9190b..1ff75de2 100644
--- a/lib/x86_64/snow3g_iv.c
+++ b/lib/x86_64/snow3g_iv.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2019-2022, Intel Corporation
+  Copyright (c) 2019-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/snow3g_tables.c b/lib/x86_64/snow3g_tables.c
index 12d4c2f5..c8888e57 100644
--- a/lib/x86_64/snow3g_tables.c
+++ b/lib/x86_64/snow3g_tables.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2009-2022, Intel Corporation
+  Copyright (c) 2009-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/version.c b/lib/x86_64/version.c
index 4577eccc..c61a4de3 100644
--- a/lib/x86_64/version.c
+++ b/lib/x86_64/version.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2018-2022, Intel Corporation
+  Copyright (c) 2018-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/wireless_common.asm b/lib/x86_64/wireless_common.asm
index c646e3a2..24e07579 100644
--- a/lib/x86_64/wireless_common.asm
+++ b/lib/x86_64/wireless_common.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2019-2022, Intel Corporation
+;; Copyright (c) 2019-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/zuc_common.asm b/lib/x86_64/zuc_common.asm
index 75b4bca2..e811ae68 100644
--- a/lib/x86_64/zuc_common.asm
+++ b/lib/x86_64/zuc_common.asm
@@ -1,5 +1,5 @@
 ;;
-;; Copyright (c) 2009-2022, Intel Corporation
+;; Copyright (c) 2009-2023, Intel Corporation
 ;;
 ;; Redistribution and use in source and binary forms, with or without
 ;; modification, are permitted provided that the following conditions are met:
diff --git a/lib/x86_64/zuc_iv.c b/lib/x86_64/zuc_iv.c
index 5fce4b45..e97b7be1 100644
--- a/lib/x86_64/zuc_iv.c
+++ b/lib/x86_64/zuc_iv.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2019-2022, Intel Corporation
+  Copyright (c) 2019-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/mkdep.bat b/mkdep.bat
index 617ab060..ad39d14b 100644
--- a/mkdep.bat
+++ b/mkdep.bat
@@ -1,5 +1,5 @@
 @echo off
-REM // Copyright (c) 2020-2022, Intel Corporation
+REM // Copyright (c) 2020-2023, Intel Corporation
 REM // 
 REM // Redistribution and use in source and binary forms, with or without
 REM // modification, are permitted provided that the following conditions are met:
diff --git a/perf/ipsec_diff_tool.py b/perf/ipsec_diff_tool.py
index 9c973907..6737cf53 100755
--- a/perf/ipsec_diff_tool.py
+++ b/perf/ipsec_diff_tool.py
@@ -2,7 +2,7 @@
 
 """
 **********************************************************************
-  Copyright(c) 2017-2022, Intel Corporation All rights reserved.
+  Copyright(c) 2017-2023, Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/perf/ipsec_perf.c b/perf/ipsec_perf.c
index af48887c..3c636a32 100644
--- a/perf/ipsec_perf.c
+++ b/perf/ipsec_perf.c
@@ -1,5 +1,5 @@
 /**********************************************************************
-  Copyright(c) 2017-2022, Intel Corporation All rights reserved.
+  Copyright(c) 2017-2023, Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/perf/ipsec_perf_tool.py b/perf/ipsec_perf_tool.py
index 5e171355..1f11c5f3 100755
--- a/perf/ipsec_perf_tool.py
+++ b/perf/ipsec_perf_tool.py
@@ -2,7 +2,7 @@
 
 """
 **********************************************************************
-  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/perf/misc.asm b/perf/misc.asm
index 242cdb77..c4d4cb7f 100644
--- a/perf/misc.asm
+++ b/perf/misc.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/perf/misc.h b/perf/misc.h
index 2883728b..8061385b 100644
--- a/perf/misc.h
+++ b/perf/misc.h
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2021-2022, Intel Corporation
+ Copyright (c) 2021-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/perf/msr.c b/perf/msr.c
index 6e1498dc..0ee76d9f 100644
--- a/perf/msr.c
+++ b/perf/msr.c
@@ -1,5 +1,5 @@
 /**********************************************************************
-  Copyright(c) 2018-2022 Intel Corporation All rights reserved.
+  Copyright(c) 2018-2023 Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/perf/msr.h b/perf/msr.h
index 19dcd58c..89489e7b 100644
--- a/perf/msr.h
+++ b/perf/msr.h
@@ -1,5 +1,5 @@
 /**********************************************************************
-  Copyright(c) 2018-2022 Intel Corporation All rights reserved.
+  Copyright(c) 2018-2023 Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/perf/win_x64.mak b/perf/win_x64.mak
index 68b00a0e..c362f4dc 100644
--- a/perf/win_x64.mak
+++ b/perf/win_x64.mak
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2017-2022, Intel Corporation
+# Copyright (c) 2017-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
diff --git a/rpm/SUSE/intel-ipsec-mb.spec b/rpm/SUSE/intel-ipsec-mb.spec
index 576b6f89..996be6f1 100644
--- a/rpm/SUSE/intel-ipsec-mb.spec
+++ b/rpm/SUSE/intel-ipsec-mb.spec
@@ -1,7 +1,7 @@
 #
 # spec file for package intel-ipsec-mb
 #
-# Copyright (c) 2022 SUSE LLC
+# Copyright (c) 2022-2023 SUSE LLC
 # Copyright (c) 2022, Intel Corporation
 #
 # All modifications and additions to the file contributed by third parties
diff --git a/rpm/intel-ipsec-mb.spec b/rpm/intel-ipsec-mb.spec
index 6dda5280..02f80bd5 100644
--- a/rpm/intel-ipsec-mb.spec
+++ b/rpm/intel-ipsec-mb.spec
@@ -1,4 +1,4 @@
-# Copyright (c) 2017-2022, Intel Corporation
+# Copyright (c) 2017-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt
index 050b556d..871ba68b 100644
--- a/test/CMakeLists.txt
+++ b/test/CMakeLists.txt
@@ -1,4 +1,4 @@
-# Copyright (c) 2022, Intel Corporation
+# Copyright (c) 2022-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
diff --git a/test/acvp-app/acvp_app_main.c b/test/acvp-app/acvp_app_main.c
index ef5ac944..2810d716 100644
--- a/test/acvp-app/acvp_app_main.c
+++ b/test/acvp-app/acvp_app_main.c
@@ -1,5 +1,5 @@
 /**********************************************************************
-  Copyright(c) 2022, Intel Corporation All rights reserved.
+  Copyright(c) 2022-2023, Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/test/common/utils.c b/test/common/utils.c
index 16b81640..c0f723d8 100644
--- a/test/common/utils.c
+++ b/test/common/utils.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2018-2022, Intel Corporation
+ Copyright (c) 2018-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/common/win_x64_common.mk b/test/common/win_x64_common.mk
index ab18d15f..8a3377da 100644
--- a/test/common/win_x64_common.mk
+++ b/test/common/win_x64_common.mk
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2017-2022, Intel Corporation
+# Copyright (c) 2017-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
diff --git a/test/fuzz-app/direct_api_fuzz_test.c b/test/fuzz-app/direct_api_fuzz_test.c
index d5a84f09..c487940f 100644
--- a/test/fuzz-app/direct_api_fuzz_test.c
+++ b/test/fuzz-app/direct_api_fuzz_test.c
@@ -1,5 +1,5 @@
 /**********************************************************************
-  Copyright(c) 2022, Intel Corporation All rights reserved.
+  Copyright(c) 2022-2023, Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/test/fuzz-app/job_api_fuzz_test.c b/test/fuzz-app/job_api_fuzz_test.c
index 8ef4d90e..2f470290 100644
--- a/test/fuzz-app/job_api_fuzz_test.c
+++ b/test/fuzz-app/job_api_fuzz_test.c
@@ -1,5 +1,5 @@
 /**********************************************************************
-  Copyright(c) 2021-2022, Intel Corporation All rights reserved.
+  Copyright(c) 2021-2023, Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/test/include/aead_test.h b/test/include/aead_test.h
index dd2f45d5..99594758 100644
--- a/test/include/aead_test.h
+++ b/test/include/aead_test.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/test/include/mac_test.h b/test/include/mac_test.h
index 89b71f7e..58056fac 100644
--- a/test/include/mac_test.h
+++ b/test/include/mac_test.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/test/include/utils.h b/test/include/utils.h
index 270d8147..cddbb8b8 100644
--- a/test/include/utils.h
+++ b/test/include/utils.h
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2018-2022, Intel Corporation
+ Copyright (c) 2018-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/aes_cbcs_test.c b/test/kat-app/aes_cbcs_test.c
index 7ea38835..d3091ac6 100644
--- a/test/kat-app/aes_cbcs_test.c
+++ b/test/kat-app/aes_cbcs_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2020-2022, Intel Corporation
+ Copyright (c) 2020-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/aes_test.c b/test/kat-app/aes_test.c
index 80a189df..74fa8af6 100644
--- a/test/kat-app/aes_test.c
+++ b/test/kat-app/aes_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2018-2022, Intel Corporation
+ Copyright (c) 2018-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/api_test.c b/test/kat-app/api_test.c
index b7cf813f..4f1104d7 100644
--- a/test/kat-app/api_test.c
+++ b/test/kat-app/api_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2018-2022, Intel Corporation
+ Copyright (c) 2018-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/ccm_test.c b/test/kat-app/ccm_test.c
index 7bdf32ca..99907a0c 100644
--- a/test/kat-app/ccm_test.c
+++ b/test/kat-app/ccm_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2017-2022, Intel Corporation
+ Copyright (c) 2017-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/chacha20_poly1305_test.c b/test/kat-app/chacha20_poly1305_test.c
index 49f0f669..39059df0 100644
--- a/test/kat-app/chacha20_poly1305_test.c
+++ b/test/kat-app/chacha20_poly1305_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2020-2022, Intel Corporation
+ Copyright (c) 2020-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/chacha_test.c b/test/kat-app/chacha_test.c
index e15b9ae3..a6052498 100644
--- a/test/kat-app/chacha_test.c
+++ b/test/kat-app/chacha_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2020-2022, Intel Corporation
+ Copyright (c) 2020-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/chained_test.c b/test/kat-app/chained_test.c
index d1e769d0..b6b8dedc 100644
--- a/test/kat-app/chained_test.c
+++ b/test/kat-app/chained_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2019-2022, Intel Corporation
+ Copyright (c) 2019-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/clear_mem_test.c b/test/kat-app/clear_mem_test.c
index 9e7af3db..a476a0d8 100644
--- a/test/kat-app/clear_mem_test.c
+++ b/test/kat-app/clear_mem_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2020-2022, Intel Corporation
+ Copyright (c) 2020-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/cmac_test.c b/test/kat-app/cmac_test.c
index a6f28405..cbfa8ede 100644
--- a/test/kat-app/cmac_test.c
+++ b/test/kat-app/cmac_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2018-2022, Intel Corporation
+ Copyright (c) 2018-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/crc_test.c b/test/kat-app/crc_test.c
index 7ea3bdc4..ca22aa65 100644
--- a/test/kat-app/crc_test.c
+++ b/test/kat-app/crc_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2020-2022, Intel Corporation
+ Copyright (c) 2020-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/ctr_test.c b/test/kat-app/ctr_test.c
index 6c701287..b3445b71 100644
--- a/test/kat-app/ctr_test.c
+++ b/test/kat-app/ctr_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2017-2022, Intel Corporation
+ Copyright (c) 2017-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/customop_test.c b/test/kat-app/customop_test.c
index eb35dec0..a42ca75b 100644
--- a/test/kat-app/customop_test.c
+++ b/test/kat-app/customop_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2017-2022, Intel Corporation
+ Copyright (c) 2017-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/customop_test.h b/test/kat-app/customop_test.h
index 464641fa..fb5ca099 100644
--- a/test/kat-app/customop_test.h
+++ b/test/kat-app/customop_test.h
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2017-2022, Intel Corporation
+ Copyright (c) 2017-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/des_test.c b/test/kat-app/des_test.c
index 2825b9b5..33ae82cd 100644
--- a/test/kat-app/des_test.c
+++ b/test/kat-app/des_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2017-2022, Intel Corporation
+ Copyright (c) 2017-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/direct_api_param_test.c b/test/kat-app/direct_api_param_test.c
index ad0f7ff9..f0188c78 100644
--- a/test/kat-app/direct_api_param_test.c
+++ b/test/kat-app/direct_api_param_test.c
@@ -3,7 +3,7 @@
  *****************************************************************************/
 
 /*****************************************************************************
- Copyright (c) 2021-2022, Intel Corporation
+ Copyright (c) 2021-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/direct_api_param_test.c_template b/test/kat-app/direct_api_param_test.c_template
index 251ac409..97ff6870 100644
--- a/test/kat-app/direct_api_param_test.c_template
+++ b/test/kat-app/direct_api_param_test.c_template
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2021-2022, Intel Corporation
+ Copyright (c) 2021-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/direct_api_test.c b/test/kat-app/direct_api_test.c
index 051b9661..c1854cc0 100644
--- a/test/kat-app/direct_api_test.c
+++ b/test/kat-app/direct_api_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2019-2022, Intel Corporation
+ Copyright (c) 2019-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/do_test.h b/test/kat-app/do_test.h
index 1420ec92..2790eb78 100644
--- a/test/kat-app/do_test.h
+++ b/test/kat-app/do_test.h
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2012-2022, Intel Corporation
+ Copyright (c) 2012-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/ecb_test.c b/test/kat-app/ecb_test.c
index d0505606..e64a1539 100644
--- a/test/kat-app/ecb_test.c
+++ b/test/kat-app/ecb_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2019-2022, Intel Corporation
+ Copyright (c) 2019-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/gcm_ctr_vectors_test.h b/test/kat-app/gcm_ctr_vectors_test.h
index 36c8d9f1..3739618e 100644
--- a/test/kat-app/gcm_ctr_vectors_test.h
+++ b/test/kat-app/gcm_ctr_vectors_test.h
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2017-2022, Intel Corporation
+ Copyright (c) 2017-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/gcm_test.c b/test/kat-app/gcm_test.c
index 68c7fa1c..75e82d10 100644
--- a/test/kat-app/gcm_test.c
+++ b/test/kat-app/gcm_test.c
@@ -1,5 +1,5 @@
 /**********************************************************************
-  Copyright(c) 2011-2022 Intel Corporation All rights reserved.
+  Copyright(c) 2011-2023 Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/test/kat-app/hec_test.c b/test/kat-app/hec_test.c
index d17b63a6..0717d2bd 100644
--- a/test/kat-app/hec_test.c
+++ b/test/kat-app/hec_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2020-2022, Intel Corporation
+ Copyright (c) 2020-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/hmac_md5_test.c b/test/kat-app/hmac_md5_test.c
index e7bc4ec2..515a66cc 100644
--- a/test/kat-app/hmac_md5_test.c
+++ b/test/kat-app/hmac_md5_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2018-2022, Intel Corporation
+ Copyright (c) 2018-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/hmac_sha1_test.c b/test/kat-app/hmac_sha1_test.c
index a7d74674..6072ac15 100644
--- a/test/kat-app/hmac_sha1_test.c
+++ b/test/kat-app/hmac_sha1_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2018-2022, Intel Corporation
+ Copyright (c) 2018-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/hmac_sha256_sha512_test.c b/test/kat-app/hmac_sha256_sha512_test.c
index de184399..93bcb5cd 100644
--- a/test/kat-app/hmac_sha256_sha512_test.c
+++ b/test/kat-app/hmac_sha256_sha512_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2018-2022, Intel Corporation
+ Copyright (c) 2018-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/kasumi_test.c b/test/kat-app/kasumi_test.c
index 39402c1f..a2bbfdc4 100644
--- a/test/kat-app/kasumi_test.c
+++ b/test/kat-app/kasumi_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2009-2022, Intel Corporation
+ Copyright (c) 2009-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/kasumi_test_vectors.h b/test/kat-app/kasumi_test_vectors.h
index 6b989e15..c5bffe0d 100644
--- a/test/kat-app/kasumi_test_vectors.h
+++ b/test/kat-app/kasumi_test_vectors.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2009-2022, Intel Corporation
+ * Copyright (c) 2009-2023, Intel Corporation
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/main.c b/test/kat-app/main.c
index e0bec417..05b27ad7 100644
--- a/test/kat-app/main.c
+++ b/test/kat-app/main.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2012-2022, Intel Corporation
+ Copyright (c) 2012-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/null_test.c b/test/kat-app/null_test.c
index ecdb5cd5..2485e6ad 100644
--- a/test/kat-app/null_test.c
+++ b/test/kat-app/null_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2020-2022, Intel Corporation
+ Copyright (c) 2020-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/poly1305_test.c b/test/kat-app/poly1305_test.c
index 8fb79d1f..62beb514 100644
--- a/test/kat-app/poly1305_test.c
+++ b/test/kat-app/poly1305_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2020-2022, Intel Corporation
+ Copyright (c) 2020-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/pon_test.c b/test/kat-app/pon_test.c
index b30deb4c..d04a5f1e 100644
--- a/test/kat-app/pon_test.c
+++ b/test/kat-app/pon_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2019-2022, Intel Corporation
+ Copyright (c) 2019-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/sha_test.c b/test/kat-app/sha_test.c
index 2146aee8..81c8eef5 100644
--- a/test/kat-app/sha_test.c
+++ b/test/kat-app/sha_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2018-2022, Intel Corporation
+ Copyright (c) 2018-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/snow3g_test.c b/test/kat-app/snow3g_test.c
index 77ec6501..f6698bcb 100644
--- a/test/kat-app/snow3g_test.c
+++ b/test/kat-app/snow3g_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2009-2022, Intel Corporation
+ Copyright (c) 2009-2023, Intel Corporation
  Copyright (c) 2022, Nokia
 
  Redistribution and use in source and binary forms, with or without
diff --git a/test/kat-app/snow3g_test_vectors.h b/test/kat-app/snow3g_test_vectors.h
index a95a9e6b..2d49299c 100644
--- a/test/kat-app/snow3g_test_vectors.h
+++ b/test/kat-app/snow3g_test_vectors.h
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2009-2022, Intel Corporation
+ Copyright (c) 2009-2023, Intel Corporation
  Copyright (c) 2022, Nokia
 
  Redistribution and use in source and binary forms, with or without
diff --git a/test/kat-app/snow_v_test.c b/test/kat-app/snow_v_test.c
index 46dd7325..ad7b8e25 100644
--- a/test/kat-app/snow_v_test.c
+++ b/test/kat-app/snow_v_test.c
@@ -1,5 +1,5 @@
 /**********************************************************************
-  Copyright(c) 2021-2022 Intel Corporation All rights reserved.
+  Copyright(c) 2021-2023 Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/test/kat-app/test_api.py b/test/kat-app/test_api.py
index 92bbd77a..b6f9a545 100644
--- a/test/kat-app/test_api.py
+++ b/test/kat-app/test_api.py
@@ -1,5 +1,5 @@
 #*****************************************************************************
-#  Copyright (c) 2021-2022, Intel Corporation
+#  Copyright (c) 2021-2023, Intel Corporation
 #
 #  Redistribution and use in source and binary forms, with or without
 #  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/xcbc_test.c b/test/kat-app/xcbc_test.c
index a9debc4f..dbf866b5 100644
--- a/test/kat-app/xcbc_test.c
+++ b/test/kat-app/xcbc_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2020-2022, Intel Corporation
+ Copyright (c) 2020-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/zuc_test.c b/test/kat-app/zuc_test.c
index b815882a..c6c10808 100644
--- a/test/kat-app/zuc_test.c
+++ b/test/kat-app/zuc_test.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2009-2022, Intel Corporation
+ Copyright (c) 2009-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/kat-app/zuc_test_vectors.h b/test/kat-app/zuc_test_vectors.h
index 37709538..ea5f48e0 100644
--- a/test/kat-app/zuc_test_vectors.h
+++ b/test/kat-app/zuc_test_vectors.h
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2009-2022, Intel Corporation
+ Copyright (c) 2009-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/win_x64.mak b/test/win_x64.mak
index 1af5891e..761140f5 100644
--- a/test/win_x64.mak
+++ b/test/win_x64.mak
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2017-2022, Intel Corporation
+# Copyright (c) 2017-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/aes_ccm_test.json.c b/test/wycheproof-app/aes_ccm_test.json.c
index da8f1791..e32985d5 100644
--- a/test/wycheproof-app/aes_ccm_test.json.c
+++ b/test/wycheproof-app/aes_ccm_test.json.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/aes_cmac_test.json.c b/test/wycheproof-app/aes_cmac_test.json.c
index 911556f0..5e13976f 100644
--- a/test/wycheproof-app/aes_cmac_test.json.c
+++ b/test/wycheproof-app/aes_cmac_test.json.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/aes_gcm_test.json.c b/test/wycheproof-app/aes_gcm_test.json.c
index bfa3a3d1..3bc14666 100644
--- a/test/wycheproof-app/aes_gcm_test.json.c
+++ b/test/wycheproof-app/aes_gcm_test.json.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/chacha20_poly1305_test.json.c b/test/wycheproof-app/chacha20_poly1305_test.json.c
index 9a30de04..d78485ce 100644
--- a/test/wycheproof-app/chacha20_poly1305_test.json.c
+++ b/test/wycheproof-app/chacha20_poly1305_test.json.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/gmac_test.json.c b/test/wycheproof-app/gmac_test.json.c
index 8730d33a..f15bd259 100644
--- a/test/wycheproof-app/gmac_test.json.c
+++ b/test/wycheproof-app/gmac_test.json.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/hmac_sha1_test.json.c b/test/wycheproof-app/hmac_sha1_test.json.c
index d0c1d36e..db246e7c 100644
--- a/test/wycheproof-app/hmac_sha1_test.json.c
+++ b/test/wycheproof-app/hmac_sha1_test.json.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/hmac_sha224_test.json.c b/test/wycheproof-app/hmac_sha224_test.json.c
index c8724fce..72cc647e 100644
--- a/test/wycheproof-app/hmac_sha224_test.json.c
+++ b/test/wycheproof-app/hmac_sha224_test.json.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/hmac_sha256_test.json.c b/test/wycheproof-app/hmac_sha256_test.json.c
index 68c7406e..2ec38002 100644
--- a/test/wycheproof-app/hmac_sha256_test.json.c
+++ b/test/wycheproof-app/hmac_sha256_test.json.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/hmac_sha384_test.json.c b/test/wycheproof-app/hmac_sha384_test.json.c
index 09bd57fc..7a650d42 100644
--- a/test/wycheproof-app/hmac_sha384_test.json.c
+++ b/test/wycheproof-app/hmac_sha384_test.json.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/hmac_sha512_test.json.c b/test/wycheproof-app/hmac_sha512_test.json.c
index 4e7b79fb..ecfd9243 100644
--- a/test/wycheproof-app/hmac_sha512_test.json.c
+++ b/test/wycheproof-app/hmac_sha512_test.json.c
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2022, Intel Corporation
+ Copyright (c) 2022-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/win_x64.mak b/test/wycheproof-app/win_x64.mak
index dba5dfeb..fe031ebb 100644
--- a/test/wycheproof-app/win_x64.mak
+++ b/test/wycheproof-app/win_x64.mak
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2022, Intel Corporation
+# Copyright (c) 2022-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
diff --git a/test/wycheproof-app/wycheproof.c b/test/wycheproof-app/wycheproof.c
index 91bd09cd..c7de764e 100644
--- a/test/wycheproof-app/wycheproof.c
+++ b/test/wycheproof-app/wycheproof.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-  Copyright (c) 2022, Intel Corporation
+  Copyright (c) 2022-2023, Intel Corporation
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions are met:
diff --git a/test/xvalid-app/ipsec_xvalid.c b/test/xvalid-app/ipsec_xvalid.c
index 63cf496b..1ea88a09 100644
--- a/test/xvalid-app/ipsec_xvalid.c
+++ b/test/xvalid-app/ipsec_xvalid.c
@@ -1,5 +1,5 @@
 /**********************************************************************
-  Copyright(c) 2019-2022, Intel Corporation All rights reserved.
+  Copyright(c) 2019-2023, Intel Corporation All rights reserved.
 
   Redistribution and use in source and binary forms, with or without
   modification, are permitted provided that the following conditions
diff --git a/test/xvalid-app/misc.asm b/test/xvalid-app/misc.asm
index 7c3500d3..eb0358a4 100644
--- a/test/xvalid-app/misc.asm
+++ b/test/xvalid-app/misc.asm
@@ -1,5 +1,5 @@
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;  Copyright(c) 2019-2022, Intel Corporation All rights reserved.
+;  Copyright(c) 2019-2023, Intel Corporation All rights reserved.
 ;
 ;  Redistribution and use in source and binary forms, with or without
 ;  modification, are permitted provided that the following conditions
diff --git a/test/xvalid-app/misc.h b/test/xvalid-app/misc.h
index 4581ea43..05daecd3 100644
--- a/test/xvalid-app/misc.h
+++ b/test/xvalid-app/misc.h
@@ -1,5 +1,5 @@
 /*****************************************************************************
- Copyright (c) 2019-2022, Intel Corporation
+ Copyright (c) 2019-2023, Intel Corporation
 
  Redistribution and use in source and binary forms, with or without
  modification, are permitted provided that the following conditions are met:
diff --git a/win_x64.mak b/win_x64.mak
index 6c097cb9..5f52f109 100644
--- a/win_x64.mak
+++ b/win_x64.mak
@@ -1,5 +1,5 @@
 #
-# Copyright (c) 2020-2022, Intel Corporation
+# Copyright (c) 2020-2023, Intel Corporation
 #
 # Redistribution and use in source and binary forms, with or without
 # modification, are permitted provided that the following conditions are met:
-- 
GitLab


From b33d12fa7abf4c3492842cd27a6eb25a48a672ac Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 2 Jun 2023 15:23:20 +0100
Subject: [PATCH 325/332] lib: update doxygen config file

---
 lib/api_doxygen.conf | 873 ++++++++++++++++++++++++++++++++-----------
 1 file changed, 657 insertions(+), 216 deletions(-)

diff --git a/lib/api_doxygen.conf b/lib/api_doxygen.conf
index e1b057ad..8e148965 100644
--- a/lib/api_doxygen.conf
+++ b/lib/api_doxygen.conf
@@ -1,3 +1,39 @@
+# Doxyfile 1.9.7
+
+# This file describes the settings to be used by the documentation system
+# doxygen (www.doxygen.org) for a project.
+#
+# All text after a double hash (##) is considered a comment and is placed in
+# front of the TAG it is preceding.
+#
+# All text after a single hash (#) is considered a comment and will be ignored.
+# The format is:
+# TAG = value [value, ...]
+# For lists, items can also be appended using:
+# TAG += value [value, ...]
+# Values that contain spaces should be placed between quotes (\" \").
+#
+# Note:
+#
+# Use doxygen to compare the used configuration file with the template
+# configuration file:
+# doxygen -x [configFile]
+# Use doxygen to compare the used configuration file with the template
+# configuration file without replacing the environment variables or CMake type
+# replacement variables:
+# doxygen -x_noenv [configFile]
+
+#---------------------------------------------------------------------------
+# Project related configuration options
+#---------------------------------------------------------------------------
+
+# This tag specifies the encoding used for all characters in the configuration
+# file that follow. The default is UTF-8 which is also the encoding used for all
+# text before the first occurrence of this tag. Doxygen uses libiconv (or the
+# iconv built into libc) for the transcoding. See
+# https://www.gnu.org/software/libiconv/ for the list of possible encodings.
+# The default value is: UTF-8.
+
 DOXYFILE_ENCODING      = UTF-8
 
 # The PROJECT_NAME tag is a single word (or a sequence of words surrounded by
@@ -6,7 +42,7 @@ DOXYFILE_ENCODING      = UTF-8
 # title of most generated pages and in a few other places.
 # The default value is: My Project.
 
-PROJECT_NAME           = "intel-ipsec-mb"
+PROJECT_NAME           = intel-ipsec-mb
 
 # The PROJECT_NUMBER tag can be used to enter a project or revision number. This
 # could be handy for archiving the generated documentation or if some version
@@ -34,16 +70,28 @@ PROJECT_LOGO           =
 
 OUTPUT_DIRECTORY       = ../docs/doc_api
 
-# If the CREATE_SUBDIRS tag is set to YES then doxygen will create 4096 sub-
-# directories (in 2 levels) under the output directory of each output format and
-# will distribute the generated files over these directories. Enabling this
+# If the CREATE_SUBDIRS tag is set to YES then doxygen will create up to 4096
+# sub-directories (in 2 levels) under the output directory of each output format
+# and will distribute the generated files over these directories. Enabling this
 # option can be useful when feeding doxygen a huge amount of source files, where
 # putting all generated files in the same directory would otherwise causes
-# performance problems for the file system.
+# performance problems for the file system. Adapt CREATE_SUBDIRS_LEVEL to
+# control the number of sub-directories.
 # The default value is: NO.
 
 CREATE_SUBDIRS         = NO
 
+# Controls the number of sub-directories that will be created when
+# CREATE_SUBDIRS tag is set to YES. Level 0 represents 16 directories, and every
+# level increment doubles the number of directories, resulting in 4096
+# directories at level 8 which is the default and also the maximum value. The
+# sub-directories are organized in 2 levels, the first level always has a fixed
+# number of 16 directories.
+# Minimum value: 0, maximum value: 8, default value: 8.
+# This tag requires that the tag CREATE_SUBDIRS is set to YES.
+
+CREATE_SUBDIRS_LEVEL   = 8
+
 # If the ALLOW_UNICODE_NAMES tag is set to YES, doxygen will allow non-ASCII
 # characters to appear in the names of generated files. If set to NO, non-ASCII
 # characters will be escaped, for example _xE3_x81_x84 will be used for Unicode
@@ -55,14 +103,14 @@ ALLOW_UNICODE_NAMES    = NO
 # The OUTPUT_LANGUAGE tag is used to specify the language in which all
 # documentation generated by doxygen is written. Doxygen will use this
 # information to generate all constant output in the proper language.
-# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Catalan, Chinese,
-# Chinese-Traditional, Croatian, Czech, Danish, Dutch, English (United States),
-# Esperanto, Farsi (Persian), Finnish, French, German, Greek, Hungarian,
-# Indonesian, Italian, Japanese, Japanese-en (Japanese with English messages),
-# Korean, Korean-en (Korean with English messages), Latvian, Lithuanian,
-# Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese, Romanian, Russian,
-# Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish, Swedish, Turkish,
-# Ukrainian and Vietnamese.
+# Possible values are: Afrikaans, Arabic, Armenian, Brazilian, Bulgarian,
+# Catalan, Chinese, Chinese-Traditional, Croatian, Czech, Danish, Dutch, English
+# (United States), Esperanto, Farsi (Persian), Finnish, French, German, Greek,
+# Hindi, Hungarian, Indonesian, Italian, Japanese, Japanese-en (Japanese with
+# English messages), Korean, Korean-en (Korean with English messages), Latvian,
+# Lithuanian, Macedonian, Norwegian, Persian (Farsi), Polish, Portuguese,
+# Romanian, Russian, Serbian, Serbian-Cyrillic, Slovak, Slovene, Spanish,
+# Swedish, Turkish, Ukrainian and Vietnamese.
 # The default value is: English.
 
 OUTPUT_LANGUAGE        = English
@@ -153,6 +201,16 @@ SHORT_NAMES            = NO
 
 JAVADOC_AUTOBRIEF      = NO
 
+# If the JAVADOC_BANNER tag is set to YES then doxygen will interpret a line
+# such as
+# /***************
+# as being the beginning of a Javadoc-style comment "banner". If set to NO, the
+# Javadoc-style will behave just like regular comments and it will not be
+# interpreted by doxygen.
+# The default value is: NO.
+
+JAVADOC_BANNER         = NO
+
 # If the QT_AUTOBRIEF tag is set to YES then doxygen will interpret the first
 # line (until the first dot) of a Qt-style comment as the brief description. If
 # set to NO, the Qt-style will behave just like regular Qt-style comments (thus
@@ -173,6 +231,14 @@ QT_AUTOBRIEF           = NO
 
 MULTILINE_CPP_IS_BRIEF = NO
 
+# By default Python docstrings are displayed as preformatted text and doxygen's
+# special commands cannot be used. By setting PYTHON_DOCSTRING to NO the
+# doxygen's special commands can be used and the contents of the docstring
+# documentation blocks is shown as doxygen documentation.
+# The default value is: YES.
+
+PYTHON_DOCSTRING       = YES
+
 # If the INHERIT_DOCS tag is set to YES then an undocumented member inherits the
 # documentation from any documented member that it re-implements.
 # The default value is: YES.
@@ -196,11 +262,16 @@ TAB_SIZE               = 8
 # the documentation. An alias has the form:
 # name=value
 # For example adding
-# "sideeffect=@par Side Effects:\n"
+# "sideeffect=@par Side Effects:^^"
 # will allow you to put the command \sideeffect (or @sideeffect) in the
 # documentation, which will result in a user-defined paragraph with heading
-# "Side Effects:". You can put \n's in the value part of an alias to insert
-# newlines.
+# "Side Effects:". Note that you cannot put \n's in the value part of an alias
+# to insert newlines (in the resulting output). You can put ^^ in the value part
+# of an alias to insert a newline as if a physical newline was in the original
+# file. When you need a literal { or } or , in the value part of an alias you
+# have to escape them by means of a backslash (\), this can lead to conflicts
+# with the commands \{ and \} for these it is advised to use the version @{ and
+# @} or use a double escape (\\{ and \\})
 
 ALIASES                =
 
@@ -232,28 +303,40 @@ OPTIMIZE_FOR_FORTRAN   = NO
 
 OPTIMIZE_OUTPUT_VHDL   = NO
 
+# Set the OPTIMIZE_OUTPUT_SLICE tag to YES if your project consists of Slice
+# sources only. Doxygen will then generate output that is more tailored for that
+# language. For instance, namespaces will be presented as modules, types will be
+# separated into more groups, etc.
+# The default value is: NO.
+
+OPTIMIZE_OUTPUT_SLICE  = NO
+
 # Doxygen selects the parser to use depending on the extension of the files it
 # parses. With this tag you can assign which parser to use for a given
 # extension. Doxygen has a built-in mapping, but you can override or extend it
 # using this tag. The format is ext=language, where ext is a file extension, and
-# language is one of the parsers supported by doxygen: IDL, Java, Javascript,
-# C#, C, C++, D, PHP, Objective-C, Python, Fortran (fixed format Fortran:
-# FortranFixed, free formatted Fortran: FortranFree, unknown formatted Fortran:
-# Fortran. In the later case the parser tries to guess whether the code is fixed
-# or free formatted code, this is the default for Fortran type files), VHDL. For
-# instance to make doxygen treat .inc files as Fortran files (default is PHP),
-# and .f files as C (default is Fortran), use: inc=Fortran f=C.
+# language is one of the parsers supported by doxygen: IDL, Java, JavaScript,
+# Csharp (C#), C, C++, Lex, D, PHP, md (Markdown), Objective-C, Python, Slice,
+# VHDL, Fortran (fixed format Fortran: FortranFixed, free formatted Fortran:
+# FortranFree, unknown formatted Fortran: Fortran. In the later case the parser
+# tries to guess whether the code is fixed or free formatted code, this is the
+# default for Fortran type files). For instance to make doxygen treat .inc files
+# as Fortran files (default is PHP), and .f files as C (default is Fortran),
+# use: inc=Fortran f=C.
 #
 # Note: For files without extension you can use no_extension as a placeholder.
 #
 # Note that for custom extensions you also need to set FILE_PATTERNS otherwise
-# the files are not read by doxygen.
+# the files are not read by doxygen. When specifying no_extension you should add
+# * to the FILE_PATTERNS.
+#
+# Note see also the list of default file extension mappings.
 
 EXTENSION_MAPPING      =
 
 # If the MARKDOWN_SUPPORT tag is enabled then doxygen pre-processes all comments
 # according to the Markdown format, which allows for more readable
-# documentation. See http://daringfireball.net/projects/markdown/ for details.
+# documentation. See https://daringfireball.net/projects/markdown/ for details.
 # The output of markdown processing is further processed by doxygen, so you can
 # mix doxygen, HTML, and XML commands with Markdown formatting. Disable only in
 # case of backward compatibilities issues.
@@ -261,6 +344,26 @@ EXTENSION_MAPPING      =
 
 MARKDOWN_SUPPORT       = YES
 
+# When the TOC_INCLUDE_HEADINGS tag is set to a non-zero value, all headings up
+# to that level are automatically included in the table of contents, even if
+# they do not have an id attribute.
+# Note: This feature currently applies only to Markdown headings.
+# Minimum value: 0, maximum value: 99, default value: 5.
+# This tag requires that the tag MARKDOWN_SUPPORT is set to YES.
+
+TOC_INCLUDE_HEADINGS   = 5
+
+# The MARKDOWN_ID_STYLE tag can be used to specify the algorithm used to
+# generate identifiers for the Markdown headings. Note: Every identifier is
+# unique.
+# Possible values are: DOXYGEN Use a fixed 'autotoc_md' string followed by a
+# sequence number starting at 0. and GITHUB Use the lower case version of title
+# with any whitespace replaced by '-' and punctations characters removed..
+# The default value is: DOXYGEN.
+# This tag requires that the tag MARKDOWN_SUPPORT is set to YES.
+
+MARKDOWN_ID_STYLE      = DOXYGEN
+
 # When enabled doxygen tries to link words that correspond to documented
 # classes, or namespaces to their corresponding documentation. Such a link can
 # be prevented in individual cases by putting a % sign in front of the word or
@@ -286,7 +389,7 @@ BUILTIN_STL_SUPPORT    = NO
 CPP_CLI_SUPPORT        = NO
 
 # Set the SIP_SUPPORT tag to YES if your project consists of sip (see:
-# http://www.riverbankcomputing.co.uk/software/sip/intro) sources only. Doxygen
+# https://www.riverbankcomputing.com/software/sip/intro) sources only. Doxygen
 # will parse them like normal C++ but will assume all classes use public instead
 # of private inheritance when no explicit protection keyword is present.
 # The default value is: NO.
@@ -372,6 +475,27 @@ TYPEDEF_HIDES_STRUCT   = NO
 
 LOOKUP_CACHE_SIZE      = 0
 
+# The NUM_PROC_THREADS specifies the number of threads doxygen is allowed to use
+# during processing. When set to 0 doxygen will based this on the number of
+# cores available in the system. You can set it explicitly to a value larger
+# than 0 to get more control over the balance between CPU load and processing
+# speed. At this moment only the input processing can be done using multiple
+# threads. Since this is still an experimental feature the default is set to 1,
+# which effectively disables parallel processing. Please report any issues you
+# encounter. Generating dot graphs in parallel is controlled by the
+# DOT_NUM_THREADS setting.
+# Minimum value: 0, maximum value: 32, default value: 1.
+
+NUM_PROC_THREADS       = 1
+
+# If the TIMESTAMP tag is set different from NO then each generated page will
+# contain the date or date and time when the page was generated. Setting this to
+# NO can help when comparing the output of multiple runs.
+# Possible values are: YES, NO, DATETIME and DATE.
+# The default value is: NO.
+
+TIMESTAMP              = NO
+
 #---------------------------------------------------------------------------
 # Build related configuration options
 #---------------------------------------------------------------------------
@@ -392,6 +516,12 @@ EXTRACT_ALL            = YES
 
 EXTRACT_PRIVATE        = NO
 
+# If the EXTRACT_PRIV_VIRTUAL tag is set to YES, documented private virtual
+# methods of a class will be included in the documentation.
+# The default value is: NO.
+
+EXTRACT_PRIV_VIRTUAL   = NO
+
 # If the EXTRACT_PACKAGE tag is set to YES, all members with package or internal
 # scope will be included in the documentation.
 # The default value is: NO.
@@ -429,6 +559,13 @@ EXTRACT_LOCAL_METHODS  = NO
 
 EXTRACT_ANON_NSPACES   = NO
 
+# If this flag is set to YES, the name of an unnamed parameter in a declaration
+# will be determined by the corresponding definition. By default unnamed
+# parameters remain unnamed in the output.
+# The default value is: YES.
+
+RESOLVE_UNNAMED_PARAMS = YES
+
 # If the HIDE_UNDOC_MEMBERS tag is set to YES, doxygen will hide all
 # undocumented members inside documented classes or files. If set to NO these
 # members will be included in the various overviews, but no documentation
@@ -440,14 +577,15 @@ HIDE_UNDOC_MEMBERS     = NO
 # If the HIDE_UNDOC_CLASSES tag is set to YES, doxygen will hide all
 # undocumented classes that are normally visible in the class hierarchy. If set
 # to NO, these classes will be included in the various overviews. This option
-# has no effect if EXTRACT_ALL is enabled.
+# will also hide undocumented C++ concepts if enabled. This option has no effect
+# if EXTRACT_ALL is enabled.
 # The default value is: NO.
 
 HIDE_UNDOC_CLASSES     = NO
 
 # If the HIDE_FRIEND_COMPOUNDS tag is set to YES, doxygen will hide all friend
-# (class|struct|union) declarations. If set to NO, these declarations will be
-# included in the documentation.
+# declarations. If set to NO, these declarations will be included in the
+# documentation.
 # The default value is: NO.
 
 HIDE_FRIEND_COMPOUNDS  = NO
@@ -466,12 +604,20 @@ HIDE_IN_BODY_DOCS      = NO
 
 INTERNAL_DOCS          = NO
 
-# If the CASE_SENSE_NAMES tag is set to NO then doxygen will only generate file
-# names in lower-case letters. If set to YES, upper-case letters are also
-# allowed. This is useful if you have classes or files whose names only differ
-# in case and if your file system supports case sensitive file names. Windows
-# and Mac users are advised to set this option to NO.
-# The default value is: system dependent.
+# With the correct setting of option CASE_SENSE_NAMES doxygen will better be
+# able to match the capabilities of the underlying filesystem. In case the
+# filesystem is case sensitive (i.e. it supports files in the same directory
+# whose names only differ in casing), the option must be set to YES to properly
+# deal with such files in case they appear in the input. For filesystems that
+# are not case sensitive the option should be set to NO to properly deal with
+# output files written for symbols that only differ in casing, such as for two
+# classes, one named CLASS and the other named Class, and to also support
+# references to files without having to specify the exact matching casing. On
+# Windows (including Cygwin) and MacOS, users should typically set this option
+# to NO, whereas on Linux or other Unix flavors it should typically be set to
+# YES.
+# Possible values are: SYSTEM, NO and YES.
+# The default value is: SYSTEM.
 
 CASE_SENSE_NAMES       = YES
 
@@ -489,6 +635,12 @@ HIDE_SCOPE_NAMES       = NO
 
 HIDE_COMPOUND_REFERENCE= NO
 
+# If the SHOW_HEADERFILE tag is set to YES then the documentation for a class
+# will show which file needs to be included to use the class.
+# The default value is: YES.
+
+SHOW_HEADERFILE        = YES
+
 # If the SHOW_INCLUDE_FILES tag is set to YES then doxygen will put a list of
 # the files that are included by a file in the documentation of that file.
 # The default value is: YES.
@@ -646,7 +798,8 @@ FILE_VERSION_FILTER    =
 # output files in an output format independent way. To create the layout file
 # that represents doxygen's defaults, run doxygen with the -l option. You can
 # optionally specify a file name after the option, if omitted DoxygenLayout.xml
-# will be used as the name of the layout file.
+# will be used as the name of the layout file. See also section "Changing the
+# layout of pages" for information.
 #
 # Note that if you run doxygen from a directory containing a file called
 # DoxygenLayout.xml, doxygen will parse it automatically even if the LAYOUT_FILE
@@ -657,7 +810,7 @@ LAYOUT_FILE            =
 # The CITE_BIB_FILES tag can be used to specify one or more bib files containing
 # the reference definitions. This must be a list of .bib files. The .bib
 # extension is automatically appended if omitted. This requires the bibtex tool
-# to be installed. See also http://en.wikipedia.org/wiki/BibTeX for more info.
+# to be installed. See also https://en.wikipedia.org/wiki/BibTeX for more info.
 # For LaTeX the style of the bibliography can be controlled using
 # LATEX_BIB_STYLE. To use this feature you need bibtex and perl available in the
 # search path. See also \cite for info how to create references.
@@ -692,23 +845,50 @@ WARNINGS               = YES
 WARN_IF_UNDOCUMENTED   = YES
 
 # If the WARN_IF_DOC_ERROR tag is set to YES, doxygen will generate warnings for
-# potential errors in the documentation, such as not documenting some parameters
-# in a documented function, or documenting parameters that don't exist or using
-# markup commands wrongly.
+# potential errors in the documentation, such as documenting some parameters in
+# a documented function twice, or documenting parameters that don't exist or
+# using markup commands wrongly.
 # The default value is: YES.
 
 WARN_IF_DOC_ERROR      = YES
 
+# If WARN_IF_INCOMPLETE_DOC is set to YES, doxygen will warn about incomplete
+# function parameter documentation. If set to NO, doxygen will accept that some
+# parameters have no documentation without warning.
+# The default value is: YES.
+
+WARN_IF_INCOMPLETE_DOC = YES
+
 # This WARN_NO_PARAMDOC option can be enabled to get warnings for functions that
 # are documented, but have no documentation for their parameters or return
-# value. If set to NO, doxygen will only warn about wrong or incomplete
-# parameter documentation, but not about the absence of documentation.
+# value. If set to NO, doxygen will only warn about wrong parameter
+# documentation, but not about the absence of documentation. If EXTRACT_ALL is
+# set to YES then this flag will automatically be disabled. See also
+# WARN_IF_INCOMPLETE_DOC
 # The default value is: NO.
 
 WARN_NO_PARAMDOC       = NO
 
+# If WARN_IF_UNDOC_ENUM_VAL option is set to YES, doxygen will warn about
+# undocumented enumeration values. If set to NO, doxygen will accept
+# undocumented enumeration values. If EXTRACT_ALL is set to YES then this flag
+# will automatically be disabled.
+# The default value is: NO.
+
+WARN_IF_UNDOC_ENUM_VAL = NO
+
 # If the WARN_AS_ERROR tag is set to YES then doxygen will immediately stop when
-# a warning is encountered.
+# a warning is encountered. If the WARN_AS_ERROR tag is set to FAIL_ON_WARNINGS
+# then doxygen will continue running as if WARN_AS_ERROR tag is set to NO, but
+# at the end of the doxygen process doxygen will return with a non-zero status.
+# If the WARN_AS_ERROR tag is set to FAIL_ON_WARNINGS_PRINT then doxygen behaves
+# like FAIL_ON_WARNINGS but in case no WARN_LOGFILE is defined doxygen will not
+# write the warning messages in between other messages but write them at the end
+# of a run, in case a WARN_LOGFILE is defined the warning messages will be
+# besides being in the defined file also be shown at the end of a run, unless
+# the WARN_LOGFILE is defined as - i.e. standard output (stdout) in that case
+# the behavior will remain as with the setting FAIL_ON_WARNINGS.
+# Possible values are: NO, YES, FAIL_ON_WARNINGS and FAIL_ON_WARNINGS_PRINT.
 # The default value is: NO.
 
 WARN_AS_ERROR          = NO
@@ -719,13 +899,27 @@ WARN_AS_ERROR          = NO
 # and the warning text. Optionally the format may contain $version, which will
 # be replaced by the version of the file (if it could be obtained via
 # FILE_VERSION_FILTER)
+# See also: WARN_LINE_FORMAT
 # The default value is: $file:$line: $text.
 
 WARN_FORMAT            = "$file:$line: $text"
 
+# In the $text part of the WARN_FORMAT command it is possible that a reference
+# to a more specific place is given. To make it easier to jump to this place
+# (outside of doxygen) the user can define a custom "cut" / "paste" string.
+# Example:
+# WARN_LINE_FORMAT = "'vi $file +$line'"
+# See also: WARN_FORMAT
+# The default value is: at line $line of file $file.
+
+WARN_LINE_FORMAT       = "at line $line of file $file"
+
 # The WARN_LOGFILE tag can be used to specify a file to which warning and error
 # messages should be written. If left blank the output is written to standard
-# error (stderr).
+# error (stderr). In case the file specified cannot be opened for writing the
+# warning and error messages are written to standard error. When as file - is
+# specified the warning and error messages are written to standard output
+# (stdout).
 
 WARN_LOGFILE           =
 
@@ -739,17 +933,29 @@ WARN_LOGFILE           =
 # spaces. See also FILE_PATTERNS and EXTENSION_MAPPING
 # Note: If this tag is empty the current directory is searched.
 
-INPUT                  = ./intel-ipsec-mb.h ../README.md
+INPUT                  = ./intel-ipsec-mb.h \
+                         ../README.md
 
 # This tag can be used to specify the character encoding of the source files
 # that doxygen parses. Internally doxygen uses the UTF-8 encoding. Doxygen uses
 # libiconv (or the iconv built into libc) for the transcoding. See the libiconv
-# documentation (see: http://www.gnu.org/software/libiconv) for the list of
-# possible encodings.
+# documentation (see:
+# https://www.gnu.org/software/libiconv/) for the list of possible encodings.
+# See also: INPUT_FILE_ENCODING
 # The default value is: UTF-8.
 
 INPUT_ENCODING         = UTF-8
 
+# This tag can be used to specify the character encoding of the source files
+# that doxygen parses The INPUT_FILE_ENCODING tag can be used to specify
+# character encoding on a per file pattern basis. Doxygen will compare the file
+# name with each pattern and apply the encoding instead of the default
+# INPUT_ENCODING) if there is a match. The character encodings are a list of the
+# form: pattern=encoding (like *.php=ISO-8859-1). See cfg_input_encoding
+# "INPUT_ENCODING" for further information on supported encodings.
+
+INPUT_FILE_ENCODING    =
+
 # If the value of the INPUT tag contains directories, you can use the
 # FILE_PATTERNS tag to specify one or more wildcard patterns (like *.cpp and
 # *.h) to filter out the source-files in the directories.
@@ -758,11 +964,15 @@ INPUT_ENCODING         = UTF-8
 # need to set EXTENSION_MAPPING for the extension otherwise the files are not
 # read by doxygen.
 #
+# Note the list of default checked file patterns might differ from the list of
+# default file extension mappings.
+#
 # If left blank the following patterns are tested:*.c, *.cc, *.cxx, *.cpp,
 # *.c++, *.java, *.ii, *.ixx, *.ipp, *.i++, *.inl, *.idl, *.ddl, *.odl, *.h,
-# *.hh, *.hxx, *.hpp, *.h++, *.cs, *.d, *.php, *.php4, *.php5, *.phtml, *.inc,
-# *.m, *.markdown, *.md, *.mm, *.dox, *.py, *.pyw, *.f90, *.f, *.for, *.tcl,
-# *.vhd, *.vhdl, *.ucf, *.qsf, *.as and *.js.
+# *.hh, *.hxx, *.hpp, *.h++, *.l, *.cs, *.d, *.php, *.php4, *.php5, *.phtml,
+# *.inc, *.m, *.markdown, *.md, *.mm, *.dox (to be provided as doxygen C
+# comment), *.py, *.pyw, *.f90, *.f95, *.f03, *.f08, *.f18, *.f, *.for, *.vhd,
+# *.vhdl, *.ucf, *.qsf and *.ice.
 
 FILE_PATTERNS          =
 
@@ -801,10 +1011,7 @@ EXCLUDE_PATTERNS       =
 # (namespaces, classes, functions, etc.) that should be excluded from the
 # output. The symbol name can be a fully qualified name, a word, or if the
 # wildcard * is used, a substring. Examples: ANamespace, AClass,
-# AClass::ANamespace, ANamespace::*Test
-#
-# Note that the wildcards are matched against the file with absolute path, so to
-# exclude all test directories use the pattern */test/*
+# ANamespace::AClass, ANamespace::*Test
 
 EXCLUDE_SYMBOLS        =
 
@@ -849,6 +1056,11 @@ IMAGE_PATH             =
 # code is scanned, but not when the output code is generated. If lines are added
 # or removed, the anchors will not be placed correctly.
 #
+# Note that doxygen will use the data processed and written to standard output
+# for further processing, therefore nothing else, like debug statements or used
+# commands (so in case of a Windows batch file always use @echo OFF), should be
+# written to standard output.
+#
 # Note that for custom extensions or not directly supported extensions you also
 # need to set EXTENSION_MAPPING for the extension otherwise the files are not
 # properly processed by doxygen.
@@ -890,6 +1102,15 @@ FILTER_SOURCE_PATTERNS =
 
 USE_MDFILE_AS_MAINPAGE = README.md
 
+# The Fortran standard specifies that for fixed formatted Fortran code all
+# characters from position 72 are to be considered as comment. A common
+# extension is to allow longer lines before the automatic comment starts. The
+# setting FORTRAN_COMMENT_AFTER will also make it possible that longer lines can
+# be processed before the automatic comment starts.
+# Minimum value: 7, maximum value: 10000, default value: 72.
+
+FORTRAN_COMMENT_AFTER  = 72
+
 #---------------------------------------------------------------------------
 # Configuration options related to source browsing
 #---------------------------------------------------------------------------
@@ -917,7 +1138,7 @@ INLINE_SOURCES         = NO
 STRIP_CODE_COMMENTS    = YES
 
 # If the REFERENCED_BY_RELATION tag is set to YES then for each documented
-# function all documented functions referencing it will be listed.
+# entity all documented functions referencing it will be listed.
 # The default value is: NO.
 
 REFERENCED_BY_RELATION = NO
@@ -949,12 +1170,12 @@ SOURCE_TOOLTIPS        = YES
 # If the USE_HTAGS tag is set to YES then the references to source code will
 # point to the HTML generated by the htags(1) tool instead of doxygen built-in
 # source browser. The htags tool is part of GNU's global source tagging system
-# (see http://www.gnu.org/software/global/global.html). You will need version
+# (see https://www.gnu.org/software/global/global.html). You will need version
 # 4.8.6 or higher.
 #
 # To use it do the following:
 # - Install the latest version of global
-# - Enable SOURCE_BROWSER and USE_HTAGS in the config file
+# - Enable SOURCE_BROWSER and USE_HTAGS in the configuration file
 # - Make sure the INPUT points to the root of the source tree
 # - Run doxygen as normal
 #
@@ -976,6 +1197,46 @@ USE_HTAGS              = NO
 
 VERBATIM_HEADERS       = YES
 
+# If the CLANG_ASSISTED_PARSING tag is set to YES then doxygen will use the
+# clang parser (see:
+# http://clang.llvm.org/) for more accurate parsing at the cost of reduced
+# performance. This can be particularly helpful with template rich C++ code for
+# which doxygen's built-in parser lacks the necessary type information.
+# Note: The availability of this option depends on whether or not doxygen was
+# generated with the -Duse_libclang=ON option for CMake.
+# The default value is: NO.
+
+CLANG_ASSISTED_PARSING = NO
+
+# If the CLANG_ASSISTED_PARSING tag is set to YES and the CLANG_ADD_INC_PATHS
+# tag is set to YES then doxygen will add the directory of each input to the
+# include path.
+# The default value is: YES.
+# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES.
+
+CLANG_ADD_INC_PATHS    = YES
+
+# If clang assisted parsing is enabled you can provide the compiler with command
+# line options that you would normally use when invoking the compiler. Note that
+# the include paths will already be set by doxygen for the files and directories
+# specified with INPUT and INCLUDE_PATH.
+# This tag requires that the tag CLANG_ASSISTED_PARSING is set to YES.
+
+CLANG_OPTIONS          =
+
+# If clang assisted parsing is enabled you can provide the clang parser with the
+# path to the directory containing a file called compile_commands.json. This
+# file is the compilation database (see:
+# http://clang.llvm.org/docs/HowToSetupToolingForLLVM.html) containing the
+# options used when the source files were built. This is equivalent to
+# specifying the -p option to a clang tool, such as clang-check. These options
+# will then be passed to the parser. Any options specified with CLANG_OPTIONS
+# will be added as well.
+# Note: The availability of this option depends on whether or not doxygen was
+# generated with the -Duse_libclang=ON option for CMake.
+
+CLANG_DATABASE_PATH    =
+
 #---------------------------------------------------------------------------
 # Configuration options related to the alphabetical class index
 #---------------------------------------------------------------------------
@@ -987,10 +1248,11 @@ VERBATIM_HEADERS       = YES
 
 ALPHABETICAL_INDEX     = YES
 
-# In case all classes in a project start with a common prefix, all classes will
-# be put under the same header in the alphabetical index. The IGNORE_PREFIX tag
-# can be used to specify a prefix (or a list of prefixes) that should be ignored
-# while generating the index headers.
+# The IGNORE_PREFIX tag can be used to specify a prefix (or a list of prefixes)
+# that should be ignored while generating the index headers. The IGNORE_PREFIX
+# tag works for classes, function and member names. The entity will be placed in
+# the alphabetical list under the first letter of the entity name that remains
+# after removing the prefix.
 # This tag requires that the tag ALPHABETICAL_INDEX is set to YES.
 
 IGNORE_PREFIX          =
@@ -1069,7 +1331,12 @@ HTML_STYLESHEET        =
 # Doxygen will copy the style sheet files to the output directory.
 # Note: The order of the extra style sheet files is of importance (e.g. the last
 # style sheet in the list overrules the setting of the previous ones in the
-# list). For an example see the documentation.
+# list).
+# Note: Since the styling of scrollbars can currently not be overruled in
+# Webkit/Chromium, the styling will be left out of the default doxygen.css if
+# one or more extra stylesheets have been specified. So if scrollbar
+# customization is desired it has to be added explicitly. For an example see the
+# documentation.
 # This tag requires that the tag GENERATE_HTML is set to YES.
 
 HTML_EXTRA_STYLESHEET  =
@@ -1084,10 +1351,23 @@ HTML_EXTRA_STYLESHEET  =
 
 HTML_EXTRA_FILES       =
 
+# The HTML_COLORSTYLE tag can be used to specify if the generated HTML output
+# should be rendered with a dark or light theme.
+# Possible values are: LIGHT always generate light mode output, DARK always
+# generate dark mode output, AUTO_LIGHT automatically set the mode according to
+# the user preference, use light mode if no preference is set (the default),
+# AUTO_DARK automatically set the mode according to the user preference, use
+# dark mode if no preference is set and TOGGLE allow to user to switch between
+# light and dark mode via a button.
+# The default value is: AUTO_LIGHT.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_COLORSTYLE        = AUTO_LIGHT
+
 # The HTML_COLORSTYLE_HUE tag controls the color of the HTML output. Doxygen
 # will adjust the colors in the style sheet and background images according to
-# this color. Hue is specified as an angle on a colorwheel, see
-# http://en.wikipedia.org/wiki/Hue for more information. For instance the value
+# this color. Hue is specified as an angle on a color-wheel, see
+# https://en.wikipedia.org/wiki/Hue for more information. For instance the value
 # 0 represents red, 60 is yellow, 120 is green, 180 is cyan, 240 is blue, 300
 # purple, and 360 is red again.
 # Minimum value: 0, maximum value: 359, default value: 220.
@@ -1096,7 +1376,7 @@ HTML_EXTRA_FILES       =
 HTML_COLORSTYLE_HUE    = 220
 
 # The HTML_COLORSTYLE_SAT tag controls the purity (or saturation) of the colors
-# in the HTML output. For a value of 0 the output will use grayscales only. A
+# in the HTML output. For a value of 0 the output will use gray-scales only. A
 # value of 255 will produce the most vivid colors.
 # Minimum value: 0, maximum value: 255, default value: 100.
 # This tag requires that the tag GENERATE_HTML is set to YES.
@@ -1114,14 +1394,16 @@ HTML_COLORSTYLE_SAT    = 100
 
 HTML_COLORSTYLE_GAMMA  = 80
 
-# If the HTML_TIMESTAMP tag is set to YES then the footer of each generated HTML
-# page will contain the date and time when the page was generated. Setting this
-# to YES can help to show when doxygen was last run and thus if the
-# documentation is up to date.
-# The default value is: NO.
+# If the HTML_DYNAMIC_MENUS tag is set to YES then the generated HTML
+# documentation will contain a main index with vertical navigation menus that
+# are dynamically created via JavaScript. If disabled, the navigation index will
+# consists of multiple levels of tabs that are statically embedded in every HTML
+# page. Disable this option to support browsers that do not have JavaScript,
+# like the Qt help browser.
+# The default value is: YES.
 # This tag requires that the tag GENERATE_HTML is set to YES.
 
-HTML_TIMESTAMP         = NO
+HTML_DYNAMIC_MENUS     = YES
 
 # If the HTML_DYNAMIC_SECTIONS tag is set to YES then the generated HTML
 # documentation will contain sections that can be hidden and shown after the
@@ -1146,13 +1428,14 @@ HTML_INDEX_NUM_ENTRIES = 100
 
 # If the GENERATE_DOCSET tag is set to YES, additional index files will be
 # generated that can be used as input for Apple's Xcode 3 integrated development
-# environment (see: http://developer.apple.com/tools/xcode/), introduced with
-# OSX 10.5 (Leopard). To create a documentation set, doxygen will generate a
-# Makefile in the HTML output directory. Running make will produce the docset in
-# that directory and running make install will install the docset in
+# environment (see:
+# https://developer.apple.com/xcode/), introduced with OSX 10.5 (Leopard). To
+# create a documentation set, doxygen will generate a Makefile in the HTML
+# output directory. Running make will produce the docset in that directory and
+# running make install will install the docset in
 # ~/Library/Developer/Shared/Documentation/DocSets so that Xcode will find it at
-# startup. See http://developer.apple.com/tools/creatingdocsetswithdoxygen.html
-# for more information.
+# startup. See https://developer.apple.com/library/archive/featuredarticles/Doxy
+# genXcode/_index.html for more information.
 # The default value is: NO.
 # This tag requires that the tag GENERATE_HTML is set to YES.
 
@@ -1166,6 +1449,13 @@ GENERATE_DOCSET        = NO
 
 DOCSET_FEEDNAME        = "Doxygen generated docs"
 
+# This tag determines the URL of the docset feed. A documentation feed provides
+# an umbrella under which multiple documentation sets from a single provider
+# (such as a company or product suite) can be grouped.
+# This tag requires that the tag GENERATE_DOCSET is set to YES.
+
+DOCSET_FEEDURL         =
+
 # This tag specifies a string that should uniquely identify the documentation
 # set bundle. This should be a reverse domain-name style string, e.g.
 # com.mycompany.MyDocSet. Doxygen will append .docset to the name.
@@ -1191,8 +1481,12 @@ DOCSET_PUBLISHER_NAME  = Publisher
 # If the GENERATE_HTMLHELP tag is set to YES then doxygen generates three
 # additional HTML index files: index.hhp, index.hhc, and index.hhk. The
 # index.hhp is a project file that can be read by Microsoft's HTML Help Workshop
-# (see: http://www.microsoft.com/en-us/download/details.aspx?id=21138) on
-# Windows.
+# on Windows. In the beginning of 2021 Microsoft took the original page, with
+# a.o. the download links, offline the HTML help workshop was already many years
+# in maintenance mode). You can download the HTML help workshop from the web
+# archives at Installation executable (see:
+# http://web.archive.org/web/20160201063255/http://download.microsoft.com/downlo
+# ad/0/A/9/0A939EF6-E31C-430F-A3DF-DFAE7960D564/htmlhelp.exe).
 #
 # The HTML Help Workshop contains a compiler that can convert all HTML output
 # generated by doxygen into a single compiled HTML file (.chm). Compiled HTML
@@ -1222,7 +1516,7 @@ CHM_FILE               =
 HHC_LOCATION           =
 
 # The GENERATE_CHI flag controls if a separate .chi index file is generated
-# (YES) or that it should be included in the master .chm file (NO).
+# (YES) or that it should be included in the main .chm file (NO).
 # The default value is: NO.
 # This tag requires that the tag GENERATE_HTMLHELP is set to YES.
 
@@ -1249,6 +1543,16 @@ BINARY_TOC             = NO
 
 TOC_EXPAND             = NO
 
+# The SITEMAP_URL tag is used to specify the full URL of the place where the
+# generated documentation will be placed on the server by the user during the
+# deployment of the documentation. The generated sitemap is called sitemap.xml
+# and placed on the directory specified by HTML_OUTPUT. In case no SITEMAP_URL
+# is specified no sitemap is generated. For information about the sitemap
+# protocol see https://www.sitemaps.org
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+SITEMAP_URL            =
+
 # If the GENERATE_QHP tag is set to YES and both QHP_NAMESPACE and
 # QHP_VIRTUAL_FOLDER are set, an additional index file will be generated that
 # can be used as input for Qt's qhelpgenerator to generate a Qt Compressed Help
@@ -1267,7 +1571,8 @@ QCH_FILE               =
 
 # The QHP_NAMESPACE tag specifies the namespace to use when generating Qt Help
 # Project output. For more information please see Qt Help Project / Namespace
-# (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#namespace).
+# (see:
+# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#namespace).
 # The default value is: org.doxygen.Project.
 # This tag requires that the tag GENERATE_QHP is set to YES.
 
@@ -1275,8 +1580,8 @@ QHP_NAMESPACE          = org.doxygen.Project
 
 # The QHP_VIRTUAL_FOLDER tag specifies the namespace to use when generating Qt
 # Help Project output. For more information please see Qt Help Project / Virtual
-# Folders (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#virtual-
-# folders).
+# Folders (see:
+# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#virtual-folders).
 # The default value is: doc.
 # This tag requires that the tag GENERATE_QHP is set to YES.
 
@@ -1284,30 +1589,30 @@ QHP_VIRTUAL_FOLDER     = doc
 
 # If the QHP_CUST_FILTER_NAME tag is set, it specifies the name of a custom
 # filter to add. For more information please see Qt Help Project / Custom
-# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
-# filters).
+# Filters (see:
+# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom-filters).
 # This tag requires that the tag GENERATE_QHP is set to YES.
 
 QHP_CUST_FILTER_NAME   =
 
 # The QHP_CUST_FILTER_ATTRS tag specifies the list of the attributes of the
 # custom filter to add. For more information please see Qt Help Project / Custom
-# Filters (see: http://qt-project.org/doc/qt-4.8/qthelpproject.html#custom-
-# filters).
+# Filters (see:
+# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#custom-filters).
 # This tag requires that the tag GENERATE_QHP is set to YES.
 
 QHP_CUST_FILTER_ATTRS  =
 
 # The QHP_SECT_FILTER_ATTRS tag specifies the list of the attributes this
 # project's filter section matches. Qt Help Project / Filter Attributes (see:
-# http://qt-project.org/doc/qt-4.8/qthelpproject.html#filter-attributes).
+# https://doc.qt.io/archives/qt-4.8/qthelpproject.html#filter-attributes).
 # This tag requires that the tag GENERATE_QHP is set to YES.
 
 QHP_SECT_FILTER_ATTRS  =
 
-# The QHG_LOCATION tag can be used to specify the location of Qt's
-# qhelpgenerator. If non-empty doxygen will try to run qhelpgenerator on the
-# generated .qhp file.
+# The QHG_LOCATION tag can be used to specify the location (absolute path
+# including file name) of Qt's qhelpgenerator. If non-empty doxygen will try to
+# run qhelpgenerator on the generated .qhp file.
 # This tag requires that the tag GENERATE_QHP is set to YES.
 
 QHG_LOCATION           =
@@ -1350,16 +1655,28 @@ DISABLE_INDEX          = YES
 # to work a browser that supports JavaScript, DHTML, CSS and frames is required
 # (i.e. any modern browser). Windows users are probably better off using the
 # HTML help feature. Via custom style sheets (see HTML_EXTRA_STYLESHEET) one can
-# further fine-tune the look of the index. As an example, the default style
-# sheet generated by doxygen has an example that shows how to put an image at
-# the root of the tree instead of the PROJECT_NAME. Since the tree basically has
-# the same information as the tab index, you could consider setting
-# DISABLE_INDEX to YES when enabling this option.
+# further fine tune the look of the index (see "Fine-tuning the output"). As an
+# example, the default style sheet generated by doxygen has an example that
+# shows how to put an image at the root of the tree instead of the PROJECT_NAME.
+# Since the tree basically has the same information as the tab index, you could
+# consider setting DISABLE_INDEX to YES when enabling this option.
 # The default value is: NO.
 # This tag requires that the tag GENERATE_HTML is set to YES.
 
 GENERATE_TREEVIEW      = YES
 
+# When both GENERATE_TREEVIEW and DISABLE_INDEX are set to YES, then the
+# FULL_SIDEBAR option determines if the side bar is limited to only the treeview
+# area (value NO) or if it should extend to the full height of the window (value
+# YES). Setting this to YES gives a layout similar to
+# https://docs.readthedocs.io with more room for contents, but less room for the
+# project logo, title, and description. If either GENERATE_TREEVIEW or
+# DISABLE_INDEX is set to NO, this option has no effect.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+FULL_SIDEBAR           = NO
+
 # The ENUM_VALUES_PER_LINE tag can be used to set the number of enum values that
 # doxygen will group on one line in the generated HTML documentation.
 #
@@ -1384,6 +1701,24 @@ TREEVIEW_WIDTH         = 250
 
 EXT_LINKS_IN_WINDOW    = NO
 
+# If the OBFUSCATE_EMAILS tag is set to YES, doxygen will obfuscate email
+# addresses.
+# The default value is: YES.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+OBFUSCATE_EMAILS       = YES
+
+# If the HTML_FORMULA_FORMAT option is set to svg, doxygen will use the pdf2svg
+# tool (see https://github.com/dawbarton/pdf2svg) or inkscape (see
+# https://inkscape.org) to generate formulas as SVG images instead of PNGs for
+# the HTML output. These images will generally look nicer at scaled resolutions.
+# Possible values are: png (the default) and svg (looks nicer but requires the
+# pdf2svg or inkscape tool).
+# The default value is: png.
+# This tag requires that the tag GENERATE_HTML is set to YES.
+
+HTML_FORMULA_FORMAT    = png
+
 # Use this tag to change the font size of LaTeX formulas included as images in
 # the HTML documentation. When you change the font size after a successful
 # doxygen run you need to manually remove any form_*.png images from the HTML
@@ -1393,19 +1728,14 @@ EXT_LINKS_IN_WINDOW    = NO
 
 FORMULA_FONTSIZE       = 10
 
-# Use the FORMULA_TRANPARENT tag to determine whether or not the images
-# generated for formulas are transparent PNGs. Transparent PNGs are not
-# supported properly for IE 6.0, but are supported on all modern browsers.
-#
-# Note that when changing this option you need to delete any form_*.png files in
-# the HTML output directory before the changes have effect.
-# The default value is: YES.
-# This tag requires that the tag GENERATE_HTML is set to YES.
+# The FORMULA_MACROFILE can contain LaTeX \newcommand and \renewcommand commands
+# to create new LaTeX commands to be used in formulas as building blocks. See
+# the section "Including formulas" for details.
 
-FORMULA_TRANSPARENT    = YES
+FORMULA_MACROFILE      =
 
 # Enable the USE_MATHJAX option to render LaTeX formulas using MathJax (see
-# http://www.mathjax.org) which uses client side Javascript for the rendering
+# https://www.mathjax.org) which uses client side JavaScript for the rendering
 # instead of using pre-rendered bitmaps. Use this if you do not have LaTeX
 # installed or if you want to formulas look prettier in the HTML output. When
 # enabled you may also need to install MathJax separately and configure the path
@@ -1415,11 +1745,29 @@ FORMULA_TRANSPARENT    = YES
 
 USE_MATHJAX            = NO
 
+# With MATHJAX_VERSION it is possible to specify the MathJax version to be used.
+# Note that the different versions of MathJax have different requirements with
+# regards to the different settings, so it is possible that also other MathJax
+# settings have to be changed when switching between the different MathJax
+# versions.
+# Possible values are: MathJax_2 and MathJax_3.
+# The default value is: MathJax_2.
+# This tag requires that the tag USE_MATHJAX is set to YES.
+
+MATHJAX_VERSION        = MathJax_2
+
 # When MathJax is enabled you can set the default output format to be used for
-# the MathJax output. See the MathJax site (see:
-# http://docs.mathjax.org/en/latest/output.html) for more details.
+# the MathJax output. For more details about the output format see MathJax
+# version 2 (see:
+# http://docs.mathjax.org/en/v2.7-latest/output.html) and MathJax version 3
+# (see:
+# http://docs.mathjax.org/en/latest/web/components/output.html).
 # Possible values are: HTML-CSS (which is slower, but has the best
-# compatibility), NativeMML (i.e. MathML) and SVG.
+# compatibility. This is the name for Mathjax version 2, for MathJax version 3
+# this will be translated into chtml), NativeMML (i.e. MathML. Only supported
+# for NathJax 2. For MathJax version 3 chtml will be used instead.), chtml (This
+# is the name for Mathjax version 3, for MathJax version 2 this will be
+# translated into HTML-CSS) and SVG.
 # The default value is: HTML-CSS.
 # This tag requires that the tag USE_MATHJAX is set to YES.
 
@@ -1432,22 +1780,29 @@ MATHJAX_FORMAT         = HTML-CSS
 # MATHJAX_RELPATH should be ../mathjax. The default value points to the MathJax
 # Content Delivery Network so you can quickly see the result without installing
 # MathJax. However, it is strongly recommended to install a local copy of
-# MathJax from http://www.mathjax.org before deployment.
-# The default value is: http://cdn.mathjax.org/mathjax/latest.
+# MathJax from https://www.mathjax.org before deployment. The default value is:
+# - in case of MathJax version 2: https://cdn.jsdelivr.net/npm/mathjax@2
+# - in case of MathJax version 3: https://cdn.jsdelivr.net/npm/mathjax@3
 # This tag requires that the tag USE_MATHJAX is set to YES.
 
 MATHJAX_RELPATH        = http://cdn.mathjax.org/mathjax/latest
 
 # The MATHJAX_EXTENSIONS tag can be used to specify one or more MathJax
 # extension names that should be enabled during MathJax rendering. For example
+# for MathJax version 2 (see
+# https://docs.mathjax.org/en/v2.7-latest/tex.html#tex-and-latex-extensions):
 # MATHJAX_EXTENSIONS = TeX/AMSmath TeX/AMSsymbols
+# For example for MathJax version 3 (see
+# http://docs.mathjax.org/en/latest/input/tex/extensions/index.html):
+# MATHJAX_EXTENSIONS = ams
 # This tag requires that the tag USE_MATHJAX is set to YES.
 
 MATHJAX_EXTENSIONS     =
 
 # The MATHJAX_CODEFILE tag can be used to specify a file with javascript pieces
 # of code that will be used on startup of the MathJax code. See the MathJax site
-# (see: http://docs.mathjax.org/en/latest/output.html) for more details. For an
+# (see:
+# http://docs.mathjax.org/en/v2.7-latest/output.html) for more details. For an
 # example see the documentation.
 # This tag requires that the tag USE_MATHJAX is set to YES.
 
@@ -1475,7 +1830,7 @@ MATHJAX_CODEFILE       =
 SEARCHENGINE           = YES
 
 # When the SERVER_BASED_SEARCH tag is enabled the search engine will be
-# implemented using a web server instead of a web client using Javascript. There
+# implemented using a web server instead of a web client using JavaScript. There
 # are two flavors of web server based searching depending on the EXTERNAL_SEARCH
 # setting. When disabled, doxygen will generate a PHP script for searching and
 # an index file used by the script. When EXTERNAL_SEARCH is enabled the indexing
@@ -1494,7 +1849,8 @@ SERVER_BASED_SEARCH    = NO
 #
 # Doxygen ships with an example indexer (doxyindexer) and search engine
 # (doxysearch.cgi) which are based on the open source search engine library
-# Xapian (see: http://xapian.org/).
+# Xapian (see:
+# https://xapian.org/).
 #
 # See the section "External Indexing and Searching" for details.
 # The default value is: NO.
@@ -1507,8 +1863,9 @@ EXTERNAL_SEARCH        = NO
 #
 # Doxygen ships with an example indexer (doxyindexer) and search engine
 # (doxysearch.cgi) which are based on the open source search engine library
-# Xapian (see: http://xapian.org/). See the section "External Indexing and
-# Searching" for details.
+# Xapian (see:
+# https://xapian.org/). See the section "External Indexing and Searching" for
+# details.
 # This tag requires that the tag SEARCHENGINE is set to YES.
 
 SEARCHENGINE_URL       =
@@ -1559,21 +1916,35 @@ LATEX_OUTPUT           = latex
 # The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be
 # invoked.
 #
-# Note that when enabling USE_PDFLATEX this option is only used for generating
-# bitmaps for formulas in the HTML output, but not in the Makefile that is
-# written to the output directory.
-# The default file is: latex.
+# Note that when not enabling USE_PDFLATEX the default is latex when enabling
+# USE_PDFLATEX the default is pdflatex and when in the later case latex is
+# chosen this is overwritten by pdflatex. For specific output languages the
+# default can have been set differently, this depends on the implementation of
+# the output language.
 # This tag requires that the tag GENERATE_LATEX is set to YES.
 
 LATEX_CMD_NAME         = latex
 
 # The MAKEINDEX_CMD_NAME tag can be used to specify the command name to generate
 # index for LaTeX.
+# Note: This tag is used in the Makefile / make.bat.
+# See also: LATEX_MAKEINDEX_CMD for the part in the generated output file
+# (.tex).
 # The default file is: makeindex.
 # This tag requires that the tag GENERATE_LATEX is set to YES.
 
 MAKEINDEX_CMD_NAME     = makeindex
 
+# The LATEX_MAKEINDEX_CMD tag can be used to specify the command name to
+# generate index for LaTeX. In case there is no backslash (\) as first character
+# it will be automatically added in the LaTeX code.
+# Note: This tag is used in the generated output file (.tex).
+# See also: MAKEINDEX_CMD_NAME for the part in the Makefile / make.bat.
+# The default value is: makeindex.
+# This tag requires that the tag GENERATE_LATEX is set to YES.
+
+LATEX_MAKEINDEX_CMD    = makeindex
+
 # If the COMPACT_LATEX tag is set to YES, doxygen generates more compact LaTeX
 # documents. This may be useful for small projects and may help to save some
 # trees in general.
@@ -1603,29 +1974,31 @@ PAPER_TYPE             = a4
 
 EXTRA_PACKAGES         =
 
-# The LATEX_HEADER tag can be used to specify a personal LaTeX header for the
-# generated LaTeX document. The header should contain everything until the first
-# chapter. If it is left blank doxygen will generate a standard header. See
-# section "Doxygen usage" for information on how to let doxygen write the
-# default header to a separate file.
+# The LATEX_HEADER tag can be used to specify a user-defined LaTeX header for
+# the generated LaTeX document. The header should contain everything until the
+# first chapter. If it is left blank doxygen will generate a standard header. It
+# is highly recommended to start with a default header using
+# doxygen -w latex new_header.tex new_footer.tex new_stylesheet.sty
+# and then modify the file new_header.tex. See also section "Doxygen usage" for
+# information on how to generate the default header that doxygen normally uses.
 #
-# Note: Only use a user-defined header if you know what you are doing! The
-# following commands have a special meaning inside the header: $title,
-# $datetime, $date, $doxygenversion, $projectname, $projectnumber,
-# $projectbrief, $projectlogo. Doxygen will replace $title with the empty
-# string, for the replacement values of the other commands the user is referred
-# to HTML_HEADER.
+# Note: Only use a user-defined header if you know what you are doing!
+# Note: The header is subject to change so you typically have to regenerate the
+# default header when upgrading to a newer version of doxygen. The following
+# commands have a special meaning inside the header (and footer): For a
+# description of the possible markers and block names see the documentation.
 # This tag requires that the tag GENERATE_LATEX is set to YES.
 
 LATEX_HEADER           =
 
-# The LATEX_FOOTER tag can be used to specify a personal LaTeX footer for the
-# generated LaTeX document. The footer should contain everything after the last
-# chapter. If it is left blank doxygen will generate a standard footer. See
+# The LATEX_FOOTER tag can be used to specify a user-defined LaTeX footer for
+# the generated LaTeX document. The footer should contain everything after the
+# last chapter. If it is left blank doxygen will generate a standard footer. See
 # LATEX_HEADER for more information on how to generate a default footer and what
-# special commands can be used inside the footer.
-#
-# Note: Only use a user-defined footer if you know what you are doing!
+# special commands can be used inside the footer. See also section "Doxygen
+# usage" for information on how to generate the default footer that doxygen
+# normally uses. Note: Only use a user-defined footer if you know what you are
+# doing!
 # This tag requires that the tag GENERATE_LATEX is set to YES.
 
 LATEX_FOOTER           =
@@ -1658,18 +2031,26 @@ LATEX_EXTRA_FILES      =
 
 PDF_HYPERLINKS         = YES
 
-# If the USE_PDFLATEX tag is set to YES, doxygen will use pdflatex to generate
-# the PDF file directly from the LaTeX files. Set this option to YES, to get a
-# higher quality PDF documentation.
+# If the USE_PDFLATEX tag is set to YES, doxygen will use the engine as
+# specified with LATEX_CMD_NAME to generate the PDF file directly from the LaTeX
+# files. Set this option to YES, to get a higher quality PDF documentation.
+#
+# See also section LATEX_CMD_NAME for selecting the engine.
 # The default value is: YES.
 # This tag requires that the tag GENERATE_LATEX is set to YES.
 
 USE_PDFLATEX           = YES
 
-# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \batchmode
-# command to the generated LaTeX files. This will instruct LaTeX to keep running
-# if errors occur, instead of asking the user for help. This option is also used
-# when generating formulas in HTML.
+# The LATEX_BATCHMODE tag ignals the behavior of LaTeX in case of an error.
+# Possible values are: NO same as ERROR_STOP, YES same as BATCH, BATCH In batch
+# mode nothing is printed on the terminal, errors are scrolled as if <return> is
+# hit at every error; missing files that TeX tries to input or request from
+# keyboard input (\read on a not open input stream) cause the job to abort,
+# NON_STOP In nonstop mode the diagnostic message will appear on the terminal,
+# but there is no possibility of user interaction just like in batch mode,
+# SCROLL In scroll mode, TeX will stop only for missing files to input or if
+# keyboard input is necessary and ERROR_STOP In errorstop mode, TeX will stop at
+# each error, asking for user intervention.
 # The default value is: NO.
 # This tag requires that the tag GENERATE_LATEX is set to YES.
 
@@ -1684,19 +2065,19 @@ LATEX_HIDE_INDICES     = NO
 
 # The LATEX_BIB_STYLE tag can be used to specify the style to use for the
 # bibliography, e.g. plainnat, or ieeetr. See
-# http://en.wikipedia.org/wiki/BibTeX and \cite for more info.
+# https://en.wikipedia.org/wiki/BibTeX and \cite for more info.
 # The default value is: plain.
 # This tag requires that the tag GENERATE_LATEX is set to YES.
 
 LATEX_BIB_STYLE        = plain
 
-# If the LATEX_TIMESTAMP tag is set to YES then the footer of each generated
-# page will contain the date and time when the page was generated. Setting this
-# to NO can help when comparing the output of multiple runs.
-# The default value is: NO.
+# The LATEX_EMOJI_DIRECTORY tag is used to specify the (relative or absolute)
+# path from which the emoji images will be read. If a relative path is entered,
+# it will be relative to the LATEX_OUTPUT directory. If left blank the
+# LATEX_OUTPUT directory will be used.
 # This tag requires that the tag GENERATE_LATEX is set to YES.
 
-LATEX_TIMESTAMP        = NO
+LATEX_EMOJI_DIRECTORY  =
 
 #---------------------------------------------------------------------------
 # Configuration options related to the RTF output
@@ -1737,9 +2118,9 @@ COMPACT_RTF            = NO
 
 RTF_HYPERLINKS         = NO
 
-# Load stylesheet definitions from file. Syntax is similar to doxygen's config
-# file, i.e. a series of assignments. You only have to provide replacements,
-# missing definitions are set to their default value.
+# Load stylesheet definitions from file. Syntax is similar to doxygen's
+# configuration file, i.e. a series of assignments. You only have to provide
+# replacements, missing definitions are set to their default value.
 #
 # See also section "Doxygen usage" for information on how to generate the
 # default style sheet that doxygen normally uses.
@@ -1748,8 +2129,8 @@ RTF_HYPERLINKS         = NO
 RTF_STYLESHEET_FILE    =
 
 # Set optional variables used in the generation of an RTF document. Syntax is
-# similar to doxygen's config file. A template extensions file can be generated
-# using doxygen -e rtf extensionFile.
+# similar to doxygen's configuration file. A template extensions file can be
+# generated using doxygen -e rtf extensionFile.
 # This tag requires that the tag GENERATE_RTF is set to YES.
 
 RTF_EXTENSIONS_FILE    =
@@ -1825,6 +2206,13 @@ XML_OUTPUT             = xml
 
 XML_PROGRAMLISTING     = YES
 
+# If the XML_NS_MEMB_FILE_SCOPE tag is set to YES, doxygen will include
+# namespace members in file scope as well, matching the HTML output.
+# The default value is: NO.
+# This tag requires that the tag GENERATE_XML is set to YES.
+
+XML_NS_MEMB_FILE_SCOPE = NO
+
 #---------------------------------------------------------------------------
 # Configuration options related to the DOCBOOK output
 #---------------------------------------------------------------------------
@@ -1848,9 +2236,9 @@ DOCBOOK_OUTPUT         = docbook
 #---------------------------------------------------------------------------
 
 # If the GENERATE_AUTOGEN_DEF tag is set to YES, doxygen will generate an
-# AutoGen Definitions (see http://autogen.sf.net) file that captures the
-# structure of the code including all documentation. Note that this feature is
-# still experimental and incomplete at the moment.
+# AutoGen Definitions (see https://autogen.sourceforge.net/) file that captures
+# the structure of the code including all documentation. Note that this feature
+# is still experimental and incomplete at the moment.
 # The default value is: NO.
 
 GENERATE_AUTOGEN_DEF   = NO
@@ -1929,7 +2317,8 @@ SEARCH_INCLUDES        = YES
 
 # The INCLUDE_PATH tag can be used to specify one or more directories that
 # contain include files that are not input files but should be processed by the
-# preprocessor.
+# preprocessor. Note that the INCLUDE_PATH is not recursive, so the setting of
+# RECURSIVE has no effect here.
 # This tag requires that the tag SEARCH_INCLUDES is set to YES.
 
 INCLUDE_PATH           =
@@ -1950,7 +2339,7 @@ INCLUDE_FILE_PATTERNS  =
 # recursively expanded use the := operator instead of the = operator.
 # This tag requires that the tag ENABLE_PREPROCESSING is set to YES.
 
-PREDEFINED             = 
+PREDEFINED             =
 
 # If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then this
 # tag can be used to specify a list of macro names that should be expanded. The
@@ -2018,16 +2407,9 @@ EXTERNAL_GROUPS        = YES
 EXTERNAL_PAGES         = YES
 
 #---------------------------------------------------------------------------
-# Configuration options related to the dot tool
+# Configuration options related to diagram generator tools
 #---------------------------------------------------------------------------
 
-# You can include diagrams made with dia in doxygen documentation. Doxygen will
-# then run dia to produce the diagram and insert it in the documentation. The
-# DIA_PATH tag allows you to specify the directory where the dia binary resides.
-# If left empty dia is assumed to be found in the default search path.
-
-DIA_PATH               =
-
 # If set to YES the inheritance and collaboration graphs will hide inheritance
 # and usage relations if the target is undocumented or is not a class.
 # The default value is: YES.
@@ -2036,10 +2418,10 @@ HIDE_UNDOC_RELATIONS   = YES
 
 # If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is
 # available from the path. This tool is part of Graphviz (see:
-# http://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent
+# https://www.graphviz.org/), a graph visualization toolkit from AT&T and Lucent
 # Bell Labs. The other options in this section have no effect if this option is
 # set to NO
-# The default value is: YES.
+# The default value is: NO.
 
 HAVE_DOT               = NO
 
@@ -2053,35 +2435,52 @@ HAVE_DOT               = NO
 
 DOT_NUM_THREADS        = 0
 
-# When you want a differently looking font in the dot files that doxygen
-# generates you can specify the font name using DOT_FONTNAME. You need to make
-# sure dot is able to find the font, which can be done by putting it in a
-# standard location or by setting the DOTFONTPATH environment variable or by
-# setting DOT_FONTPATH to the directory containing the font.
-# The default value is: Helvetica.
+# DOT_COMMON_ATTR is common attributes for nodes, edges and labels of
+# subgraphs. When you want a differently looking font in the dot files that
+# doxygen generates you can specify fontname, fontcolor and fontsize attributes.
+# For details please see <a href=https://graphviz.org/doc/info/attrs.html>Node,
+# Edge and Graph Attributes specification</a> You need to make sure dot is able
+# to find the font, which can be done by putting it in a standard location or by
+# setting the DOTFONTPATH environment variable or by setting DOT_FONTPATH to the
+# directory containing the font. Default graphviz fontsize is 14.
+# The default value is: fontname=Helvetica,fontsize=10.
 # This tag requires that the tag HAVE_DOT is set to YES.
 
-DOT_FONTNAME           = Helvetica
+DOT_COMMON_ATTR        = "fontname=Helvetica,fontsize=10"
 
-# The DOT_FONTSIZE tag can be used to set the size (in points) of the font of
-# dot graphs.
-# Minimum value: 4, maximum value: 24, default value: 10.
+# DOT_EDGE_ATTR is concatenated with DOT_COMMON_ATTR. For elegant style you can
+# add 'arrowhead=open, arrowtail=open, arrowsize=0.5'. <a
+# href=https://graphviz.org/doc/info/arrows.html>Complete documentation about
+# arrows shapes.</a>
+# The default value is: labelfontname=Helvetica,labelfontsize=10.
 # This tag requires that the tag HAVE_DOT is set to YES.
 
-DOT_FONTSIZE           = 10
+DOT_EDGE_ATTR          = "labelfontname=Helvetica,labelfontsize=10"
 
-# By default doxygen will tell dot to use the default font as specified with
-# DOT_FONTNAME. If you specify a different font using DOT_FONTNAME you can set
-# the path where dot can find it using this tag.
+# DOT_NODE_ATTR is concatenated with DOT_COMMON_ATTR. For view without boxes
+# around nodes set 'shape=plain' or 'shape=plaintext' <a
+# href=https://www.graphviz.org/doc/info/shapes.html>Shapes specification</a>
+# The default value is: shape=box,height=0.2,width=0.4.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_NODE_ATTR          = "shape=box,height=0.2,width=0.4"
+
+# You can set the path where dot can find font specified with fontname in
+# DOT_COMMON_ATTR and others dot attributes.
 # This tag requires that the tag HAVE_DOT is set to YES.
 
 DOT_FONTPATH           =
 
-# If the CLASS_GRAPH tag is set to YES then doxygen will generate a graph for
-# each documented class showing the direct and indirect inheritance relations.
-# Setting this tag to YES will force the CLASS_DIAGRAMS tag to NO.
+# If the CLASS_GRAPH tag is set to YES or GRAPH or BUILTIN then doxygen will
+# generate a graph for each documented class showing the direct and indirect
+# inheritance relations. In case the CLASS_GRAPH tag is set to YES or GRAPH and
+# HAVE_DOT is enabled as well, then dot will be used to draw the graph. In case
+# the CLASS_GRAPH tag is set to YES and HAVE_DOT is disabled or if the
+# CLASS_GRAPH tag is set to BUILTIN, then the built-in generator will be used.
+# If the CLASS_GRAPH tag is set to TEXT the direct and indirect inheritance
+# relations will be shown as texts / links.
+# Possible values are: NO, YES, TEXT, GRAPH and BUILTIN.
 # The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
 
 CLASS_GRAPH            = YES
 
@@ -2095,7 +2494,8 @@ CLASS_GRAPH            = YES
 COLLABORATION_GRAPH    = YES
 
 # If the GROUP_GRAPHS tag is set to YES then doxygen will generate a graph for
-# groups, showing the direct groups dependencies.
+# groups, showing the direct groups dependencies. See also the chapter Grouping
+# in the manual.
 # The default value is: YES.
 # This tag requires that the tag HAVE_DOT is set to YES.
 
@@ -2118,10 +2518,32 @@ UML_LOOK               = NO
 # but if the number exceeds 15, the total amount of fields shown is limited to
 # 10.
 # Minimum value: 0, maximum value: 100, default value: 10.
-# This tag requires that the tag HAVE_DOT is set to YES.
+# This tag requires that the tag UML_LOOK is set to YES.
 
 UML_LIMIT_NUM_FIELDS   = 10
 
+# If the DOT_UML_DETAILS tag is set to NO, doxygen will show attributes and
+# methods without types and arguments in the UML graphs. If the DOT_UML_DETAILS
+# tag is set to YES, doxygen will add type and arguments for attributes and
+# methods in the UML graphs. If the DOT_UML_DETAILS tag is set to NONE, doxygen
+# will not generate fields with class member information in the UML graphs. The
+# class diagrams will look similar to the default class diagrams but using UML
+# notation for the relationships.
+# Possible values are: NO, YES and NONE.
+# The default value is: NO.
+# This tag requires that the tag UML_LOOK is set to YES.
+
+DOT_UML_DETAILS        = NO
+
+# The DOT_WRAP_THRESHOLD tag can be used to set the maximum number of characters
+# to display on a single line. If the actual line length exceeds this threshold
+# significantly it will wrapped across multiple lines. Some heuristics are apply
+# to avoid ugly line breaks.
+# Minimum value: 0, maximum value: 1000, default value: 17.
+# This tag requires that the tag HAVE_DOT is set to YES.
+
+DOT_WRAP_THRESHOLD     = 17
+
 # If the TEMPLATE_RELATIONS tag is set to YES then the inheritance and
 # collaboration graphs will show the relations between templates and their
 # instances.
@@ -2188,16 +2610,21 @@ GRAPHICAL_HIERARCHY    = YES
 
 DIRECTORY_GRAPH        = YES
 
+# The DIR_GRAPH_MAX_DEPTH tag can be used to limit the maximum number of levels
+# of child directories generated in directory dependency graphs by dot.
+# Minimum value: 1, maximum value: 25, default value: 1.
+# This tag requires that the tag DIRECTORY_GRAPH is set to YES.
+
+DIR_GRAPH_MAX_DEPTH    = 1
+
 # The DOT_IMAGE_FORMAT tag can be used to set the image format of the images
 # generated by dot. For an explanation of the image formats see the section
 # output formats in the documentation of the dot tool (Graphviz (see:
-# http://www.graphviz.org/)).
+# https://www.graphviz.org/)).
 # Note: If you choose svg you need to set HTML_FILE_EXTENSION to xhtml in order
 # to make the SVG files visible in IE 9+ (other browsers do not have this
 # requirement).
-# Possible values are: png, png:cairo, png:cairo:cairo, png:cairo:gd, png:gd,
-# png:gd:gd, jpg, jpg:cairo, jpg:cairo:gd, jpg:gd, jpg:gd:gd, gif, gif:cairo,
-# gif:cairo:gd, gif:gd, gif:gd:gd, svg, png:gd, png:gd:gd, png:cairo,
+# Possible values are: png, jpg, gif, svg, png:gd, png:gd:gd, png:cairo,
 # png:cairo:gd, png:cairo:cairo, png:cairo:gdiplus, png:gdiplus and
 # png:gdiplus:gdiplus.
 # The default value is: png.
@@ -2230,11 +2657,12 @@ DOT_PATH               =
 
 DOTFILE_DIRS           =
 
-# The MSCFILE_DIRS tag can be used to specify one or more directories that
-# contain msc files that are included in the documentation (see the \mscfile
-# command).
+# You can include diagrams made with dia in doxygen documentation. Doxygen will
+# then run dia to produce the diagram and insert it in the documentation. The
+# DIA_PATH tag allows you to specify the directory where the dia binary resides.
+# If left empty dia is assumed to be found in the default search path.
 
-MSCFILE_DIRS           =
+DIA_PATH               =
 
 # The DIAFILE_DIRS tag can be used to specify one or more directories that
 # contain dia files that are included in the documentation (see the \diafile
@@ -2243,13 +2671,18 @@ MSCFILE_DIRS           =
 DIAFILE_DIRS           =
 
 # When using plantuml, the PLANTUML_JAR_PATH tag should be used to specify the
-# path where java can find the plantuml.jar file. If left blank, it is assumed
-# PlantUML is not used or called during a preprocessing step. Doxygen will
-# generate a warning when it encounters a \startuml command in this case and
-# will not generate output for the diagram.
+# path where java can find the plantuml.jar file or to the filename of jar file
+# to be used. If left blank, it is assumed PlantUML is not used or called during
+# a preprocessing step. Doxygen will generate a warning when it encounters a
+# \startuml command in this case and will not generate output for the diagram.
 
 PLANTUML_JAR_PATH      =
 
+# When using plantuml, the PLANTUML_CFG_FILE tag can be used to specify a
+# configuration file for plantuml.
+
+PLANTUML_CFG_FILE      =
+
 # When using plantuml, the specified paths are searched for files specified by
 # the !include statement in a plantuml block.
 
@@ -2279,18 +2712,6 @@ DOT_GRAPH_MAX_NODES    = 50
 
 MAX_DOT_GRAPH_DEPTH    = 0
 
-# Set the DOT_TRANSPARENT tag to YES to generate images with a transparent
-# background. This is disabled by default, because dot on Windows does not seem
-# to support this out of the box.
-#
-# Warning: Depending on the platform used, enabling this option may lead to
-# badly anti-aliased labels on the edges of a graph (i.e. they become hard to
-# read).
-# The default value is: NO.
-# This tag requires that the tag HAVE_DOT is set to YES.
-
-DOT_TRANSPARENT        = NO
-
 # Set the DOT_MULTI_TARGETS tag to YES to allow dot to generate multiple output
 # files in one run (i.e. multiple -o and -T options on the command line). This
 # makes dot run faster, but since only newer versions of dot (>1.8.10) support
@@ -2303,14 +2724,34 @@ DOT_MULTI_TARGETS      = NO
 # If the GENERATE_LEGEND tag is set to YES doxygen will generate a legend page
 # explaining the meaning of the various boxes and arrows in the dot generated
 # graphs.
+# Note: This tag requires that UML_LOOK isn't set, i.e. the doxygen internal
+# graphical representation for inheritance and collaboration diagrams is used.
 # The default value is: YES.
 # This tag requires that the tag HAVE_DOT is set to YES.
 
 GENERATE_LEGEND        = YES
 
-# If the DOT_CLEANUP tag is set to YES, doxygen will remove the intermediate dot
+# If the DOT_CLEANUP tag is set to YES, doxygen will remove the intermediate
 # files that are used to generate the various graphs.
+#
+# Note: This setting is not only used for dot files but also for msc temporary
+# files.
 # The default value is: YES.
-# This tag requires that the tag HAVE_DOT is set to YES.
 
 DOT_CLEANUP            = YES
+
+# You can define message sequence charts within doxygen comments using the \msc
+# command. If the MSCGEN_TOOL tag is left empty (the default), then doxygen will
+# use a built-in version of mscgen tool to produce the charts. Alternatively,
+# the MSCGEN_TOOL tag can also specify the name an external tool. For instance,
+# specifying prog as the value, doxygen will call the tool as prog -T
+# <outfile_format> -o <outputfile> <inputfile>. The external tool should support
+# output file formats "png", "eps", "svg", and "ismap".
+
+MSCGEN_TOOL            =
+
+# The MSCFILE_DIRS tag can be used to specify one or more directories that
+# contain msc files that are included in the documentation (see the \mscfile
+# command).
+
+MSCFILE_DIRS           =
-- 
GitLab


From 9d434fb466340c2d44f2fea07bc28296cc2cea9f Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 2 Jun 2023 16:04:42 +0100
Subject: [PATCH 326/332] lib: update QUIC API documentation

---
 lib/intel-ipsec-mb.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 7f108c93..9c943d19 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -3804,6 +3804,7 @@ IMB_DLL_EXPORT void imb_clear_mem(void *mem, const size_t size);
  *
  * @note IV length of 12 bytes is assumed.
  * @note If used out of place then AAD needs to be copied by the caller.
+ * @note For more info on key_data refer to IMB_AES128/192/256_GCM_PRE() API’s
  *
  * @param [in]  state         pointer to IMB_MGR
  * @param [in]  key_data      initialized key data (AES keys and hash keys)
@@ -3890,7 +3891,7 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
  * @see IMB_SUBMIT_JOB_NOCHECK()
  *
  * @param [in]     state   pointer to IMB_MGR
- * @param [in/out] job     pointer to prepared JOB structure
+ * @param [in,out] job     pointer to prepared JOB structure
  *
  * @return Session ID value
  * @retval 0 on error
-- 
GitLab


From f0c8be86313f3d4f399d7bc8107c8a3c640a2a91 Mon Sep 17 00:00:00 2001
From: Marcel Cornu <marcel.d.cornu@intel.com>
Date: Fri, 2 Jun 2023 16:30:25 +0100
Subject: [PATCH 327/332] fix README section format

---
 README.md | 96 ++++++++++++++++++++++---------------------------------
 1 file changed, 39 insertions(+), 57 deletions(-)

diff --git a/README.md b/README.md
index 63026fc2..50d1f928 100644
--- a/README.md
+++ b/README.md
@@ -29,8 +29,8 @@ Key differentiating features:
 - multi-buffer and function stitching innovations
 - low level implementations using latest instruction extensions
 
-Contents
-========
+## Contents
+
 1. Overview
 2. Processor Extensions
 3. Recommendations
@@ -45,8 +45,8 @@ Contents
 12. FIPS Compliance
 13. DLL Injection
 
-1\. Overview
-============
+## 1. Overview
+
 Intel Multi-Buffer Crypto for IPsec Library is highly-optimized software
 implementations of the core cryptographic processing for IPsec,
 which provides industry-leading performance on a range of Intel(R) Processors.
@@ -231,8 +231,7 @@ Table 3. Encryption and integrity algorithm combinations
 +---------------+-----------------------------------------------------+
 ```
 
-2\. Processor Extensions
-========================
+## 2. Processor Extensions
 
 Table 4. Processor extensions used in the library
 ```
@@ -256,8 +255,7 @@ Table 4. Processor extensions used in the library
 +-------------------+-----------+-----------------------------------------+
 ```
 
-3\. Recommendations
-===================
+## 3. Recommendations
 
 Legacy or to be avoided algorithms listed in the table below are implemented
 in the library in order to support legacy applications. Please use corresponding
@@ -285,8 +283,7 @@ Operating System to provide process isolation.
 As the result, it is recommended to use latest Operating System patches and
 security updates.
 
-4\. Package Content
-===================
+## 4. Package Content
 
 - test - Library test applications
 - perf - Library performance application
@@ -304,19 +301,16 @@ Code taken from the tip of the master branch should not be considered fit for pr
 Refer to the releases tab for stable code versions:  
 https://github.com/intel/intel-ipsec-mb/releases
 
-5\. Documentation
-===============
+## 5. Documentation
 
 Full documentation can be found at: https://intel.github.io/intel-ipsec-mb
 
 To generate documentation locally, run:  
 `> make doxy`
 
-6\. Compilation
-===============
+## 6. Compilation
 
-Linux (64-bit only)
--------------------
+### Linux (64-bit only)
 
 Required tools:  
 - GNU make  
@@ -345,8 +339,7 @@ Build with AESNI emulation support (disabled by default):
 For more build options and their explanation run:   
 `> make help`
 
-Windows MSVS (x64 only)
-------------------
+### Windows MSVS (x64 only)
 
 Required tools:  
 - Microsoft (R) Visual Studio 2019:  
@@ -389,8 +382,7 @@ Build with AESNI emulation support (disabled by default):
 For more build options and their explanation run:   
 `> nmake /f win_x64.mak help`
 
-Windows Mingw-w64 (64-bit only)
--------------------
+### Windows Mingw-w64 (64-bit only)
 
 Required tools:  
 - GNU mingw32-make.exe  
@@ -416,8 +408,7 @@ Build with debugging information:
 For more build options and their explanation run:   
 `> mingw32-make.exe help`
 
-FreeBSD (64-bit only)
----------------------
+### FreeBSD (64-bit only)
 
 Required tools:  
 - GNU make  
@@ -443,11 +434,9 @@ Build with debugging information:
 For more build options and their explanation run:   
 `> gmake help`
 
-Building with CMake (experimental)
--------------------
+### Building with CMake (experimental)
 
-Minimum CMake version:
-- 3.16
+Minimum CMake version: 3.16
 
 Create build directory:
 ```
@@ -455,7 +444,7 @@ mkdir build
 cd build
 ```
 
-### Unix Makefiles (Linux and FreeBSD)
+#### Unix Makefiles (Linux and FreeBSD)
 
 Shared library (default):
 ```
@@ -476,11 +465,9 @@ cmake --build . --parallel
 ```
 
 For more build options and their explanation run:
-```
-cmake --build . --target print_help
-```
+`cmake --build . --target print_help`
 
-### Windows MSVS (x64 only)
+#### Windows MSVS (x64 only)
 
 Shared library with debugging information (default for MSVS)
 ```
@@ -501,11 +488,9 @@ cmake --build . --config Release
 ```
 
 For more build options and their explanation run:
-```
-cmake --build . --target print_help
-```
+`cmake --build . --target print_help`
 
-###  Ninja (Linux, FreeBSD and Windows):
+####  Ninja (Linux, FreeBSD and Windows):
 ```
 cmake -G Ninja ..
 cmake --build .
@@ -523,8 +508,7 @@ build/test
 build/perf
 ```
 
-7\. Security Considerations & Options for Increased Security
-============================================================
+## 7. Security Considerations & Options for Increased Security
 
 ### Security Considerations
 The security of a system that uses cryptography depends on the strength of
@@ -560,6 +544,7 @@ options are listed below as the "Options for Increased Security" and are
 enabled through various build flags.
 
 ### Options for Increased Security
+
 There are three build options that are used to increase safety in
 the code and help protect external functions from incorrect input data.
 The SAFE_DATA, SAFE_PARAM and SAFE_LOOKUP options are enabled by default.
@@ -571,14 +556,17 @@ tests have been performed to help protect against or check for side-channel
 attacks.
 
 ### SAFE_DATA
+
 Stack and registers containing sensitive information, such as keys or IVs, are
 cleared upon completion of a function call.
 
 ### SAFE_PARAM
+
 Input parameters are checked, looking generally for NULL pointers or an 
 incorrect input length.
 
 ### SAFE_LOOKUP
+
 Lookups which depend on sensitive information are implemented with constant
 time functions.
 
@@ -593,12 +581,14 @@ algorithms listed above may be susceptible to timing attacks which could expose
 the cryptographic key.
 
 ### SAFE_OPTIONS
+
 SAFE_OPTIONS is a parameter that can be used to disable/enable
 all supported safe options (i.e. SAFE_DATA, SAFE_PARAM, SAFE_LOOKUP).
 It is set to `y` by default and all safe options are enabled.
 `SAFE_OPTIONS=n` disables all safe options.
 
 ### Security API
+
 **Force clearing/zeroing of memory**
 ```c
 IMB_DLL_EXPORT void imb_clear_mem(void *mem, const size_t size);
@@ -609,15 +599,14 @@ of memory pointed to by _'mem'_ followed by the _sfence_ instruction to
 ensure memory is cleared before the function returns.
 
 ### Galois Counter Mode (GCM) TAG Size
+
 The library GCM and GMAC implementation provides flexibility as to tag size selection.
 As explained in [NIST Special Publication 800-38D](https://csrc.nist.gov/publications/detail/sp/800-38d/final) section 5.2.1.2 and Appendix C, using tag sizes shorter than 96 bits can be insecure.
 Please refer to the aforementioned sections to understand the details, trade offs and mitigations of using shorter tag sizes.
 
-8\. Installation
-================
+## 8. Installation
 
-Linux (64-bit only)
--------------------
+### Linux (64-bit only)
 
 First compile the library and then install:   
 `> make`  
@@ -635,8 +624,7 @@ If there is no need to run ldconfig at install stage please use NOLDCONFIG=y opt
 If library was compiled as an archive (not a default option) then install it using SHARED=n option:   
 `> sudo make install SHARED=n`
 
-Windows (x64 only)
-------------------
+### Windows (x64 only)
 
 First compile the library and then install from a command prompt in administrator mode:   
 `> nmake /f win_x64.mak`  
@@ -651,8 +639,7 @@ If you want to change install location then define PREFIX (default C:\Program Fi
 If library was compiled as a static library (not a default option) then install it using SHARED=n option:   
 `> nmake /f win_x64.mak install SHARED=n`
 
-FreeBSD (64-bit only)
--------------------
+### FreeBSD (64-bit only)
 
 First compile the library and then install:   
 `> gmake`  
@@ -670,8 +657,7 @@ If there is no need to run ldconfig at install stage please use NOLDCONFIG=y opt
 If library was compiled as an archive (not a default option) then install it using SHARED=n option:   
 `> sudo gmake install SHARED=n`
 
-Installing with CMake (experimental)
--------------------
+## Installing with CMake (experimental)
 
 ### Unix (Linux and FreeBSD)
 
@@ -701,8 +687,7 @@ To uninstall the library run:
 If you want to change install location then define PREFIX (default C:\Program Files):   
 `cmake --install . --config Release --prefix=<path>`
 
-9\. Backwards compatibility
-===========================
+## 9. Backwards compatibility
 
 In version 1.4, backward compile time symbol compatibility with
 library version 0.53 has been removed.
@@ -713,8 +698,7 @@ If required, compatibility symbol mapping can be implemented in the application.
 See compatibility symbol mapping in v1.3 header file:
 https://github.com/intel/intel-ipsec-mb/blob/v1.3/lib/intel-ipsec-mb.h#L246
 
-10\. Disclaimer (ZUC, KASUMI, SNOW3G)
-====================================
+## 10. Disclaimer (ZUC, KASUMI, SNOW3G)
 
 Please note that cryptographic material, such as ciphering algorithms, may be
 subject to national regulations. What is more, use of some algorithms in
@@ -725,8 +709,7 @@ For more details please see:
 - GSMA https://www.gsma.com/security/security-algorithms/  
 - ETSI https://www.etsi.org/security-algorithms-and-codes/cellular-algorithm-licences
 
-11\. Legal Disclaimer
-====================
+## 11. Legal Disclaimer
 
 THIS SOFTWARE IS PROVIDED BY INTEL"AS IS". NO LICENSE, EXPRESS OR   
 IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS   
@@ -737,12 +720,12 @@ USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO
 FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT   
 OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.  
 
-12\. FIPS Compliance
-===================
+## 12. FIPS Compliance
 
 The library does not fulfill technical requirements to achieve Cryptographic Module (CMVP) certification as a standalone component. It is fit for Cryptographic Algorithm validation and certification (CAVP) and it can be part of CMVP as one of the components.
 
 ### CAVP
+
 ACVP test application located in `test` directory is to support CAVP process. It implements validation of the following algorithms:  
 - AES-GCM  
 - AES-GMAC  
@@ -887,8 +870,7 @@ if (imb_get_errno(p_mgr) == IMB_ERR_SELFTEST) {
 }
 ```
 
-13\.DLL Injection Attack
-=======================
+## 13.DLL Injection Attack
 
 ### Problem
 
-- 
GitLab


From d44ef023cc8e13de46eaf37bd8f50afc3536d41b Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 6 Jun 2023 09:25:01 +0100
Subject: [PATCH 328/332] Release notes updated for v1.4

---
 ReleaseNotes.txt | 21 ++++++++++++++++++++-
 1 file changed, 20 insertions(+), 1 deletion(-)

diff --git a/ReleaseNotes.txt b/ReleaseNotes.txt
index d6fe961e..7350d2a2 100644
--- a/ReleaseNotes.txt
+++ b/ReleaseNotes.txt
@@ -2,7 +2,7 @@
 Release Notes for Intel(R) Multi-Buffer Crypto for IPsec Library
 
 v1.4 June 2023
-==============
+========================================================================
 
 General
 - Experimental CMake support for Linux, FreeBSD and Windows added
@@ -15,8 +15,27 @@ Library
 - QUIC header protection API added.
 - QUIC AES-GCM-128/256 AEAD API added.
 - Removed v0.53 (and older) compatibility symbol mapping (NO_COMPAT_IMB_API_053 not defined).
+- ZUC AVX2-GFNI implementation added.
+- SHA-NI instructions enabled to use in SHA1/224/256 direct API
+- New API (imb_set_session) added to be used with burst API, helping speeding up the crypto scheduling.
+- New API added to calculate IPAD/OPAD for SHAx-HMAC.
+- New direct API added to calculate DES-CFB and AES-CFB-256 on a single block.
 
 Test Applications
+- ACVP test application extended to support: AES-ECB and 3DES-CBC.
+- Added sample applications showcasing how to use the new burst API.
+- CMake support added, including ability to run tests with it.
+- Extended fuzzing app to cover remaining direct APIs.
+- Test vector standardized for various algorithms (SHA/XCBC/POLY1305/CMAC/GMAC/GHASH/HMAC-SHAx/MD5).
+- Changed `test` directory structure and test application names. Each test application has its own subdirectory.
+
+Performance Application
+- New parameter added to benchmark crypto on unaligned buffers
+- Renamed performance application to `imb-perf`
+
+Fixes
+- Fixed MB_MGR initialization corruption (issue #115)
+- Fixed performance scaling issue resulting from the misuse of global `errno` variable (issue #112)
 
 v1.3 September 2022
 ========================================================================
-- 
GitLab


From db253f9eea3d7632ceb272ef11334aae924f431a Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Wed, 24 May 2023 16:36:44 +0100
Subject: [PATCH 329/332] avx: [aes-cbc] unify aes-cbc encrypt, aes-cmac and
 aes-xcbc implementations

- add new include file for aes-cbc encrypt based algorithms
- use macro from the new include file for aes-cbc encrypt, aes-cmac and aes-xcbc
---
 lib/avx_t1/aes128_cbc_enc_x8_avx.asm      | 495 +-------------------
 lib/avx_t1/aes128_cbc_mac_x8_avx.asm      |  19 +-
 lib/avx_t1/aes128_cbcs_1_9_enc_x8_avx.asm |  31 +-
 lib/avx_t1/aes128_xcbc_mac_x8_avx.asm     |  19 +-
 lib/avx_t1/aes192_cbc_enc_x8_avx.asm      | 468 +------------------
 lib/avx_t1/aes256_cbc_enc_x8_avx.asm      | 535 +---------------------
 lib/avx_t1/aes256_cbc_mac_x8_avx.asm      |  15 +-
 lib/include/aes_cbc_enc_x8_avx.inc        | 525 +++++++++++++++++++++
 8 files changed, 588 insertions(+), 1519 deletions(-)
 create mode 100644 lib/include/aes_cbc_enc_x8_avx.inc

diff --git a/lib/avx_t1/aes128_cbc_enc_x8_avx.asm b/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
index 16e3b5cf..516eb0de 100644
--- a/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes128_cbc_enc_x8_avx.asm
@@ -25,499 +25,16 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-;;; routine to do a 128 bit CBC AES encrypt and CBC MAC
+;; AES-CBC-128
 
-;; clobbers all registers except for ARG1 and rbp
-
-%include "include/os.inc"
-%include "include/mb_mgr_datastruct.inc"
-%include "include/clear_regs.inc"
-
-%define	VMOVDQ vmovdqu ;; assume buffers not aligned
-
-%macro VPXOR2 2
-	vpxor	%1, %1, %2
-%endm
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;; struct AES_ARGS {
-;;     void*    in[8];
-;;     void*    out[8];
-;;     UINT128* keys[8];
-;;     UINT128  IV[8];
-;; }
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;; void aes_cbc_enc_128_x8(AES_ARGS *args, UINT64 len);
-;; arg 1: ARG : addr of AES_ARGS structure
-;; arg 2: LEN : len (in units of bytes)
-
-struc STACK
-_gpr_save:	resq	8
-_len:		resq	1
-endstruc
-
-%define GPR_SAVE_AREA	rsp + _gpr_save
-%define LEN_AREA	rsp + _len
-
-%ifdef LINUX
-%define arg1	rdi
-%define arg2	rsi
-%define arg3	rcx
-%define arg4	rdx
-%else
-%define arg1	rcx
-%define arg2	rdx
-%define arg3	rdi
-%define arg4	rsi
-%endif
-
-%define ARG     arg1
-%define LEN     arg2
-
-%define IDX	rax
-%define TMP	rbx
-
-%define KEYS0	arg3
-%define KEYS1	arg4
-%define KEYS2	rbp
-%define KEYS3	r8
-%define KEYS4	r9
-%define KEYS5	r10
-%define KEYS6	r11
-%define KEYS7	r12
-
-%define IN0	r13
-%define IN2	r14
-%define IN4	r15
-%define IN6	LEN
-
-%define XDATA0		xmm0
-%define XDATA1		xmm1
-%define XDATA2		xmm2
-%define XDATA3		xmm3
-%define XDATA4		xmm4
-%define XDATA5		xmm5
-%define XDATA6		xmm6
-%define XDATA7		xmm7
-
-%define XKEY0_3		xmm8
-%define XKEY1_4		xmm9
-%define XKEY2_5		xmm10
-%define XKEY3_6		xmm11
-%define XKEY4_7		xmm12
-%define XKEY5_8		xmm13
-%define XKEY6_9		xmm14
-%define XTMP		xmm15
+%include "include/aes_cbc_enc_x8_avx.inc"
 
 mksection .text
 
-%macro AES_CBC_X8 5-6
-%define %%MODE          %1
-%define %%OFFSET        %2
-%define %%ARG_IV        %3
-%define %%ARG_KEYS      %4
-%define %%ARG_IN        %5
-%define %%ARG_OUT       %6
-
-        sub	rsp, STACK_size
-	mov	[GPR_SAVE_AREA + 8*0], rbp
-%ifidn %%MODE, CBC_XCBC_MAC
-	mov	[GPR_SAVE_AREA + 8*1], rbx
-	mov	[GPR_SAVE_AREA + 8*2], r12
-	mov	[GPR_SAVE_AREA + 8*3], r13
-	mov	[GPR_SAVE_AREA + 8*4], r14
-	mov	[GPR_SAVE_AREA + 8*5], r15
-%ifndef LINUX
-	mov	[GPR_SAVE_AREA + 8*6], rsi
-	mov	[GPR_SAVE_AREA + 8*7], rdi
-%endif
-%endif
-
-	mov	IDX, %%OFFSET
-	mov	[LEN_AREA], LEN
-
-	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-	mov	        IN0,	[ARG + %%ARG_IN + 8*0]
-	mov	        IN2,	[ARG + %%ARG_IN + 8*2]
-	mov	        IN4,	[ARG + %%ARG_IN + 8*4]
-	mov	        IN6,	[ARG + %%ARG_IN + 8*6]
-
-	mov		TMP, [ARG + %%ARG_IN + 8*1]
-	VMOVDQ		XDATA0, [IN0]		; load first block of plain text
-	VMOVDQ		XDATA1, [TMP]		; load first block of plain text
-	mov		TMP, [ARG + %%ARG_IN + 8*3]
-	VMOVDQ		XDATA2, [IN2]		; load first block of plain text
-	VMOVDQ		XDATA3, [TMP]		; load first block of plain text
-	mov		TMP, [ARG + %%ARG_IN + 8*5]
-	VMOVDQ		XDATA4, [IN4]		; load first block of plain text
-	VMOVDQ		XDATA5, [TMP]		; load first block of plain text
-	mov		TMP, [ARG + %%ARG_IN + 8*7]
-	VMOVDQ		XDATA6, [IN6]		; load first block of plain text
-	VMOVDQ		XDATA7, [TMP]		; load first block of plain text
-
-	VPXOR2		XDATA0, [ARG + %%ARG_IV + 16*0]  ; plaintext XOR IV
-	VPXOR2		XDATA1, [ARG + %%ARG_IV + 16*1]  ; plaintext XOR IV
-	VPXOR2		XDATA2, [ARG + %%ARG_IV + 16*2]  ; plaintext XOR IV
-	VPXOR2		XDATA3, [ARG + %%ARG_IV + 16*3]  ; plaintext XOR IV
-	VPXOR2		XDATA4, [ARG + %%ARG_IV + 16*4]  ; plaintext XOR IV
-	VPXOR2		XDATA5, [ARG + %%ARG_IV + 16*5]  ; plaintext XOR IV
-	VPXOR2		XDATA6, [ARG + %%ARG_IV + 16*6]  ; plaintext XOR IV
-	VPXOR2		XDATA7, [ARG + %%ARG_IV + 16*7]  ; plaintext XOR IV
-
-	mov		KEYS0,	[ARG + %%ARG_KEYS + 8*0]
-	mov		KEYS1,	[ARG + %%ARG_KEYS + 8*1]
-	mov		KEYS2,	[ARG + %%ARG_KEYS + 8*2]
-	mov		KEYS3,	[ARG + %%ARG_KEYS + 8*3]
-	mov		KEYS4,	[ARG + %%ARG_KEYS + 8*4]
-	mov		KEYS5,	[ARG + %%ARG_KEYS + 8*5]
-	mov		KEYS6,	[ARG + %%ARG_KEYS + 8*6]
-	mov		KEYS7,	[ARG + %%ARG_KEYS + 8*7]
-
-	VPXOR2		XDATA0, [KEYS0 + 16*0]		; 0. ARK
-	VPXOR2		XDATA1, [KEYS1 + 16*0]		; 0. ARK
-	VPXOR2		XDATA2, [KEYS2 + 16*0]		; 0. ARK
-	VPXOR2		XDATA3, [KEYS3 + 16*0]		; 0. ARK
-	VPXOR2		XDATA4, [KEYS4 + 16*0]		; 0. ARK
-	VPXOR2		XDATA5, [KEYS5 + 16*0]		; 0. ARK
-	VPXOR2		XDATA6, [KEYS6 + 16*0]		; 0. ARK
-	VPXOR2		XDATA7, [KEYS7 + 16*0]		; 0. ARK
-
-	vaesenc		XDATA0, [KEYS0 + 16*1]	; 1. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*1]	; 1. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*1]	; 1. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*1]	; 1. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*1]	; 1. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*1]	; 1. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*1]	; 1. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*1]	; 1. ENC
-
-	vmovdqa		XKEY0_3, [KEYS0 + 16*3]	; load round 3 key
-
-	vaesenc		XDATA0, [KEYS0 + 16*2]	; 2. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*2]	; 2. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*2]	; 2. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*2]	; 2. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*2]	; 2. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*2]	; 2. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*2]	; 2. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*2]	; 2. ENC
-
-	vmovdqa		XKEY1_4, [KEYS1 + 16*4]	; load round 4 key
-
-	vaesenc		XDATA0, XKEY0_3       	; 3. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*3]	; 3. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*3]	; 3. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*3]	; 3. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*3]	; 3. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*3]	; 3. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*3]	; 3. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*3]	; 3. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*4]	; 4. ENC
-	vmovdqa		XKEY2_5, [KEYS2 + 16*5]	; load round 5 key
-	vaesenc		XDATA1, XKEY1_4       	; 4. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*4]	; 4. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*4]	; 4. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*4]	; 4. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*4]	; 4. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*4]	; 4. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*4]	; 4. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*5]	; 5. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*5]	; 5. ENC
-	vmovdqa		XKEY3_6, [KEYS3 + 16*6]	; load round 6 key
-	vaesenc		XDATA2, XKEY2_5       	; 5. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*5]	; 5. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*5]	; 5. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*5]	; 5. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*5]	; 5. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*5]	; 5. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*6]	; 6. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*6]	; 6. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*6]	; 6. ENC
-	vmovdqa		XKEY4_7, [KEYS4 + 16*7]	; load round 7 key
-	vaesenc		XDATA3, XKEY3_6       	; 6. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*6]	; 6. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*6]	; 6. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*6]	; 6. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*6]	; 6. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*7]	; 7. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*7]	; 7. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*7]	; 7. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*7]	; 7. ENC
-	vmovdqa		XKEY5_8, [KEYS5 + 16*8]	; load round 8 key
-	vaesenc		XDATA4, XKEY4_7       	; 7. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*7]	; 7. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*7]	; 7. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*7]	; 7. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*8]	; 8. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*8]	; 8. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*8]	; 8. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*8]	; 8. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*8]	; 8. ENC
-	vmovdqa		XKEY6_9, [KEYS6 + 16*9]	; load round 9 key
-	vaesenc		XDATA5, XKEY5_8       	; 8. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*8]	; 8. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*8]	; 8. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*9]	; 9. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*9]	; 9. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*9]	; 9. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*9]	; 9. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*9]	; 9. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*9]	; 9. ENC
-%ifnidn %%MODE, CBC_XCBC_MAC
-	mov		TMP, [ARG + %%ARG_OUT + 8*0]
-%endif
-	vaesenc		XDATA6, XKEY6_9       	; 9. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*9]	; 9. ENC
-
-	vaesenclast	XDATA0, [KEYS0 + 16*10]	; 10. ENC
-	vaesenclast	XDATA1, [KEYS1 + 16*10]	; 10. ENC
-	vaesenclast	XDATA2, [KEYS2 + 16*10]	; 10. ENC
-	vaesenclast	XDATA3, [KEYS3 + 16*10]	; 10. ENC
-	vaesenclast	XDATA4, [KEYS4 + 16*10]	; 10. ENC
-	vaesenclast	XDATA5, [KEYS5 + 16*10]	; 10. ENC
-	vaesenclast	XDATA6, [KEYS6 + 16*10]	; 10. ENC
-	vaesenclast	XDATA7, [KEYS7 + 16*10]	; 10. ENC
-
-%ifnidn %%MODE, CBC_XCBC_MAC
-	VMOVDQ		[TMP], XDATA0		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*1]
-	VMOVDQ		[TMP], XDATA1		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*2]
-	VMOVDQ		[TMP], XDATA2		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*3]
-	VMOVDQ		[TMP], XDATA3		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*4]
-	VMOVDQ		[TMP], XDATA4		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*5]
-	VMOVDQ		[TMP], XDATA5		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*6]
-	VMOVDQ		[TMP], XDATA6		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*7]
-	VMOVDQ		[TMP], XDATA7		; write back ciphertext
-%endif
-	cmp		[LEN_AREA], IDX
-	jle		%%_done
-
-%%_main_loop:
-	mov		TMP, [ARG + %%ARG_IN + 8*1]
-	VPXOR2		XDATA0, [IN0 + IDX]	; load next block of plain text
-	VPXOR2		XDATA1, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [ARG + %%ARG_IN + 8*3]
-	VPXOR2		XDATA2, [IN2 + IDX]	; load next block of plain text
-	VPXOR2		XDATA3, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [ARG + %%ARG_IN + 8*5]
-	VPXOR2		XDATA4, [IN4 + IDX]	; load next block of plain text
-	VPXOR2		XDATA5, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [ARG + %%ARG_IN + 8*7]
-	VPXOR2		XDATA6, [IN6 + IDX]	; load next block of plain text
-	VPXOR2		XDATA7, [TMP + IDX]	; load next block of plain text
-
-	VPXOR2		XDATA0, [KEYS0 + 16*0]		; 0. ARK
-	VPXOR2		XDATA1, [KEYS1 + 16*0]		; 0. ARK
-	VPXOR2		XDATA2, [KEYS2 + 16*0]		; 0. ARK
-	VPXOR2		XDATA3, [KEYS3 + 16*0]		; 0. ARK
-	VPXOR2		XDATA4, [KEYS4 + 16*0]		; 0. ARK
-	VPXOR2		XDATA5, [KEYS5 + 16*0]		; 0. ARK
-	VPXOR2		XDATA6, [KEYS6 + 16*0]		; 0. ARK
-	VPXOR2		XDATA7, [KEYS7 + 16*0]		; 0. ARK
-
-	vaesenc		XDATA0, [KEYS0 + 16*1]	; 1. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*1]	; 1. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*1]	; 1. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*1]	; 1. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*1]	; 1. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*1]	; 1. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*1]	; 1. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*1]	; 1. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*2]	; 2. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*2]	; 2. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*2]	; 2. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*2]	; 2. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*2]	; 2. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*2]	; 2. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*2]	; 2. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*2]	; 2. ENC
-
-	vaesenc		XDATA0, XKEY0_3       	; 3. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*3]	; 3. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*3]	; 3. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*3]	; 3. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*3]	; 3. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*3]	; 3. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*3]	; 3. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*3]	; 3. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*4]	; 4. ENC
-	vaesenc		XDATA1, XKEY1_4       	; 4. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*4]	; 4. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*4]	; 4. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*4]	; 4. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*4]	; 4. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*4]	; 4. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*4]	; 4. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*5]	; 5. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*5]	; 5. ENC
-	vaesenc		XDATA2, XKEY2_5       	; 5. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*5]	; 5. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*5]	; 5. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*5]	; 5. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*5]	; 5. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*5]	; 5. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*6]	; 6. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*6]	; 6. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*6]	; 6. ENC
-	vaesenc		XDATA3, XKEY3_6       	; 6. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*6]	; 6. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*6]	; 6. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*6]	; 6. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*6]	; 6. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*7]	; 7. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*7]	; 7. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*7]	; 7. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*7]	; 7. ENC
-	vaesenc		XDATA4, XKEY4_7       	; 7. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*7]	; 7. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*7]	; 7. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*7]	; 7. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*8]	; 8. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*8]	; 8. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*8]	; 8. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*8]	; 8. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*8]	; 8. ENC
-	vaesenc		XDATA5, XKEY5_8       	; 8. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*8]	; 8. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*8]	; 8. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*9]	; 9. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*9]	; 9. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*9]	; 9. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*9]	; 9. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*9]	; 9. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*9]	; 9. ENC
-%ifnidn %%MODE, CBC_XCBC_MAC
-	mov		TMP, [ARG + %%ARG_OUT + 8*0]
-%endif
-	vaesenc		XDATA6, XKEY6_9       	; 9. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*9]	; 9. ENC
-
-	vaesenclast	XDATA0, [KEYS0 + 16*10]	; 10. ENC
-	vaesenclast	XDATA1, [KEYS1 + 16*10]	; 10. ENC
-	vaesenclast	XDATA2, [KEYS2 + 16*10]	; 10. ENC
-	vaesenclast	XDATA3, [KEYS3 + 16*10]	; 10. ENC
-	vaesenclast	XDATA4, [KEYS4 + 16*10]	; 10. ENC
-	vaesenclast	XDATA5, [KEYS5 + 16*10]	; 10. ENC
-	vaesenclast	XDATA6, [KEYS6 + 16*10]	; 10. ENC
-	vaesenclast	XDATA7, [KEYS7 + 16*10]	; 10. ENC
-
-%ifnidn %%MODE, CBC_XCBC_MAC
-        ;; no ciphertext write back for CBC-MAC
-	VMOVDQ		[TMP + IDX], XDATA0		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*1]
-	VMOVDQ		[TMP + IDX], XDATA1		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*2]
-	VMOVDQ		[TMP + IDX], XDATA2		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*3]
-	VMOVDQ		[TMP + IDX], XDATA3		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*4]
-	VMOVDQ		[TMP + IDX], XDATA4		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*5]
-	VMOVDQ		[TMP + IDX], XDATA5		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*6]
-	VMOVDQ		[TMP + IDX], XDATA6		; write back ciphertext
-	mov		TMP, [ARG + %%ARG_OUT + 8*7]
-	VMOVDQ		[TMP + IDX], XDATA7		; write back ciphertext
-%endif
-	add	IDX, %%OFFSET
-	cmp	[LEN_AREA], IDX
-	ja	%%_main_loop
-
-%%_done:
-	;; update IV for AES128-CBC / store digest for CBC-MAC
-	vmovdqa	[ARG + %%ARG_IV + 16*0], XDATA0
-	vmovdqa	[ARG + %%ARG_IV + 16*1], XDATA1
-	vmovdqa	[ARG + %%ARG_IV + 16*2], XDATA2
-	vmovdqa	[ARG + %%ARG_IV + 16*3], XDATA3
-	vmovdqa	[ARG + %%ARG_IV + 16*4], XDATA4
-	vmovdqa	[ARG + %%ARG_IV + 16*5], XDATA5
-	vmovdqa	[ARG + %%ARG_IV + 16*6], XDATA6
-	vmovdqa	[ARG + %%ARG_IV + 16*7], XDATA7
-
-	;; update IN and OUT
-	vmovd	xmm0, [LEN_AREA]
-	vpshufd	xmm0, xmm0, 0x44
-	vpaddq	xmm1, xmm0, [ARG + %%ARG_IN + 16*0]
-	vpaddq	xmm2, xmm0, [ARG + %%ARG_IN + 16*1]
-	vpaddq	xmm3, xmm0, [ARG + %%ARG_IN + 16*2]
-	vpaddq	xmm4, xmm0, [ARG + %%ARG_IN + 16*3]
-	vmovdqa	[ARG + %%ARG_IN + 16*0], xmm1
-	vmovdqa	[ARG + %%ARG_IN + 16*1], xmm2
-	vmovdqa	[ARG + %%ARG_IN + 16*2], xmm3
-	vmovdqa	[ARG + %%ARG_IN + 16*3], xmm4
-%ifnidn %%MODE, CBC_XCBC_MAC
-	vpaddq	xmm5, xmm0, [ARG + %%ARG_OUT + 16*0]
-	vpaddq	xmm6, xmm0, [ARG + %%ARG_OUT + 16*1]
-	vpaddq	xmm7, xmm0, [ARG + %%ARG_OUT + 16*2]
-	vpaddq	xmm8, xmm0, [ARG + %%ARG_OUT + 16*3]
-	vmovdqa	[ARG + %%ARG_OUT + 16*0], xmm5
-	vmovdqa	[ARG + %%ARG_OUT + 16*1], xmm6
-	vmovdqa	[ARG + %%ARG_OUT + 16*2], xmm7
-	vmovdqa	[ARG + %%ARG_OUT + 16*3], xmm8
-%endif
-
-        ;; XMMs are saved at a higher level
-	mov	rbp, [GPR_SAVE_AREA + 8*0]
-%ifidn %%MODE, CBC_XCBC_MAC
-	mov	rbx, [GPR_SAVE_AREA + 8*1]
-	mov	r12, [GPR_SAVE_AREA + 8*2]
-	mov	r13, [GPR_SAVE_AREA + 8*3]
-	mov	r14, [GPR_SAVE_AREA + 8*4]
-	mov	r15, [GPR_SAVE_AREA + 8*5]
-%ifndef LINUX
-	mov	rsi, [GPR_SAVE_AREA + 8*6]
-	mov	rdi, [GPR_SAVE_AREA + 8*7]
-%endif
-%endif
-
-	add	rsp, STACK_size
-
-%ifdef SAFE_DATA
-	clear_all_xmms_avx_asm
-%endif ;; SAFE_DATA
-
-%endmacro
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; AES-CBC 128 encrypt macro defines
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-%ifndef FUNC
-%define FUNC     aes_cbc_enc_128_x8
-%define MODE     CBC
-%define OFFSET   16
-%define ARG_IN   _aesarg_in
-%define ARG_OUT  _aesarg_out
-%define ARG_KEYS _aesarg_keys
-%define ARG_IV   _aesarg_IV
-%endif ;; FUNC
-
-MKGLOBAL(FUNC,function,internal)
-FUNC:
-%ifdef ARG_OUT
-        AES_CBC_X8 MODE, OFFSET, ARG_IV, ARG_KEYS, ARG_IN, ARG_OUT
-%else
-        AES_CBC_X8 MODE, OFFSET, ARG_IV, ARG_KEYS, ARG_IN
-%endif
+align 64
+MKGLOBAL(aes_cbc_enc_128_x8,function,internal)
+aes_cbc_enc_128_x8:
+        AES_CBC_X8 CBC, 9, 16, {arg1 + _aesarg_IV}, {arg1 + _aesarg_keys}, {arg1 + _aesarg_in}, {arg1 + _aesarg_out}
         ret
 
 mksection stack-noexec
diff --git a/lib/avx_t1/aes128_cbc_mac_x8_avx.asm b/lib/avx_t1/aes128_cbc_mac_x8_avx.asm
index b54e904d..622ad021 100644
--- a/lib/avx_t1/aes128_cbc_mac_x8_avx.asm
+++ b/lib/avx_t1/aes128_cbc_mac_x8_avx.asm
@@ -25,13 +25,16 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-;;; Routine to compute CBC-MAC. It is based on 128 bit CBC AES encrypt code.
+;; AES-CMAC-128
 
-%define FUNC     aes128_cbc_mac_x8
-%define MODE     CBC_XCBC_MAC
-%define OFFSET   16
-%define ARG_IN   _aesarg_in
-%define ARG_KEYS _aesarg_keys
-%define ARG_IV   _aesarg_IV
+%include "include/aes_cbc_enc_x8_avx.inc"
 
-%include "avx_t1/aes128_cbc_enc_x8_avx.asm"
+mksection .text
+
+align 64
+MKGLOBAL(aes128_cbc_mac_x8,function,internal)
+aes128_cbc_mac_x8:
+        AES_CBC_X8 CBC_XCBC_MAC, 9, 16, {arg1 + _aesarg_IV}, {arg1 + _aesarg_keys}, {arg1 + _aesarg_in}
+        ret
+
+mksection stack-noexec
diff --git a/lib/avx_t1/aes128_cbcs_1_9_enc_x8_avx.asm b/lib/avx_t1/aes128_cbcs_1_9_enc_x8_avx.asm
index bafe2e4c..e364dde1 100644
--- a/lib/avx_t1/aes128_cbcs_1_9_enc_x8_avx.asm
+++ b/lib/avx_t1/aes128_cbcs_1_9_enc_x8_avx.asm
@@ -30,23 +30,16 @@
 ;;; skip the following 9 blocks processing 4 buffers at a time.
 ;;; Updates In and Out pointers at the end.
 
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;; struct AES_ARGS {
-;;     void*    in[8];
-;;     void*    out[8];
-;;     UINT128* keys[8];
-;;     UINT128  IV[8];
-;; }
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;; void aes_cbcs_1_9_enc_128_x8(AES_ARGS *args, UINT64 len);
-;; arg 1: ARG : addr of AES_ARGS structure
-;; arg 2: LEN : len (in units of bytes)
-%define FUNC     aes_cbcs_1_9_enc_128_x8
-%define MODE     CBC
-%define OFFSET   160
-%define ARG_IN   _aesarg_in
-%define ARG_OUT  _aesarg_out
-%define ARG_KEYS _aesarg_keys
-%define ARG_IV   _aesarg_IV
+;; AES-CBCS-128 1:9
 
-%include "avx_t1/aes128_cbc_enc_x8_avx.asm"
+%include "include/aes_cbc_enc_x8_avx.inc"
+
+mksection .text
+
+align 64
+MKGLOBAL(aes_cbcs_1_9_enc_128_x8,function,internal)
+aes_cbcs_1_9_enc_128_x8:
+        AES_CBC_X8 CBC, 9, 160, {arg1 + _aesarg_IV}, {arg1 + _aesarg_keys}, {arg1 + _aesarg_in}, {arg1 + _aesarg_out}
+        ret
+
+mksection stack-noexec
diff --git a/lib/avx_t1/aes128_xcbc_mac_x8_avx.asm b/lib/avx_t1/aes128_xcbc_mac_x8_avx.asm
index 4ff183eb..64e669c4 100644
--- a/lib/avx_t1/aes128_xcbc_mac_x8_avx.asm
+++ b/lib/avx_t1/aes128_xcbc_mac_x8_avx.asm
@@ -25,13 +25,16 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-;;; routine to do 128 bit AES XCBC
+;; AES-XCBC-128
 
-%define FUNC     aes_xcbc_mac_128_x8
-%define MODE     CBC_XCBC_MAC
-%define OFFSET   16
-%define ARG_IN   _aesxcbcarg_in
-%define ARG_KEYS _aesxcbcarg_keys
-%define ARG_IV   _aesxcbcarg_ICV
+%include "include/aes_cbc_enc_x8_avx.inc"
 
-%include "avx_t1/aes128_cbc_enc_x8_avx.asm"
+mksection .text
+
+align 64
+MKGLOBAL(aes_xcbc_mac_128_x8,function,internal)
+aes_xcbc_mac_128_x8:
+        AES_CBC_X8 CBC_XCBC_MAC, 9, 16, {arg1 + _aesxcbcarg_ICV}, {arg1 + _aesxcbcarg_keys}, {arg1 + _aesxcbcarg_in}
+        ret
+
+mksection stack-noexec
diff --git a/lib/avx_t1/aes192_cbc_enc_x8_avx.asm b/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
index 9f314ff2..f4bf275b 100644
--- a/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes192_cbc_enc_x8_avx.asm
@@ -25,474 +25,16 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-;;; routine to do a 192 bit CBC AES encrypt
+;; AES-CBC-192
 
-;; clobbers all registers except for ARG1 and rbp
-
-%include "include/os.inc"
-%include "include/mb_mgr_datastruct.inc"
-%include "include/clear_regs.inc"
-
-%define	VMOVDQ vmovdqu ;; assume buffers not aligned
-
-%macro VPXOR2 2
-	vpxor	%1, %1, %2
-%endm
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;; struct AES_ARGS {
-;;     void*    in[8];
-;;     void*    out[8];
-;;     UINT128* keys[8];
-;;     UINT128  IV[8];
-;; }
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;; void aes_cbc_enc_192_x8(AES_ARGS *args, UINT64 len);
-;; arg 1: ARG : addr of AES_ARGS structure
-;; arg 2: LEN : len (in units of bytes)
-
-struc STACK
-_gpr_save:	resq	1
-_len:		resq	1
-endstruc
-
-%define GPR_SAVE_AREA	rsp + _gpr_save
-%define LEN_AREA	rsp + _len
-
-%ifdef LINUX
-%define ARG	rdi
-%define LEN	rsi
-%define REG3	rcx
-%define REG4	rdx
-%else
-%define ARG	rcx
-%define LEN	rdx
-%define REG3	rsi
-%define REG4	rdi
-%endif
-
-%define IDX	rax
-%define TMP	rbx
-
-%define KEYS0	REG3
-%define KEYS1	REG4
-%define KEYS2	rbp
-%define KEYS3	r8
-%define KEYS4	r9
-%define KEYS5	r10
-%define KEYS6	r11
-%define KEYS7	r12
-
-%define IN0	r13
-%define IN2	r14
-%define IN4	r15
-%define IN6	LEN
-
-%define XDATA0		xmm0
-%define XDATA1		xmm1
-%define XDATA2		xmm2
-%define XDATA3		xmm3
-%define XDATA4		xmm4
-%define XDATA5		xmm5
-%define XDATA6		xmm6
-%define XDATA7		xmm7
-
-%define XKEY0_3		xmm8
-%define XKEY1_4		xmm9
-%define XKEY2_5		xmm10
-%define XKEY3_6		xmm11
-%define XKEY4_7		xmm12
-%define XKEY5_8		xmm13
-%define XKEY6_9		xmm14
-%define XTMP		xmm15
+%include "include/aes_cbc_enc_x8_avx.inc"
 
 mksection .text
 
+align 64
 MKGLOBAL(aes_cbc_enc_192_x8,function,internal)
 aes_cbc_enc_192_x8:
-
-	sub	rsp, STACK_size
-	mov	[GPR_SAVE_AREA + 8*0], rbp
-
-	mov	IDX, 16
-	mov	[LEN_AREA], LEN
-
-	mov	IN0,	[ARG + _aesarg_in + 8*0]
-	mov	IN2,	[ARG + _aesarg_in + 8*2]
-	mov	IN4,	[ARG + _aesarg_in + 8*4]
-	mov	IN6,	[ARG + _aesarg_in + 8*6]
-
-	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-	mov		TMP, [ARG + _aesarg_in + 8*1]
-	VMOVDQ		XDATA0, [IN0]		; load first block of plain text
-	VMOVDQ		XDATA1, [TMP]		; load first block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*3]
-	VMOVDQ		XDATA2, [IN2]		; load first block of plain text
-	VMOVDQ		XDATA3, [TMP]		; load first block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*5]
-	VMOVDQ		XDATA4, [IN4]		; load first block of plain text
-	VMOVDQ		XDATA5, [TMP]		; load first block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*7]
-	VMOVDQ		XDATA6, [IN6]		; load first block of plain text
-	VMOVDQ		XDATA7, [TMP]		; load first block of plain text
-
-	VPXOR2		XDATA0, [ARG + _aesarg_IV + 16*0]  ; plaintext XOR IV
-	VPXOR2		XDATA1, [ARG + _aesarg_IV + 16*1]  ; plaintext XOR IV
-	VPXOR2		XDATA2, [ARG + _aesarg_IV + 16*2]  ; plaintext XOR IV
-	VPXOR2		XDATA3, [ARG + _aesarg_IV + 16*3]  ; plaintext XOR IV
-	VPXOR2		XDATA4, [ARG + _aesarg_IV + 16*4]  ; plaintext XOR IV
-	VPXOR2		XDATA5, [ARG + _aesarg_IV + 16*5]  ; plaintext XOR IV
-	VPXOR2		XDATA6, [ARG + _aesarg_IV + 16*6]  ; plaintext XOR IV
-	VPXOR2		XDATA7, [ARG + _aesarg_IV + 16*7]  ; plaintext XOR IV
-
-	mov		KEYS0,	[ARG + _aesarg_keys + 8*0]
-	mov		KEYS1,	[ARG + _aesarg_keys + 8*1]
-	mov		KEYS2,	[ARG + _aesarg_keys + 8*2]
-	mov		KEYS3,	[ARG + _aesarg_keys + 8*3]
-	mov		KEYS4,	[ARG + _aesarg_keys + 8*4]
-	mov		KEYS5,	[ARG + _aesarg_keys + 8*5]
-	mov		KEYS6,	[ARG + _aesarg_keys + 8*6]
-	mov		KEYS7,	[ARG + _aesarg_keys + 8*7]
-
-	VPXOR2		XDATA0, [KEYS0 + 16*0]		; 0. ARK
-	VPXOR2		XDATA1, [KEYS1 + 16*0]		; 0. ARK
-	VPXOR2		XDATA2, [KEYS2 + 16*0]		; 0. ARK
-	VPXOR2		XDATA3, [KEYS3 + 16*0]		; 0. ARK
-	VPXOR2		XDATA4, [KEYS4 + 16*0]		; 0. ARK
-	VPXOR2		XDATA5, [KEYS5 + 16*0]		; 0. ARK
-	VPXOR2		XDATA6, [KEYS6 + 16*0]		; 0. ARK
-	VPXOR2		XDATA7, [KEYS7 + 16*0]		; 0. ARK
-
-	vaesenc		XDATA0, [KEYS0 + 16*1]	; 1. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*1]	; 1. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*1]	; 1. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*1]	; 1. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*1]	; 1. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*1]	; 1. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*1]	; 1. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*1]	; 1. ENC
-
-	vmovdqa		XKEY0_3, [KEYS0 + 16*3]	; load round 3 key
-
-	vaesenc		XDATA0, [KEYS0 + 16*2]	; 2. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*2]	; 2. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*2]	; 2. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*2]	; 2. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*2]	; 2. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*2]	; 2. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*2]	; 2. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*2]	; 2. ENC
-
-	vmovdqa		XKEY1_4, [KEYS1 + 16*4]	; load round 4 key
-
-	vaesenc		XDATA0, XKEY0_3       	; 3. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*3]	; 3. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*3]	; 3. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*3]	; 3. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*3]	; 3. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*3]	; 3. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*3]	; 3. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*3]	; 3. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*4]	; 4. ENC
-	vmovdqa		XKEY2_5, [KEYS2 + 16*5]	; load round 5 key
-	vaesenc		XDATA1, XKEY1_4       	; 4. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*4]	; 4. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*4]	; 4. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*4]	; 4. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*4]	; 4. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*4]	; 4. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*4]	; 4. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*5]	; 5. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*5]	; 5. ENC
-	vmovdqa		XKEY3_6, [KEYS3 + 16*6]	; load round 6 key
-	vaesenc		XDATA2, XKEY2_5       	; 5. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*5]	; 5. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*5]	; 5. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*5]	; 5. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*5]	; 5. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*5]	; 5. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*6]	; 6. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*6]	; 6. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*6]	; 6. ENC
-	vmovdqa		XKEY4_7, [KEYS4 + 16*7]	; load round 7 key
-	vaesenc		XDATA3, XKEY3_6       	; 6. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*6]	; 6. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*6]	; 6. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*6]	; 6. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*6]	; 6. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*7]	; 7. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*7]	; 7. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*7]	; 7. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*7]	; 7. ENC
-	vmovdqa		XKEY5_8, [KEYS5 + 16*8]	; load round 8 key
-	vaesenc		XDATA4, XKEY4_7       	; 7. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*7]	; 7. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*7]	; 7. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*7]	; 7. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*8]	; 8. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*8]	; 8. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*8]	; 8. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*8]	; 8. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*8]	; 8. ENC
-	vmovdqa		XKEY6_9, [KEYS6 + 16*9]	; load round 9 key
-	vaesenc		XDATA5, XKEY5_8       	; 8. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*8]	; 8. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*8]	; 8. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*9]	; 9. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*9]	; 9. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*9]	; 9. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*9]	; 9. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*9]	; 9. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*9]	; 9. ENC
-	mov		TMP, [ARG + _aesarg_out + 8*0]
-	vaesenc		XDATA6, XKEY6_9       	; 9. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*9]	; 9. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*10]	; 10. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*10]	; 10. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*10]	; 10. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*10]	; 10. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*10]	; 10. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*10]	; 10. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*10]	; 10. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*10]	; 10. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*11]	; 11. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*11]	; 11. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*11]	; 11. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*11]	; 11. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*11]	; 11. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*11]	; 11. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*11]	; 11. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*11]	; 11. ENC
-
-	vaesenclast	XDATA0, [KEYS0 + 16*12]	; 12. ENC
-	vaesenclast	XDATA1, [KEYS1 + 16*12]	; 12. ENC
-	vaesenclast	XDATA2, [KEYS2 + 16*12]	; 12. ENC
-	vaesenclast	XDATA3, [KEYS3 + 16*12]	; 12. ENC
-	vaesenclast	XDATA4, [KEYS4 + 16*12]	; 12. ENC
-	vaesenclast	XDATA5, [KEYS5 + 16*12]	; 12. ENC
-	vaesenclast	XDATA6, [KEYS6 + 16*12]	; 12. ENC
-	vaesenclast	XDATA7, [KEYS7 + 16*12]	; 12. ENC
-
-	VMOVDQ		[TMP], XDATA0		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*1]
-	VMOVDQ		[TMP], XDATA1		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*2]
-	VMOVDQ		[TMP], XDATA2		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*3]
-	VMOVDQ		[TMP], XDATA3		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*4]
-	VMOVDQ		[TMP], XDATA4		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*5]
-	VMOVDQ		[TMP], XDATA5		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*6]
-	VMOVDQ		[TMP], XDATA6		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*7]
-	VMOVDQ		[TMP], XDATA7		; write back ciphertext
-
-	cmp		[LEN_AREA], IDX
-	je		done
-
-main_loop:
-	mov		TMP, [ARG + _aesarg_in + 8*1]
-	VPXOR2		XDATA0, [IN0 + IDX]	; load next block of plain text
-	VPXOR2		XDATA1, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*3]
-	VPXOR2		XDATA2, [IN2 + IDX]	; load next block of plain text
-	VPXOR2		XDATA3, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*5]
-	VPXOR2		XDATA4, [IN4 + IDX]	; load next block of plain text
-	VPXOR2		XDATA5, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*7]
-	VPXOR2		XDATA6, [IN6 + IDX]	; load next block of plain text
-	VPXOR2		XDATA7, [TMP + IDX]	; load next block of plain text
-
-	VPXOR2		XDATA0, [KEYS0 + 16*0]		; 0. ARK
-	VPXOR2		XDATA1, [KEYS1 + 16*0]		; 0. ARK
-	VPXOR2		XDATA2, [KEYS2 + 16*0]		; 0. ARK
-	VPXOR2		XDATA3, [KEYS3 + 16*0]		; 0. ARK
-	VPXOR2		XDATA4, [KEYS4 + 16*0]		; 0. ARK
-	VPXOR2		XDATA5, [KEYS5 + 16*0]		; 0. ARK
-	VPXOR2		XDATA6, [KEYS6 + 16*0]		; 0. ARK
-	VPXOR2		XDATA7, [KEYS7 + 16*0]		; 0. ARK
-
-	vaesenc		XDATA0, [KEYS0 + 16*1]	; 1. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*1]	; 1. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*1]	; 1. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*1]	; 1. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*1]	; 1. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*1]	; 1. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*1]	; 1. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*1]	; 1. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*2]	; 2. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*2]	; 2. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*2]	; 2. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*2]	; 2. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*2]	; 2. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*2]	; 2. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*2]	; 2. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*2]	; 2. ENC
-
-	vaesenc		XDATA0, XKEY0_3       	; 3. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*3]	; 3. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*3]	; 3. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*3]	; 3. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*3]	; 3. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*3]	; 3. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*3]	; 3. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*3]	; 3. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*4]	; 4. ENC
-	vaesenc		XDATA1, XKEY1_4       	; 4. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*4]	; 4. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*4]	; 4. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*4]	; 4. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*4]	; 4. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*4]	; 4. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*4]	; 4. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*5]	; 5. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*5]	; 5. ENC
-	vaesenc		XDATA2, XKEY2_5       	; 5. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*5]	; 5. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*5]	; 5. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*5]	; 5. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*5]	; 5. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*5]	; 5. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*6]	; 6. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*6]	; 6. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*6]	; 6. ENC
-	vaesenc		XDATA3, XKEY3_6       	; 6. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*6]	; 6. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*6]	; 6. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*6]	; 6. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*6]	; 6. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*7]	; 7. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*7]	; 7. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*7]	; 7. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*7]	; 7. ENC
-	vaesenc		XDATA4, XKEY4_7       	; 7. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*7]	; 7. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*7]	; 7. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*7]	; 7. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*8]	; 8. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*8]	; 8. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*8]	; 8. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*8]	; 8. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*8]	; 8. ENC
-	vaesenc		XDATA5, XKEY5_8       	; 8. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*8]	; 8. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*8]	; 8. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*9]	; 9. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*9]	; 9. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*9]	; 9. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*9]	; 9. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*9]	; 9. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*9]	; 9. ENC
-	mov		TMP, [ARG + _aesarg_out + 8*0]
-	vaesenc		XDATA6, XKEY6_9       	; 9. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*9]	; 9. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*10]	; 10. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*10]	; 10. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*10]	; 10. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*10]	; 10. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*10]	; 10. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*10]	; 10. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*10]	; 10. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*10]	; 10. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*11]	; 11. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*11]	; 11. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*11]	; 11. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*11]	; 11. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*11]	; 11. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*11]	; 11. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*11]	; 11. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*11]	; 11. ENC
-
-	vaesenclast	XDATA0, [KEYS0 + 16*12]	; 12. ENC
-	vaesenclast	XDATA1, [KEYS1 + 16*12]	; 12. ENC
-	vaesenclast	XDATA2, [KEYS2 + 16*12]	; 12. ENC
-	vaesenclast	XDATA3, [KEYS3 + 16*12]	; 12. ENC
-	vaesenclast	XDATA4, [KEYS4 + 16*12]	; 12. ENC
-	vaesenclast	XDATA5, [KEYS5 + 16*12]	; 12. ENC
-	vaesenclast	XDATA6, [KEYS6 + 16*12]	; 12. ENC
-	vaesenclast	XDATA7, [KEYS7 + 16*12]	; 12. ENC
-
-	VMOVDQ		[TMP + IDX], XDATA0		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*1]
-	VMOVDQ		[TMP + IDX], XDATA1		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*2]
-	VMOVDQ		[TMP + IDX], XDATA2		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*3]
-	VMOVDQ		[TMP + IDX], XDATA3		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*4]
-	VMOVDQ		[TMP + IDX], XDATA4		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*5]
-	VMOVDQ		[TMP + IDX], XDATA5		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*6]
-	VMOVDQ		[TMP + IDX], XDATA6		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*7]
-	VMOVDQ		[TMP + IDX], XDATA7		; write back ciphertext
-
-	add	IDX, 16
-	cmp	[LEN_AREA], IDX
-	jne	main_loop
-
-done:
-	;; update IV
-	vmovdqa	[ARG + _aesarg_IV + 16*0], XDATA0
-	vmovdqa	[ARG + _aesarg_IV + 16*1], XDATA1
-	vmovdqa	[ARG + _aesarg_IV + 16*2], XDATA2
-	vmovdqa	[ARG + _aesarg_IV + 16*3], XDATA3
-	vmovdqa	[ARG + _aesarg_IV + 16*4], XDATA4
-	vmovdqa	[ARG + _aesarg_IV + 16*5], XDATA5
-	vmovdqa	[ARG + _aesarg_IV + 16*6], XDATA6
-	vmovdqa	[ARG + _aesarg_IV + 16*7], XDATA7
-
-	;; update IN and OUT
-	vmovd	xmm0, [LEN_AREA]
-	vpshufd	xmm0, xmm0, 0x44
-	vpaddq	xmm1, xmm0, [ARG + _aesarg_in + 16*0]
-	vpaddq	xmm2, xmm0, [ARG + _aesarg_in + 16*1]
-	vpaddq	xmm3, xmm0, [ARG + _aesarg_in + 16*2]
-	vpaddq	xmm4, xmm0, [ARG + _aesarg_in + 16*3]
-	vmovdqa	[ARG + _aesarg_in + 16*0], xmm1
-	vmovdqa	[ARG + _aesarg_in + 16*1], xmm2
-	vmovdqa	[ARG + _aesarg_in + 16*2], xmm3
-	vmovdqa	[ARG + _aesarg_in + 16*3], xmm4
-	vpaddq	xmm5, xmm0, [ARG + _aesarg_out + 16*0]
-	vpaddq	xmm6, xmm0, [ARG + _aesarg_out + 16*1]
-	vpaddq	xmm7, xmm0, [ARG + _aesarg_out + 16*2]
-	vpaddq	xmm8, xmm0, [ARG + _aesarg_out + 16*3]
-	vmovdqa	[ARG + _aesarg_out + 16*0], xmm5
-	vmovdqa	[ARG + _aesarg_out + 16*1], xmm6
-	vmovdqa	[ARG + _aesarg_out + 16*2], xmm7
-	vmovdqa	[ARG + _aesarg_out + 16*3], xmm8
-
-;; XMMs are saved at a higher level
-	mov	rbp, [GPR_SAVE_AREA + 8*0]
-
-	add	rsp, STACK_size
-
-%ifdef SAFE_DATA
-	clear_all_xmms_avx_asm
-%endif ;; SAFE_DATA
-
-	ret
+        AES_CBC_X8 CBC, 11, 16, {arg1 + _aesarg_IV}, {arg1 + _aesarg_keys}, {arg1 + _aesarg_in}, {arg1 + _aesarg_out}
+        ret
 
 mksection stack-noexec
diff --git a/lib/avx_t1/aes256_cbc_enc_x8_avx.asm b/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
index 616615eb..c61ed181 100644
--- a/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
+++ b/lib/avx_t1/aes256_cbc_enc_x8_avx.asm
@@ -25,539 +25,16 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-;;; routine to do a 256 bit CBC AES encrypt
+;; AES-CBC-256
 
-;; clobbers all registers except for ARG1 and rbp
-
-%include "include/os.inc"
-%include "include/mb_mgr_datastruct.inc"
-%include "include/clear_regs.inc"
-
-%define	VMOVDQ vmovdqu ;; assume buffers not aligned
-
-%macro VPXOR2 2
-	vpxor	%1, %1, %2
-%endm
-
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;; struct AES_ARGS {
-;;     void*    in[8];
-;;     void*    out[8];
-;;     UINT128* keys[8];
-;;     UINT128  IV[8];
-;; }
-;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-;; void aes_cbc_enc_256_x8(AES_ARGS *args, UINT64 len);
-;; arg 1: ARG : addr of AES_ARGS structure
-;; arg 2: LEN : len (in units of bytes)
-
-struc STACK
-_gpr_save:	resq	8
-_len:		resq	1
-endstruc
-
-%define GPR_SAVE_AREA	rsp + _gpr_save
-%define LEN_AREA	rsp + _len
-
-%ifdef LINUX
-%define ARG	rdi
-%define LEN	rsi
-%define REG3	rcx
-%define REG4	rdx
-%else
-%define ARG	rcx
-%define LEN	rdx
-%define REG3	rsi
-%define REG4	rdi
-%endif
-
-%define IDX	rax
-%define TMP	rbx
-
-%define KEYS0	REG3
-%define KEYS1	REG4
-%define KEYS2	rbp
-%define KEYS3	r8
-%define KEYS4	r9
-%define KEYS5	r10
-%define KEYS6	r11
-%define KEYS7	r12
-
-%define IN0	r13
-%define IN2	r14
-%define IN4	r15
-%define IN6	LEN
-
-%define XDATA0		xmm0
-%define XDATA1		xmm1
-%define XDATA2		xmm2
-%define XDATA3		xmm3
-%define XDATA4		xmm4
-%define XDATA5		xmm5
-%define XDATA6		xmm6
-%define XDATA7		xmm7
-
-%define XKEY0_3		xmm8
-%define XKEY1_4		xmm9
-%define XKEY2_5		xmm10
-%define XKEY3_6		xmm11
-%define XKEY4_7		xmm12
-%define XKEY5_8		xmm13
-%define XKEY6_9		xmm14
-%define XTMP		xmm15
+%include "include/aes_cbc_enc_x8_avx.inc"
 
 mksection .text
-%ifdef CBC_MAC
-MKGLOBAL(aes256_cbc_mac_x8,function,internal)
-aes256_cbc_mac_x8:
-%else
+
+align 64
 MKGLOBAL(aes_cbc_enc_256_x8,function,internal)
 aes_cbc_enc_256_x8:
-%endif
-	sub	rsp, STACK_size
-	mov	[GPR_SAVE_AREA + 8*0], rbp
-%ifdef CBC_MAC
-	mov	[GPR_SAVE_AREA + 8*1], rbx
-	mov	[GPR_SAVE_AREA + 8*2], r12
-	mov	[GPR_SAVE_AREA + 8*3], r13
-	mov	[GPR_SAVE_AREA + 8*4], r14
-	mov	[GPR_SAVE_AREA + 8*5], r15
-%ifndef LINUX
-	mov	[GPR_SAVE_AREA + 8*6], rsi
-	mov	[GPR_SAVE_AREA + 8*7], rdi
-%endif
-%endif
-
-	mov	IDX, 16
-	mov	[LEN_AREA], LEN
-
-	mov	IN0,	[ARG + _aesarg_in + 8*0]
-	mov	IN2,	[ARG + _aesarg_in + 8*2]
-	mov	IN4,	[ARG + _aesarg_in + 8*4]
-	mov	IN6,	[ARG + _aesarg_in + 8*6]
-
-	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-
-	mov		TMP, [ARG + _aesarg_in + 8*1]
-	VMOVDQ		XDATA0, [IN0]		; load first block of plain text
-	VMOVDQ		XDATA1, [TMP]		; load first block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*3]
-	VMOVDQ		XDATA2, [IN2]		; load first block of plain text
-	VMOVDQ		XDATA3, [TMP]		; load first block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*5]
-	VMOVDQ		XDATA4, [IN4]		; load first block of plain text
-	VMOVDQ		XDATA5, [TMP]		; load first block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*7]
-	VMOVDQ		XDATA6, [IN6]		; load first block of plain text
-	VMOVDQ		XDATA7, [TMP]		; load first block of plain text
-
-	VPXOR2		XDATA0, [ARG + _aesarg_IV + 16*0]  ; plaintext XOR IV
-	VPXOR2		XDATA1, [ARG + _aesarg_IV + 16*1]  ; plaintext XOR IV
-	VPXOR2		XDATA2, [ARG + _aesarg_IV + 16*2]  ; plaintext XOR IV
-	VPXOR2		XDATA3, [ARG + _aesarg_IV + 16*3]  ; plaintext XOR IV
-	VPXOR2		XDATA4, [ARG + _aesarg_IV + 16*4]  ; plaintext XOR IV
-	VPXOR2		XDATA5, [ARG + _aesarg_IV + 16*5]  ; plaintext XOR IV
-	VPXOR2		XDATA6, [ARG + _aesarg_IV + 16*6]  ; plaintext XOR IV
-	VPXOR2		XDATA7, [ARG + _aesarg_IV + 16*7]  ; plaintext XOR IV
-
-	mov		KEYS0,	[ARG + _aesarg_keys + 8*0]
-	mov		KEYS1,	[ARG + _aesarg_keys + 8*1]
-	mov		KEYS2,	[ARG + _aesarg_keys + 8*2]
-	mov		KEYS3,	[ARG + _aesarg_keys + 8*3]
-	mov		KEYS4,	[ARG + _aesarg_keys + 8*4]
-	mov		KEYS5,	[ARG + _aesarg_keys + 8*5]
-	mov		KEYS6,	[ARG + _aesarg_keys + 8*6]
-	mov		KEYS7,	[ARG + _aesarg_keys + 8*7]
-
-	VPXOR2		XDATA0, [KEYS0 + 16*0]		; 0. ARK
-	VPXOR2		XDATA1, [KEYS1 + 16*0]		; 0. ARK
-	VPXOR2		XDATA2, [KEYS2 + 16*0]		; 0. ARK
-	VPXOR2		XDATA3, [KEYS3 + 16*0]		; 0. ARK
-	VPXOR2		XDATA4, [KEYS4 + 16*0]		; 0. ARK
-	VPXOR2		XDATA5, [KEYS5 + 16*0]		; 0. ARK
-	VPXOR2		XDATA6, [KEYS6 + 16*0]		; 0. ARK
-	VPXOR2		XDATA7, [KEYS7 + 16*0]		; 0. ARK
-
-	vaesenc		XDATA0, [KEYS0 + 16*1]	; 1. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*1]	; 1. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*1]	; 1. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*1]	; 1. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*1]	; 1. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*1]	; 1. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*1]	; 1. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*1]	; 1. ENC
-
-	vmovdqa		XKEY0_3, [KEYS0 + 16*3]	; load round 3 key
-
-	vaesenc		XDATA0, [KEYS0 + 16*2]	; 2. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*2]	; 2. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*2]	; 2. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*2]	; 2. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*2]	; 2. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*2]	; 2. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*2]	; 2. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*2]	; 2. ENC
-
-	vmovdqa		XKEY1_4, [KEYS1 + 16*4]	; load round 4 key
-
-	vaesenc		XDATA0, XKEY0_3       	; 3. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*3]	; 3. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*3]	; 3. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*3]	; 3. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*3]	; 3. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*3]	; 3. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*3]	; 3. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*3]	; 3. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*4]	; 4. ENC
-	vmovdqa		XKEY2_5, [KEYS2 + 16*5]	; load round 5 key
-	vaesenc		XDATA1, XKEY1_4       	; 4. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*4]	; 4. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*4]	; 4. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*4]	; 4. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*4]	; 4. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*4]	; 4. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*4]	; 4. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*5]	; 5. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*5]	; 5. ENC
-	vmovdqa		XKEY3_6, [KEYS3 + 16*6]	; load round 6 key
-	vaesenc		XDATA2, XKEY2_5       	; 5. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*5]	; 5. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*5]	; 5. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*5]	; 5. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*5]	; 5. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*5]	; 5. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*6]	; 6. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*6]	; 6. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*6]	; 6. ENC
-	vmovdqa		XKEY4_7, [KEYS4 + 16*7]	; load round 7 key
-	vaesenc		XDATA3, XKEY3_6       	; 6. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*6]	; 6. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*6]	; 6. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*6]	; 6. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*6]	; 6. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*7]	; 7. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*7]	; 7. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*7]	; 7. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*7]	; 7. ENC
-	vmovdqa		XKEY5_8, [KEYS5 + 16*8]	; load round 8 key
-	vaesenc		XDATA4, XKEY4_7       	; 7. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*7]	; 7. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*7]	; 7. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*7]	; 7. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*8]	; 8. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*8]	; 8. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*8]	; 8. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*8]	; 8. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*8]	; 8. ENC
-	vmovdqa		XKEY6_9, [KEYS6 + 16*9]	; load round 9 key
-	vaesenc		XDATA5, XKEY5_8       	; 8. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*8]	; 8. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*8]	; 8. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*9]	; 9. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*9]	; 9. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*9]	; 9. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*9]	; 9. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*9]	; 9. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*9]	; 9. ENC
-	mov		TMP, [ARG + _aesarg_out + 8*0]
-	vaesenc		XDATA6, XKEY6_9       	; 9. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*9]	; 9. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*10]	; 10. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*10]	; 10. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*10]	; 10. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*10]	; 10. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*10]	; 10. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*10]	; 10. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*10]	; 10. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*10]	; 10. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*11]	; 11. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*11]	; 11. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*11]	; 11. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*11]	; 11. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*11]	; 11. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*11]	; 11. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*11]	; 11. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*11]	; 11. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*12]	; 12. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*12]	; 12. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*12]	; 12. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*12]	; 12. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*12]	; 12. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*12]	; 12. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*12]	; 12. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*12]	; 12. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*13]	; 13. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*13]	; 13. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*13]	; 13. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*13]	; 13. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*13]	; 13. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*13]	; 13. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*13]	; 13. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*13]	; 13. ENC
-
-	vaesenclast	XDATA0, [KEYS0 + 16*14]	; 14. ENC
-	vaesenclast	XDATA1, [KEYS1 + 16*14]	; 14. ENC
-	vaesenclast	XDATA2, [KEYS2 + 16*14]	; 14. ENC
-	vaesenclast	XDATA3, [KEYS3 + 16*14]	; 14. ENC
-	vaesenclast	XDATA4, [KEYS4 + 16*14]	; 14. ENC
-	vaesenclast	XDATA5, [KEYS5 + 16*14]	; 14. ENC
-	vaesenclast	XDATA6, [KEYS6 + 16*14]	; 14. ENC
-	vaesenclast	XDATA7, [KEYS7 + 16*14]	; 14. ENC
-
-%ifndef CBC_MAC
-        VMOVDQ		[TMP], XDATA0		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*1]
-	VMOVDQ		[TMP], XDATA1		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*2]
-	VMOVDQ		[TMP], XDATA2		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*3]
-	VMOVDQ		[TMP], XDATA3		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*4]
-	VMOVDQ		[TMP], XDATA4		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*5]
-	VMOVDQ		[TMP], XDATA5		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*6]
-	VMOVDQ		[TMP], XDATA6		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*7]
-	VMOVDQ		[TMP], XDATA7		; write back ciphertext
-%endif
-	cmp		[LEN_AREA], IDX
-	je		done
-
-main_loop:
-	mov		TMP, [ARG + _aesarg_in + 8*1]
-	VPXOR2		XDATA0, [IN0 + IDX]	; load next block of plain text
-	VPXOR2		XDATA1, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*3]
-	VPXOR2		XDATA2, [IN2 + IDX]	; load next block of plain text
-	VPXOR2		XDATA3, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*5]
-	VPXOR2		XDATA4, [IN4 + IDX]	; load next block of plain text
-	VPXOR2		XDATA5, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [ARG + _aesarg_in + 8*7]
-	VPXOR2		XDATA6, [IN6 + IDX]	; load next block of plain text
-	VPXOR2		XDATA7, [TMP + IDX]	; load next block of plain text
-
-	VPXOR2		XDATA0, [KEYS0 + 16*0]		; 0. ARK
-	VPXOR2		XDATA1, [KEYS1 + 16*0]		; 0. ARK
-	VPXOR2		XDATA2, [KEYS2 + 16*0]		; 0. ARK
-	VPXOR2		XDATA3, [KEYS3 + 16*0]		; 0. ARK
-	VPXOR2		XDATA4, [KEYS4 + 16*0]		; 0. ARK
-	VPXOR2		XDATA5, [KEYS5 + 16*0]		; 0. ARK
-	VPXOR2		XDATA6, [KEYS6 + 16*0]		; 0. ARK
-	VPXOR2		XDATA7, [KEYS7 + 16*0]		; 0. ARK
-
-	vaesenc		XDATA0, [KEYS0 + 16*1]	; 1. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*1]	; 1. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*1]	; 1. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*1]	; 1. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*1]	; 1. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*1]	; 1. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*1]	; 1. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*1]	; 1. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*2]	; 2. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*2]	; 2. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*2]	; 2. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*2]	; 2. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*2]	; 2. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*2]	; 2. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*2]	; 2. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*2]	; 2. ENC
-
-	vaesenc		XDATA0, XKEY0_3       	; 3. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*3]	; 3. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*3]	; 3. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*3]	; 3. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*3]	; 3. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*3]	; 3. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*3]	; 3. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*3]	; 3. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*4]	; 4. ENC
-	vaesenc		XDATA1, XKEY1_4       	; 4. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*4]	; 4. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*4]	; 4. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*4]	; 4. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*4]	; 4. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*4]	; 4. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*4]	; 4. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*5]	; 5. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*5]	; 5. ENC
-	vaesenc		XDATA2, XKEY2_5       	; 5. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*5]	; 5. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*5]	; 5. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*5]	; 5. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*5]	; 5. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*5]	; 5. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*6]	; 6. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*6]	; 6. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*6]	; 6. ENC
-	vaesenc		XDATA3, XKEY3_6       	; 6. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*6]	; 6. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*6]	; 6. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*6]	; 6. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*6]	; 6. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*7]	; 7. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*7]	; 7. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*7]	; 7. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*7]	; 7. ENC
-	vaesenc		XDATA4, XKEY4_7       	; 7. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*7]	; 7. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*7]	; 7. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*7]	; 7. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*8]	; 8. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*8]	; 8. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*8]	; 8. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*8]	; 8. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*8]	; 8. ENC
-	vaesenc		XDATA5, XKEY5_8       	; 8. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*8]	; 8. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*8]	; 8. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*9]	; 9. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*9]	; 9. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*9]	; 9. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*9]	; 9. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*9]	; 9. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*9]	; 9. ENC
-	mov		TMP, [ARG + _aesarg_out + 8*0]
-	vaesenc		XDATA6, XKEY6_9       	; 9. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*9]	; 9. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*10]	; 10. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*10]	; 10. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*10]	; 10. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*10]	; 10. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*10]	; 10. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*10]	; 10. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*10]	; 10. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*10]	; 10. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*11]	; 11. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*11]	; 11. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*11]	; 11. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*11]	; 11. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*11]	; 11. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*11]	; 11. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*11]	; 11. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*11]	; 11. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*12]	; 12. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*12]	; 12. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*12]	; 12. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*12]	; 12. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*12]	; 12. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*12]	; 12. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*12]	; 12. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*12]	; 12. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*13]	; 13. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*13]	; 13. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*13]	; 13. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*13]	; 13. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*13]	; 13. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*13]	; 13. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*13]	; 13. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*13]	; 13. ENC
-
-	vaesenclast	XDATA0, [KEYS0 + 16*14]	; 14. ENC
-	vaesenclast	XDATA1, [KEYS1 + 16*14]	; 14. ENC
-	vaesenclast	XDATA2, [KEYS2 + 16*14]	; 14. ENC
-	vaesenclast	XDATA3, [KEYS3 + 16*14]	; 14. ENC
-	vaesenclast	XDATA4, [KEYS4 + 16*14]	; 14. ENC
-	vaesenclast	XDATA5, [KEYS5 + 16*14]	; 14. ENC
-	vaesenclast	XDATA6, [KEYS6 + 16*14]	; 14. ENC
-	vaesenclast	XDATA7, [KEYS7 + 16*14]	; 14. ENC
-
-%ifndef CBC_MAC
-	VMOVDQ		[TMP + IDX], XDATA0		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*1]
-	VMOVDQ		[TMP + IDX], XDATA1		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*2]
-	VMOVDQ		[TMP + IDX], XDATA2		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*3]
-	VMOVDQ		[TMP + IDX], XDATA3		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*4]
-	VMOVDQ		[TMP + IDX], XDATA4		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*5]
-	VMOVDQ		[TMP + IDX], XDATA5		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*6]
-	VMOVDQ		[TMP + IDX], XDATA6		; write back ciphertext
-	mov		TMP, [ARG + _aesarg_out + 8*7]
-	VMOVDQ		[TMP + IDX], XDATA7		; write back ciphertext
-%endif
-	add	IDX, 16
-	cmp	[LEN_AREA], IDX
-	jne	main_loop
-
-done:
-	;; update IV
-	vmovdqa	[ARG + _aesarg_IV + 16*0], XDATA0
-	vmovdqa	[ARG + _aesarg_IV + 16*1], XDATA1
-	vmovdqa	[ARG + _aesarg_IV + 16*2], XDATA2
-	vmovdqa	[ARG + _aesarg_IV + 16*3], XDATA3
-	vmovdqa	[ARG + _aesarg_IV + 16*4], XDATA4
-	vmovdqa	[ARG + _aesarg_IV + 16*5], XDATA5
-	vmovdqa	[ARG + _aesarg_IV + 16*6], XDATA6
-	vmovdqa	[ARG + _aesarg_IV + 16*7], XDATA7
-
-	;; update IN and OUT
-	vmovd	xmm0, [LEN_AREA]
-	vpshufd	xmm0, xmm0, 0x44
-	vpaddq	xmm1, xmm0, [ARG + _aesarg_in + 16*0]
-	vpaddq	xmm2, xmm0, [ARG + _aesarg_in + 16*1]
-	vpaddq	xmm3, xmm0, [ARG + _aesarg_in + 16*2]
-	vpaddq	xmm4, xmm0, [ARG + _aesarg_in + 16*3]
-	vmovdqa	[ARG + _aesarg_in + 16*0], xmm1
-	vmovdqa	[ARG + _aesarg_in + 16*1], xmm2
-	vmovdqa	[ARG + _aesarg_in + 16*2], xmm3
-	vmovdqa	[ARG + _aesarg_in + 16*3], xmm4
-%ifndef CBC_MAC
-        vpaddq	xmm5, xmm0, [ARG + _aesarg_out + 16*0]
-	vpaddq	xmm6, xmm0, [ARG + _aesarg_out + 16*1]
-	vpaddq	xmm7, xmm0, [ARG + _aesarg_out + 16*2]
-	vpaddq	xmm8, xmm0, [ARG + _aesarg_out + 16*3]
-	vmovdqa	[ARG + _aesarg_out + 16*0], xmm5
-	vmovdqa	[ARG + _aesarg_out + 16*1], xmm6
-	vmovdqa	[ARG + _aesarg_out + 16*2], xmm7
-	vmovdqa	[ARG + _aesarg_out + 16*3], xmm8
-%endif
-
-;; XMMs are saved at a higher level
-	mov	rbp, [GPR_SAVE_AREA + 8*0]
-%ifdef CBC_MAC
-	mov	rbx, [GPR_SAVE_AREA + 8*1]
-	mov	r12, [GPR_SAVE_AREA + 8*2]
-	mov	r13, [GPR_SAVE_AREA + 8*3]
-	mov	r14, [GPR_SAVE_AREA + 8*4]
-	mov	r15, [GPR_SAVE_AREA + 8*5]
-%ifndef LINUX
-	mov	rsi, [GPR_SAVE_AREA + 8*6]
-	mov	rdi, [GPR_SAVE_AREA + 8*7]
-%endif
-%endif
-
-	add	rsp, STACK_size
-
-%ifdef SAFE_DATA
-	clear_all_xmms_avx_asm
-%endif ;; SAFE_DATA
-
-	ret
+        AES_CBC_X8 CBC, 13, 16, {arg1 + _aesarg_IV}, {arg1 + _aesarg_keys}, {arg1 + _aesarg_in}, {arg1 + _aesarg_out}
+        ret
 
 mksection stack-noexec
diff --git a/lib/avx_t1/aes256_cbc_mac_x8_avx.asm b/lib/avx_t1/aes256_cbc_mac_x8_avx.asm
index 46312beb..c4e72a2c 100644
--- a/lib/avx_t1/aes256_cbc_mac_x8_avx.asm
+++ b/lib/avx_t1/aes256_cbc_mac_x8_avx.asm
@@ -25,7 +25,16 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-;;; Routine to compute CBC-MAC. It is based on 256 bit CBC AES encrypt code.
+;; AES-CMAC-256
 
-%define CBC_MAC 1
-%include "avx_t1/aes256_cbc_enc_x8_avx.asm"
+%include "include/aes_cbc_enc_x8_avx.inc"
+
+mksection .text
+
+align 64
+MKGLOBAL(aes256_cbc_mac_x8,function,internal)
+aes256_cbc_mac_x8:
+        AES_CBC_X8 CBC_XCBC_MAC, 13, 16, {arg1 + _aesarg_IV}, {arg1 + _aesarg_keys}, {arg1 + _aesarg_in}
+        ret
+
+mksection stack-noexec
diff --git a/lib/include/aes_cbc_enc_x8_avx.inc b/lib/include/aes_cbc_enc_x8_avx.inc
new file mode 100644
index 00000000..3ea20e13
--- /dev/null
+++ b/lib/include/aes_cbc_enc_x8_avx.inc
@@ -0,0 +1,525 @@
+;;
+;; Copyright (c) 2023, Intel Corporation
+;;
+;; Redistribution and use in source and binary forms, with or without
+;; modification, are permitted provided that the following conditions are met:
+;;
+;;     * Redistributions of source code must retain the above copyright notice,
+;;       this list of conditions and the following disclaimer.
+;;     * Redistributions in binary form must reproduce the above copyright
+;;       notice, this list of conditions and the following disclaimer in the
+;;       documentation and/or other materials provided with the distribution.
+;;     * Neither the name of Intel Corporation nor the names of its contributors
+;;       may be used to endorse or promote products derived from this software
+;;       without specific prior written permission.
+;;
+;; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+;; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+;; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+;; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
+;; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+;; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+;; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+;; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+;; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+;;
+
+;; macro to do a AES-CB, AES-CBC-MAC and AES-XCBC
+
+;; clobbers all registers except for ARG1 and rbp
+%use smartalign
+
+%include "include/os.inc"
+%include "include/mb_mgr_datastruct.inc"
+%include "include/clear_regs.inc"
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; struct AES_ARGS {
+;;     void*    in[8];
+;;     void*    out[8];
+;;     UINT128* keys[8];
+;;     UINT128  IV[8];
+;; }
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;; void aes_cbc_enc_128_x8(AES_ARGS *args, UINT64 len);
+;; arg 1: ARG : addr of AES_ARGS structure
+;; arg 2: LEN : len (in units of bytes)
+
+struc STACK
+_gpr_save:	resq	8
+_len:		resq	1
+endstruc
+
+%define GPR_SAVE_AREA	rsp + _gpr_save
+%define LEN_AREA	rsp + _len
+
+%ifdef LINUX
+%define arg1	rdi
+%define arg2	rsi
+%define arg3	rcx
+%define arg4	rdx
+%else
+%define arg1	rcx
+%define arg2	rdx
+%define arg3	rdi
+%define arg4	rsi
+%endif
+
+%define ARG     arg1
+%define LEN     arg2
+
+%define IDX	rax
+%define TMP	rbx
+
+%define KEYS0	arg3
+%define KEYS1	arg4
+%define KEYS2	rbp
+%define KEYS3	r8
+%define KEYS4	r9
+%define KEYS5	r10
+%define KEYS6	r11
+%define KEYS7	r12
+
+%define IN0	r13
+%define IN2	r14
+%define IN4	r15
+%define IN6	LEN
+
+%define XDATA0		xmm0
+%define XDATA1		xmm1
+%define XDATA2		xmm2
+%define XDATA3		xmm3
+%define XDATA4		xmm4
+%define XDATA5		xmm5
+%define XDATA6		xmm6
+%define XDATA7		xmm7
+
+%define XKEY0_3		xmm8
+%define XKEY1_4		xmm9
+%define XKEY2_5		xmm10
+%define XKEY3_6		xmm11
+%define XKEY4_7		xmm12
+%define XKEY5_8		xmm13
+%define XKEY6_9		xmm14
+%define XTMP		xmm15
+
+%macro AES_CBC_X8 6-7
+%define %%MODE          %1      ;; [in] CBC_XCBC_MAC or CBC
+%define %%NROUNDS       %2      ;; [in] number of AES rounds (9 - AES128, 11 - AES192, AES256 - 13)
+%define %%OFFSET        %3      ;; [in] numeric constant index increment
+%define %%ARG_IV        %4      ;; [in] pointer to array with IV pointers
+%define %%ARG_KEYS      %5      ;; [in] pointer to array with expanded key pointers
+%define %%ARG_IN        %6      ;; [in] pointer to array with input pointers (plain text)
+%define %%ARG_OUT       %7      ;; [in] pointer to array with destination pointers (cipher text)
+
+        sub	rsp, STACK_size
+	mov	[GPR_SAVE_AREA + 8*0], rbp
+%ifidn %%MODE, CBC_XCBC_MAC
+	mov	[GPR_SAVE_AREA + 8*1], rbx
+	mov	[GPR_SAVE_AREA + 8*2], r12
+	mov	[GPR_SAVE_AREA + 8*3], r13
+	mov	[GPR_SAVE_AREA + 8*4], r14
+	mov	[GPR_SAVE_AREA + 8*5], r15
+%ifndef LINUX
+	mov	[GPR_SAVE_AREA + 8*6], rsi
+	mov	[GPR_SAVE_AREA + 8*7], rdi
+%endif
+%endif
+
+	mov	IDX, %%OFFSET
+	mov	[LEN_AREA], LEN
+
+	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+
+	mov	        IN0,	[%%ARG_IN + 8*0]
+	mov	        IN2,	[%%ARG_IN + 8*2]
+	mov	        IN4,	[%%ARG_IN + 8*4]
+	mov	        IN6,	[%%ARG_IN + 8*6]
+
+	mov		TMP, [%%ARG_IN + 8*1]
+	vmovdqu		XDATA0, [IN0]		; load first block of plain text
+	vmovdqu		XDATA1, [TMP]		; load first block of plain text
+	mov		TMP, [%%ARG_IN + 8*3]
+	vmovdqu		XDATA2, [IN2]		; load first block of plain text
+	vmovdqu		XDATA3, [TMP]		; load first block of plain text
+	mov		TMP, [%%ARG_IN + 8*5]
+	vmovdqu		XDATA4, [IN4]		; load first block of plain text
+	vmovdqu		XDATA5, [TMP]		; load first block of plain text
+	mov		TMP, [%%ARG_IN + 8*7]
+	vmovdqu		XDATA6, [IN6]		; load first block of plain text
+	vmovdqu		XDATA7, [TMP]		; load first block of plain text
+
+	vpxor		XDATA0, XDATA0, [%%ARG_IV + 16*0]  ; plaintext XOR IV
+	vpxor		XDATA1, XDATA1, [%%ARG_IV + 16*1]  ; plaintext XOR IV
+	vpxor		XDATA2, XDATA2, [%%ARG_IV + 16*2]  ; plaintext XOR IV
+	vpxor		XDATA3, XDATA3, [%%ARG_IV + 16*3]  ; plaintext XOR IV
+	vpxor		XDATA4, XDATA4, [%%ARG_IV + 16*4]  ; plaintext XOR IV
+	vpxor		XDATA5, XDATA5, [%%ARG_IV + 16*5]  ; plaintext XOR IV
+	vpxor		XDATA6, XDATA6, [%%ARG_IV + 16*6]  ; plaintext XOR IV
+	vpxor		XDATA7, XDATA7, [%%ARG_IV + 16*7]  ; plaintext XOR IV
+
+	mov		KEYS0,	[%%ARG_KEYS + 8*0]
+	mov		KEYS1,	[%%ARG_KEYS + 8*1]
+	mov		KEYS2,	[%%ARG_KEYS + 8*2]
+	mov		KEYS3,	[%%ARG_KEYS + 8*3]
+	mov		KEYS4,	[%%ARG_KEYS + 8*4]
+	mov		KEYS5,	[%%ARG_KEYS + 8*5]
+	mov		KEYS6,	[%%ARG_KEYS + 8*6]
+	mov		KEYS7,	[%%ARG_KEYS + 8*7]
+
+	vpxor		XDATA0, XDATA0, [KEYS0 + 16*0]		; 0. ARK
+	vpxor		XDATA1, XDATA1, [KEYS1 + 16*0]		; 0. ARK
+	vpxor		XDATA2, XDATA2, [KEYS2 + 16*0]		; 0. ARK
+	vpxor		XDATA3, XDATA3, [KEYS3 + 16*0]		; 0. ARK
+	vpxor		XDATA4, XDATA4, [KEYS4 + 16*0]		; 0. ARK
+	vpxor		XDATA5, XDATA5, [KEYS5 + 16*0]		; 0. ARK
+	vpxor		XDATA6, XDATA6, [KEYS6 + 16*0]		; 0. ARK
+	vpxor		XDATA7, XDATA7, [KEYS7 + 16*0]		; 0. ARK
+
+	vaesenc		XDATA0, [KEYS0 + 16*1]	; 1. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*1]	; 1. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*1]	; 1. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*1]	; 1. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*1]	; 1. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*1]	; 1. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*1]	; 1. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*1]	; 1. ENC
+
+	vmovdqa		XKEY0_3, [KEYS0 + 16*3]	; load round 3 key
+
+	vaesenc		XDATA0, [KEYS0 + 16*2]	; 2. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*2]	; 2. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*2]	; 2. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*2]	; 2. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*2]	; 2. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*2]	; 2. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*2]	; 2. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*2]	; 2. ENC
+
+	vmovdqa		XKEY1_4, [KEYS1 + 16*4]	; load round 4 key
+
+	vaesenc		XDATA0, XKEY0_3       	; 3. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*3]	; 3. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*3]	; 3. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*3]	; 3. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*3]	; 3. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*3]	; 3. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*3]	; 3. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*3]	; 3. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*4]	; 4. ENC
+	vmovdqa		XKEY2_5, [KEYS2 + 16*5]	; load round 5 key
+	vaesenc		XDATA1, XKEY1_4       	; 4. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*4]	; 4. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*4]	; 4. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*4]	; 4. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*4]	; 4. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*4]	; 4. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*4]	; 4. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*5]	; 5. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*5]	; 5. ENC
+	vmovdqa		XKEY3_6, [KEYS3 + 16*6]	; load round 6 key
+	vaesenc		XDATA2, XKEY2_5       	; 5. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*5]	; 5. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*5]	; 5. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*5]	; 5. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*5]	; 5. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*5]	; 5. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*6]	; 6. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*6]	; 6. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*6]	; 6. ENC
+	vmovdqa		XKEY4_7, [KEYS4 + 16*7]	; load round 7 key
+	vaesenc		XDATA3, XKEY3_6       	; 6. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*6]	; 6. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*6]	; 6. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*6]	; 6. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*6]	; 6. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*7]	; 7. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*7]	; 7. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*7]	; 7. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*7]	; 7. ENC
+	vmovdqa		XKEY5_8, [KEYS5 + 16*8]	; load round 8 key
+	vaesenc		XDATA4, XKEY4_7       	; 7. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*7]	; 7. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*7]	; 7. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*7]	; 7. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*8]	; 8. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*8]	; 8. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*8]	; 8. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*8]	; 8. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*8]	; 8. ENC
+	vmovdqa		XKEY6_9, [KEYS6 + 16*9]	; load round 9 key
+	vaesenc		XDATA5, XKEY5_8       	; 8. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*8]	; 8. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*8]	; 8. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*9]	; 9. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*9]	; 9. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*9]	; 9. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*9]	; 9. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*9]	; 9. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*9]	; 9. ENC
+%ifnidn %%MODE, CBC_XCBC_MAC
+	mov		TMP, [%%ARG_OUT + 8*0]
+%endif
+	vaesenc		XDATA6, XKEY6_9       	; 9. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*9]	; 9. ENC
+
+%assign i (%%NROUNDS - 9)
+%assign j 10
+%rep i
+	vaesenc		XDATA0, [KEYS0 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA1, [KEYS1 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA2, [KEYS2 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA3, [KEYS3 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA4, [KEYS4 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA5, [KEYS5 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA6, [KEYS6 + 16*j]  ; 10,..13 ENC
+	vaesenc		XDATA7, [KEYS7 + 16*j]	; 10,..13 ENC
+%assign j (j + 1)
+%endrep
+
+        vaesenclast	XDATA0, [KEYS0 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA1, [KEYS1 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA2, [KEYS2 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA3, [KEYS3 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA4, [KEYS4 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA5, [KEYS5 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA6, [KEYS6 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA7, [KEYS7 + 16*j]	; 10/12/14 ENC
+
+%ifnidn %%MODE, CBC_XCBC_MAC
+	vmovdqu		[TMP], XDATA0		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*1]
+	vmovdqu		[TMP], XDATA1		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*2]
+	vmovdqu		[TMP], XDATA2		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*3]
+	vmovdqu		[TMP], XDATA3		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*4]
+	vmovdqu		[TMP], XDATA4		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*5]
+	vmovdqu		[TMP], XDATA5		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*6]
+	vmovdqu		[TMP], XDATA6		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*7]
+	vmovdqu		[TMP], XDATA7		; write back ciphertext
+%endif
+	cmp		[LEN_AREA], IDX
+	jle		%%_done
+
+align   32
+
+%%_main_loop:
+	mov		TMP, [%%ARG_IN + 8*1]
+	vpxor		XDATA0, XDATA0, [IN0 + IDX]	; load next block of plain text
+	vpxor		XDATA1, XDATA1, [TMP + IDX]	; load next block of plain text
+	mov		TMP, [%%ARG_IN + 8*3]
+	vpxor		XDATA2, XDATA2, [IN2 + IDX]	; load next block of plain text
+	vpxor		XDATA3, XDATA3, [TMP + IDX]	; load next block of plain text
+	mov		TMP, [%%ARG_IN + 8*5]
+	vpxor		XDATA4, XDATA4, [IN4 + IDX]	; load next block of plain text
+	vpxor		XDATA5, XDATA5, [TMP + IDX]	; load next block of plain text
+	mov		TMP, [%%ARG_IN + 8*7]
+	vpxor		XDATA6, XDATA6, [IN6 + IDX]	; load next block of plain text
+	vpxor		XDATA7, XDATA7, [TMP + IDX]	; load next block of plain text
+
+	vpxor		XDATA0, XDATA0, [KEYS0 + 16*0]		; 0. ARK
+	vpxor		XDATA1, XDATA1, [KEYS1 + 16*0]		; 0. ARK
+	vpxor		XDATA2, XDATA2, [KEYS2 + 16*0]		; 0. ARK
+	vpxor		XDATA3, XDATA3, [KEYS3 + 16*0]		; 0. ARK
+	vpxor		XDATA4, XDATA4, [KEYS4 + 16*0]		; 0. ARK
+	vpxor		XDATA5, XDATA5, [KEYS5 + 16*0]		; 0. ARK
+	vpxor		XDATA6, XDATA6, [KEYS6 + 16*0]		; 0. ARK
+	vpxor		XDATA7, XDATA7, [KEYS7 + 16*0]		; 0. ARK
+
+	vaesenc		XDATA0, [KEYS0 + 16*1]	; 1. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*1]	; 1. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*1]	; 1. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*1]	; 1. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*1]	; 1. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*1]	; 1. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*1]	; 1. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*1]	; 1. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*2]	; 2. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*2]	; 2. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*2]	; 2. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*2]	; 2. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*2]	; 2. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*2]	; 2. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*2]	; 2. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*2]	; 2. ENC
+
+	vaesenc		XDATA0, XKEY0_3       	; 3. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*3]	; 3. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*3]	; 3. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*3]	; 3. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*3]	; 3. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*3]	; 3. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*3]	; 3. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*3]	; 3. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*4]	; 4. ENC
+	vaesenc		XDATA1, XKEY1_4       	; 4. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*4]	; 4. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*4]	; 4. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*4]	; 4. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*4]	; 4. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*4]	; 4. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*4]	; 4. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*5]	; 5. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*5]	; 5. ENC
+	vaesenc		XDATA2, XKEY2_5       	; 5. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*5]	; 5. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*5]	; 5. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*5]	; 5. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*5]	; 5. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*5]	; 5. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*6]	; 6. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*6]	; 6. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*6]	; 6. ENC
+	vaesenc		XDATA3, XKEY3_6       	; 6. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*6]	; 6. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*6]	; 6. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*6]	; 6. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*6]	; 6. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*7]	; 7. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*7]	; 7. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*7]	; 7. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*7]	; 7. ENC
+	vaesenc		XDATA4, XKEY4_7       	; 7. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*7]	; 7. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*7]	; 7. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*7]	; 7. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*8]	; 8. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*8]	; 8. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*8]	; 8. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*8]	; 8. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*8]	; 8. ENC
+	vaesenc		XDATA5, XKEY5_8       	; 8. ENC
+	vaesenc		XDATA6, [KEYS6 + 16*8]	; 8. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*8]	; 8. ENC
+
+	vaesenc		XDATA0, [KEYS0 + 16*9]	; 9. ENC
+	vaesenc		XDATA1, [KEYS1 + 16*9]	; 9. ENC
+	vaesenc		XDATA2, [KEYS2 + 16*9]	; 9. ENC
+	vaesenc		XDATA3, [KEYS3 + 16*9]	; 9. ENC
+	vaesenc		XDATA4, [KEYS4 + 16*9]	; 9. ENC
+	vaesenc		XDATA5, [KEYS5 + 16*9]	; 9. ENC
+%ifnidn %%MODE, CBC_XCBC_MAC
+	mov		TMP, [%%ARG_OUT + 8*0]
+%endif
+	vaesenc		XDATA6, XKEY6_9       	; 9. ENC
+	vaesenc		XDATA7, [KEYS7 + 16*9]	; 9. ENC
+
+%assign i (%%NROUNDS - 9)
+%assign j 10
+%rep i
+	vaesenc		XDATA0, [KEYS0 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA1, [KEYS1 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA2, [KEYS2 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA3, [KEYS3 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA4, [KEYS4 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA5, [KEYS5 + 16*j]	; 10,..13 ENC
+	vaesenc		XDATA6, [KEYS6 + 16*j]  ; 10,..13 ENC
+	vaesenc		XDATA7, [KEYS7 + 16*j]	; 10,..13 ENC
+%assign j (j + 1)
+%endrep
+
+        vaesenclast	XDATA0, [KEYS0 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA1, [KEYS1 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA2, [KEYS2 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA3, [KEYS3 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA4, [KEYS4 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA5, [KEYS5 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA6, [KEYS6 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA7, [KEYS7 + 16*j]	; 10/12/14 ENC
+
+%ifnidn %%MODE, CBC_XCBC_MAC
+        ;; no ciphertext write back for CBC-MAC
+	vmovdqu		[TMP + IDX], XDATA0		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*1]
+	vmovdqu		[TMP + IDX], XDATA1		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*2]
+	vmovdqu		[TMP + IDX], XDATA2		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*3]
+	vmovdqu		[TMP + IDX], XDATA3		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*4]
+	vmovdqu		[TMP + IDX], XDATA4		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*5]
+	vmovdqu		[TMP + IDX], XDATA5		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*6]
+	vmovdqu		[TMP + IDX], XDATA6		; write back ciphertext
+	mov		TMP, [%%ARG_OUT + 8*7]
+	vmovdqu		[TMP + IDX], XDATA7		; write back ciphertext
+%endif
+	add	IDX, %%OFFSET
+	cmp	[LEN_AREA], IDX
+	ja	%%_main_loop
+
+%%_done:
+	;; update IV for AES128-CBC / store digest for CBC-MAC
+	vmovdqa	[%%ARG_IV + 16*0], XDATA0
+	vmovdqa	[%%ARG_IV + 16*1], XDATA1
+	vmovdqa	[%%ARG_IV + 16*2], XDATA2
+	vmovdqa	[%%ARG_IV + 16*3], XDATA3
+	vmovdqa	[%%ARG_IV + 16*4], XDATA4
+	vmovdqa	[%%ARG_IV + 16*5], XDATA5
+	vmovdqa	[%%ARG_IV + 16*6], XDATA6
+	vmovdqa	[%%ARG_IV + 16*7], XDATA7
+
+	;; update IN and OUT
+	vmovd	xmm0, [LEN_AREA]
+	vpshufd	xmm0, xmm0, 0x44
+	vpaddq	xmm1, xmm0, [%%ARG_IN + 16*0]
+	vpaddq	xmm2, xmm0, [%%ARG_IN + 16*1]
+	vpaddq	xmm3, xmm0, [%%ARG_IN + 16*2]
+	vpaddq	xmm4, xmm0, [%%ARG_IN + 16*3]
+	vmovdqa	[%%ARG_IN + 16*0], xmm1
+	vmovdqa	[%%ARG_IN + 16*1], xmm2
+	vmovdqa	[%%ARG_IN + 16*2], xmm3
+	vmovdqa	[%%ARG_IN + 16*3], xmm4
+%ifnidn %%MODE, CBC_XCBC_MAC
+	vpaddq	xmm5, xmm0, [%%ARG_OUT + 16*0]
+	vpaddq	xmm6, xmm0, [%%ARG_OUT + 16*1]
+	vpaddq	xmm7, xmm0, [%%ARG_OUT + 16*2]
+	vpaddq	xmm8, xmm0, [%%ARG_OUT + 16*3]
+	vmovdqa	[%%ARG_OUT + 16*0], xmm5
+	vmovdqa	[%%ARG_OUT + 16*1], xmm6
+	vmovdqa	[%%ARG_OUT + 16*2], xmm7
+	vmovdqa	[%%ARG_OUT + 16*3], xmm8
+%endif
+
+        ;; XMMs are saved at a higher level
+	mov	rbp, [GPR_SAVE_AREA + 8*0]
+%ifidn %%MODE, CBC_XCBC_MAC
+	mov	rbx, [GPR_SAVE_AREA + 8*1]
+	mov	r12, [GPR_SAVE_AREA + 8*2]
+	mov	r13, [GPR_SAVE_AREA + 8*3]
+	mov	r14, [GPR_SAVE_AREA + 8*4]
+	mov	r15, [GPR_SAVE_AREA + 8*5]
+%ifndef LINUX
+	mov	rsi, [GPR_SAVE_AREA + 8*6]
+	mov	rdi, [GPR_SAVE_AREA + 8*7]
+%endif
+%endif
+
+	add	rsp, STACK_size
+
+%ifdef SAFE_DATA
+	clear_all_xmms_avx_asm
+%endif ;; SAFE_DATA
+
+%endmacro
+
+mksection stack-noexec
-- 
GitLab


From 7147ac8fc528f06d34f6bb4dc4ab2865bcdf745f Mon Sep 17 00:00:00 2001
From: Tomasz Kantecki <tomasz.kantecki@intel.com>
Date: Tue, 6 Jun 2023 10:10:32 +0100
Subject: [PATCH 330/332] avx: [aes-cbc] workaround load block issue in case of
 false store-forward condition

- perform all plain text loads before doing stores
- without the workaround, on Intel Atom(R) processors, performance penalty may be observed
  in NOT 4-byte aligned address and an in-place operation
---
 lib/include/aes_cbc_enc_x8_avx.inc | 409 ++++++++---------------------
 1 file changed, 113 insertions(+), 296 deletions(-)

diff --git a/lib/include/aes_cbc_enc_x8_avx.inc b/lib/include/aes_cbc_enc_x8_avx.inc
index 3ea20e13..3f1ee486 100644
--- a/lib/include/aes_cbc_enc_x8_avx.inc
+++ b/lib/include/aes_cbc_enc_x8_avx.inc
@@ -25,7 +25,9 @@
 ;; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 ;;
 
-;; macro to do a AES-CB, AES-CBC-MAC and AES-XCBC
+;; macro to do a AES-CBC, AES-CBC-MAC and AES-XCBC
+;; - multi-buffer implementation
+;; - 8 buffers at a time
 
 ;; clobbers all registers except for ARG1 and rbp
 %use smartalign
@@ -95,14 +97,14 @@ endstruc
 %define XDATA6		xmm6
 %define XDATA7		xmm7
 
-%define XKEY0_3		xmm8
-%define XKEY1_4		xmm9
-%define XKEY2_5		xmm10
-%define XKEY3_6		xmm11
-%define XKEY4_7		xmm12
-%define XKEY5_8		xmm13
-%define XKEY6_9		xmm14
-%define XTMP		xmm15
+%define XTMP0		xmm8
+%define XTMP1		xmm9
+%define XTMP2		xmm10
+%define XTMP3		xmm11
+%define XTMP4		xmm12
+%define XTMP5		xmm13
+%define XTMP6		xmm14
+%define XTMP7		xmm15
 
 %macro AES_CBC_X8 6-7
 %define %%MODE          %1      ;; [in] CBC_XCBC_MAC or CBC
@@ -127,7 +129,7 @@ endstruc
 %endif
 %endif
 
-	mov	IDX, %%OFFSET
+	xor	IDX, IDX
 	mov	[LEN_AREA], LEN
 
 	;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
@@ -137,27 +139,14 @@ endstruc
 	mov	        IN4,	[%%ARG_IN + 8*4]
 	mov	        IN6,	[%%ARG_IN + 8*6]
 
-	mov		TMP, [%%ARG_IN + 8*1]
-	vmovdqu		XDATA0, [IN0]		; load first block of plain text
-	vmovdqu		XDATA1, [TMP]		; load first block of plain text
-	mov		TMP, [%%ARG_IN + 8*3]
-	vmovdqu		XDATA2, [IN2]		; load first block of plain text
-	vmovdqu		XDATA3, [TMP]		; load first block of plain text
-	mov		TMP, [%%ARG_IN + 8*5]
-	vmovdqu		XDATA4, [IN4]		; load first block of plain text
-	vmovdqu		XDATA5, [TMP]		; load first block of plain text
-	mov		TMP, [%%ARG_IN + 8*7]
-	vmovdqu		XDATA6, [IN6]		; load first block of plain text
-	vmovdqu		XDATA7, [TMP]		; load first block of plain text
-
-	vpxor		XDATA0, XDATA0, [%%ARG_IV + 16*0]  ; plaintext XOR IV
-	vpxor		XDATA1, XDATA1, [%%ARG_IV + 16*1]  ; plaintext XOR IV
-	vpxor		XDATA2, XDATA2, [%%ARG_IV + 16*2]  ; plaintext XOR IV
-	vpxor		XDATA3, XDATA3, [%%ARG_IV + 16*3]  ; plaintext XOR IV
-	vpxor		XDATA4, XDATA4, [%%ARG_IV + 16*4]  ; plaintext XOR IV
-	vpxor		XDATA5, XDATA5, [%%ARG_IV + 16*5]  ; plaintext XOR IV
-	vpxor		XDATA6, XDATA6, [%%ARG_IV + 16*6]  ; plaintext XOR IV
-	vpxor		XDATA7, XDATA7, [%%ARG_IV + 16*7]  ; plaintext XOR IV
+        vmovdqa		XDATA0, [%%ARG_IV + 16*0]  ; load IV
+	vmovdqa		XDATA1, [%%ARG_IV + 16*1]  ; load IV
+	vmovdqa		XDATA2, [%%ARG_IV + 16*2]  ; load IV
+	vmovdqa		XDATA3, [%%ARG_IV + 16*3]  ; load IV
+	vmovdqa		XDATA4, [%%ARG_IV + 16*4]  ; load IV
+	vmovdqa		XDATA5, [%%ARG_IV + 16*5]  ; load IV
+	vmovdqa		XDATA6, [%%ARG_IV + 16*6]  ; load IV
+	vmovdqa		XDATA7, [%%ARG_IV + 16*7]  ; load IV
 
 	mov		KEYS0,	[%%ARG_KEYS + 8*0]
 	mov		KEYS1,	[%%ARG_KEYS + 8*1]
@@ -168,285 +157,116 @@ endstruc
 	mov		KEYS6,	[%%ARG_KEYS + 8*6]
 	mov		KEYS7,	[%%ARG_KEYS + 8*7]
 
-	vpxor		XDATA0, XDATA0, [KEYS0 + 16*0]		; 0. ARK
-	vpxor		XDATA1, XDATA1, [KEYS1 + 16*0]		; 0. ARK
-	vpxor		XDATA2, XDATA2, [KEYS2 + 16*0]		; 0. ARK
-	vpxor		XDATA3, XDATA3, [KEYS3 + 16*0]		; 0. ARK
-	vpxor		XDATA4, XDATA4, [KEYS4 + 16*0]		; 0. ARK
-	vpxor		XDATA5, XDATA5, [KEYS5 + 16*0]		; 0. ARK
-	vpxor		XDATA6, XDATA6, [KEYS6 + 16*0]		; 0. ARK
-	vpxor		XDATA7, XDATA7, [KEYS7 + 16*0]		; 0. ARK
-
-	vaesenc		XDATA0, [KEYS0 + 16*1]	; 1. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*1]	; 1. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*1]	; 1. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*1]	; 1. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*1]	; 1. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*1]	; 1. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*1]	; 1. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*1]	; 1. ENC
-
-	vmovdqa		XKEY0_3, [KEYS0 + 16*3]	; load round 3 key
-
-	vaesenc		XDATA0, [KEYS0 + 16*2]	; 2. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*2]	; 2. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*2]	; 2. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*2]	; 2. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*2]	; 2. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*2]	; 2. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*2]	; 2. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*2]	; 2. ENC
-
-	vmovdqa		XKEY1_4, [KEYS1 + 16*4]	; load round 4 key
-
-	vaesenc		XDATA0, XKEY0_3       	; 3. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*3]	; 3. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*3]	; 3. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*3]	; 3. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*3]	; 3. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*3]	; 3. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*3]	; 3. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*3]	; 3. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*4]	; 4. ENC
-	vmovdqa		XKEY2_5, [KEYS2 + 16*5]	; load round 5 key
-	vaesenc		XDATA1, XKEY1_4       	; 4. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*4]	; 4. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*4]	; 4. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*4]	; 4. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*4]	; 4. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*4]	; 4. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*4]	; 4. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*5]	; 5. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*5]	; 5. ENC
-	vmovdqa		XKEY3_6, [KEYS3 + 16*6]	; load round 6 key
-	vaesenc		XDATA2, XKEY2_5       	; 5. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*5]	; 5. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*5]	; 5. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*5]	; 5. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*5]	; 5. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*5]	; 5. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*6]	; 6. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*6]	; 6. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*6]	; 6. ENC
-	vmovdqa		XKEY4_7, [KEYS4 + 16*7]	; load round 7 key
-	vaesenc		XDATA3, XKEY3_6       	; 6. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*6]	; 6. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*6]	; 6. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*6]	; 6. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*6]	; 6. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*7]	; 7. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*7]	; 7. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*7]	; 7. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*7]	; 7. ENC
-	vmovdqa		XKEY5_8, [KEYS5 + 16*8]	; load round 8 key
-	vaesenc		XDATA4, XKEY4_7       	; 7. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*7]	; 7. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*7]	; 7. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*7]	; 7. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*8]	; 8. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*8]	; 8. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*8]	; 8. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*8]	; 8. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*8]	; 8. ENC
-	vmovdqa		XKEY6_9, [KEYS6 + 16*9]	; load round 9 key
-	vaesenc		XDATA5, XKEY5_8       	; 8. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*8]	; 8. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*8]	; 8. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*9]	; 9. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*9]	; 9. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*9]	; 9. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*9]	; 9. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*9]	; 9. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*9]	; 9. ENC
-%ifnidn %%MODE, CBC_XCBC_MAC
-	mov		TMP, [%%ARG_OUT + 8*0]
-%endif
-	vaesenc		XDATA6, XKEY6_9       	; 9. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*9]	; 9. ENC
-
-%assign i (%%NROUNDS - 9)
-%assign j 10
-%rep i
-	vaesenc		XDATA0, [KEYS0 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA1, [KEYS1 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA2, [KEYS2 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA3, [KEYS3 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA4, [KEYS4 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA5, [KEYS5 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA6, [KEYS6 + 16*j]  ; 10,..13 ENC
-	vaesenc		XDATA7, [KEYS7 + 16*j]	; 10,..13 ENC
+	; load next block of plain text
+        mov		TMP, [%%ARG_IN + 8*1]
+        vmovdqu         XTMP0, [IN0 + IDX]
+        vmovdqu         XTMP1, [TMP + IDX]
+	mov		TMP, [%%ARG_IN + 8*3]
+        vmovdqu         XTMP2, [IN2 + IDX]
+        vmovdqu         XTMP3, [TMP + IDX]
+	mov		TMP, [%%ARG_IN + 8*5]
+        vmovdqu         XTMP4, [IN4 + IDX]
+        vmovdqu         XTMP5, [TMP + IDX]
+	mov		TMP, [%%ARG_IN + 8*7]
+        vmovdqu         XTMP6, [IN6 + IDX]
+        vmovdqu         XTMP7, [TMP + IDX]
+
+align   32
+
+%%_main_loop:
+        ;; 0. ARK
+        vpxor		XDATA0, XDATA0, [KEYS0 + 16*0]
+	vpxor		XDATA1, XDATA1, [KEYS1 + 16*0]
+	vpxor		XDATA2, XDATA2, [KEYS2 + 16*0]
+	vpxor		XDATA3, XDATA3, [KEYS3 + 16*0]
+	vpxor		XDATA4, XDATA4, [KEYS4 + 16*0]
+	vpxor		XDATA5, XDATA5, [KEYS5 + 16*0]
+	vpxor		XDATA6, XDATA6, [KEYS6 + 16*0]
+	vpxor		XDATA7, XDATA7, [KEYS7 + 16*0]
+
+        vpxor		XDATA0, XDATA0, XTMP0
+	vpxor		XDATA1, XDATA1, XTMP1
+	vpxor		XDATA2, XDATA2, XTMP2
+	vpxor		XDATA3, XDATA3, XTMP3
+	vpxor		XDATA4, XDATA4, XTMP4
+	vpxor		XDATA5, XDATA5, XTMP5
+	vpxor		XDATA6, XDATA6, XTMP6
+	vpxor		XDATA7, XDATA7, XTMP7
+
+	;; 1 to 9/11/13 ENC rounds
+%assign j 1
+%rep %%NROUNDS
+        vaesenc		XDATA0, XDATA0, [KEYS0 + 16*j]
+	vaesenc		XDATA1, XDATA1, [KEYS1 + 16*j]
+	vaesenc		XDATA2, XDATA2, [KEYS2 + 16*j]
+	vaesenc		XDATA3, XDATA3, [KEYS3 + 16*j]
+	vaesenc		XDATA4, XDATA4, [KEYS4 + 16*j]
+	vaesenc		XDATA5, XDATA5, [KEYS5 + 16*j]
+	vaesenc		XDATA6, XDATA6, [KEYS6 + 16*j]
+	vaesenc		XDATA7, XDATA7, [KEYS7 + 16*j]
 %assign j (j + 1)
 %endrep
 
-        vaesenclast	XDATA0, [KEYS0 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA1, [KEYS1 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA2, [KEYS2 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA3, [KEYS3 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA4, [KEYS4 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA5, [KEYS5 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA6, [KEYS6 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA7, [KEYS7 + 16*j]	; 10/12/14 ENC
+	;; 1 to 9/11/13 ENCLAST round
+        vaesenclast	XDATA0, XDATA0, [KEYS0 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA1, XDATA1, [KEYS1 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA2, XDATA2, [KEYS2 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA3, XDATA3, [KEYS3 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA4, XDATA4, [KEYS4 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA5, XDATA5, [KEYS5 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA6, XDATA6, [KEYS6 + 16*j]	; 10/12/14 ENC
+	vaesenclast	XDATA7, XDATA7, [KEYS7 + 16*j]	; 10/12/14 ENC
+
+	add	        IDX, %%OFFSET
+	cmp	        [LEN_AREA], IDX
+	jna	        %%_exit_main_loop
+
+        ;; first load the next blocks into XTMP
+        mov		TMP, [%%ARG_IN + 8*1]
+        vmovdqu         XTMP0, [IN0 + IDX]
+        vmovdqu         XTMP1, [TMP + IDX]
+	mov		TMP, [%%ARG_IN + 8*3]
+        vmovdqu         XTMP2, [IN2 + IDX]
+        vmovdqu         XTMP3, [TMP + IDX]
+	mov		TMP, [%%ARG_IN + 8*5]
+        vmovdqu         XTMP4, [IN4 + IDX]
+        vmovdqu         XTMP5, [TMP + IDX]
+	mov		TMP, [%%ARG_IN + 8*7]
+        vmovdqu         XTMP6, [IN6 + IDX]
+        vmovdqu         XTMP7, [TMP + IDX]
 
 %ifnidn %%MODE, CBC_XCBC_MAC
-	vmovdqu		[TMP], XDATA0		; write back ciphertext
+        sub	        IDX, %%OFFSET
+
+        ;; no ciphertext write back for CBC-MAC
+	mov		TMP, [%%ARG_OUT + 8*0]
+	vmovdqu		[TMP + IDX], XDATA0		; write back ciphertext
 	mov		TMP, [%%ARG_OUT + 8*1]
-	vmovdqu		[TMP], XDATA1		; write back ciphertext
+	vmovdqu		[TMP + IDX], XDATA1		; write back ciphertext
 	mov		TMP, [%%ARG_OUT + 8*2]
-	vmovdqu		[TMP], XDATA2		; write back ciphertext
+	vmovdqu		[TMP + IDX], XDATA2		; write back ciphertext
 	mov		TMP, [%%ARG_OUT + 8*3]
-	vmovdqu		[TMP], XDATA3		; write back ciphertext
+	vmovdqu		[TMP + IDX], XDATA3		; write back ciphertext
 	mov		TMP, [%%ARG_OUT + 8*4]
-	vmovdqu		[TMP], XDATA4		; write back ciphertext
+	vmovdqu		[TMP + IDX], XDATA4		; write back ciphertext
 	mov		TMP, [%%ARG_OUT + 8*5]
-	vmovdqu		[TMP], XDATA5		; write back ciphertext
+	vmovdqu		[TMP + IDX], XDATA5		; write back ciphertext
 	mov		TMP, [%%ARG_OUT + 8*6]
-	vmovdqu		[TMP], XDATA6		; write back ciphertext
+	vmovdqu		[TMP + IDX], XDATA6		; write back ciphertext
 	mov		TMP, [%%ARG_OUT + 8*7]
-	vmovdqu		[TMP], XDATA7		; write back ciphertext
-%endif
-	cmp		[LEN_AREA], IDX
-	jle		%%_done
-
-align   32
+	vmovdqu		[TMP + IDX], XDATA7		; write back ciphertext
 
-%%_main_loop:
-	mov		TMP, [%%ARG_IN + 8*1]
-	vpxor		XDATA0, XDATA0, [IN0 + IDX]	; load next block of plain text
-	vpxor		XDATA1, XDATA1, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [%%ARG_IN + 8*3]
-	vpxor		XDATA2, XDATA2, [IN2 + IDX]	; load next block of plain text
-	vpxor		XDATA3, XDATA3, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [%%ARG_IN + 8*5]
-	vpxor		XDATA4, XDATA4, [IN4 + IDX]	; load next block of plain text
-	vpxor		XDATA5, XDATA5, [TMP + IDX]	; load next block of plain text
-	mov		TMP, [%%ARG_IN + 8*7]
-	vpxor		XDATA6, XDATA6, [IN6 + IDX]	; load next block of plain text
-	vpxor		XDATA7, XDATA7, [TMP + IDX]	; load next block of plain text
-
-	vpxor		XDATA0, XDATA0, [KEYS0 + 16*0]		; 0. ARK
-	vpxor		XDATA1, XDATA1, [KEYS1 + 16*0]		; 0. ARK
-	vpxor		XDATA2, XDATA2, [KEYS2 + 16*0]		; 0. ARK
-	vpxor		XDATA3, XDATA3, [KEYS3 + 16*0]		; 0. ARK
-	vpxor		XDATA4, XDATA4, [KEYS4 + 16*0]		; 0. ARK
-	vpxor		XDATA5, XDATA5, [KEYS5 + 16*0]		; 0. ARK
-	vpxor		XDATA6, XDATA6, [KEYS6 + 16*0]		; 0. ARK
-	vpxor		XDATA7, XDATA7, [KEYS7 + 16*0]		; 0. ARK
-
-	vaesenc		XDATA0, [KEYS0 + 16*1]	; 1. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*1]	; 1. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*1]	; 1. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*1]	; 1. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*1]	; 1. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*1]	; 1. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*1]	; 1. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*1]	; 1. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*2]	; 2. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*2]	; 2. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*2]	; 2. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*2]	; 2. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*2]	; 2. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*2]	; 2. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*2]	; 2. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*2]	; 2. ENC
-
-	vaesenc		XDATA0, XKEY0_3       	; 3. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*3]	; 3. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*3]	; 3. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*3]	; 3. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*3]	; 3. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*3]	; 3. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*3]	; 3. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*3]	; 3. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*4]	; 4. ENC
-	vaesenc		XDATA1, XKEY1_4       	; 4. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*4]	; 4. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*4]	; 4. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*4]	; 4. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*4]	; 4. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*4]	; 4. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*4]	; 4. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*5]	; 5. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*5]	; 5. ENC
-	vaesenc		XDATA2, XKEY2_5       	; 5. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*5]	; 5. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*5]	; 5. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*5]	; 5. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*5]	; 5. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*5]	; 5. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*6]	; 6. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*6]	; 6. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*6]	; 6. ENC
-	vaesenc		XDATA3, XKEY3_6       	; 6. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*6]	; 6. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*6]	; 6. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*6]	; 6. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*6]	; 6. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*7]	; 7. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*7]	; 7. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*7]	; 7. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*7]	; 7. ENC
-	vaesenc		XDATA4, XKEY4_7       	; 7. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*7]	; 7. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*7]	; 7. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*7]	; 7. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*8]	; 8. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*8]	; 8. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*8]	; 8. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*8]	; 8. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*8]	; 8. ENC
-	vaesenc		XDATA5, XKEY5_8       	; 8. ENC
-	vaesenc		XDATA6, [KEYS6 + 16*8]	; 8. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*8]	; 8. ENC
-
-	vaesenc		XDATA0, [KEYS0 + 16*9]	; 9. ENC
-	vaesenc		XDATA1, [KEYS1 + 16*9]	; 9. ENC
-	vaesenc		XDATA2, [KEYS2 + 16*9]	; 9. ENC
-	vaesenc		XDATA3, [KEYS3 + 16*9]	; 9. ENC
-	vaesenc		XDATA4, [KEYS4 + 16*9]	; 9. ENC
-	vaesenc		XDATA5, [KEYS5 + 16*9]	; 9. ENC
-%ifnidn %%MODE, CBC_XCBC_MAC
-	mov		TMP, [%%ARG_OUT + 8*0]
+        add	        IDX, %%OFFSET
 %endif
-	vaesenc		XDATA6, XKEY6_9       	; 9. ENC
-	vaesenc		XDATA7, [KEYS7 + 16*9]	; 9. ENC
-
-%assign i (%%NROUNDS - 9)
-%assign j 10
-%rep i
-	vaesenc		XDATA0, [KEYS0 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA1, [KEYS1 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA2, [KEYS2 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA3, [KEYS3 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA4, [KEYS4 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA5, [KEYS5 + 16*j]	; 10,..13 ENC
-	vaesenc		XDATA6, [KEYS6 + 16*j]  ; 10,..13 ENC
-	vaesenc		XDATA7, [KEYS7 + 16*j]	; 10,..13 ENC
-%assign j (j + 1)
-%endrep
+        jmp             %%_main_loop
 
-        vaesenclast	XDATA0, [KEYS0 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA1, [KEYS1 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA2, [KEYS2 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA3, [KEYS3 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA4, [KEYS4 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA5, [KEYS5 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA6, [KEYS6 + 16*j]	; 10/12/14 ENC
-	vaesenclast	XDATA7, [KEYS7 + 16*j]	; 10/12/14 ENC
+align 32
+%%_exit_main_loop:
 
 %ifnidn %%MODE, CBC_XCBC_MAC
         ;; no ciphertext write back for CBC-MAC
+        sub	        IDX, %%OFFSET
+	mov		TMP, [%%ARG_OUT + 8*0]
 	vmovdqu		[TMP + IDX], XDATA0		; write back ciphertext
 	mov		TMP, [%%ARG_OUT + 8*1]
 	vmovdqu		[TMP + IDX], XDATA1		; write back ciphertext
@@ -462,12 +282,9 @@ align   32
 	vmovdqu		[TMP + IDX], XDATA6		; write back ciphertext
 	mov		TMP, [%%ARG_OUT + 8*7]
 	vmovdqu		[TMP + IDX], XDATA7		; write back ciphertext
+        add	        IDX, %%OFFSET
 %endif
-	add	IDX, %%OFFSET
-	cmp	[LEN_AREA], IDX
-	ja	%%_main_loop
 
-%%_done:
 	;; update IV for AES128-CBC / store digest for CBC-MAC
 	vmovdqa	[%%ARG_IV + 16*0], XDATA0
 	vmovdqa	[%%ARG_IV + 16*1], XDATA1
-- 
GitLab


From b9dff1555fc04d6c33af0f8590dcf2235ddbef12 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 6 Jun 2023 15:39:10 +0100
Subject: [PATCH 331/332] lib: [HMAC] set right errno when IMB_MGR and key
 params are NULL in IPAD/OPAD function

If IMB_MGR is NULL, errno is set in global variable.
If key parameter is NULL, but IMB_MGR is NULL, the errno is set
inside IMB_MGR.
---
 lib/intel-ipsec-mb.h        |  2 +-
 lib/x86_64/hmac_ipad_opad.c | 14 +++++++-------
 2 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/lib/intel-ipsec-mb.h b/lib/intel-ipsec-mb.h
index 9c943d19..0d30734e 100644
--- a/lib/intel-ipsec-mb.h
+++ b/lib/intel-ipsec-mb.h
@@ -2612,7 +2612,7 @@ des_key_schedule(uint64_t *ks, const void *key);
  * @param [out] opad_hash       Block-sized outer padding
  */
 IMB_DLL_EXPORT void
-imb_hmac_ipad_opad(struct IMB_MGR *mb_mgr, const IMB_HASH_ALG sha_type,
+imb_hmac_ipad_opad(IMB_MGR *mb_mgr, const IMB_HASH_ALG sha_type,
                    const void *pkey, const size_t key_len,
                    void *ipad_hash, void *opad_hash);
 
diff --git a/lib/x86_64/hmac_ipad_opad.c b/lib/x86_64/hmac_ipad_opad.c
index 88ef3c60..0138a944 100644
--- a/lib/x86_64/hmac_ipad_opad.c
+++ b/lib/x86_64/hmac_ipad_opad.c
@@ -35,20 +35,20 @@
 
 IMB_DLL_EXPORT
 void
-imb_hmac_ipad_opad(struct IMB_MGR *mb_mgr, const IMB_HASH_ALG sha_type,
-                   const void *pkey,const size_t key_len,
+imb_hmac_ipad_opad(IMB_MGR *mb_mgr, const IMB_HASH_ALG sha_type,
+                   const void *pkey, const size_t key_len,
                    void *ipad_hash, void *opad_hash)
 {
 #ifdef SAFE_PARAM
-        imb_set_errno(NULL, 0);
-        if (pkey == NULL) {
-                imb_set_errno(NULL, IMB_ERR_NULL_KEY);
-                return;
-        }
         if (mb_mgr == NULL) {
                 imb_set_errno(NULL, IMB_ERR_NULL_MBMGR);
                 return;
         }
+        if (pkey == NULL) {
+                imb_set_errno(mb_mgr, IMB_ERR_NULL_KEY);
+                return;
+        }
+        imb_set_errno(mb_mgr, 0);
 #endif
         uint32_t i = 0;
         size_t local_key_len = 0;
-- 
GitLab


From 902533c5a5a74ac96f167043ad337d446f48cf49 Mon Sep 17 00:00:00 2001
From: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Date: Tue, 6 Jun 2023 16:19:11 +0100
Subject: [PATCH 332/332] lib: [QUIC] check if IMB_MGR parameter is NULL

---
 lib/x86_64/quic_aes_gcm.c    | 4 ++++
 lib/x86_64/quic_hp_aes_ecb.c | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/lib/x86_64/quic_aes_gcm.c b/lib/x86_64/quic_aes_gcm.c
index c9f5c30f..bd1e605e 100644
--- a/lib/x86_64/quic_aes_gcm.c
+++ b/lib/x86_64/quic_aes_gcm.c
@@ -52,6 +52,10 @@ imb_quic_aes_gcm(IMB_MGR *state,
 	uint64_t n;
 
 #ifdef SAFE_PARAM
+        if (state == NULL) {
+                imb_set_errno(NULL, IMB_ERR_NULL_MBMGR);
+                return;
+        }
         if (key_data == NULL) {
                 imb_set_errno(state, IMB_ERR_NULL_EXP_KEY);
                 return;
diff --git a/lib/x86_64/quic_hp_aes_ecb.c b/lib/x86_64/quic_hp_aes_ecb.c
index bd8b5697..1c874e6f 100644
--- a/lib/x86_64/quic_hp_aes_ecb.c
+++ b/lib/x86_64/quic_hp_aes_ecb.c
@@ -39,6 +39,10 @@ imb_quic_hp_aes_ecb(IMB_MGR *state,
 #ifdef SAFE_PARAM
         uint64_t i;
 
+        if (state == NULL) {
+                imb_set_errno(NULL, IMB_ERR_NULL_MBMGR);
+                return;
+        }
         if (exp_key_data == NULL) {
                 imb_set_errno(state, IMB_ERR_NULL_EXP_KEY);
                 return;
-- 
GitLab